© 2010 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. Digital Object Identifier (DOI): 10.1109/APEC.2010.5433625 Proceedings of the IEEE Applied Power Electronics Conference and Exposition (APEC 2010), Palm Springs, CA, USA, 21-25 February, 2010. Predictive Control of Buck Converter Using Nonlinear Output Capacitor Current Programming Victor Sui-Peng Chueng Henry Shu-Hung Chung Huai Wang Suggested Citation

V. S. P. Chueng, H. S. H. Chung, and H. Wang, "Predictive control of buck converter using nonlinear output capacitor current programming," in Proc. IEEE Appl. Power Electron. Conf. and Expo., 2010, pp. 491-498.

Predictive Control of Buck Converter Using Nonlinear Output Capacitor Current Programming

Victor Sui-pung Cheung, Member, IEEE, Henry Shu-hung Chung, Member, IEEE, Huai Wang, Student Member, IEEE

Centre for Power Electronics

City University of Hong Kong Tat Chee Avenue, Kowloon Tong

Kowloon, Hong Kong

Abstract - A predictive control of buck converter to achieve fast transient response is presented. The methodology is based on using the output capacitor current and instantaneous output voltage to predict the output voltage at the end and mid of a switching cycle to determine the state of the main switch. Two switching criteria, one for switching on and one for switching off the main switch, will be formulated. The operating principles of the control method and all possible cases in the operation will be discussed. The proposed control method has been verified with experimental results of a 50W, 12V/5V buck converter prototype. The controller is realized by analogue devices. The steady-state and transient response to large-signal disturbances will be discussed.

I. Introduction

There is a large body of literature related to control methods for enhancing static and dynamic responses of switching converters [1]-[2]. Most of them, such as voltage-mode [3]-[7] and current-mode regulators [8]-[15], are based on firstly linearizing the power conversion stage around the operating point to formulate time-invariant transfer functions for describing the input-to-output and control-to-output characteristics. Then, the controller is designed by applying classical control theory. However, as switching converters are time-variant systems, the linearized models are only applicable for low-frequency characterizations. Thus, the dynamic response of the entire converter system is limited.

To achieve fast dynamic response in switching converters, many time-domain dynamic control techniques, such as one-cycle control (OCC) [16]-[19], boundary control [20]-[30], state trajectory control [36]-[38] and digital control [39]-[43], have been proposed. The instantaneous values of the circuit variables are sensed and used to dictate the switching instants of the switches. The OCC scheme is suitable for systems, like buck-derived converters [16], that the output has a direct response to the input fluctuation. Thus, it has good input-perturbation rejection, but its load-perturbation rejection is comparatively weak.

The boundary control, which is a geometric control method, addresses complete operation of a converter over the startup, transient, and steady-state periods [20]. Typical boundary control methods are hysteretic control or sliding-mode control (SMC). The hysteretic controller tightly regulates the inductor current at the current reference [21]. With further extension on regulating the output voltage, the SMC is the popular choice in boundary control. However, the optimal sliding surface and the stability for fast dynamic response are dependent on the supply and load characteristics [32]. It is thus difficult to design a set of well-defined control parameters for the sliding surface for different operating points. The control parameters such as the slope of the switching function are sometimes designed by using trial-and-error approach and optimizing the startup profile and switching frequency, etc. The SMC is typically applied to the fast control loop and the output is regulated by a slow proportional-plus-integral (PI) controller. The PI controller is designed by classical control theory or sophisticated design method, like the fuzzy controller in [24]. The overall system dynamics are thus limited by the slow control loop.

Instead of a linear switching surface, optimal curved switching surfaces are proposed in [27]-[31] for buck converters. The boundary control with curved switching surface has been shown to give better static and dynamic responses than the one with linear switching surface. The main concept of these methods is that they determine the appropriate time of changing the state of the switches, so that the converter reaches the steady state within a few switching actions after the converter is subject to external disturbances.

A well-designed switching surface can provide good robustness and good dynamic response for the converter. However, the advantages of these methods are offset by two drawbacks. First, the switching frequency is not fixed. Second, a hysteresis band, which is noise sensitive, is needed. Although some fixed-frequency boundary control methods have been proposed, they require an additional feedback loop for regulating the switching frequency [33]-[35].

___________________________ The work described in this paper was fully supported by a grant from the CityU (Project No.: 7002460). The authors are with the Centre for Power Electronics, City University of Hong Kong, Tat Chee Avenue, Kowloon Tong, Kowloon, Hong Kong.

978-1-4244-4783-1/10/$25.00 ©2010 IEEE 491

The state trajectory control in [36]-[38] makes the converter reach the steady state for a step change in the input or output in one on/off control. The operating principle is to calculate the circuit behaviors in each topology. Apart from dealing with many system equations, such method also requires many analogue devices in the circuit implementation.

With the advancement of digital signal processor and semiconductor, many digital control methods [39]-[43] have been proposed. The control algorithms are usually extended from the developed control methods together with the flexibility of adjusting the control parameters, in order to obtain optimal static and dynamic behaviors.

In this paper, a control method that tackles the above drawbacks and features the advantages of the time-domain dynamic control technique is proposed. The turn-on and -off criteria are based on sensing the output capacitor current and instantaneous output voltage to predict the output voltage at the end or mid of the switching cycle. A nonlinear current reference for programming the output capacitor current is formulated. Comparing with the prior-art control methods, the proposed technique has the following advantages: 1) Instead of using separate control loops to regulate the fast

and slow circuit variables, the proposed method predicts the state trajectory and then determines the appropriate switching instants. The entire converter system has fast dynamic response.

2) As the control law has a set of well-defined parameters, it is unnecessary to choose the control parameters with trial-and-error approach.

3) No hysteresis band adding onto the switching surfaces is needed.

4) The switching frequency is constant. No control loop for regulating the switching frequency is needed.

A 50W, 12V/5V prototype has been built and tested. The theoretical prediction and experimental results are in close agreement. Section II will give the operating principles of the control method. Section III will give the three possible operating cases in the steady state. Finally, the experimental results will be given in Sec. IV. The steady-state characteristics and transient responses of the converter to large-signal input and output disturbances will be given.

II. Operating Principles of Control Method

Fig. 1 shows the buck converter with the block diagram of the proposed controller. The switching period of the main switch S is T. Fig. 2 shows the key waveforms. The controller turns S off at the beginning of each switching cycle and turns S on in the middle of the switching cycle (i.e., T / 2). As depicted in Fig. 2(a), the controller determines the time instant 1t to turn S on. In this operation, the duty cycle

d of S is larger than or equal to 0.5. Similarly, as shown in Fig. 2(b),

Fig. 1 Circuit schematic of the buck converter with the proposed controller.

the controller determines the time instant 2t to turn S off. In

this operation, d ≤ 0.5. Thus, the controller has two switching criteria for determining 1t and 2t , respectively. Derivations

of the switching criteria are given as follows. A. Switching criterion for turning S on at 1t

The controller will turn S on if the predicted value of the

output voltage ov at T is less than or equal to refv .

Mathematically,

refo vTv ≤)( (1)

The criterion is derived by considering the trajectory of ov

after S is on. When S is on,

L

vv

td

id oiL −= (2)

where Li is the inductor current, iv is the input voltage, and

L is the output inductor. As the load variation is small within the switching cycle,

ov is almost constant. Thus,

td

id

td

idiii CLoCL ≅+= (3)

where oi is the output current.

492

(a) d > 0.5.

(b) d < 0.5.

Fig. 2 Key waveforms of the converter.

The capacitor current ripple is thus the same as the inductor current ripple. By using (2) and (3),

L

vv

td

id oiC −= (4)

Since ov is almost constant over the switching period,

tdid C / is considered to be constant in the considered

switching cycle.

As td

vdCi o

C = , it can be derived from (4) that

])]()([)]()([[

)]()([)()(2

112

1

122

11

titiTiTiK

tiTiKtvTv

oLoL

CCoo

−−−=

−=− (5)

where )]()([2 11

1 tvtvC

LK

oi −= .

By using (2),

)(2

1)()( 1

11 tT

CKtiTi LL −+= (6)

By substituting (3) and (6) into (5),

212

11

11 )(

4

1)(

)()()( tT

CKtT

C

titvTv C

oo −+−=− (7)

Thus, by putting (1) into (7),

)(4

1

)()]([)( 1

1111 tT

CKtT

CtvVti orefC −−

−−≤ (8)

Equation (8) is the criterion for turning S on at 1t for d ≥ 0.5.

B. Switching criterion for turning S off at 2t

The controller will turn S off if the predicted value of the

output voltage ov at 1.5 T is larger than or equal to refv .

Mathematically, refo vTv ≥)5.1( (9)

The criterion is derived by considering the trajectory of ov

after S is off. When S is off,

L

v

td

id

td

id oLC −== (10)

Based on (10),

])]()([

)]5.1()5.1([[

)]()5.1([)()5.1(

222

22

222

22

titi

TiTiK

tiTiKtvTv

oL

oL

CCoo

−

−−=

−=−

(11)

where )(2 2

2 tvC

LK

o

−= .

By using (10),

)5.1(2

1)()5.1( 2

22 tT

CKtiTi LL −+= (12)

By substituting (10) and (12) into (11),

222

22

2

2

)5.1(4

1)5.1(

)(

)()5.1(

tTCK

tTC

ti

tvTv

C

oo

−+−

=−

(13)

493

Thus, by putting (9) into (13),

)5.1(4

1

)5.1()]([)( 2

2222 tT

CKtT

CtvVti orefC −−

−−≥

(14)

Equation (14) is the criterion for turning S off at 2t when d

≤ 0.5. Equations (8) and (14) are output capacitor current

programming functions. The main switch will be

commanded to take appropriate action when Ci satisfies the

equations. The right-hand-side (RHS) expressions of (8) and (14) are in nonlinear functions with time.

Fig. 3 gives the timing diagram and key signals in Fig. 1. Selection of the switching criteria, i.e., either (8) or (14), is decided by signals Av and Bv , which are derived from

rampv . When Av is high, (8) will be used. When Bv is high,

(14) will be used. The durations of Av and Bv are both

2/T . Cv is used to turn S off while Dv is used to turn S on.

Ev and Fv are the signal generated by the switching criteria

in (8) and (14), respectively. In the actual implementation, their operations are slightly modified and are described in Sec. VI. Finally, the gate signal gv for d ≥ 0.5 and d ≤ 0.5 is

illustrated in Fig. 3.

Fig. 3 Timing diagram and key signals in Fig. 1.

III. Boundary conditions for three possible cases

The switching criteria derived in Sec. II are based on the

assumption that the equivalent series resistance (ESR) of the output capacitor is zero. In reality, due to the presence of ESR, there are three possible operating cases, as depicted in Fig. 4, namely Case I, Case II and Case III. In Case I, the

main switch is turned on at 1t and turned off at T. In Case II,

it is turned on at 1t and turned off at 2t . In Case III, it is

turned on at 2/T and turned off at 2t . Cases I and III are

the similar to the ones shown in Fig. 2, i.e., either eq. (8) or eq. (14) is applied in one switching cycle at steady state. Case II is the one that both eqs. (8) and (14) are applied. The boundary conditions of the three cases are listed in Table I.

Table I – Boundary conditions of the three cases

Case t1 t2 Criterion(s) used

I T / 2 > T Eq. (8)

II T / 2 T Eqs. (8) and (14)

III > T / 2 T Eq. (14)

Thus, the three cases are determined by solving the values

of 1t and 2t using eqs. (8) and (14), respectively, to obtain

the boundary condition shown in Table I. At 1t , )( 1tiC [45] is equal to

R

tvIti o

C)(

)( 11

Δ−Δ−= (15)

where

L

TVDI o

2

)1( −=Δ (16)

and

( )

( )

( )+

+−

−−

+−

−

Δ=Δ

+−

+

−−

+−

CrR

T

s

CrR

TD

s

s

CrR

To

C

s

C

s

C

s

eDT

RC

eTDD

RC

TD

RC

e

IRtv

2

1

)1(

)1(2

1

1

2)(

)1(

1 (17)

By putting (15)-(17) into (8), 1t is solved.

At 2t , )( 2tiC [45] is equal to

R

tvIti o

C)(

)( 21

Δ−Δ= (18)

where

( )

( )

( )+

−

−−

+−

−

Δ=Δ

+−

+−

+−

CrR

T

s

CrR

DT

s

s

CrR

TL

o

C

s

C

s

C

s

eTD

RC

eTDD

RC

DT

RC

e

IRtv

2

1

)1(

)1(

2

1

1

2)( 2

(19)

By putting (18) and (19) into (14), 2t is solved. Fig. 4

shows the boundary of the three cases at different duty cycles

494

and ESR of the capacitor. The component values are based on the ones given in Sec. IV.

Boundary determined by Table I

�

����

���

����

���

����

���

� ��� ��� ��� ��� ��� ��� �� �� ��� �

Duty Cycle

ESR

Case III Case ICase II

Fig. 4 Boundary of the three possible cases.

IV. Experimental Verification Equations (8) and (14) are rearranged in the actual

implementation so that the RHS of these two functions will never go to large values when 1t and 2t are close to T. They

are modified into

212

1111 )(

4

1)()(

1)( tT

CKtTti

CVtv Crefo −−−−≤

(20) for (8), and

222

2222 )5.1(

4

1)5.1()(

1)( tT

CKtTti

CVtv Crefo −−−−≥

(21) for (14).

The functional block for the switching criteria of (8) and (14) shown in Fig. 1 are based on the operations in (20) and (21), respectively.

A 50W buck converter with iv = 12V, L = 30μH, C =

33μF, and refv = 5V has been built. The dc resistance of L is

0.02Ω. The equivalent series resistance of C is 0.2Ω. The switching frequency is 100kHz. The output is connected to a resistor bank. The large-signal response is tested by suddenly changing the value of the output resistor. Fig. 5 shows the transient responses when the output current is changed from 11A to 2A, and vice versa. When the output current is changed from 11A to 2A, it can be observed from the gate signal gv that the output reaches the steady after two

switching actions. There are spike generated due to the equivalent series inductance (ESL) of the output capacitor, namely ESL spike, and step due to the equivalent series resistance (ESR) of the output capacitor, namely ESR step [44]. The magnitude of the ESR step is 2V. When the output current is changed from 2A to 11A, there are a series of gate

pulses with very short turn-off signal generated. Such “turn-off” pulses are derived from the reset signal Cv in Fig. 1. As

the duration of each “turn-off” pulse is very short, the resulting effect is that the switch is almost on. The inductor current Li is monotonically increasing over the period. Thus,

if the short “turn-off” pulses are ignored, the converter can reach the steady-state after two “effective” switching actions as illustrated in Fig. 5. The ESR step in this case is 1.1V. The settling time of the output voltage is less than 80μs in both cases. The behaviors are similar to the ones in [27]-[29].

Fig. 6 shows the transient responses when refv is changed

from 8V to 4V, and vice versa. Thus, the steady-state duty cycle is changed between D > 0.5 (i.e., 8 / 12) and D < 0.5 (i.e., 4 / 12). Again, the output voltage can reach the steady-state in two “effective” switching actions if the pulses due to the reset signals are ignored. The settling time is less than 60μs in both cases. Of particular importance, the transition changing between D > 0.5 and D < 0.5 is smooth. The switching frequency is fixed at 100kHz before and after the load and output reference changes.

Fig. 7 shows the transient response when the load is changed from no load to full load conditions. At the no load condition, the converter is in “burst” mode that the controller periodically turns the main switch on for a short time to maintain the output voltage. Again, the converter can reach the steady-state in two “effective” switching actions.

Fig. 8 shows the steady-state waveforms when the input voltage is unregulated. The input voltage varies between 8V and 12.5V at the frequency of 100Hz. The output voltage can be tightly maintained at 5V.

Fig. 9 shows the transient waveforms when the actual values of L and C have substantial deviations from the ones used in the controller. The output current is changed from 2A to 11A. The values of L and C have ±20% differences from the values used in the controller. Results reveal that the profiles of the steady-state behaviors and transient responses are almost the same as the one with the nominal value, i.e., Fig. 5(b). In general, the settling time increases as the value of L is increased. The output voltage undershoot increases as the value of C is reduced. In all cases, the converter can revert to the steady state in two “effective” switching actions.

Fig. 10 shows the transient responses when the ESR of the capacitor is doubled, i.e., 0.4Ω. It is simulated by adding a 0.2Ω resistor in series with the capacitor. Compared Fig. 10(a) with Fig. 5(a), the ESR step is increased from 2V to 3.9V because the ESR is increased. Compared Fig. 10(b) with Fig. 5(b), the ESR step is increased from 1.1V to 2.2V. Moreover, the steady-state voltage ripple is increased due to an increase in the ESR. Nevertheless, the profiles of the transient responses in the two cases are almost the same. Hence, the ESR does not significantly affect the performance of the controller.

495

(a) From 11A to 2A (vo : 2V/div, iL : 5A/div, vg : 5V/div).

(b) From 2A to 11A (vo : 1V/div, iL : 5A/div, vg : 5V/div).

Fig. 5 Transient responses under step load changes [Timebase: 40μs/div].

(a) From 8V to 4V (Vref : 5V/div, vo : 2V/div, iL : 2A/div, vg : 5V/div).

(b) From 4V to 8V (Vref : 5V/div, vo : 2V/div, iL : 2A/div, vg : 5V/div) Fig. 6 Transient responses when vref is suddenly changed [Timebase:

40μs/div].

Fig. 7 Load transient when the load is changed from no load to full load. (vo :

1V/div, iL : 5A/div, vg : 5V/div) [Timebase: 40μs/div]

Fig. 8 Steady-state waveforms with unregulated input voltage (iL : 2A/div, vo :

200mV/div, vi : 5V/div) [Timebase: 4ms/div].

(a) L = 30μH + 20% and C = 33μF + 20%.

(b) L = 30μH + 20% and C = 33μF - 20%.

496

(c) L = 30μH - 20% and C = 33μF + 20%.

(d) L = 30μH - 20% and C = 33μF - 20%.

Fig. 9 Transient waveforms with substantial changes in the actual values

of L and C (vo : 1V/div, iL : 5A/div, vg : 5V/div) [Timebase: 4ms/div].

(a) From 11A to 2A (vo : 2V/div, iL : 5A/div, vg : 5V/div).

(b) From 2A to 11A (vo : 1V/div, iL : 5A/div, vg : 5V/div).

Fig. 10 Transient response with a step load change and the ESR of C =

0.4Ω [Timebase: 4ms/div]

V. Conclusion

A nonlinear output capacitor current programming scheme for buck converter to achieve fast transient response has been presented. The concept is based on continuously predicting the output voltage at the end or mid of a switching cycle to dictate the state of the main switch. Two switching criteria for turning on and off of the main switch are derived. The steady-state characteristics, system stability and sensitivity of the output voltage to the parametric variation have been investigated. The proposed method has been confirmed by the experimental results of a 50W prototype. Results reveal that the transient responses are similar to the boundary control with optimal switching surface in [27]-[29]. However, the proposed method does not require using hysteresis band and is in fixed switching frequency operation.

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