double ferquency buck conveter

1690 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 56, NO. 5, MAY 2009

Double-Frequency Buck ConverterXiong Du, Luowei Zhou, Senior Member, IEEE, and Heng-Ming Tai, Senior Member, IEEE

Abstract—Improving the efficiency and dynamics of power con-verters is a concerned tradeoff in power electronics. The increaseof switching frequency can improve the dynamics of power con-verters, but the efficiency may be degraded. A double-frequency(DF) buck converter is proposed to address this concern. Thisconverter is comprised of two buck cells: one works at high fre-quency, and another works at low frequency. It operates in a waythat current in the high-frequency switch is diverted through thelow-frequency switch. Thus, the converter can operate at veryhigh frequency without adding extra control circuits. Moreover,the switching loss of the converter remains small. The proposedconverter exhibits improved steady state and transient responseswith low switching loss. An ac small-signal model of the DF buckconverter is also given to show that the dynamics of output voltagedepends only on the high-frequency buck cell parameters, andis independent of the low-frequency buck cell parameters. Sim-ulation and experimental results demonstrate that the proposedconverter greatly improves the efficiency and exhibits nearly thesame dynamics as the conventional high-frequency buck converter.Furthermore, the proposed topology can be extended to otherdc–dc converters by the DF switch-inductor three-terminal net-work structure.

Index Terms—AC small-signal model, buck converter, effi-ciency, power conversion, switch inductor network.

I. INTRODUCTION

THE DEMAND of high-performance power converter isincreased dramatically with the broadening of power con-

verter’s application fields [1]. In order to improve the tran-sient and steady state performance of power converters and toenhance power density, high switching frequency is an effec-tive method. However, switching frequency rise causes higherswitching losses and greater electromagnetic interference [2].This, in turn, limits the increase of switching frequency andhinders the improvement of system performance. Active andpassive soft-switching techniques have been introduced to re-duce switching losses [3]–[6]. While these can create morefavorable switching trajectories for active power devices, theywill generally increase the complexity of control and some-times are affected by the variable input and output condition.

Manuscript received August 27, 2008; revised January 7, 2009. First pub-lished February 6, 2009; current version published April 29, 2009. This workwas supported in part by the National Natural Science Foundation of Chinaunder Grant 50677071, in part by the 111 Project, and in part by the SpecializedResearch Fund for Doctoral Program of Higher Education of China under Grant200611012.

X. Du and L. Zhou are with the State Key Laboratory of Power Transmis-sion Equipment and System Security and New Technology, and the Collegeof Electrical Engineering, Chongqing University, Chongqing 400044, China(e-mail: [email protected]; [email protected]).

H.-M. Tai is with the Department of Electrical Engineering, The Universityof Tulsa, Tulsa, OK 74104 USA (e-mail: [email protected]).

Color versions of one or more of the figures in this paper are available onlineat http://ieeexplore.ieee.org.

Digital Object Identifier 10.1109/TIE.2009.2013752

In the trends of using power modules, space is limited forplacing the added elements. The complexity of power stageand control circuit also reduces the reliability of soft-switchedconverters. Multiconverter paralleling method, which employslow-power converters in parallel to enhance the power rating,has been proposed to enhance the power processing capability[7]–[12]. However, parallel operation has interaction problemthat causes circulating current [11], [12]. To avoid the circu-lating current, approaches such as isolation, high impedance,and one-converter approach are utilized. These efforts increasethe control complexity. The interleaving operation employs Nconverters to operate in parallel with interleaved clocks, so thetotal dynamics can reach higher performance due to the factthat the equivalent frequency is N times the single converterfrequency. Nevertheless, the circulating current phenomenonalso exists.

A single-phase boost-type zero-voltage-transition (ZVT)pulsewidth-modulated converter proposed in [13] adopts anadditional shunt resonant network to form an additional Boostcell to realize soft switching of the main switches. However, theauxiliary switches operate in hard switch and high frequency.A similar topology of single-phase rectifier is given in [14],where total harmonic distortion of the input line current isreduced and the efficiency improved. Its operation is differentfrom the ZVT circuit. The boost-type topology, however, isnot very effective to enhance the output voltage performancein that the capacitor ripple voltage is determined by the lowfrequency. Hence, this topology is not suitable for improvementof dc output transient and steady state performances. Moreover,the main Boost circuit and the added cell are coupled, and theadded Boost cell has an effect on the inductor current input[15]. Splitting the filter inductor of buck converter into twoparts with added auxiliary active switch and diode has beenproposed to improve the output voltage response at load currentstep-down transient situation, but not at load current step-uptransient situation [16]. Additional transformer and switchesare needed to realize the improvement at step-up transient [17].To make the circuits in [16] and [17] function as designed, itis required to detect the load transient event, then to trigger orshut down the auxiliary switch. This increases the complexity ofthe control circuit. Moreover, oscillations at the output voltageoccur due to the frequent on and off operations at each transientevent. On the other hand, high-frequency switching converteror linear power supply in parallel with low-frequency converterproposed in [18] and [19] enhances the output voltage response.Paralleling high-frequency converter approach also requires theload transient information, while linear power supply methodsuffers from low efficiency. Moreover, the parallel structurebrings about the circulating current problem. Additional currentsharing control is needed to overcome this problem.

0278-0046/$25.00 © 2009 IEEE

Authorized licensed use limited to: Sreenidhi Institute of Science & Technology. Downloaded on November 16, 2009 at 00:28 from IEEE Xplore. Restrictions apply.

DU et al.: DOUBLE-FREQUENCY BUCK CONVERTER 1691

Fig. 1. Schematic of buck converter.

Fig. 2. Average model of buck converter with the added CCS.

This paper proposes a novel converter topology to achievehigh dynamic response and high efficiency of buck-type con-verters. This topology consists of a high-frequency buck celland a low-frequency buck cell; and we call it the “double-frequency buck converter” (DF buck). The current flowingthrough the high-frequency cell is diverted by the low-frequency one, which also processes the majority of theconverter power. This current decreases rapidly so that the high-frequency cell can work at very high frequency to improvethe dynamic response. Furthermore, the efficiency is enhanceddue to the low-current processing requirement of the high-frequency cell in the DF buck converter. Unlike the parallelstructure, the proposed converter does not incur the circulatingcurrent problem [11], [12]. Moreover, it is not required to detectthe load transient event for control. The circuit configurationand control strategy will be described in detail. The frequency-domain and time-domain analyses are given to show that theproposed topology has the same transient and steady stateperformance with the single high-frequency buck converter.

II. PROPOSED DF BUCK CONVERTER

The topology of a conventional buck converter is shown inFig. 1. In the steady state, the input (Uin) and the output (Uo)of the converter are governed by

Uo = D · Uin (1)

where D is the duty ratio. If the buck converter works in thecontinuous conduction mode, then the inductor current iL canbe regarded as a current source. In each switching cycle, boththe current flowing through the switch and the voltage acrossthe diode are averaged. The average model of buck converter isshown in Fig. 2, excluding the added controlled current source(CCS) ILa, and its governing equations are

IS =D · IL (2)

UD =D · Uin (3)

ID = (1 − D) · IL. (4)

Fig. 3. Schematic of the proposed DF buck converter.

To enhance the steady-state response and the transient re-sponse of the buck converter, the switching frequency shouldbe increased; but higher switching frequency steps up theswitching loss dramatically. An CCS, which is in parallel withthe load terminal, is added to tackle this loss problem. Fig. 2shows such modification. The load current through the activeswitch is diverted by the CCS. The currents through the activeswitch and the diode can be expressed as

I ′S =D · (IL − ILa) (5)

I ′D = (1 − D) · (IL − ILa). (6)

It can be seen from (5) and (6) that when the load currentand the CCS are the same, both the currents through the activeswitch and the diode are nearly zero.

In this paper, we propose to use a buck cell working atlower frequency to realize the CCS. The proposed converter iscalled the DF buck converter, because these buck cells work attwo different frequencies. Schematic of this DF buck converteris shown in Fig. 3. The cell containing L, S, and SD worksat higher frequency, and is called the high-frequency buckcell. Another cell containing La, Sa, and Da works at lowerfrequency, and is called the low-frequency buck cell. The high-frequency buck cell is used to enhance the output performance,and the low-frequency buck cell to improve the converterefficiency. An active switch, instead of a diode as in the con-ventional unidirectional buck converter, is employed to realizeSD in the high-frequency buck cell. This active switch transfersthe energy stored in the low-frequency cell to the source duringthe transient stage of load step-down. It works complementarilywith high-frequency cell switch S, and improves the transientresponse.

The switch S is controlled to operate at the high frequencyfh, and the corresponding switching period is Tsh. On the otherhand, the switch Sa is controlled to work at a low frequency fl,and the corresponding switching period is Tsl. Assume that thehigh frequency is an integer multiples of the low frequency, i.e.,

fh = Mfl. (7)

At each low-frequency cycle, four switching states exist.Table I lists the switching states according to the status ofswitches S and Sa.

The state a denotes that both switches S and Sa are on. Theequivalent circuit is shown in Fig. 4(a). In a similar manner,the equivalent circuits of states b, c, and d are shown inFig. 4(b)–(d), respectively.



TABLE ISWITCHING STATES

Fig. 4. Equivalent circuits of DF buck converter in different switching states.(a) State a. (b) State b. (c) State c. (d) State d.

The governing equations of state a are expressed as

uL = Uin − Uo (8)diLdt

=uL

La=

Uin − Uo

La(9)

uLa = 0 (10)diLa

dt=

uLa

La= 0. (11)

In this state, the voltage uL across the inductor L is positive,and the voltage uLa across La is zero. Hence, the current iL

flowing through L rises, and the current iLa flowing through La

does not change.The governing equations of state b can be described by

uL = −Uo (12)diLdt

=uL

L=

−Uo

L(13)

uLa =Uin (14)diLa

dt=

uLa

La=

Uin

La. (15)

At this state, the voltage uL across L is negative, so the currentiL decreases. The voltage uLa across La is positive, and thecurrent iLa flowing through La rises.

In state c, the equivalent circuit equations are derived as

uL =Uin − Uo (16)diLdt

=uL

L=

Uin − Uo

L(17)

uLa = −Uin (18)diLa

dt=

uLa

La= −Uin

La. (19)

The voltage uL across L is positive, so the current iL rises.Since the voltage uLa across La is negative, the current iLa

through La decreases.Finally, the equations of state d are

uL = −Uo (20)diLdt

=uL

L=

−Uo

L(21)

uLa = 0 (22)diLa

dt=

uLa

La= 0. (23)

The voltage uL across L is negative, so the current iL flowingthrough L decreases. The voltage uLa across La is zero, and thecurrent iLa flowing through La remains the same.

From equivalent circuits, we find that the low-frequency buckcell does not affect the output inductor voltage, which has thesame waveform and value as that of the conventional buckconverter. That is, the voltage across the output inductor isUin − Uo when the switch is on, and is −Uo when the switch isoff. The voltage and current waveforms of DF buck in one low-frequency cycle Tsl are shown in Fig. 5, where M = 4. In theconduction mode of low-frequency switch, the voltage acrossthe low-frequency inductor La alternates between zero and Uin.Thus, the equivalent slope of the current iLa is positive. At theswitch-off interval, uLa varies from zero to −Uin, the equivalentslope of iLa becomes negative. As a result, if we employ propercontrol method, the low-frequency inductor can be controlledto follow the output inductor current.

III. PERFORMANCE EVALUATION

The current programmed mode (CPM) control circuit usedto control the proposed DF buck converter is shown in Fig. 6.In the control diagram, the output voltage is fed back andcompared with Uref . The quantity Rf · ic is used as the currentreference for the buck cells. The currents flowing throughinductors L and La are expected to be equal to this reference



Fig. 5. Voltage and current waveforms in one switching period Tsl.

Fig. 6. CPM control diagram.

value in the steady state. The low-frequency buck cell divertsthe current flowing through high-frequency switches S and SD.This control circuit, like standard current mode control, doesnot need additional load transient information, which is not thecase in other methods [16], [17].

Since no specific control circuit is required, complexity of thecontrol circuitry of the DF buck converter is similar to that ofthe conventional buck converter. The implementation is simpleand can be done by commercial CPM chips.

Fig. 7. Output voltage waveform comparison in the steady state.

A. Steady-State Performance

Performance of the DF buck converter is evaluated by look-ing at the steady-state and transient responses of three circuits:a DF buck, a single high-frequency buck converter whoseswitching frequency is the same as the higher frequency ofDF buck, and a single low-frequency buck converter whoseswitching frequency is equal to the lower frequency of DF buck.Parameters used in the simulation are

uin = 48 V, Uo = 10 V, C = 470 μFDF buck : L = 100 μH, La = 1 mH, fl = 10 kHz

fh = 100 kHzhigh-frequency buck : L = 100 μH, f = 100 kHzlow-frequency buck : La = 1 mH, f = 10 kHz.

The output voltage waveforms of various buck converters areshown in Fig. 7. It can be seen that the steady state performanceof DF buck and that of single high-frequency buck converter arealmost the same.

B. Transient Performance Analysis

This section investigates the transient response of the DFbuck converter. If the load resistance is reduced from 2R toR, the load current will increase from 0.5 IR to IR. Since thecurrents through inductor L and La cannot change abruptly, atthis transient instant, the output voltage decreases due to theincreased load current that is partially supplied by the outputcapacitor. The feedback control loop regulates the duty ratioof each buck cell to control the current of inductor L, iL, andthe current of La, iLa. It increases the duty ratio of the high-frequency switch so that iL rises. Then, iLa rises too. Note thatthe low-frequency inductance is selected to be larger than thehigh-frequency one to reduce the current ripple of iLa. If theinductor has larger inductance, the current flowing through itwill have lower dynamic response speed with the same voltageexcitation. As shown in Fig. 5, when low-frequency switch ison, the average voltage applied to low-frequency inductor is1 − d times the input voltage Uin. This is the same as thevoltage across the high-frequency inductor, Uin − Uo, whenhigh-frequency switch is on. On the other hand, when thelow-frequency switch is off, the average voltage across low-frequency inductor is −d times Uin. This average voltage is



Fig. 8. Output voltage transient response comparison. (a) Load step-up.(b) Load step-down.

also the same as that across the high-frequency inductor whenhigh-frequency switch is off. Hence, iLa rises slower thaniL. Moreover, the current through the high-frequency switchincreases momentarily, but soon back to the steady state leveldue to the current feedback loop.

If the load resistance is increased from R to 2R, then the loadcurrent will decrease from IR to 0.5 IR, so is the low-frequencyinductor current iLa. At this moment, iLa can freewheel throughSD when the switch S is off. When S is on, the energy stored inLa can be fed back to the source via the switch S. As a result,the impact to output response by the low-frequency inductor islargely alleviated. Fig. 8 shows the output voltage waveforms of

Fig. 9. Switch current waveforms.

three different buck converters when the load changes. Fig. 8(a)is for the load change from 2 to 4 Ω, and Fig. 8(b) is for the loadchange from 4 to 2 Ω. It is observed that the DF buck and thesingle high-frequency buck converters exhibit almost the sametransient responses during load changing, and much better thanthe single low-frequency buck converter does. The effect ofswitch current diversion of the high-frequency cell and the low-frequency cell is also investigated. The current waveforms areshown in Fig. 9. The waveform with large magnitude denotesthe current flowing through the low-frequency switch isa, andthe small magnitude is the current of the high-frequency switchis. The load is changed from 4 to 2 Ω at the 12-ms timeinstant. A major portion of the increased load current (shownin Fig. 9) is diverted to the low-frequency buck cell, while thecurrent through the high-frequency switch remains the same.The current diversion enables the reduction of switching loss inhigh-frequency buck cell and improves the efficiency.

C. Efficiency Analysis

In order to analyze the efficiency improvement of the pro-posed DF buck converter, the efficiency expression is analyzedin the section. The analysis is also applied to the single high-frequency buck and low-frequency buck converters. Variousloss estimation methods have been proposed in the literaturebased on different assumptions [20]–[23]. A simple loss modelis adopted here [23] in that we just want to show the efficiencyrelationship between the DF buck and single high-frequencybuck, not to develop a new loss model.

In the analysis, we have the following assumptions.

1) The conduction losses of active switch and diode areestimated, respectively, according to their conductionvoltages Uon and UF.

2) The switching transient processes are assumed to satisfythe linear current and voltage waveforms. Moreover, theturn-on time ton is the same for all switches and diodes,so is the turn-off time toff .

3) Since the switching loss usually dominates the total loss,losses of the output capacitor and output inductor are notcalculated here.



In a single-frequency buck converter, the total loss PSF

comes from four parts, the conduction loss Pscon and switchingloss Pss of the active switch S, and the conduction loss Pdcon

and switching loss Psd of the diode. When the input voltage isUin, duty ratio is D, the inductor average current is IL, and theswitching frequency is fs, the losses can be estimated accordingto the following equations [23]:

Pscon =D · UonIL (24a)Pdcon = (1 − D) · UFIL (24b)

Pss =12fs · UinIL(ton + toff) (24c)

Psd =12fs · UinIL(ton + toff). (24d)

For single-frequency buck converter, the conduction lossesare the same; the difference is on the switching frequencies fh

and fl. For DF buck, the losses consist of two portions: high-frequency cell losses and low-frequency cell losses. The currentchopped by the high-frequency cell is the difference betweenhigh-frequency inductor current iL and low-frequency inductorcurrent iLa. This difference is roughly equal to 0.5 ILapk, whereILapk is the peak–peak low-frequency inductor current ripple,because the inductor current ripple of the high-frequency cell issmall compared with that of the low-frequency cell. Moreover,the average current in low-frequency inductor is IL − 0.5 ILapk

with the peak current control. The loss break down can beexpressed as follows:

The losses in the high-frequency cell are

PsconH = 0.5D · UonILapk (25a)PdconH = 0.5(1 − D) · UFILapk (25b)

PssH =14fh · UinILapk(ton + toff) (25c)

PsdH =14fh · UinILapk(ton + toff). (25d)

The losses in the low-frequency cell include

PsconL =D · Uon(IL − 0.5ILapk) (26a)PdconL = (1 − D) · UF(IL − 0.5ILapk) (26b)

PssL =12fl · Uin(IL − 0.5ILapk)(ton + toff) (26c)

PsdL =12fl · Uin(IL − 0.5ILapk)(ton + toff). (26d)

Then, from (24)–(26), the total conduction loss PconDF inthe DF buck is approximately the same as that in the single-frequency buck converter

PconDF ≈ Pscon + Pdcon. (27)

In the case the low-frequency inductor current is small withreference to the inductor average current, the total switchingloss PsDF can be approximated as

PsDF ≈ fl · UinIL(ton + toff). (28)

It follows from (25)–(28) that the total conduction loss ofDF buck converter is the same as the single-frequency buckconductor. This result also can be reasoned from the fact thatthe total currents flowing through the DF buck switches and

diodes are the same as that through a single-frequency buck. Onthe other hand, the total switching loss is nearly the same as thesingle low-frequency buck, and is much smaller than that of thesingle high-frequency buck. Hence, the DF buck converter im-proves the efficiency by current diversion to the low-frequencycell. Although assumptions and approximations are made in theaforementioned analysis, it reveals the efficiency mechanism ofthe DF buck converter.

IV. MODELING OF DF BUCK CONVERTER

In this section, the ac small-signal model of the DF buckconverter is presented. The conventional buck converter, whichoperates at only one switching frequency, is also given forcomparison. Moreover, we show that the operation of the high-frequency buck cell is decoupled from the low-frequency cell.

The state equations of the high-frequency cell are obtainedusing the averaging method as in [24]

Ld 〈iL(t)〉Tsh

dt= d(t) 〈uin(t)〉Tsh

− 〈uo(t)〉Tsh(29)

Cd 〈uo(t)〉Tsh

dt= 〈iL(t)〉Tsh

−〈uo(t)〉Tsh

R. (30)

The symbol 〈x(t)〉TS means that the state variable x(t) isaveraged over the corresponding switching period. The stateequation of the low-frequency cell is expressed as

Lad〈iLa〉Tsl

dt= da(t)〈uin〉Tsh − d(t)〈uin〉Tsh (31)

where d(t) and da(t) are the time-varying duty ratios of thehigh-frequency switch and the low-frequency switch, respec-tively. Suppose that the DF buck is perturbed at the steady statepoints, and the symbol “x” denotes the perturbed part of thevariable x. Then, we have

〈uin(t)〉Tsh= Uin + uin(t) (32)

〈uo(t)〉Tsh= Uo + uo(t) (33)

〈iL(t)〉Tsh= IL + iL(t) (34)

〈iLa(t)〉Tsl= ILa + iLa(t) (35)

d(t) = D + d(t) (36)

da(t) = Da + da(t). (37)

Substituting (32)–(37) into (29)–(31) and some algebra yields

LdiL(t)

dt=Duin + d(t)Uin − uo (38)

Cduo(t)

dt= iL − uo

R(39)

LadiLa(t)

dt= (Da − D)uin + Uin(da − d). (40)

Taking the Laplace transform, we have

LsiL(s) = Duin(s) + Uind(s) − uo(s) (41)

sCuo(s) = iL(s) − uo(s)R

(42)

LasiLa(s) = (Da − D)uin(s) + Uin

(da(s) − d(s)

). (43)



In the steady state, Da = D. After algebraic manipulation,we obtain (44), which is the same as that derived from theconventional single-frequency buck converter [24]

uo(s)=RDuin(s)

s2LCR + Ls + R+

RUind(s)s2LCR + Ls + R

(44)

iLa(s)=Uin

(da(s) − d(s)

)

Las. (45)

It can be seen from (44) that the output voltage only de-pends on the high-frequency buck cell parameters, and isindependent of the low-frequency buck cell parameters. Thismay be considered as the decoupling property of the DFbuck converter. On the other hand, it has been shown inSection II that the low-frequency buck cell is mainly used todivert the current flowing through the high-frequency switch.As shown in (45), the low-frequency inductor current is pro-portional to the difference of low-frequency duty ratio andhigh-frequency duty ratio. Therefore, we can control the high-frequency duty ratio d to regulate output voltage and, at thesame time, manage low-frequency duty ratio da to realize thecurrent diversion.

The small-signal model developed here by the switch aver-aging method provides sufficient information for performanceevaluation of the proposed DF buck converter. Other modelingmethods, such as the energy factor modeling method [25],[26] and the flow graph approach [27], also can be exploitedto derive different models for the investigation of converterperformance.

V. EXPERIMENTAL RESULTS

Extensive experiments were conducted to show the effective-ness of the proposed DF buck converter. Three types of buckconverters, which are DF buck, high-frequency buck, and low-frequency buck, are considered. Experiment parameters are thesame as those in Section III-A. Two commercially availablechips (UC3842) were used to control the high-frequency andlow-frequency switches in the DF buck converter. The inputand output pins of the voltage error amplifier of each chipwere paralleled together to ensure that the current referenceof the low-frequency inductor is equal to that of the high-frequency inductor. All the active switches were implementedwith MOSFET.

The output voltage ripples of these converters are shownin Fig. 10. Since the test condition was in ac coupling, themeasured waveforms only contain the ripple component. It isobserved that the high-frequency buck and the DF buck con-verters exhibit comparable output voltage ripple in magnitudeas shown in simulation results and nearly the same steadystate performance. Fig. 11 shows the dynamics when the loadresistance R is reduced from 4 to 2 Ω, the test results for Rstepping up from 2 to 4 Ω also exhibit the same performance asFig. 11 and is omitted here for limited space. It can be seen fromthe experimental results that the proposed DF buck converterdemonstrates almost the same dynamics as the single high-

Fig. 10. Output voltage ripples. (a) Low-frequency converter. (b) High-frequency converter. (c) DF converter.

frequency buck, and performs better than the low-frequencybuck in terms of response time and overshooting.

The current diversion effect in the prototype is shown inFig. 12, which shows the currents through the high-frequencyswitch S and low-frequency switch Sa, which also shows thatthe high-frequency switch current is much smaller than the low-frequency switch current.

Efficiency comparison among three converters is shown inFig. 13. The efficiency was calculated from the input power andthe output power. Output power was varied from 10 to 50 W. Weobserve that the efficiency of DF buck is very close to that of



Fig. 11. Transient responses of output voltage when the load resistance ischanged from 4 to 2 Ω. (a) Low-frequency buck converter. (b) High-frequencybuck converter. (c) DF buck converter.

the low-frequency buck converter, and both produce efficiencyhigher than the high-frequency one. This means that DF buckcan reach the dynamics of a high-frequency buck converter, andthe efficiency is also improved at the same time. Thus, the pro-posed DF buck converter can be applied in high-performancehigh-efficiency application field of power converters.

Fig. 12. Currents through active switches in the DF buck converter.(Upper) High frequency. (Lower) Low frequency.

Fig. 13. Efficiency comparison.

Fig. 14. DF switch-inductor three-terminal network.

VI. EXTENSION TO DF DC–DC CONVERTERS

The basic dc–dc converters such as buck, boost, and buck–boost can be deduced from a switch-inductor three terminalnetwork [24]. Thus, we can extend the DF topology to the DFswitch-inductor three-terminal network as shown in Fig. 14.

In this structure, S1, S2, and L works at higher frequencies,and S1a, S2a, and La works at lower frequencies. The currentflowing through La is controlled to track the current flowingthrough L so that the currents flowing through S1 and S2 can bediverted as desired. Moreover, the current flowing through L isonly determined by the switching states of switches S1 and S2.Thus, S1 and S2 can work at much higher frequency to improvethe dynamics of the high-frequency inductor. This enables us toapply the DF switch-inductor three-terminal network straight-forwardly to construct the DF dc–dc converters such as buck,boost, and buck–boost converters.



VII. CONCLUSION

This paper has presented a novel topology of DF buck con-verter. Analytical and experimental results have demonstratedthat the DF buck not only exhibits the same steady stateand transient performance but also improves the efficiency ofconventional buck converters. The proposed converter does notneed the load transient change information for accurate currentcontrol and does not have the current circulating problem.Extension to double-frequency switch-inductor three-terminalnetwork has also been described. Future work will investigatewhether the proposed buck converter is applicable for highcurrent or high dynamics specifications.

REFERENCES

[1] X. Zhou, P.-L. Wong, P. Xu, F. C. Lee, and A. Q. Huang, “Investigationof candidate VRM topologies for future microprocessors,” IEEE Trans.Power Electron., vol. 15, no. 6, pp. 1172–1182, Nov. 2000.

[2] U. Borup, F. Blaabjerg, and P. Enjeti, “Sharing of nonlinear loadin parallel-connected three-phase converters,” IEEE Trans. Ind. Appl.,vol. 37, no. 6, pp. 1817–1823, Nov./Dec. 2001.

[3] H. Mao, F. C. Lee, D. Boroyevich, and S. Hiti, “Review of high-performance three-phase power-factor correction circuit,” IEEE Trans.Ind. Appl., vol. 44, no. 4, pp. 437–446, Aug. 1997.

[4] H. Pollock and J. O. Flower, “New method of power control forseries–parallel load-resonant converters maintaining zero-current switch-ing and unity power factor operation,” IEEE Trans. Power Electron.,vol. 12, no. 1, pp. 103–115, Jan. 1997.

[5] W. Chen and X. Ruan, “Zero-voltage-switching PWM hybrid full-bridgethree-level converter with secondary-voltage clamping scheme,” IEEETrans. Ind. Electron., vol. 55, no. 2, pp. 644–654, Feb. 2008.

[6] C. M. Wang, “New family of zero-current-switching PWM convertersusing a new zero-current-switching PWM auxiliary circuit,” IEEE Trans.Ind. Electron., vol. 53, no. 3, pp. 768–777, Jun. 2006.

[7] S. K. Mazumder, A. H. Nayfeh, and D. Boroyevich, “A novel approach tothe control of parallel three-phase boost converters that combines space-vector modulation with variable-structure control,” in Proc. IEEE APEC,2002, pp. 1031–1037.

[8] Z. Ye, D. Boroyevich, J. Y. Choi, and F. C. Lee, “Control of circulatingcurrent in two parallel three-phase boost rectifiers,” IEEE Trans. PowerElectron., vol. 17, no. 5, pp. 609–615, Sep. 2002.

[9] L. Asiminoaei, E. Aeloiza, P. Enjeti, and F. Blaabjerg, “Shunt active-power-filter topology based on parallel interleaved inverters,” IEEE Trans.Ind. Electron., vol. 55, no. 3, pp. 1175–1189, Mar. 2008.

[10] S. K. Mazumder, M. Tahir, and K. Acharya, “Master–slave current-sharing control of a parallel dc–dc converter system over an RF commu-nication interface,” IEEE Trans. Ind. Electron., vol. 55, no. 1, pp. 59–66,Jan. 2008.

[11] C.-T. Pan and Y.-H. Liao, “Modeling and coordinate control of circu-lating currents in parallel three-phase boost rectifiers,” IEEE Trans. Ind.Electron., vol. 54, no. 2, pp. 825–838, Apr. 2007.

[12] Z. Ye, P. K. Jain, and P. C. Sen, “Circulating current minimization inhigh-frequency AC power distribution architecture with multiple invertermodules operated in parallel,” IEEE Trans. Ind. Electron., vol. 54, no. 5,pp. 2673–2687, Oct. 2007.

[13] G. C. Hua, C.-S. Leu, Y. Jiang, and F. C. Lee, “Novel zero-voltage-transition PWM converters,” IEEE Trans. Power Electron., vol. 9, no. 2,pp. 213–219, Mar. 1994.

[14] T. Yoshida, O. Shiizuka, O. Miyashita, and K. Ohniwa, “An improvementtechnique for the efficiency of high-frequency switch-mode rectifiers,”IEEE Trans. Power Electron., vol. 15, no. 6, pp. 1118–1123, Nov. 2000.

[15] H. Y. Kanaan, A. Marquis, and K. Al-Haddad, “Small-signal modelingand linear control of a dual boost power factor correction circuit,” in Proc.IEEE PESC, 2004, pp. 3127–3133.

[16] F. Zhang, J. Zhang, D. Xu, and Z. Qian, “A novel high performancevoltage regulator module,” in Proc. IEEE APEC, 2001, pp. 258–261.

[17] N. K. Poon, C. P. Liu, and M. H. Poon, “A low cost dc–dc stepping in-ductance voltage regulator with fast transient loading response,” in Proc.IEEE APEC, 2001, pp. 268–272.

[18] A. Barrado, R. Vazquez, A. Lazaro, J. Pleite, J. Vazquez, and E. Olias,“New dc/dc converter with low output voltage and fast transient re-sponse,” in Proc. IEEE APEC, 2003, pp. 432–437.

[19] A. Barrado, R. Vazquez, E. Olias, A. Lazaro, and J. Pleite, “Theoreti-cal study and implementation of a fast transient response hybrid powersupply,” IEEE Trans. Power Electron., vol. 19, no. 4, pp. 1003–1009,Jul. 2004.

[20] Z. Pan, F. Zhang, and F. Peng, “Power losses and efficiency analysis ofmultilevel dc–dc converters,” in Proc. IEEE APEC, 2005, pp. 1393–1398.

[21] S. Saggini, W. Stefanutti, P. Mattavelli, and A. Carrera, “Efficiency es-timation in digitally-controlled dc–dc buck converters based on singlecurrent sensing,” in Proc. IEEE PESC, 2008, pp. 3581–3586.

[22] Y. Suh, J. K. Steinke, and P. K. Steimer, “Efficiency comparison ofvoltage-source and current-source drive systems for medium-voltage ap-plications,” IEEE Trans. Ind. Electron., vol. 54, no. 5, pp. 2521–2531,Oct. 2007.

[23] N. Mohan, T. M. Undeland, and W. P. Robbins, Power Electronics:Converters, Applications, and Design, 3rd ed. New York: Wiley, 2003.

[24] R. W. Erickson, Fundamentals of Power Electronics, 2nd ed. Secaucus,NJ: Kluwer, 2000.

[25] F. L. Luo and H. Ye, “Small signal analysis of energy factor and math-ematical modeling for power dc/dc converters,” IEEE Trans. PowerElectron., vol. 22, no. 1, pp. 69–79, Jan. 2007.

[26] F. L. Luo and H. Ye, “Energy factor and mathematical modeling for powerdc/dc converters,” Proc. Inst. Elect. Eng.—Elect. Power Appl., vol. 152,no. 2, pp. 191–198, Mar. 2005.

[27] M. Veerachary, “Analysis of fourth-order dc–dc converters: A flow graphapproach,” IEEE Trans. Ind. Electron., vol. 55, no. 1, pp. 133–141,Jan. 2008.

Xiong Du received the B.S., M.S., and Ph.D. degreesin electrical engineering from Chongqing Univer-sity, Chongqing, China in 2000, 2002, and 2005,respectively.

Since 2002, he has been with the College of Elec-trical Engineering, Chongqing University, where heis currently an Associate Professor. He was a VisitingScholar with Rensselaer Polytechnic Institute, Troy,NY, from July 2007 to July 2008. His research inter-ests include switching power converters, power qual-ity control, and renewable energy power conversion.

Dr. Du was a recipient of the National Excellent Doctoral Dissertation ofChina Award in 2008.

Luowei Zhou (M’04–SM’04) received the B.S.,M.S., and Ph.D. degrees in electrical engineeringfrom Chongqing University, Chongqing, China, in1982, 1988, and 2000, respectively.

Since 1982, he has been with the College ofElectrical Engineering, Chongqing University, wherehe is currently a Full Professor. He was a Vis-iting Professor with the University of California,Irvine, between September 1998 and August 1999.He is the Administrative Director of the China So-ciety of Power Supply. He has published more than

60 papers, is the holder of one U.S. patent and three China patents, and has threepatents pending. His major fields of interest include the analysis and controlof power electronics circuits, realization of active power filters, power factorcorrection techniques, and high-frequency power conversion.

Heng-Ming Tai (M’87–SM’93) received the B.S.degree in electrical engineering from NationalTsing-Hua University, Hsinchu, Taiwan, and theM.S. and Ph.D. degrees in electrical engineeringfrom Texas Tech University, Lubbock, in 1987.

He is currently a Professor with the Departmentof Electrical Engineering, The University of Tulsa,Tulsa, OK. His research interests are in the ar-eas of signal and image processing and industrialelectronics.

Dr. Tai is a member of Eta Kappa Nu.


double ferquency buck conveter

Documents

Transcript of double ferquency buck conveter