Ultramicroscopy 42-44 (1992) 1309-1316 n l ~ v , ~ r n ~ l ~ . ~ a , r ~ t u n w , North-Holland ~ . , . , M . lq, l , . ~ t , , t O l a y

High-resolution lithography with a vacuum STM

C . R . K . M a r r i a n a n d E . A . D o b i s z

Code 6864, Electronics Science and Technology Division, Nava l Research Laboratory, Washington, D C 20375, USA

Received 12 August 1991

The scanning tunneling microscope (STM) is demonstrated to be a useful low-energy e-beam lithographic tool and a valuable probe of resist materials. Lithography with a vacuum STM and a 10 nm 50 kV e-beam has been performed on identically prepared and processed films of a state-of-the-art high-resolution negative resist (SAL-601 from Shipley). On bulk substrates (Si and GaAs), resist films up to 50 nm thick have been patterned, developed and observed in a scanning electron microscope. A resist thickness of 50 nm is sufficient to withstand a reactive ion etch. On Si, the minimum feature size observed with the 50 kV e-beam was 95 nm. In contrast, the STM lithography defined features observed in the developed resist to have linewidths down to 23 nm. The variation of feature size with exposure dose, exposure voltage and resist thickness has been studied. The STM lithography has shown that SAL-601 is inherently capable of sub 25 nm resolution and that low voltage e-beam lithography can produce smaller minimum feature sizes than lithography with a 10 nm 50 kV e-beam.

I. Introduction

Micro fab r i ca t ion is reach ing to increas ingly smal le r f ea tu re sizes for fu ture gene ra t ions of i n t eg ra t ed circuits. A focused -beam l i thography is an essent ia l tool in a l l -envis ioned fu ture l i tho- g raph ic techniques . T h e b e a m will e i the r be used to c r ea t e l i thograph ic p a t t e r n s d i rec t ly on a chip (d i rec t -wr i te ) or it will be used to def ine the pa t t e rn s for a mask which will be subsequent ly used for l i thography with opt ical , U V or X-ray r ad ia t ion (mask maker) . The p r e f e r r e d focussed- b e a m l i thography is e - b e a m l i thography. The tra- d i t ional a p p r o a c h with e - b e a m p robes is to use h igher b e a m energ ies to achieve a more t ightly focused spot and h igher - reso lu t ion l i thography.

To p a t t e r n a mask or chip, a su i tab le subs t ra te is first covered with a thin layer of a r ad ia t ion- sensi t ive ma te r i a l (resist) . The e - b e a m induces a change in the resist locally to the vo lume in which the p r imary b e a m in te rac ts with the resist. The change in the resis t a l ters its solubili ty, a l lowing the l i t hograph ic p a t t e r n to be deve loped . I f the exposed a reas r ema in af ter deve lopmen t , the re-

sist is t e r m e d a negat ive resist. I f the exposed a r ea is dissolved away, it is t e r m e d a posi t ive resist. F e a t u r e size is l imi ted not only by the focus of the b e a m but by e lec t ron sca t te r ing in the resist and f rom the subst ra te . This leads to proximi ty effects [1] which grea t ly l imit the p ro- cess l a t i tude of the resis t exposure and deve lop- ment . It also l imits the min imum fea tu re size (and hence reso lu t ion) of the l i thograph ic process and the proximi ty with which fea tu res can be p laced . This is a long- recogn ized p r o b l e m which has been the subject of much resea rch over the last twenty years [2].

The conven t iona l s t ra tegy to ove rcome (or at leas t min imize) proximi ty effects is to use h igher e l ec t ron b e a m energies , with 100 kV cur ren t ly be ing p r o p o s e d for the next gene ra t ion of e -beam l i thography tools. H ighe r - e ne rgy e lec t rons pene- t ra te d e e p e r into the subs t ra te and hence the backsca t t e r ed e lec t rons form a more diffuse b a c k g r o u n d " fog" . The s t ra tegy works r easonab ly wel l wi th p o l y m e t h y l m e t h a c r y l a t e ( P M M A ) . However , this a p p r o a c h faces severe l imi ta t ions with h igh -a tomic -numbe r subs t ra tes (e.g. G a A s or

0304-3991/92/$05.00 © 1992 - Elsevier Science Publishers B.V. All rights reserved

1310 C.R.K. Marrian, E.A. Dobisz / High-resolution lithography with a vacuum STM

W for X-ray masks) and other more technologi- cally useful resists. An alternate approach pur- sued at the Naval Research Laboratory [3,4] and elsewhere [5,6] is to use exactly the opposite strategy, namely, to use extremely low-voltage (12-50 V) primary electrons. At this energy, elec- tron scattering is all but eliminated and proximity effects are no longer a problem. To generate a spatially confined low-energy electron beam, a scanning tunneling microscope (STM) operating in the field-emission mode is used.

The advantage of the low-voltage approach is demonstrated with the resist SAL-601, a chemi- cally amplified negative resist. Electron exposure releases an acid catalyst which promotes cross- linking in the resist during a post-exposure bake (PEB). It is of interest because it is a state-of-the- art commercially available high-resolution nega- tive resist. Compared to PMMA, the most widely used high-resolution resist, it is the opposite tone, has a greater e-beam sensitivity, a superior dry etch resistance but, at 50 kV, has an inferior resolution [7]. However, as we show by scanning electron microscope (SEM) images of developed resist patterns, at low voltages SAL-601 has sub 25 nm resolution which is comparable to PMMA.

2. Experimentation

Thin (30-50 nm) films of the negative resist, SAL-601 (commercially available from the Ship- ley Corporation), were spin-coated onto bulk Si and GaAs substrates. The substrates were first cleaned and passivated to ensure conductivity for the STM operation. For the Si, the surface was cleaned with HF diluted with ethanol, reoxidized in H N O 3 and recleaned with the HF [8]. The GaAs was etched for 5 min in 7 : 1 : 1 sulfuric acid:hydrogen peroxide :water, rinsed in water, passivated for 30 min in 0.75 M NaS and rinsed in water [9]. The GaAs was then coated with a thin layer of Si (10 nm) which stabilizes the GaAs surface and acts as an adhesion promoter for SAL-601. Following spin-coating, the samples were baked for 30 min at 75°C. After exposure, the samples underwent a PEB at 107°C for 7 min and were developed for 12 min in MF-622, from

Shipley [10]. All samples were processed in this manner.

The STM lithography was performed with a W.A. Technology STM head mounted in a stain- less-steel vacuum chamber evacuated to below 10 7 Torr (i.e. it was not baked). With a turbo- molecular pump, this pressure was reached within 15 min of introducing a sample into the chamber backfilled with dry N 2. The STM control system and software were developed "in house" along conventional lines. The software contains rou- tines for the generation of single-pass line grat- ings and arrays of single pixel exposures. All lithography was performed with the DC etched W tip biased negatively with respect to the sam- ple. T ip - sample currents in the range 10 pA to 1 nA were possible with the Si samples. With the GaAs, the maximum current was restricted to 100 pA to avoid the surface damage observed at 1 nA. The STM tip was moved laterally at 500 n m / s which allowed reliable operation with t ip - sample voltages from - 1 2 to - 5 0 V. After de- velopment the samples were coated with about 10 nm of Au and examined in a SEM. Linewidth measurements were taken directly from the SEM micrographs.

Comparison is made to resist films exposed with a focused 50 kV 10 nm e-beam in a commer- cial e-beam lithography system (JEOL JBX-5DII). The resist films and substrates were identically prepared and processed for both the low- (STM) and high- (JEOL) voltage lithography.

3. Results

Developed resist features have been observed in SEM images after lithography at t ip -sample voltages down to - 1 2 V [11]. More successful results have been obtained at higher voltages. Fig. 1 shows a series of gratings written on GaAs at voltages between - 1 5 and - 3 5 V at a line dose of 200 n C / c m . The lines are continuous and straight, indicating the developed resist is ad- hered to the substrate. The edge acuity is good and certainly comparable to published results showing SEM images of similar feature sizes in resist. An estimate of the edge roughness can be

C.R.K. Marrian, E.A. Dobisz / High-resolution lithography with a t,acuum STM 1311

made from the linewidth variation. This is charac- terized by a standard deviation of about 8% of the average width. The minimum line width is close to 36 nm (for the - 15 V lines).

We have observed smaller linewidths in a thin- ner film of SAL-601 (30 nm) on p-type Si, fig. 2. Here a series of gratings written at - 1 5 , - 2 5 and - 3 5 V is shown. The smallest feature sizes

(23 nm) were again produced at the lowest writ- ing voltage. Results from different resist thick- ness exposures are summarized in fig. 3, where the developed resist feature size is plotted as a function of the STM lithography voltage. All the exposures were performed at a line dose of 200 n C / c m , corresponding to a t ip -sample current of 10 pA. An increase in linewidth with writing

i • " • :~ -~2 ..... J

Fig. 1. S E M images of l ines in 50 nm of resist wr i t t en wi th the STM at a dose of 200 n C / c m on GaAs . Wr i t i ng vol tagesJwere - 15 and - 20 V ( top pai r of images) , - 25 and - 35 V (bo t tom pair).

1312 C.R.K. Marrian, E.A. Dobisz /High-resolution lithography with a t,acuum STM

J v~

~ tb ,~

Fig. 2. Lines wr i t t en in 30 nm of resist on Si wi th a l ine dose of 2 ~ C / c m . Wr i t ing vol tages were - 15, - 25 and - 35 V (from left

to right).

voltage can be understood as a result of the STM operating in the constant-current model (as dis- cussed below). There is also an indication that the feature size increases with resist thickness. Successful lithography has been achieved on Si with t ip -sample voltages between - 1 2 and - 5 0 V and currents between 10 pA and 1 nA. 10 pA was the lowest current at which reliable operation of the STM was possible.

With GaAs, only a restricted range of opera- tion was possible. The GaAs surface can be dam-

120

1 0 0

80

60

[~ 40

20

0 0

[] GaAs, 50nm resist Si, 50nm

o Si, 30nm

[ ] 0 z~

[] 8 A

DD 0

0 A 0

1'0 2o 3'0 4'0 5'0 TIP-SAMPLE BIAS, -V

60

Fig. 3. Deve loped resist l inewidth as a funct ion of wri t ing vol tage for pa t t e rns wr i t ten wi th a line dose of 200 n C / c m .

aged if too great a t ip -sample voltage or current is used. Shallow "craters" about 1 /zm across were visible in the SEM images. Some images suggest flow in the substrate surface, indicating that it is the GaAs as opposed to the presence of the resist which is responsible. Interestingly, the resolution of the lithography was not significantly affected by the crater formation. SEM images show features being written both before and after a crater had been formed. The most successful solution we have found is to use the thin Si layer described above. This stabilizes the GaAs surface and also improves the adhesion of the SAL-601 to the GaAs. As a result, lithography at t ip -sam- ple voltages up to - 3 5 V and currents up to 100 pA has been possible.

In the field-emission mode of the STM, a narrower beam profile would be expected with a tip current of 10 pA than 100 pA. For a given t ip -sample voltage, the STM control system re- tracts the tip from the sample to decrease the t ip -sample current by reducing the electric field at the tip. Thus the potential barrier at the tip widens when the t ip -sample current is reduced. The increased width of the barrier would be expected to narrow the beam profile of the emit- ted electrons, simply from geometrical conditions [12]. If this is the case, a smaller feature size at a given t ip -sample voltage and resist dose would be expected if one operated at a lower t ip -sam-

C.R.K. Marrian, E.A. Dobisz / High-resolution lithography with a L'acuum STM 1313

ple current and moved the tip laterally at a slower speed to maintain the resist dose. However, this effect has not been observed on the length scales of the lithographic work. Shown in fig. 4 are the results of lithography at - 2 0 (top row) and - 2 5 V (bottom row) on GaAs. The writing currents and line doses were (from left to right), 10 pA and 200 n C / c m , 10 pA and 2 / zC / cm and 100 pA and 2 /zC/cm. For the 2 / zC / cm exposures there is no significant difference between the feature sizes written at 10 and 100 pA. However,

the linewidths at 200 n C / c m are smaller than those written at 2 / zC/cm. Thus, the effects of resist overexposure are clearly greater than any reduction in beam profile caused by lowering the tip current.

The developed resist feature size increase with the dose applied to the resist is summarized in fig. 5. A negative resist will remain following development where the exposure exceeds the threshold dose. As a result of electron scattering within the resist or simply the profile of the

Fig. 4. SEM images of lines written on GaAs at -20 V (top row)-and -25 V (bottom row). The writing currents and line doses were (from left to right), 10 pA and 200 nC/cm, 10 pA and 2/zC/cm and 100 pA and 2/zC/cm.

1314 C.R.K. Marrian, E.A. Dobisz /High-resolution lithography with a t,acuum STM

1°° t

60-

40-

20-

0 0.1

A

o o

D GaAs 5 0 n m r e s i s t Si, 5 0 n m

o Si, 3 0 n m

1'0 LINE DOSE, ~ C / c m

Fig. 5. Developed resist linewidth as a function of line dose for patterns written at - 25 V.

electron beam striking the resist, the threshold exposure dose is exceeded over a wider region as the exposure increases. However, the variation of

feature size with dose (about 25% per order of magnitude increase in line dose) is significantly less than observed at 50 kV for SAL-601 [4], a cross-linking methacrylate copolymer [13] and an- other high-resolution negative resist, P4BCMU [14]. As such it is a desirable feature of a litho- graphic technique, namely a wide process lati- tude.

An interesting application of our STM lithog- raphy has been the measurement of the non-lin- ear performance of our custom-built piezo scan- ners. Fig. 6 shows the developed pat tern written when the resist was exposed with a raster scan used for STM imaging. (These patterns are used for markers in the lithographic experiments.) The x-direction scans are nominally equally spaced and are traversed in both directions. The curva- ture during the y-displacements shows the effect of creep and hysteresis. This type of image was a significant help in understanding some wide-range scans of surface topography!

Fig. 6. SEM image of resist pattern written with a raster scan used for STM imaging. Note the non-linearity, creep and hysteresis of the piezo scanners.

C.R.IC Marrian, E.A. Dobisz / High-resolution lithography with a vacuum STM 1315

4. Discussion

The mechanism by which the electrons can traverse the resist films is not clear. SAL-601 is non-conductive as indeed is PMMA for which low-voltage lithography with an STM has also been reported [5,6]. However, the results of the lithography show that the current must indeed pass through the resist film and expose the resist. It should be noted that examples of STM images of other non-conducting materials have been re- ported and models proposed [15,16]. None of these models would appear to be applicable to such a thick layer of non-conducting material. During lithography or imaging of the resist films, the STM operates, particularly with a clean Si substrate, reliably and reproducibly. We have re- ported in situ modification and STM imaging of negative resists [17] with resolution on the nanometer scale. In contrast, STM operation is completely different when a thin ( < 5 nm) layer of native oxide is present on Si. Telegraph noise and tip instability prevent any imaging with the quality of the resist STM images. This suggests that the resists studied behave very differently from an insulator such as a Si native oxide. Exist- ing electron scattering and transport models do not approach the energy regime ( < 50 eV) rele- vant here. Indeed, we have pointed out that these models cannot even explain the behavior of SAL- 601 during exposure at 50 kV [4]. The field ap- plied between the STM tip and sample substrate is high and may be sufficient to induce conduc- tion through the resist. If this is the case it would indicate that a suitable modification to the resist would allow lithography at voltages lower than reported here.

Our results with GaAs have been consistently slightly less successful than with Si. Problems with sta.bility of the GaAs surface and techniques to overcome them have been described. Feature sizes have also been greater on GaAs than on Si. It is possible that there is some backscattering from the substrate, although that must be consid- ered as unlikely at the energy ranges considered here. We have observed a strong dependency on STM lithography on surface roughness. Cleaned Si wafers are typically smoother (0.2 nm rms over

100 nm 2 [18]), than GaAs surfaces, although it is difficult to quantify the effect of substrate rough- ness on resist feature size.

The results presented here show that SAL-601 is capable of sub 25 nm resolution. Our results are close to the 22 nm minimum feature sizes reported with STM lithography in PMMA [6]. In SAL-601, the STM lithography feature sizes are significantly smaller than the minimum feature sizes defined by the 50 kV 10 nm e-beam. On a bulk Si substrate, 95 nm was the minimum fea- ture size observed in resist films prepared and processed identically to those used for the STM lithography. This value are over a factor of 5 greater than that predicted by existing Monte Carlo electron scattering models. Hitherto, it had been assumed that either the resist itself, the resist PEB or development [19] was responsible for limiting the resist resolution. The low-voltage lithography achieved a resolution better by a fac- tor of 3.5 on Si. It has demonstrated that the resist SAL-601 is inherently capable of better resolution than observed at 50 kV. Thus it is not the resist and the resist processing which limit the resolution at 50 kV to 95 nm. In fact, the best low-voltage lithography results put an upper limit on the resolution degradation due to the resist and processing of 23 nm. For SAL-601, this work represents the first demonstration of ultra-high resolution and would not have been possible without a technique such as the STM for generat- ing a narrow low-voltage e-beam.

5. Conclusions

High-resolution lithography has been per- formed in the negative resist SAL-601 with a vacuum STM. The lithographically defined pat- terns in the developed resist films have been observed in an SEM. Features have been written with STM t ip -sample voltages between - 1 2 and - 5 0 V. Results have been obtained on both GaAs and Si substrates, although the GaAs sur- face required stabilization prior to the applica- tion of the resist film. Resist films up to 50 nm thick have been patterned. This demonstrates the technological practicality of low-voltage lithogra-

1316 C.R.K. Marrian, E.A. Dobisz / High-resolution lithography with a vacuum STM

phy, as 50 nm is sufficient to withstand a 350 nm dry etch of GaAs.

Minimum feature sizes are significantly smaller than can be defined with a tightly focused 10 nm 50 kV e-beam in identically prepared and pro- cessed resist films. This demonstrates that SAL- 601 is inherently capable of resolution below 25 nm and that existing electron scattering models do not adequately explain the exposure of the resist at 50 kV. These results point to the useful- ness of the STM as both a lithographic tool and a unique method for probing the properties of re- sist materials.

Acknowledgments

The authors wish to express their appreciation to the following for technical assistance and stim- ulating interactions: R.J. Colton, D.P. DiLella, K. Lee, E. Altman, S. Brandow, B. Gans, J.P. Ibe and J. Harrison.

References

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[2] A recent review of proximity effect correction is G. Owen, J. Vac. Sci. Technol. B 8 (1990) 1889.

[3] E.A. Dobisz and C.R.K. Marrian, Appl. Phys. Lett. 58 (1991) 2526.

[4] E.A. Dobisz and C.R.K. Marrian, J. Vac. Sci. Technol. B 9 (1991) 3024.

[5] H. Zhang, L.S. Hordon, S.W.J. Kuan, P. Maccagno and R.F.W. Pease, J. Vac. Sci. Technol. B 7 (1989) 1717.

[6] M.A. McCord and R.F.W. Pease, J. Vac. Sci. Technol. B 6 (1988) 293.

[7] For example, H.G. Craighead, R.E. Howard, L.D. Jackel and P.M. Mankiewich, Appl. Phys. Lett. 42 (1983) 38.

[8] E.A. Dobisz, C.R.K. Martian and R.J. Colton, J. Vac. Sci. Technol. B 8 (1990) 1754.

[9] The authors gratefully acknowledge discussions with C. Sandroff (Bellcore) and J. Dagata (NIST) about the passivation of GaAs.

[10] Processing as specified in: Microposit SAL 600 E-beam Process, Shipley Corporation.

[11] C.R.K. Marrian, E.A. Dobisz and R.J. Colton, in: AIP Conf. Proc. 241, Scanned Probe Microscopy, Santa Bar- bara, CA, 1991, Ed. H.K. Wickramasinghe (Am. Inst. Phys., New York, 1992) p. 408.

[12] We are grateful to Dr. H. Rohrer for suggesting this possibility.

[13] S.A. Rishton and D.P. Kern, J. Vac. Sci. Technol. B 5 (1987) 135.

[14] E.A. Dobisz, C.R.K. Marrian and R.J. Colton, J. Appl. Phys. 70 (1991) 1793.

[15] B. Michel, G. Travaglini, H. Rohrer, C. Joachim and M. Amrein, Z. Phys. B 76 (1989) 99.

[16] S. Lindsay, Y. Li, J. Pan, T. Thundat, L.A. Nagahara, P. Oden, J.A. DeRose and U. Knipping, J. Vac. Sci. Tech- nol. B 9 (1991) 1096.

[17] C.R.K. Marrian, E.A. Dobisz and R.J. Colton, J. Vac. Sci. Technol. B 9 (1991) 1367.

[18] C.R.K. Marrian and R.J. Colton, Appl. Phys. Lett. 56 (1990) 755.

[19] J.S. Greeneich, in: Electron Beam Technology in Micro- electronic Fabrication, Ed. G.R. Brewer (Academic Press, New York, 1980) pp. 103-106.