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Nonlinear control of fuel cell hybrid power sourcesPart I –Voltage control

N. BizonUniversity of Pitesti, Romania, nicubizon@yahoo.com; Tel: +40 248-218804, +40 722-895624 Fax: +40 248-216448, +40 248-222949

Abstract - In this paper is proposed a nonlinear control for fuel cell/battery/ultracapacitor hybrid power sources (HPS) that improves the performance and durability of fuel cell. The nonlinear voltage control is analyzed and designed using a systematic approach. The design goal is to stabilize the HPS output voltage at a low voltage ripple that is also spread in a large frequencies band. All the results have been validated in several simulations. The simulation results successfully show that nonlinear voltage control performs good performances in the frequency-domain (a high spreading level of power spectrum) and in the time-domain (a low level of output voltage ripple factor), too.

Keywords: nonlinear voltage-mode control; fuel cell; hybrid power source; voltage ripple factor; spread power spectrum.

1. Introduction

The Polymer Electrolyte Membrane Fuel Cell (PEMFC) is one of the most promising solutions to be utilized in Energy Generation Systems (EGS) and portable applications because of its relatively lightweight and small size, ease of construction, fast start-up and low operating temperature. Unfortunately, the relatively short PEMFC’s life time represents for moment an impediment to their commercialization.

Figure 1 represents a three-phase residential EGS that is grid connected [1]. This state-of-art architecture is used to highlight the results presented in this paper. A low frequency (LF) current ripple appears over the direct current on high DC voltage bus, having spectral harmonics at even multiples of triple of the output frequency. Of course, in case of a mono-phase EGS, which contains a single-phase inverter (a DC-AC converter), the LF current ripple appears, too. In this case the spectral harmonics are at even multiples of twice of the output frequency. This LF current ripple is propagated back via boost converter on the low DC voltage bus. If the PEMFC stack is connected directly to the low DC voltage bus, then this high PEMFC current ripple may shorten fuel cell life cycle and worsen the fuel cell efficiency due to hysteretic effect. The fuel consumption increases with more than 10% [2, 3]. It has been shown that a PEMFC stack usually filters the current ripple of high frequency (HF) by the intermediary of its double layer capacitor [4, 5]. The power spectrum of current ripple must be spread in the HF band by an adequate control of power interface in order to reduce the perturbation by Electromagnetic Interference (EMI). Consequently, the mitigation of the PEMFC current ripple is a challenge for designers of the EGS supplied by PEMFC stack. The mitigation limits of current ripple are given experimentally as Ripple Factor (RF) for different frequency bands [6, 7] (for example, LF RF must be up to 5% from 10% to 100% load, not to exceed 0.5 A for lighter loads; HF RF must be up to 60% from 10% to 100% load, not to exceed 2.4 A for lighter loads). Lower values of theRF are recommended to increase PEMFC performances. The use of paralleling power converters with interleaved control technique may be a solution [7, 8]. Transients below grid frequency (50/60 Hz) represents "load following" action of the EGS control and should track the Maximum Power Point (MPP) signal from the PEMFC to within 1% for purposes of both PEMFC reliability and efficiency [9, 10].

On the other hand, on vehicle applications, high energy demands appear in a short time that will cause high current slopes and obviously voltage drops, which are recognized as phenomenons of fuel starvation. Consequently, it is necessary to add Energy Storage Devices (ESDs) on vehicles supplied by PEMFC stack [11, 12, 13]. Sometime, the proper ESDs are used as Power Dynamic Compensators (PDCs). Usually batteries and ultracapacitors are used as ESDs and PDCs, respectively, or are mixed in hybrid stack. Such devices are required to absorb the energy from the regenerative braking and to compensate the fast power demand, reducing the fuel cell starvation phenomenon. During these sharp power profiles, and fuel cell start-ups and shutdowns, respectively, the control of power interface forces batteries and ultacapacitors stacks to supply such peaks, improving PEMFC dynamic performance and transient response [14]. For above considerations, it is obviously that hybrid and fuel cell technologies need to be merged in Hybrid Power Sources (HPS). Consequently, the challenge for power management control in HPS is to enhance the performance of all technologies working together and to minimize the fuel consumption, while reducing the degradation of PEMFC stack [15, 16]. The power/current slopes are given experimentally for different PEMFC stacks, depending on their power (about 10 A/s per each kW power) [7, 17, 18]. Recently there has been renewed interest in the HPS, especially in hybrid-electrical vehicle, where an efficient energy management must be done [19, 20, 21]. Consequently, many recent works have already reported some HPS structures for vehicle applications of type: FC/ultracapacitor [22], FC/battery [23] and FC/ultracapacitor/battery [24].

Different control techniques to mitigate the PEMFC current ripple are proposed [25 29]: passive/active filter, intelligent control, interleaved technique, spreading of power spectrum by randomization/chaotification of control etc. However, due to normal operation of the inverter, the LF current harmonics appear anyway on PEMFC current, so were proposed new topologies and appropriate control techniques for EGS [30 33]. In this paper is proposed a HPS topology based on an active power filter (see Fig. 2) to assure best energy management of the PEMFC stack and low RF for PEMF current.

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Figure 1. A typical EGS topology

Figure 2. The bi-buck HPS topology

The idea of current ripple mitigation proposed in [34] is only tested by simulation using a nonlinear controller that is designed by trial and error method. The innovative bi-buck converter topology shown in Fig. 2 is modelled here as multi-port power interface. This structure and its appropriate control will be further designed and analyzed in this paper. The design will be focused on improving of the HPS dynamic performance (its transient response) using sharp power profiles as dynamic test load. For this purpose some blocks and associated controllers are removed in figure 1 and the necessary variables are fixed at appropriate values in figure 2. For a given Fuel flow rate (FuelFr) the MPP current will be set to value that result from the PEMFC power characteristic. In this way, the new performances of the designed HPS may be more clearly highlighted. On the other hand, simulation of power interface with the adaptive MPP feedback loop requires large memory and lead to an excessive simulation time [35]. As it is above mentioned, the PEMFC transients below grid frequency represent "load following" action of the MPP control for HPS power interface. So, the dither frequency must be chosen sufficiently large to avoid the PEMFC dynamics to influence the performances of MPP tracking controller,

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but much smaller than the first harmonic of the current ripple. The PEMFC dynamic is given by its time response and this is in the range of hundreds of milliseconds. Thus, the fuel cell will appear almost like a static map for a dither frequency in range of 1 Hz to 10 Hz, while the fuel cell dynamic will influence a bit the probing signal if the dither frequency is in range of 0.1 Hz to 1 Hz. Consequently, a dither frequency of 1 Hz is proper to be used. In this case the simulation time must be greater than ten seconds to track the new MPP (depending by the step level of load). In this paper much smaller time of simulation is necessary to show the HPS control performance regarding the ripple mitigation. Consequently, the MPP current, IMPP, is set as constant and the power level ofload, Pload, is set to meet in the load node the approximate powers balance equation (taking in account that power dissipated in the filtering capacitor, Cf , can be neglected): PCVS+PCCSPload, where PCVS is output power of Controlled Voltage Source (CVS), PCCS is output power of Controlled Current Source (CCS) (see Fig. 2). The disadvantages mentioned above are thus avoided (especially the need to have a large simulation time). Be noted that the CVS controller structure with MPP tracking features is different from that presented here.

The remainder of this paper (part I) is organized as follows. Section 2 briefly presents the HPS modelling and the used model for dynamical load, too. Modelling and designing of the HPS power interface based on the bi-buck topology are shown in Section 3. Designing of the proposed nonlinear voltage controller is presented in Section 4. Some selected simulation results are shown in Section 5 and last section concludes the paper.

2. HPS modelling and test load models

2.1. Fuel cell modelDetailed PEMFC models are now available in literature [36, 37]. One that combines in a well manner the PEMFC operating

relationships is recently available in Matlab - Simulink® release 2009b. Since the purpose of this paper isn’t the PEMFC modelling,this preset detailed model will be used in all simulation, taking into account that PEMFC model is well designed and responds to the demands of simulation requested by this work. Consequently, the PEMFC modelling relationships are available in its help file and aren’t explained here. Two preset PEMFC model are used with a constant Fuel flow rate (named FuelFr in Fig. 2 and measured in litres per minute, lpm). The used parameters are specified below:- 1.26 kW PEMFC for a FuelFr=10.5 lpm, with MPP current and voltage at around 45 A and 27 Vdc, respectively (see PEMFC characteristics on Fig. 3.a);- 6 kW PEMFC for a FuelFr=47 lpm, with MPP current and voltage at around 120 A and 50 V, respectively (see PEMFC characteristics on Fig. 3.b).Automatically preset model parameters are shown are shown in figure 4.

a) 1.26 kW PEMFC b) 6 kW PEMFC Figure 3. PEMFC static characteristics

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a) 1.26 kW PEMFC b) 6 kW PEMFC Figure 4. PEMFC parameters

The characteristics look similar with reported PEMFC’s characteristics that are shown in data sheets, such as 1.2 kW Ballard and 6kW NetStack PEMFC’s. As it is known, the PEMFC time constant are dominated by temperature and fuel delivery system. In this paper the PEMFC time constant is set to 0.2 s. The effective MPP current is also set close to above mention value.

2.2. Energy storage devices models and their useHPS ESD-less grid-tied power interface utilizes the MPP tracking control to extract a maximum power from the HPS main source(the PEMFC stack in this case). The inverter system converts the direct current (DC) to an alternating current (AC) and sells excess energy back to the operators of the power grid. Also, the off-grid power systems use the MPP tracking controller to extract the maximum power from the HPS main source. When the load power requirements are less or greater than the power currently available (that is near to MPP), the flow rate regulator (which is driven by the load current, Iout=I1+I2) reduces or increases for a period of about few PEMFC time constants the power delivered by the PEMFC stack in order to be always greater than an average of these load power requirements. The load voltage, Vout, is maintained almost constant by the Controlled Voltage Source (CVS) and the power difference is delivery by an auxiliary energy source or an ESD (the batteries stack in this case). So, this power difference implies a controlled current (I2) depending on the control requirements of proposed HPS. The Controlled Current Source (CCS) drains energy from the ESD in order to make up the averaged power difference and to compensate the sharp power profiles of dynamic load.Combining PEMFC with PDC (the ultracapacitors stack in this case) makes the HPS to operate properly under transient conditions in demand power. Output voltage, Vout, must be lower than PEMFC voltage operating at MPP and was chosen to be 25 Vdc and 40 Vdc for the use of a 1.26 kW PEMFC and a 6 kW PEMFC, respectively. Further details on the HPS operation will be show in control design section. The detailed battery models are now available in literature [38] and one generic was also available in Matlab -Simulink® release 2009b (Fig. 2). A preset NiMH battery model will be used. Consequently, the battery modelling relationships are available in its help file and aren’t explained here. For the preset model the automatically model parameters based on battery type and nominal voltage values and the rated capacity are used, and the initial State-Of-Charge (SOC) is set to 80% in all simulations. The used parameters are specified below for each PEMFC’s stack:- For 1.26 kW PEMFC the NiMH battery parameters are set to 40 V and 20 Ah for nominal voltage and the rated capacity, respectively (see discharge characteristics on Fig. 5.a);- For 6 kW PEMFC the NiMH battery parameters are set to 60 V and 200 Ah for nominal voltage and the rated capacity, respectively (see discharge characteristics on Fig. 5.b).

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a) 20Ah NiMH battery

b) 200Ah NiMH batteryFigure 5. NiMH battery discharge characteristics

Batteries technologies have high-energy storage capabilities, with a lesser performance in power delivery, so represents a good option for use as ESD in different energy applications. Unlike batteries, ultracapacitors can operate at high charge and discharge rates, are fully bi-directional and have a very long life time. These facts make ultracapacitors (UC) an attractive option for use as PDC in high burst power applications. Usually, the UC bank is used to provide the difference between the load demand and the PEMFC/battery HPS. In this paper a PEMFC/UC/Battery hybrid system is adopted. The used value for the UC stack capacitance (C_UC shown in Fig. 2) may be in the range 0.1 F to 1 F and its electrical equivalent circuit is of first order model type. Taking in account the low capacitance required for HF ripple mitigation, the capacitors stack may be composed as alternative by a stack of few paralleled electrolytic capacitors, too.

2.3. Model of load test As it is known, the LF current ripple is normally generated by the inverter system, as effect of its normal operation (see Fig. 6) and

its nonlinearity due by delays in switching and presence of nonlinear components in its structure, and then it propagates back to the HPS. With a linear load, the inverter output current is almost sinusoidal (with the grid frequency of 50 Hz or 60 Hz), while the input current on DC high voltage (DC HV) bus has a DC component with ripple. This ripple is propagated back via boost converter on the DC low voltage (DC LV) bus (Fig. 1). In case of a mono-phase full bridge inverter structure, a LF current ripple at twice of the output voltage frequency appears on DC HV bus, as it is shown in Fig. 6. The experiment performed with a 1.2 kW load reveals a peak-to-peak ripple of 30% [7]. The LF ripple current on the DC LV bus appears at multiples of twice of the output voltage frequency due non-linearity at the level of load and power converter. The appearance of a LF ripple current on DC LV bus can be explained in the same manner for a multi-phase inverter system.

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Figure 6. LF current ripple generated by the mono-phase inverter system

Consequently, to cover all these cases, a test load model must be designed. The LF ripple current spectrum of the mono-phase testload (Fig. 7) appears at multiples of 100 Hz with amplitudes that can be set. Three LF harmonics were taken in consideration (H100, H300 and H500) and two load models were tested in order to analyze how this equivalent load interacts with the HPS power interface. First model uses the Ohm law to compute the load current (Fig. 7.a). Instead, the load current is set directly in the second model (Fig. 7.b). Taking into account that next power stage of the HPS is a boost converter, which in its structure contains a coil at the input port, the CCS load model is more appropriate. In simulations performed however the same results are obtained testing these models. Thesecond it was used in all simulation results presented in this paper due the ease of setting the load current (DC level and harmonics levels).

As it is mentioned before, the current slopes are given experimentally for different PEMFC stacks, depending on their power, and the equivalent dynamic load parameters are set to have much more than 10 A/s per each kW power. For example, see Fig. 8 wheretest load current is shown for the HPS supplied by the 1.26 kW PEMFC. The RF of the load current is RFload_current=(88-58)/88=34%.

a) Load model that use the Ohm law

b) Load model that use a CCSFigure 7. Dynamical load models

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Figure 8. Load current in time (top) and its power spectrum (bottom)

The RF of the load current is high enough to show the obtained performances concerning the ripple mitigation for the proposed HPS power interface. This inverter current ripple is propagated via the HPS power interface, majority being compensated by the buck CCS and rest of it is back propagates to the fuel cell. In part II of the paper it is shown that resulting value for RFPEMFC_current is lower than that obtained in the case without CCS. The maximum current slope is about of 20 A/ms for the current load shape shown in Fig. 8. So, it is much higher than admissible PEMFC current slope if this ripple isn’t compensated by CCS converter. Consequently, thisset of chosen load parameters ensures an unacceptable dynamic for PEMFC operation if load power dynamic isn't compensated from another energy source via CCS converter.

3. HPS power interface

The boost converter or the full-bridge topology are suitable for implementing the CVS using an appropriate voltage control.A partial mitigation of the current ripple is performed as effect of boost structure. Instead, the buck converter is suitable to

implement the CCS that is necessary to almost fully mitigation of the current ripple.Consequently, a bi-buck structure is proposed as HPS architecture (see figure 2). HPS uses one of buck converter as CCS (with a

shape following control implemented in CCS controller) and the second as CCS (with a nonlinear control implemented in CVS controller). The buck CCS operates as an active LF ripple filter. The CVS controller assures a stabilized output voltage (Vout) that have a spread power spectrum by using of a nonlinear control law and a chaotification technique in the feed-back loop. In comparison with other control scheme [39 44], this technique maintains the voltage ripple into a range that is controlled by the nonlinear control law. Also, this kind of control spread the remaining of LF ripple power spectrum in the high frequencies band, with implications concerning the increasing of PEMFC life cycle. So, the HPS power topology has two nonlinear control loops: one for adjusting the output voltage at imposed value by the reference voltage, Vref, and other for compensation of the LF current ripple. An efficient nonlinear control law is designed for this power interface in next section. HPS power topology based on bi-buck structure is shown in figure 9. The HPS output current, iout, is set by the load.

Figure 9. HPS power topology

3.1. Modelling and designing of HPS power topology

For a 1.26 kW HPS (1.26 kW PEMFC/1 F UC/20 Ah NiMH battery) the design parameters are set to VoutVref=25V, IFC(AV)

IMPP=45A (so VFC(MPP) 27V), VBat =40V and the shape of load current is shown in Fig. 8. These parameters will be considered in the HPS design. The load current, iout, is given by relationships:

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)(2)(1)()(

)(2)(1)(

21ACACACCfACout

AVAVAVout

Cfout iiii

IIIiiii (1)

If considering that output voltage ripple is low, then the alternating current of the filtering capacitors, iCf(AC) , is much lower than the set value for the AC current of load, iout(AC). So:

)()()()(2)(1 ACoutACCfACoutACAC iiiii (2)

If the LF current ripple compensation control loop operates correctly, then also i1(AC)<< i2(AC). Result from relation (2) and (1), respectively:

MPPout

MPPFCAVoutAV

ACoutAC

IV

VII

ii

)(1)()(2

)()(2

(3)

where 1 is the energy efficiency factor for buck CVS, which is calculated as the ratio between the output power (delivered to the load) and the input power (delivered to it by the PEMFC stack).Because the unidirectional CCS is cheaper than a bidirectional CCS, the first structure was considered in this paper. Consequently, the relationships in AC must be redefined in terms of a positive ripple. If a base current is defined as a value slightly smaller than the minimum value of respective current (as it is shown in Fig. 8 for load current, iout) and the difference from base current is defined as a positive ripple, then above relationships may be rewritten as:

2( ) ( )( ) ( )

1 ( )2 2( ) 2( ) 2( ) ( ) ( )

ripple out rippleout out base out ripple

FC basebase ripple base out base FC base

out

i ii I i

Vi I i I I I

V

(4)

where IFC(base) IMPP – I*FC(ripple)p-p and I*FC(ripple)p-p is PEMFC current ripple (peak to peak) without buck CCS. In this way the PEMFC current does not exceed IMMP, even if the compensation loop isn't yet in the operating phase or before to be disconnected when is accidentally malfunctioned. If it is chosen I*FC(ripple)p-p 10% IMPP, then the base operating point is IFC(base) 40 A (where VFC(base) 33V). In this case all HPS operating phases are carried out normally (without exceeding the allowable limit parameters) and the PEMFC base operating point is still close enough to MPP. When the compensation loop is operational, an estimation of the gap needed towards MPP in correlation with output current ripple level is presented in the designing section of buck CCS control (of part II). The energy delivered by the auxiliary power source (batteries stack) has a lower value if the base current, I2(base), is set to be zero (or slightly greater than zero). In this case:

)(1)()(1

)( basebaseFCout

baseFCbaseout II

V

VI

(5)

Considering 1 0.9 (where 1 and 2 is the power efficiency factor for buck CVS and buck CCS, respectively), then Iout(base)48 A.Also (see Fig. 8):

AIII AVrippleoutAVrippleAV 234871))(())((2)(2 (6)

Considering 2 0.9, then

AIV

VI AV

Bat

outAVBat 16)(2

2)(

(7)

As it is mention before, the current level of batteries stack will be temporally higher than this minimum level that is computed with relation (7). This is because is necessary about ten seconds to change the fuel flow rate related to new average load current and then to track the new MPP. In this time the supplementary power flow is supplied via buck CCS from the batteries stack. If it necessary, a mixed batteries and ultracapacitors stack may be used for high energy demands in a short time. Of course, it is necessary to have a small constant time for buck CCS, too.In general, basic PWM converters (like buck, boost, and buck-boost) are second-order systems, in which one state variable is the inductor current and the other state variable is the capacitor voltage (which is also equal to the output voltage). Next, it is showed that the HPS topology can be modelled by a second-order systems.If c1 and c2 are switching command for IGBT transistors (c1=1/0 IGBT1 on/off and c2=1/0 IGBT2 on/off, respectively), then the operating equations (neglecting the series resistance of the inductors and filter capacitor) are:

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dt

dvCi

iiii

vdt

diLvc

vdt

diLvc

outfCf

Cfout

outBat

outFC

21

222

111

(8)

By simple manipulation of the equations above, a second-order differential equation is obtained:2

1 2 1 2 1 21 2 2

1 2 1 2 1 2 1 2

out outFC Bat out f

di d vL L L L L Lc v c v v C

L L L L L L dt L L dt

(9)

Considering identical inductors (L1 =L2 =L, with series resistance rL), the second-order differential equation (9) is rewritten as:

2

1 2 2

1

2 2 2 2 2f L fout out outL

FC Bat out out

C r C Ldi dv d vr Lc V c V i V

dt dt dt (10)

where the second-order system parameters, the natural frequency, n [rad/s], and the dimensionless damping ratio, , are respectively:

L

CrrC

LCfL

nLf

fn 4

2

4,

2 (11)

The model described by relation (10) shows the output voltage dependence to load current. Considering a switching frequency of 10 kHz for both PWM controllers of the HPS power interface (the buck CVS and the buck CCS controllers, respectively), the duty cycle of switching commands (c1 and c2, respectively) is:

625.0,75.0 22

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Bat

outon

FC

outon

V

V

T

tD

V

V

T

tD (12)

The current ripple factor of LF ripple reported to HF ripple, Kripple, is defined as ratio of LF current ripple (peak to peak), I(LF ripple)p-p , to HF current ripple (peak to peak), I(HF ripple)p-p :

)(

)(

)(

)(

rippleLF

rippleHF

pprippleHF

pprippleLFripple f

f

I

IK

(13)

where srippleHF ff )( =10 kHz. Considering LF power spectrum up to 500 Hz ( )( rippleLFf =500 Hz), the HF current ripple is of

twenty times lower than LF current ripple. Taking in account that PEMFC stack is tolerant to HF current ripple, then it is obviously why the HF current ripple isn’t considered in the test load model, even if in reality this HF ripple appear when HPS supply an inverter system.When IGBT1 is on, the second equation of (8) is written as:

pprippleHF

outout

onBat I

TDVLV

t

iLV

)(

22

2

22

)1((14)

The buck CCS inductance value imposes the time constant for tracking of LF load current shape and, therefore, the obtained performance in the mitigation process of the current ripple. For the LF current ripple that is showed in Fig. 8, its value must be lower that:

HIf

KDVL

pprippleLFs

rippleout 3

)(

22 10625.0

)1(

(15)

As it is known, for the PWM voltage control, the output voltage ripple factor is given by:

2*2

out1

out

v1-D

V 2LC

s

f

f

, where * 1

2LC

f

fLC

(16)

If we chose identical inductors, L1 =L2 =L=100 H, having a series resistance about of rL=100 m, and if the output voltage ripple factor is up to 4%, then the filter capacitance, Cf, must be greater that 10 F. A value of 47F is chosen in all conditions in order to assure a good ripple factor for output voltage. If a variable-frequency control method is used, then the switching frequency is designed to be in a range around of 10 kHz value.

The current ripple amplitude of the filtering capacitors, iCf(AC) , can be now estimated using the last equation of (8):

AV

vVfC

D

vfCI

out

outFCsf

outsfppCf 6.0

1)(

(17)

Therefore, assumption used in relationship (2) was correct.Considering a constant load current, the equivalent load resistance can be defined as Rout =Vout/Iout, then the associate frequencies are:

10

2,

2/2

1,

1

2

1 nLC

outRL

outfRC f

L

Rf

RCf (18)

If the load current is in the range of continuous current mode (CCM) operation for buck CVS, which means Iout<Iout(base)48 A and Rout>Vout/Iout0.5 , then the associate frequencies from (15) have the same order of magnitude. For example, if Iout25 A, then Rout=1, and the associate frequencies are fRC =3.3863 kHz, fRL=1.5915 kHz, and fLC=2.3215 kHz. The same order of magnitude for the associate frequencies of second-order system means that system response time is about of 2/n, ie 500 s. The switching period must be lower than system response time, so decision to use a 10 kHz switching frequency (or up to this) represents a good designing option towards applying of stiff system theory. In next subsection, using the above designed values, the buck CVS is separately tested to show their performances. The voltage control method is briefly explained in order to understand its designing method that is showed in section 4.

3.2. Modelling and control of buck CVS

Voltage-mode control, also called duty-cycle control, contains a single feedback loop and adjusts the duty cycle directly in response to output voltage changes. Current-mode control is a multiple-loop control method that contains two loops: an inner current loop and an outer voltage loop. Current-mode control can be successfully used in both CVS and CCS, but is much easy to be implemented in CCS controller, as will be showed in part II of paper. Consequently, a voltage-mode nonlinear control will be designed in this subsection. The main design goal is the EMI reduction by spreading the power spectrum in the HF band, but without increasing the ripple factor of output voltage over to 4%. The spreading effect is given by the chaotifying signal. In this kind of buck CVS operating, the remaining LF ripple is also spread in the HF band of power spectrum, increasing the PEMFC life cycle as well.

Buck CVS topology and voltage-mode nonlinear controller are shown in figure 10 and 11, respectively. The chaotifying signal, v1,may has different shape (see Fig. 12), but the simulations performed have showed that shape does not affect the chaotifying performances that are measured by two indicators (which are defined in section 5). Only the variation range must be correlated with the output voltage range of the nonlinear controller, v2 (see Fig. 13, where the saw-tooth shape was chosen as chaotifying signal). The v2 range is symmetrically, for example [-10V, 10V], and the v1 range must be asymmetrically, for example [0V, 10V]. The CVS switching command results by comparing the two signals above mentioned (v1 and v2), as it is shown in Fig. 11 and Fig. 13. Looking to signals related to CVS controller operation (shown in Fig. 13) it is clear that CVS switching command is generated on base of output voltage error, verror =vout-Vref , but in a different way as in classical PWM control. In the classical PWM control the output voltage error is usually processed by a PI (proportional-integral) controller and then is compared with a periodic signal (easy to be generated; usually a saw-tooth signal). In stabilized regime the steady-state error is close to zero and processed error by PI controller has a small variation around the value which gives the desired duty cycle. The switching frequency is equal with the frequency of periodic signal and the power spectrum is concentrate at the switching frequency and its harmonics, generating high EMI. These high spectral power peaks produce EMI and create major electromagnetic compatibility difficulties. Different techniques that change the switching frequency and spread the spectral power peaks in a large frequencies band are proposed [36-41]. All these spreading techniques of the power spectrum report good spreading performance, but does not have the performances for voltage ripple as good.

In this paper is made a systematic approach of designing for the CVS nonlinear control in order to having a small ripple factor for output voltage. Some design relations for CVS nonlinear control obtained by trial and error method are all ready presented in [26]. Exhaustive simulation is used there to obtain these rules of design that are correlated with buck parameters and load level.

Figure 10. Buck CVS topology

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Figure 11. CVS controller that implement the voltage-mode nonlinear control

Figure 12. The chaotifying signal generator

Figure 13. Signals related to CVS controller operation with saw-tooth as chotifying signal

Figure 14. Signals related to CVS controller operation with only offset signal

For these reasons, only significant different results are presented here, which are obtained by systematic modelling of the voltage control and are validated by proposed performance indicators.

Firstly, to prove that CVS switching command is generated on base of output voltage error that is amplified using the nonlinear law,the gain of the saw-tooth signal, Gsw, is set to zero. The signals related to this CVS controller operation and duty cycle are shown in Fig. 14. It can be observed that switching frequency is constant and its value is that of the closed loop frequency, f0. The output voltage can be fine tuned around of reference voltage by changing the level of offset voltage (v1). Without the use of chaotifying signal, the output voltage power spectrum is concentrate on the fundamental harmonic of f0=18 kHz and its harmonics.

Secondly, using the chaotifying signal (a saw-tooth signal with frequency of fsw=10 kHz) the power spectrum of output voltage is spread around the 18 kHz, named the center-of-gravity frequency of the spread power spectrum, fCOG (Fig. 15).

The parameters used in simulation are fsw=15 kHz, L=100 H, C=47 F, Rout=1 and the associate frequencies have these values: fRC =3.3863 kHz, fRL=1.5915 kHz, and fLC=2.3215 kHz. It can be observed that associate frequencies have the same order of magnitude.

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Figure 15. The output voltage (top) and its power spectrum (bottom) with simulation parameters: fsw=15 kHz, L=100 H, C=47 F, Rout=1

In Fig. 16 the parameters used in simulation are fsw=15 kHz, L=100 H, C=47 F, Rout=2/3 and, consequently, the associate frequencies are: fRC =5.0794 kHz, fRL=1.061 kHz, and fLC=2.3215 kHz. It can be observed that associate frequencies have the same order of magnitude, too. In this case the output voltage power spectrum is spread around the fCOG 17 kHz (Fig. 16), the new closed loop frequency, and its harmonics.

It is clearly that buck and load parameters change the associate frequencies values (fRC, fRL and fLC) and closed loop frequency value is set by the nonlinear controller, including the nonlinear control law and set levels for chaotifying signal. Good results concerning the power spectrum spreading are obtained if the frequency of chaotifying signal (the saw-tooth signal frequency, fsw) is chosen in range frequency that starts from the maximum of the associate frequencies up to the closed loop frequency:

0,,max fffff swLCRLRC (19)

Figure 16. The output voltage (top) and its power spectrum (bottom) with simulation parameters: fsw=15 kHz, L=100 H, C=47 F, Rout=2/3

13

The ripple factor of output voltage, RFVout=vout/Vout , is about 60mV/25V=0.24% and 600mV/25V=2.4% for simulation cases shown in Fig. 15 and Fig. 16, respectively. Taking account by the level of load power, these values represent very good values obtained for ripple factor. These results are obtained using a nonlinear control law designed in next section by a fuzzy logic controller.

4. Designing of the nonlinear voltage controller

To obtain a nonlinear characteristic that will mitigate the output voltage ripple, the basic design idea is to have a small loop gain if the output voltage ripple is small and then, if the output voltage ripple increases, the loop gain must rise quickly to a value that ensures the stability of the overall feedback loop (see the CVS controller variables in Fig. 10 and the place of the nonlinear control law in Fig. 11). For different ripple factors the design questions are how small, how quickly increases and how big should be the loop gain, respectively. The fuzzy logic reasoning based on systematic approach will be used to design the CVS nonlinear control law. The CVS controller is a single input – single output (SISO) system. The input is the output voltage error, verror, and the output is the v2

voltage, with the variations set in range of [-1V, 1V] and [-10V, 10V], respectively. As it is mention before, the v2 voltage rage must be correlated with chaotifying signal range. The saw-tooth signal, v1(t), is used in

this paper and it is defined by the relation:

sw

swLHL T

TtVVVtv

)(mod)(1 , (20)

It is a decreasing ramp voltage from a higher voltage, VH , to a lower voltage, VL, in a time period, Tsw=1/fsw. The values used in all simulations are VH = 9 V and VL = 1 V, and fsw=10 kHz for all next simulations. These were chosen as in [41] in order to compare the obtained results.

For an output voltage of 25V, the output voltage ripple factor of 4% means an output voltage error of 1V. Consequently, the output voltage error range is chosen to be [-1V, 1V] and seven membership functions are symmetrically defined in this range to refine the input fuzzy variable, which is the output voltage error. The membership functions for output voltage error are defined in Fig. 17: Very_Big_Negative (VBN), Big_Negative (VBN), Negative (N), Zero_Equal (ZE), Positive (P), Big_Positive (BP), and Very_Big_ Positive (VBP). Obviously, the same number of membership functions is used to refine the output fuzzy variable, which is the V2

output voltage of the nonlinear controller. The membership functions for output voltage error are symmetrically defined in range of [-10V, 10V] (see Fig. 18): Very_Very_Small (VVS), Very_Small (VS), Small (S), Zero (Z), Big (B), Very_Big (VB), and Very_Very_Big (VVB). Taking in account the basic design idea to obtain the nonlinear characteristic of the CVS controller, the base of rules is shown in table 1:

Table 1The rules base for CVS fuzzy controller

Rule Output voltage error Output voltage of the CVS controller1 VBN VVS2 BN VS3 N S4 ZE Z5 P B6 VP VB7 VBP VVB

The control law nonlinearity is obtained by correct defining of the membership functions. The Z and ZE triangular membership functions have the triangle peaks set at zero. The rest of triangular membership functions for the output voltage error are symmetrically defined in range of [-1V 1V] setting the triangle peaks at 50mV, 250mV, and 1000mV, for which result an output voltage ripple factor of 0.2%, 1%, and 4%, respectively.

Replacing the CVS controller with a proportional (P) controller, the P-gain for which the output voltage ripple factor is of 4% was found as 10 by trial and error method. The saw-tooth signal still operates as chaotifying signal (see Fig. 19). Comparing the signals related to CVS controller operation shown in Fig. 13 and Fig. 19, it is observed that output voltage of nonlinear controller is distorted near to zero for low output voltage ripple and higher distorted for high output voltage ripple. For the output voltage of nonlinear controller the triangular membership functions (B and VB, and S and VS, respectively) are symmetrically defined in range of [-10V 10V] setting the triangle peaks at 100mV and 500mV, respectively, in order to results the same P-gain in relation with triangle peaks of membership functions for the output voltage error (P and BP, and N and BN, respectively).in this case a small P-gain is chosen that is equal with 2 (100mV/50mV=500mV/250mV=2).

The VVS and VVB trapezoidal memberships are defined as (0.5, 1, 10, 10) to result an output voltage ripple factor of 4%. For the peaks of VBN and VBP triangular membership functions will result a small P-gain (equal with 1V/1V=1) and a high P-gain (equal with 10V/1V=10) at 1V and at 10V, respectively.

Using the Mamdani implication, max-min fuzzy connectives and the center of area defuzzification strategy, the nonlinear voltage control characteristic of above fuzzy logic reasoning is shown in Fig. 20. The three piecewise linear (PWL) voltage control characteristic that is fitted on the nonlinear voltage control characteristic is also shown in Fig. 20.

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Figure 17. The membership functions for the output voltage error

Figure 18. The membership functions for the output voltage of nonlinear voltage control

Figure 19. Signals related to CVS controller operation with saw-tooth as chotifying signal

Enlarging the variation range to [-10V 10V], the PWL control characteristic is easy implemented by the following look-up table (the values are given in volts):- input vector: [-1, -0.5,-0.15, 0.15, 0.5, 1];- output vector: [-10,-10,-0.4, 0.4, 10, 10].

As an observation, the designed PWL characteristic of CVS controller is close enough to that proposed in [26] by trial and error method. This confirms the simulation effort by a systematic design.

A mathematical approach of the buck CVS in closed control loop can be performed considering this PWL control law.

15

Figure 20. The nonlinear voltage control characteristic (thin line) and PWL voltage control characteristic (thick line) which is fitted on it.

5. Simulation results

Two performance indicators, PI1 and PI2, are used to quantify the spreading level of the output power [26]:

COGf

fPI %10

1

,

THD

Speak2 PI (21)

where:Speak is the maximum spectral magnitude (as % of DC component), excluding the harmonics of the chaotifying signal that can possibly occur (see for example Fig. 16);f10%Sp - the frequencies band where the power spectral magnitude is over 10% of Speak;fCOG - the center-of-gravity frequency of power spectrum;THD - total harmonic distortion factor of output voltage.

Interpretation of performance indicators relating to quantification mode of the power spectrum spreading level is presented below:- If PI1 >50%, then f10%Sp>fCOG/2, and this means a large frequencies band where is situated the most part of the spread power spectrum;- If PI2 <50%, then Speak <THD/2, and this means no high peak in the spread power spectrum.

The performance indicators are estimated for different load currents (see Fig. 21).

Figure 21. CVS tested with step-up load current

16

a) Iout=15A b) Iout=20A c) Iout=25AFigure 22. The output voltage (top) and its power spectrum (bottom) for different load current, using the simulation parameters: fsw=10 kHz, L=100H, and C=47F

d) Iout=30A e) Iout=35A f) Iout=40AFigure 22. The output voltage (top) and its power spectrum (bottom) for different load current, using the simulation parameters: fsw=10 kHz, L=100H, and C=47F

(continued)

The performance indicators are PI127 kHz / 18 kHz150% and PI21400/618323% for the example shown in Fig. 15. So, well spreading performances are obtained in this case. Also, well spreading performances are obtained for example shown in Fig. 16, where PI1 11 kHz / 17 kHz105% and PI2 2200/800028%, but harmonics of the chaotifying signal occur in this case. This situation can be avoided by pseudo-randomize of the saw-tooth period. The output voltage ripple factor, RFVout=vout/Vout, is about0.24% and 2.4%, respectively.

For case study shown in Fig. 21 the performance indicators PI2, PI1 and RFVout are estimated in Table 2 using the simulation results presented in Fig. 22. To speed up the simulation the PEMFC time constant was set to 0.2 s. This PEMFC parameter does not significantly change the operation of CVS controller and the performance indicators, respectively. Instead, the load current influencesthe performance indicators by changing the associated frequencies of buck converter (fRL and fRC).

Table 2The performance indicators for case study shown in Fig. 22

Iout [A] fRL [kHz] fRC [kHz] PI1 [%] PI2 [%] RFVout[%]15 2.6526 2.0318 79 32 5.620 1.9894 2.7090 42 52 425 1.5915 3.3863 35 41 3.230 1.3263 4.0635 25 47 3.235 1.1368 4.7408 34 46 3.240 0.9947 5.4180 27 55 3.2

For buck parameters L=100 H and C=47 F will result a natural frequency, fLC, of 2.3215 kHz. So, looking to Table 2 and taking in account other simulation results, it is obviously that a well spreading level of power spectrum can be obtained when the associated

17

frequencies are of the same order of magnitude. The output voltage ripple factor is up to 4% for load current in rated range. The response in output voltage is lower than voltage ripple for 5 A step-up of load current (Fig. 21). This shows the control robustness of CVS controller. The voltage spikes appear on output voltage at times of load current change for load current pulse over 10 A (Fig. 23). These spikes are relative big if are compared with the voltage ripple level, but this isn’t the operating case for a HPS that use a PEMFC stack as main energy source. Using other auxiliary source (see Fig. 2), the load power demand can be compensated via the buck CCS before to produce spikes on LV DC bus.

Figure 23. CVS tested with load pulse current

For example, if load pulse parameters are Rout(pulse)= 2/3 from 40ms to 80ms and Rout(pulse)=1 outside this time, the load current pulse is of 12.5 A. The PEMFC current pulse levels can be estimated by relation (5):

)()(1

2

)()(1

)(pulseoutpulseFC

outpulseout

pulseFC

outpulseFC RV

VI

V

VI

(5’)

In this case the CVS dynamic is shown in phases plane (Fig. 24). The chaotifying effect is shown in the phases plane zoom, too. The operating orbits are chaotified by the nonlinear CVS controller around the steady-state point of (25V, 25A).

Figure 24. The CVS dynamic in phases plane

For the 6 kW PEMFC with a fuel flow rate of 47 lpm the MPP current and voltage is about 120 A and 50 V, respectively. Considering an output voltage ripple factor of same value as before, ie 4%, the CVS controller is designed in the same manner. Also, considering a switching frequency of 10 kHz, the designed value are L1 =L2=L=200 H and Cf =100 F, so fLC= 1.1254 kHz. The performance indicators are showed in table 3 for different load currents:

Table 3The performance indicators for a 6 kW PEMFC / 200 Ah battery HPS

Iout [A] fRL [kHz] fRC [kHz] PI1 [%] PI2 [%] RFVout[%]20 1.9894 0.636 47 50 4.540 0.994 1.2732 37 44 3.760 0.663 1.9099 28 45 3.580 0.497 2.5465 30 41 3.8100 0.397 3.1831 32 49 4

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These results show that designing of the CVS controller is almost independently by the load power level and its performances regarding the voltage ripple and power spectrum spreading are maintained. The closed loop frequency value, f0, is in the range of 15 kHz to 20 kHz, so the relationship (19) is verified, too.

The tracking process of the PEMFC MPP is relatively slow for a rated operating point of load and is clearly dependent by the MPP algorithm chosen. Also, the PEMFC time response is slowly compared with dynamic of load that may occurs in the vehicle applications. Consequently, this dynamic of power must be compensated from another energy source using a power converter that is appropriate controlled, as is proposed here in section 3 and will be showed in part II of this paper.

5. Conclusion

This paper analyzes the bi-buck topology as power interface with inverter system. The LF current ripple normally appears in operation of fuel cell inverter system and this is propagated back on HPS voltage bus.

Also, high energy demands in a short time appear on vehicle applications. These will cause high current pulses with high slopes that are propagated back as LF current ripple on HPS voltage bus, too.

The bi-buck HPS topology was designed to mitigate this LF current ripple on the HPS output node by injection of an anti-ripple current on this point, usually named as point of common coupling. In the point of common coupling are connected the nonlinear load, the CVS and the CCS. The injected current tracks the shape of LF inverter current ripple in an active control loop that implies the CCS control.

Only the CVS controller designing is presented in part I of this paper. The CCS controller designing is presented in part II of this paper. The design goal of CVS controller is the EMI reduction in the operation of bi-buck HPS and maintaining the ripple factor of HPS output voltage up to 4%. This is done by spreading the power spectrum in the HF band using a nonlinear control law. The spreading in the HF band of the LF Ripple that remains after compensation by injection of the anti-ripple current leads to an increasing of the life cycle as well.

Two performance indicators are used to quantify the spreading level of the output power. First is a measure of the width of frequencies band where is situated the most part of the spread power spectrum. The second is a measure of the remaining power peaks level in the spread power spectrum.

The proposed nonlinear CVS controller is designed to assure good performances in both frequency and time domain. The closed loop frequency value and voltage ripple can be tuned by the hysteresis level of the hysteretic operator that replaces the relational operator in switching command generation (Fig. 11).

All the reported results have been validated in several simulations. The nonlinear voltage CVS controller performs goodperformances: an output voltage ripple factor up to 4% for the load current in the rated range, a width of spread frequencies band in range of 3 kHz to 37 kHz, depending by load power level, and the power peaks in the range of 30% to 55% from the THD.

For high power applications the buck CVS can be removed to increase the HPS efficiency. The operation of the fuel cell stack near to MPP by setting the fuel flow rate may assures a constant voltage at the HPS output. For a dynamic load it is necessary to assure the powers balance equation at the HPS output node by connecting (directly or by a bidirectional converter) an ESD (mixed stack of batteries and ultracapacitors) at this node (the point of common coupling). Other possibility is to compensate the powers flows balance by connecting (directly or via a bidirectional converter) the ESD on the DC high voltage bus. A state-of-art architecture for an EGS that includes the proposed HPS topology is showed in this paper, too.

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Figure 1. A typical EGS topology

Figure 2. The bi-buck HPS topology

21

a) 1.26 kW PEMFC b) 6 kW PEMFCFigure 3. PEMFC static characteristics

a) 1.26 kW PEMFC b) 6 kW PEMFC Figure 4. PEMFC parameters

a) 20Ah NiMH battery

b) 200Ah NiMH batteryFigure 5. NiMH battery discharge characteristics

22

Figure 6. LF current ripple generated by the mono-phase inverter system

a) Load model that use the Ohm law

b) Load model that use a CCSFigure 7. Dynamical load models

Figure 8. Load current in time (top) and its power spectrum (bottom)

23

Figure 9. HPS power topology

Figure 10. Buck CVS topology

Figure 11. CVS controller that implement the voltage-mode nonlinear control

Figure 12. The chaotifying signal generator

24

Figure 13. Signals related to CVS controller operation with saw-tooth as chotifying signal

Figure 14. Signals related to CVS controller operation with only offset signal

Figure 15. The output voltage (top) and its power spectrum (bottom) with simulation parameters: fsw=15 kHz, L=100 H, C=47 F, Rout=1

25

Figure 16. The output voltage (top) and its power spectrum (bottom) with simulation parameters: fsw=15 kHz, L=100 H, C=47 F, Rout=2/3

Figure 17. The membership functions for the output voltage error

Figure 18. The membership functions for the output voltage of nonlinear voltage control

26

Figure 19. Signals related to CVS controller operation with saw-tooth as chotifying signal

Figure 20. The nonlinear voltage control characteristic (thin line) and PWL voltage control characteristic (thick line) which is fitted on it.

Figure 21. CVS tested with step-up load current

27

a) Iout=15A b) Iout=20A c) Iout=25AFigure 22. The output voltage (top) and its power spectrum (bottom) for different load current, using the simulation parameters: fsw=10 kHz, L=100H, and C=47F

d) Iout=30A e) Iout=35A f) Iout=40AFigure 22. The output voltage (top) and its power spectrum (bottom) for different load current, using the simulation parameters: fsw=10 kHz, L=100H, and C=47F

(continued)

Figure 23. CVS tested with load pulse current

28

Figure 24. The CVS dynamic in phases plane