IEEE TRANSACTIONS ON NANOTECHNOLOGY, VOL. 11, NO. 4, JULY 2012 799

Robust Design of High-Speed InterconnectsBased on an MWCNT

Patrizia Lamberti, Member, IEEE, Maria Sabrina Sarto, Fellow, IEEE, Vincenzo Tucci, Member, IEEE,and Alessio Tamburrano, Member, IEEE

Abstract—A robust design of the propagation characteristicsof interconnect structures based on multiwall carbon nanotubes(MWCNTs) is carried out. The study allows us to identify the min-imum number of shells N of the MWCNT able to guarantee thatthe time delay at 50% outperforms the Cu-based solution for theupcoming technology nodes, taking into account the uncertaintiesaffecting other geometrical and physical parameters of the device.Such an investigation is carried out in the most severe conditionsfor the MWCNTs-based device, i.e., for short and thin wire struc-tures, starting from the minimum interconnect length for which theMWCNT outperforms the Cu-based solution. A worst case poly-nomial expression of the time delay as a function of the number ofthe shells of the MWCNT, obtained on the basis of the equivalentsingle conductor model of the nano-interconnect, is adopted forthe optimization procedure. The minimum number of shells thatlead to outperform the Cu-based solution is determined by the useof an approach relying on a particular application of the intervalanalysis to find the upper bound of the performance function. Thequality of the results is checked by a Monte Carlo analysis.

Index Terms—Interconnect, interval analysis (IA), multiwallcarbon nanotube (MWCNT), robust design, time delay.

I. INTRODUCTION

THE EXTREME properties of carbon nanotubes (CNTs)make them a good candidate for advanced interconnects to

achieve the performances required by the international technol-ogy roadmap for semiconductors (ITRS) for the new generationof integrated circuits (ICs) [1]. However, in order to achievereliable and effective interconnect techniques, the control of themorphological characteristics of CNTs is of paramount impor-tance. In particular, CNTs synthesis must be precisely controlledto address specific features, such as positioning, morphological

Manuscript received December 8, 2011; revised February 16, 2012; acceptedApril 18, 2012. Date of publication May 11, 2012; date of current versionJuly 11, 2012. This work was supported by EC’s funded research projectCATHERINE—Carbon Nanotube Technology for High-speed Next-GenerationNano-Interconnects under Project GA 216215. The review of this paper was ar-ranged by Associate Editor J. Li.

P. Lamberti and V. Tucci are with the Department of Electronic andComputer Engineering, University of Salerno, 84084 Fisciano, Italy (e-mail:plamberti@unisa.it; vtucci@unisa.it).

M. S. Sarto and A. Tamburrano are with the Research Center for Nanotech-nology Applied to Engineering, Sapienza University of Rome, 00184 Rome,Italy (e-mail: mariasabrina.sarto@uniroma1; alessio.tamburrano@uniroma1).

Copyright (c) 2012 IEEE. Personal use of this material is permitted. However,permission to use this material for any other purposes must be obtained fromthe IEEE by sending a request to pubs-permissions@ieee.org.

Color versions of one or more of the figures in this paper are available onlineat http://ieeexplore.ieee.org.

Digital Object Identifier 10.1109/TNANO.2012.2198922

characteristics, etc [2]–[4]. A recently explored attractive ap-proach is one in which multiwall CNTs (MWCNTs) are grownby chemical vapour deposition (CVD) inside the pores of alu-mina membranes [5]–[8].

The general problem occurring with electronic technologyscaling, related to random manufacturing variations of the dif-ferent physical and geometric parameters, must be carefullyconsidered in the design of future interconnects based on CNTs.In fact, due to the very complex manufacturing processes asso-ciated with future CNT-based interconnect, the study of theeffects of the process variations associated with CNTs are vi-tal for evaluating the reliability of such interconnect solutions.As an example, appreciable variations in CNT diameters mayoccur depending on the fabrication process parameters. This de-termines the variation of the conductance of the CNTs, whichin turn affects the propagation characteristics of the CNT-basedinterconnect [2]–[5]. In order to optimize cost and performancesof a given technological solution, it is then necessary to iden-tify the allowable ranges of the physical parameters variation,corresponding to the maximum acceptable deviation from thetargeted performances. Such parameters can be categorized intotwo classes, the controllable and uncontrollable factors, accord-ing to the possibility of being adjusted during the manufacturingprocess (controllable factors) or being known in a range aroundthe nominal value due to fabrication tolerances or the change ofworking conditions (uncontrollable factors).

The time delay at 50% (τ 50% ), one of the most relevant param-eter to assess the performance of an interconnect, is generallyevaluated by means of transmission line (TL) models [9]–[13],in which the per unit length (p.u.l.) circuital parameters takeinto account the specific conduction, electrostatic, and magneticcharacteristics of CNT structures. The expressions of the p.u.l.parameters of the TL, depending on the physical and geometricquantities of the CNT structures, are thus affected by sensiblevariations and uncertainties. In particular, in order to decreasethe τ 50% of an MWCNT-based interconnect, the resistive andcapacitive terms of the TL model must be minimized. The re-sistive term is mainly influenced by the number of shells (walls)N of the MWCNT and by their electron transport properties,which can be both controlled by acting on the parameters ofthe CVD process. The electrostatic capacitance term dependsmainly on the external configuration of the interconnect, suchas the distance from the ground plane which generally variesdue to the manufacturing tolerances.

In this paper, we present a study that allows us to iden-tify the minimum number of shells of an MWCNT requiredto guarantee a τ 50% lower than that one associated with a

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800 IEEE TRANSACTIONS ON NANOTECHNOLOGY, VOL. 11, NO. 4, JULY 2012

conventional Cu-based nano-interconnect. Such an analysis,which takes into account the uncertainties affecting relevant ge-ometrical and physical parameters of the device, is carried outfor the near, medium, and long-term (respectively, 32, 21, and15 nm) technology nodes, by considering DRAM M1 half-pitchdimension for the width w of nano-interconnects having unitaryaspect ratio [1]. This arrangement represents a worst case (WC)condition for the MWCNT approach. In fact, it has been alreadyshown, by using a distributed circuit model [4], that the trans-mission performances of semiglobal and global interconnectsemploying large diameter MWCNTs are better than those madeof copper. An opposite behavior occurs for short interconnects(e.g., Metal 1). Such a theoretical prediction is also confirmedby experimental findings [14]. The adopted design procedure isdeveloped considering for each technology node the minimuminterconnect length that ensures to MWCNTs higher perfor-mances with respect to copper. Furthermore, the performancereliability of the MWCNT configuration is determined againstthe variability of several uncontrollable factors depending onmanufacturing tolerances that are relevant, for example, to theapproach in which MWNCTs are grown by Chemical VapourDeposition (CVD) inside the pores of alumina templates [8]. Inparticular, the nanotube external radius rN , the relative dielectricconstant of the medium εr , the contact resistance of the jth shellof the MWCNT Rmj , and the distance from the ground plane dare considered. In addition, also the influence of the intercon-nect operating temperature T is analyzed. Thanks to the featuresof the adopted modeling based on the stochastic approach pro-posed by Naeemi [15]–[17], other possible uncertainties whichtheoretically may affect the performances, such as the numberand positions of the semiconducting walls inside the MWCNTs,are implicitly considered in the proposed analysis.

The analysis is conducted by considering a suitable polyno-mial relation between the performance function (PF) of theMWCNT-based interconnect (i.e., τ 50% ) and the consideredcontrollable design factor N. Such a relation is achieved byinterpolating the results of numerical simulations performedapplying the equivalent single conductor (ESC) model for anMWCNT [12]. An efficient procedure based on a suitable com-bination of interval analysis (IA) and WC approach is employed.The proposed procedure can be framed in the general contextof interval response surface approach [18]. The IA has beenapplied in interconnect design problems in which the circuitparameters varied in a defined range [19], [20]. The peculiarityof the procedure proposed in this paper is that the boundingproperties of IA are employed to obtain an analytical formula-tion of the PF optimization. Moreover, by operating only on thecontrollable factor, the procedure allows to optimize the PF in arobust way with respect to all the parameters, i.e., to fulfill thedesign requirements also in presence of uncertainties on the un-controllable parameters. The limitations concerning either thereliability of the results or the computational burden intrinsicallyaffecting stochastic methods, such as the Monte Carlo approach,can be efficiently avoided.

The paper is organized as follows. The ESC model that allowsobtaining the relation between the PF and the design factor arepresented in Section II. The procedure that leads to achieve an

Fig. 1. Schematic configuration of (a) nanointerconnect, (b) cross section ofthe MWCNT, and (c) ESC circuit.

optimized and robust design is described in Section III, whereasthe obtained results are presented and discussed in Section IV.Finally, the main conclusions are drawn in Section V.

II. EQUIVALENT SINGLE CONDUCTOR (ESC) MODEL

OF THE INTERCONNECT

The ESC model for an MWCNT-based interconnect has beenpresented in [11]. Herein the main features of the model are sum-marized for the sake of clarity and completeness. We considerthe horizontal nano-interconnect sketched in Fig. 1(a), formedby an MWCNT interconnect located above a perfect conductingground plane in a linear dielectric material, having relative elec-trical permittivity εr . The cross section of the MWCNT is shownin Fig. 1(b): the intershell distance δ is equal to 0.34 nm, the in-ner and outer shell radii are r1 and rN , respectively. The numberof the equally spaced shells is then given by the following:

N = int(

rN

δ

(1 − r1

rN

))(1)

where int (·) stands for the integer part of the number betweenbrackets. In the following, it is assumed that each shell of theMWCNT can be modeled as a quantum wire having a numberof conducting channels given by the following expression [15],[16]:

nj =

⎧⎪⎨⎪⎩

2aTrj + b, rj >dT

2T23, rj <

dT

2T

j = 1, N. (2)

LAMBERTI et al.: ROBUST DESIGN OF HIGH-SPEED INTERCONNECTS BASED ON AN MWCNT 801

TABLE IRANGE OF ACCEPTABLE VALUES FOR N ACCORDING

TO [16] FOR EACH TECHNOLOGY

where T is the absolute temperature a = 3.87× 10−4 nm−1 ·K−1 ,b = 0.2, and dT = 1300 nm·K. It is worth noting that (2) hasbeen obtained from experimental results in which the ratio r1 /rN

is in the range 0.3–0.8 [14], [17], [21]. Therefore, that impliesan acceptable range of values for N, defined considering (1) forthe interconnect configurations investigated in the present study.The obtained minimum and maximum values of N are reportedin Table I for each considered technology.

The ESC model of an MWCNT interconnect is derived con-sidering that all shells are connected in parallel at both ends sothat only the common mode (CM) of propagation is excited [11].

The CM current i and voltage v propagating along the ESCare defined as follows:

i =N∑

j=1

ij (3a)

v = vj for j ∈ [1, N ] (3b)

in which ij and vj are, respectively, the current and voltage ofthe jth shell of the MWCNT. The TL propagation equations ofthe ESC are as follows:

∂v

∂z= −R′ i − (L′

e + L′k )

∂i

∂t(4a)

∂i

∂z= −

(C ′−1

e + C ′−1q

)−1 ∂v

∂t(4b)

in which R′ is the equivalent p.u.l. quantum resistance, L′e and

L′k are the equivalent p.u.l. magnetic and kinetic inductances,

respectively, C′e and C′

q are the equivalent p.u.l. electrostaticand quantum capacitances, respectively. R′ is obtained as theparallel of the p.u.l. resistances of each shell of the MWCNT inthe case of a diffusive transport phenomenon (mean free path ofthe external shell N much greater than the CNT length):

R′ =

⎡⎣ N∑

j=1

nj

Riλmfp,j

⎤⎦−1

(5)

where Ri = h/(2e2) is the intrinsic quantum resistance of aquantum wire, e being the electron charge and h the Planck’sconstant, and λmfp,j is the mean free path of the jth shell. λmfp,j

can be expressed as a function of the shell radius rj , and theabsolute temperature by considering a reference temperatureT0 = 100 K [16]:

λmfp,j =2 · 103rj

(T/T0) − 2. (6)

The inductance L′e is the p.u.l. magnetic inductance of the

outer Nth shell of the MWCNT. L′k can be expressed as

L′k =

h

4e2vF ntot(7)

where νF = 8·105 m/s is the Fermi velocity and ntot is the totalnumber of conducting channels of the MWCNT.

The capacitance C ′e is given by the p.u.l. external capacitance

of a cylindrical conductor having the same radius rN of the outershell of the MWCNT. C ′

q can be calculated in [nF/m] by [11]:

C ′q = 2.56 · 10−2N + 7.525 · 10−2r1 + 9.887 · 10−2 . (8)

The ESC of the MWCNT is reported in Fig. 1(c) [11], inwhich L′ and C′ are the total p.u.l. inductance and capacitance

L′ = L′k + L′

e (9a)

C ′ =(

1C ′

q

+1C ′

e

)−1

. (9b)

The terminal resistances appearing in the ESC circuit havethe following expression:

Rm

2=

12

⎡⎣ N∑

j=1

(Ri

2nj+ Rmj

)−1⎤⎦−1

(10)

where Rmj takes into account the effect of the voltage dropat the jth shell–metallic electrode interfaces due to imperfectterminal contacts [22]. Notice that, in the case of a pure ballisticconduction mechanism, the total dc resistance can be expressedby means of a lumped resistance with a value equal to Rm [16].

Rd and CL are the equivalent gate drive resistance and loadcapacitance, respectively.

The time-delay τ 50% is defined as the time the output voltagevout takes to reach the 50% of its maximum value. It is computedby performing time domain simulations on the circuit in Fig. 1(c)using the commercial circuit simulator Simulink.

III. OPTIMIZATION PROCEDURE

The optimized design concerns interconnects of three dif-ferent technology nodes according to ITRS [1], namely 32,21, and 15 nm. In order to identify the number of MWCNTshells leading to an outperforming behavior with respect to theCu-based solution, the less favorable conditions concerning thecross section and the length of the MWCNT device are assumed.As mentioned in Section I, this condition corresponds to haver1 /rN = 0.8 (i.e., minimum number of shells, see Table I), min-imum cross section and shortest length. Therefore, the width ofthe IC is fixed to the gate length of local (Metal 1) intercon-nect with unit aspect ratio. As it concerns the length, insteadof examining the entire theoretical range for Metal 1 intercon-nects (i.e., from 0.1 to 10 μm), the critical value lmin ensuringthat the MWCNT device outperforms the Cu-based structure iscomputed. Indeed, for length values lower than lmin , the op-timization is useless since literature results [4] and our modelpredicts that MWCNTs exhibits an inferior performance. A lo-cal search approach [23] is adopted by comparing the delay of

802 IEEE TRANSACTIONS ON NANOTECHNOLOGY, VOL. 11, NO. 4, JULY 2012

TABLE IIVALUES OF RELEVANT PARAMETERS FOR SIMULATION

ACCORDING TO ITRS 2009 [1]

the MWCNT solution to that of the Cu-based nanointerconnectwith a square cross section [the red square in Fig. 1(b)]. Thetime delay for copper is computed by using a classical lossyTL model [24] with the resistivity ρeff suggested by ITRS. Theresults are reported in Table II. Such a procedure is also capableto provide the Cu-threshold τCu that will be used in order toperform the robust design.

Both MWCNT and Cu interconnects are modeled with thecascade of nz = 100 TL sections having length Δz = l/nz . Thevalues of the minimum size gate driver resistance Rd and loadcapacitance CL in the equivalent circuit of Fig. 1(c) are definedaccording to ITRS indications, and reported in Table II.

The robust design of the MWCNT-based interconnect is per-formed in the worst-case condition, i.e., under the hypothesisthat all the variables are uncorrelated, with values uniformlydistributed in their variability range.

The objective of the optimization procedure is to define theMWCNT interconnect configuration characterized by τ 50% (theperformance function, PF) lower than that of the ideally scaledtraditional copper interconnect, τCu . The PF depends on sev-eral geometrical characteristics and physical properties of theadopted materials. As discussed in Section I, not all the pa-rameters can be controlled. In the case herein considered, byacting on the technological process of the MWCNT growth,we can control the MWCNT wall thickness, i.e., the num-ber of shells N. On the contrary, the other five parametersy = [y1 , y2 , ..., y5 ] = [rN , εr , Rmj , T, d] ∈ �5 affecting the PFcannot be directly controlled. Therefore, only with respect tothe variable N the optimal PF is searched for, considering atolerance interval ±Δ. The optimization problem can thus bestated as follows:

′′To find

x0 ∈ Xf = [xMIN , xMAX] that leads to τ50%(y, x

)< τCu

∀ yi ∈ [yi,MIN , yi,MAX] = Yi i = 1, 2, . . . 5, and

∀x ∈ X = [x0 − Δ, x0 + Δ]′′

in which x = N.A suitable relation among the time delay and the parameter set

can be constructed by simulating the ESC of Fig. 1(c) for eachcombination of (y, x) representing a sample in the parameterspace Π = Y1 × Y2 × · · · × Y5 × X ⊂ �6 .

The optimization problem is then faced by looking at thepolynomial interpolation of τ 50% computed in the WC for theuncontrollable parameters fpi , i.e.

′′To find x0 that leads to maxx∈X

(fpi) < τ ′′Cu

where fpi is a polynomial in x of order μ, interpolating the prop-agation delay, obtained by setting the uncontrolled parametersin the WC condition

fpi (x) ∼= τ50%

(y

WC, x

)=

μ∑i=0

bixi. (11)

The WC set yWC

corresponds to that leading to the maximumvalue of the PF since the objective of the design is the realiza-tion of an interconnect that minimizes the propagation delay.Such a set is found by applying a one-factor-at-a-time inspec-tion procedure [25]: each uncontrollable factor varies, one ata time, among λ = 5 levels in the considered range, while allother parameters are fixed at the nominal value. Once the WCset is achieved, the polynomial form is determined by evaluat-ing fpi with a ν-level uniform sampling of the compact Xf . Thepolynomial order is selected according to a convergence crite-rion based on the R2

adj index (a statistical indicator taking intoaccount the number of observations and unknowns that is ableto point out the goodness of the fit). The polynomial order isincremented until the improvement in the index is less than 1%.The number of levels is initially fixed to 10 and incrementedin case the coefficient matrix in the solution of the algebraicsystem (11) is ill conditioned. The maximum of the interpolat-ing function is estimated in an analytic way by exploiting theinclusion property of IA [26] that leads to obtain

maxx∈X

(fpi) ≤ sup {Fpi (X)} (12)

where Fpi is the interval taylor extension [27] of the PF:

Fpi (X) =μ∑

k=0

Δkf

(k)pi (x0)

k!Y k (13)

where Y = [−1, 1] ∈ I � is a constant interval. In particular, theinterval function Fpi is obtained by substituting in the Taylorseries of the PF

fpi (x) =μ∑

k=0

f(k)pi (x0)

k!(x − x0)k (14)

the variable x with the compact X. The maximum of the functionis upper bounded by the right extreme of the interval Taylor ex-tension (ITE) that is dependent on the amplitude of the interval,i.e., the tolerance Δ, and on the central value of the interval x0 .Finally, the optimization problem can then be rewritten as′′To find x0 that leads to sup {Fpi(X)} = τITE(x0 ,Δ) < τCu .′′

In order to design an interconnect that outperforms the Cu solu-tion with an assigned uncertainty on the number of shells, i.e.,with a given control on the fabrication process, the optimizationcan be reliably performed by looking at the upper bound of Fpiin an easy and analytic way, rather than with a time-consumingMonte Carlo procedure.

IV. RESULTS AND DISCUSSION

Several sources of variability may affect the performancesof a nano-interconnect. Some of them, as the wire thicknessand width, or the thickness of the dielectric layer interposed

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TABLE IIIPARAMETERS AND CONSIDERED VARIATION RANGES

TABLE IVCALCULATED VALUES OF CRITICAL LENGTH lm in AND TIME DELAY

THRESHOLD FOR THE CU INTERCONNECT OBTAINED FOR Nm in

between the wires and between them and the ground plane, arecommon for the considered MWCNT-based approach and forthe scaled Cu technology. Other sources, such as CNT diametervariation and contact resistance are peculiar of the manufac-turing technique adopted for the realization of the CNT-basedinterconnects. The effects of different causes of uncertaintieson the performances of CNT interconnects have been examinedin [3] and [28]. The analysis proposed in the present paper is fo-cused on uncertainties concerning some significant parametersaffecting the growth of MWCNTs inside the pores of aluminatemplates [8]. In addition, the variability of an operation param-eter, such as the temperature, is accounted for.

As previously stated, the design parameter is the number ofshells of the MWCNT. An extensive research activity has beenconducted on its variability with the CVD operational param-eters which are discussed in [8]. In particular, a max toleranceΔ of ±5 shells has been assumed as WC for the consideredCNTs diameters. In addition, according to experimental evi-dences [29], a 10% tolerance is valid for the pore diameter of thealumina membrane used as a template for the CNT growth (i.e.,an uncertainty of 10% of the external radius of the MWCNT)and a range of [2.7, 3.3] for the relative permittivity which de-pend on the characteristics of the alumina support. The rangefor the contact resistance is considered in accordance to liter-ature values [3], [4]. An excursion of +100 ◦C is assumed forthe operating temperature of the interconnect [30]. It is worthnoting that the variability of such parameters automatically gen-erates also a tolerance on other relevant quantities, such as themean free path. The variability ranges for the uncontrollableparameters and controllable ones are reported in Table III.

For each technology node, the nominal threshold τCu and theminimum length lmin , for which the nominal MWCNT-basednano-IC outperforms the Cu solution are reported in Table IV.

The interpolation can be done by performing S = (λ× 5) + νsimulations: the product in parenthesis refers to the WC selec-

TABLE VWC SETS FOR THE DIFFERENT TECHNOLOGIES

TABLE VICOEFFICIENTS OF THE INTERPOLATING FUNCTION FOR

EACH TECHNOLOGY NODE

tion, whereas ν refers to the determination of the interpolatingpolynomial. In Fig. 2, the simulated propagation delay at the crit-ical length lmin obtained for each uncontrollable parameter isshown. These figures are obtained with all other uncontrollableparameters fixed to their nominal values, whereas the numberof shells is set to Nmin given in Table I.

These evaluations have involved λ × 5 = 25 simulations. Asshown in these figures, the WC values for rN , εr , Rmj , and dare always at the same extreme for the considered technologynodes. In particular, d is at the left extreme (lowest value) for allthe technologies [see Fig. 2(e)], whereas rN , εr , and Rmj leadto highest propagation delay in correspondence of their highestvalues [right extremes in Fig. 2(a)–(c)].

The results for εr , Rmj and d are in line with theoretical ex-pectations since higher (electrostatic) capacitances and (contact)resistances lead to larger delays. In particular, Rmj determinesthe greatest variability of the delay. The temperature shows onlya limited influence on the performance. The WC condition isfound at the left extreme for the 32-nm technology and on theright one for the 21- and 15-nm technologies [see Fig. 2(d)].Such a result can, indeed, be attributed to the expressions (2),(5), and (10) governing the conductive characteristics of theMWCNT. The obtained WC sets are summarized in Table V.

In Table VI, the coefficients of the interpolating function fpi ,corresponding to each technology, are presented. They are ob-tained by performing respectively ν = 11, 10, and 10 simulationson the circuit of Fig. 1(c), when x = N spans its range Xf witha ν-level uniform sampling.

In particular, NMIN is fixed according to Table I, and NMAX isobtained by considering the case in which the MWCNT fills en-tirely the membrane pore, i.e., NMAX = int(rN /δ), where δ is theVan der Waals intershell gap. Starting from (11), with the coef-ficients given in Table VI and adopting the procedure describedin the previous section, the upper bound values of the τ ITE (thePF) can be obtained for different values of the tolerance Δ andfor each technology. The results of such procedure are depictedin Fig. 3(a)–(c) for a MWCNT-based interconnect having thecritical lengths lmin reported in Table IV. The minimum num-ber of shells N0min,Δ that guarantees a τ 50% lower than thatof the corresponding Cu-based solution is obtained considering

804 IEEE TRANSACTIONS ON NANOTECHNOLOGY, VOL. 11, NO. 4, JULY 2012

Fig. 2. Simulated propagation delay versus uncontrollable parameters. Theirranges are reported in Table III: Each uncontrollable factor varies, one at a time,among five levels in the considered range, while all other parameters are set atthe nominal value and the number of shells corresponds to Nm in .

Fig. 3. Upper bound values of τ 50% versus number of shells of the MWCNTfor an interconnect whose length is fixed at lm in . (a) 32 nm, lm in = 0.5 μm.(b) 21 nm, lm in = 1 μm. (c) 15 nm lm in = 1.3 μm. The thicker markers identifythe minimum number of shells that guarantees a propagation delay better thanthat of the Cu-based solution.

the intersection of the τ ITE curves with the assumed referencevalue for τ 50% (i.e., τCu ) in the ranges of N given in Table I.In particular, the first integer value of N greater than the inter-section point gives the minimum number of shells that satisfiesthe requirement. Each curve refers to different values of theassumed tolerance Δ on the wall thickness (i.e., the number ofshells). Therefore, for a fixed N, the curve computed for Δ =0 will provide the minimum expected value of the τ ITE , theone obtained for Δ = 5 will give the maximum τ ITE . More-over, for a fixed value of τ ITE , the plots in Fig. 3(a)–(c) willprovide the combination of shell number and max tolerance toachieve a robust solution. It is worth remarking that this resultis obtained in a deterministic way without onerous computa-tional efforts. The plots in Fig. 3(a) put in evidence that, for anumber of shells greater than 20 the τ ITE of a 32-nm MWCNTinterconnect is always lower than τCu . The minimum numberof shells allowing to satisfy the constraint is 20, but in this casethe robustness of this solution is ensured only if the productionprocess is able to guarantee a very accurate control on tolerance

LAMBERTI et al.: ROBUST DESIGN OF HIGH-SPEED INTERCONNECTS BASED ON AN MWCNT 805

Fig. 4. Upper bound of τ 50% versus number of shells of the MWCNT for a15-nm interconnect whose length is fixed at l = 1.5 μm.

(Δ = 0). If higher values of Δ are considered for N = 20, τ ITEbecomes higher than τCu limit. Increasing values of N allowrelaxing the constraints on the production process. This means,for example, that if the number of shells can be determined (bycontrolling the CVD process parameters) with an accuracy Δ =±3 (i.e., a resolution on wall thickness of about 1 nm), the min-imum number of shells N must be 23 (i.e., an inner radius of theMWCNT equal to 12 nm). Assuming the maximum consideredtolerance Δ = ±5, the minimum number of shells ensuring arobust solution is 25.

For the 21- and 15-nm technologies [see Fig. 3(b) and (c)],only certain combinations of number of shells and tolerance Δallow us to obtain τ ITE < τCu , in the relevant range of accept-able values of N. In particular, for the 21 (15) nm technology,the minimum number of shells for which τ ITE < τCu is 17(13), but this design is robust only with Δ = 0. Moreover, byconsidering that the NMax value in Table I is 21 (15), from theplots of Fig. 3(b) and (c), it can be noted that the less stringentcombination leading to an assured robust solution is N = 21,Δ = ±4 (N = 15, Δ = ±2). If such design parameters areassumed, the upper bound of the time delay is 4.17 ps (3.35 ps).

It is worth remarking that these design sets have been obtainedfor an interconnect length fixed at the critical value lmin . If longerinterconnects are considered, the tolerance constraints can berelaxed and the robustness of the solution can be ensured evenfor the max tolerance Δ =±5. As an example, in Fig. 4 the plotsshow the τ ITE versus N for a 15-nm technology interconnecthaving a length l = 1.5 μm. It can be noted that in this case allcurves obtained for the different tolerances are below the τCulimit.

The quality of the obtained results, i.e., the ability to predicta reliable upper bound to the time delay for a combination ofnumber of shells and associated tolerance of the MWCNTs-based interconnect is assessed applying a classical Monte Carloprocedure in which τ 50% is calculated by repeated simulationson the circuit model in Fig. 1(a). The values of all parametersare assumed to be distributed with uniform probability in theirranges. Moreover, their distributions are assumed to be uncor-related (i.e., a parameter can assume a specific value whicheverare the values of all other ones). Fig. 5 shows the transient wave-forms of the computed output voltages of the circuit in Fig. 1(c)when a unit step input supplies a 21-nm MWCNT-based inter-

Fig. 5. Output voltages to a unit step input applied to the circuit of Fig. 1(c)for a 21-nm MWCNT-based interconnect. The curves of the output voltages areobtained by performing 100 Monte Carlo time domain simulations with (a) N =20 and Δ = ±3 and (b) N = 15 and Δ = ±3.

connect. The curves, shown in Fig. 5(a) and (b), are obtainedperforming 100 Monte Carlo time domain simulations for N =20 and N = 15 having, respectively, Δ = ±3. In both figuresthe two vertical lines represent τCu (indicated in Table IV) andτ ITE obtained applying the optimization procedure describedin the previous Section. Notice that τ ITE assumes the values of4.17 ps and 4.84 ps for N = 20 and N = 15, respectively. Theplots of Fig. 5(a) show that the combination of design parame-ters N = 20, Δ = ±3 leads to a robust configuration: all curvescross the horizontal line denoting 50% vout on the left of τCu .A different condition is obtained in Fig. 5(b), which illustratesa nonrobust solution. In fact, there are some curves intersectingthe 50% vout line on the right of τCu . Moreover, it can be notedthat in both cases the τ ITE estimated by applying the methodproposed in this paper represents effectively an upper bound ofthe delay times, since all Monte Carlo time responses intersectthe 50% vout line on the left of τ ITE .

It is worth noticing, indeed, that the stochastic Monte Carloapproach is not computationally efficient. In fact, the parametersspace Π has to be explored for each value of N, starting fromthe minimum allowed value (the left extreme of the intervalXf ) until the constraint on the PF is fulfilled. Therefore, if Π isexplored with TMC trials, at least [(N0min ,Δ –Nmin ) + 1]×TMCtime domain simulations on the circuit of Fig. 1(c) are requiredto determine τ 50% . This procedure has to be repeated for all theconsidered tolerance values. As an example, with TMC = 100in the case of a 21 nm technology and a tolerance Δ = ±2, theminimum number of shells, N0min ,2 that fulfills the constraint,requires 15 × 100 simulation on the circuit in Fig. 1(c) (i.e., N0

806 IEEE TRANSACTIONS ON NANOTECHNOLOGY, VOL. 11, NO. 4, JULY 2012

from 7 to 21). On the contrary, the proposed procedure basedon ITE requires only S = (λ × 5) + ν = 35 simulations for allthe possible values of Δ. Moreover, the MC analysis providesan “underestimated” upper value assumed by the PF. The “true”upper value can be reached only by increasing the numbers TMCof trials for all the considered tolerance values Δ.

V. CONCLUSION

A robust design of an MWCNT-based interconnect for thenear term (32 nm) and for long term (21 and 15 nm) technol-ogy nodes, taking into account the uncertainties affecting somegeometrical and physical parameters of the device, has beensuccessfully carried out. In particular, the considered parame-ters are those dependent on the production process of MWCNTswhose growth is obtained inside the pores of alumina templates.The minimum number of shells N able to guarantee that the timedelay at 50%, τ 50% is shorter than the one of a correspondingCu-based interconnect has been determined in the less favor-able conditions concerning the cross section and the length ofthe MWCNT interconnect. In these conditions the robustness ofthe solution is assessed with respect to the achievable toleranceon the number of shells.

The proposed design procedure relies on a suitable polyno-mial relation between the τ 50% of the MWCNT-based intercon-nect and the design factor N. It allows us to obtain in an analyticway the upper bound assumed by the time delay without thecomputational burden, which is intrinsic of stochastic methods,such as the Monte Carlo approach. The obtained informationmay allow adopting less stringent constraints in the MWCNTmanufacturing process.

The adopted model considers that all the shells have the samevalue for the imperfect contact resistance. For the so called “sidecontacts” configuration, it could happen that only the outer shellsare in intimate contact with the electrode (low value for Rmj ),whereas the inner ones present higher values for Rmj . Thisaspect can be included in a future development of the model.

The study has been limited to MWCNT-based structures,which can be obtained by a single MWCNT. In the case oflarger cross sections, as those relevant to global and semi-global interconnects the use of more than one or a bundle ofMWCNTs can be required. This would imply the implementa-tion of a new TL model for the combination of the different (par-allel connected) MWCNTs taking into account the distributedcouplings among them. However, the development of such amodel is beyond the scope of the present study and will beconsidered in forthcoming papers.

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LAMBERTI et al.: ROBUST DESIGN OF HIGH-SPEED INTERCONNECTS BASED ON AN MWCNT 807

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Patrizia Lamberti (M’08) was born in 1974. Shereceived the Laurea degree in electronic engineeringand the Ph.D. degree in information engineering fromthe University of Salerno, Salerno, Italy, in 2001 and2006, respectively.

Since January 2005, she has been an Assistant Pro-fessor of electrotechnics in the Department of Elec-tronic and Computer Engineering (DIEII), Univer-sity of Salerno. Since 2002, she has been involvedin experimental research on materials and innovativecomposites for electrical engineering applications at

the DIEII Lab for Electromagnetic Characterization of Materials. The researchactivity has led to several scientific publications in international journals andin proceedings of national and international conferences. The main researchsubjects concern numerical methods for electromagnetic fields, optimizationalgorithms, tolerance analysis, and robust design of electromagnetic systems.

Maria Sabrina Sarto (F’10) received the Laurea(summa cum laude) and the Ph.D. degrees in elec-trical engineering from the Sapienza University ofRome, Rome, Italy, in 1992 and 1997, respectively.

Since 2005, she has been a Full Professor of elec-trotechnics and electromagnetic compatibility (EMC)at the Faculty of Engineering, Sapienza University ofRome, where she was also the Director of ResearchCenter on Nanotechnology Applied to Engineeringin 2006, the EMC Laboratory of the Department ofElectrical Engineering in 1998, and of the Sapienza

Nanotechnology and Nanoscience Laboratory in 2011. She has published morethan 120 papers in the field of EMC, numerical electromagnetics, advancedmaterials for EMC. Her current research interests include carbon nanotubeinterconnects modeling and design, carbon nanotube and graphene-based nano-materials for EMC, and EMC in aerospace.

Dr. Sarto was a Distinguished Lecturer of the IEEE EMC Society in 2001and 2002. She has been an Associate Editor of the IEEE TRANSACTIONS ON

ELECTROMAGNETIC COMPATIBILITY since 1998, Co-Chair of the IEEE EMCSociety TC11 on “Nanotechnology and Advanced Materials,” member of theAdvisory Board of the IEEE Council on Nanotechnology, and the Chair of theworking group IEEE STD 299.1 of the IEEE EMC Society. She received severalawards from IEEE EMC Society and SAE.

Vincenzo Tucci (M’96) received the Laurea degreein electronic engineering (cum laude) from the Uni-versity of Naples Federico II, Napoli, Italy, in March1981.

In 1983, he joined the Department of ElectricalEngineering, University of Naples Federico II as aResearcher, and in 1992, he was an Associate Pro-fessor at the Faculty of Engineering , Polytechnic ofMilan, Milan, Italy. Since 1994, he has been with theDepartment of Electronic and Computer Engineer-ing, University of Salerno, Fisciano, Italy, where he

is a Full Professor of Electrical Engineering in 2000. Recently, he has beenengaged in research activity concerning carbon nanotube technology for high-speed nanointerconnects. He is the author or coauthor of more than 130 scientificpapers in journals and the proceedings of international conferences. His researchinterests include the electromagnetic characterization and treatment of materi-als, the numerical methods for the design of electromagnetic components, andthe techniques for robust design.

Prof. Tucci serves as a member of the evaluation board in national and inter-national research projects. He is a reviewer of scientific journals and technicalcommittees of several international conferences and workshops. He is a memberof IEEE (TC11 Nano-technology), AEIT, and WG 36B of CEI.

Alessio Tamburrano (M’02) received the Laurea(summa cum laude) and the Ph.D. degrees in elec-trical engineering from the Sapienza University ofRome, Rome, Italy, in 2003 and 2007, respectively.

Since 2006, he has been an Assistant Professorin the Sapienza University of Rome,” Italy, wherehe is currently with the Department of Astronauti-cal, Electrical and Energetic Engineering (DIAEE),Sapienza University of Rome. He is also a Researcherin the Research Center on Nanotechnology Appliedto Engineering, Sapienza (CNIS). His research in-

terests include the field of electromagnetic compatibility and nanotechnology.In particular, it concerns the electromagnetic modeling and characterizationof microcomposites and nanocomposites including carbon fibers, graphenenanoplatelets, carbon nanotubes, and the analysis of the transmission line per-formances of nanointerconnects made of single-wall carbon nanotube bundles,multiwall carbon nanotubes, and graphene nanoribbons for future high-speedelectronics. She has published more than 45 papers in international journals andproceedings of international symposia.

Dr. Tamburrano is a member of the IEEE EMC Society and is with thetechnical committee of the IEEE EMC Society TC-11 “Nanotechnology and ad-vanced materials”. Since 2010 he is the project leader of the Joint Project Team“80004-9—Nanotechnologies—Vocabulary—Part 9: Electrotechnical productsand systems” of the International Electrotechnical Commission.