Stability analysis of a two-cell DC/DC converter using a dynamic time delayed feedback controller

6
2010 7th Inteational Multi-Conference on Systems, Signals and Devices STABILIT Y ANALYSIS OF A TWO-CELL DCIDC CONVERTER USING A DYNAMIC TIME DELAYED FEEDBACK CONTROLLER K Koubaa1, M Fel, A. El AroudP, B. G. M RoberF and N Derbe[1 lResearch Unit lCOS, National Engineering School of Sfax, BP 1173,3038 Sf , Tunisia. e-mail: [email protected].moez[email protected] , [email protected] 2Research group GAEl, Technical Engineering School of the Rovira i Virgili University, Spain. e-mail: [email protected] 3Laboratory CReSTIC, University of Reims-Champagne-Ardenne, France. e-mail: bruno.robert@univ-reims.fr ABSTRACT In this paper, we are interested in studying the stability of the two-cell DCIDC buck converter. First, this system is described by a discrete nonlinear model in the state space. Next, we design a dynamic time-delayed feedback con- troller to assure equal distribution of the potential differ- ence between the cells and to achieve a reference cuent through the load. According to the controller parameters, two cases are treated in this paper. A stability analysis of the system is carried out for each case. These results are confirmed with numerical simulations. Ind Ter- DCIDC buck converter, Nonlinear model, Dynamic time-delayed feedback controller, Stability anal- ysis. 1. INTRODUCTION Power electronics is a relatively new and fast-growing area of electronics with wide practical applications. Much of the development in the field of power electronics evolves around some immediate needs for solving specific power conversion problems [6, 7, 10]. The conversion is carried out by storing the energy of the source during a part of the nctioning period, then transferred towards the load in the rest of the period, thanks to an adequate control law applied to the switches (e.g PWM). Power convert- ers manage the electrical energy in more and more com- plex and varied industrial processes. So, their structures change to satis higher requirements. Indeed, the multi- cell converters are developed to reduce the consequences of the defects of switches. As a concrete example of a power converter, we study in this paper the DCIDC buck converter, which is one of the simplest but most usel power converters: a chopper circuit that converts a DC This work is supported by the The Spanish Agency for Inteational Co-operation and Tunisian Ministry of Higher Education with the Grant number 021698/08. 978-1-4244-7534-6/10/$26. 00 ©2010 IEEE input to a DC output at a lower voltage [6]. In litera- ture, it has been reported that the switching operations of DCIDC converters in all their types (buck [1, 3, 11], boost [2, 5], buck-boost [9], C uk [4]) and structures (parallel- connected [2, 13], multi-cell [1, 3]) exhibit a wide range of bircations and chaos, when some parameters are varied. To stabilize the chaotic behavior, several control methods are presented. Recently, dynamic time-delayed feedback controller (DTDFC) has been proposed in [12] to over- come the limitation of static delayed feedback controller, in which the control input is determined only by the dif- ference between the cuent state and the delayed state. DTDFC is defined by a nction which stores the past dif- ferences within the state of the controller. The aim of this paper is to study the stability of the two-cell DCIDC buck converter. We begin by giving the discrete state space model of this system. Next, we pro- pose to control the converter using a DTDFC, which has various forms. In a first step, we give the general form of the controller. Aſter determining the fixed point which depends on the control parameters, two cases can be dis- tinguished. Then, we use the Jury criterion to establish the local stability conditions ound the fixed point. The rest of the paper is outlined as follows: In the next section, we present the discrete model of the two-cell DCIDC buck converter. Section 3 is devoted to analyz- ing the converter behavior with a dynamic time-delayed feedback controller. Finally, the main conclusions and the ture work are given in section 4. 2. DISCRETE MODEL OF THE DCIDC BUCK CONVERTER The two-cell DC/DC buck converter is shown in Fig .1. It consists of two-cells controlled by two switches 81 and 82 in order to allow a higher input voltage. Thus, the sys- tem can be regarded as a variable structure that toggles its topology according to the states of the switches. Each pair foed by a switch 8j and a diode Dj is activated

Transcript of Stability analysis of a two-cell DC/DC converter using a dynamic time delayed feedback controller

2010 7th International Multi-Conference on Systems, Signals and Devices

STABILIT Y ANALYSIS OF A TWO-CELL DCIDC CONVERTER USING A DYNAMIC TIME DELAYED FEEDBACK CONTROLLER

K Koubaa1, M Fekil, A. El AroudP, B. G. M RoberF and N Derbe[1

lResearch Unit lCOS, National Engineering School of Sf ax, BP 1173,3038 Sf ax, Tunisia. e-mail: [email protected]@enig.mu.tn , [email protected]

2Research group GAEl, Technical Engineering School of the Rovira i Virgili University, Spain. e-mail: [email protected]

3Laboratory CReSTIC, University of Reims-Champagne-Ardenne, France. e-mail: [email protected]

ABSTRACT

In this paper, we are interested in studying the stability of the two-cell DCIDC buck converter. First, this system is described by a discrete nonlinear model in the state space. Next, we design a dynamic time-delayed feedback con­troller to assure equal distribution of the potential differ­ence between the cells and to achieve a reference current through the load. According to the controller parameters, two cases are treated in this paper. A stability analysis of the system is carried out for each case. These results are confirmed with numerical simulations.

Index Terms- DCIDC buck converter, Nonlinear model, Dynamic time-delayed feedback controller, Stability anal­ysis.

1. INTRODUCTION

Power electronics is a relatively new and fast-growing area of electronics with wide practical applications. Much of the development in the field of power electronics evolves around some immediate needs for solving specific power conversion problems [6, 7, 10]. The conversion is carried out by storing the energy of the source during a part of the functioning period, then transferred towards the load in the rest of the period, thanks to an adequate control law applied to the switches (e.g. PWM). Power convert­ers manage the electrical energy in more and more com­plex and varied industrial processes. So, their structures change to satisfy higher requirements. Indeed, the multi­cell converters are developed to reduce the consequences of the defects of switches. As a concrete example of a power converter, we study in this paper the DCIDC buck converter, which is one of the simplest but most useful power converters: a chopper circuit that converts a DC

This work is supported by the The Spanish Agency for International

Co-operation and Tunisian Ministry of Higher Education with the Grant

number Al021698/08. 978-1-4244-7534-6/1 0/$26. 00 ©20 1 0 IEEE

input to a DC output at a lower voltage [6]. In litera­ture, it has been reported that the switching operations of DCIDC converters in all their types (buck [1, 3, 11], boost [2, 5], buck-boost [9], Cuk [4]) and structures (parallel­connected [2, 13], multi-cell [1, 3]) exhibit a wide range of bifurcations and chaos, when some parameters are varied. To stabilize the chaotic behavior, several control methods are presented. Recently, dynamic time-delayed feedback controller (DTDFC) has been proposed in [12] to over­come the limitation of static delayed feedback controller, in which the control input is determined only by the dif­ference between the current state and the delayed state. DTDFC is defined by a function which stores the past dif­ferences within the state of the controller.

The aim of this paper is to study the stability of the two-cell DCIDC buck converter. We begin by giving the discrete state space model of this system. Next, we pro­pose to control the converter using a DTDFC, which has various forms. In a first step, we give the general form of the controller. After determining the fixed point which depends on the control parameters, two cases can be dis­tinguished. Then, we use the Jury criterion to establish the local stability conditions around the fixed point.

The rest of the paper is outlined as follows: In the next section, we present the discrete model of the two-cell DCIDC buck converter. Section 3 is devoted to analyz­ing the converter behavior with a dynamic time-delayed feedback controller. Finally, the main conclusions and the future work are given in section 4.

2. DISCRETE MODEL OF THE DCIDC BUCK

CONVERTER

The two-cell DC/DC buck converter is shown in Fig .1. It consists of two-cells controlled by two switches 81 and 82 in order to allow a higher input voltage. Thus, the sys­tem can be regarded as a variable structure that toggles its topology according to the states of the switches. Each pair formed by a switch 8j and a diode Dj is activated

2010 7th International Multi-Conference on Systems, Signals and Devices

E+ R

Figure 1. Structure of a two-cell DC/DC buck converter.

Table 1. Two-cell DCIDC converter different topologies. Topologies State of 31 State of 32

Topology 1 (11) OFF ON Topology 2 (72) ON ON Topology 3 (13) ON OFF Topology 4 (14) OFF OFF

in a complementary manner in such a way that when 3j is ON, Dj is OFF and vice versa (j E {1,2}), then we can define four different topologies in terms of the states of the switches as given in Table 1. The role of the ca­pacitor is to balance the potential differences across the switches. In this circuit, Ul and U2 are the outputs of a Pulse Width Modulator driven by the controller to achieve a constant voltage Vc = � and a constant output current iL = Ir. The voltage Vc across the capacitor and the in­ductor current iL are scaled with their maximum values Vc = E and iL = J.'2R. The state variables are de-

17tax 17tax

fined by Xl = vg and X2 = �iL. Time is also normalized

by the switching period T. Therefore, the duty cycles dl and d2 should vary in the interval [0,1] and are defined with respect to the OFF state of the switches. Also, we will suppose that there exists a phase shift of 7r between the two control signals in order to obtain optimum wave­forms for the inductor current.

Clearly, when Ul and U2 are replaced by their val­ues 1 or 0, we obtain a linear system for each topology. Consequently, we can obtain analytic solution for each different topology. This fact is crucial for obtaining the discrete-time model of the two-cell converter. Toggling between different topologies occurs according to the val­ues of the duty cycles dl and d2 at the beginning of the period. Therefore, we can define six different discrete sys­tems expressing X at the beginning of the (n + 1) th period in terms of its value at the preceding period. By assuming that the switching period is much smaller than the induc­tive and capacitive time constants, then the solution wave­form can be assumed rectilinear. Fortunately, using the foregoing assumptions, the discrete model of all six dis­crete systems simplify to a single one defined by:

Xl(n + 1) = xl(n) - oc (dl(n) - d2(n)) x2(n) (1)

x2(n + 1) = oL (dl(n) - d2(n)) xl(n)

+(1 - OL) x2(n) + oL(l- dl(n)) (2)

RT T . J: Where OL = Land Oc = Re. By assumptIOn, UL « 1 , Oc « 1 which explains low ripple current through the inductor and low ripple voltage across the capacitor. In the sequel, numerical simulations will be carried out with the following parameters: OL = Oc = 0.1, Vr = 0.5 and Ir = 0.6.

3. DYNAMIC TIME DELAYED FEEDBACK

CONTROLLER

3. 1. Controller design

In this section, the duty cycles will be calculated using a proportional controller in conjunction with the DTDFC da to obtain the expressions dl and d2:

dl (n) = sat (kvel(n) + kie2(n) + da(n)) (3a)

d2 (n) = sat ( - kvel (n) + kie2(n) + da(n)) (3b)

Where sat(.) is the saturation function defined by:

sat (d) = min{H(d), Idl}

with H(d) is the Heaviside step function given by:

H(d) = {O, I, if d < 0 if d 2: 0

(4)

(5)

kv and ki designate respectively the voltage gain and the current gain introduced in the expressions of the duty cy­cles dl and d2. The errors are expressed with respect to the reference values Vr and Ir as follows:

el(n) = xl(n) - Vr e2(n) = x2(n) - Ir

(6)

(7)

It has been shown [3] that if da(n) = 0 then only zero voltage error can be obtained. The current error decreases with increasing ki with a limit at ki = lL - 1 beyond which bifurcation and chaos appear. In order to guaran­tee zero errors, we propose to use the general form of the dynamic time-delayed feedback controller:

x(n + 1) = a x(n) + b y(n) da(n) = c x(n) + d y(n)

(8)

(9)

where y(n) = x2(n) - x2(n - I), x is the state of the dynamic controller chosen of dimension one, a, b, c and d are scalar parameters. Let's introduce the new states:

1 xl(n) =

E vc(n)

x2(n) = ;idn)

x3(n) = x2(n - 1)

x4(n) = x(n)

(10)

(11)

(12)

(13)

2010 7th International Multi-Conference on Systems, Signals and Devices

The closed-loop system can be described by: By applying the Jury criterion, we obtain the following stability conditions:

Xl(n + 1) = Xl(n) - 25ckv(xl(n) - Vr) x2(n) (14)

x2(n + 1) = 5Lkv(2xl(n) - 2Vr - 1) xl(n) +[1 - 5£(1 + d + ki)] x2(n) + 5Ld x3(n) -5Le x4(n) + 5£(1 + kv Vr + kilr) (15)

x3(n + 1) = x2(n) (16)

x4(n + 1) = b x2(n) -b x3(n) + a x4(n) (17)

The fixed point denoted by (xi, x;, x3, x:D is obtained by solving the equation x(n + 1) = x(n). According to the value of a, we can distinguish two different cases:

C 1 0 * v: * * 1 + kJr

• ase : ::::; a < 1, Xl = n x2 = x3 = 1 + ki '

andx4 = O .

• Case 2: a = 1, where xi = Vr, x; = x3,

d * 1 + ki * 1 + kJr

an x4 = ---x2 + ---e e

3.2. Case one

In this case, we give a detailed stability analysis of the converter's behavior around the fixed point. For that, we define the error vector:

e = x - x*

(18)

The closed-loop error system becomes:

el(n + 1) = (1 - 25ckvx2(n)) el(n) (19)

e2(n + 1) = 25Lkv el(n)2 + [1 - 5£(1 + d + ki)] e2(n) +5Ld e3(n) - 5Le e4(n) (20)

e3(n + 1) = e2(n) (21)

e4(n + 1) = b e2(n) -b e3(n) + a e4(n) (22)

The characteristic equation of the linearized system is:

where

a2 = h (1 + d + ki) - a -I (24)

al = a[1 - 5£(1 + d + ki)] + h(be - d) (25)

ao = 5£(ad -be) (26)

To guarantee the stability of discrete systems, the norm of each eigenvalue should be less than one. Knowing that x; =

lt�k�r , it is clear that the reference value Ir can

only be reached when the current gain ki is increased to infinity. Consequently, kv should satisfy condition (27):

1 0< kv < TJ

uc r (27)

1 1 --< ad -be<-

5L 5L ki > 0

1 1 be 1 d < - - - + -- - -k

5L 2 1 + a 2' 1 - a6 > l al - aoa21

(28)

(29)

(30)

(31)

Condition (31) leads to the inequality Ad2 + B(ki)d + C(ki) > 0, which defines two roots d(ki) and a region in the ki -d plane that depends on sign of A. From conditions (29)-(31), we depict in Fig. 2. the stability zone in the ki - d space for be > 0, be = 0 and be < O.

d

--+----'''<:-----. ki

d be < 0

d be = 0

--+------"".0;::------. ki o

Figure 2. Stability zone in the ki - d space in Case one.

Fig. 3. and Fig. 4. show the 2D-Bifurcation diagrams of the converter behavior under the action of a DTDFC in Case-one for be > 0 and be < 0 respectively, where we use the electronic color code to indicate the periodic behaviors: Brown color represents the stable zone, black stands for chaotic behavior and zones of higher periods are also shown as parameter ki and d vary. The boundary of condition (31) is plotted in white dashed line.

We remark that with a negative product be yields to a stability region extended to higher values of ki than with a positive product. In addition, when the value of the pa­rameter a is low (e.g. a = 0.1), the stable zone is extended to higher values of current gain ki as depicted in Fig. 5.

We present in Fig. 6. the evolution of the states xl(n) and X2 (n) obtained with the DTDFC and with a large value of current gain ki = 56. It can easily be observed that the settling time is high, but the voltage reference is closely approached with a static error e2 ':::' 0.007.

It is worth noting, that the extended time-delayed feed­back controller (ETDFC) is a particular case of the dy­namic controller studied in this first case.

2010 7th International Multi-Conference on Systems, Signals and Devices

kv = 56°, a = 0.5, b = 2, e = 1

10 15 20 25 30 35 k,

period 1

period 2

period 3

period 4

period 5

period 6

period 7

period 8

period 9

Figure 3. 2D-Bifurcation diagram of the converter behav­ior under the action of a DTDFC for be > 0 in Case one.

kv = 56°, a = 0.5, b = 3, e = -2 period 1

period 2

period 3

period 4

period 5

period 6

period 7

period 8

period 9

10 20 40 50

Figure 4. 2D-Bifurcation diagram of the converter behav­ior under the action of a DTDFC for be < 0 in Case one.

kv = 56°, a = 0.1, b = 3, e = -2 period 1

period 2

period 3

period 4

period 5

period 6

period 7

period 8

period 9

10 20 40 50

Figure 5. 2D-Bifurcation diagram of the converter behav­ior under the action of a DTDFC for be < 0 in Case one.

kv = 560, ki = 56 , a = O.l,b = 3, e = -2,d = -24

<�I Z • • • • • I 20 40 60 80 100 120 140

Figure 6. Evolution of the states under the action of a DTDFC in Case one.

3.3. Case two

In this section, we study the second case of the DTDFC, where we fix a = 1. We recall that the fixed point of this system verifies:

* * * d

* 1 + ki * 1 + kJr Xl = Vr, X2 = X3 an X4 = ---X2 + ---

e e Our aim is to obtain Xz = x3 = Ir independently off ki' which yields to x;j =

l�Ir. To assure a zero static error, we add a proportional gain k to the dynamic controller, which leads to:

x(n + 1) = x(n) + b y(n) - k(x(n) - x*) (32)

da(n) = e x(n) + d y(n) (33)

If we choose a = k = 1, we can guarantee a fast con­vergence of the input controller x to its fixed point x

* =

l�Ir , and finally, we get the error system:

el(n + 1) = (1 - 2c:5ckvx2(n)) el(n) (34)

e2(n + 1) = 2c:5Lkv ei(n) + [1 - c:5d1 + d + ki)] e2(n) +hd e3(n) - c:5Le e4(n) (35)

e3(n + 1) = e2(n) (36)

(37)

The characteristic equation of the linearized system is given by:

[A - (1 - 2c:5ckvIr)](A3 + a2A2 + alA + ao) = 0 (38)

where

a2 = c:5d1 + d + ki) - 1 al = c:5dbe - d) ao = -c:5Lbe

(39)

(40)

(41)

In a similar way as in the first case, the voltage gain kv should satisfy the following condition:

1 0< kv <

c:5cIr (42)

2010 7th International Multi-Conference on Systems, Signals and Devices

kv is optimized when the eigenvalue A = 1 -2ockv1r is equal to zero, which yields to the optimal value kv,opt =

21i� Ir ' According to the Jury criterion of stability, we ob­tain the following conditions:

1 1 --<be<­

h h (43)

ki > 0 (44)

1 1 1 d < OL -"2 + be - "2ki (45)

1 - 0Ib2e2 > Ih(OLbe -l)d + 0Ibe(1 + ki) 1 (46)

Fig. 7. represents the stability zone in the b - e space. The choice of the parameter d is limited and depends on the choice of the product be and ki by using conditions (44)-(46). According to the sign of the product be, we can distinguish three cases as it is shown in Fig. 8. We notice that be = 0 when b = 0 because e cannot be zero since it appears in the denominator of x*. Negative values of be allow stability for larger values of ki, which is obtained only for low values of ki if be > O.

c

-10

-20

-30

-4�5'--------'--4--_-'--3 --_2'--------'-_1---'----'------'-----'-----L-----:

Figure 7. Stability zone in the b - e space in Case two.

The 2D-Bifurcation diagram of the converter behavior under the action of a DTDFC for b = 2 and e = -2 is depicted in Fig. 9. It confirms the stability zone shown in Fig. 8. for be < O. In Fig. 10, we present the ID­Bifurcation diagram of the converter behavior for param­eters chosen from the 2D-Bifurcation diagram. We can easily remark that we have a zero static error for the one­periodic behavior of the current X2 (n) . Finally, Fig. 11. shows the evolution of the states under the action of a DTDFC for ki = 30. It is clear that we can reach the reference values without static error.

We should also point out that coexistence of a chaotic attractor and a periodic behavior can occur for some pa­rameters (ki, d) with the application of DTDFC as it has been shown to happen with TDFC [8].

d be < 0 d be = 0

o o

d be> 0

Figure 8. Stability zone in the ki -d space in Case two.

kv = 56°, b = 2, e = -2

10 20 30 k,

period 1

period 2

period 3

period 4

period 5

period 6

period 7

period 8

period 9

40 50

Figure 9. 2D-Bifurcation diagram of the converter behav­ior under the action of a DTDFC in Case-two.

kv = 5�,b = 2,e = -2,d = -10

5 20 25

Figure 10. 1 D-Bifurcation diagram of the converter be­havior under the action of a DTDFC in Case-two.

2010 7th International Multi-Conference on Systems, Signals and Devices

kv = 560,ki = 30,b = 2,c = -2, d = -10

��11 7 : : : : I 00 10 15 20 25 30 35 40

� :�IT : : : : I o 5 10 15 20 25 30 35 40

Figure 11. Evolution of the states under the action of a DTDFC in Case-two.

4. CONCLUSION

In this paper, we have presented a complete stability anal­ysis of the behavior of the two-cell DC/DC buck converter under the action of a dynamic time-delayed feedback con­troller. It has been shown through theoretical analysis and simulations that this dynamic controller in its second case allows zero static error and fast convergence. A nonlinear analysis using Lyapunov theory and absolute stability will be presented in a future work.

5. REFERENCES

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[2] A.N. Natsheh, and 1.M. Nazzal, "Application of Bi­furcation Theory to Current-mode Controlled Parallel­connected DC-DC Boost Converters with Multi Bifur­cation Parameters, " Chaos, Solitons and Fractals, vol. 33, pp. 1135-1156, 2007.

[3] 8. Robert, and A. EI Aroudi, "Discrete Time Model of a Multi-Cell DCIDC Converter: Non Linear Ap­proach, " Mathematics and Computers in Simulation,

vol. 71, pp. 310-319, 2006.

[4] C.K. Tse, "Experimental Techniques for Investigating Chaos in Electronics, " Chaos in Circuits and Systems,

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Chaos Control, and Applications, Wiley-IEEE Press , July. 2001.

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