Improved space vector PWM algorithm for three-level voltage source inverter in overmodulation region

Int. J. Power Electronics, Vol. 5, No. 1, 2013 75

Copyright © 2013 Inderscience Enterprises Ltd.

Improved space vector PWM algorithm for three-level voltage source inverter in overmodulation region

S.B. Veeranna* and U.R. Yaragatti Department of Electrical and Electronics Engineering, National Institute of Technology Karnataka, Surathkal 575025, India Fax: +91-8242474033 E-mail: [email protected] E-mail: [email protected] *Corresponding author

Abstract: In high power high performance AC drive industrial applications, multilevel inverters have established their importance, as they can synthesise output waveform with improved harmonic spectrum. In this paper, an improved synchronisation and symmetrical SVPWM algorithm is proposed for three-level inverter in overmodulation region for better utilisation of DC bus and to reduce harmonic distortion. The performance analysis of the proposed algorithm is compared with SHEPWM and STPWM for three-level voltage source inverter in terms of THD of line voltage and motor current along with fundamental component of the line voltage. It is shown that the proposed algorithm gives improved results compared to SHEPWM and STPWM algorithms. The algorithm is also verified experimentally on a constant v/f drive fed from IGBT-based voltage source inverter using Motorola power PC (MPC8240) based embedded controller.

Keywords: harmonic distortion; overmodulation; pulse width modulation; PWM; pulse width modulated inverters; synchronisation.

Reference to this paper should be made as follows: Veeranna, S.B. and Yaragatti, U.R. (2013) ‘Improved space vector PWM algorithm for three-level voltage source inverter in overmodulation region’, Int. J. Power Electronics, Vol. 5, No. 1, pp.75–94.

Biographical notes: S.B. Veeranna received his BE in Electronics and Communication Engineering from Dayananda Sagar College of Engineering (DSCE), Bangalore, India, MTech in Power Electronics from BM Srinivasaiah College of Engineering (BMSCE), Bangalore, India and PhD in Electrical and Electronics Engineering from National Institute of Technology Karnataka (NITK), Surathkal, India. His areas of interest are power electronics and drives and PWM control of multilevel converters.

U.R. Yaragatti received his PhD in the year 2000 from Indian Institute of Technology (IIT), Bombay, India from the Department of Electrical Engineering. He is presently working as a Professor in the Department of Electrical and Electronics Engineering, National Institute of Technology, Karnataka. His research interest includes power electronics, renewable energy sources and energy management.

76 S.B. Veeranna and U.R. Yaragatti

1 Introduction

Three-level pulse width modulation (PWM) inverters have drawn very much interest in high performance, high power and medium voltage induction motor drive applications in industry. As they have many benefits such as sophisticated PWM algorithms, reduced energy consumption, generate a stepped waveform with less hormonics, lower dv/dt in the output voltage, lower common mode voltage which reduces the stress in the motor bearings and the elimination of lower order voltage harmonics (Rodriduez et al., 2002). Three-level inverters have improved total harmonic distortion (THD) and also less voltage stress on switching devices compared to two-level inverter (Nabae et al., 1981; Abu-Rub et al., 2010; Colak et al., 2010; Choi et al., 1991). In this paper, an improved synchronisation and symmetrical space vector pulse width modulation (SVPWM) for overmodulation region is proposed. In high power drives, the switching frequency (fs) is limited to low value (Beig et al., 2007) to minimise switching losses. In such cases, pulse number (P), defined as the ratio of fs to the fundamental frequency (f) is low and hence the inverter output voltage will be rich in harmonics. Synchronisation between the pulse pattern and its fundamental component is essential in order to eliminate subharmonics. The same conditions for synchronisation, quarter wave symmetry (QWS), half wave symmetry (HWS) and three-phase symmetry (TPS) given in Beig et al. (2007) for three-level inverter are used in this paper as well. The main objective of operating the inverter in overmodulation region is that, in linear modulation the maximum voltage of 86.6% of the six-step value can be obtained. In overmodulation region this voltage can be increased further by the proper utilisation of DC bus (Holtz et al., 1993; Mondal et al., 2003; Lee and Lee, 1998). The performance analysis of the proposed algorithm in terms of THD of the line voltage and motor current along with fundamental component are compared with selective harmonics elimination pulse width modulation (SHEPWM) (Agelidis et al., 2008; Barkati et al., 2008) and sine-triangle pulse width modulation (STPWM) (Wang, 2002; Bowes, 1975; Holmes and McGrath, 2001). In the present work, cascaded H-bridge three-level inverter topology as shown in Figure 1 is used. The main benefits of this topology over diode-clamped and capacitor-clamped inverter topologies are: high reliability and requires least number of devices to realise multilevel inverter. The cascaded inverter uses series connection of single-phase full bridge inverter called H-bridge cell to construct multilevel inverter with separate DC source. Each single-phase full-bridge inverter operate as three-level inverter with voltage levels (+Vdc if SA1 and SA2 switches ON, –Vdc if SA3 and SA4 switches ON, +0 if SA1 and SA3 and –0 if SA2 and SA4 switches ON) at the output (Rodriduez et al., 2002). Under different Vdc (Vdca ≠ Vdcb ≠ Vdcc) the inverter generates unbalanced three-phase voltages. Under unbalanced conditions the effects on three-phase induction motors, includes over heating, line-current unbalance, derating, torque pulsation, inefficiency, etc. (Wang, 2001). To keep Vdc equal, an individual capacitor should be connected across it as shown in Figure 1.

This paper is organised as follows: The SVPWM algorithm is briefly reviewed in Section 2. The proposed SVPWM algorithm for overmodulation region is described in Section 3. In Section 4, SHEPWM and STPWM algorithms are explained. The results and performance analysis are discussed in Section 5. The outlines are concluded in Section 6.

Improved space vector PWM algorithm for three-level voltage source inverter 77

Figure 1 Schematic diagram of cascaded H-bridge three-level inverter

2 Review of SVPWM algorithm

SVPWM is a space vector control-based PWM algorithm that gives lower harmonics and higher DC bus utilisation compared to a popular STPWM algorithm. In terms of computational complexity, this algorithm for three-level inverter can be easily implemented either by using field programmable gate arrays (FPGA) or by using digital signal processor (DSP) or embedded-based controllers. However, if number of levels (L) is > 3 the implementation complexity increases due to a large number of switching states, difficulty in the timing calculations and identifying the position of the reference vector. This complexity increases further in overmodulation region due to non-linearities in the region. These difficulties restrict the use of multilevel inverters to three-level inverter in most of the high power industrial AC drive applications. Hence, SVPWM for three-level inverter is reviewed briefly in this section. The space vector diagram of three-level inverter and associated switching states in stationary reference frame are shown in Figure 2, where α-axis and β-axis are the reference axes, it has 33 = 27 switching states. There are 24 active states (6 large vectors (V7(+ – –), V9(+ + –), V11(– + –), V13(– + +), V15(– – +) and V17(+ – +)), 6 medium vectors, 12 small vectors (V1(+ 0 0, 0 – –), V2(+ + 0, 0 0 –),V3(0 + 0, – 0 –), V4(0 + +, – 0 0), V5(0 0 +, – – 0)and V6(+ 0 +, 0 – 0))) and three zero vectors V0 (+ + +, 0 0 0, – – –). These are defined in Figure 2, + means the phase is connected to positive DC bus, – indicates the phase is connected to negative DC bus and 0 indicates the phase is connected to neutral. In SVPWM, the reference vector


rV is sampled in every subcyle or sample, Ts. The position of rV can be located by three nearest vectors , x yV V and zV of a triangle and the timing information of each vector is obtained by using (1).

r s x x y y z z

s x y z

V T V T V T V TT T T T

= + +

= + + (1)

where Ts is sampling time Tx, Ty and Tz are the dwell times of Vx, Vy and Vz, respectively.

Figure 2 Space vector diagram of three-level inverter in stationary reference frame (see online version for colours)

3 Proposed SVPWM algorithm for overmodulation region

When the tip of the reference vector rV exceeds the boundary of hexagon the operation of the inverter becomes non-linear, overmodulation region begins and output voltage distortion starts. The region between the inner most circle and outmost circle in Figure 2 is defined as overmodulation region and is known as one zone approach (Bolognani and


Zigliotto, 1997). In this paper, we have considered two-zone approach (Narayanan and Ranganathan, 1999; Gupta and Kambadkone, 2007) if the tip of the reference vector is partly outside and partly within the hexagon is called overmodulation region-1 and if it is outside the hexagon is called overmodulation region-2. The inverter cannot generate an average vector, whose tip falls outside the hexagon. Premodulation is required to correct these samples and to synthesise the desired reference. Premodulation is a process of correcting the amplitude and angle of the samples whose tip falls outside the hexagon. The details regarding premodulation process are clearly explained in Narayanan and Ranganathan (2002). For non-integer triangle no. the samples placed on the major-sector boundary are saturates at reference vector magnitude equal to 0.866 itself and pulse dropping starts. If the samples are placed in the middle of every major-sector (e.g., the edge which belongs to the triangles 11 and 16 as shown in Figure 2) will never saturates and modulation factor can be increased up to unity.

3.1 Modulation index

For a given DC bus voltage the modulation index (Mi) is defined as the ratio of the fundamental component of the phase voltage (V1) generated by the modulator to the fundamental component of the phase voltage at six-step operation (V1six–step) (Gupta and Kambadkone, 2007).

1

1i

six step

VMV −

= (2)

In space vector approach Mi is defined as the ratio of the magnitude of the reference vector to the DC bus voltage (Beig et al., 2007).

ri

dc

VMV

= (3)

3.2 Two regions of overmodulation

In this paper, overmodulation region is divided into two regions:

1 overmodulation region-1 (0.866 < Mi ≤ Mimax)

2 overmodulation region-2 (Mimax < Mi ≤ 1), where Mimax is the boundary between overmodulation region-1 and overmodulation region-2 and it depends on the number of samples (N) in any given major-sectors (M1 to M6).

Mimax is tabulated in Table 1 for different N. Table 1 Mimax for different N

N Mimax

2 0.8965 3 0.8793 4 0.9373 5 0.9105


Figure 3 Sample placement in overmodulation region (blue dotted lines before and red solid lines after premodulation) for N = 8, (a) overmodulation region-1 (b) overmodulation region-2 (see online version for colours)

(a)

(b)

In overmodulation region-1, when rV is increased beyond 0.866, the two premodulated samples adjacent to the middle one touch the hexagon if there are three samples in any


major-sector (M1 to M6). If there are four samples in a major-sector overmodulation region-1 ends when all the samples touch the hexagon (saturates). Now, no zero vector is used in these two samples. Due to the non-application of zero vectors in these samples pulse dropping starts, the concept of pulse dropping in pulse width modulated inverters is detailed in Grant (1981). In such cases, only the magnitude is corrected using (4) for the samples whose tip is partly outside and partly inside of the hexagon as shown in Figure 3(a) for N = 8.

ifif

0.433

cos6

rp r r rm

rm r rm

rm

p

V V V VV V V

Vπ

′ ′ ′ ′= ≤′ ′ ′= >

′ =⎛ ⎞′−⎜ ⎟⎝ ⎠

′ ′=

α

α α

(4)

where rpV ′ and p′α are the magnitude and angle of the reference vector after premodulation respectively.

In overmodulation region-2, the reference vector is increased by shifting the average vectors generated closer to their nearest minor-sector boundaries. In Figure 3(b), the samples which are closer to V7 in minor-sector 11 are moved towards vector V7 and the samples which are closer to V8 are pushed towards medium vector V8. Similarly in minor-sector 16, the samples which are closer to V7 are moved towards vector V7 and those vectors closer to medium vector V18 are pushed towards medium vector V18. This is achieved by the amplitude and angle correction using (5). In (5) αa is angle correction factor decreases from 1 to 0 and the relation between αa and rV is shown in Figure 4 for N = 2, 3, 4, 5. At a particular value of ,rV all the samples (in case of even N) only adjacent samples to the middle one (in case of odd N) saturates and pulse dropping continues further. By the selection of proper value of a pulse dropping can be prevented and pulse number P can be maintained constant. When 1rV = and αa = 0 all the samples lie on the inner edges of the triangles 11 and 16, inverter looses it is multilevel characteristics and behaves like a two-level inverter.

if 06

if6 6

if3 6 33

ifif

0.433

cos6

p a

a

rp r r rm

rm r rm

rm

π

π π

π π ππ

V V V VV V V

Vπ

′ ′ ′= ° ≤ <

′= =

⎛ ⎞ ′′= − < <−⎜ ⎟⎝ ⎠

′ ′ ′ ′= ≤′ ′ ′= >

′ =⎛ ⎞′−⎜ ⎟⎝ ⎠

α α α α

α

α αα

α

(5)


For N = 2, two samples are equally spaced in 60° interval which results in first sample in minor-sector 6 and the last sample in minor-sector 1 of major-sector (M1). The switching sequence for N = 6, 10, 14… have switching sequence similar to N = 2, in this group N is even (N)/2 is odd. For N = 3, first sample is placed in minor-sector 6, middle sample is placed in minor-sector 1 at α = 0° and last sample is placed in minor-sector 1. Similar switching sequence can be used for N = 7, 11, 15… in this group N is odd (N – 1)/2 is also odd. For N = 4, first two samples are equally placed in minor-sector 6 and next two sample are placed in minor-sector 1. Similar switching sequence is applicable for N = 8, 12, 16… in this group N is even N/2 is also even. For N = 5, first two samples are equally placed in minor-sector 6, middle sample is placed in minor-sector 1 at α = 0° and last two samples are placed in minor-sector 1. Similar switching sequence is applicable for N = 9, 13, 17… in this group N is odd (N – 1)/2 is even. The generalised relation between N and P for all possible N is given in Table 2. Table 2 Generalised relation between N and P

N N and P relation

2, 6, 10… P = 3N/2 3, 7, 11… P = (3N – 1)/2 4, 8, 12… P = 3N/2 5, 9, 13… P = (4N – 6)/2

Figure 4 Relation between αa and Vr for N = 2, 3, 4, 5 (see online version for colours)

The switching sequence for N = 2, 3, 4, 5 for M6 are given in Tables 3 to 6, respectively. These switching sequences are selected to ensure:

1 minimum possible switchings for a given sample in any of the major-sectors

2 the last state of the present major-sector will be the first state in the next major-sector, this eliminates one extra switching during major-sector change.


The switching sequences for other major-sectors can be derived from these sequences using (6). The swicthing sequence for phase A after 60° is equal to the complement (state ‘1’ becomes state ‘–1’ and vice versa and state ‘0’ remains same) of phase B switching sequence.

( / 3) ( )( / 3) ( )( / 3) ( )

A B

B C

C A

S θ π S θS θ π S θS θ π S θ

′+ =′+ =′+ =

(6)

Table 3 Switching sequence for N = 2

Triangle no. Sample no. Dwell times

66 1 Tx/2 Ty Tx/2 Tz

0 – + + – + 0 – + 0 – 0

61 2 Tz Tx/2 Ty Tx/2

0 – 0 + – 0 + – + + – 0



66 1 Tx/2 Tz Tx/2 Ty

0 – + 0 – 0 0 – + + – +

61 2 Ty/2 Tz/2 Tz/2 Ty/2

+ – + + 0 + + 0 + + – +

61 3 Ty Tx/2 Tz Tx/2

+ – + + – 0 0 – 0 + – 0



66 1 Tx/2 Ty Tx/2 Tz

0 – + + – + 0 – + 0 – 0

66 2 Tz/2 Tx Ty Tz/2

0 – 0 0 – + + – + + 0 +

61 3 Tz/2 Ty Tx Tz/2

+ 0 + + – + + – 0 0 – 0

61 4 Tz Tx/2 Ty Tx/2

0 – 0 + – 0 + – + + – 0




66 1 Tx/2 Ty Tx/2 Tz 0 – + + – + 0 – + 0 – 0 66 2 Tz/2 Tx Ty Tz/2 0 – 0 0 – + + – + + 0 + 61 3 Tz/2 Ty/2 Ty/2 Tz/2 + 0 + + – + + – + + 0 + 61 4 Tz/2 Ty Tx Tz/2 + 0 + + – + + – 0 0 – 0 61 5 Tz Tx/2 Ty Tx/2 0 – 0 + – 0 + – + + – 0

3.3 Dwell time calculations

The complexity of three-level SVPWM can be simplified by grouping the space vector of three-level inverter into six major-sectors with small vectors at the centre. With this approach, in each major-sector, the vectors appear to be similar to that of two-level inverter. Each major-sector can be divided into six minor-sectors. For example, the major-sector 1 is divided into six minor-sectors from 11 to 16, shown in Figure 2. The small vector at the origin, all the other active vectors will have 0.5 p.u. magnitude as shown in Figure 2. The reference magnitude of all vector appear as rV ′ at an angle α′ as shown in Figure 2. In overmodulation, only the tip of the Vr belongs to minor-sectors 1 and 6. Hence, only these two minor-sectors are of interest for the present work. The dwell times for minor-sectors 1 and 6 are calculated using (7) and (8) respectively, and due to symmetry these equations are valid for all the other major-sectors.

( )( )

2.3092 1.1547

x r s

r ry s

x yz s

T V TV VT T

T TT T

′=

′ ′−=

+= −

β

α β (7)

( )( )

2.3092 1.1547

x r s

r ry s

x yz s

T V TV VT T

T TT T

′= −

′ ′+=

+= −

β

α β (8)

3.4 Implementation

Let θ be the angle between the two samples in major-sector 1, θ = 60°/N, in order to avoid saturation of the reference vector at Vr = 0.866 offset is set, i.e., θoffset = θ/2. The magnitude rV ′ and angle α′ before and after amplitude correction in overmodulation region-1 for transformation from three-level to two-level inverter is given in Table 7. In Table 7 at Mi = 0.88 for N = 2 no amplitude correction is required, N = 3 needs amplitude correction only for the first and last sample, even in N = 4 amplitude correction is


required for first and last sample, middle samples need not be corrected and for N = 5 amplitude correction is required for the first two and last two samples. Similarly, the details of overmodulation region-2 at Mi = 0.98 is given in Table 8 where both amplitude as well as angle correction is done for N = 2, 3, 4, 5. Table 7 Reference vector position before and after premodulation in overmodulation region-1

for different N

N Tri. no. Sample no. Vr rV ′ rpV ′ α α′

66 1 0.88 0.4176 0.4176 –15° –33.0528° 2

61 2 0.4176 0.4176 +15° +33.0528° 66 1 0.88 0.4444 0.4437 –20° –42.6333° 61 2 0.3800 0.3800 0° 0°

3

61 3 0.4444 0.4437 +20° +42.6333° 66 1 0.88 0.4598 0.4530 –22.5° –47.0931° 66 2 0.3898 0.3898 –7.5° –17.1388° 61 3 0.3898 0.3898 +7.5° +17.1388°

4

61 4 0.4598 0.4530 +22.5° +47.0931° 66 1 0.88 0.4696 0.4598 –24° –49.6651° 66 2 0.4045 0.4045 –12° –26.8916° 61 3 0.3800 0.3800 0° 0° 61 4 0.4045 0.4045 +12° –26.8916°

5

61 5 0.4696 0.4598 +24° +49.6651°

Table 8 Reference vector position before and after premodulation in overmodulation region-2 for different N

N Tri. no.

Sample no. Vr αa rV ′ rpV ′ α αp p′α

66 1 0.98 0.1 0.4176 0.4176 –15° –1.5° –3.0614° 2

61 2 0.4176 0.4176 +15° +1.5° +3.0614° 66 1 0.98 0.1 0.4444 0.4437 –20° –2° –4.0807° 61 2 0.3800 0.3800 0° 0° 0°

3

61 3 0.4444 0.4437 +20° +2° +4.0807° 66 1 0.98 0.1 0.4598 0.4530 –22.5° –2.25° –4.59° 66 2 0.3898 0.3898 –7.5° –0.75° –1.5311° 61 3 0.3898 0.3898 +7.5° +0.75° +1.5311°

4

61 4 0.4598 0.4530 +22.5° +2.25° +4.59° 66 1 0.98 0.1 0.4696 0.4598 –24° –2.4° –4.8954° 66 2 0.4045 0.4045 –12° –1.2° –2.4494° 61 3 0.3800 0.3800 0° 0° 0° 61 4 0.4045 0.4045 +12° +1.2° +2.4494°

5

61 5 0.4696 0.4598 +24° +2.4° +4.8954°


4 Selective harmonic elimination and sine-triangle PWM

4.1 Selective harmonic elimination PWM

The basic idea of SHEPWM algorithm is to minimise harmonic distortion by removing the desired harmonics presenting in the waveform and to achieve variable amplitude of the fundamental component. But usually the lower order harmonics (all odd lower order harmonics in case of single phase and all odd non-triplen lower order harmonics in the case of three phases) are chosen for elimination by properly selecting the switching angles of multilevel inverters. The number of harmonics elimination depends on the number of choppings per quarter-cycle. If there are C choppings per quarter-cycle then (C-1) odd harmonics can be eliminated (Espinoza et al., 2001; Vaiyapuri and Sirukarumbur, 2009). The switching angles for SHEPWM are calculated using Newton-Raphson method for six iterations. In order to keep the number of harmonics which are eliminated at a constant level the switching angles of this algorithm must be less than π/2. In spite of that, these algorithms are invalid if the switching angles are not less than π/2. In this paper, only odd switching angles (for P = 3, 5) are considered in order to eliminate even numbered non-triplen odd harmonics. The typical switching pulses for P = 5 are given in Figure 5. The switching angle versus Mi for P = 3 and P = 5 in overmodulation region are shown in Figures 6(a) and 6(b), respectively.

Figure 5 Typical 5-switching angle pulses for SHEPWM (see online version for colours)

4.2 Sine-triangle PWM

A very popular method in industrial applications is the triangular (carrier) based (Cecati et al., 2004; Balashanmugham and Sirukarumbur, 2010) STPWM that uses the phase


shifting technique to reduce the harmonics in the output voltage. The STPWM is easy to implement in hardware by analogue means using comparators and integrators for the generation of the sine (reference) waves, triangular waves and switching pulses. However, due to the variation of the values of the reference wave during a PWM period, the relation between the reference wave and carrier wave is not fixed and results in loss of synchronisation between reference and carrier wave and hence loss of symmetry as well. As a result of this sub harmonics may introduce in the output voltage due to which the speed of the motor may suffer from low frequency pulsations. The typical switching pulses for P = 5 of three-level operation are generated using two triangular (carrier) waves and one sine (modulating) wave as shown in Figure 7.

Figure 6 Switching angle versus Mi for (a) 3-switching angles α1, α2 and α3 (b) 5-switching angles α1, α2, α3, α4 and α5 (see online version for colours)

(a)

(b)


Figure 7 Typical switching pulses for STPWM for P = 5 (see online version for colours)

5 Results and performance analysis

Synchronised PWM algorithms for three-level inverter are simulated using MATLAB/Simulink and applied to a v/f drive consists of a 400 V, 1.1 KW, 1,420 rpm, 3 – Φ induction motor powered from a cascaded H-bridge three-level IGBT-based inverter with Vdc = 256 V. The proposed algorithm is verified experimentally using Motorola Power PC (MPC8240) based digital embedded controller.

5.1 Experimental results

The experimental waveforms of phase voltage (VAn), defined as the voltage between output terminal and the neutral point n of the inverter, line voltage (VAB) and no load motor current (iA), are given in Figure 8(a) for SVPWM in overmodulation region-1 at Mi = 0.88. Their corresponding harmonic spectrums are given in Figure 8(b). The waveforms exhibit perfect synchronisation and symmetry. One cycle of data is taken to calculate both voltage and current THD and to plot frequency spectrum. The experimental FFT plots demonstrate the absence of even harmonics which means HWS. The triplen harmonics are present in the phase voltage [plot (a) in Figure 8(b)], and they are cancelled in line voltage [plot (b) in Figure 8(b)], and motor current [plot (c) in Figure 8(b)], due to TPS maintained in the waveform.

5.2 Performance analysis

The performance of the proposed SVPWM algorithm is analysed in terms of line voltage THD and motor current THD. In order to justify the superiority of the proposed algorithm the results are compared with SHEPWM and STPWM algorithms.


Figure 8 (a) Experimental waveforms of (C1) VAn(V) (C2) VAB(V) (C3) iA(A) (b) harmonic spectrum of (a) VAn (b) VAB (c) iA for SVPWM at Mi = 0.98, N = 4 (see online version for colours)

(a)

(b)

5.2.1 VTHD

The VTHD parameter of the line voltage is defined as (Wen et al., 2008):

( )2

1 2

1THD h

h

V VV

∞

=

= ∑ (9)

where V1 is the RMS value of the fundamental component of the line voltage.


5.2.2 ITHD

The ITHD parameter of the motor no load current is defined as (Beig et al., 2007):

( )2

1 2

1 .THD hh

I II

∞

=

= ∑ (10)

where I1 is the RMS value of the fundamental component of the motor no load current. The performance analysis plots VTHD v/s Mi, ITHD v/s Mi and VAB1 v/s Mi of SVPWM,

SHEPWM and STPWM are given from Figures 9 to 10 for P = 3 and 5, respectively. As expected, the proposed SVPWM algorithm gives more fundamental component (VAB1) and improved voltage THD (VTHD) of VAB compared to SHEPWM and STPWM algorithms. The reason for higher VAB1 in the proposed algorithm is that, due to αa pulse number is maintained constant for the entire overmodulation region. The proposed algorithm gives slightly higher motor current THD (ITHD) than SHEPWM but better than STPWM. From the Table 9, it is clear that for a fixed VAB1 the proposed algorithm gives better VTHD than other algorithms. However, the proposed algorithm results in slightly higher ITHD than SHEPWM but better than STPWM. The reason is that, VAB1 for the proposed algorithm is slightly higher than SHEPWM. The lower order harmonic component comparison of VAB and iA for SHEPWM and STPWM at Mi = 0.99, P = 5 and SVPWM at Mi = 0.76, P = 5 is given in Table 10, in all these cases VAB1 ≈ 310 V. The proposed algorithm ensures the elimination of triplen harmonics.

Table 9 Fundamental component and THD of line voltage and motor current THD for SHEPWM and STPWM at Mi = 0.99, P = 5 and SVPWM (proposed) at Mi = 0.76, P = 5

PWM algorithms VAB1 (V) THD of VAB (%) THD of iA(%)

SVPWM (proposed) 310.4773 34.72 17.44

SHEPWM 310.2445 43.30 15.13

STPWM 310.0870 48.37 29.02

Table 10 Harmonic component comparison of line voltage and motor current for SHEPWM and STPWM at Mi = 0.99, P = 5 and SVPWM (proposed) at Mi = 0.76, P = 5

SVPWM (proposed) SHEPWM STPWM Harmonic order VAB(V) iA(A) VAB(V) iA(A) VAB(V) iA(A)

1 310.4773 1.5251 310.2445 1.3172 310.0870 1.3117

3 0.0942 0.0024 0.5556 0.0043 0.5948 0.0098

5 1.6812 0.0182 0.1473 0.0001 9.9098 0.0755

7 5.1161 0.0371 0.1907 0.0014 0.2788 0.0027

9 0.5849 0.0036 0.6140 0.0020 59.1793 0.2525

11 21.8930 0.1022 0.7568 0.0025 59.6474 0.2089

13 21.3437 0.0841 0.7327 0.0020 15.0089 0.0439


Figure 9 Comparison plot of (a) VAB1 versus Mi (b) VTHD versus Mi (c) ITHD versus Mi for P = 3 (see online version for colours)

(a)

(b)

(c)


Figure 10 Comparison plot of (a) VAB1 versus Mi (b) VTHD versus Mi (c) ITHD versus Mi for P = 5 (see online version for colours)

(a)

(b)

(c)


6 Conclusions

In this paper, an improved SVPWM algorithm for three-level inverter in overmodulation region is proposed. The performance of the proposed algorithm in terms of THD of the line voltage and motor current are analysed and compared with SHEPWM and STPWM. The experimental results for phase voltage, line voltage and phase current with their harmonic spectrums are presented. In the proposed SVPWM algorithm, the absence of triplen harmonics in line voltage and motor current ensures the symmetry and synchronisation is maintained even in the overmodulation region. This is essential for high power low switching frequency applications. From the results, it can be shown that the proposed algorithm gives higher fundamental component compared to SHEPWM and STPWM for a given Mi and P. Also, the proposed algorithm results in improved voltage THD of the line voltage than SHEPWM and STPWM. However, it gives slightly higher motor current THD compared to SHEPWM but better than STPWM.

References Abu-Rub, H., Holtz, J., Rodriguez, J. and Baoming, G. (2010) ‘Medium-voltage multilevel

converters? State of the art, challenges, and requirements in industrial applications’, IEEE Trans. on IE, Vol. 57, No. 8, pp.2581–2596.

Agelidis, V.G., Balouktsis, A.I. and Cossar, C. (2008) ‘On attaining the multiple solutions of selective harmonic elimination PWM three-level waveforms through function minimization’, IEEE Trans. on IE, Vol. 55, No. 3, pp.996–1004.

Balashanmugham, S. and Sirukarumbur, P.N. (2010) ‘Comparative study on various unipolar PWM strategies for single phase five-level cascaded inverter’, International Journal of Power Electronics, Vol. 2, No. 1, pp.36–50.

Barkati, S., Baghli, L., Berkouk, E.M. and Boucherit, M.S. (2008) ‘Harmonic elimination in diode-clamped multilevel inverter using evolutionary algorithms’, Electric Power Systems Research-Elsevier, Vol. 78, No. 10, pp.1736–1746.

Beig, A.R., Narayanan, G. and Ranganathan, V.T. (2007) ‘Modified SVPWM algorithm for three level VSI with synchronized and symmetrical waveforms’, IEEE Transactions on Industrial Electronics, Vol. 54, No. 1, pp.486–494.

Bolognani, S. and Zigliotto, M. (1997) ‘Novel digital continuous control of SVM inverters in the overmodulation range’, IEEE Trans. on IA, Vol. 33, No. 2, pp.525–530.

Bowes, S.R. (1975) ‘New sinusoidal pulse-width modulated inverter’, Proc. Inst. Elect. Eng., Vol. 122, No. 11, pp.1279–1285.

Cecati, C., Dell’Aquila, A., Lecci, A., Liserre, M. and Monopoli, V.G. (2004) ‘A discontinuous carrier-based multilevel modulation for multilevel converters’, 30th Annual Conference of IEEE Industrial Electronics Society, IECON’04, Vol. 1, pp.280–285.

Choi, N.S., Cho, J.G. and Cho, G.H. (1991) ‘A general circuit topology of multilevel inverter’, Proc. IEEE PESC’91, pp.96–103.

Colak, I., Kabalci, E. and Bayindir, R. (2010) ‘Review of multilevel voltage source inverter topologies and control schemes’, Energy Conversion and Management-Elsevier, Vol. 52, No. 2, pp.3–15.

Espinoza, J.R., Joos, G., Guzman, J.I., Moran, L.A. and Burgos, R.P. (2001) ‘Selective harmonic elimination and current/voltage control in current/voltage-source topologies: a unified approach’, IEEE Trans. on IE, Vol. 48, No. 1, pp.71–81.

Grant, D.A. (1981) ‘Technique for pulse dropping in pulse-width modulated inverters’, IEE PROC, Vol. 128, Pt. B, No. 1, pp.67–72.


Gupta, A.K. and Kambadkone, A.M. (2007) ‘A general space vector PWM algorithm for multi-level inverters, including operation in overmodulation range’, IEEE Trans. PE, Vol. 22, No. 2, pp.517–526.

Holmes, D.G. and McGrath, B.P. (2001) ‘Opportunities for harmonic cancellation with carrier based PWM for two-level and multi-level cascaded inverters’, IEEE Trans. Ind. Applicat., Vol. 37, No. 2, pp.574–582.

Holtz, J., Lotzkat, W. and Khambadkone, A.M. (1993) ‘On continuous control of PWM inverters in the overmodulation range including the six-step mode’, IEEE Trans. on PE, Vol. 8, No. 4, pp.546–553.

Lee, D.C. and Lee, G.M. (1998) ‘A novel overmodulation technique for space-vector PWM inverters’, IEEE Trans. on PE, Vol. 13, No. 6, pp.1144–1151.

Mondal, S.K., Bose, B.K., Oleschuk, V. and Pinto, J.O.P. (2003) ‘Space vector pulse width modulation of three-level inverter extending operation into overmodulation region’, IEEE Trans. on PE, Vol. 18, No. 2, pp.604–611.

Nabae, A., Takahashi, I. and Agaki, H. (1981) ‘A new neutral-point-clamped PWM inverter’, IEEE Trans. Ind. Appl, Vol. IA-17, No. 5, pp.518–523.

Narayanan, G. and Ranganathan, V.T. (1999) ‘Synchronized PWM strategies based on space vector approach. Part 1: principle of waveform generation’, IEE Proc-Electr. Power Appl., Vol. 146, No. 3, pp.267–275.

Narayanan, G. and Ranganathan, V.T. (2002) ‘Extension of operation of space vector PWM strategies with low switching frequencies using different overmodulation algorithms’, IEEE Trans. on PE, Vol. 17, No. 5, pp.788–798.

Rodriduez, J., Lai, J.S. and Peng, F.Z. (2002) ‘Multilevel inverters: a survey of topologies, controls and applications’, IEEE Trans. on IE, Vol. 49, No. 4, pp.724–738.

Vaiyapuri, P. and Sirukarumbur, P.N. (2009) ‘Solutions to the harmonic elimination problem in a seven level inverter’, International Journal of Power Electronics, Vol. 1, No. 3, pp.286–300.

Wang, F. (2002) ‘Sine-triangle versus space-vector modulation for three-level PWM voltage-source inverters’, IEEE Trans. on IA, Vol. 38, No. 2, pp.500–506.

Wang, Y.J. (2001) ‘Analysis of effects of three-phase voltage unbalance on induction motors with emphasis on the angle of the complex voltage unbalance factor’, IEEE Trans. on EC, Vol. 16, No. 3, pp.270–275.

Wen, X., Yang, Z., Zhang, L. and Zheng, T.Q. (2008) ‘A novel modulation strategy based on SVPWM natural overmodulation characteristic’, IEEE Proc., pp.1092–1095.

Improved space vector PWM algorithm for three-level voltage source inverter in overmodulation region

Documents

Transcript of Improved space vector PWM algorithm for three-level voltage source inverter in overmodulation region