Traps centers and deep defects contribution in current instabilities

for AlGaN/GaN HEMT’s on silicon and sapphire substrates

N. Sghaiera,*, M. Trabelsia, N. Yacoubia, J.M. Bluetb, A. Souifib, G. Guillotb,

C. Gaquierec, J.C. DeJaegerc

aInstitut Preparatoire aux Etudes d’Ingenieurs de Nabeul (IPEIN), Campus universitaire El Merazka, 8000 Merazka, Nabeul, TunisiabLaboratoire Physique de la Matiere (UMR CNRS 5511), Institut National des Sciences Appliquees de Lyon, Bat. Blaise Pascal,

7 Avenue Jean Capelle, 69621 Villeurbanne Cedex, FrancecInstitut d’Electronique et de Microelectronique du Nord (IEMN), Departement hyperfrequences et Semiconducteurs,

Universite des Sciences et Technologies de Lille Cite Scientifique, Avenue Poincare, 59652 Villeneuve d’Ascq Cedex, France

Received 28 December 2004; received in revised form 9 May 2005; accepted 16 May 2005

Available online 29 June 2005

Abstract

AlGaN/GaN high electron mobility transistors (HEMTs) with Si and Al2O3 substrates reveals anomalies on Ids–Vds–T and Igs–Vgs–T

characteristics (degradation in drain current, kink effect, barrier height fluctuations, etc.). Stress and random telegraph signal (RTS)

measurements prove the presence of trap centers responsible for drain current degradation. An explanation of the trapping mechanism

responsible for current instabilities is proposed. Deep defects analysis performed by capacitance transient spectroscopy (C-DLTS), frequency

dispersion of the output conductance (Gds(f)), respectively, on gate/source and drain/source contacts and RTS prove the presence of deep

defects localized, respectively, in the gate and in the channel regions. Defects detected by C-DLTS and Gds(f) are strongly correlated,

respectively, to barrier height inhomogeneities and kink anomalies. Gate current analysis confirms the presence of (G–R) centers acting like

traps at the interface GaN/AlGaN. Finally, the localization of these traps defects is proposed.

q 2005 Elsevier Ltd. All rights reserved.

Keywords: AlGaN/GaN HEMT; Current instabilities; Defects; Conductance dispersion; Random telegraph signal

1. Introduction

In recent years, a great progress has been made in the

development of high performance AlGaN/GaN high

electron mobility transistors (HEMTs)[1]. These devices

have demonstrated excellent performance at microwave

frequencies for high temperature. GaN has a critical

breakdown field that is estimated to be 3 MV cmK1 [2],

which is 10 times larger than that of the Si and five times

that of the GaAs, and a high peak electron velocity of 2.7!107 cm sK1 [3]. State-of-the-art AlGaN/GaN (HEMTs)

were shown to produce up to 12 W mmK1 at 2 GHz

[4]. One of the major issues that continue to limit

0026-2692/$ - see front matter q 2005 Elsevier Ltd. All rights reserved.

doi:10.1016/j.mejo.2005.05.014

* Corresponding author. Tel.: C216 9753 7203; fax: C216 7222 0181.

E-mail addresses: nabil.sghaier@ipein.rnu.tn (N. Sghaier), gerard.

guillot@insa-lyon.fr (G. Guillot), christophe.gaquiere@iemn.univ-lille1.fr

(C. Gaquiere).

the performance of GaN-based devices is the presence of

electronic traps in the device structure. In AlGaN/GaN

HEMTs, the parasitic charge moving in and out of the traps

on the surface and/or in the bulk of the heterostructure

affects the density of the two-dimensional electron gas

(2DEG) in the channel, causing effects such as current

collapse [5,6,11], drain lag [12,13], gate and light sensitivity

[11] and transconductance frequency dispersion [7,8]. The

characteristic time of the recharging process in GaN ranges

between nanoseconds and seconds. As a result, the trapping

effects can limit device performance even at relatively low

frequencies. In addition, the thermally activated traps

contribute significantly to the device low-frequency

noise [9,10]. Recent active research turn about the

minimization of these trapping effects because of their

major contribution in the limitation of HEMT performances.

Another major factor that limits HEMT performance

concern defects related to technology process. These defects

like dislocations cause significative transconductance

frequency dispersion [14]. Most recent works in this

Microelectronics Journal 37 (2006) 363–370

www.elsevier.com/locate/mejo

N. Sghaier et al. / Microelectronics Journal 37 (2006) 363–370364

area concern the optimization of the AlGaN/GaN structure

process growth in order to secure the quality of device and

circuit.

In this work we report anomalies observed on output

characteristics (degradation in drain current, kink effect,

barrier height fluctuations, etc.) of GaN-based HEMTs on Si

and Al2O3 substrates. Defects analysis performed by

capacitance transient spectroscopy (C-DLTS) and fre-

quency dispersion of the output conductance (Gds(f)),

respectively, on gate/source and drain/source contacts;

prove the presence of deep defects localized, respectively,

in the gate and in the channel regions. Defects detected by

C-DLTS and Gds(f) are strongly correlated to kink and

barrier height fluctuations anomalies. A possible expla-

nation of the trapping mechanism responsible for current

deficiencies is presented. Gate current analysis and RTS

measurements confirm the presence of (G–R) centers acting

like traps at the interface GaN/AlGaN. The spatial

localization and a tentative identification of these defects

is proposed.

2. Sample and measurements details

The layers used in the present study were grown on

sapphire and silicium substrates by metal organic chemical

vapor deposition (MOCVD). The epilayer consists of

100 nm AlN buffer, 1 mm undoped GaN, and a 20 nm

Al0.2GaN0.8 barrier layer. Ohmic contacts were formed by

rapid thermal annealing of evaporated Ti/Al/Ni/Au

(120/2000/100/1000 A) at 860 8C for 30 s in N2 ambient.

A pre-treatment of the ohmic contact area using SiCl4plasma in a RIE system was performed prior to Ti/Al/Ni/Au

metallization. Using on-wafer transfer length measurement

patterns, the ohmic contact resistance was measured to be

w0.25 Umm. Pt/Au (100/1000 A) metals were evaporated

–2 0 2 4 6

0.0000

0.0005

0.0010

0.0015

0.0020

0.0025

0.0030

First meas

I d(A

)

HEMT AlGaN/GaN/SiT=300K

Vds(V

Fig. 1. Ids–Vds characteristics performed on AlGaN/GaN/Si HEMT at TZ30

for gate metallization. Overlay metallization on the ohmic

contacts and measurement pads was also deposited during

gate formation. Finally, a 120 nm thick passivation layer of

silicon nitride was deposited using a PECVD system. The

silicon nitride was then patterned and etched using SF6

plasma in an ICP-RIE system to open windows to the

contact pads. The devices had a gate width of 100 mm and a

source-drain spacing of 2 mm.

The dc characterization Id(Vds,Vgs) has been performed

using a HP 4156 SMU (Source Measurement Units) for Vds,

Vgs supply and Id measurement together. The dc character-

istics are measured in one sequence without delay between

two Id–Vds measurements. For the measurement of the direct

transconductance Gm and output conductance Gds, a double

power supply (HM8142) was used for the bias of the gate

and the drain. The small sinusoidal excitation signal to the

drain (or the gate for transconductance measurements) is

provided by a gain and phase impedance analyzer (HP4194)

with a frequency range extending between 10 Hz and

40 MHz. The amplitude of the ac excitation was fixed to

50 mV. The measurements were made between 80 and

600 K using a nitrogen cooled cryostat.

3. Experimental results and discussion

3.1. Drain-source current voltage measurements

The output characteristics Ids–Vds have been measured first

for HEMT with Si substrate. The gate negative voltage Vgs was

increased in order to pinch-off the channel. Immediately after,

the measurement is done again, we observed a small decrease

of the drain current for the second measurements. An example

of this degradation of drain current at 300 K is given in Fig. 1.

At 300 K, for high negative gate voltage (Vgs) the drain Id

current changes dramatically between the two consecutive

8 10 12 14 16

urementSecond measurement

Vgs=–3 Volts

Vgs=0 Volts

Vgs=–1Volts

Vgs=–2Volts

olts)

0 K. Drain current degradation after two consecutive measurements.

0.0000

0.0005

0.0010

0.0015

0.0020

0.0025

0.0030

I d(A

)

Vgs=–3 Volts

Vgs=0 Volts

Vgs=–1Volts

Vgs=–2Volts

–2 0 2 4 6 8 10 12 14 16

Vds(Volts)

Second measurement

First measurement

HEMT AlGaN/GaN/SiT=500K

Fig. 2. Ids–Vds characteristics performed on AlGaN/GaN/Si HEMT at TZ500 K. Disappearance for high temperature of the drain current degradation after two

consecutive measurements.

N. Sghaier et al. / Microelectronics Journal 37 (2006) 363–370 365

measurements. For lower value of Vgs, the effect is more

intense. We have reproduced the same measurements on the

same sample for higher temperature (500 K). We observed

that drain current degradation gets progressively reduced, and

it has almost disappeared (Fig. 2). A possible explanation for

drain current degradation effect can be the presence of electron

traps located near the conduction channel. Indeed, when a high

drain voltage (15 V) is applied, the buffer layer/active layer p/n

junction is highly reverse biased. Then the p-type buffer layer

can be fully depleted and, because of the high electric field,

electron can be injected into the substrate. This may result in a

negatively charged depleted region in the substrate or the

buffer near the buffer/substrate interface and consequently in

the symmetric building of the depleted positive space charge

region within the lower part of the channel. The negative space

0.0000

0.0005

0.0010

0.0015

0.0020

0.0025

0.0030

I ds(A

)

–2 0 2 4 6 8

Vds(Vol

Fig. 3. Ids–Vds characteristics for AlGaN/GaN/Si HEMT measured at TZ300 K be

be observed.

charge acts as a parasitic gate resulting in a drain current

decrease. Indeed, for lower negative Vgs, the current flows

nearer to the active layer/buffer interface and it is therefore

more sensitive to the backgating influence. The reduction of

the drain current degradation effect with temperature is

explained by thermal evacuation of the traps.

In Fig. 3, in addition to the drain current degradation

effect, we can also observe an important drift of pinch-off

voltage after applying drain voltage stress (15 V bias for

10 s) [15]. Before stress, for VgsZ0 V we obtain

30 mA mmK1 for the saturated drain current. After stress

application, and for the same gate bias the saturation drain

current is reduced and it becomes 10 mA mmK1. The same

mechanism can be proposed to explain this effect: the

presence of traps near the channel. The voltage stress may

Vgs=0 Volts

Vgs=0 Volts

Vgs=–1Volts

Vgs=–1Volts

Vgs=–2Volts

Vgs=–2Volts

10 12 14 16

ts)

fore and after stress application. An important drift of pinch-off voltage can

0.0 0.5 1.0 1.5 2.0 2.5 3.01E-8

1E-7

1E-6

1E-5

1E-4

1E-3

0.01

Barrier height fluctuation effect

AlGaN/GaN/Si HEMT

I gs(A

)

Vgs(Volts)

T=300K T=350K T=400K T=450K T=500K

Fig. 5. I–V–T characteristics performed on the schottky gate contact of

AlGaN/GaN/Si HEMT showing the presence of barrier height fluctuation

effect.

1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4–50

–45

–40

–35

–30

–25

–20

–15

–10

HEMT AlGaN/GaN/Si

Ea=1,85 eV=EG(AlGaN)/2

Ln(I

r)

1000/T(K–1)

Fig. 6. Temperature dependence of the gate reverse saturation current of

AlGaN/GaN/Si HEMT.

0 2 4 6 8 10 12 14 16

0.000

0.004

0.008

0.012

0.016

Kink effect

HEMT AlGaN/GaN/Al2O3

T=400K

I ds(A

)

Vds(Volts)

VGS=0V VGS=–1V VGS=–2V VGS=–3V VGS=–4V

Fig. 4. Ids–Vds characteristics measured on AlGaN/GaN/Al2O3 HEMT; a

notable kink effect is observed from TZ400 K.

N. Sghaier et al. / Microelectronics Journal 37 (2006) 363–370366

empty the donor levels, or more probably fill acceptor

centers with electron. The stress effect is a reversible

process. Indeed after stress the original characteristics

(those obtained before stress) are found again but after

waiting for at least 30 min. The filling-up process of traps by

Vds stress may be much more shorter than 30 min but the

emptying is a long one and needs 1 h because the only

activation process is a thermal one. This long time constant

let us to consider that we are in presence of deep defects.

In Fig. 4, the output characteristics obtained in the case

of samples with Al2O3 substrate are presented. As can be

seen, whereas the output characteristics at 300 K are nearly

ideal, at 400 K a spectacular variation of the output

conductance, known as kink effect, is observed.

Like on AlGaAs/GaAs HEMT and in III–V FETs

conductance dispersion is generally attributed to surface

states [16,17] or to deep level [27].

As a conclusion on these first investigations, the drift on

drain current characteristics presented above can be

explained by the presence of deep defects near the channel

for both HEMTs with Al2O3 and Si substrates.

3.2. Gate current measurements

The current voltage (I–V) characteristics on the schottky

gates for Si and Al2O3 HEMT’s are performed in the

temperature range of 100–500 K. Reverse current for gate

schottky contacts on Al2O3 HEMTs is over one-and-half

order of magnitude compared to Si HEMT’s. Direct I–V

characteristics shows two exponential regimes. An example

of these characteristics is displayed in Fig. 5. These

characteristics with different exponential regimes have

been already reported by different groups using different

Schottky metallization [18,19] and interpreted in terms of

barrier height fluctuations. For the characteristics with two

exponential regimes, a simple model considering two

different diodes in parallel with different barrier heights

has been proposed by Defives et al. [20]. These two barrier

heights correspond with the real Schottky for the upper one

high barrier height (HBH), and with a localized defective

zone at the metal/AlGaN interface for the lower one low

barrier height (LBH). Barrier height fluctuation effect is

observed in our case for Si HEMTs; it is totally absent on

Al2O3 HEMTs and it disappear at high temperature.

Idealities factors are extracted for all transistors, they

ranges from 2 at 300 K to 1.4 at 400 K. These suggests that

the dominant forward conduction mechanism is recombina-

tion of carriers at defect centers within the space charge

region as opposed to diffusion which would yield ideality

factors closer to unit. Using the common assumption that the

dominant recombination centers reside energetically near

the middle of the bandgap, the temperature dependence of

the recombination current is dominated by the intrinsic

carrier concentration, whose exponential temperature

dependence yields a thermal activation energy close to

half the semiconductor band gap. The temperature

dependence of the reverse saturation current (Ir) of Pt/Au/

AlGaN schottky gate is shown on the Arrhenius plot of

Fig. 6. The observed thermal activation energy of 1.85 eV is

100 200 300 400 500

0.0

0.1

0.2

0.3

0.4

0.5

1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4

3

4

5

6

7

8AlGaN/GaN/SiEa=0.31eV σ=4.7*10

–16cm

2

Ln(T

2 /en)

1000/T(K–1)

Arrhenius plot

HEMT AlGaN/GaN/Si

∆C(p

F)

Temperature (K)

en=46.51s–1

en=465.1s–1

en=2325.58s–1

en=4651.16s–1

en=11627s–1

Fig. 7. Typical capacitance DLTS signal performed on AlGaN/GaN/Si HEMT. The Arrhenius plot give the correspondent trap signature.

10–1 100 101 102 103 104 105 106

0.0

0.1

0.2

0.3

0.4

0.5

0.6 HEMT AlGaN/GaN/Si

∆C m

ax(p

f)

tp(µs)

Fig. 8. DLTS peak amplitude versus filling time in logarithmic scale for

signal observed on AlGaN/GaN/Si HEMT.

N. Sghaier et al. / Microelectronics Journal 37 (2006) 363–370 367

essentially half the AlGaN bandgap (EGZ3.79 eV for

Al0.2Ga0.8N [21]).

As a conclusion on these second part, the fluctuations in

barrier height for gate current in Si HEMTs is attributed to

deep centers, probably G–R centers. In order to confirm the

localization of these traps and to extract their activation

energies, capacitance DLTS, Gds frequency dispersion, and

random telegraph signal (RTS) have been performed next.

3.3. Defects analysis

3.3.1. Capacitance deep level transient spectroscopy

DLTS measurements were performed at temperature

between 80 and 550 K using boxcar technique. Fig. 7 shows

typical DLTS capacitance spectra for one of AlGaN/GaN/Si

HEMTs. Activation energies extracted from DLTS signals

are close to 0.31 eV (E1 defect). The capture cross-sections

are about 10K16 cm2. Nozaki et al. have observed a similar

defect with an activation energy close to 0.28 eV using

I-DLTS (current DLTS) technique performed on AlGaN/

GaN MODFET. They attribute this defect to DX centers

localized in the AlGaN layer [22]. These punctual traps,

observed in DLTS, can be either arbitrary distributed within

the epitaxial layer or concentrated in the vicinity of an

extended defect. In order to discriminate between these two

possibilities, DLTS measurements as a function of filling

time have been performed. Indeed, when a decorated

extended defect is present, if the trap concentration around

the extended defect is high enough, the interaction between

individual levels results in a repulsive potential which limits

the subsequent capture. This phenomenon implies a

logarithmic kinetic of the traps filling which has been

reported for the first time by Omling [23] in Si. In his case,

this behavior was attributed to dislocation defects decorated

by punctual traps. A typical result of the filling kinetic, for

filling times ranging from 1 ms to 100 ms, is given in Fig. 8.

As shown by the linear fit on the figure, a logarithmic kinetic

is observed. According to the model of Omling, we obtain a

confirmation of the presence of extended defect decorated

by punctual traps. Nevertheless, the model described above

is valid only if the traps are charged after the capture. To

check out this point, the variation of DLTS with the field has

been measured. When rising the reverse bias of the pulse, an

enlargement and a shift toward the low temperature side, of

the DLTS peak, is noticed. This sensitivity to the electric

filed is characteristic of occupied traps initially charged.

Indeed, in this case, the electrostatic potential well of the

defect is deformed by the electric field. This results in a

down-shift of the activation energy. Two mechanisms can

be responsible for this shift: Poole–Frenkel effect [24] or

phonon assisted tunneling [25]. In our case, it is difficult to

distinguish between the two, but the important point is that

we are actually in the presence of initially charged occupied

traps. We have not detected any defect by DLTS

capacitance performed on the gate of HEMTs with Al2O3

substrate. This result is in good agreement with static gate

I–V characteristics because we have not detected any

anomalies.

1000 10000 100000 1000000–182

–180

–178

–176

–174

–172

–170

Φ (d

egre

)

Frequency (Hz)

400K 410K 420K 430K 440K 450K

460K 470K AlGaN/GaN/Al2O3 HEMT

Fig. 9. Phase representation of the drain-source conductance dispersion for

AlGaN/GaN/Al2O3 HEMT.

N. Sghaier et al. / Microelectronics Journal 37 (2006) 363–370368

C-DLTS measurements performed on Si HEMTs reveals

the presence of E1 defect in the gate region. The sensitivity

of this defect to reverse bias polarization and to filling time

prove that we are in the case of an extended defect (probably

dislocations) decorated by punctual traps. The interaction

between extended defects and punctual traps near the

current path via the charge states variation can be a possible

origin of the barrier height fluctuations effect.

3.3.2. Frequency dispersion of Gm and Gds

When frequency dispersion of the transconductance and

output conductance is observed, it can generally be

interpreted by the presence of deep defects in the structure.

In the low-frequency domain, when the ac excitation is slow

as compared to the trapping and detrapping time constants,

the response coefficients Gm and Gds ac values keep close to

the dc value. For excitation at higher frequency, variations

of Gm and Gds start to be observed. These variations are

maximal when the time period of the excitation is close to a

filling or emptying time constant of the trap. At the

‘resonance’ frequency, there is also a maximum of the phase

dispersion or ‘group time delay’ d4/du. The resonance

frequency and the corresponding time constant t shift

together with temperature, because of the main trap filling

and/or emission rate increase. In usual cases, the trap

signature energy and frequency are linked by a classical

thermal activation rule [26]:

1

tZ 2pfM Z AsT2exp K

Ea

kT

� �(1)

where t is the thermal emission time constant; fM is the

frequency at maximum dephasing related to trap emission

Table 1

Gds(f) results performed on AlGaN/GaN HEMT’s on Si substrates

Ea (eV) 0.19 0.33 0.52

s (cmK2) 4.2!10K15 1.7!10K16 5.3!10K15

level; s is the capture cross-section, Ea is the trap activation

energy; A, a constant, depending essentially on the carriers

effective mass.

In the high-frequency domain, the difference between the

trap time constant and excitation period increases. Conse-

quently the dispersion decreases and, Gm and Gds get

constant values again.

For all the investigated samples, it is very important to

notice that no dispersion of Gm was found. The origin of

transconductance dispersion in III–V Fets is generally

attributed to surface states [16,17], or to deep level beneath

the gate in the barrier layer [27]. In our case, because no

dispersion of Gm is observed, we can conclude that the large

instabilities of the output characteristics are not arising from

surface states, even we cannot exclude their presence.

However, important variations of Gds have been

observed for transistors realized on Al2O3 substrate

(Fig. 9). In the case of GaAs FETs the frequency dispersion

of Gds is generally considered to be related to carrier

trapping at the channel/buffer interface [28].

The results of Fig. 9 show an important increase of drain-

source conductance with frequency above 400 K. As we

have seen in Section 1 this temperature correspond to the

beginning of kink effect appearance. To explain this

important drain-source conductance variation we propose

a model in which, for low frequency at low temperature, the

trap are filled with electrons, they get negatively charged,

and therefore, their presence prevent the penetration into the

substrate of the electrons flowing from the source to the

drain. The output conductance is low because the electrons

are confined in the channel by the negatively charged traps.

In the same model, the trapping efficiency is supposed to be

constant with temperature while the emission is thermally

activated. Therefore, at high temperature and high

frequency, part of the traps get emptied at each cycle of

the excitation and has not enough time to get filled again by

the next cycle. Therefore, the average charging of the traps

decreases and there is less negative charge under the

channel to prevent injection into the substrate of the

electrons flowing from source to drain. The output

conductance is therefore enhanced because of the reduction

of electron confinement. The trap signatures extracted from

the Arrhenius plot are reproducible for different samples

with different gate width. Two obtained values for HEMTs

with Al2O3 substrate 0.13 eV (E2) and 0.05 eV (E3). The

correspondent captures cross-sections for E2 and E3 levels

are, respectively, 10K18 and 10K19 cm2. Seghier and

Gislason [29] have observed a level using TAS and dark

current measurements with an activation energy close to

0.13 eV. They attribute this level to Mg related acceptor. In

(Table 1), we report results obtained on Si HEMTs.

0.91 1.03 1.8

3.9!10K17 2.1!10K17 3!10K16

Table 2

Main traps signature for AlGaN/GaN HEMT’s with Al2O3 and Si substrates

obtained from RTS measurements

Ea RTS (eV) s RTS (cmK2)

AlGaN/GaN/Al2O3

HEMT

0.33G0.03 8.719!10K19

AlGaN/GaN/Si

HEMT

0.17G0.03 1.767!10K20

0.54G0.03 4.295!10K19

Ea, activation energy; s, capture cross-section.

N. Sghaier et al. / Microelectronics Journal 37 (2006) 363–370 369

Contrarily to Al2O3 HEMTs, the Si ones shows a notable

dispersion on activation energies obtained by Gds(f) (0.19–

1.8 eV).

As a conclusion for this part, conductance frequency

dispersion reveals the presence of deep defects both in

HEMTs with Si and Al2O3 substrates. In the case of HEMT

with Al2O3 substrate, kink effect observed on Ids–Vds

characteristics start to appear from TZ400 K. We note

that from this temperature, significative Gds(f) signal have

been observed only when we are placed in the kink region

polarization conditions (in our case VdsZ5 V for Vgs

ZK2 V). Outside these conditions we have not observed

any significative Gds(f) signal. This result reinforce the

correlation between deep defects observed by Gds(f) and

kink effect.

3.3.3. Random telegraph signal measurements

From the analysis of I–V–T results presented above, it is

clear that defects localized near the channel or in the gate

region, are at the origin of the instabilities in current. In

these conditions, if a punctual trap is located at the

neighborhood of the current path, the trapping/detrapping

mechanism of an electron will result in a discrete time

fluctuation of the current. This phenomenon, called random

telegraph signal (RTS), has been first observed in silicon

transistors and attributed to the presence of dislocations

decorated by metallic impurities.

In our case, for all the transistors showing anomalies in

I–V characteristics, we have observed RTS both for HEMTs

with Si and Al2O3 substrates. This RTS was noticed only

above 300 K (when anomalies are present) and was not

observed for the quasi ideal transistors. For HEMTs with Si

substrate, a combination of two RTS (RTS1 and RTS2) is

frequently found at the same bias corresponding to two

different traps (Fig. 10). RTS analysis on the drain current

0.0 0.5 1.0 1.5 2.0 2.53,00E-007

3,00E-007

3,00E-007

3,00E-007

RTS1

RTS2

I ds(

A)

Time (s)

HEMT AlGaN/GaN/Si

Vds=0.95Volts

Vgs=–1.5Volts

Fig. 10. Random telegraph signal observed on AlGaN/GaN/Si HEMT at

TZ350 K. We distinguish easily the response (RTS1 and RTS2) of two

single traps.

for Al2O3 HEMTs shows a single switching level that

traduce the response of a single trap. We clearly observe

important current fluctuation with pulse time varying from 1

to 100 ms. According to the model of Hsu [30], the average

pulse duration, are, respectively, determined by the capture

(tc) and emission time (te) of an electron trap. The energetic

position of the deep trap is then given by:

ET KEF Z kT lntc

te

� �(2)

Applying this model to Al2O3 and Si HEMTs we have

extracted the defect signature corresponding to the

preponderant current switching (i.e. the most frequently

observed). The values of the activation energy and the cross-

section are reported in Table 2. From these RTS

measurements, we can conclude that individual defects

trapping/detrapping parasitic charge that moves in and out

of the traps on the surface and/or in the bulk of the

heterostructure, affects the density of the two-dimensional

electron gas (2DEG) in the channel. This causes parasitic

effects observed on static output characteristics.

4. Conclusion

In summary, we have investigated static measurements

and defect analysis on AlGaN/GaN/Si and Al2O3 HEMT’s

grown by MOCVD. Current–voltage characteristics shows

anomalies (Degradation in drain current, Kink effect, barrier

height fluctuations, etc.) attributed to traps centers and deep

defects. Defects analysis performed on these transistors by

C-DLTS and Gds(f) prove the presence of deep defects with

activation energies ranging from 0.05 to 1.8 eV. RTS

measurements reinforce the suggestion of traps presence

localized near the conduction channel. These centers are

responsible for trapping/detrapping phenomena and to

charges effect observed on stress results and RTS signals.

C-DLTS measurements performed on the gate contact of

HEMTs with Si substrates show the presence of deep

defects beneath the gate causing barrier height fluctuations.

Finally, a direct correlation between parasitic effects in

the output characteristics and the presence of deep traps

have been evidenced for AlGaN/GaN HEMTs realized on Si

and Al2O3 substrates grown by MOCVD. Probably the

easiest way to suppress these parasitic effects is to use high

purity substrates and GaN layers.

N. Sghaier et al. / Microelectronics Journal 37 (2006) 363–370370

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