Multilevel Multiphase Feedforward Space-Vector Modulation Technique
Three-Dimensional Feedforward Space Vector Modulation Applied to Multilevel Diode-Clamped Converters
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Transcript of Three-Dimensional Feedforward Space Vector Modulation Applied to Multilevel Diode-Clamped Converters
Three-Dimensional Feedforward Space VectorModulation Applied to MultilevelDiode-Clamped Converters
Jose I. Leon, Member, IEEE, Sergio Vazquez, Student Member, IEEE, Ramon Portillo, Student Member, IEEE,Leopoldo G. Franquelo, Fellow, IEEE, Juan M. Carrasco,Member, IEEE,
Patrick W. Wheeler,Member, IEEE, and Alan J. Watson, Student Member, IEEE
Abstract—Simplified space vector modulation (SVM) tech-niques for multilevel converters are being developed to improvefactors such as the computational cost, number of commutations,and voltage distortion. The feedforward SVM presented in thispaper takes into account the actual dc capacitor voltage unbalanceof the multilevel power converter. The resulting technique is alow-cost generalized feedforward 3-D SVM method and is particu-larized for three-phase multilevel diode-clamped converters. Thisnew modulation technique can be applied to topologies where thegamma component may not be zero. The computational cost of theproposed method is similar to those of comparable methods, andit is independent of the number of levels of the power converter.Experimental results using a three-level diode-clamped converterare presented to validate the proposed modulation technique.
Index Terms—Modulation, multilevel systems, voltage control.
I. INTRODUCTION
NOWADAYS, pulsewidth modulation (PWM) and space
vector modulation (SVM) methods coexist and are used
in power converters applied to energy conversion systems [1].
PWM presents the advantage of its extreme simplicity and its
easy and direct hardware implementation [2]–[5]. Level- and
phase-shifted PWMs are the most common PWM techniques
to be applied to multilevel converters using several triangular
carriers with voltage or phase shift [6], [7]. On the other hand,
SVM is a modulation technique where the discrete output
voltages of a power converter are geometrically represented.
The generation of one specific output voltage is made using
a linear combination of the nearest discrete output voltages
located in space. As a result, the averaged modulated voltage
coincides with the desired one. In this way, the modulation
concern is transformed to a mathematical problem, and all
works can be reduced to simple geometrical calculations. The
Manuscript received November 6, 2007; revised June 17, 2008. First pub-lished July 9, 2008; current version published December 30, 2008. This workwas supported by the Spanish Science and Education Ministry under ProjectTEC2006-03863.J. I. Leon, S. Vazquez, R. Portillo, L. G. Franquelo, and J. M. Carrasco are
with the Department of Electronic Engineering, University of Seville, 41092Seville, Spain (e-mail: [email protected]).P. W. Wheeler and A. J. Watson are with the School of Electrical and
Electronic Engineering, University of Nottingham, Nottingham NG7 2RD,U.K. (e-mail: [email protected].).Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org.Digital Object Identifier 10.1109/TIE.2008.928110
SVM technique is a software modulation method, and its
computational cost has been one important barrier to using
it in medium/high switching frequency applications. However,
in recent years, several SVM algorithms have been published,
greatly reducing the necessary calculations to the minimum.
Nowadays, a simple and efficient SVM can be executed in a few
microseconds, achieving similar results compared with PWM
methods [8], [9]. Comparing both modulation methods, the
great advantage of using SVM techniques is that some freedom
degrees appear in the modulation process. As the modulation
is done using a switching sequence, the order of the state
vectors into the sequence can be chosen, improving factors as
the number of commutations [10]. In addition, the existence
of redundancies in the control region of the multilevel power
converters can be used in the SVM algorithm to control the dc
voltages of the power converter [11]. Therefore, at the expense
of spending a few microseconds, several advantages can be
achieved using SVM. However, PWM and SVM techniques
for three-phase systems have problems when multilevel power
converters present unbalances in the dc voltages. A perfect
balance of the dc voltages of a multilevel converter cannot
be achieved in all loading conditions. Load imbalances and
nonlinear or transient loads have a significant impact on the
multilevel converter dc voltage ripple (oscillations or actual
values) [12]. In this case, both modulation techniques are not
prepared for this unbalance because they do not take it into
account to carry out the modulation process. In this way, errors
appear in the output modulated voltages because they do not
match to the desired ones when they are averaged over a
switching period. This fact leads to an increase of the harmonic
distortion of the output voltages and currents of the multilevel
converters [12]. This problem has previously been addressed
by other authors, avoiding the influence of the dc-link voltage
ripple on the output signals for two-level converters [13], [14].
Other authors presented works focused on multilevel converters
using multicarrier PWM [15] and SVM [16] for balanced
systems where the neutral is not connected. In this paper, a
3-D feedforward SVM (3D-FFSVM) technique is presented,
taking into account the actual unbalance of the power converter
to carry out the necessary calculations, avoiding errors in the
modulation process. Using the proposed 3D-FFSVM, balanced
and unbalanced systems can be modulated with balanced or
unbalanced dc voltages.
0278-0046/$25.00 © 2008 IEEE
II. SVM TECHNIQUES FOR MULTILEVEL CONVERTERS.
STATE OF THE ART
A. Balanced Systems
The SVM for balanced systems (without the connection of
the neutral point of the load) normally uses a representation
using the alpha–beta frame because the gamma component of
the voltages is zero. In this way, all the discrete positions of
the state vectors of the multilevel power converter are located
on the αβ plane, and 2-D SVM strategies can be used. The
computational cost of this type of SVM methods has been
decreasing, as researchers have introduced new algorithms from
complicated ones to the simplest ones, where the necessary
calculations are very simple [17]–[20].
B. Unbalanced Systems
The unbalanced operation of a multilevel power converter
can be obtained with the neutral of the load connected to the
middle point of the dc link (three-leg four-wire topologies)
or to a new phase of the power converter (four-leg four-wire
topologies). The three-leg four-wire converters can be used as
active power filters and power quality compensators [21]–[24].
On the other hand, the typical applications of four-leg four-
wire converters are distributed power generation, active power
filtering, PWM rectifiers, and common mode noise reduction
[25]. Using these converter topologies, the gamma component
of the voltages is not zero, and the three dimensions have to
be used in the modulation to generate the reference vectors
[25], [26]. First 3-D SVM algorithms were complicated because
they used αβγ components [25], but recent ones achieve high
quality results with a minimum number of calculations using
natural coordinates abc [26], [27]. These simple 3-D SVM tech-
niques carry out a fast geometrical search of the four nearest
state vectors to determine the switching sequence. Using abc
coordinates, the control region is a cube or a prism for three-
leg four-wire or four-leg four-wire topologies, respectively. For
instance, as was introduced in [26], the 3-D control region of a
three-level converter is shown in Fig. 1. The state vectors of the
power converter are denoted as xyz, which means that phases
a, b, and c, respectively, take values between zero and N − 1for an N -level converter.
State zero means that the phase is connected to the lowest
dc voltage level and N − 1 is the highest possible dc voltage.In this way, output voltages Va0, Vb0, and Vc0 are used as
the modulation components, where zero is the point of lowest
voltage of the multilevel power converter. The first task of the
3-D SVM technique presented in [26] (named in this paper as
the conventional 3D-SVM) is to know the subcube where the
reference vector is located. Once this subcube is determined,
it is divided into six tetrahedrons, and the 3D-SVM has to
calculate the tetrahedron where the reference vector is pointing.
These tetrahedrons are shown in Fig. 2.
Finally, depending on the tetrahedron case, a table summa-
rizes all the necessary information to determine the switching
sequence and the corresponding duty cycles [26]. It is important
to notice that these 3D-SVM techniques can be applied to
balanced and unbalanced systems, as the 2-D control region
Fig. 1. Control region of a three-level converter formed by several subcubes.
Fig. 2. Division of each subcube of the control region of a multilevel converterwith equal dc sources.
is indeed included in the 3-D control region. This idea is
graphically shown in [28]. Therefore, the 3D-SVM strategies
can be used for any multilevel power converter with or without
neutral connection, making these techniques very generalized
and useful.
III. THREE-DIMENSIONAL FEEDFORWARD SVM
A. Feedforward Basic Concept for Balanced Systems
The feedforward SVM was first introduced for balanced
systems in [29], working in the 2-D control region in the
αβ plane for three-level neutral-point-clamped converters. This
Fig. 3. Power circuit of the three-level diode-clamped converter.
technique takes into account the actual voltage unbalance of the
three-level diode-clamped converter to represent correctly the
actual 2-D control region. When a voltage unbalance is present
in the power converter, the state vector position changes, and
therefore, the use of the classic 2-D control region introduces
errors in the generation of the modulated output voltage. The
feedforward SVM technique calculates online the actual 2-D
control region, and in this way, the errors in the modulation
process are avoided. In this way, voltage unbalances in the dc
link do not create undesired distortion in the ac output voltages
or output currents. This feedforward 2D-SVM method was
later optimized in [16], where the computational cost of the
technique was reduced.
B. Proposed Feedforward Extension for Balanced and
Unbalanced Systems
In this paper, a simple and generalized 3D-FFSVM is pre-
sented for multilevel converters. In this way, previous works
are improved because the proposed technique can be used for
any number of levels of the power converter, and applications
with the neutral connected can be implemented. The proposed
3D-FFSVM technique is similar to the conventional 3D-SVM
method presented in [26], following a similar notation. The
steps to carry out the proposed 3D-FFSVM are the following.
1) Three-Dimensional Control Region Determination: If
the dc voltages of a multilevel converter are not balanced, the
conventional 3D-SVM technique cannot be used because the
3-D control region changes and it is not formed by regular
cubes. For instance, in the case of a three-level converter, the
control region shown in Fig. 1 changes because the discrete
locations of the state vectors move due to the voltage unbalance.
In the three-level case, two different dc voltages VC1 and VC2
have to be considered for a three-level diode-clamped converter.
The power circuit of the three-level diode-clamped converter is
shown in Fig. 3. The possible Vphase−0 voltages of the converter
are zero, VC1, and VC1 + VC2 (point zero is the lowest voltage
point of the power converter). As in Fig. 1, the phase states can
be represented but using generalized dc voltages VC1 and VC2.
In general, the 3-D control region is a cube with size VC1 +VC2 formed by several rectangular subprisms with different
sizes, depending on the voltage of each dc-link capacitor. This
idea is represented in Fig. 4, where the 3-D control region of
a three-level power converter fulfilling VC1 < VC2 is shown.
Fig. 4. Three-dimensional control region of a three-level converter withvoltage unbalance in the dc link (VC1 < VC2).
The δi values are the sizes of the subprisms that form the 3-D
control region, as shown in Fig. 4, for the three-level case
VDCtotal =N−1∑
i=1
Vci (1)
δi =Vci
VDCtotal
. (2)
A vector Vo containing the possible actual output voltages of the
power converter can be determined. The elements of this vector
are in increasing order from zero to the most positive value. In
the N -level case, this vector is as follows:
Vo = 0, VC1, VC1 + VC2, . . . , VC1 + · · · + VCN−1. (3)
At the same time, vector Vs can be written with the associated
phase states for each output voltage
Vs = 0, 1, 2, . . . , N − 1. (4)
The vector Vo is normalized with respect to the total voltage
of the dc-link generating vector Von
Von =Vo
VDCtotal
=
0,VC1
VDCtotal
,VC1 + VC2
VDCtotal
, . . . ,VC1 + · · · + VCN−1
VDCtotal
= 0, δ1, δ1 + δ2, . . . , δ1 + · · · + δN−1
= 0, δ1, δ1 + δ2, . . . , 1. (5)
2) Normalization of the Reference Vector: The reference
vector calculated by the controller is defined as Vref =Va, Vb, Vc, where Vj is the voltage of phase j with respect to
point zero. This vector is normalized using the total dc voltage
of the power converter. In this way, the normalized positive
reference voltages ua, ub, and uc take values between zero
and one
Vrefn =ua, ub, uc=
Va
VDCtotal
,Vb
VDCtotal
,Vc
VDCtotal
. (6)
3) Determination of the Subprism: An iterative geometrical
search over each component is carried out to find out the vertex
closer to the origin of the subprism, where vector Vrefn is
pointing. For instance, in phase a, it is iteratively asked where
ua is located inside Von vector, comparing with each element.
Finally, the lower and upper closer elements (named Oa and
OSa, respectively) in vector Von of the range where ua is
located can be determined. For instance, for the three-level case,
it follows that
Von =
0,VC1
VC1 + VC2
,VC1 + VC2
VC1 + VC2
= 0, δ1, δ1 + δ2 = 0, δ1, 1. (7)
If δ1 < ua < 1, the factor Oa is δ1 and the factor OSa is
one. This process is repeated for each phase of the reference
vector, calculating the vector Oabc = Oa, Ob, Oc that is thevertex closer to the origin of the rectangular subprism where the
reference vector ua, ub, uc is located. Moreover, the vectorOSabc = OSa,OSb,OSc is also determined. Vectors ∆ =δa, δb, δc and ∆V = ra, rb, rc can be calculated. Doingthis, the coordinate frame can be changed by moving the origin
from (0, 0, 0) to point Oabc, and in this way, vector ∆V is the
positive normalized reference vector Vrefn using this new frame.
∆ vector defines the size of the rectangular subprism where the
reference vector is located
∆ = δa, δb, δc=OSa−Oa,OSb−Ob,OSc−Oc (8)
∆V = ra, rb, rc=ua−Oa, ub−Ob, uc−Oc. (9)
4) Switching Sequence and Duty Cycle Calculation: The
next step of the proposed 3D-FFSVM is to find out the four
nearest state vectors to form the switching sequence to generate
the reference voltage. These four nearest state vectors are
the vertices of a volume which, in a similar way with the
conventional 3D-SVM method, has to be found. In this point
of the modulation process, the subprism where Vrefn is located
is known. The subprism has its origin in point Oabc, and after
the coordinates change, this point is the new origin (0, 0, 0).
The size of the subprism is δa, δb, and δc in components a, b,
and c, respectively. Six tetrahedrons can be used to divide the
subprism, as it is shown in Fig. 5.
The flow diagram to find out the tetrahedron where ∆V
vector is located is shown in Fig. 6. In the worst case, after three
simple comparisons, the tetrahedron is determined. Once the
tetrahedron is determined, the switching sequence to be used
and the corresponding duty cycles can be directly calculated
using a similar process to [26]. The results are summarized
in Table I, where parameters µa, µb, and µc are respectively
defined as
µa =ra
δa
µb =rb
δb
µc =rc
δc
. (10)
Fig. 5. Division of each rectangular subprism of the 3-D control region of amultilevel converter with generalized dc voltages.
Fig. 6. Flow diagram for the proposed 3D-FFSVM technique to find out thetetrahedron where the reference vector is pointing.
The switching sequence is formed by four vectors Spi (i =
1, 2, 3, 4) containing elements Op and OSp factors for phase
p. The last step of the proposed 3D-FFSVM algorithm is to
determine the proper switching corresponding to these factors
Op and OSp. The switching sequence is finally formed by the
phase states included in vector Vs with the same positions
of Op and OSp included in vector Von, respectively. For in-
stance, following the previous example for the three-level case,
working with phase a, the positions of Oa and OSa inside
Von were well known. If Oa = δ1 and OSa = 1, the positionsare two and three, respectively, in Von vector. Therefore, the
elements in positions two and three of Vs are the phase states
to be used in phase a of the power converter, and finally, the
switching sequence for this phase is 1, 2. This process has tobe repeated for the three phases of the power converter.
TABLE ISWITCHING SEQUENCES AND DUTY CYCLESDETERMINED BY THE 3D-FFSVM TECHNIQUE
IV. EXPERIMENTAL RESULTS
The proposed 3D-FFSVM technique has been experimen-
tally tested using the three-leg three-wire back-to-back three-
level diode-clamped converter. The rectifier side is controlling
the dc voltages of the dc-link (VC1 and VC2), and all the
experimental results have been taken from the inverter side.
The control system is based on a TMS320VC33 DSP board,
and the switching frequency is 1.4 kHz. Comparisons with
the conventional 3D-SVM from [26] have been made in order
to show the improvements achieved using the proposed 3-D
feedforward idea.
A. Steady-State Balanced DC Voltages Response
First, both modulation strategies have been tested in steady-
state conditions without any dc voltage unbalance in the power
converter. The total dc-link voltage is 800 V, and therefore,
400 V is the voltage of each half of the dc link. A 50-Hz sinu-
soidal waveform is applied as the reference voltage to be gen-
erated by the inverter side with a modulation index that is equal
to 0.9. The inverter is connected to an RL load (R = 120 Ωand L = 15 mH per phase). The corresponding output phasevoltages and currents of the inverter using 3D-FFSVM are
shown in Fig. 7, and they are equal to the ones obtained
using the conventional 3D-SVM technique. The experimen-
tal results have been taken using a Yokogawa WT1600. In
Fig. 8(a) and (b), the obtained numerical data of the harmonic
spectrum of the phase voltages and currents using the con-
ventional 3-D and feedforward 3-D techniques are presented,
respectively. No relevant changes are noticed between both
modulation techniques obtaining similar values. The obtained
results are similar to conventional SVM methods for multilevel
Fig. 7. Output phase voltages and currents of the three-level power inverterwithout dc voltage unbalance, using the proposed 3D-FFSVM.
Fig. 8. Numerical data of the harmonic spectrum of the output voltages andcurrents of the three-level power inverter without dc voltage unbalance, using(a) conventional 3D-SVM and (b) 3D-FFSVM.
converters [30]. In this way, it is demonstrated that the use of
the proposed 3D-FFSVM does not introduce any additional un-
desired distortion in voltage-balanced steady state conditions.
In addition, it is almost identical to conventional SVM methods
in terms of generality and computational cost.
B. Steady-State Unbalanced DC Voltage Response
Second, the controller of the rectifier in charge of the voltage
balancing is changed on purpose, forcing 100 V of unbal-
ance on the dc-link voltages of the power converter. Under
these conditions, and also imposing the loading conditions
of the experiment shown in Figs. 7 and 8, the conventional
3D-SVM and the 3D-FFSVM techniques are applied. The ob-
tained harmonic spectra of the output phase-to-phase voltages
are shown in Figs. 9 and 10, respectively. It can be seen that,
Fig. 9. Harmonic spectrum of the output phase-to-phase voltages of the three-level power inverter with a 100-V unbalance, using the conventional 3D-SVMtechnique.
Fig. 10. Harmonic spectrum of the output phase-to-phase voltages of thethree-level power inverter with a 100-V unbalance, using the proposed3D-FFSVM technique.
using the conventional 3D-SVM, the second order harmonic
content of the output phase-to-phase voltage achieves 4.6% of
the fundamental.
In Fig. 10, using the proposed 3D-FFSVM, the second
order harmonic content of the output phase-to-phase voltage
is approximately 0.6% of the fundamental. In addition, the
total harmonic distortion (THD) factor of the phase-to-phase
voltage is reduced from 15.3%, using the 3D-SVM method,
to 14.3%, using the 3D-FFSVM technique. The obtained har-
monic spectrum using the proposed 3D-FFSVM technique
shown in Fig. 10 is very similar to the obtained spectrum when
the dc voltages are balanced, as can be seen in comparing with
the values obtained in Fig. 8. As a conclusion, it is shown
that a dc voltage unbalance creates distortion in the output
waveforms if the conventional 3-D modulation is used, whereas
the proposed feedforward modification reduces this distortion
up to the minimum (similar values in Fig. 8).
In order to emphasize the achieved improvements with a
100-V unbalance in the dc-link voltage, a modulation technique
change from conventional 3D-SVM to 3D-FFSVM is applied to
the power converter. The fundamental component, the second
order harmonic value, and the THD of the output phase-to-
phase voltages are shown in Fig. 11(a)–(c), respectively. Using
the conventional 3D-SVM method, the voltage unbalance leads
to a second-order harmonic distortion of around 5%. It is clear
Fig. 11. Forcing a 100-V voltage unbalance; experimental results usingfirst the conventional 3D-SVM and finally the 3D-FFSVM. (a) Fundamentalcomponent of the phase voltage. (b) Second-order harmonic value of the phasevoltage. (c) THD of the phase voltage.
that, when the modulation method is changed using the new
3D-FFSVM, the second order harmonic distortion and the THD
are quickly and drastically reduced to lower values (around
0.5% and 14.5%, respectively) even with the 100-V voltage
unbalance.
Three-dimensional SVM techniques can generate voltages
with γ component different to zero, making these type of SVM
methods very convenient for converters where there is some
zero-sequence current [26], [27]. To emphasize this advantage,
an experiment connecting the neutral point of the load to the
middle point of the dc link has been carried out. A reference
signal composed of a 50-Hz sinusoidal signal with modulation
index that is equal to 0.75, 25% of third harmonic, and 20% of
50-Hz sinusoidal zero-sequence voltage is carried out. Fig. 12
shows the representation of this reference voltage and the αβ
plane. It is clear that the used reference voltage is not restricted
to that plane. The 3D-SVM and 3D-FFSVM techniques are
used, imposing a 100-V voltage unbalance in the dc link. The
harmonic spectra of the obtained phase-to-phase voltages using
the 3D-SVM and the 3D-FFSVM are shown in Figs. 13 and 14,
respectively. Comparing the obtained data, it is clear that, using
the 3D-SVM method, distortion in low order harmonics due to
the dc-link voltage unbalance becomes significant. When the
3D-FFSVM technique is used, this distortion is avoided. The
obtained currents using the 3D-FFSVM technique are shown
in Fig. 15, and it can be observed that they follow the applied
reference voltage with third harmonic content and sinusoidal
zero sequence.
C. Transient DC Voltage Response
The dynamic response of the 3D-FFSVM has been tested
by forcing a variable voltage unbalance in the dc-link voltage
of the power converter. In this way, the voltage unbalance
is changed from 0 to 100V, following a triangular up–down
Fig. 12. Representation of the control region of the three-level converter inbalanced dc voltage condition, the αβ plane, and the used phase-to-neutralreference voltage composed of a 50-Hz sinusoidal with third harmonic content(25%) and 50-Hz sinusoidal zero-sequence voltage (20%). Modulation indexis 0.75.
Fig. 13. Harmonic spectrum of the output phase-to-phase voltage using the3D-SVM technique under a 100-V voltage unbalance generating a 50-Hzsinusoidal voltage with third harmonic content (25%) and 50-Hz sinusoidalzero-sequence voltage (20%). Modulation index is 0.75.
Fig. 14. Harmonic spectrum of the output phase-to-phase voltage using the3D-FFSVM technique under a 100-V voltage unbalance generating a 50-Hzsinusoidal voltage with third harmonic content (25%) and 50-Hz sinusoidalzero-sequence voltage (20%). Modulation index is 0.75.
Fig. 15. Output currents using the proposed 3D-FFSVM technique with100-V voltage unbalance generating a 50-Hz sinusoidal voltage with thirdharmonic content (25%) and zero voltage (20%). Modulation index is 0.75.(From top to bottom) (a) Phase currents. (b) Zero-sequence current.
Fig. 16. DC voltage unbalance changed from 0 to 100 V, following a triangu-lar up–down waveform.
waveform as shown in Fig. 16. The experiment is done by forc-
ing this voltage unbalance and by generating a 50-Hz sinusoidal
waveform with a modulation index that is equal to 0.9. Under
these conditions, as in Fig. 11, a modulation technique change
from conventional 3D-SVM to 3D-FFSVM is carried out, and
the results are shown in Fig. 17. It can be clearly seen that the
dynamic voltage unbalance has a direct relation with the second
order harmonic value and the THD of the output phase-to-phase
voltages. When the 3D-FFSVM is applied, both values are
again attenuated, obtaining the same values in Fig. 11, where
the dc voltage unbalance was fixed to 100 V. Therefore, it is
demonstrated that the 3D-FFSVM technique dynamic response
achieves the same good operation compared with the steady
state response. In this way, a direct consequence is that the
capacitance of the dc-link can be hugely reduced because,
Fig. 17. Applying the dynamic dc voltage unbalance shown in Fig. 16;experimental results using first the 3D-SVM and finally the 3D-FFSVM.(a) Fundamental component of the phase voltage. (b) Second order harmonicvalue of the phase voltage. (c) THD of the phase voltage.
by using the proposed 3D-FFSVM, the possible oscillations
and imbalances of the dc voltage values will not affect the
output voltages and currents of the multilevel power converter.
This advantage was shown in [16] and [29], where the 2-D
feedforward SVM technique was introduced. This fact makes
the use of the proposed feedforward technique really interesting
and reduces the cost and the volume of the power converter.
V. CONCLUSION
DC-link capacitor voltage unbalance in multilevel power
converters can create errors in the modulated voltages, which
can lead to distorted output current waveforms. The basic idea
of feedforward modulation is used to develop a 3D-FFSVM
technique that can be applied to power system applications
with balanced and unbalanced supplies. The proposed method
is a feedforward modulation technique that can be used in
all the multilevel converter topologies even when the gamma
component is not zero.
In this paper, the actual values of the dc voltages are taken
into account in the modulation process, and therefore, the
undesirable output waveform distortion is avoided even in
the worst unbalanced conditions. Experimental results using
a back-to-back three-level diode-clamped converter prototype
are presented. These results validate the proposed modulation
technique. The steady state under balanced or unbalanced volt-
age conditions has been addressed, generating voltage signals
even with low order harmonic content and zero-sequence com-
ponent. In addition, the dynamic response of the system has
been tested, achieving good results. When using the proposed
3D-FFSVM strategy, the dc capacitor voltage unbalance does
not affect the THD of the output waveform, and therefore, the
dc-link capacitance can be minimized, leading to an economical
cost and volume reduction of the power converter. Finally, it is
important to notice that the computational cost of the proposed
modulation is very low and the technique can be applied to
multilevel converters with any number of levels.
REFERENCES
[1] J. Rodriguez, S. Bernet, B. Wu, J. O. Pontt, and S. Kouro, “Multi-level voltage-source-converter topologies for industrial medium-voltagedrives,” IEEE Trans. Ind. Electron., vol. 54, no. 6, pp. 2930–2945,Dec. 2007.
[2] J. Holtz, “Pulsewidth modulation—A survey,” IEEE Trans. Ind. Electron.,vol. 39, no. 5, pp. 410–420, Oct. 1992.
[3] K. M. Cho, W. S. Oh, Y. T. Kim, and H. J. Kim, “A new switching strategyfor pulse width modulation (PWM) power converters,” IEEE Trans. Ind.
Electron., vol. 54, no. 1, pp. 330–337, Feb. 2007.[4] J. Pou, J. Zaragoza, P. Rodriguez, S. Ceballos, V. M. Sala, R. P. Burgos,
and D. Boroyevich, “Fast-processing modulation strategy for the neutral-point-clamped converter with total elimination of low-frequency voltageoscillations in the neutral point,” IEEE Trans. Ind. Electron., vol. 54, no. 4,pp. 2288–2294, Aug. 2007.
[5] F. Blaabjerg, J. Pedersen, and P. Thoegersen, “Improved modulation tech-niques for PWM-VSI drives,” IEEE Trans. Ind. Electron., vol. 44, no. 1,pp. 87–95, Feb. 1997.
[6] G. Carrara, S. Gardella, M. Marchesoni, R. Salutari, and G. Sciutto, “Anew multilevel PWMmethod: A theoretical analysis,” IEEE Trans. Power
Electron., vol. 7, no. 3, pp. 497–505, Jul. 1992.[7] B. P. McGrath and D. G. Holmes, “Multicarrier PWM strategies for
multilevel inverters,” IEEE Trans. Ind. Electron., vol. 49, no. 4, pp. 858–867, Aug. 2002.
[8] K. Zhou and D. Wang, “Relationship between space-vector modulationand three-phase carrier-based PWM: A comprehensive analysis,” IEEE
Trans. Ind. Electron., vol. 49, no. 1, pp. 186–196, Feb. 2002.[9] A. M. Hava, R. J. Kerkman, and T. A. Lipo, “Carrier-based PWM-
VSI overmodulation strategies: Analysis, comparison, and design,” IEEE
Trans. Power Electron., vol. 13, no. 4, pp. 674–689, Jul. 1998.[10] B. P. McGrath, D. G. Holmes, and T. A. Lipo, “Optimized space vector
switching sequences for multilevel inverters,” IEEE Trans. Power Elec-
tron., vol. 18, no. 6, pp. 1293–1301, Nov. 2003.[11] A. K. Gupta and A. M. Khambadkone, “A simple space vector PWM
scheme to operate a three-level NPC inverter at high modulation indexincluding overmodulation region, with neutral point balancing,” IEEE
Trans. Ind. Appl., vol. 43, no. 3, pp. 751–760, May/Jun. 2007.[12] J. Pou, D. Boroyevich, and R. Pindado, “Effects of imbalances and non-
linear loads on the voltage balance of a neutral-point-clamped inverter,”IEEE Trans. Power Electron., vol. 20, no. 1, pp. 123–131, Jan. 2005.
[13] F. Blaabjerg, D. O. Neacsu, and J. K. Pedersen, “Adaptive SVM to com-pensate DC-link voltage ripple for four-switch three-phase voltage-sourceinverters,” IEEE Trans. Power Electron., vol. 14, no. 4, pp. 743–752,Jul. 1999.
[14] P. N. Enjeti and W. Shireen, “A new technique to reject DC-link voltageripple for inverters operating on programmed PWM waveforms,” IEEE
Trans. Power Electron., vol. 7, no. 1, pp. 171–180, Jan. 1992.[15] S. Kouro, P. Lezana, M. Angulo, and J. Rodriguez, “Multicarrier PWM
with DC-link ripple feedforward compensation for multilevel inverters,”IEEE Trans. Power Electron., vol. 23, no. 1, pp. 52–59, Jan. 2008.
[16] J. Pou, D. Boroyevich, and R. Pindado, “New feedforward space-vectorPWM method to obtain balanced AC output voltages in a three-levelneutral-point-clamped converter,” IEEE Trans. Ind. Electron., vol. 49,no. 5, pp. 1026–1034, Oct. 2002.
[17] M. M. Prats, J. M. Carrasco, and L. G. Franquelo, “Effective algorithm formultilevel converters with very low computational cost,” Electron. Lett.,vol. 38, no. 22, pp. 1398–1400, Oct. 2002.
[18] N. Celanovic and D. Boroyevich, “A fast space-vector modulationalgorithm for multilevel three-phase converters,” IEEE Trans. Ind. Appl.,vol. 37, no. 2, pp. 637–641, Mar./Apr. 2001.
[19] A. K. Gupta and A. M. Khambadkone, “A space vector PWM scheme formultilevel inverters based on two-level space vector PWM,” IEEE Trans.
Ind. Electron., vol. 53, no. 5, pp. 1631–1639, Oct. 2006.[20] A. R. Beig, G. Narayanan, and V. T. Ranganathan, “Modified SVPWM
algorithm for three level VSI with synchronized and symmetrical wave-forms,” IEEE Trans. Ind. Electron., vol. 54, no. 1, pp. 486–494, Feb. 2007.
[21] A. N.-Y. Dai, M.-C. Wong, and Y.-D. Han, “Application of a three-level NPC inverter as a three-phase four-wire power quality compensatorby generalized 3DSVM,” IEEE Trans. Power Electron., vol. 21, no. 2,pp. 440–449, Mar. 2006.
[22] C. Zhan, A. Arulampalam, and N. Jenkins, “Four-wire dynamic volt-age restorer based on a three-dimensional voltage space vector PWM
algorithm,” IEEE Trans. Power Electron., vol. 18, no. 4, pp. 1093–1102,Jul. 2003.
[23] S. J. Chiang, W. J. Ai, and F. J. Lin, “Parallel operation of capacity-limited three-phase four-wire active power filters,” Proc. Inst. Electr.
Eng.—Electr. Power Appl., vol. 149, no. 5, pp. 329–336, Sep. 2002.[24] Y. Li, D. M. Vilathgamuwa, and P. C. Loh, “Microgrid power quality en-
hancement using a three-phase four-wire grid-interfacing compensator,”IEEE Trans. Ind. Appl., vol. 41, no. 6, pp. 1707–1719, Nov./Dec. 2005.
[25] R. Zhang, V. H. Prasad, D. Boroyevich, and F. C. Lee, “Three-dimensionalspace vector modulation for four-leg voltage-source converters,” IEEE
Trans. Power Electron., vol. 17, no. 3, pp. 314–326, May 2002.[26] M. M. Prats, L. G. Franquelo, R. Portillo, J. I. Leon, E. Galvan, and
J. M. Carrasco, “A 3-D space vector modulation generalized algorithm formultilevel converters,” IEEE Power Electron. Lett., vol. 1, no. 4, pp. 110–114, Dec. 2003.
[27] L. G. Franquelo, M. M. Prats, R. Portillo, J. I. Leon, M. Perales, J. M.Carrasco, E. Galvan, and J. L. Mora, “Three-dimensional space-vectormodulation algorithm for four-leg multilevel converters using abc coordi-nates,” IEEE Trans. Ind. Electron., vol. 53, no. 2, pp. 458–466, Apr. 2006.
[28] M. M. Prats, L. G. Franquelo, J. I. Leon, R. Portillo, E. Galvan, andJ. M. Carrasco, “A SVM-3D generalized algorithm for multilevel convert-ers,” in Proc. 29th Annu. IEEE IECON, Nov. 2–6, 2003, vol. 1, pp. 24–29.
[29] N. Celanovic, I. Celanovic, and D. Boroyevich, “The feedforward methodof controlling three-level diode clamped converters with small DC-linkcapacitors,” in Proc. 32nd Annu. IEEE PESC, Jun. 17–21, 2001, vol. 3,pp. 1357–1362.
[30] D. G. Holmes and T. A. Lipo, Pulse Width Modulation for Power
Converters—Principles and Practice. Piscataway, NJ: IEEE Press,2003.
Jose I. Leon (S’04–M’07) was born in Cádiz, Spain,in 1976. He received the B.S., M.S., and Ph.D.degrees in telecommunications engineering from theUniversity of Seville (US), Seville, Spain, in 1999,2001, and 2006 respectively.In 2002, he was with the Power Electronics
Group, US, working on R&D projects. Currently, heis an Associate Professor with the Department ofElectronic Engineering, US. His research interestsinclude electronic power systems, modeling, andmodulation and control of power-electronics con-
verters and industrial drives.
Sergio Vazquez (S’04) was born in Seville, Spain,in 1974. He received the B.S. and M.S. degrees inindustrial engineering from the University of Seville(US), Seville, in 2003 and 2006, respectively.In 2002, he was with the Power Electronics Group,
US, working on R&D projects. He is currently anAssistant Professor with the Department of Elec-tronic Engineering, US. His research interestsinclude electronic power systems, modeling, mod-ulation and control of power electronic convertersand industrial drives, and power quality in renewable
generation plants.
Ramon Portillo (S’06) was born in Seville, Spain,in 1974. He received the Industrial Engineer degreefrom the University of Seville (US), Seville, in 2002.He is currently working toward the Ph.D. degreein electrical engineering in the Power ElectronicsGroup, US.In 2001, he was with the Power Electronics Group,
US, working on R&D projects. Since 2002, he hasbeen an Associate Professor with the Department ofElectronic Engineering, US. His research interestsinclude electronic power systems applied to energy
conditioning and generation, power quality in renewable generation plants,applications of fuzzy systems in industry and wind farms, and modeling andcontrol of power-electronic converters and industrial drives.
Leopoldo G. Franquelo (M’84–SM’96–F’05) wasborn in Málaga, Spain. He received the M.Sc. andPh.D. degrees in electrical engineering from the Uni-versity of Seville (US), Seville, Spain, in 1977 and1980, respectively.In 1978, he joined the US as a Research Assistant,
where he became an Associate Professor in 1982and the Director of the Department of ElectronicEngineering from 1998 to 2005 and has been aProfessor since 1986. He is leading a large researchand teaching team in Spain. In the last five years, his
group activity can be summarized as follows: 40 publications in internationaljournals, 165 in international conferences, ten patents, advisor for ten Ph.D.dissertations, and 96 R&D projects. His current research interests are modula-tion techniques for multilevel inverters and their application to power electronicsystems for renewable energy systems.Dr. Franquelo was the Vice President of the IEEE Industrial Electronics
Society (IES) Spanish Chapter (in 2002–2003) and a Member at Large of theIES AdCom (in 2002–2003). He was the Vice President for Conferences ofthe IES (in 2004–2007), in which he has also been a Distinguished Lecturersince 2006. He has been an Associate Editor for the IEEE TRANSACTIONS ONINDUSTRIAL ELECTRONICS since 2007. Since January 2008, he has been thePresident Elect of the IEEE IES.
Juan M. Carrasco (M’97) was born in San Roque,Spain. He received the M.Eng. and Dr.Eng. de-grees in industrial engineering from the Universityof Seville (US), Seville, Spain, in 1989 and 1992,respectively.From 1990 to 1995, he was an Assistant Professor
with the Department of Electronic Engineering, US,where he is currently an Associate Professor. Hehas been working for several years in the powerelectronics field, where he has been involved in theindustrial application of the design and development
of power converters applied to renewable energy technologies. His currentresearch interests are distributed power generation and the integration ofrenewable energy sources.
Patrick W. Wheeler (M’00) received the B.Eng. de-gree (with honors) and the Ph.D. degree in electricalengineering for his work on matrix converters fromthe University of Bristol, Bristol, U.K., in 1990 and1994, respectively.In 1993, he was a Research Assistant with the
Department of Electrical and Electronic Engineer-ing, University of Nottingham, Nottingham, U.K. In1996, he became a Lecturer in the Power Electronics,Machines, and Control Group, School of Electricaland Electronic Engineering, University of Notting-
ham. Since January 2008, he has been a Full Professor in the same researchgroup. He has published over 200 papers in leading international conferenceproceedings and journals. His research interests are power converter topologiesand their applications.
Alan J. Watson (S’03) received the Masters de-gree in electrical and electronic engineering fromthe University of Nottingham, Nottingham, U.K., in2004, where he is currently working toward the Ph.D.degree in the School of Electrical and ElectronicEngineering.His research interests include multilevel convert-
ers, advanced modulation schemes, and power con-verter control.