SISTEMA DE GESTIÓ DOMÓTICA PER OPTIMITZAR EL ...

TREBALL FI DE GRAU

Grau en Enginyeria Electrònica Industrial i Automàtica

SISTEMA DE GESTIÓ DOMÓTICA PER OPTIMITZAR EL CONSUM ENÈRGETIC D’UN HABITATGE

Annex

Autor: Ametller Parellada, Enric

Director: Manzanares Brotons, Manuel Andrés

Convocatòria: Juny, 2019

Índex

Programació

1.Manual d’usuari.................................................................................................................3

2.Programa............................................................................................................................6

Datasheets

1.TL074.................................................................................................................................28

2.28BYJ-48...........................................................................................................................46

3.BC547................................................................................................................................47

4.BD137................................................................................................................................56

5.CD4555..............................................................................................................................61

6.TIP147...............................................................................................................................71

Manual d’usuari

El manual d’instruccions pretén facilitar a l’usuari manipular el sistema domòtic del prototip de

proves. Està estrictament relacionat amb el diagrama de flux.

L’usuari sempre es comunicarà amb el microcontrolador mitjançant el teclat matricial, mentre que

el microcontrolador es comunicarà amb l’usurari mitjançant la pantalla LCD. Sempre que l’usurari

hagi de introduir alguna cosa per continuar el flux del programa la pantalla LCD ho farà saber, ara

bé, s’ha de saber quines tecles s’han de pressionar ja que sinó el microcontrolador no reaccionarà.

En el teclat matricial trobem tots els números des del 0 al 9, les lletres A, B, C, D i els caràcters ‘*’ i

`#`.

En primer lloc, els caràcters ‘*’ i `#` s’utilitzaran per navegar entre menús, venen a representar les

funcions de acceptar i cancel·lar.

En segon lloc, les lletres s’utilitzaran per a seleccionar diferents modes.

Finalment, els números s’utilitzaran per a introduir paràmetres, com són les consignes de

temperatura.

Quan iniciem el sistema connectant l’alimentació apareixerà a la pantalla LCD “control domòtic”,

fins que no es pressioni la tecla ‘*’ no s’activarà el sistema. Seguidament a la pantalla LCD apareixerà

“seleccionar mode”, en aquest moment hi ha dues opcions:

Pressionar la tecla ‘A’: S’activarà el mode automàtic.

Pressionar la tecla ‘B’: S’activarà el mode manual.

Un cop s’ha entrat al mode automàtic, les persianes i llums aniran controlades automàticament i la

calefacció estarà controlada per una regulació tot/res amb histèresi.

Si es vol tornar a l’inici per a canviar de mode s’ha de pressionar la tecla ´*´.

Si es vol canviar la consigna de la temperatura s’ha de pressionar la tecla ‘#’.

Ambdues tecles poden ser pitjades en qualsevol moment ja que funcionen a mode de interrupció,

però si el microcontrolador està pujant o baixant una persiana acabarà primer aquesta feina.

Un cop s’ha entrat a mode manual, es podrà controlar l’estat de qualsevol actuador i l’usuari tindrà

tres opcions:

Pressionar la tecla ‘A’: S’entrarà al control de persianes.

Pressionar la tecla ‘B’: S’entrarà al control de llums.

Pressionar la tecla ‘C’: S’entrarà al control de la calefacció.

Si s’ha entrat al control de persianes la pantalla LCD mostrarà “persianes” i “elegir habitació”,

seguidament l’usuari ha de elegir una de les quatre habitacions on hi han persianes instal·lades,

essent:

Tecla ‘A’: Habitació 1.

Tecla ‘B’: Habitació 2.

Tecla ‘C’: Habitació 3.

Tecla ‘D’: Despatx.

Un cop elegida la habitació la pantalla LCD mostrarà “habitació ‘n’ seleccionada” i “pujar o baixar”,

en aquest moment l’usuari te dues opcions:

Pressionar la tecla ‘A’: La persiana pujarà, sempre i quan estigui baixada.

Pressionar la tecla ‘B’: La persiana baixarà, sempre i quan estigui pujada.

Seguidament el programa retornarà a l’inici del mode manual i esperà fins que elegim algun altre

actuador.

El control de llums funcionarà de forma idèntica al de les persianes a l’hora de elegir la habitació,

després per encendre o apagar una llum caldrà:

Pressionar la tecla ‘A’: Encendrà el llum, sempre i quan estigui apagat.

Pressionar la tecla ‘B’: Apagarà el llum, sempre i quan estigui encès.

Finalment, si s’ha entrat al control de calefacció es tindran dues opcions a elegir:

Pressionar la tecla ‘A’: Control per histèresis.

Pressionar la tecla ‘B’: Control PID.

Un cop dins de un control de calefacció la pantalla LCD mostrarà les variables “temperatura”,

“consigna” i si la calefacció està engegada o parada en el control per histèresis, o be el % de

modulació en el control PWM. Per els dos controls el microcontrolador es dedicarà exclusivament a

controlar la calefacció i no en sortirà a no ser que:

Es premi la tecla ‘#’: El programa saltarà a canviar la consigna.

Es premi la tecla ‘*’: El programa deixarà de controlar la calefacció i tornarà al principi de

control manual.

Per a canviar la consigna la pantalla LCD mostrarà “introduir consigna”, seguidament l’usuari ha de

introduir un valor entre 25 i 99 amb el teclat matricial, considerant 25 la temperatura ambient i

menor d’aquesta es molt difícil aconseguir. En cas de no introduir un numero dins aquest rang el

microcontrolador ho considerarà com no vàlid i s’haurà de introduir un altre valor. Un cop introduït

el valor:

Pressionar la tecla ‘A’: Acceptem la consigna i el microcontrolador valida que estigui dins el

rang permès, en cas afirmatiu, aquesta serà la nova consigna i es retornarà al control de la

calefacció.

Pressionar la tecla ‘B’: En cas que s’hagi introduït un valor no correcte per equivocació,

reinicia la escriptura de la consigna.

Programa

#include <main.h>

#define LDR1 PIN_A0

#define LDR2 PIN_A1

#define LDR3 PIN_A2

#define LDR4 PIN_A3

#define LLUM1 PIN_C1

#define LLUM2 PIN_E0



#define CAL PIN_C2

//directivas

#define PCF_SDA PIN_C4

#define PCF_SCL PIN_C3

#use i2c(master, sda=PCF_SDA, scl=PCF_SCL)

///////////////

#include <i2c_Flex_LCD.h>

#include <stdlib.h>

#include <string.h>

///////////////////////////declaració tecles teclat matricial/////////////////////////////

const int16 keyValueMinor[17]=

0,300 ,380 ,395 ,412 ,436 ,462 ,484 ,508 ,546 ,589 ,625 ,665 ,731 ,809 ,880 ,964;

const int16 keyValueMajor[17]=

301,379 ,394 ,411 ,435 ,461 ,483 ,507 ,545 ,588 ,624 ,664 ,730 ,808 ,879 ,963 ,1024;

const char KeySimbols[17]=

'-','D','#','0','*','C','9','8','7','B','6','5','4','A','3','2','1';

//////////////////////////////////////////////////////////////////////////////////////////

/////////////////////////declaració sequencia motors/////////////////////////////////////

const int motor1[] = 128,192,64,96,32,48,16,144;

const int motor2[] = 132,196,68,100,36,52,20,148;

const int motor3[] = 136,200,72,104,40,56,24,152;

const int motor4[] = 140,204,76,108,44,60,28,156;

/////////////////////////////////////////////////////////////////////////////////////////

//declaració variables

int i;

int j;

int k;

int16 salida;

float valor_adc;

int1 flag = 0;

int1 automatic = 0;

int1 manual = 0;

int1 histeresis = 0;

int1 PID = 0;

char tecla;

int16 consigna = 25;

int selec;

const char lletres[4] = 'A','B','C','D';

const int numeros[4] = 1,2,3,4;

//rutina de servei a l'interrupció

#int_EXT

void EXT_isr(void)

flag=1;

//funció per a llegir el teclat matricial

char teclat(void)

char caracter;

set_adc_channel(0);

delay_us(30);

salida = read_adc();

for(i=0;i<18;i++)

if(salida>=keyValueMinor[i]&&salida<keyValueMajor[i])

caracter=KeySimbols[i];

delay_us(100);

return caracter;

//funció per moure els motors

void motor (int posicio,int endavant) //posició rang del 1 al 4 per elegir habitació

//endavant rang 0 o 1 per pujar o baixar la persiana --> 1 baixar | 0 pujar

switch (motor)

case 1:

if (endavant == 1)

for (j=0;j<=5;j++)

for (i=0;i<=7;i++)

output_b(motor1[i]);

delay_ms(1);

else

for (j=0;j<=5;j++)

for (i=7;i>=1;i--)


delay_ms(1);

break;

case 2:

if (endavant == 1)

for (j=0;j<=5;j++)

for (i=0;i<=7;i++)


delay_ms(1);

else

for (j=0;j<=5;j++)

for (i=7;i>=1;i--)


delay_ms(1);

break;

case 3:

if (endavant == 1)

for (j=0;j<=5;j++)

for (i=0;i<=7;i++)


delay_ms(1);

else

for (j=0;j<=5;j++)

for (i=7;i>=1;i--)


delay_ms(1);

break;

case 4:

if (endavant == 1)

for (j=0;j<=5;j++)

for (i=0;i<=7;i++)


delay_ms(1);

else

for (j=0;j<=5;j++)

for (i=7;i>=1;i--)


delay_ms(1);

break;

//funció per a controlar els llums manualment

void llums_manual()

lcd_gotoxy(1,1);

lcd_putc("llums");

lcd_gotoxy(1,2);

lcd_putc("sel. habitació");

while (flag == 0)

tecla = teclat();

flag = 0;

for (k=0;k<5;k++)

if (lletres[k] == tecla)

selec = numeros[k];

switch (selec)

case 1:

lcd_gotoxy(1,1);

lcd_putc("habitació 1");

lcd_gotoxy(1,2);

lcd_putc("encendre o apagar ?");

while (flag == 0)

tecla = teclat();

flag = 0;

if (tecla == "A")

output_high(LLUM1);

else if (tecla == "B")

output_low(LLUM1);

break;

case 2:

lcd_gotoxy(1,1);


lcd_gotoxy(1,2);


while (flag == 0)

tecla = teclat();

flag = 0;

if (tecla == "A")

output_high(LLUM2);


output_low(LLUM2);

break;

case 3:

lcd_gotoxy(1,1);


lcd_gotoxy(1,2);


while (flag == 0)

tecla = teclat();

flag = 0;

if (tecla == "A")

output_high(LLUM3);


output_low(LLUM3);

break;

case 4:

lcd_gotoxy(1,1);


lcd_gotoxy(1,2);


while (flag == 0)

tecla = teclat();

flag = 0;

if (tecla == "A")

output_high(LLUM4);


output_low(LLUM4);

break;

//funció per a controlar les persianes manualament

void persianes_manual()

lcd_gotoxy(1,1);

lcd_putc("persianes");

lcd_gotoxy(1,2);

lcd_putc("sel. habitació");

while (flag == 0)

tecla = teclat();

flag = 0;

for (k=0;k<5;k++)

if (lletres[k] == tecla)

selec = numeros[k];

switch (selec)

case 1:

lcd_gotoxy(1,1);


lcd_gotoxy(1,2);

lcd_putc("pujar o baixar ?");

while (flag == 0)

tecla = teclat();

flag = 0;

if (tecla == "A")

motor(1,0);


motor (1,1);

break;

case 2:

lcd_gotoxy(1,1);


lcd_gotoxy(1,2);


while (flag == 0)

tecla = teclat();

flag = 0;

if (tecla == "A")

motor(2,0);


motor (2,1);

break;

case 3:

lcd_gotoxy(1,1);


lcd_gotoxy(1,2);


while (flag == 0)

tecla = teclat();

flag = 0;

if (tecla == "A")

motor(3,0);


motor (3,1);

break;

case 4:

lcd_gotoxy(1,1);


lcd_gotoxy(1,2);


while (flag == 0)

tecla = teclat();

flag = 0;

if (tecla == "A")

motor(4,0);


motor (4,1);

break;

void cal_hist()

int16 temp;

int1 ences;

set_adc_channel(5);

delay_us(30);

temp = read_adc();

if( (ences==1) & (temp > consigna * 1,05))

output_low(CAL);

ences = 0;

else if ( (ences==0) & (temp < consigna * 0,95))

output_high(CAL);

ences = 1;

//funció per a l'elecció del tipus de calefacció

void cal_manual()

while (flag == 0)

tecla = teclat();

flag = 0;

if (tecla == 'A')

histeresis = 1;

else if (tecla == 'B')

PID = 1;

long consigna (int nd)

//Funció per agafar dades del teclat

long val;

int i;

char str[5]; //Variable tipo String

str[0]='0';

for(i=0;i<nd;i++)

while (flag == 0)

tecla=teclat(); //Lee el valor del teclado y espera hasta que alguna tecla se pulse

flag = 0;

if(tecla!='*')

//Muestra el digito presionado en el LCD

lcd_gotoxy(i,1);

lcd_putc(tecla);

//Almacena el dato presionado en la variable String

str[i]=tecla;

elsei=nd; //Si se presiona * sale del For

val = atol(str); //Convierte el String en un valor numerico

return(val);

void main()

set_tris_a(0x33); //configuració port entrada/sortida

set_tris_b(0x01);

set_tris_c(0);

set_tris_d(0);

set_tris_e(0);

lcd_init();

setup_adc_ports(all_analog|VSS_VDD); //configuració ADC

setup_adc(adc_clock_internal);

lcd_init();

lcd_putc("/f"); //netejar pantalla LCD

enable_interrupts(Global);

enable_interrupts(INT_EXT_L2H);

// kp_scan();

while (TRUE)

lcd_gotoxy(1,1);

lcd_putc("control domòtic"); //inici del sistema

tecla = teclat();

if (tecla == '*')

lcd_gotoxy(1,1);

lcd_putc("seleccionar mode");

while (tecla != 'A' | tecla != 'B' ) //selecció de mode

tecla = teclat();

if (tecla == 'A')

automatic = 1;

else if (tecla == 'B')

manual = 1;

while(automatic == 1) //seqüència del mode automatic

lcd_gotoxy(1,1);

lcd_putc("Mode Automàtic");

//control de llums i persinaes

if (input (LDR1) == 1) //ldr = 1 --> llum | ldr = 0 -->foscor

motor(1,1);

output_low(LLUM1);

lcd_gotoxy(1,1);

lcd_putc("persiana 1 pujada");

lcd_gotoxy(1,2);

lcd_putc("llum 1 apagat");

else

motor(1,0);

output_high(LLUM1);

lcd_gotoxy(1,1);

lcd_putc("persiana 1 baixada");

lcd_gotoxy(1,2);

lcd_putc("llum 1 ences");


motor(2,1);

output_low(LLUM2);

lcd_gotoxy(1,1);


lcd_gotoxy(1,2);


else

motor(2,0);

output_high(LLUM2);

lcd_gotoxy(1,1);


lcd_gotoxy(1,2);



motor(3,1);

output_low(LLUM3);

lcd_gotoxy(1,1);


lcd_gotoxy(1,2);


else

motor(3,0);

output_high(LLUM3);

lcd_gotoxy(1,1);


lcd_gotoxy(1,2);



motor(4,1);

output_low(LLUM4);

lcd_gotoxy(1,1);


lcd_gotoxy(1,2);


else

motor(4,0);

output_high(LLUM4);

lcd_gotoxy(1,1);


lcd_gotoxy(1,2);


cal_hist();

if (flag == 1)

tecla = teclat(); //procediment per tornar al menú inical

if ( tecla == '*')

automatic = 0;

flag = 0;

while (manual == 1)

lcd_gotoxy(1,1);

lcd_putc("control manual");

tecla = teclat();

switch (tecla) //selecció d'actuador

case "A":

llums_manual();

break;

case "B":

persianes_manual();

break;

case "C":

cal_manual();

break;

if (flag == 1)

tecla = teclat(); //procediment per tornar al menú inical

if ( tecla == '*')

manual = 0;

flag = 0;

while (histeresis == 1)

int16 temp;

int1 ences;

set_adc_channel(5);

delay_us(30);

temp = read_adc();

if( (ences==1) & (temp > consigna * 1,05))

output_low(CAL);

ences = 0;

else if ( (ences==0) & (temp < consigna * 0,95))

output_high(CAL);

ences = 1;

while (PID = 1)

This is information on a product in full production.

November 2013 DocID2297 Rev 5 1/18

TL074

Low-noise JFET quad operational amplifier

Datasheet - production data

Features

• Wide common-mode (up to VCC+) and

differential voltage range

• Low input bias and offset current

• Low noise en = 15 nV/ √ Hz (typ)

• Output short-circuit protection

• High input impedance JFET input stage

• Low harmonic distortion: 0.01% (typical)

• Internal frequency compensation

• Latch up free operation

• High slew rate: 16 V/µs (typical)

Related products

• See TL071 for single version

• See TL072 for dual version

Description

The TL074, TL074A, and TL074B are high-speed JFET input single operational amplifiers. Each of these JFET input operational amplifiers incorporates well matched, high-voltage JFET and bipolar transistors in a monolithic integrated circuit.

The devices feature high slew rates, low input bias and offset currents, and low offset voltage temperature coefficient.

Inverting Input 2

Non-inverting Input 2


CCV -CCV

1

2

3

4

8

5

6

7

9

10

11

12

13

14

+

Output 3

Output 4


Inverting Input 4


Inverting Input 3

-

+

-

+

-

+

-

+

Output 1

Inverting Input 1

Output 2

DSO14

(plastic micropackage)

Pin connections(top view)

www.st.com

http://www.st.com

Contents TL074

2/18 DocID2297 Rev 5

Contents

1 Schematic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2 Absolute maximum ratings and operating conditions . . . . . . . . . . . . . 4

3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

4 Parameter measurement information . . . . . . . . . . . . . . . . . . . . . . . . . . 10

5 Typical applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

6 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

6.1 SO14 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

7 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

DocID2297 Rev 5 3/18

TL074 Schematic diagram

18

1 Schematic diagram

Figure 1. Circuit schematic

Output

No n- inver tinginput

I nvertinginput

V CC

V CC

2 0 0 ΩΩ1 0 0

Ω1 0 0

1.3k

30k

35k 35k Ω1 0 01.3k

8.2k

1/4 TL074

Absolute maximum ratings and operating conditions TL074


2 Absolute maximum ratings and operating conditions

Table 1. Absolute maximum ratings

Symbol ParameterValue

UnitTL074I, AI, BI TL074C, AC, BC

VCC Supply voltage (1) ±18

VVi Input voltage(2) ±15

Vid Differential input voltage(3) ±30

Ptot Power dissipation 680 mW

RthjaThermal resistance junction to ambient(4)(5) SO14 105

°C/W

RthjcThermal resistance junction to case(4)(5) SO14 31

Output short-circuit duration(6) Infinite

Toper Operating free-air temperature range -40 to +125 0 to +70°C

Tstg Storage temperature range -65 to +150

ESD

HBM: human body model(7) 1 kV

MM: machine model(8) 200 V

CDM: charged device model(9) 1.5 kV

1. All voltage values, except differential voltage, are with respect to the zero reference level (ground) of the supply voltages where the zero reference level is the midpoint between VCC

+ and VCC-.

2. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 15 volts, whichever is less.

3. Differential voltages are the non-inverting input terminal with respect to the inverting input terminal.

4. Short-circuits can cause excessive heating. Destructive dissipation can result from simultaneous short-circuits on all amplifiers.

5. Rth are typical values.

6. The output may be shorted to ground or to either supply. Temperature and/or supply voltages must be limited to ensure that the dissipation rating is not exceeded.

7. Human body model: 100pF discharged through a 1.5kΩ resistor between two pins of the device, done for all couples of pin combinations with other pins floating.

8. Machine model: a 200pF cap is charged to the specified voltage, then discharged directly between two pins of the device with no external series resistor (internal resistor < 5Ω), done for all couples of pin combinations with other pins floating.

9. Charged device model: all pins plus package are charged together to the specified voltage and then discharged directly to the ground.

Table 2. Operating conditions

Symbol Parameter TL074I, AI, BI TL074C, AC, BC Unit

VCC Supply voltage 6 to 36 V

Toper Operating free-air temperature range -40 to +125 0 to +70 °C


TL074 Electrical characteristics

18

3 Electrical characteristics

Table 3. VCC = ±15 V, Tamb = +25 °C (unless otherwise specified)

Symbol ParameterTL074I,AC,AI, BC,BI TL074C

UnitMin. Typ. Max. Min. Typ. Max.

Vio

Input offset voltage (Rs = 50Ω)

Tamb = +25°C TL074 TL074A TL074B Tmin ≤ Tamb ≤ TmaxTL074 TL074A TL074B

331

1063

1375

3 10

13mV

DVio Input offset voltage drift 10 10 µV/°C

Iio

Input offset current

Tamb = +25°C Tmin ≤ Tamb ≤ Tmax

5 1004

5 10010

pAnA

Iib

Input bias current -note (1)


20 20020

30 20020

pAnA

Avd

Large signal voltage gain RL= 2kΩ, Vo=±10V


5025

200 2515

200V/mV

SVRSupply voltage rejection ratio (RS = 50Ω)


8080

86 7070

86dB

ICC

Supply current, no load


1.4 2.52.5

1.4 2.52.5

mA

Vicm Input common mode voltage range±11 +15

-12±11 +15

-12V

CMRCommon mode rejection ratio (RS = 50Ω)


8080

86 7070

86 dB

Ios

Output short-circuit current


1010

40 6060

1010

40 6060

mA

±Vopp

Output voltage swing

Tamb = +25°C RL = 2kΩ RL = 10kΩ Tmin ≤ Tamb ≤ Tmax RL = 2kΩ RL = 10kΩ

10121012

1213.5

10121012

1213.5 V

SRSlew rate

Vin = 10V, RL = 2kΩ, CL = 100pF, unity gain8 13 8 13 V/µs

Electrical characteristics TL074


tr

Rise time

Vin = 20mV, RL = 2kΩ, CL = 100pF, unity gain

0.1 0.1 µs

Kov

Overshoot

Vin = 20mV, RL = 2kΩ, CL = 100pF, unity gain

10 10 %

GBPGain bandwidth product

Vin= 10mV, RL= 2kΩ, CL = 100pF, = 100kHz2 3 2 3 MHz

Ri Input resistance 1012 1012 Ω

THDTotal harmonic distortion f= 1kHz, RL = 2kΩ,CL = 100pF, Av = 20dB, Vo = 2Vpp)

0.01 0.01 %

enEquivalent input noise voltage

RS = 100Ω, f = 1kHz15 15

∅m Phase margin 45 45 degrees

Vo1/Vo2Channel separation

Av = 100120 120 dB

1. The input bias currents are junction leakage currents which approximately double for every 10° C increase in the junction temperature.

Table 3. VCC = ±15 V, Tamb = +25 °C (unless otherwise specified) (continued)

Symbol ParameterTL074I,AC,AI, BC,BI TL074C

UnitMin. Typ. Max. Min. Typ. Max.

nV

Hz------------



18

Figure 2. Maximum peak-to-peak output voltage versus frequency



Figure 5. Maximum peak-to-peak output voltage versus free air temperature

Figure 6. Maximum peak-to-peak output voltage versus load resistance

Figure 7. Maximum peak-to-peak output voltage versus supply voltage

30

25

20

15

10

5

0 2 4 6 8 10 12 14 16

MA

XIM

UM

PE

AK

-TO

-PE

AK

OU

TP

UT

VO

LTA

GE

(V

)

R L = 10 kΩTamb = +25˚C

SUPPLY VOLTAGE ( V )

Electrical characteristics TL074


Figure 8. Input bias current versus free air temperature

Figure 9. Large signal differential voltage amplification versus free air temperature

30

25

20

15

10

5

0 2 4 6 8 10 12 14 16

MA

XIM

UM

PE

AK

-TO

-PE

AK

OU

TP

UT

VO

LTA

GE

(V

)

R L = 10 kΩTamb = +25˚C

SUPPLY VOLTAGE ( V )

1000

400200100

2040

10

42

1

DIF

FER

ENTI

AL V

OLT

AGE

AMPL

IFIC

ATIO

N (V

/mV)

-75 -50 -25 0 25 50 75 100 125

TEMPERATURE (˚C)

RL

= 2k ΩVO = 10V

VCC = 15V

Figure 10. Large signal differential voltage amplification and phase shift versus frequency

Figure 11. Total power dissipation versus free air temperature

(V/m

V)

2502252001751501251007550250

TOTA

L PO

WER

DIS

SIPA

TIO

N (m

W)

-75 -50 -25 0 25 50 75 100 125

T E M P E R A T U R E ( ˚ C )

V C C = 15V

No signalNo load

Figure 12. Supply current per amplifier versus free air temperature

Figure 13. Common mode rejection ratio versus free air temperature

2.01.81.61.41.21.00.80.60.40.2

0

SUPP

LY C

URR

ENT

(mA)

-75 -50 -25 0 25 50 75 100 125


V C C = 15V

No signalNo load

89

88

87

86

85

84

-50 -25 0 25 50 75 100 125

CO

MM

ON

MO

DE

MO

DE

REJE

CTI

ON

RAT

IO (d

B)


83-75

R L = 1 0 kΩ= 1 5VV C C



18

Figure 14. Voltage follower large signal pulse response

Figure 15. Output voltage versus elapsed time

t r

2 8

2 4

2 0

1 6

1 2

8

4

0

-4

OU

TPU

T V

OLT

AG

E (m

V)

0 0.1 0.2 0.3 0.4 0.5 0.6 0.7

TIME ( μs )

10%

90%

O V E R S H O O T

R L = 2k ΩTamb = +25˚C

VC C

= 15V

Figure 16. Equivalent input noise voltage versus frequency

Figure 17. Total harmonic distortion versus frequency

70

60

50

40

30

20

10

0

EQU

IVAL

ENT

INPU

T NO

ISE

VOLT

AGE

(nV/

VHz)

10 40 100 400 1k 4k 10k 40k 100k

F R E Q U E N C Y ( H z )

A V = 10R S = 100 ΩT amb = +25˚C

V C C = 15V1

0.4

0.1

0.04

0.01

0.004

0.001TOTA

L H

ARM

ON

IC D

ISTO

RTI

ON

(%)

100 400 1k 4k 10k 40k 100k

F R E Q U E N C Y ( H z )

A V = 1

T amb = +25˚ C

V C C = 15V

= 6VV O (rms)

A V = 1

T amb = +25˚ C

= 6VV O (rms)

V C C = 15V

Parameter measurement information TL074

10/18 DocID2297 Rev 5

4 Parameter measurement information

Figure 18. Voltage follower Figure 19. Gain-of-10 inverting amplifier

-eI

T L074

R L

1/4

C L = 100pF

1k Ω

10k Ω

eo

DocID2297 Rev 5 11/18

TL074 Typical applications

18

5 Typical applications

Figure 20. Audio distribution amplifier

Figure 21. Positive feeback bandpass filter

-

T L 0 7 41 /4

-

-

-

T L 0 7 41 /4

T L0741 /4

T L 0 7 41 /4

1M Ω

1 μF

Output A

Output B

Output C

Input

100k Ω 100k Ω100k Ω

100k Ω1 O O μF

V C C+

f = 1 0 0 k H zO

-

-T L 0 7 41/42 2 0 p F

4 3 k ΩInput

1 .5 k Ω

4 3 k Ω

2 2 0 p F

43 k Ω

1 6 k Ω

T L 0 7 41/4

3 0 k Ω

Output A

-

T L 0 7 41/4

1 .5 k Ω

2 2 0 p F

4 3 k Ω

2 2 0 pF

43 k Ω

-

T L 0 7 41/4

4 3 k Ω

1 6 k Ω

3 0 k Ω

Output B

Ground

Typical applications TL074

12/18 DocID2297 Rev 5

Figure 22. Output A Figure 23. Output B

SECOND ORDER BANDPASS FILTER fo = 100 kHz; Q = 30; Gain = 16

CASCADED BANDPASS FILTER fo = 100 kHz; Q = 69; Gain = 16

DocID2297 Rev 5 13/18

TL074 Package information

18

6 Package information

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark.

Package information TL074

14/18 DocID2297 Rev 5

6.1 SO14 package information

Figure 24. SO14 package mechanical drawing

0016019_E

DocID2297 Rev 5 15/18

TL074 Package information

18

Table 4. SO14 package mechanical data

Dimensions

Ref.Millimeters Inches

Min. Typ. Max. Min. Typ. Max.

A 1.35 1.75 0.05 0.068

A1 0.10 0.25 0.004 0.009

A2 1.10 1.65 0.04 0.06

B 0.33 0.51 0.01 0.02

C 0.19 0.25 0.007 0.009

D 8.55 8.75 0.33 0.34

E 3.80 4.0 0.15 0.15

e 1.27 0.05

H 5.80 6.20 0.22 0.24

h 0.25 0.50 0.009 0.02

L 0.40 1.27 0.015 0.05

k 0 ° 8 ° 0 ° 8 °

e 0.40 0.015

ddd 0.10 0.004

Ordering information TL074

16/18 DocID2297 Rev 5

7 Ordering information

Table 5. Order codes

Order codeTemperature

rangePackage Packing Marking

TL074IDT

TL074AIDT

TL074BIDT-40°C, +125°C

SO14 Tape and reel

074I

074AI

074BI

TL074IYDT(1)

TL074AIYDT(1)

TL074BIYDT(1)

1. Qualified and characterized according to AEC Q100 and Q003 or equivalent, advanced screening according to AEC Q001 & Q 002 or equivalent.

074IY

074AIY

074BIY

TL074CDT

TL074ACDT

TL074BCDT

0°C, +70°C

074C

074AC

074BC

DocID2297 Rev 5 17/18

TL074 Revision history

18

8 Revision history

Table 6. Document revision history

Date Revision Changes

28-Mar-2001 1 Initial release.

30-Jul-2007 2

Added values for Rthja, Rthjc and ESD in Table 1: Absolute maximum ratings.

Added Table 2: Operating conditions.

Expanded Table 5: Order codes.

Format update.

07-Jul-2008 3Removed information concerning military temperature ranges (TL074Mx, TL074AMx, TL074BMx).

Added automotive grade order codes in Table 5: Order codes.

04-Jul-2012 4Removed commercial types TL074IYD, TL074AIYD, TL074BIYD.

Updated Table 5: Order codes.

22-Nov-2013 5

Added Related products on first page

Removed DIP package mechanical information

Table 5: Order codes:

– removed commercial types related to DIP package: TL074IN, TL074AIN, TL074BIN, TL074CN, TL074ACN, TL074BCN;

– removed commercial types related to tube packing: TL074ID, TL074AID, TL074BID, TL074CD, TL074ACD, TL074BCD;

– changed operating temperature range for TL074IDT, TL074AIDT, TL074BIDT, TL074IYDT, TL074AIYDT, TL074BIYDT from -40 °C, +105 °C to -40 °C, +125 °C;

– updated footnote for automotive parts.

TL074

18/18 DocID2297 Rev 5

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28BYJ-48 – 5V Stepper Motor

The 28BYJ-48 is a small stepper motor suitable for a large range of applications.

Rated voltage ： 5VDC Number of Phase 4 Speed Variation Ratio 1/64 Stride Angle 5.625° /64 Frequency 100Hz DC resistance 50Ω±7%(25) Idle In-traction Frequency > 600Hz Idle Out-traction Frequency > 1000Hz In-traction Torque >34.3mN.m(120Hz) Self-positioning Torque >34.3mN.m Friction torque 600-1200 gf.cm Pull in torque 300 gf.cm Insulated resistance >10MΩ(500V) Insulated electricity power 600VAC/1mA/1s Insulation grade A Rise in Temperature <40K(120Hz) Noise <35dB(120Hz,No load,10cm) Model 28BYJ-48 – 5V

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BC

546 / BC

547 / BC

548 / BC

549 / BC

550 — N

PN

Ep

itaxial Silico

n Tran

sistor

© 2002 Fairchild Semiconductor Corporation www.fairchildsemi.com

BC546 / BC547 / BC548 / BC549 / BC550 Rev. 1.1.1 1

November 2014

BC546 / BC547 / BC548 / BC549 / BC550NPN Epitaxial Silicon Transistor

Features• Switching and Amplifier

• High-Voltage: BC546, VCEO = 65 V

• Low-Noise: BC549, BC550

• Complement to BC556, BC557, BC558, BC559, and BC560

Ordering Information

Part Number Marking Package Packing Method

BC546ABU BC546A TO-92 3L Bulk

BC546ATA BC546A TO-92 3L Ammo

BC546BTA BC546B TO-92 3L Ammo

BC546BTF BC546B TO-92 3L Tape and Reel

BC546CTA BC546C TO-92 3L Ammo

BC547ATA BC547A TO-92 3L Ammo

BC547B BC547B TO-92 3L Bulk

BC547BBU BC547B TO-92 3L Bulk



BC547CBU BC547C TO-92 3L Bulk


BC547CTFR BC547C TO-92 3L Tape and Reel

BC548BU BC548 TO-92 3L Bulk






BC550CBU BC550C TO-92 3L Bulk


1. Collector 2. Base 3. Emitter

TO-921

BC

546 / BC

547 / BC

548 / BC

549 / BC

550 — N

PN

Ep

itaxial Silico

n Tran

sistor


BC546 / BC547 / BC548 / BC549 / BC550 Rev. 1.1.1 2

Absolute Maximum RatingsStresses exceeding the absolute maximum ratings may damage the device. The device may not function or be opera-ble above the recommended operating conditions and stressing the parts to these levels is not recommended. In addi-tion, extended exposure to stresses above the recommended operating conditions may affect device reliability. Theabsolute maximum ratings are stress ratings only. Values are at TA = 25°C unless otherwise noted.

Electrical CharacteristicsValues are at TA = 25°C unless otherwise noted.

hFE Classification

Symbol Parameter Value Unit

VCBO Collector-Base Voltage

BC546 80

VBC547 / BC550 50

BC548 / BC549 30

VCEO Collector-Emitter Voltage

BC546 65

VBC547 / BC550 45

BC548 / BC549 30

VEBO Emitter-Base VoltageBC546 / BC547 6

VBC548 / BC549 / BC550 5

IC Collector Current (DC) 100 mA

PC Collector Power Dissipation 500 mW

TJ Junction Temperature 150 °C

TSTG Storage Temperature Range -65 to +150 °C

Symbol Parameter Conditions Min. Typ. Max. Unit

ICBO Collector Cut-Off Current VCB = 30 V, IE = 0 15 nA

hFE DC Current Gain VCE = 5 V, IC = 2 mA 110 800

VCE(sat)Collector-Emitter Saturation Voltage

IC = 10 mA, IB = 0.5 mA 90 250mV

IC = 100 mA, IB = 5 mA 250 600

VBE(sat) Base-Emitter Saturation VoltageIC = 10 mA, IB = 0.5 mA 700

mVIC = 100 mA, IB = 5 mA 900

VBE(on) Base-Emitter On Voltage VCE = 5 V, IC = 2 mA 580 660 700

mVVCE = 5 V, IC = 10 mA 720

fT Current Gain Bandwidth ProductVCE = 5 V, IC = 10 mA, f = 100 MHz

300 MHz

Cob Output Capacitance VCB = 10 V, IE = 0, f = 1 MHz 3.5 6.0 pF

Cib Input Capacitance VEB = 0.5 V, IC = 0, f = 1 MHz 9 pF

NFNoise Figure

BC546 / BC547 / BC548 VCE = 5 V, IC = 200 μA,f = 1 kHz, RG = 2 kΩ

2.0 10.0

dBBC549 / BC550 1.2 4.0

BC549 VCE = 5 V, IC = 200 μA,RG = 2 kΩ, f = 30 to 15000 MHz

1.4 4.0

BC550 1.4 3.0

Classification A B C

hFE 110 ~ 220 200 ~ 450 420 ~ 800

BC

546 / BC

547 / BC

548 / BC

549 / BC

550 — N

PN

Ep

itaxial Silico

n Tran

sistor


BC546 / BC547 / BC548 / BC549 / BC550 Rev. 1.1.1 3

Typical Performance Characteristics

Figure 1. Static Characteristic Figure 2. Transfer Characteristic

Figure 3. DC Current Gain Figure 4. Base-Emitter Saturation Voltage andCollector-Emitter Saturation Voltage

Figure 5. Output Capacitance Figure 6. Current Gain Bandwidth Product

0 2 4 6 8 10 12 14 16 18 200

20

40

60

80

100

IB = 50μA

IB = 100μA

IB = 150μA

IB = 200μA

IB = 250μA

IB = 300μA

IB = 350μA

IB = 400μA

I C[m

A],

CO

LLE

CT

OR

CU

RR

EN

T

VCE[V], COLLECTOR-EMITTER VOLTAGE

0.0 0.2 0.4 0.6 0.8 1.0 1.20.1

1

10

100

VCE = 5V

I C[m

A],

CO

LLE

CT

OR

CU

RR

EN

T

VBE[V], BASE-EMITTER VOLTAGE

1 10 100 10001

10

100

1000

VCE = 5V

h FE,

DC

CU

RR

EN

T G

AIN

IC[mA], COLLECTOR CURRENT

1 10 100 100010

100

1000

10000

IC = 10 I

B

VCE

(sat)

VBE

(sat)

VB

E(s

at),

VC

E(s

at)[

mV

], S

AT

UR

AT

ION

VO

LT

AG

E


1 10 100 10000.1

1

10

100

f=1MHz

IE = 0

Cob

[pF

], C

AP

AC

ITA

NC

E

VCB[V], COLLECTOR-BASE VOLTAGE

0.1 1 10 1001

10

100

1000

VCE = 5V

f T, C

UR

RE

NT

GA

IN-B

AN

DW

IDT

H P

RO

DU

CT


BC

546 / BC

547 / BC

548 / BC

549 / BC

550 — N

PN

Ep

itaxial Silico

n Tran

sistor


BC546 / BC547 / BC548 / BC549 / BC550 Rev. 1.1.1 4

Physical Dimensions

Figure 7. 3-Lead, TO-92, JEDEC TO-92 Compliant Straight Lead Configuration, Bulk Type

D

BC

546 / BC

547 / BC

548 / BC

549 / BC

550 — N

PN

Ep

itaxial Silico

n Tran

sistor


BC546 / BC547 / BC548 / BC549 / BC550 Rev. 1.1.1 5

Physical Dimensions (Continued)

Figure 8. 3-Lead, TO-92, Molded, 0.2 In Line Spacing Lead Form, Ammo, Tape and Reel Type

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Obsolete Not In Production Datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor. The datasheet is for reference information only.

Rev. I72

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BC547BNMBU BC547CBU BC547BTA BC547BTF BC547ABU BC547BU BC547BBU BC547CTFR

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© Semiconductor Components Industries, LLC, 2013

December, 2013 − Rev. 171 Publication Order Number:

BD135/D

BD135G, BD137G, BD139G

Plastic Medium-PowerSilicon NPN Transistors

This series of plastic, medium−power silicon NPN transistors aredesigned for use as audio amplifiers and drivers utilizingcomplementary or quasi complementary circuits.

Features

• High DC Current Gain

• BD 135, 137, 139 are complementary with BD 136, 138, 140

• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHSCompliant*

MAXIMUM RATINGS

Rating Symbol Value Unit

Collector−Emitter VoltageBD135GBD137GBD139G

VCEO456080

Vdc

Collector−Base VoltageBD135GBD137GBD139G

VCBO4560100

Vdc

Emitter−Base Voltage VEBO 5.0 Vdc

Collector Current IC 1.5 Adc

Base Current IB 0.5 Adc

Total Device Dissipation@ TA = 25°CDerate above 25°C

PD1.2510

WattsmW/°C

Total Device Dissipation@ TC = 25°CDerate above 25°C

PD12.5100

WattsmW/°C

Operating and Storage JunctionTemperature Range

TJ, Tstg –55 to +150 °C

Stresses exceeding those listed in the Maximum Ratings table may damage thedevice. If any of these limits are exceeded, device functionality should not beassumed, damage may occur and reliability may be affected.

THERMAL CHARACTERISTICS

Characteristic Symbol Max Unit

Thermal Resistance, Junction−to−Case RJC 10 °C/W

Thermal Resistance, Junction−to−Ambient RJA 100 °C/W

*For additional information on our Pb−Free strategy and soldering details, pleasedownload the ON Semiconductor Soldering and Mounting TechniquesReference Manual, SOLDERRM/D.

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Device Package Shipping

1.5 A POWER TRANSISTORSNPN SILICON

45, 60, 80 V, 12.5 W

Y = YearWW = Work WeekBD1xx = Device Code

xx = 35, 37, 39G = Pb−Free Package

BD139G TO−225(Pb−Free)

500 Units / Box

MARKING DIAGRAM

BD135TG TO−225(Pb−Free)

50 Units / Rail


500 Units / Box


500 Units / Box

ORDERING INFORMATION

3BASE

1EMITTER

COLLECTOR2, 4

TO−225CASE 77−09

STYLE 1

1 2 3

YWWBD1xxG


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ELECTRICAL CHARACTERISTICS (TC = 25C unless otherwise noted)

Characteristic Symbol Min Max UnIt

Collector−Emitter Sustaining Voltage*(IC = 0.03 Adc, IB = 0)

BD135GBD137GBD139G

BVCEO*

456080

−−−

Vdc

Collector Cutoff Current(VCB = 30 Vdc, IE = 0)(VCB = 30 Vdc, IE = 0, TC = 125C)

ICBO−−

0.110

Adc

Emitter Cutoff Current(VBE = 5.0 Vdc, IC = 0)

IEBO − 10 Adc

DC Current Gain(IC = 0.005 A, VCE = 2 V)(IC = 0.15 A, VCE = 2 V)(IC = 0.5 A VCE = 2 V)

hFE*254025

−250−

−

Collector−Emitter Saturation Voltage*(IC = 0.5 Adc, IB = 0.05 Adc)

VCE(sat)*− 0.5

Vdc

Base−Emitter On Voltage*(IC = 0.5 Adc, VCE = 2.0 Vdc)

VBE(on)*− 1

Vdc

Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Productperformance may not be indicated by the Electrical Characteristics if operated under different conditions.

*Pulse Test: Pulse Width ≤ 300 s, Duty Cycle ≤ 2.0%.

TYPICAL CHARACTERISTICS

Figure 1. DC Current Gain Figure 2. Collector−Emitter Saturation Voltage

IC, COLLECTOR CURRENT (A) IC, COLLECTOR CURRENT (A)

1010.10.010.00110

100

1000

1010.10.010.0010

0.1

0.2

0.3

h FE, D

C C

UR

RE

NT

GA

IN

VC

E(s

at),

CO

LLE

CT

OR

−E

MIT

TE

RS

AT

UR

AT

ION

VO

LTA

GE

(V

)

VCE = 2 V

150°C

−55°C

25°C

IC/IB = 10 150°C

−55°C25°C


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Figure 3. Base−Emitter Saturation Voltage Figure 4. Base−Emitter On Voltage

IC, COLLECTOR CURRENT (A) IC, COLLECTOR CURRENT (A)

1010.10.010.0010

0.2

0.4

0.6

0.8

1.0

1.2

1010.10.010.0010

0.2

0.4

0.6

0.8

1.0

1.2

Figure 5. Capacitance Figure 6. Active−Region Safe Operating Area

VR, REVERSE VOLTAGE (V) VCE, COLLECTOR−EMITTER VOLTAGE (V)

1001010.11

10

100

1000

801010.01

0.1

1

10

VB

E(s

at),

BA

SE

−E

MIT

TE

RS

AT

UR

AT

ION

VO

LTA

GE

(V

)

VB

E(o

n), B

AS

E−

EM

ITT

ER

ON

VO

LTA

GE

(V

)

C, C

AP

AC

ITA

NC

E (

pF)

I C, C

OLL

EC

TO

R C

UR

RE

NT

(A

)

IC/IB = 10

150°C

−55°C

25°C

VCE = 2 V

150°C

−55°C

25°C

f = 1 MHzCib

Cob

BD135BD137BD139

TJ = 125°C dc

5 ms 0.5 ms0.1 ms

Figure 7. Power Derating

TA, AMBIENT TEMPERATURE (°C)

1601002000

0.50

1.00

1.50

PD

, PO

WE

R D

ISS

IPA

TIO

N (

W)

0.25

0.75

1.25

40 60 80 120 140


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PACKAGE DIMENSIONS

TO−225CASE 77−09ISSUE AC

DIM MIN MAXMILLIMETERS

D 10.60 11.10E 7.40 7.80

A 2.40 3.00

b 0.60 0.90

P 2.90 3.30L1 1.27 2.54

c 0.39 0.63

L 14.50 16.63

b2 0.51 0.88

Q 3.80 4.20

A1 1.00 1.50

e 2.04 2.54

E

1 2 3

NOTES:1. DIMENSIONING AND TOLERANCING PER

ASME Y14.5M, 1994.2. CONTROLLING DIMENSION: MILLIMETERS.3. NUMBER AND SHAPE OF LUGS OPTIONAL.

2X

2X

Q

D

L1

P

b2

be

c

L

A1

A

FRONT VIEW BACK VIEW

FRONT VIEW SIDE VIEW

1 2 33 2 1

4

PIN 4BACKSIDE TAB

STYLE 1:PIN 1. EMITTER

2., 4. COLLECTOR3. BASE

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLCreserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for anyparticular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including withoutlimitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applicationsand actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLCdoes not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended forsurgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation wherepersonal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC andits officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly,any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufactureof the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.




BD135/D

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CD4555CD4556

CMOS Dual Binary to 1 of 4Decoder/Demultiplexers

Pinouts CD4556BMSTOP VIEW

CD4555BMSTOP VIEW

Functional Diagrams

CD4555BMS

CD4556BMS

14

15

16

9

13

12

11

10

1

2

3

4

5

7

6

8

E

A

B

Q0

Q1

Q2

VSS

Q3

VDD

A

B

Q0

Q1

Q2

Q3

E

1/2 OF DUAL

1/2 OF DUAL

14

15

16

9

13

12

11

10

1

2

3

4

5

7

6

8

E

A

B

Q0

Q1

Q2

VSS

Q3

VDD

A

B

Q0

Q1

Q2

Q3

E

1/2 OF DUAL

1/2 OF DUAL

231

141315

ABE

4567

1211109

Q0Q1Q2Q3

ABE

Q0Q1Q2Q3

16

8VSS

VDD

231

141315

ABE

4567

1211109

Q0Q1Q2Q3

ABE

Q0Q1Q2Q3

16

8VSS

VDD

Features

• High Voltage Type (20V Rating)

• CD4555BMS: Outputs High on Select

• CD4556BMS: Outputs Low on Select

• Expandable with Multiple Packages

• 100% Tested for Quiescent Current at 20V

• Standardized, Symmetrical Output Characteristics

• Maximum Input Current of 1µA at 18V Over Full Pack-age Temperature Range; 100nA at 18V and +25oC

• Noise Margin (Over Full Package/Temperature Range)- 1V at VDD = 5V- 2V at VDD = 10V- 2.5V at VDD = 15V

• 5V, 10V and 15V Parametric Ratings

• Meets All Requirements of JEDEC Tentative StandardNo. 13B, “Standard Specifications for Description of‘B’ Series CMOS Devices”

Applications

• Decoding

• Code Conversion

• Demultiplexing (Using Enable Input as a Data Input

• Memory Chip-Enable Selection

• Function Selection

Description

CD4555BMS and CD4556BMS are dual one-of-four decod-ers/demultiplexers. Each decoder has two select inputs (Aand B), an Enable input (E), and four mutually exclusive out-puts. On the CD4555BMS the outputs are high on select; onthe CD4556BMS the outputs are low on select.

When the Enable input is high, the outputs of theCD4555BMS remain low and the outputs of theCD4556BMS remain high regardless of the state of theselect inputs A and B. The CD4555BMS and CD4556BMSare similar to types MC14555 and MC14556, respectively.

The CD4555BMS and CD4556BMS are supplied in these16-lead outline packages:

Braze Seal DIP *H46 †H4TFrit Seal DIP H1ECeramic Flatpack H6W*CD4555B Only †CD4556B Only

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7-1250

Specifications CD4555BMS, CD4556BMS

Absolute Maximum Ratings Reliability InformationDC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . . -0.5V to +20V

(Voltage Referenced to VSS Terminals)Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VDD +0.5VDC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mAOperating Temperature Range. . . . . . . . . . . . . . . . -55oC to +125oC

Package Types D, F, K, HStorage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oCLead Temperature (During Soldering) . . . . . . . . . . . . . . . . . +265oC

At Distance 1/16 ± 1/32 Inch (1.59mm ± 0.79mm) from case for10s Maximum

Thermal Resistance . . . . . . . . . . . . . . . . θja θjcCeramic DIP and FRIT Package . . . . . 80oC/W 20oC/WFlatpack Package . . . . . . . . . . . . . . . . 70oC/W 20oC/W

Maximum Package Power Dissipation (PD) at +125oCFor TA = -55oC to +100oC (Package Type D, F, K) . . . . . . 500mWFor TA = +100oC to +125oC (Package Type D, F, K). . . . . .Derate

Linearity at 12mW/oC to 200mWDevice Dissipation per Output Transistor . . . . . . . . . . . . . . . 100mW

For TA = Full Package Temperature Range (All Package Types)Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC

TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS

PARAMETER SYMBOL CONDITIONS (NOTE 1)GROUP A

SUBGROUPS TEMPERATURE

LIMITS

UNITSMIN MAX

Supply Current IDD VDD = 20V, VIN = VDD or GND 1 +25oC - 10 µA

2 +125oC - 1000 µA

VDD = 18V, VIN = VDD or GND 3 -55oC - 10 µA

Input Leakage Current IIL VIN = VDD or GND VDD = 20 1 +25oC -100 - nA

2 +125oC -1000 - nA

VDD = 18V 3 -55oC -100 - nA

Input Leakage Current IIH VIN = VDD or GND VDD = 20 1 +25oC - 100 nA

2 +125oC - 1000 nA

VDD = 18V 3 -55oC - 100 nA

Output Voltage VOL15 VDD = 15V, No Load 1, 2, 3 +25oC, +125oC, -55oC - 50 mV

Output Voltage VOH15 VDD = 15V, No Load (Note 3) 1, 2, 3 +25oC, +125oC, -55oC 14.95 - V

Output Current (Sink) IOL5 VDD = 5V, VOUT = 0.4V 1 +25oC 0.53 - mA



Output Current (Source) IOH5A VDD = 5V, VOUT = 4.6V 1 +25oC - -0.53 mA

Output Current (Source) IOH5B VDD = 5V, VOUT = 2.5V 1 +25oC - -1.8 mA

Output Current (Source) IOH10 VDD = 10V, VOUT = 9.5V 1 +25oC - -1.4 mA

Output Current (Source) IOH15 VDD = 15V, VOUT = 13.5V 1 +25oC - -3.5 mA

N Threshold Voltage VNTH VDD = 10V, ISS = -10µA 1 +25oC -2.8 -0.7 V

P Threshold Voltage VPTH VSS = 0V, IDD = 10µA 1 +25oC 0.7 2.8 V

Functional F VDD = 2.8V, VIN = VDD or GND 7 +25oC VOH >VDD/2

VOL <VDD/2

V

VDD = 20V, VIN = VDD or GND 7 +25oC

VDD = 18V, VIN = VDD or GND 8A +125oC

VDD = 3V, VIN = VDD or GND 8B -55oC

Input Voltage Low(Note 2)

VIL VDD = 5V, VOH > 4.5V, VOL < 0.5V 1, 2, 3 +25oC, +125oC, -55oC - 1.5 V

Input Voltage High(Note 2)

VIH VDD = 5V, VOH > 4.5V, VOL < 0.5V 1, 2, 3 +25oC, +125oC, -55oC 3.5 - V

Input Voltage Low(Note 2)

VIL VDD = 15V, VOH > 13.5V,VOL < 1.5V

1, 2, 3 +25oC, +125oC, -55oC - 4 V

Input Voltage High(Note 2)

VIH VDD = 15V, VOH > 13.5V,VOL < 1.5V

1, 2, 3 +25oC, +125oC, -55oC 11 - V

NOTES: 1. All voltages referenced to device GND, 100% testing beingimplemented.

2. Go/No Go test with limits applied to inputs.

3. For accuracy, voltage is measured differentially to VDD. Limitis 0.050V max.


7-1251


TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS

PARAMETER SYMBOL CONDITIONS (NOTE 1, 2)GROUP A

SUBGROUPS TEMPERATURE

LIMITS

UNITSMIN MAX

Propagation DelayA or B Input to any Output

TPHL1TPLH1

VDD = 5V, VIN = VDD or GND 9 +25oC - 440 ns

10, 11 +125oC, -55oC - 594 ns

Propagation DelayE to any Output

TPHL2TPLH2


10, 11 +125oC, -55oC - 540 ns

Transition Time TTHLTTLH


10, 11 +125oC, -55oC - 270 ns

NOTES:

1. CL = 50pF, RL = 200K, Input TR, TF < 20ns.

2. -55oC and +125oC limits guaranteed, 100% testing being implemented.

TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS

PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE

LIMITS

UNITSMIN MAX

Supply Current IDD VDD = 5V, VIN = VDD or GND 1, 2 -55oC, +25oC - 5 µA

+125oC - 150 µA

VDD = 10V, VIN = VDD or GND 1, 2 -55oC, +25oC - 10 µA

+125oC - 300 µA

VDD = 15V, VIN = VDD or GND 1, 2 -55oC, +25oC - 10 µA

+125oC - 600 µA

Output Voltage VOL VDD = 5V, No Load 1, 2 +25oC, +125oC,-55oC

- 50 mV

Output Voltage VOL VDD = 10V, No Load 1, 2 +25oC, +125oC,-55oC

- 50 mV

Output Voltage VOH VDD = 5V, No Load 1, 2 +25oC, +125oC,-55oC

4.95 - V

Output Voltage VOH VDD = 10V, No Load 1, 2 +25oC, +125oC,-55oC

9.95 - V

Output Current (Sink) IOL5 VDD = 5V, VOUT = 0.4V 1, 2 +125oC 0.36 - mA

-55oC 0.64 - mA


-55oC 1.6 - mA


-55oC 4.2 - mA

Output Current (Source) IOH5A VDD = 5V, VOUT = 4.6V 1, 2 +125oC - -0.36 mA

-55oC - -0.64 mA

Output Current (Source) IOH5B VDD = 5V, VOUT = 2.5V 1, 2 +125oC - -1.15 mA

-55oC - -2.0 mA

Output Current (Source) IOH10 VDD = 10V, VOUT = 9.5V 1, 2 +125oC - -0.9 mA

-55oC - -1.6 mA

Output Current (Source) IOH15 VDD =15V, VOUT = 13.5V 1, 2 +125oC - -2.4 mA

-55oC - -4.2 mA

Input Voltage Low VIL VDD = 10V, VOH > 9V, VOL < 1V 1, 2 +25oC, +125oC,-55oC

- 3 V

Input Voltage High VIH VDD = 10V, VOH > 9V, VOL < 1V 1, 2 +25oC, +125oC,-55oC

7 - V


7-1252


Propagation DelayA or B Input to any Output

TPHL1TPLH1

VDD = 10V 1, 2, 3 +25oC - 190 ns

VDD = 15V 1, 2, 3 +25oC - 140 ns

Propagation DelayE to any Output

TPHL2TPLH2

VDD = 10V 1, 2, 3 +25oC - 170 ns

VDD = 15V 1, 2, 3 +25oC - 130 ns

Transition Time TTHLTTLH

VDD = 10V 1, 2, 3 +25oC - 100 ns

VDD = 15V 1, 2, 3 +25oC - 80 ns

Input Capacitance CIN Any Input 1, 2 +25oC - 7.5 pF

NOTES:

1. All voltages referenced to device GND.

2. The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterizedon initial design release and upon design changes which would affect these characteristics.


TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS


LIMITS

UNITSMIN MAX

Supply Current IDD VDD = 20V, VIN = VDD or GND 1, 4 +25oC - 25 µA

N Threshold Voltage VNTH VDD = 10V, ISS = -10µA 1, 4 +25oC -2.8 -0.2 V

N Threshold VoltageDelta

∆VTN VDD = 10V, ISS = -10µA 1, 4 +25oC - ±1 V

P Threshold Voltage VTP VSS = 0V, IDD = 10µA 1, 4 +25oC 0.2 2.8 V

P Threshold VoltageDelta

∆VTP VSS = 0V, IDD = 10µA 1, 4 +25oC - ±1 V

Functional F VDD = 18V, VIN = VDD or GND 1 +25oC VOH >VDD/2

VOL <VDD/2

V

VDD = 3V, VIN = VDD or GND

Propagation Delay Time TPHLTPLH

VDD = 5V 1, 2, 3, 4 +25oC - 1.35 x+25oCLimit

ns

NOTES: 1. All voltages referenced to device GND.


3. See Table 2 for +25oC limit.

4. Read and Record

TABLE 5. BURN-IN AND LIFE TEST DELTA PARAMETERS +25oC

PARAMETER SYMBOL DELTA LIMIT

Supply Current - MSI-2 IDD ± 1.0µA

Output Current (Sink) IOL5 ± 20% x Pre-Test Reading

Output Current (Source) IOH5A ± 20% x Pre-Test Reading

TABLE 6. APPLICABLE SUBGROUPS

CONFORMANCE GROUPMIL-STD-883

METHOD GROUP A SUBGROUPS READ AND RECORD

Initial Test (Pre Burn-In) 100% 5004 1, 7, 9 IDD, IOL5, IOH5A

Interim Test 1 (Post Burn-In) 100% 5004 1, 7, 9 IDD, IOL5, IOH5A


PDA (Note 1) 100% 5004 1, 7, 9, Deltas


PDA (Note 1) 100% 5004 1, 7, 9, Deltas

TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)


LIMITS

UNITSMIN MAX


7-1253


Final Test 100% 5004 2, 3, 8A, 8B, 10, 11

Group A Sample 5005 1, 2, 3, 7, 8A, 8B, 9, 10, 11

Group B Subgroup B-5 Sample 5005 1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas Subgroups 1, 2, 3, 9, 10, 11

Subgroup B-6 Sample 5005 1, 7, 9

Group D Sample 5005 1, 2, 3, 8A, 8B, 9 Subgroups 1, 2 3

NOTE: 1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and 2.

TABLE 7. TOTAL DOSE IRRADIATION

CONFORMANCE GROUPSMIL-STD-883

METHOD

TEST READ AND RECORD

PRE-IRRAD POST-IRRAD PRE-IRRAD POST-IRRAD

Group E Subgroup 2 5005 1, 7, 9 Table 4 1, 9 Table 4

TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS

FUNCTION OPEN GROUND VDD 9V ± -0.5V

OSCILLATOR

50kHz 25kHz

PART NUMBER CD4555BMS & CD4556BMS

Static Burn-In 1Note 1

4 - 7, 9 - 12 1 - 3, 8, 13 - 15 16

Static Burn-In 2Note 1

4 - 7, 9 - 12 8 1 - 3, 13 - 16

Dynamic Burn-In Note 1

- 1, 8, 15 16 4 - 7, 9 - 12 2, 14 3, 13

IrradiationNote 2

NOTE:

1. Each pin except VDD and GND will have a series resistor of 10K ± 5%, VDD = 18V ± 0.5V

2. Each pin except VDD and GND will have a series resistor of 47K ± 5%; Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures,VDD = 10V ± 0.5V

Logic Diagrams

FIGURE 1. CD455RBMS LOGIC DIAGRAM (1 OF 2 IDENTICALCIRCUITS)

FIGURE 2. CD4556BMS LOGIC DIAGRAM (1 OF 2 IDENTICALCIRCUITS)

TABLE 6. APPLICABLE SUBGROUPS

CONFORMANCE GROUPMIL-STD-883

METHOD GROUP A SUBGROUPS READ AND RECORD

VDD

VSS

*ALL INPUTS PROTECTED BY CMOSPROTECTION NETWORK

4(12)

5(11)

6(10)

7(9)

Q0

Q1

Q2

Q3

2(14)

3(13)

1(15)

A

B

E

*

*

*VDD

VSS

*ALL INPUTS PROTECTED BY CMOSPROTECTION NETWORK

4(12)

5(11)

6(10)

7(9)

Q0

Q1

Q2

Q3

2(14)

3(13)

1(15)

A

B

E

*

*

*


7-1254

CD4555BMS, CD4556BMS

TRUTH TABLE

INPUTS ENABLE SELECT OUTPUTS CD4555BMS OUTPUTS CD4556BMS

E B A Q3 Q2 Q1 Q0 Q3 Q2 Q1 Q0

0 0 0 0 0 0 1 1 1 1 0

0 0 1 0 0 1 0 1 1 0 1

0 1 0 0 1 0 0 1 0 1 1

0 1 1 1 0 0 0 0 1 1 1

1 X X 0 0 0 0 1 1 1 1

X = Don’t Care Logic 1 ≡ HighLogic 0 ≡ Low

Typical Performance Characteristics

FIGURE 3. TYPICAL OUTPUT LOW (SINK) CURRENTCHARACTERISTICS

FIGURE 4. MINIMUM OUTPUT LOW (SINK) CURRENTCHARACTERISTICS

FIGURE 5. TYPICAL OUTPUT HIGH (SOURCE) CURRENTCHARACTERISTICS

FIGURE 6. MINIMUM OUTPUT HIGH (SOURCE) CURRENTCHARACTERISTICS

10V

5V

AMBIENT TEMPERATURE (TA) = +25oC

GATE-TO-SOURCE VOLTAGE (VGS) = 15V

0 5 10 15

15

10

5

20

25

30

DRAIN-TO-SOURCE VOLTAGE (VDS) (V)

OU

TPU

T LO

W (S

INK

) CU

RR

EN

T (IO

L) (m

A)

10V

5V


GATE-TO-SOURCE VOLTAGE (VGS) = 15V

0 5 10 15

7.5

5.0

2.5

10.0

12.5

15.0


OU

TPU

T LO

W (S

INK

) CU

RR

EN

T (IO

L) (m

A)

-10V

-15V


GATE-TO-SOURCE VOLTAGE (VGS) = -5V

0

-5

-10

-15


-20

-25

-30

0-5-10-15

OU

TPU

T H

IGH

(SO

UR

CE

) CU

RR

EN

T (IO

H) (

mA

)

-10V

-15V

AMBIENT TEMPERATURE (TA) = +25oC0

-5

-10

-15

DRAIN-TO-SOURCE VOLTAGE (VDS) (V)0-5-10-15

OU

TPU

T H

IGH

(SO

UR

CE

) CU

RR

EN

T (IO

H) (

mA

)

GATE-TO-SOURCE VOLTAGE (VGS) = -5V


7-1255


FIGURE 7. TYPICAL PROPAGATION DELAY TIME vs LOADCAPACITANCE (A OR B INPUT TO ANY OUTPUT)

FIGURE 8. TYPICAL PROPAGATION DELAY TIME vs LOADCAPACITANCE (E INPUTS TO ANY OUTPUT)

FIGURE 9. TYPICAL PROPAGATION DELAY TIME vs SUPPLYVOLTAGE

FIGURE 10. TYPICAL TRANSITION TIME vs LOAD CPACI-TANCE

FIGURE 11. TYPICAL DYNAMIC POWER DISSIPATION vs FREQUENCY

Typical Performance Characteristics (Continued)


100

50

0 20 40 60 80 100

PR

OPA

GA

TIO

N D

EL

AY

TIM

E (

tPL

H, t

PH

L)

(ns)

LOAD CAPACITANCE (CL) (pF)

SUPPLY VOLTAGE (VDD) = 5V

10V

15V

150

200

250


100

50

0 20 40 60 80 100

PR

OPA

GA

TIO

N D

EL

AY

TIM

E (

tPL

H, t

PH

L)

(ns)

LOAD CAPACITANCE (CL) (pF)


10V

15V

150

200

250


150

50

0 5 10 15 20

PR

OPA

GA

TIO

N D

EL

AY

TIM

E (

tPL

H, t

PH

L)

(ns)


ANY INPUT

E INPUT100

200

250

300


LOAD CAPACITANCE (CL) (pF)0 40 60 80 10020

0

50

100

150

200


10V

15V

TR

AN

SIT

ION

TIM

E (

tTH

L, t

TL

H)

(ns)

8642

INPUT FREQUENCY (f) (kHz)

10-1

10

1DY

NA

MIC

PO

WE

R D

ISS

IPA

TIO

N (

PD

) (µ

W)

102

103

104

105

86421

864210

8642102

8642103 104

SUPPLY VOLTAGE (VDD) = 15VLOAD CAPACITANCE (CL) = 50pF


VDD = 5VCL = 50pF

VDD = 10VCL = 15pF

VDD = 10VCL = 50pF

106


7-1256


FIGURE 12. CD4555BMS B INPUT TO Q3 OUTPUT DYNAMICSIGNAL WAVEFORMS

FIGURE 13. CD4556BMS B INPUT TO Q3 OUTPUT DYNAMICSIGNAL WAVEFORMS

FIGURE 14. CD4555BMS E INPUT TO Q3 OUTPUT DYNAMICSIGNAL WAVEFORMS

FIGURE 15. CD4556BMS E INPUT TO Q3 OUTPUT DYNAMICSIGNAL WAVEFORMS

20ns 20ns

90%50%

10%

VDD

INPUT B

VSS

tPLH tPHL

VDD

OUTPUT Q3

VSS

90%50%

10%

tTLH tTHL

fI = 1MHz, 50% DUTY CYCLE

20ns 20ns

90%50%

10%

VDD

INPUT B

VSS

tPHL tPLH

VDD

OUTPUT Q3

VSS

90%50%

10%

tTLHtTHL


20ns 20ns

90%

50%

10%

VDD

INPUT E

VSStPHL

tPLH

VDD

OUTPUT Q3

VSS

tTHL tTLH


90%

50%

10%

20ns 20ns

90%

50%

10%

VDD

INPUT E

VSS

tPLH tPHL

VDD

OUTPUT Q3

VSS

90%

50%

10%

tTLHtTHL


Applications

FIGURE 16. 1 OF 4 LINE DATA DEMULTIPLEXER USINGCD4555BMS

A

B

EDATA

A

B

Q0

Q1

Q2

Q3

Q0

Q1

Q2

Q3

INP

UT

S

SE

LE

CT

OUTPUTS

1/6 CD4069BMS

1/6 CD4555BMSTRUTH TABLE

SELECT INPUTS OUTPUTS

B A Q0 Q1 Q2 Q3

0 0 DATA 0 0 0

0 1 0 DATA 0 0

1 0 0 0 DATA 0

1 1 0 0 0 DATA


7-1257


Applications (Continued)

FIGURE 17. 1 OF 8 DECODER USING CD4555BMS

A

B

EC

Q0

Q1

Q2

Q3

Q4

Q5

Q6

Q7

OUTPUTS

1/6 CD4069BMS

A

B

E

A

B

Q0

Q1

Q2

Q3

Q0

Q1

Q2

Q3

DE

CO

DE

R IN

PU

TS

CD4555BMS

OR EQUIV

TRUTH TABLE

INPUTS Q OUTPUTS

C B A 0 1 2 3 4 5 6 7

0 0 0 1 0 0 0 0 0 0 0

0 0 1 0 1 0 0 0 0 0 0

0 1 0 0 0 1 0 0 0 0 0

0 1 1 0 0 0 1 0 0 0 0

1 0 0 0 0 0 0 1 0 0 0

1 0 1 0 0 0 0 0 1 0 0

1 1 0 0 0 0 0 0 0 1 0

1 1 1 0 0 0 0 0 0 0 1

FIGURE 18. 1 OF 16 DECODER USING CD4555BMS AND CD4556BMS

A

B

E

Q0

Q1

Q2

Q3

Q4

Q5

Q6

Q7

OUTPUTS

A

B

E

A

B

Q0

Q1

Q2

Q3

Q0

Q1

Q2

Q3

DE

CO

DE

R IN

PU

TS

CD4555BMS

A

B

E

Q0

Q1

Q2

Q3

Q12

Q13

Q14

Q15

A

B

E

Q0

Q1

Q2

Q3

Q8

Q9

Q10

Q11

A

B

E

Q0

Q1

Q2

Q3

C

D

E

1/2 CD4556BMS


7-1258


TRUTH TABLE

INPUTS Q OUTPUTS

E D C B A 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0

0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0

0 0 0 1 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0

0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0

0 0 1 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0

0 0 1 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0

0 0 1 1 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0

0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0

0 1 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0

0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0

0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0

0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0

0 1 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0

0 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0

0 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1

1 X X X 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

X = Don’t Care

Chip Dimensions and Pad Layouts

CD4555BMSH CD4556BMSH

Dimensions in parenthesis are in millimeters and arederived from the basic inch dimensions as indicated.Grid graduations are in mils (10-3 inch).

METALLIZATION: Thickness: 11kÅ − 14kÅ, AL.PASSIVATION: 10.4kÅ - 15.6kÅ, Silane

BOND PADS: 0.004 inches X 0.004 inches MIN

DIE THICKNESS: 0.0198 inches - 0.0218 inches


© Semiconductor Components Industries, LLC, 2012

May, 2012 − Rev. 61 Publication Order Number:

TIP140/D

TIP140, TIP141, TIP142,(NPN); TIP145, TIP146,TIP147, (PNP)

Darlington ComplementarySilicon Power Transistors

Designed for general−purpose amplifier and low frequencyswitching applications.

Features• High DC Current Gain −

Min hFE = 1000 @ IC = 5.0 A, VCE = 4 V

• Collector−Emitter Sustaining Voltage − @ 30 mA VCEO(sus) = 60 Vdc (Min) − TIP140, TIP145

= 80 Vdc (Min) − TIP141, TIP146 = 100 Vdc (Min) − TIP142, TIP147

• Monolithic Construction with Built−In Base−Emitter Shunt Resistor

• These are Pb−Free Devices*

MAXIMUM RATINGS

Rating SymbolTIP140TIP145

TIP141TIP146

TIP142TIP147 Unit

Collector − Emitter Voltage VCEO 60 80 100 Vdc

Collector − Base Voltage VCB 60 80 100 Vdc

Emitter − Base Voltage VEB 5.0 Vdc

Collector Current− Continuous− Peak (Note 1)

IC1015

Adc

Base Current − Continuous IB 0.5 Adc

Total Power Dissipation@ TC = 25C

PD 125 W

Operating and Storage Junction Temperature Range

TJ, Tstg −65 to +150 C

THERMAL CHARACTERISTICS

Characteristic Symbol Max Unit

Thermal Resistance,Junction−to−Case

RJC 1.0 °C/W

Thermal Resistance,Junction−to−Ambient

RJA 35.7 °C/W

Stresses exceeding Maximum Ratings may damage the device. MaximumRatings are stress ratings only. Functional operation above the RecommendedOperating Conditions is not implied. Extended exposure to stresses above theRecommended Operating Conditions may affect device reliability.1. 5 ms, 10% Duty Cycle.

*For additional information on our Pb−Free strategy and soldering details, pleasedownload the ON Semiconductor Soldering and Mounting TechniquesReference Manual, SOLDERRM/D.

10 AMPEREDARLINGTON

COMPLEMENTARY SILICONPOWER TRANSISTORS

60−100 VOLTS, 125 WATTS

See detailed ordering and shipping information in the packagedimensions section on page 2 of this data sheet.


http://onsemi.com

SOT−93 (TO−218)CASE 340D

STYLE 1

TO−247CASE 340L

STYLE 3

NOTE: Effective June 2012 this device willbe available only in the TO−247package. Reference FPCN# 16827.

TIP140, TIP141, TIP142, (NPN); TIP145, TIP146, TIP147, (PNP)

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MARKING DIAGRAMS

AYWWGTIP14x

TIP14xAYWWG

1 BASE

2 COLLECTOR

3 EMITTER

TIP14x = Device CodeA = Assembly LocationY = YearWW = Work WeekG = Pb−Free Package

1 BASE

2 COLLECTOR

3 EMITTER

TO−247

TO−218

DARLINGTON SCHEMATICS

BASE

EMITTER

COLLECTOR

≈ 8.0 k ≈ 40

BASE

EMITTER

COLLECTOR

≈ 8.0 k ≈ 40

NPNTIP140TIP141TIP142

PNPTIP145TIP146TIP147


Device Package Shipping

TIP140G SOT−93 (TO−218)(Pb−Free)

30 Units / Rail


30 Units / Rail


30 Units / Rail


30 Units / Rail


30 Units / Rail


30 Units / Rail

TIP140G TO−247(Pb−Free)

30 Units / Rail


30 Units / Rail


30 Units / Rail


30 Units / Rail


30 Units / Rail


30 Units / Rail


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ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

ELECTRICAL CHARACTERISTICS (TC = 25C unless otherwise noted)

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Characteristic ÎÎÎÎÎÎÎÎÎÎ

Symbol ÎÎÎÎÎÎÎÎ

Min ÎÎÎÎÎÎ

TypÎÎÎÎÎÎÎÎ

MaxÎÎÎÎÎÎ

Unit

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

OFF CHARACTERISTICSÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Collector−Emitter Sustaining Voltage (Note 2)(IC = 30 mA, IB = 0) TIP140, TIP145

TIP141, TIP146TIP142, TIP147

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

VCEO(sus) ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

6080100

ÎÎÎÎÎÎÎÎÎÎÎÎ

−−−

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

−−−


Vdc

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Collector Cutoff Current(VCE = 30 Vdc, IB = 0) TIP140, TIP145(VCE = 40 Vdc, IB = 0) TIP141, TIP146(VCE = 50 Vdc, IB = 0) TIP142, TIP147


ICEOÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

−−−


−−−


2.02.02.0


mA

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Collector Cutoff Current(VCB = 60 V, IE = 0) TIP140, TIP145(VCB = 80 V, IE = 0) TIP141, TIP146(VCB = 100 V, IE = 0) TIP142, TIP147


ICBOÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

−−−


−−−


1.01.01.0


mA

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎEmitter Cutoff Current (VBE = 5.0 V)

ÎÎÎÎÎÎÎÎÎÎIEBO

ÎÎÎÎÎÎÎÎ−

ÎÎÎÎÎÎ−

ÎÎÎÎÎÎÎÎ2 0

ÎÎÎÎÎÎmAÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎON CHARACTERISTICS (Note 2)ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

DC Current Gain(IC = 5.0 A, VCE = 4.0 V)(IC = 10 A, VCE = 4.0 V)


hFEÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

1000500


−−


−−


−

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Collector−Emitter Saturation Voltage(IC = 5.0 A, IB = 10 mA)(IC = 10 A, IB = 40 mA)

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

VCE(sat) ÎÎÎÎÎÎÎÎÎÎÎÎ

−−

ÎÎÎÎÎÎÎÎÎ

−−


2.03.0

ÎÎÎÎÎÎÎÎÎ

Vdc


Base−Emitter Saturation Voltage(IC = 10 A, IB = 40 mA)


VBE(sat)ÎÎÎÎÎÎÎÎÎÎÎÎ

−ÎÎÎÎÎÎÎÎÎ

−ÎÎÎÎÎÎÎÎÎÎÎÎ

3.5ÎÎÎÎÎÎÎÎÎ

Vdc


Base−Emitter On Voltage(IC = 10 A, VCE = 4.0 Vdc)


VBE(on) ÎÎÎÎÎÎÎÎÎÎÎÎ

− ÎÎÎÎÎÎÎÎÎ

− ÎÎÎÎÎÎÎÎÎÎÎÎ

3.0 ÎÎÎÎÎÎÎÎÎ

Vdc

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎSWITCHING CHARACTERISTICSÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎResistive Load (See Figure 1)ÎÎÎÎÎÎÎÎÎÎÎÎDelay Time

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

(VCC = 30 V, IC = 5.0 A,IB = 20 mA, Duty Cycle 2.0%,IB1 = IB2, RC & RB Varied, TJ = 25C)

ÎÎÎÎÎÎÎÎÎÎtd

ÎÎÎÎÎÎÎÎ−

ÎÎÎÎÎÎ0.15

ÎÎÎÎÎÎÎÎ−

ÎÎÎÎÎÎsÎÎÎÎÎÎ

ÎÎÎÎÎÎRise TimeÎÎÎÎÎÎÎÎÎÎtr

ÎÎÎÎÎÎÎÎ−

ÎÎÎÎÎÎ0.55

ÎÎÎÎÎÎÎÎ−


ÎÎÎÎÎÎStorage TimeÎÎÎÎÎÎÎÎÎÎts

ÎÎÎÎÎÎÎÎ−

ÎÎÎÎÎÎ2.5

ÎÎÎÎÎÎÎÎ−


ÎÎÎÎÎÎFall TimeÎÎÎÎÎÎÎÎÎÎtf

ÎÎÎÎÎÎÎÎ−

ÎÎÎÎÎÎ2.5

ÎÎÎÎÎÎÎÎ−

ÎÎÎÎÎÎs

2. Pulse Test: Pulse Width = 300 s, Duty Cycle 2.0%.

Figure 1. Switching Times Test Circuit

10

0.2

Figure 2. Switching Times

IC, COLLECTOR CURRENT (AMP)

t, TI

ME

(s

)μ

5.0

2.0

0.5

0.10.5 1.0 3.0 5.0 10 20

0.2

PNPNPN

tf

tr

ts

td @ VBE(off) = 0

V2approx+12 V

V1appox.-8.0 V

tr, tf ≤ 10 nsDUTY CYCLE = 1.0%

25 s

0

RB

51 D1

+4.0 V

VCC-30 V

RC

TUT

≈ 8.0 k ≈ 40

SCOPE

for td and tr, D1 is disconnectedand V2 = 0

RB & RC VARIED TO OBTAIN DESIRED CURRENT LEVELSD1, MUST BE FAST RECOVERY TYPE, eg:1N5825 USED ABOVE IB ≈ 100 mAMSD6100 USED BELOW IB ≈ 100 mA

VCC = 30 VIC/IB = 250IB1 = IB2TJ = 25°C

For NPN test circuit reverse diode and voltage polarities.

1.0


http://onsemi.com4

V CE(

SAT)

, CO

LLEC

TOR

-EM

ITTE

R S

ATU

RAT

ION

VO

LTAG

E (V

OLT

S)V B

E, B

ASE-

EMIT

TER

VO

LTAG

E (V

OLT

S)

V BE,

BAS

E-EM

ITTE

R V

OLT

AGE

(VO

LTS)

5000

0.5

Figure 3. DC Current Gain versus Collector Current

IC, COLLECTOR CURRENT (AMPS)

3001.0 2.0 3.0 5.0 7.0 10

500

h FE

, DC

CU

RR

ENT

GAI

N

VCE = 4.0 V

4.0

NPNTIP140, TIP141, TIP142

PNPTIP145, TIP146, TIP147

Figure 4. Collector−Emitter Saturation Voltage

5.0

-75

TJ, JUNCTION TEMPERATURE (°C)

0.5

IC = 10 A, IB = 4.0 mA2.0

3.0

4.0

-75


-25 25 75 175

3.6

3.2

2.8

2.4

0.8

Figure 5. Base−Emitter Voltage

2000

1000

TJ = 150°C

25°C

-55°C

IC, COLLECTOR CURRENT (AMPS)

h FE

, DC

CU

RR

ENT

GAI

N



125

20,000

1000

2000

3000

5000

10,000

7000

1.0

0.7

0.5

V CE(

SAT)

, CO

LLEC

TOR

-EM

ITTE

R S

ATU

RAT

ION

VO

LTAG

E (V

OLT

S)

0.5 1.0 2.0 3.0 5.0 7.0 104.00.7

-50 -25 0 25 50 75 100 125 150 175

5.0

-75

2.0

3.0

1.0

0.7

-50 -25 0 25 50 75 100 125 150 175

2.0

1.6

1.2

4.0

-75 -25 25 75 175

3.6

3.2

2.8

2.4

0.8125

2.0

1.6

1.2

100°C

TJ = 150°C

100°C

25°C

-55°C

VCE = 4.0 V

IC = 5.0 A, IB = 10 mA

IC = 1.0 A, IB = 2.0 mA

IC = 10 A, IB = 4.0 mA

IC = 5.0 A, IB = 10 mA

IC = 1.0 A, IB = 2.0 mA

VCE = 4.0 V

IC = 10 A

5.0 A

1.0 A

VCE = 4.0 V

IC = 10 A

5.0 A

1.0 A



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ACTIVE−REGION SAFE OPERATING AREA

There are two limitations on the power handling ability ofa transistor: average junction temperature and secondbreakdown. Safe operating area curves indicate IC − VCElimits of the transistor that must be observed for reliableoperation; i.e., the transistor must not be subjected to greaterdissipation than the curves indicate.

The data of Figure 6 is based on TJ(pk) = 150C; TC isvariable depending on conditions. At high casetemperatures, thermal limitations will reduce the power thatcan be handled to values less than the limitations imposed bysecond breakdown.

SECONDARY BREAKDOWN LIMITBONDING WIRE LIMITTHERMAL LIMITATION @ TC = 25°C

Figure 6. Active−Region Safe Operating Area

dc

VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS)

2.0

I C, C

OLL

ECTO

R C

UR

REN

T (A

MP)

(mA)

10

10

0.2

5.0

20

1.0

20

TJ = 150°C

5030

TIP140, 145

3.0

7.0

15 70 100

TIP141, 146TIP142, 147

I C, C

OLL

ECTO

R C

UR

REN

T (A

MPS

) 15

10

1.0

2.0

5.0

7.0

Figure 7. Unclamped Inductive Load

L, UNCLAMPED INDUCTIVE LOAD (mH)

0.5 1.0 2.0 5.0 10 20 50 100

100 mJ

INPUT

MPS-U52

50

50

RBB1

1.5k

RBB2= 100

VBB2 = 0VBB1 = 10 V

TUT

VCE MONITOR

100 mH

VCC = 20 VIC

MONITOR

RS = 0.1

TEST CIRCUITNOTE 1: Input pulse width is increased until ICM = 1.42 A.NOTE 2: For NPN test circuit reverse polarities.

INPUTVOLTAGE

COLLECTORCURRENT

1.42 A

VCE(sat)-20 V

COLLECTORVOLTAGE

V(BR)CER

w ≈ 7.0 ms (SEE NOTE 1)5.0 V

0100 ms

0

VOLTAGE AND CURRENT WAVEFORMS

Figure 8. Inductive Load


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P D, P

OW

ER D

ISSI

PATI

ON

(WAT

TS)

PNPNPN

Figure 9. Magnitude of Common EmitterSmall−Signal Short−Circuit Forward

Current Transfer Ratio

f, FREQUENCY (MHz)

2.0

1.0

10

5.0

100

1.03.0 5.0

7.0

2.0 7.0 10

VCE = 10 VIC = 1.0 ATJ = 25°C

5.0

4.0

0

1.0

2.0

3.0

Figure 10. Free−Air Temperature Power Derating

TA, FREE-AIR TEMPERATURE (°C)

0 40 80 120 160 200

h fe

, SM

ALL-

SIG

NAL

FO

RWAR

D C

UR

REN

TTR

ANSF

ER R

ATIO 20

5070

PNP

NPN


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PACKAGE DIMENSIONS

SOT−93 (TO−218)CASE 340D−02

ISSUE E

STYLE 1:PIN 1. BASE

2. COLLECTOR3. EMITTER4. COLLECTOR

A

D

VG

K

S L

U

B Q

1 2 3

4

NOTES:1. DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.2. CONTROLLING DIMENSION: MILLIMETER.

EC

JH

DIM MIN MAX MIN MAXINCHESMILLIMETERS

A --- 20.35 --- 0.801B 14.70 15.20 0.579 0.598C 4.70 4.90 0.185 0.193D 1.10 1.30 0.043 0.051E 1.17 1.37 0.046 0.054G 5.40 5.55 0.213 0.219H 2.00 3.00 0.079 0.118J 0.50 0.78 0.020 0.031K 31.00 REF 1.220 REFL --- 16.20 --- 0.638Q 4.00 4.10 0.158 0.161S 17.80 18.20 0.701 0.717U 4.00 REF 0.157 REFV 1.75 REF 0.069

TO−247CASE 340L−02

ISSUE F

N

P

A

K

WF

DG

U

E

0.25 (0.010) M Y Q S

JH

C

4

1 2 3

−T−

−B−

−Y−

NOTES:1. DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.2. CONTROLLING DIMENSION: MILLIMETER.

2 PL

3 PL

0.63 (0.025) M T B M

−Q−

LDIM MIN MAX MIN MAX

INCHESMILLIMETERS

A 20.32 21.08 0.800 8.30B 15.75 16.26 0.620 0.640C 4.70 5.30 0.185 0.209D 1.00 1.40 0.040 0.055E 1.90 2.60 0.075 0.102F 1.65 2.13 0.065 0.084G 5.45 BSC 0.215 BSCH 1.50 2.49 0.059 0.098J 0.40 0.80 0.016 0.031K 19.81 20.83 0.780 0.820L 5.40 6.20 0.212 0.244N 4.32 5.49 0.170 0.216P --- 4.50 --- 0.177Q 3.55 3.65 0.140 0.144U 6.15 BSC 0.242 BSCW 2.87 3.12 0.113 0.123

STYLE 3:PIN 1. BASE

2. COLLECTOR 3. EMITTER 4. COLLECTOR


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ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further noticeto any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liabilityarising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. Alloperating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rightsnor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applicationsintended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. ShouldBuyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or deathassociated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an EqualOpportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.




TIP140/D

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