Multivariable Dynamic Model and Robust Control of a Voltage-Source Converter for Power System...

462 IEEE TRANSACTIONS ON POWER DELIVERY, VOL. 24, NO. 1, JANUARY 2009

Multivariable Dynamic Model and RobustControl of a Voltage-Source Converter for

Power System ApplicationsAhmadreza Tabesh, Member, IEEE, and Reza Iravani, Fellow, IEEE

Abstract—This paper proposes a new multivariable dynamicmodel and a control approach for a voltage-source converter(VSC) based on adopting instantaneous real- and reactive-powercomponents as the VSC dynamic variable. Using power compo-nents as the dynamic variables reduces the degree of nonlinearitiesof the VSC model in comparison with the conventional VSC modelthat uses current components as variables. Furthermore,since waveforms of power components are independent of theselected coordinates, the proposed control is more robust tothe conventionally unmodelled dynamics such as dynamics ofthe VSC phase-locked loop system. The proposed control systemregulates the VSC ac-side real- and reactive-power components,and the dc-side voltage. This paper also introduces an overcurrentlimiting mechanism, based on limiting the VSC power exchangeduring abnormal conditions, for the proposed control system.The proposed model and control are applied to a VSC-basedreactive power compensator and simulation results based onPSCAD/EMTDC software are presented.

Index Terms—Dynamic modelling, multivariable control, se-quential loop closing, voltage-source converter (VSC).

I. INTRODUCTION

T HE switch-mode voltage-source converter (VSC)topology has gained wide acceptance for application

in electric power generation, transmission, and distributionsystems [1], [2]. A main feature of VSC for such applicationsis its decoupled instantaneous real- and reactive-power controlcapability [1], [3], [4]. Conventionally a VSC is operated as acurrent-controlled voltage source and real- and reactive-powercomponents are controlled through the VSC instantaneouscurrent components [4]–[6]. Salient features of this approachare as follows.

• Instantaneous real- and reactive-power components areproportional to current components.

• Physical -frame currents are readily measurable andconvertible to -components as feedback variables.

• Overcurrent protection is its inherent property.Conversion of -frame currents to current components re-quires a phase-locked loop (PLL) system to determine the phaseangle of the rotating -frame. If dynamics of PLL is ignored inthe VSC control design, the control system must be adequately

Manuscript received December 14, 2006; revised February 14, 2008. Firstpublished May 07, 2008; current version published December 24, 2008. Paperno. TPWRD-00796-2006.

The authors are with the University of Toronto, Toronto, ON M5S 3G4,Canada (e-mail: [email protected]; [email protected]).

Color versions of one or more of the figures in this paper are available onlineat http://ieeexplore.ieee.org.

Digital Object Identifier 10.1109/TPWRD.2008.923531

robust to compensate for the unaccounted PLL dynamics. Fur-thermore, using current components as dynamic variables re-sult in a nonlinear VSC-control model which in turn adds to thecomplexity of the control design [6], [7]. Various linear and non-linear VSC control methods have been proposed/adopted in thetechnical literature [4]–[10].

Among linear control methods, state feedback based methodsdo not necessarily provide robust controllers since control pro-visions (e.g., stability margins), are not readily formulated inthese methods [7]. A root locus analysis approach is proposedin [7] to ensure robustness of designed controllers based on statefeedbacks. Another drawback is that such PI-based controllersare often designed based on trial and error [4]. Among nonlinearcontrol approaches, feedback linearization method is not robustsince it requires precise cancellation of VSC model nonlinear-ities [6]. In this context, an integral control to eliminate steadystate error, and a passivity-based control to enhanced robustnessof VSC nonlinear control are presented in [9] and [6], respec-tively.

This paper introduces a new model for a robust VSC controldesign. The proposed model employs instantaneous real- andreactive-power components and , rather than the con-ventional current components, as dynamic variables. and

, unlike other electrical parameters, have unique waveformsindependent of the adopted reference frame. Thus, andinstantaneous values can be determined in reference frame,which is independent of PLL, and used in a reference frameto reduce model nonlinearities.

The proposed model facilitates robust controller design pro-cedures since its dynamic variables, and , are indepen-dent of the reference frame. A limitation of the proposed con-trol approach, based on and as variables, is that it doesnot provide inherent overcurrent limiting capability. This paperalso introduces a power (current) limiting mechanism for theproposed control approach to overcome this drawback.

II. DYNAMIC MODEL OF A VSC

A. VSC State-Space Representation in Reference Frame

Fig. 1 shows the circuit diagram and a single-line represen-tation of a three-phase three-wire VSC. The fundamental fre-quency components of the VSC terminal voltages of Fig. 1 are[8]

(1)

0885-8977/$25.00 © 2008 IEEE

TABESH AND IRAVANI: MULTIVARIABLE DYNAMIC MODEL AND ROBUST CONTROL OF A VSC 463

Fig. 1. (a) Schematic diagram of power circuit of a VSC. (b) Single-line dia-gram of a VSC.

where , is the converter modulationindex, and is the phase angle of the VSC terminal voltagewith respect to the point of common coupling (PCC) voltage.A dynamic model of the VSC in the reference frame is

(2)

where and . andare the equivalent series resistance and inductance of the filterand transformer, between the VSC terminal and the PCC. Thedc-side voltage dynamic expression is deduced based on powerbalance between the ac- and dc-side as

(3)

where is the instantaneous real power at , andincludes the total power loss, and is the

transferred power from the dc side to the “converter” system(Fig. 1). Loss components include 1) capacitor dielectric loss,2) switching and on-state loss, and 3) losses in the converterac-side components as represented by , Fig. 1. The instanta-neous real power at PCC is

(4)

in terms of voltages and currents in a reference frame[11] is obtained by substituting and

in (4) as given by

(5)

where transformation matrix is [11]

, and is the power system frequency.Since , from (5) we deduce

(6)

Fig. 2. Geometric interpretation of instantaneous real and reactive power com-ponents.

Transferring (2) and (3) also to the reference frame and rear-ranging the equations, we obtain

(7)

(8)

(9)

Equations (7)–(9) describe a nonlinear and coupled dynamicmodel of the VSC which is employed to develop a multivari-able model based on adopting instantaneous real and reactivepower components as dynamic variables.

B. VSC Instantaneous Reactive Power

To develop an expression for instantaneous reactive power, analogous to real-power expression , a geometric inter-

pretation of (6) is depicted in Fig. 2. Voltage and current vectorsand in Fig. 2 are defined as

(10)

Polar representations of and are

(11)

where

(12)

Instantaneous real, reactive, and complex power components areexpressed [12], based on Fig. 2, as

(13)

(14)

(15)

where denotes complex conjugate. in (13) is also de-fined as the instantaneous power factor [12]. Substituting for

and from (10) in (15), we obtain

(16)


Thus, from (16), we conclude

(17)

(18)

where and denote real and imaginary parts. Sincepower waveform is independent from a frame of reference [11],

and can be calculated based on voltage and currentcomponents in a stationary reference frame [11]

(19)

Substituting , , , and from (19) in (18), we obtain(Appendix)

(20)Based on (4) and (20), and are calculated by measuring

and . From (4) and (20), we also deduce that andare constant in steady state conditions.

C. Development of a Multivariable Dynamic Model for VSC

This section formulates the dynamic behavior of the VSC ofFig. 1 by employing and as its dynamic variables incontrast to the conventional model [3]–[10] that adopt cur-rent components as the VSC variables. The proposed model isextracted from the exact dynamic model of (7)–(9). Solving (17)and (18) for and , we obtain

(21)

(22)

where

(23)

and are only functions of the PCC voltage components.In practice, the PCC voltage variations are within a narrow rangeduring normal conditions, although the PCC voltage and

can vary significantly during transients. For the purpose ofcontroller design, and can be assumed constant values,specified at the PCC rating voltage. Validity of this assumptionis verified based on time-domain simulation studies, utilizingthe VSC exact dynamic equations.

Substituting for and from (21) and (22) in (7) and(8), we deduce

(24)

(25)

where is the power system frequency and

(26)

Fig. 3. Representation of a multivariable dynamic model for a VSC.

Assuming and are constant at their rating values, basedon (24) and (25) the dynamic model of the VSC, using and

as state variables, is linear and can be expressed in Laplacedomain as

(27)

(28)

Solving (27) and (28) for and , the VSC model in the Laplacedomain is

(29)

where

(30)

(31)

and . Equation (29) describes the dynamic behaviorof the VSC power circuit as a linear and coupled multivariablesystem as shown in Fig. 3. and in Fig. 3 are linearlyrelated to and in (26), assuming constant and .

and are also constant quantities in a steady statecondition.

III. MULTIVARIABLE CONTROLLER DESIGN FOR A VSC

A. Real- and Reactive-Power Controller

The sequential loop closing (SLC) method is adopted to de-sign controllers for the multivariable model depicted in Fig. 3.The SLC is a generalization of the classical controller designapproach for multivariable systems [13]. The SLC approach se-lects pairs of input–outputs which are more closely related. Acontroller is designed for one pair of the input–output variables,ignoring the multivariable nature of the system [13]. Then, thedesigned controller is considered an integral part of system, andthe other controller is designed for the next pair of input–outputvariables. This design procedure ensures that the overall system


remain stable provided that the system retains stability at eachstep of controller design [13]. The SLC method employs well-established controller design techniques (e.g., bode plot and rootlocus) to design robust controllers. The robustness of this ap-proach stems from extension of the single-input single-output(SISO) concepts (e.g., phase and gain margins), for a multi-variable system. Such a robust controller design is not readilyachievable in state feedback and pole placement approachesbased on a VSC state-space representation [13].

1) Real-Power Controller: Considering as the firstpair (and thus imposing ) from (29) and (31), we obtainthe first SISO system for controller design as

(32)

where

(33)

Compensator is designed such that the first SISO loop isa stable loop with the required specifications. Substitutingfrom (33) in (32), the closed loop equation of the first loop inLaplace domain is

(34)

For a stable loop, is designed to have all roots oflocated in the left half plane (LHP).

2) Reactive-Power Controller: To design the second loopcontroller for , we consider the first loop as part of thesystem and deduce a transfer function between and . From(29), and are given as

(35)

(36)

Substituting from (33) in (36), we obtain

(37)

Replacing from (35) in (37) leads to

(38)

where

Control input is

(39)

Fig. 4. (a) A schematic diagram of the outer loop controller for dc-side voltage.(b) A schematic diagram of the dynamic power (current) limiter. (c) A schematicdiagram of the outer loop controller including the limiter block of Fig. 5(b).

where is the second loop compensator corresponding to. Substituting from (39) in (38) and solving , we ob-

tain

(40)

Similar to the design procedure of the first loop, is designedto have all roots of located in LHP. The con-trol design can be performed also based on other SISO designtechniques [15].

B. DC-Side Voltage Controller Design

The exact dynamic equation of the VSC dc-side voltage isgiven by (9). The instantaneous dc-side voltage can be con-sidered as an average value and a ripple term (i.e.,

). Considering that, by substituting in (9) we deduce

(41)

Equation (41) in Laplace domain is

(42)


Fig. 4(a) represents the schematic block diagram of the outerloop controller for the dc-side voltage based on (42). Real power

in the Laplace domain is

(43)

where

Substituting from (43) in (42), we deduce

(44)

where

in (44) represents a disturbance term and is given by

(45)

The outer loop controller of Fig. 4(a) is designed to maintainat in the presence of disturbances. The closed loop transfer-function of the outer control loop is obtained by substituting

in (44) and arranging it as

(46)

For a stable operating condition, is designed such that allroots of are located in LHP.

C. Dynamic Power Limiter

Dynamics at the VSC ac-side subsystem can subject the VSCto overcurrents under the control scheme of Fig. 4(a). Hence,a power (current) limit strategy is required to protect the VSCswitches against overcurrent. To dynamically limit the VSC cur-rent, we propose a method based on limiting real and reactivepower references ( and in Fig. 4(a)) during an over-current scenario. The proposed method monitors the VSC in-stantaneous current and voltage at PCC (i.e., and inFig. 1) and imposes the desired limits by calculating and multi-plying two coefficients and to the real andreactive power reference values, respectively. Fig. 4(b) showsthe schematic block diagram of the proposed dynamic powerlimiter. The calculation block of Fig. 4(b) calculates real andreactive current components [12] of the VSC as given by

(47)

Fig. 5. Power circuit diagram of the study system.

where , , and are defined in (4), (20), and (12),respectively. Geometric descriptions of and are depictedin Fig. 2. Per unit values of and are utilized to generatecoefficients and as defined by

(48)

where is a parameter that assigns the slope of the limiter func-tion and is a saturation function and is defined as

.(49)

Reference values and are continuously multiplied byand to dynamically deduce limits and , re-

spectively. Fig. 4(c) shows the outer loop controller of Fig. 4(a)including the limiter block of (4b). An application example inSection IV, Fig. 9 demonstrates the effectiveness of the limiterscheme during three-phase and single-phase ac-side faults.

IV. APPLICATION EXAMPLE

The objectives of this section are to demonstrate performanceof the designed controllers, and to verify robustness of the con-troller with respect to the system parameter variations as well asPLL dynamics.

Fig. 5 shows a schematic diagram of the study system [14].The VSC controllers are designed based on the multivariablemodel of (30) and (31). Tracking, disturbance rejection, androbustness of the designed controllers are examined based ontime-domain simulation of the exact switching model of thestudy system in the PSCAD/EMTDC software environment.

A. Study System

The system of Fig. 5 includes a power system represented bya source with internal per-phase parameters and , a loadrepresented by per-phase parameters and , and an IGBTPWM-based VSC. and in Fig. 5 represent filter and trans-former parameters between the VSC and the PCC. Resistorin series with switch is used to examine the performance of


TABLE ISTUDY SYSTEM PARAMETERS

the real-power controller of the VSC. The VSC primarily oper-ates as a reactive power compensator ( is open) to compen-sate the load reactive power. The system parameters are listed inTable I [14], and all study results are depicted in per unit basedon , , and .

B. VSC Model and Controllers

Based on the system data from Table I, elements of the VSCtransfer-function matrix (i.e., of (29)) are

(50)

(51)

The three compensators within the control system of Fig. 4 (i.e.,, , and ) are designed based on the SLC method as

(52)

Stability and robustness of the designed controllers are inves-tigated through eigenvalue analysis and several case studies asfollows.

C. Tracking Capability

Tracking capability of the designed controllers is examinedby applying a step command to , from 0 to 1 p.u., to theclosed-loop system of Fig. 4(c). Fig. 6 shows the VSC reactivepower and the dc-side voltage responses to the step in .Fig. 6(a) shows that the tracking rise time is less than 1 cycle

, its overshoot is less than 10%, and its settlingtime is less than 3 cycles , according to the designrequirements. Fig. 6(b) shows a maximum of 0.05-p.u. voltagedrop in the dc-side voltage which is recovered in less than 3cycles. Steady state errors in both reactive power and dc-sidevoltage are zero. Time responses of variables andof Fig. 6 do agree with the corresponding responses obtainedbased on conventional and control as reported in [14].This agreement shows feasibility of the model and the proposedcontrol in terms of the VSC response time.

Fig. 7 illustrates the rms and the instantaneous (phase- ) PCCvoltage and the VSC (phase- ) current, in response to the stepchange in . Voltage and current rms values of Fig. 7 are di-rectly calculated from the instantaneous components as givenby

(53)

(54)

Fig. 6. Tracking performance of the control system of Fig. 5(a).

Fig. 7. VSC terminal voltage and current subsequent to the step command.

where , , , and are defined in (19). As Fig. 7 shows,in a steady state condition (five cycles after the disturbance),(53) and (54) provide the same rms values as deduced based onthe conventional definition of root mean square over one signalperiod. Fig. 7(a) shows that almost remains unchangedand Fig. 7(b) shows that the rms current increases to about 1 p.u.without any significant overshoot. Figs. 6 and 7 validate themodel assumptions and the inner control loop design based on(34), (40), and (46).

D. Disturbance Rejection Capability

1) DC-Side Load Energization: The ability of the controlsystem to reject a dc-side disturbance is verified by connecting

in parallel to the dc capacitor (Fig. 5). dissi-pates 5 kW (0.5 p.u.) at the rated dc-side voltage which is halfof the VSC rated power. This scenario, can represent variationsin power exchange due to a disturbance in a back-to-back VSCconfiguration (e.g., in the converter system of a doubly-fed in-duction machine-based wind energy conversion unit [16]).

Fig. 8 shows variations of the dc-side voltage and the cor-responding reactive power flow, subsequent to the dc-side dis-turbance. Fig. 8(a) shows that the VSC control system revertsthe capacitor voltage to its reference value in less than three cy-cles and maintains the dc-side voltage within 7% of the ratedvalue. Fig. 8(b) illustrates that deviates 0.1 p.u. (10% of theconverter rating). Fig. 8(b) also shows that the reactive powercontroller regulates to its reference value in less than three


Fig. 8. Impacts of a dc-side disturbance on reactive power and dc-side voltagecontrol.

Fig. 9. Single-line diagram of the study system for disturbance rejection casestudies.

cycles. The study results of Fig. 8 confirm viability of the designof the outer loop controller based on the linear model of (41).

2) AC-Side Load Change: To investigate the VSC con-trollers’ performance in response to a disturbance due to a loadchange, the load of Fig. 5 is divided into two equal sectionsas shown in Fig. 9. Initially, switch is closed and the loadchange is imposed by opening the switch. Fig. 10 depicts theeffect of the load change on reactive power at the PCC andthe dc-side voltage. Fig. 10(a) shows 0.03-p.u. deviation inreactive power which reverts to its steady state value in threecycles. Fig. 10(b) shows that deviates 0.007 p.u., whichis regulated to its steady state value via the control system inthree cycles. Fig. 10 demonstrates the ability of the designedcontrollers to reject an ac-side disturbance.

E. Dynamic Power Limiter Capability

This case study investigates the capability of the proposedpower (current) limiter of Section III as embedded in the con-verter controller of Fig. 4(c) to limit the converter transient cur-rents. The parameter in (48) is selected to achieve asteep slope of the limiter function in Fig. 4(b). Two temporary,three-cycle faults; a three-phase and a single-phase are studied.

Fig. 10. Impacts of an ac-side disturbance on reactive power and dc-sidevoltage control.

Fig. 11. Converter current and dc-side voltage subsequent to the three-phasefault at the PCC.

The faults are imposed at PCC at and removed after 3cycles at (Fig. 9). The per-phase fault impedancefor the three- and the single-phase faults are 0.1 and 0.04which result in fault currents of up to 10 p.u. Prior to each fault,the rms current and the dc-side voltage are at 1 p.u.

1) Three-Phase Fault: Fig. 11 shows the VSC rms currentand the dc-side voltage subsequent to the three-phase fault. Thesolid lines in Fig. 11 depict the system behavior when the lim-iter is in service. With the limiter in service, the peak value ofthe fault current in the first cycle is about 2.5 p.u. as shown inFig. 11(a) and the peak value of the dc-side voltage is less than1.15 p.u. [Fig. 11(b)]. When the fault is cleared, the rms cur-rent is limited to 1.5 p.u. [Fig. 11(a)], and the dc-side voltageremains less than 1.1 p.u. [Fig. 11(b)]. After the fault is cleared,the current and dc-side voltage return to their steady state valuesin less than three cycles (cycles three to six).

Dashed lines in Fig. 11 show the system response tothe same fault scenario when the limiter is not in service.Fig. 11(a) and (b) shows that the VSC current and the dc-sidevoltage subsequent to the fault increase to 3.5 p.u. and 1.2 p.u.,respectively. When the limiter is not in service, the VSC currentand the dc-side voltage experience higher peak values sincethe controller still employs prefault values of andduring the fault. Fig. 11 shows the effectiveness of the dynamic


Fig. 12. Converter current and dc-side voltage subsequent to the single-phasefault at the PCC.

power (current) limiter in reducing the VSC current and thedc-side voltage deviations following the three-phase fault.

2) Single-Phase Fault: Fig. 12 shows the system response tothe single-phase fault. Fig. 12 indicates that the peak encoun-tered values are less than those of the three-phase fault for thesame fault rms current. The VSC current is limited to 2.5 p.u.without the limiter (dashed line) and 1.5 p.u. when the limiteris in service, Fig. 12(a). The dc-side maximum overvoltage inFig. 12(b) is about 0.15 p.u. without the limiter, and 0.10 p.u.when the limiter is employed. Fig. 12 reveals that after the faultclearance, the VSC current and dc-side voltage return to steadystate conditions in less than two cycles. Fig. 12 illustrates effec-tiveness of the limiter during system transients.

F. Controller Robustness

1) Robustness of Controllers to System Parameters: To in-vestigate robustness of the VSC controllers of Fig. 4 to thesystem parameters, tracking and disturbance rejection proper-ties of the control system for various system parameters are in-vestigated. Based on (26) and (29), series inductance (Fig. 1)mainly influences the reactive power controller. Equation (41)also conveys that the dc-side capacitance dominantly impactsthe dc-side voltage regulator. Thus, and are varied to in-vestigate robustness of real power, reactive power, and dc-sidevoltage controllers.

Fig. 13(a) shows the response of the system to a stepcommand from 0 to 1 p.u., corresponding to , , and .Fig. 13(a) shows comparable system performances in terms ofrise time, overshoot, and settling time of the step response. Forthe three inductance values, overshoot is less than 10%, the risetime is less than one cycle, and the settling time is less than threecycles. Fig. 13(a) verifies the robustness of the control systemto variations in .

Fig. 13(b) shows the robustness of the controller to variationof (i.e., for , , and ). As Fig. 13(b) shows for allthree values of , voltage deviations are less than 0.1 p.u. andthe dc-side voltages revert to the steady state value within threecycles.

Impacts of the VSC filter parameters and on the VSC dy-namics are investigated by the eigenvalue analysis of the system

Fig. 13. System performance when � and � are changed.

Fig. 14. Trace of real parts of the closed-loop system poles versus ��.

of Fig. 9. Eigenvalues of the system are obtained from closed-loop poles of the feedback system of Fig. 4(a). Real parts ofeigenvalues determine the stability of the system. Therefore,traces of eigenvalues with respect to a system parameter expressrobustness of the system. Fig. 14(a) shows traces of the real partsof eigenvalues of the study system with respect to variations of

. The ratio is changed from 0.8 to 1.2 of its nominalvalue of . For this range of variations,the system remains stable. The eigenvalue analysis results ofFigs. 14 validate robustness of the controllers to the system pa-rameter variations.

2) Robustness of Controllers to PLL Dynamics: Fig. 9 alsoshows the PLL that generates reference angle as used in (1).The lack of dependence of and waveforms to the se-lected frame of reference makes controllers less sensitive to thePLL dynamics compared with the conventional approach thatutilizes and as the control variables. To verify ro-bustness of controllers to the PLL dynamics, a bias angle of

is applied to the PLL. This bias angle also appears inthe reference frame employed in the controller design proce-dure. Fig. 15(a) shows reactive power component time responseto a step change (0 to 1 p.u.) in reactive power command corre-sponding to and . Fig. 15(a) indicates that timeresponse properties (rise time, overshoot, and settlings time) forboth waveforms are practically the same. Fig. 15(b) also shows


Fig. 15. Impact of reference frame angle on controllers’ performance.

Fig. 16. Impact of system short circuit ratio on controllers’ performance.

Fig. 17. Impact of the system operating point on controllers’ performance.

that the dc-voltage time response properties, corresponding tothe same disturbance, are identical. Fig. 15 demonstrates robust-ness of the proposed controllers to the PLL dynamics.

3) Robustness of Controller to Change of Operating Pointand Short Circuit Ratio (SCR): Fig. 16 depicts the VSC reactivepower and the dc-side voltage waveforms following a 0.5 p.u.reactive power step command corresponding to the system SCRvalues of 15, 10, and 5. The three SCR levels are obtained by

changing and (Fig. 9), while ratio is kept constant.Fig. 16(a) shows that for , 10, and 5, the VSC tracks0.5 p.u. step change command in reactive power with a zerosteady state error. Fig. 16(b) also depicts that for ,10, and 5, the dc-side voltage reverts to its steady state valuewith a zero steady state error in three cycles. Fig. 16 indicatesthat the VSC controllers provide robust tracking and disturbancerejection capability and demonstrate robustness with respect toa wide range of SCR values.

The control system tracking and disturbance rejection ca-pabilities are also investigated at different operating points bychanging and quantities. Fig. 17(a) shows the systemresponses to a 1 p.u. reactive power step command for three

voltage levels, , 1.25, and 1.5 p.u. The voltagewaveforms of dc-link capacitor following the dc-side load en-ergization are also depicted in Fig. 17(b) with respect to threedifferent reactive power quantities, , 0.5, and 1.0 p.u.Fig. 17(a) and (b) demonstrates that the control system is ableto track a reactive power command and to revert a disturbeddc-side voltage to its nominal value at different operating points.

V. CONCLUSIONS

A new multivariable model and controller design approachfor a voltage-source converter (VSC) are presented. The modelrepresents dynamics of a VSC utilizing instantaneous real andreactive power components as dynamic variables. The VSC con-trol system, based on the multivariable model, consists of aninner feedback loop to control real and reactive power, an outerloop to control dc-side voltage through real-power control, anda mechanism to dynamically limit overcurrent subsequent to afault. The inner control loop is a diagonal multivariable con-troller which is designed based on sequential loop closing ap-proach. The outer loop control is designed based on an SISOcontrol approach. The current limiting scheme reduces powerexchange between the VSC and power system during fault con-ditions.

The salient feature of the proposed multivariable model isthat it facilitates the robust controller design for a VSC since1) the model dynamic variables are independent from the frameof reference and 2) well-established robust multivariable controltechniques can be adopted based on the proposed model.

The proposed VSC multivariable approach is applied to astudy system to demonstrate its tracking, disturbance rejectionand robustness capabilities. The study results indicate that 1)the VSC controllers that are designed based on the multivari-able model to fulfill the desired tracking and disturbance re-jection specifications and 2) the control system is robust to thesystem parameter variations and frame of reference, and 3) theproposed protection scheme successfully limits switch overcur-rents during and subsequent to faults. Accuracy of the developedmodel and effectiveness of the proposed controller are validatedbased on time-domain simulation studies of a test system in thePSCAD/EMTDC software environment.


APPENDIX

Equation (20) is deduced by substituting for , , , andfrom (19) in (20) as

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Ahmadreza Tabesh (M’05) was born in Isfahan,Iran. He received the B.Sc. degree in electronics andthe M.Sc. degree in control systems from IsfahanUniversity of Technology (IUT), Isfahan, in 1995and 1998, respectively, and the Ph.D. degree fromthe University of Toronto, Toronto, ON, Canada, in2005.

Currently, he is a Postdoctoral Researcher withthe Department of Mechanical Engineering, Micro-engineering Laboratory for MicroelectromechanicalSystems, Université de Sherbrooke, Sherbrooke, QC,

Canada, based on Postdoctoral Fellowship, granted by the Natural Sciences andEngineering Research Council of Canada (NSERC). He was a faculty memberwith IUT in the submarine R&D center from 1998 to 2001. His researchinterests include power-electronic energy conversion systems for renewableenergy resources and micro-electromechanical systems for energy harvesting(power MEMS).

Reza Iravani (M’86–SM’02–F’03) received theB.Sc. degree in electrical engineering from TehranPolytechnic University, Tehran, Iran, in 1976, andthe M.Sc. and Ph.D. degrees in electrical engineeringfrom the University of Manitoba, Winnipeg, MB,Canada, in 1981 and 1985, respectively.

Currently, he is a Professor at the University ofToronto, Toronto, ON, Canada. His research inter-ests include power electronics and power system dy-namics and control.

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