Graphical Data Processing Research Study and Experimental ...

43
Report No. 15 Quarterly Progress Report 3 Covering the Period January to 31 March 1964 GRAPHICAL DATA PROCESSING RESEARCH STUDY AND EXPERIMENTAL INVESTIGATION By: A. E. BRAIN D. J. HALL J. H. MUNSON Prepared for: S. ARMY ELECTRONICS LABORATORIES FORT MONMOUTH NEW JERSEY CONTRACT DA 36. 039 AMC- 03247(E) (CONTINUA TION OF CONTRACT DA 36. 039 SC- 78343) DA P ROJ ECT 3A99. 22. 001

Transcript of Graphical Data Processing Research Study and Experimental ...

Report No. 15

Quarterly Progress Report 3 Covering the Period January to 31 March 1964

GRAPHICAL DATA PROCESSING RESEARCH STUDY

AND EXPERIMENTAL INVESTIGATION

By: A. E. BRAIN D. J. HALL J. H. MUNSON

Prepared for:

S. ARMY ELECTRONICS LABORATORIESFORT MONMOUTH NEW JERSEY

CONTRACT DA 36.039 AMC-03247(E)(CONTINUA TION OF CONTRACT DA 36. 039 SC-78343)DA P ROJ ECT 3A99. 22. 001

QUALI FI ED REQUESTORS MAY OBTAIN

COPI ES OF THIS REPORT ' FROM DEFENSE

DOCUMENTATION CENTER

April 1964

Report No. 15

Quarterly Progress Report 3 Covering the Period January to 31 March 1964

GRAPHICAL DATA PROCESSIN' G RESEARCH STUDY

AND EXPERIMENTAL INVESTI'GA TION

Prepared for:

S. ARMY ELECTRONICS LABORATORIESFORT MONMOUTH , NEW JERSEY

CONTRACT DA 36.039 AMC.03247(E)(CONTINUATION OF CONTRACT DA 36.039 SC-78343)SCL 4097 (18 NOVEMBER 1958)AMENDMENT NO. 2 (29 APRIL 1963)ORDER NO. 62241. PM.63.DA PROJECT 3A99- 22- 001

By: A. E. BRAIN D. J. HALL J. H. MUNSON

5 Rl ProjectNo. 4565

Objective: To conduct a research study and experimental investigation of techniquesand equipment characteristics of pattern recognition systems suitable for practicalapplication to graphical data processing for military requirements.

Approved: c. A. ROSEN , MANAGERAPP LI ED PHYS I CS LA BORA TORY

J. D. NOE , DIRECTORENGINEERING SCIENCES DIVISION

Copy No. !9..

ABSTRACT

Several aspects of the practical procedures for using MINOS I I

are examined. The SDS 910 computer has been selected for use wi

MINOS II on the basis of an over- all evaluation of characteristics.

Some guidance is gi ven on methods of input and output coding. The

pari ty functions have been found useful for testing and check-out.

CONTENTS

ABSTRACT

LIST OF ILLUSTRATIONS

PURPOSE

PUBLI CAT IONS , LECTURES , REPORTS AN CONFERENCES

INTRODUCTION--THE USE OF MINOS I I ON PRACTICAL PROBLEMS

THE JOINING OF MINOS I I TO THE SDS 910 COMPUTER

A. IntroductionB. The Comparison of Various ComputersC. The Interface Between MINOS II and the SDS 910

III SOME CONSIDERATIONS AFFECTING THE EFFICIENTUSE OF MINOS I I

A. IntroductionB. Ou tpu t Coding

C. Input CodingIV TESTING MINOS II BY THE AUTOMATIC SOLUTION

OF BOOLEAN FUNCTIONS

A. The Pari ty Functions and the Reasonsfor Their Selection

B. Experimental Resul

V CONCLUSIONS

PROGRAM FOR THE PERIOD 1 APRIL 1964 TO 30 JUNE 1964

REFERENCES

iii

ILLUSTRATIONS

Fig. 1

Fig. 2

Block Diagram of Existing MINOS II Configuration

Diagram Showing Four Interfaces Between MINOS and the SDS 910 .

Fig. 3 One Standard Format for MINOS II Dataon 160-Hole Punched Paper Tape . 10

Fig. Diagram Showing the Three-Dimensional Pari ty FunctionFig. Typical Training Cu rve for One the au t pu t Binaries

Fig. Training Curve for ALL Nine BinariesFig. Training Curve Showing Successive Convergencies

TABLES

Table I Distance 5 " Snake-in-the-Box" Code . 13

Table I I Names and Re la tionshi ps of Boolean Swi tching Func tions . 16

PURPOSE

The ultimate goal of this project is to determine , by study and

experiment , techniques sui table for the processing, recogni tion , storageand retrieval of non- alphanumeric graphical data useful for mi Ii tarypurposes.

The specific objectives of this continued work are:

( 1) To design and build a new preprocessor with acapabili ty of 1000 replicated images , and in-corporating a television chain to permi t elec-tronic control of graphical images.

To continue the development of new magneticanalog storage devices.

(2 )

(3 ) Making use of the present machine , MINOS I to determine by study and experiment , efficientoptical masks appropriate for implementing therecogni tion of graphical data.

PUBLICATIONS , LECTURES , REPORTS AND CONFERENCES

On January 28 and 29 , meetings were held at Stanford Research

Institute , Menlo Park , California between the sponsor s representa-

tive William A. Huber of the Data Transducer Branch , CommunicationsDepartment , U. S. Army Electronics Research and Development Labora toriesFort Monmouth , and all Stanford Research Insti tute project personnel

for the purpose of discussing the requirements of the contract.

Nils J. Nilsson is giving a three- uni t lecture course on "LearningMachines " at the Universi ty of California , Berkeley.

INTRODUCTION

THE USE OF MINOS I I ON PRACTICAL PROBLEMS

In the early stages after the completion of the assembly of MINOS II

it was often very difficul t to isolate the reasons for unpredicted behavior.

Quite frequently the faults were multiple rather than single-- , cumu-

la ti ve errors in timing over mul tiple read- train loops, and the highlyredundant na ture of the machine rendered diagnosis difficul t. I t was not

uncommon for the machine to train "around" the difficulty by using surplus

capaci ty, so that the only external manifes ta tion that things were notqui te right was that convergence was obtained rather slowly. Since our

experience was so limi ted , slow convergence was not regarded as being

particularly noteworthy-- the important thing was that the machine con-

verged. The use of selected problems has been of considerable help indiagnosing faul ts quickly and wi th the minimum of effort. Thus, althoughthe three-dimensional pari ty function has only eight patterns, it cannotbe done wi th less than three voters. Wi th three DACTL uni ts per binary

output , and all nine binaries being tested simultaneously, 27 of the 66DACTL uni ts may be checked ou t along wi th the timing circui ts and theincrement and decrement logic. The fi ve-dimensional pari ty function re-quires a minimum of fi ve voters per binary and the seven-dimensional

pari ty function takes seven voters per binary; the five-dimensional prob-

lem is most frequently used , since it can be run in about 12 minutes

(1200 patterns). The use of pari ty functions in the check- out routineis treated in the last section of this report.

In order to make more efficient use of MINOS II in certain on-line

applica tions , MINOS I I wi II be operated in conjunction wi th a digi talcompu ter. This problem falls wi thin the scope of the present contractand is now well in hand. The advantages that will accrue in enhancing

the capabili ties of the investigator are summarized in the first part

Decision and Adapt Circui ts for Threshold Logic Uni ts.

of this report. A comparison was made of the merits of four digitalcompu ters in rela tion to our needs , and the SDS 910 has been selected.Four interface equipments will be required in order to achieve the flexi-

bili ty we require , and a brief explanation is given of what will be

involved .

Also included in the report is a Ii ttle guidance on the pre para tionof da ta to be processed by MINOS I I. Al though we have rela ti vely Ii ttleexperience as yet on running problems , it has become apparent tha t train-ing time and machine performance may be improved substantially by the

use of efficient coding methods to describe the input and output data.

I I THE JOINING OF MINOS I I TO THE SDS 910 COMPUTER

A. Introduction

---

Our first steps toward joining MINOS II to a digital computer were

reported in the preceding Quarterly Progress Report No. 14 , where it was

stated that we were making detailed studies of the interface problems in

attaching MINOS to the Burroughs B-5000 , SDS 910 , and CDC 8090 (or 160-A)

computers.

The joining of a digi tal computer to MINOS II will provide theexperimenter with the following increased capabili ties:

( 1 ) To examine in detail the behavior of a single ThresholdLogic Uni t (TLU) or of a single analog weight;To set efficiently any or all of the 6600 analog weightsto zero or to any desired indi vidual value;

(2 )

(3 )

( 4)

To investigate different training algorithms at will;To offset and scale the 66 analog outputs of the ThresholdLogic Uni ts individually, to perform readi ly changeablealgorithms automatically, and to make selective attentionexperiments involving such offsetting and scaling;To deal wi th a reduced machine involving any subsets of( 5 )

( a)

(b)

( c )

The 100 inputs

the 66 Threshold Logic Uni

the quorums

or to deal differently wi th different subsets at the:same time;

( 6 ) To set and modify quorum thresholds at will or as aresul t of calculations;To reconstruct quorums at will or as a result of calcu-lations (another possible approach to selective attention);

( 7 )

(8) To perform f lexi ble preprocessing of certain types (oneexample: finding boundaries in a visual pattern);

(9 ) To perform test routines for investigating the hardwareperformance characteristics of MINOS: For exampleoperational characteristics of the analog weights,uniformity of components , short- term and day- to-daystabili ty and reproducibili ty of resul ts;

( :to) To perform programs for routine check-out and main-tenance of MINOS and of the system as a whole; and

To provide calculations, bookkeeping, summaries, anddiagnostic outputs aiding the experimenter in under-standing MINOS' s operation and utilizing all of theabove expanded capabili ties.

(11 )

B. The Comparison of Various ComputersThe expanded capabili ties on the foregoing list clearly point to

exploratory investigations in which close interaction between the ex-

perimenter and the system is a necessity. (At the same time , the system

must have the speed to process large volumes of itera ti ve da ta in the

basic training mode , which cons ti tutes the main share of MINOS' s opera tton.

Since the computer is the experimenter s "window to tbe system " it is

vi tal for exploratory operation that the computer be fully accessible forobservation and control of the system , as well as fast and powerful enough

to perform the tasks required of it.The Insti tute ' s Burroughs B-5000 computer was an obvious early candi-

date , because it was a large- scale computer; it was installed and time on

it was available on a time- shared basis. As we gathered detailed data on

the proposed interface wi th the B-5000 , however , several facts becameapparent. Attachment of on-line equipment to the B-5000 would requiremodifications to the B-5000 and its control program. New input/ outputhardware would have to be engineered and cons tructed , and new programming

created , wi th grave doubts as to whether such a changed system could bemade truly operational wi thin a year. Even assuming the sys tern performed

to specifications, we would find ourselves operating on a physically re-mote compute sharing it wi th others, and thus unable to control or to

examine its precise operation. We would , in fact , be depending on a typeof system time- sharing which is currently in the research and development

stage throughout the country. While such a system may ul timately be aneconomic boon to ourselves and similar investigators, the fact that it

awai ts a sizable development program removed the B-5000 from our list

candida tes .

The al terna ti ve to sharing a large computer is to obtain the use ofa smaller one. We surveyed the field of small , scientific computersspecifically, binary, solid- state , domestic machines), and after a de-

tailed evalua tion of the machines that approxima ted to our requirements

evalua tion:

the SDS 910 machine was selected. The following cri teria were used in

( 1 )

( 2 )

Capaci ty, speed of elemental operations , etc.

Features , e. , typewriter , paper-tape equipment , IBMcompatible tape uni ts, etc.

(3 ) Service facilities--maintenance , manuals , instructionin programming and operation.

Reputa tion as given by local users.( 4)

(5 )

(6 )

Ease of programming, repertoire of elemental instructions.Cos t , nature of lease contracts.

Since the machine will be used by relatively inexpert programmers, thecost of programming time will be a substantial i tern , and this i tern wasaccordingly gi ven speci al considera tion.

We have ordered the lease of an SDS 910 computer wi th 4096 words of

memory, paper- tape reader and punch , and typewri ter , wi th options on a

magnetic tape uni t , interrupt facili ty, increase of memory to 8192 wordsand an off-line paper-tape preparation uni

C. The Interface Between MINOS II and the SDS 910In operating MINOS II under the control of the SDS 910 computer

the following sequence of events wi II be typical:

( 1) The computer will obtain a pattern from magnetic orpaper tape or from attached hardware , and ready thepattern for presentation to MINOS.

The pattern will be presented to MINOS. Since thepattern must be presented continuously during MINOS'operating cycle , an input register capable of storing102 binary or ternary digi ts is required.

(2 )

(3 ) Sixty- six analog sums will be formed by the magneticanalog weights and the TLU circui try. These analogvalues will be converted to digi tal representationsand read back into the computer.

( 4) The computer will perform a pattern classifica tionalgori thm currently embodied in MINOS II , for examplethe compu ter would quantize the " analog sums" to binaryvalues , add the values in groups of seven , and quantizethe results to give a nine-bit output.

If some of the outputs generated do not match the de-sired outputs, the computer performs a programmed adapta-tion algori thm , genera ting 66-bi t vectors of posi ti ve andnega ti ve adapta tion required for each TLU.

( 5 )

( 6 ) The adapt vectors are read into an adapt register.Since there exists a "Lie Detector" flip-flop as-socia ted wi th each TLU, these lie detectors are tobe used to hold the two adapt vectors , first posi ti vethen nega ti ve.By sending signals which control the Level Shiftersand the Adapt Current pulses in proper sequences wi relation to the loading of the positive and negativeadapt vectors , the computer causes adaptation of themagnetic weights in the TLU'

(7 )

We have begun interface design in the four areas corresponding to

steps 2 , 3 , 6 , and 7 above. Figure 1 shows a block diagram of the exist-ing MINOS II configuration , and Figure 2 indicates the four interfaces

required between MINOS and the SDS 910 computer. Attention is being

given to such factors as retaining the abili ty to operate MINOS on-linewi thout the computer , and means of coupling typical binary data sourcesto a ternary or pseudo- ternary (double binary) input buffer. A logicalscheme has been devised for performing adapta tion wi thout the existing

ANALOG WEIGHTS TLU OR " DACTL ( It 66)(102 It 66)

DATA FLOW

ADAPT --AT

PREPROCESSED

---

DATAOUTPUTS

(TRAINING)

PATTERN BITS DESIRED

(It 102)QUORUM OUTPUTS

(It 9)

---

L_-TIMING AND CONTROL

FIG. 1 BLOCK DIAGRAM OF EXISTING MINOS II CONFIGURATION

quorum circui try, by loading the Lie Detector flip-flops twice. Thisscheme requires addi tional computer control of the two level Shiftersand the two Adapt Current pulsers only.

MINOS n

WEIGHTMATRIX

1-----

---

PATTERN BIT(x 102)

-- -

TLU(x66)

DIFFERENTIAL f- MULTIPLEXERAMPLIFIERS? 66: I

ANALOG SUMAID

CONVERTER

LIEDETECTOR -

( FF)

( QUORUM

INOPERATIVE)

CONTROL AND TIMING(ADAPT PULSES AND MISC.

102-digit BINARYOR TERNARYBUFFER

PATTERNS

PATTERNS ANDDESIRED OUTPUTS

CONTROL

SDS 910COMPUTER

ADAPT VECTORS66 - BIT

TLU OUTPUTS

( 66 I IN TIME SEQUENCE)

RESULTS

FIG. DIAGRAM SHOWING FOUR INTERFACES BETWEEN MINOS II AND THE SDS 910

III SOME CONSIDERATIONS AFFBCTINGTHE EFFICIENT USE OF MINOS

A. Introduction

Now that we have acquired a Ii ttle experience in operating MINOS on problems that make use of a significant fraction of its storage capaci ty,it is possible to give a few guide-lines on some considerations that lead

to efficient operation. The following remarks refer to the learning ma-chine section of MINOS II only, since preprocessing is essentially an in-dependent problem. MINOS II has been fitted with an EECO 160-bit paper-tape block reader , which provides the 100-bi t input code word for the

learning machine , the 9-bi t output code for use when the machine is being

trained , plus extra bits for control functions, pattern number , etc. The

tape- reader reads 20 eight-bi t characters simultaneously, and the patchpanel will permit an arbitrary re- assignment of the 160 bits. It has beenour experience that a significant number of drop-outs occur (pins not

falling through the holes in the tape), and as a consequence doubling up

on the pins indica ting the 9-bi t output code is very desirable. One of

our standard formats for bi t allocation is shown in Figure 3.

B. Output CodingMINOS II has a 9-bit output code , permi tting the assignment of

512 categories as an upper limi t . In the maj ori t y of applica tions amuch smaller number Qf categories wi II be required , and for this reason

provision has been made for patching up al terna ti ve allocations of the66 voters. This is a rather tedious process, since not only must the

votes be re pa tched , but also the carrier ramps and increment and decre-

ment instructions. For many problems the use of error correcting codes

over the whole of the 9 output bi ts is preferable. For example , a 9-bi

Hamming code will gi ve 32 code words each 3 bi ts apart , and a Golay codewill give 38 code words each 3 bi ts apart , thus permi tting the correction

of single bit errors.

PinNos.

FWD.TAPE

TRAVEl,

112

128

BLOCKREADEROUTPUT OFCDCI60-A

/ROW

102 100

c B

104

120

136

144

152

160

SPROCKETS

BITS I TO 100 (or 102)ARE PATTERN

BIT II III ALLOWS

TRAINING TOOCCUR. (IF BLANK , READ ONLY)

104 - 112 ARE QUORUMS.OUTPUT MAY BE EXPRESSEDAS AN OCTAL NUMBER:

~~~

Q7 Q6 Q5,Q4

PATTERN NUMBER A 6-BIT-MAXIMUMBCD NUMBER , ABCDEIF LESS THAN 6 BITS,RIGHT -ADJUST , ego DEF.

MEANS UNASSIGNEDLEAVE BLANK.

FIG. 3 ONE STANDARD FORMAT FOR MINOS II DATAON 160-HOLE PUNCHED PAPER TAPE

C. Input CodingThe input code word to MINOS II is 100 bits long, and it is desirable

that an error in any one of the bi ts should cause exactly the same amountof damage whenever it is located in the code word. It is perhaps alsoworth bearing in mind that al though the bi ts are laid out in a 10 x 10array on the control panel , or are wri tten down in a line , the separa tionbetween any pair of bi ts is the same, From the point of view of themachine , since all of the input bi ts are independent , they are mutually

equidistant in the n- space representation.

In many problems the raw data can be subdi vided into a number ofindependent parameters. When this condi tion obtains, the 100-bi t inputword may be subdivided into lengths proportional to the relative sig-nificance of the various parameters to the assignments that have to be

made. Qui te frequently these parameters representing analog quanti tiesare coded wi th an accuracy that is out of proportion. Thi s should guarded against , since some performance may be lost if the machine isasked to make a distinction where a significant difference does not exist.

How should analog quanti ties be treated so that they are presented toMINOS I I in the most useful form? We have already indicated that the numberof bits, n , allocated to a given parameter should be based on its relative

importance. The range of the parameter should now be quantized into N

regions of equal significance , where this number of regions has been whi

tIed down so that any distinction made is meaningful. The problem has nowbeen transformed in to finding N 11 good" code words of length E bi ts The

most desirable property of the code words may be described as follows:When the code words are allocated to the analog regions from an ordered

list , code words that are adjacent on the list differ by very few bitsbut code words far apart on the list are widely different. If there are

N code words , this imposes N(N - 1)/2 constraints. Ideally we wish ad-j acent code words to differ by one bi t , code words one space removed bytwo bi ts and so on as far as possible; usually it is not possible to followthis rule to the limi t and it becomes necessary to impose a less stringent

condi tion of the form that for words more than three spaces removed , the

difference between code words is at least 4 bi ts.

We are indebted to R. C. Singleton of the Mathematical Sciences

Department for the development of the higher order "Snake-in-the-Box

codes, 1 2 * which have the proximi ty characteristics described aboveand for the following example.

Suppose we have a parameter whose range may be subdivided into 20

meaningful increments , not necessari ly equal , and tha t we have alloca ted

to it 9 bi ts out of the 100 bi ts of the input code word for MINOS II.It is possible to generate a distance 5 snake-in-the-box code giving

24 code words of length 9 bi ts, but since this code is toroidally-

connected , (the 24th word is only one bi t different from the first

word), we drop off the last 4 words from the list. This example isshown in detail in Table

I t wi of course , be appreciated that occasions arise when this

same type of coding is useful for an analog output from MINOS II , as for

. example , when the learning machine is being used to predict wha t the

barometric pressure will be in three hours time.

References are listed at the end of this report.

Table I

DISTANCE 5 SNAKE- I N- THE- BOX COD E

N = 24 , n = 9

Transl. l.onNumbers

Code WordNumber

Do not use last fourcode words, since thecode is toroidally-connected.

IV TESTING MINOS I I BY THE AUTOMATICSOLUTION" OF BOOLEAN FUNCTIONS

A. The Parity Functions, and the Reasons for Their SelectionIn order to develop a routine test procedure for checking the

magnetic- adapti ve , or ca tegorizer section of MINOS II prior to running

useful problems , a number of artificial test problems were devised.

These artificial problems were punched onto standard one inch oiled

paper tape that might be read by our 160-bi t block reader. When oper-ating a large and complex machine such as MINOS II, it is essential to

check whether the machine is opera ting correctly before running importantproblems that may be time- consuming. The purpose of these standard testproblems is therefore to allow fairly rapid and thorough checking of themachine in such a manner as to use as much of the system as possible , so

tha t if any part is faul ty, convergence will not be obtained.

The pari ty functions are of particular interest in this connection

because they possess two important properties. The first property is

tha t it requires a t leas t n threshold logic uni ts to provide a solu tionfor an n-dimensional case. Figure 4 shows a three-dimensional pari tyfunction and truth table. Table II shows the truth table for two-dimensional examples and the rela tionship of these pari ty functions

6 and f9 to other important functions. Since MINOS II has 66 thresholdlogic uni ts and 9 quorum outputs, these can conveniently be arranged in

nine groups of seven threshold logic uni ts each. (The three spare thres-hold logic uni ts are not tes ted by thi s procedure). We may then treateach of the outputs independently, or require them all to perform thesame problem. Since there are seven threshold logic uni ts in each group,the seven-dimensional pari ty function is the most complex that the machinecan theoretically be expected to handle.

The second useful property of the pari ty function is that it is theonly function for which it is guaranteed that if a one-bi t error occurs

in any one of the input variables , then the output will be in error. Thiscan be seen by referring to Figure 4 or Table I I . From Figure 4 , if any

INPUT VARIABLES OUTPUT

III

"" .. .. ..: - - '

f -

- ; " --

I ,

.._

I -

'' ;; :: ;; :: -; - , , .. ' .- - ,. " "' .,

001

.. , :: -.. - - .. '

101 ,

' .. .. -

.. 0-:

- - .. .. .... -.. -- -.. --.. -.. -

1\ 1

.. -

1\ 0

FIG. 4 DIAGRAM SHOWING THE THREE-DIMENSIONAL PARITY FUNCTION

010

000

Table I I

NAMES AN RELATIONSHIPS OF BOOLEAN SWITCHING FUNCTIONSTWO

INPUTS16 POSSIBLE OUTPUT FUNCTIONS

(/

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(/

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rz rz j:8 0 H .-H 0 H 0

rz 0rz HH U (/ U

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When the odd pari ty function is added to the original variables , it producesa three-bi t word whose over- all pari ty is even. This is commonly called aneven pari ty check , and conversely.

vertex is chosen as a starting point , then moving one uni t distance along

any of the three possible edges of the cube (i. e., introducing a one-bi error) resul ts in arriving a t a vertex having the opposi te output value fromthe output value at the starting point. From Table II , choosing any row in

the tru th table , and reversing any one of the input variables resul ts in anew row , which has an output value opposi te to that of the original row.

Al though the successful running of the pari ty problem on the machineensures that each of the threshold logic uni ts is functioning, it does notguarantee that each input line is functioning correctly, since we have

204 inputs in the machine , whereas the function used for testing purposes

has only seven inputs. The inputs have been connected to operate in a

richly redundant connection mode so that fai ures of several inputs could

be masked by successful operation of other inputs in the same group.

only seven inputs were used at a time , each pair of input lines could be

separa te ly tes ted , bu t the tes ting time would be abou t 102/7 15 times

longer. This problem of exercising every one of the inputs in a sui tableand efficient check-out procedure has not yet been solved , but a specific

problem is known tha t has only a small " solu tion region" for a singlethreshold logic uni t wi th 16 inputs , and this will shortly be run on the

machine to check out each of the individual threshold logic uni ts morethoroughl y

B. Experimental Resul

Figure 5 shows a typical training curve for one of the nine outputs

in performing the fi ve-bi t pari ty function wi th seven threshold logic uni connected. Since there are 32 possible input patterns , one would expectapproxima tely 16 errors starting from a random posi tion wi th zeroed weights.

This was found in practice. The curve in Figure 5 illustrates that ini-tially the number of errors rose to a maximum of 23 in the fourth i tera tionand then reduced eventually to zero errors af ter the 16 th i tera tion. The

curve in Figure 6 shows the total errors for all nine outputs and that

convergence of all nine sections of the machine was obtained after 21 i tera-tions. The actual running time of an experiment such as tha t representedby Figure 6 is approximately 12 minutes.

24 4

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NUMBER OF ITERATIONS -

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iTRAINING CURVE FOR

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\FROM ZEROED WEIGHTS

\5 BIT PARITY PROBLEM

i i I

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I iTHIS CURVE ILLUSTRATES THE EXPERIMENTALLY

\OBSERVED EFFECTS OF ERRORS

OC

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\AFTER "CONVERGENCE"

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2428

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16 20

NUMBER OF ITERATIONS -

4

FIG. 7 TRAINING CURVE SHOWING SUCCESSIVE CONVERGENCES

Convergence appeared to be more rapid for the cases in which the

reversing facility of the tape reader was used to break up the strictly

sequential pattern presentation of continuously forward reading. In some

cases of trap states, reversing the tape reader was sufficient to allow

convergence.

While experimental results obtained from the machine indicate that

threshold logic unit groups of seven voters functioning in a simple ma-

jori ty output decision can automatically achieve a solution of the seven-dimension parity function, it cannot be guaranteed that the machine will

always perform perfectly, since the method of zeroing the weights is

somewha t arbi trary . However, these particular tests are sufficiently

exacting that they provide us with a means of checking a large part of

the system prior to performing more practical and useful problems.

22

CONCLUSIONS

The SDS 910 has been chosen for attachment to MINOS I I. I t was

selected from among several digi tal computers of appropriate size and

specification on the basis of its over- all sui tabili ty and because of

its straightforward programming.

Some guidance has been given regarding input and output coding

for MINOS II , since these factors have been found to be of importance

to efficient opera tion.

The pari ty functions in three , five and seven dimensions form

convenient tests for checking the correct functioning of MINOS II.

PROGRAM FOR THE PERIOD 1 APRIL 1964 TO 30 JUNE 1964

The interface hardware for the attachment of the SDS 910 to MINOS

will be assembled from modules, and special i terns constructed in readinessfor the deli very of the SDS 910 , scheduled for July 1. Testing of the1000-image preprocessor and consideration of the methods by which it may

be used wi th the SDS 910 , will be continued.

REFERENCES

1. W. H. Kautz

, "

Uni t Distance Error-Checking Codes IRE Transon Electronic Computers, EC-7 , p. 179 (June 1958).

2. R. C. Singleton

, "

Generalized Snake-in-the-Box Codes " TechnicalNote No. , Stanford Research Institute , Project 4517 (March 1964).

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