Pergamon PII: SOO38-092X (96)00095-3

Solar Energy Vol. 59, Nos. l-3, pp. 101&110,1997 0 1997 Elsevier Science Ltd

Printed in Great Britain. All rights reserved 0038-092X/97 $17.00+0.00

TRENDS IN INDUSTRIAL SILICON SOLAR CELL PROCESSES

M. GHANNAM,* S. SIVOTHTHAMAN,** J. POORTMANS,** J. SZLUFCIK,** J. NIJS,** R. MERTENS,** and R. VAN OVERSTRAETEN**

*Kuwait University, ECE Dept., College of Engineering & Petroleum, Safat 13060, P.O. Box 5969, Kuwait and **IMEC, Kapeldreef 75,300l Leuven, Belgium

(Communicated by Gerard Wrixon)

Abstract-The performance and technology of industrial silicon solar cells have improved considerably in recent years. Conversion efficiencies exceeding 18% are reproducibly obtained by cost-effective technol- ogies on large area Cz-silicon. The performance of multicrystalline silicon cells is closing-in at 17.2%. Improved material casting techniques, a refined technology, and efficient in-process material improvement techniques are found to be the major causes behind such advancement. The trend towards thinner sub- strates leads to considerable material cost reduction while yielding better performance. The major process- ing technologies and steps are critically discussed in this article, keeping in mind the priorities of today’s PV industry: cost, and environmental issues. The future trends of the technology are outlined. 0 1997 Elsevier Science Ltd. All rights reserved.

1. INTRODUCTION

Improving the performance of the solar cell, reducing the production cost and minimizing the impact of the large production volume on the environment are the three major orienta- tions of future photovoltaic energy development.

Today, manufacturing of silicon solar cells aimed at terrestrial applications follows two main streams. The first concerns the widely established technology of silicon solar cells for operation at one sun which dominates the market. However, a second stream is emerging because of the great progress achieved recently in the concentrator array technology; processes for producing low cost solar cells for concentra- tor arrays are being optimized (Mason et al., 1995).

In the present article we deal with the one sun solar cell manufacturing. In general, the key parameter for improving the performance of the solar cell is to increase its conversion efficiency. The balance of system (BOS) analysis shows that even with a larger price, high power mod- ules using high efficiency cells lead to a decrease in the price of photovoltaic systems, especially in cities and agglomerations. Further, silicon consumption is reduced in high power modules. Silicon consumption becomes a critical issue when the production volume approaches the Giga Watt range. A relatively large difference exists between the conversion efficiency of labo- ratory solar cells and of industrial cells. A laboratory cell is usually a small cell (l-4 cm2) fabricated in a clean environment following a

process in which the cost is irrelevant. Expensive material such as Float Zone silicon and high- tech equipment such as lithography and vacuum systems are allowed to be used. In contrast, an industrial cell is large (100 cm2 or more), fabri- cated in a production environment following a high throughput high yield process with cheap materials and simple equipment. These differ- ences explain the existing gap between the effi- ciency of laboratory and industrial cells.

In order to reduce the production cost, the material cost should be minimized which means either using low cost material or a reduced amount of expensive material. The process should have a high yield throughout which means with a reduced number of operations and reduced duration for each operation (typi- cally less than 2 s). A high yield is ensured by minimizing the sensitivity of the cell parameters to parameter fluctuations. Reducing the costs also requires a minimum thermal budget for the whole process. Finally, the process should result in minimum chemical waste products.

In this article, following a brief discussion concerning the cost issue, the baseline industrial process for manufacturing silicon solar cells aimed for one sun terrestrial applications is described in detail, and the trends in the different processing steps are discussed.

2. COST ISSUE

It is well understood that the bottom line for the large volume diffusion of a product fulfilling well predetermined specifications is its price.

101

102 hf. Ghannam el al.

Therefore, because of its relatively high cost, it is logical not to see photovoltaic energy aggres- sively competing with ~o~~e~t~o~a~ energy sources except in sorne special off-grid appli- cations. The photovoltaic market, however, increases steadily by L5-20% every year. With such a continuous increase, it is believed that the ~r~~~ctio~ cost of photovoltaic systems will go significantly down in the near future; a larger contribution of ~~~tov~~~a~~ energy in the energy market is therefore expected.

In a study reported in 1993 ( rtens et al., 1993), the average production c for crystal- line silicon photovoltaic modules in 1992 was estimated at 4.0 US d~~lars~~~a~ Watt (Wp) for modukes involving 100 cm2 cell ith an average conversion efficiency of 63%. projection for the year 2000 estimated this cost to be reduced to 2.4 US dollars/Wp for modules involving 225 cm2 cells with an average conversion effi- ciency of 16%. In such cost estimation the share of the silicon feedstock is estimated at 9%, the share of silicon crystal growth at B8%, the share of silicon wafer@ at IS%, the share of solar cell manufacturing at 25% and of module fabrication at 50%. identical for the year 1992 rea the year 2000 projected values assuming similar material usage.

Using recent data, it is possible to show that for a large production volume, today typically 1.5-2 ~~~~jyear, the cost of single crystalline (Czochrafski) silicon ~~otovoltai~ modules amounts to 3.6 US do~~ars/W~. For such pro- duction volume, the cell manufacturing share is reduced to 15% and the module fabrication share to 24% with the share of the sliced single crystalline Cz wafer representing 50%. For even

r production volumes, for instance in a 500 ear scenario, the cost would drop to 1.2

“ars/Wp for rn~~~ti~rysta~~ine silicon mod- h the cell man~fa~t~ri~g share dropping

to II%, the silicon material share being 54% and the module fabrication share 35% of the total cost. For the the cost of high e crystalline silicon would be approximately 1.6 US doli;mrs/Wp. For such a case the cell manu- facturing cost would even decrease below 10%.

In conclusion, thou h the numbers mentioned above seem to indicate that the contribution of the cell rna~ufact~r~~~ in the total cost of photo- voitaic system is e~~~i~~~~s~y decreasing, one should understand that this result is because of the tr~rn~~do~s progress that has occurred and

~~~t~n~es to occur in the eve~o~me~t of this technology. Low cost processes with t~ro~~~~~t and high yield leading to hig ciency cells are the marn reason for the decrease

otovoltaic energy wit- eheved that more cost

caency rises are still pos-

iaboratories.

The processing steps of a baseline bndustl-ial process for ~rod~~~i~g m~~t~~rystalli~e silicon solar cells with efhciencies 13315% and the trends in each step are listed in Table 1 ( s et al., 1992). The existing processes rnai P in the way of contacting the front side. Two techniques are currently used for front electrode formation: (I) s~reen-~r~~ti~~~ and (2) buried contacts.

~~ree~~print~ng is used also for other steps of the basehne process such as the Junction tion, backside metal~izatiQ~, and anti-se coating. This technique consists of printing a paste on the wafer surface through fine openings in a screen made by intersecting horizontal and vertical stairdess steel wires A ~~ree~-~r~~ter and a. squeegee are use process as shown in Fig dried and fired in a conveyor belt furnace which ensures continuous feedi of wafers.

The advantages and awbacks of screen-

Table 1. Baseline ior siiicon solsr cell process and the trends for each step

Baseline process q= 13%16%

MultiX-Si substrates

Etching

Cettering

Junction

-S-F (optional) ack elecfrode

Front ekctrode

ARC

H passivation

Trends

Higher z Large, thin

Texturing

P, Al-high z

Surface passiwation Selective emitter RTP

Lower S&f

Lower coverage Lower R,

03 passivating oxide

ecover z Tight q distribution

Trends in industrial silicon solar cell processes 103

I Substrate I

Fig. 1. Schematic of screen-printing process.

printing and of buried contact techniques will be described in more detail later in the text. It has been proven that the ultimate efficiency of screen-printed cells and of buried contact cells is fundamentally comparable (Nijs et al., 1994). The 0.51% difference that exists today in favour of the buried contact cell has to do with the smaller front surface shadowing. The gap between both technologies is getting narrower with the development of more advanced fine line screen-printing of the front electrode.

A typical process sequence starts by etching multicrystalline silicon substrates to remove the sawing damage. The wafers are then cleaned and gettered by a heavy phosphorus diffusion. The gettering sites are removed by wet chemical etching and another P diffusion by screen- printing or by POCl, diffusion follows for the emitter front side junction formation. In some processes, the emitter junction formation and the gettering step are combined into an opti- mized single step. This is followed by the forma- tion of the back electrode by screen-printing an aluminium paste and alloying. In some pro- cesses a back surface field p+ layer is also formed during this step. The front electrode is formed by screen-printing the silver finger pattern or by laser grooving and electroplating the grooves with metal. As mentioned earlier, the latter technique results in buried contacts which helps in reducing thle front surface shad- owing without increasing the series resistance. As anti-reflection coating, usually titanium diox- ide Ti02 is deposited by CVD. In some pro- cesses, a final hydrogen pas,sivation treatment is included in order to improve or recover the carrier lifetime.

3.1. Multicrystalline silicon substrate In cost-effective industrial solar cell processes,

the cost of the starting silicon material repre- sents approximately one third of the total module cost. Solar cells used for terrestrial applications are fabricated mostly using cast multicrystalline silicon as well as Czochralski single crystalline silicon. Presently multicrystal-

line silicon is obtained by casting feedstock consisting of silicon head and tails supplied from the microelectronics industry. The casting procedure results in rectangular ingots weighing 60-150 kg. Recently, it has been forecast that Cz single crystalline silicon will remain a serious contender for the next few years (Herzer, 1991; Darkazalli et al., 1991). This is based on the fact that multicrystalline silicon is known to be electronically poor as a result of the large densi- ties of grain boundaries, dislocations and point defects inherent to the material. However, it is predicted that, in the long run, multicrystalline silicon ingots will yield lower costs because of their potentially higher production throughput, larger ingot sizes and lower investment cost. At the same time such a material is greatly improving with continuously developing crys- tallization processes resulting in larger grains, lower dislocation densities, lower concentrations of 0, C, and N, and lower stresses. In recent years, the electron diffusion length has increased from less than 60 pm to 150 pm with a scope for further improvement up to more than 200 pm. This enhancement in the diffusion length results from the joint optimization of the ingot formation process and of gettering schemes. Starting with the Silso material Wacker recently introduced a casting procedure with a better control on the crystallization process resulting in almost horizontal phase boundary and better homogeneity (Frank et al., 1994). The use of a silica crucible has been introduced in the Photowatt casting process for better control of the oxygen and carbon content. Optimization of the directional solidification technique leads to the improved Eurosil mate- rial produced by Eurosolare (Ferraza et al., 1994). Large grain Baysix material from Bayer has been developed (Koch et al., 1994) using crystallization of high-purity multicrystalline sil- icon with a planar solidification front. Recently, cold crucible electromagnetic casting (EMC) has been introduced by Sumitomo Sitix Co. in Japan (Kaneko et al., 1992). In this process the absence of direct contact between the melt and the walls of the crucible leads to a low impurity content, especially oxygen. The cost of this material is highly reduced because of its high throughput, the absence of crucible and simplic- ity of the casting furnace.

3.2. Wafering Multicrystalline silicon substrates 10 x 10 cm’

or larger and 200-350 pm thick are obtained

iO4 M. Ghannam et ai

from the ingot by wire sawing (Mitchell et al., 1992). A large amount of silicon is lost during the slicing as a result of Kerf loss. Special technique5 such as the Fixed Abrasive Slicing Technique (FAST) (Sopori et &EL, 1991) have been and are being develope Serf loss and allow an im saving. Further, because of the success of multiple wire slicing ser, 1989) virgin wafers with a thickness o pm corresponding to a f3.A cell thickness of 180 earn or less are now achievable. In such thin cells not only is silicon consumption considerably reduced but also higher cell efficiencies are expected when combined with optimum Sight trapping and effective surface passivation (Tiedje et al., 1984). St is worth mentioning that a.5 the material quality is improved attention should be paid to the cleaning step after sawmg in order to avoid contamination of the subslrate at the start of the cell m~nnfact~r~~g process.

Although the standard ~~lt~crystalline sub- strate is 10 x 10 cm’> there is a clear trend to larger size cells. Ef3cient cells I2 x 12 cm* and huger been reported (Shirasawa et d., 199.3; n et al’., 1992). The driving force loWar rger cell sizes results from the fact that the cell u~a~~~~~~~~~~ a the module assembling costs shoai Eittle a dependence and that therefore the cost/R&t ratio decreases With an increasing cell size. However, the opti- mum cell size is Pimited by electrical series resistance and by handling Bimitations which limit the largest cell size to 20 x 20 cm2.

igh bulk recombi~~~~o~ in cells with short iffusion length lead5 to a large dark current, ence a low open circuit voltage, and prevents

collection of a large portion of the carrier5 ~~~tog~~e~a~e~ deep in the bulk and near the back surface, hence a low short circuit current. Therefore, besides developing improved mate- rial casting proces5esB, research aiming at the optimization of getter& and passivation tech- niques, such as phosphorus and aluminium get-

ing. It has been found that a post casting phosphorus treatment con- sisting of forming a heavily doped surface layer prior to the cell recessing can increase the ~iff~s~or~ length in multicrystalline silicon substrates (Narayanam et al., 1986, Martinuzzi e& al., 19g8). This la:yer acts as a sink for impurities. An optimum temperature for such

treaiment lying around

trates with initial diffusion lengths exceeding 100 pm do not improve s~bst~~~~~~l~ by phosphorus gettering. Finally, it has also been reported that the e~ec~~ve~~ess of phos-

horus ~etter~~~ is material d rtinuzzi et al., 1988). Altho and energy co~s~~i~~~~ it is

to be included in the ~u~t~~~ysta~~i~e sihcon ceBt ss. As rne~t~o~~~ above, in some processes, imng the P lettering step and the emitter on formation step inla, a smgie optimized

step is found successful.

3.32. ~~~~~~~~~ gettm&-. It has been reported that ~~~~~ni~~~ gettering improve5 the

ihsion length i ~~iti~~~s~~~~i~~ silicon

(Lolgea e& d., 19”32;

treatment is achiev

sihcon surface at a relatively high ~e~~era~~re~ A typical A? getter- ing t~~at~~~~ consists of 5,~~~~~~~r~~ti~~ an alu-

~i~i~~ paste at the backside and firing in an

infra-red heated furnace at 800°C. This is fol- lowed by etching the aluminium layer and annealing in a nitrogen atmosphere. This step results in an im enl of more lhan 0.5% in the absolute e cy of single crystailine Gz

Finally, it has been proven that the beneficia? ts of separate gettering treatment5 are tive as d~~~~st~ate~ for ~bos~hor~s and

al~~i~~T~~ gettering treatment5 ~erf~~~~~ s~bseq~~~tly ~~a~~i~~~~i et ad.: 1988).

3.4. Sts$Xe iexturiPzg

Surface texturing reduce5 the tion from the single crystalline silic

less than 10% by allowing the resected ray to

be recoupled into the cell, as depicted in Fig. 2. ed by a~~sotro~~c solutions res~~~in~

in randomly distributed upside dow as shown in Fig. 3. Such an etch, efficient in texturing ( 100) oriented surface5 only and hence is less elKcient for m~~ticrystall~~e

Fig. 2. Recoupiing of reflected ray on a textured surface.

Trends in industrial silicon solar cell processes 105

Fig. 3. SEM microphotograph of a randomly textured surface.

silicon caused by the presence of multiple crys- tallographic grain orientations. Further, because of the high selectivity of anisotropic etching along specific directions, the planarity of the multicrystalline silicon wafer can be seriously affected during the etching.

Surface texturing can also be carried out by isotropic etching in an acid etchant usually composed of a diluted mixture of HF/HNO,. In this case the silicon surface is covered with a layer of SiOZ coated with a protective photo- resist layer which is patterned by photolithogra- phy. The oxide and underlying silicon can be etched from some areas and are protected in other areas. Pseudo-V-grooves could be realized by this etching procedure (Verlinden et al., 1992). This technique, however, is not cost- effective since it involves patterning by lithogra- phy. Nevertheless it would become applicable to the industrial process if the photoresist could be replaced by a cheap acid resistant paste and the photolithography replaced by fine line screen-printing.

Mechanical grooving using rotating bevelled blades with adjustable tip angles (Willeke and Fath, 1994) is a new appealing approach that leads to the formation of deep V grooves on the front surface. The surface reflectance decreases as the groove depth increases. With a groove depth of 65 urn, a uniform surface reflectance of less than 10% was measured over the range of wavelengths 4O(rlOOO nm. As the grooves became too deep, the metal fingers could be interrupted as a result of step coverage failure. Mechanical grooving was implemented in a low cost screenprinting solar cell manufacturing pro- cess and resulted in an absolute improvement of 2% in the solar cell efficiency compared to the randomly textured cell (Szlufcik et al., 1994).

Large area ( 11.4 x 11.4 cm’) buried contact cells with mechanically textured surfaces and effi- ciencies approaching 16% on multicrystalline silicon and 18% on Cz silicon (Narayanan et al., 1994) have been demonstrated. In contrast, an efficiency of 17.2%, the highest ever reported for 10 x 10 cm2 cells on multicrystalline Si cells, has been achieved with mechanical grooving and screen-printing metallization (Nakaya et al., 1993).

3.5. Junction formation

Detailed studies (King et al., 1990) of the emitter doping profile and surface conditions show that the optimum emitter diffusion should be relatively deep, moderately doped and have surface passivation. Therefore, the optimum conditions should be set for the emitter diffusion either by POCl, diffusion or by screen-printing and firing of a P-containing paste.

Surface passivation is ensured by a thin silicon dioxide layer grown thermally in dry oxygen on the emitter surface (King et al., 1990; Blakers and Green, 1986; Aberle et al., 1991). Such surface passivation is very effective especially with low emitter doping concentration and regu- larly leads to an enhancement of at least 1 mA/cm’ in the photogenerated current. The thickness of the passivating oxide layer lies in the range 6610 nm which is thin enough not to disturb the optical anti-reflection system and thick enough to ensure an effective surface pas- sivation. Also, the oxide thickness should be thin enough in case of screen-printing the front electrodes in order to allow the metal paste to penetrate through it during firing.

In order to obtain an acceptable contact resistance with the metal fingers the P surface concentration should be high. This is particu- larly true for screen-printed contacts. Therefore, the selective emitter structure sketched in Fig. 4 is an attractive solution. In such a structure, the emitter is heavily doped at the contact regions and only moderately doped in the active parts between the fingers. The selective emitter struc- ture is realized in a screen-printed cell by dry

pyramids

m n++

P

Fig. 4. Selective emitter structure.

106 M. Ghannam et ul

etching back the active emitter region between the fingers with the front metal grid being used as a mask against et the emitter contact areas (Wenham et aI., Another possibility

fint a polymeric protective paste over the silver pattern and to etch-back the active emitter part by wet etching. Application of this concept En the standard process adds 1% absolute to the ceEl efhciency (Szlufcik et al., 1991). In both dry and wet etching techniques, however, surface passivation could not be ensured.

The junction formation step represents a sig- nificant percentage of the thermal budget of the whole process. Lowering this thermal budget by adapting rapid thermal processing RTP (Sivoththaman et ak., 1994.; Doshi et al., 1994) to the industrial process wou!d be certainly beneficiai.

3.6. Back-szlrface-Jeld (BSF) and back electrode formation

a&side recombination is significant only in solar celis having a diKusion length comparable with the cell thickness. As the industrial trend in solar ceil manufacturing is towards producing higher quality material and thinner wafers, the role of backside recombination becomes more and more relevant in industrial cells.

In order to reduce backside recombination a pf /p high/low junction is usuahy incorporated at the backside as shown in Fig. 5 (sketch a) (Fossum, 8977; Del Alamo et al., 1981). This junction introduces a repelling field which results an a reduced effective recombination rate at the back surface. In the industrial process the p+ layer is doped with aluminium atoms diffus- ing into the silicon during aluminium alloying with silicon at the backside for gettering purposes (Lolgen et al., 1992).

Another method which proved to be very effective in backside passivation is to thermally grow a SiO, layer in a dry oxygen ambient, as depicted in Fig. I; (sketch b). In this case, most of the back surface is passivated with the oxide layer while the backside electrode, usually made

a&side metat Backside metal

(4 (b)

Fig. 5. Backside passivation: (a) high,/low p+ /p back surface field BSF. (b) back oxide passivation.

by screen-printing, represents less than 1% of the total back surface area. With a relativeiy good quality oxide, the recombination velocity at the p-type %/MI, interface can be very smah which leads to bigher open circuit voltages than

SF ceils (Wang et al., 1995; Ghannam et al., 1992). It is worth mentioning that with oxide passivation a grid-like back electrode is used. Such a backside metal struc- ture is very useful in reducing the mechanic+ stress caused by the thick aiumiinium layer, in avoiding the wafer iliarpage, in offering the possibility of hydrogen passivation through non-contacted areas and in allowing flexible i~~~erne~tatio~ of optical confinement schemes,

Bn order to achieve a high fib factor and a high photocurrent simultaneously, the front metal electrode should present a Iow series resistance and should have a low coverage. In order to meet these objectives. two major tech- niques are being developed: (I) laser grooved buried contact metallization developed at he University of New South Wales (Green et al’,, B 991 and (2) advanced screenprinting metalhzation.

The front side contacting processing step of the buried contact cell sketched in Fig. 6 starts by making grooves in oxide passivabed wafers (sometimes covered with &ride) by high speed Baser scribing or mechanical grooving This requires that the wafers should be relatively thick. A heavy P diffusion is then carried out which selectively increases the surface concen- tration in the grooves (future contact areas).

rea between the contacts is pro- diffusion by the oxide (and nitride)

layer. The grooves are then coated by electroless plating with a thin film of nickel and filied with copper by electroplating. The major advantage of this technology is the possibility of achieving very fine (down to 25 pm) and deep (up to 55 pm) metal strips. This relaxes the tradeoff imposed by the small shadowing and small

Fig. 5. Buried contact ceil

Trends in industrial silicon solar cell processes 107

series resistance requirements and limits the dependence of the cell efficiency on its size (Wenham et aE., 1993). Also, this method allows two emitter doping profiles to be formed in a straightforward self aligned process which ensures an independent optimization of the doping profile in the active emitter area. Moreover, the buried contact selective emitter cell is compatible with surface oxide passivation. The major drawback of this technology consists of the chemical waste, mainly water containing nickel and copper, which causes serious environ- mental problems especially when applied to a large production volume. This technology has been implemented in several production plants with a cell efficiency of 18% on Cz wafers (Narayanan et al., 1994; Mason et al., 1991).

Screen-printing of front side electrodes usu- ally results in metal fingers wider than 100 urn giving rise to high shading losses. Interruption of the metal line is the main problem encoun- tered with screen-printing very fine metal fin- gers. In order to avoid this problem, new types of screen and pastes as well as a tighter control on the production environments are needed. Using modern screens with reduced emulsion thickness (Fukui et al., 1991) continuous fingers 55 urn wide and 15 urn thick with a sheet resis- tance of 2.5-4 mQ/sq have been recently realized (Nijs et al., 1994). Direct pen-tip writing of the paste is a recent development which has led so far to a 75 urn wide finger (Shirasawa et al., 1994). The screen-printing technology has the advantage of having a high throughput, being easily automated, and dry with negligible waste. The major drawback of the screen-printing front contacting is the low height to width ratio of the metal fingers leading to a large shading and relatively high series resistance. One way to solve this problem is to use grooves perpendicu- lar to the fingers as sketched in Fig. 7 (Yagi et al., 1989). Consequently, the emitter contact area is increased and less fingers can be used. A second possibility is to use conductive anti- reflection coatings. Another drawback of the screen-printing front electrode technology is the high cost of the silver paste especially when

Fig. 7. Screen-printed contact in a grooved surface cell.

printing thick fingers. Further, high temperature firing increases the thermal budget of the whole process. Recently, ink jet printing has been demonstrated using silver linoleate which allows low temperature firing (Gheorghe et al., 1994). Finally, screen-printing front contacting is not compatible with oxide front surface passivation of selective emitter cells. Nevertheless some methodologies are being engineered in order to resolve this drawback.

3.8. Anti-re$ection coatings

Although anti-reflection coating deposited for minimizing optical reflection can also be screen- printed, industrial silicon solar cell process today widely uses TiO, or TiO,/SnO, (Tanaka et al., 1990) anti-reflection coating deposited by atmospheric pressure chemical vapour depos- ition (APCVD) in a conveyor belt furnace. This method ensures a good thickness uniformity particularly difficult to achieve by other meth- ods on textured surfaces. Despite the fact that silicon nitride (S&NJ deposited by plasma enhanced chemical vapour deposition (PECVD) can only be processed in a batch sequence, large volume tube reactors are now available which render this process cost-effective (Nijs et al., 1994). As will be discussed later, passivation of the cell by atomic hydrogen is an important advantage associated with PECVD Si3N4 anti- reflection coating. It was found (Fukui et al., 1993) that a thin thermal oxide together with a PECVD silicon nitride anti-reflection coating is an outstanding passivation and ARC combination.

The presence of a thin passivating oxide layer should be taken into consideration when opti- mizing the thickness of the ARC layer. Double anti-reflection coating is not justifiable in indu- strial cells with good texturing especially after encapsulation. As mentioned in the previous section conductive anti-reflection coating such as metal oxides (e.g. ZnO and ITO) is a good alternative for optimally textured screen-printed cells suffering from high series resistance.

3.9. Hydrogen passivation

It has been proven that passivation by atomic hydrogen is very effective in improving the performance of multicrystalline silicon solar cells (Sopori et al., 1991; Ghannam et al., 1993) especially in material which contains a smaller amount of oxygen (Sopori et al., 1992; Elgamel et al., 1994). Atomic hydrogen can be introduced in multicrystalline silicon by glow discharge

PO8 M. Ghannam et al

(plasma), during plasma enhanced silicon nitride deposition (PECVD) or by ion implantation.

hydrogen passivatiorr treatments be improvement of the material qual-

ity, they have to be performed on the finished cell. The reason is that hydrogen atoms evolve out of the wafer when heated up above 400°C which rules out the possibility of carrying out subseq processing steps at a higher temper- ature. rogen passivation can be applied to the front side as well as to the backside. Front side hydrogen passi is very critical when the front side is pass with a silicon dioxide Bayer (Coppye et al., ) and care should be taken in order to avoid dam the passivat- ing oxide layer. FOR this pur the power of the plasma should be optimized when hydrogen- ating by glow discharge, while a beat treatment should follow hydrogen impHantation in order to recover the quality of the Si/SiO, interface (Yagi et al., 1989). The recovery of the interface quality and bulk lifetime by hydrogen passiv- ation makes tbis treatment beneficial even if the starting diffusion length is longer than the wafer thickness. Moreover, hydrogen passivation results in a narrower efficiency distribution in production. Finally, it is worth mentioning that the s#eparate benefits of ospborus getter- ing and of subsequent h] ogen passivation are found to be additi ( Perichaud and ~a~tin~~z~i, 199 1).

ECEXT RESULTS AND CONCLIJSIONS

~re~e~t~y the conversion efficiency of 100 cm2 industrial multicrystalline silicon solar cells in production is approximately 16% with a maxi- mum of 17.2% realized using mechanical groov- ing and a screen-printed front electrode (Nakaya et al., 1993). However, an efficiency of 18% is

for production Cz single crystalline ellls fabricated using screen-printing

(Fukui et al., 1993) as well as buried contact technologies (Mason et aI., 1991; Wenham et al., 1993). An efficiency up to 18.8% for 100 cm2 Cz silicon cePls has been reached in the laboratory

ruton et al., 1992). For large area (225 cm2) multicrystalline silicon solar cells an efficiency of 16.7% has been recently demonstrated (Sb~rasa~a et al., 1993).

Apart from the economical requirements stated in the introduction, the strategy for future research in industrial silicon solar cell technol- ogy concentrates on fabricating large cells, and cells on thin base silicon such as thin wafers,

thin silicon films on cheap substrates ( et a!., 1993) and econo Ily produced si!icon ribbons (bales 1990). sumptiom is the strai the thin silicon base ~11s.

esides tbe research related to improving the eficiency of a ~~~ve~~i~~a~ pn jianction solar cell, research is going on into inventing a novel structure better suited for c eap materials. Im this respect, the rn~lti~j~~et~o~ cell with deep grooving and wall doping has been recently

uk et ai., 1994) with a high ed for lower qualilji multicrys-

taBline silicon.

Aberie A., Glunz S., Warta W., Kopp S. and Knobioch Z. (1991) SiO, passivated high emciency silicon solar celis: process dependence of Si-Si02 interface recombination, Proc. 10th European Commsnity Phoeovoltaic Energy Con& 8-12 April, Lisbon, Portugal. Kluwer, Dordrecht, pp. 631-635.

Ba;nett A., Collins S., Bottenberg W., Hall R., Kendall C., Checchi J., Lampo S., Bloothoofd vii., Ford D.. Wand 3. and Kendall A. (1993) Large area silicon film solar ceils for power applications. Proc. 7th In?. Photovoltaic Sci. Eng. Con5 fPK§EC-7). 22-26 November, Nagoya, Japan, pp. 245-246.

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Bruton T., Mason N. and Summers 9. (1992) Towards pro- duction of high efSciency terrestrial solar cells. In Proc. 6th Int. Photoooltaic Sci. Eng. CozJ (PVSEC-6j, IO--l4 February, New Delhi, India, Das and Singh (E&s!, pp. 21-24.

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