thiết kế hệ thống nhúng,dhbkhn

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Introduction to uCOS-II V2.6 CuuDuongThanCong.com https://fb.com/tailieudientucntt cuu duong than cong . com

Transcript of thiết kế hệ thống nhúng,dhbkhn

Introduction to uCOS-II V2.6

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

About SwiftACT

• A Technology services startup companyo Under establishment

• Areas of specialties:o Mobile telecommunication services developmento Embedded systems development

• Types of services:o Consultationo Managed serviceso Sourcingo Training

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

About Me

• Graduated 2004o ECE, ASU: 5 yrs distinction

• 5+ years in embedded systems developmento SDLC, Apps, MW, DD, Porting, ...

• 3+ years in SW engineeringo PSP, CMMI, Systematic reuse, ...

• 3+ years in SW testingo IBM certified, ISTQB certified, ...

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

Copyright

• Materials in this course is the property of Amr Ali Abdel-Naby.

• Reproduction or transmission of the materials in any manner without the copyright owner permission is a law violation.

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

Course References

• MicroC/OS-II The Real-Time Kernel, 2nd Edition, by Jean J. Labrosse

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

Obtaining the Status of a Semaphore, OSSemQuery

INT8U OSSemQuery (OS_EVENT *pevent, OS_SEM_DATA *pdata)• pevent: A pointer to the desired semaphore• pdata: A pointer to the returned semaphore information• Return value:

o No erroro pevent is not a semaphore.o pevent is null.

• Now lets see OSSemQuery in os_sem.c

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

Porting µC/OS-II

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

Outline

• Introduction• Development Tools• Directories & Files• INCLUDES.H• OS_CPU.H• OS_CPU_C.C• OS_CPU_A.ASM• Testing a Port• Lab 8: 80x86 Port – Real Mode, Large Model with Emulated

Floating Point• Summary

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

Outline

• Introduction• Development Tools• Directories & Files• INCLUDES.H• OS_CPU.H• OS_CPU_C.C• OS_CPU_A.ASM• Testing a Port• Lab 8: 80x86 Port – Real Mode, Large Model with Emulated

Floating Point• Summary

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

What is Porting?

“The process of adapting SW so that an executable program can be created for a computing environment that is different from the one for

which it was originally designed for”

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

Porting in PC World

• x86 is the dominant CPU architecture.o A lot of SW are never ported to different CPUs.

• Windows & a Unix flavor are the dominant operating systems.

• International standards facilitate porting in the PC world.o ISO, POSIX, …

• Porting is rare in our world.

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

Porting for Embedded Systems World

• Embedded systems are custom by nature.o CPUso Operating systemso ...

• Portability is a significant problem.

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

Layered Architecture & Porting

Middleware

Application SW

HW

Operating System

Firmware / Device Drivers

OS Porting

Middleware Porting

Application Porting

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

OS Porting

• The most difficult type.

• OS provides HW abstraction.

• Needs solid HW Knowledge as well as solid HW knowledge

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

Types of OS Porting

OS Porting

Architecture

Board

Basic

BSP

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

Architecture Porting

• The main task of OS is to support multitasking.

• Thus, architecture porting is about context switch & exceptions handling.

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

Context Switch

• Volatile state of the CPUo CPU registers + MMU if OS is process based

r8r9

r10r11r12

r14 (lr)r15 (pc)

cpsrr0r1r2r3r4r5r6r7

Stack ptr

Task A TCB

Stack ptr

Task B TCB

CPU Register

Task A Stack(memory) Task B Stack(memory)

Current running

CPU Core

r8r9

r10r11r12

r14 (lr)r15 (pc)

cpsrr0r1r2r3r4r5r6r7

Save Restore

Task A

Task B

ContextSwitch

Context Switch Overhead

Scheduling Decision Made

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

Exceptions Handling

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

Board Porting

• Basic board portingo Check proper board operationo Function the minimum needed peripherals

Memory ICU PLL Timer I/O

• Board Support Packageo Boot loader + Device driverso Minimum BSP is the basic board porting.

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

µC/OS-II Porting Prerequisites

• CPU support interrupts.

• CPU can generate interrupts at regular rates.

• Interrupts can be enabled and disabled.

• CPU supports HW stack.

• CPU can load & store stack pointer & CPU registers.

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

µC/OS-II Kernel Architecture

µC/OS-II Port(Processor Specific Code)

µC/OS-II(Processor Independent

code)

µC/OS-II Configuration(Application Specific)

Application SW(Your Code)

HW

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

Outline

• Introduction• Development Tools• Directories & Files• INCLUDES.H• OS_CPU.H• OS_CPU_C.C• OS_CPU_A.ASM• Testing a Port• Lab 8: 80x86 Port – Real Mode, Large Model with Emulated

Floating Point• Summary

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

Development Tools Requirement

• ANSI C compilero Reentrant compiler

• Assemblero == C compiler with

Inline assembly Registers manipulation from C

o Saving & restoring registers

• Linkero To combine object codes

• Locatoro To place code & data anywhere in the memory map of the target

CPU

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

Outline

• Introduction• Development Tools• Directories & Files• INCLUDES.H• OS_CPU.H• OS_CPU_C.C• OS_CPU_A.ASM• Testing a Port• Lab 8: 80x86 Port – Real Mode, Large Model with Emulated

Floating Point• Summary

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

Directory Guideline

uCOS-II\CPU\Tool Chain\OS_CPU.H\OS_CPU_A.ASM\OS_CPU_C.C

• For example:uCOS-II\ARM\ADS1.2\OS_CPU.H\OS_CPU_A.ASM\OS_CPU_C.C

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

Outline

• Introduction• Development Tools• Directories & Files• INCLUDES.H• OS_CPU.H• OS_CPU_C.C• OS_CPU_A.ASM• Testing a Port• Lab 8: 80x86 Port – Real Mode, Large Model with Emulated

Floating Point• Summary

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

INCLUDES.H

• Every C file should include it.

• == Master include fileo Advantage: No need to worry about include fileso Disadvantage: Compilation times increase

• Add needed includes at its end.

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

Outline

• Introduction• Development Tools• Directories & Files• INCLUDES.H• OS_CPU.H• OS_CPU_C.C• OS_CPU_A.ASM• Testing a Port• Lab 8: 80x86 Port – Real Mode, Large Model with Emulated

Floating Point• Summary

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

OS_CPU.H

• Contains compiler specific typedef’s

• Contains processor specific #define constants & macros

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

Data Types

typedef ?? BOOLEAN;typedef ?? INT8U; typedef ?? INT8S;typedef ?? INT16U;typedef ?? INT16S;typedef ?? INT32U;typedef ?? INT32S;typedef ?? FP32;typedef ?? FP64;typedef ?? OS_STK;typedef ?? OS_CPU_SR;

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

Processor Specifics

#define OS_CRITICAL_METHOD ??#if OS_CRITICAL_METHOD == 1#define OS_ENTER_CRITICAL() ??#define OS_EXIT_CRITICAL() ??#endif#if OS_CRITICAL_METHOD == 2#define OS_ENTER_CRITICAL() ??#define OS_EXIT_CRITICAL() ??#endif#if OS_CRITICAL_METHOD == 1#define OS_ENTER_CRITICAL() ??#define OS_EXIT_CRITICAL() ??#endif#define OS_STK_GROWTH ??#define OS_TASK_SW() ??

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

Critical Sections – Method 1

• Not adequate implementation

• Interrupt state may differ before & after the critical section.

#define OS_ENTER_CRITICAL()\asm (“DI”)#define OS_EXIT_CRITICAL()\asm (“EI”)

Interrupts are disabled

OS_ENTER_CRITICAL

Interrupts are enabled

OS_EXIT_CRITICAL

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

Critical Sections – Method 2

• May not be supported by:o Your processor

No HW stack Addressing mode is relative.

o Your tool chain Compiler does not support inline assembly. Compiler does not optimize inline assembly.

#define OS_ENTER_CRITICAL()\asm (“PUSH PSW”)\asm (“DI”)#define OS_EXIT_CRITICAL()\asm (“POP PSW”)

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

Critical Sections – Method 3

• Compiler must supporto Storing PSW in a C variableo Loading PSW from a C variableo Disabling interrupts from C

#define OS_ENTER_CRITICAL()\cpu_sr = get_processor_psw();\disable_interrupts();#define OS_EXIT_CRITICAL()\set_processor_psw();

OS_CPU_SR cpu_sr;...OS_ENTER_CRITICAL();/* Critical Code */OS_EXIT_CRITICAL();

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

Stack Growth

• Some stacks grow from high-to-low memory.

• Others grow from low-to-high memory.

• #define OS_STK_GROWTH is defined to handle both models.o Set OS_STK_GROWTH to 0 for low-to-high memory stack growth.o Set OS_STK_GROWTH to 1 for high-to-low memory stack growth.

• OSInit & OSTaskStkChk need to know stack growth.

• Context switch algorithms need to know stack growth.

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

Task Switching

• OS_TASK_SW performs task level context switch.

• In µC/OS-II, the stack frame for a ready task always looks as if an interrupt has just occurred & all processor registers are saved onto it.

• OS_TASK_SW is used to simulate an interrupt.

• CPUs provide a SWI or trap instructions to accomplish this task.

• The ISR or trap handler must vector to OSCtxSw.

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

Outline

• Introduction• Development Tools• Directories & Files• INCLUDES.H• OS_CPU.H• OS_CPU_C.C• OS_CPU_A.ASM• Testing a Port• Lab 8: 80x86 Port – Real Mode, Large Model with Emulated

Floating Point• Summary

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

OS_CPU_C.C

• A μC/OS-II port requires rewriting 10 simple C functions.o OSTaskStkInit

Only required function, the other 9 must be declared but can be empty

o OSTaskCreateHooko OSTaskDelHooko OSTaskSwHooko OSTaskIdleHooko OSTaskStatHooko OSTimeTickHooko OSInitHookBegino OSInitHookEndo OSTCBInitHook

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

OSTaskStkInit

• Called by OSTaskCreate & OSTaskCreateExt to initialize stack frame of the tasko The stack looks as if an interrupt has just occurred & all the

processor registers have been pushed onto the stack.

OS_STK * OSTaskStkInit(void(*task)(void*pd), void * pdata, OS_STK * ptos, INT16U opt){1 Simulate call to function with an argument(pdata);2 Simulate ISR Vector;3 Setup stack frame to contain desired initial values of all registers;4 Return new top of stack pointer to caller;}

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

OSTaskStkInit cont’d

• Stack-frame initialization with pdata passed to the stack.

1 pdata

2 Task Start Address

2 Processor Status Word

3 Interrupt Return Address

3 Saved Processor Registers

High Memory

Low Memory

Stack Pointer = ptos

4 Stack Pointer

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

OSTaskStkInit cont’d

• Stack-frame initialization with pdata passed in a register.

1 Task Start Address

2 Processor Status Word

2 Interrupt Return Address

3 Saved Processor Registers

pdata

High Memory

Low Memory

Stack Pointer = ptos

4 Stack Pointer

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

OSTaskCreateHook

• Called by OS_TCBInit whenever a task is created• Called with interrupts enabled• It receives a pointer to the OS_TCB of the task being created &

can access all its structure members.• It has limited capability when the task created by OSTaskCreate.• With OSTaskCreateExt, it has access to the TCB extensions.

o You can access information about task registers, MMU registers, task counters, & debug information.

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

OSTaskDelHook

• Called by OSTaskDel whenever a task is deleted

• Called with interrupts disabled

• It receives a pointer to the OS_TCB of the task being deleted & can access all structure members.

• It is responsible for performing extra clean-up operations.

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

OSTaskSwHook

• Called whenever a task switch occurs

• Executed with interrupts disabled

• It can access OSTCBCur & OSTCBHighRdy.

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

OSTaskIdleHook

• Called by OS_TaskIdle

• Many CPUs have power-down mode.

• CPUs exit power-down mode by interrupts.

• This function can make use of this feature.

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

OSTaskStatHook

• Called once every second by OSTaskStat

• It can extend statistics capability.o For example, display statistics on screen

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

OSTimeTickHook

• Called by OSTimetick every system tick

• It is executed before actual processing to give the port the 1st claim of the tick.

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

OSInitHookBegin & OSInitHookEnd

• OSInitHookBegino Called immediately upon entering OSInito It allows extending OSInit with port specific code.o It assists initialization encapsulation.

• OSInitHookEndo == OSInitHookBegin but called just before exiting OSInit

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

OSTCBInitHook

• Called by OS_TCBInit & before the call of OSTaskCreateHook

• It initializes TCB related data.

• OSTaskCreateHook initializes task related data.

• There can be difference between them.

• It is up to the port whether to populate both initializations or not.

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

Outline

• Introduction• Development Tools• Directories & Files• INCLUDES.H• OS_CPU.H• OS_CPU_C.C• OS_CPU_A.ASM• Testing a Port• Lab 8: 80x86 Port – Real Mode, Large Model with Emulated

Floating Point• Summary

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

OS_CPU_A.ASM

• A μC/OS-II port requires rewriting 4 simple assembly functions:o OSStartHighRdyo OSCtxSwo OSIntCtxSwo OSTickISR

• If your compiler supports in-line assembly, you could place these functions in OS_CPU_C.C.

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

OSStartHighRdy

• Called by OSStart to start the highest priority task ready to run

void OSStartHighRdy(void){

Call user definable OSTaskSwHook();OSRunning = TRUE;Get the stack pointer of the task to resume:stack pointer = OSTCBHighRdy -> OSTCBStkPtr;Restore all processor registers from the new task’s stack;Execute a return from interrupt instruction;}

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

OSCtxSw

• A task level context-switch is done by issuing a SW interrupt instruction. The interrupt must vector to OSCtxSw.

void OSCtxSw(void){

Save processor registers;Save the current task’s stack pointer into the current task’s OS_TCB:OSTCBCur -> OSTCBSTkPtr = Stack Pointer;OSTaskSwHook();OSTCBCur = OSTCBHighRdy;OSPrioCur = OSPrioHighRdy;Get the stack pointer of the task to resume:Stack pointer = OSTCBHighRdy -> OSTCBStkPtr;Restore all processor registers from the new task’s stack;Execute a return from interrupt instruction;}

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

OSCtxSw cont’d

LPT

LPT calls a μC/OS-II service

μC/OS-II service

OS_Sched

OS_TASK_SW

HPT

OSCtxSw

Invoke an interrupt which vectors to OSCtxSw

μC/OS-II service makes HPT ready

Context is performed & HPT

runs

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

OSTickISR

void OSTickISR(void){Save processor registers;Call OSIntEnter() or increment OSIntNesting;if (OSIntNesting == 1) OSTCBCurPtr -> OSTCBStkPtr = Stack Pointer;Clear Timer;Re-enable interrupts (optional);OSTimeTick();OSIntExit();Restore processor registers;Execute a return from interrupt instruction;}

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

OSIntCtxSw

• Called by OSIntExit to perform interrupt level context switch, if needed

• Does half context only• OSInctCtxSw == Jumping to proper location in OSCtxSw

void OSIntCtxSw(void){OSTaskSwHook();OSTCBCur = OSTCBHighRdy;OSPrioCur = OSPrioHighRdy;Get the stack pointer of the task to resume:Stack pointer = OSTCBHighRdy -> OSTCBStkPtr;Restore all processor registers from the new task’s stack;Execute a return from interrupt instruction;}

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

Outline

• Introduction• Development Tools• Directories & Files• INCLUDES.H• OS_CPU.H• OS_CPU_C.C• OS_CPU_A.ASM• Testing a Port• Lab 8: 80x86 Port – Real Mode, Large Model with Emulated

Floating Point• Summary

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

Testing a Port Is

• More complicated than writing a port

• Done without application codeo KISSo If bugs occur, it is 100% from the port code.

• Done with 2 simple tasks & ticker ISR

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

Testing a Port Can Be Done with

• A source level debuggero Luxuryo Easyo Change with environmento Expensive

• Go/No Go Testing with a peripheral o A led for exampleo Not fancyo More time consumingo Cheap

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

Recommended Scenario

1. Verify OSTaskStkInit & OSStartHighRdy

1. Verify OSCtxSw

1. Verify OSIntCtxSw & OSTickISR

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

Verifying OSTaskStkInit & OSStartHighRdy – Source Level Debugger

1. Disable statistics task.2. Load source code to your debugger.3. Step to OSStart.4. Step into OSStart.5. Step to OSStartHighRdy.

o Your Code!!!

6. Step into this code.7. This code should populate the registers in reverse order of

OSTaskStkInit.8. Your code should end with OS_TaskIdle.

#include “ includes.h”void main(void){OSInit();OSStart();}

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

Verifying OSCtxSw – Source Level Debugger

1. Load source code into your debugger.2. Step to OSTimeDly.3. Step into OSTimeDly.4. Step to OS_Sched.5. Step into OS_Sched.

o This will cause an interrupt that must vector to OSCtxSw.

6. Step to OSCtxSw.7. Step into OSCtxSw.

o Your code!!!o Context of test task should be saved & that of OS_TaskIdle should

be loaded.

8. Your code should end with OS_TaskIdle.

#include “ includes.h”OS_STK TestTaskStk[100];void main(void){OSInit();OSTaskCreate(TestTask, 0, &TestTaskStk[99], 0);OSStart();}

void TestTask(void * pdata){pdata = pdata;while(1) OSTimeDelay(1);}

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

Verifying OSIntCtxSw & OSTickISR –Source Level Debugger

1. Set up an interrupt vector for the clock tick ISR.2. Initialize the clock tick & enable interrupts.

#include “ includes.h”OS_STK TestTaskStk[100];void main(void){OSInit();Install clock tick interrupt vector;OSTaskCreate(TestTask, 0, &TestTaskStk[99], 0);OSStart();}void TestTask(void * pdata){pdata = pdata;Initialize clock tick interrupt then enable interrupts;device_state = OFF;while(1) {OSTimeDly(1);if (device_state == OFF) device_state = ON;if (device_state == ON) device_state = OFF;}}

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

Verifying OSTaskStkInit & OSStartHighRdy – Go/No Go

• Same test code as “Verifying OSTaskStkInit & OSStartHighRdy –Source Level Debugger “

• But OSTaskIdleHook will be modified.

void OSTaskIdleHook(void){if (device_state == OFF) device_state = ON;if (device_state == ON) device_state = OFF;}

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

Verifying OSCtxSw – Go/No Go

• Same test code as “Verifying OSCtxSw – Source Level Debugger “

• But OSTaskIdleHook will be modified as in “Verifying OSTaskStkInit & OSStartHighRdy – Go/No Go”

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

Verifying OSIntCtxSw & OSTickISR –Go/No Go

• Same as “Verifying OSIntCtxSw & OSTickISR – Source Level Debugger”

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

Outline

• Introduction• Development Tools• Directories & Files• INCLUDES.H• OS_CPU.H• OS_CPU_C.C• OS_CPU_A.ASM• Testing a Port• Lab 8: 80x86 Port – Real Mode, Large Model with Emulated

Floating Point• Summary

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

Lab 8: 80x86 Port – Real Mode, Large Model with Emulated Floating Point

• Please follow the instructions in the lab handout

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

Outline

• Introduction• Development Tools• Directories & Files• INCLUDES.H• OS_CPU.H• OS_CPU_C.C• OS_CPU_A.ASM• Testing a Port• Lab 8: 80x86 Port – Real Mode, Large Model with Emulated

Floating Point• Summary

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Amr Ali Abdel-Naby@2010 Introduction to uCOS-II V2.6

Summary

• Porting

• Porting µC/OS-II

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