EISCAT Technical Note 83/39

SPECTRUM ANALYZER

by

Tapani Äijänen EISCAT SF-99600 Sodankylä Finland

EISCAT Scientific Association 5-981 27 Kiruna, Sweden August 1983 EISCAT Technical Note 83/39 Printed in Sweden ISSN 0349-2710

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1. INTRODUCTION

In this report, areal time spectrum analyzer designed at the EISCAT Sodankylä site is described. This ·report isa short version of the original report on the analyzer.

This short report has been written because the original one was written iri Finn1sh which probably discourages anybody not understa.nding · tha t strange language from reading it.

The spectrum analyzer was designed especially for plasma line analysis. The design work was started when an interesting component, a charge ~oupled gevice (CCD) made by Reticon, became available. That CCD is designed to make Fourier transforms at relatively high speed.

The CCD chip does a-convolution.which can be used with the chirp z-transform algorithm to compute a giscrete Eourier ~ransform (DFT). The chip has 512 stages which means that it can be used to make a 512 point DFT. The maximum sampling rate of the CCD is 2 MHz; but in the constructed spectrum analyzer, a one MHz rate is used. This is mainly because higher speed readout circuits for the CCD were difficult to obtain.

Thus at one MHz sampling rate, the analyzer makes one DFT in 0.5 ms in the continuous mode when a so-called sliding DFT is made. When the data is recycled to make anormal DFT, it takes 1.0 ms to get a 512 point DFT. Thus the maximum continuous sampling rate of the analyzer in recycling mode is about 500 kHz. In this mode it is also possible to analyze and integrate non-stattonary signals because the analyzer includes an input buffer memory which can be .triggered externally to sample data.

In the next chapter there is some discussion on spectrum analysis and then in the following chapter the design and construction of the analyzer is described.

2. ON SPECTRUM ANALYSIS

2. 1 GENERAL

The estimation of power spectrum has long been based on computing Fourier transforms, especially since the development of the Fast Fourier Transform algorithm (FFT). In this method, there are some disadvantages, like poor frequency ·resolution and high sidelobes. These features are most prominent when the data vector which is transformed is short.

The high sidelobes are related t6-t6e windowing of the data. When the FFT is applied it is implicitly done using a rectangular window ·which truncates the da.ta set and supposes that the data is zero outside the transforme~ sef .. To,avoid that problem, several window functions \have ~~en devel~ped; but these. decrease··the ·frequency resolution and· •igh.t increase the varian~e in "some cases. . ' .. · ... · .. ··-· .. ··:'. ·:: .. :··'. ·:· . .

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To solve these problems, some new methods for spectral estimation have recently been developed. These are called pazametric methods because in them a mode! is made for the targe~:and the parameters of that models are then estimated. These new methods are .discussed in references 4, 5 and 32.

The advantage of the new estimation methods is that it is possible to get reliable results from short data sets. The dis­advantage is that these methods need longer computation times than the traditional.FFT algorithm and thus they are not normally appli~able for real time processing.

Thus the spectrum analyzer developed for EISCAT is also based on a Fourier transform computation; in this case the algorithm used is the chirp z-transform instead of the FFT.

2.2. THE DISCRETE FOURIER TRANSFORM

The discrete Fourier transform (DFT) is defined:

where

N-1 X(k) = r

n=o

kn x(n)W , k=0,1, ... N-1

W = e-i(21r/N)

( 1 )

(2)

In these formulae N is the number of samples, x(n) isa sample intime space and X(k) isa transformed point.

The discrete Fourier transform hasa period N and if an inverse transform is made, the time series is then also periodic. This indicates that the Fourier transform distorts a continuous signal into a periodic one.

When the DFT is used for spectral estimation, the process to be analyzed is normally stationary and ergodic. Then it is possible to use time averages to estimate the statistical properties of signal.

The power spectrum comes from the.DFT by formula:

s ( k) = 11 /N X ( k) I 2 . (3)

This power spectrum estimate is also called a periodogram.

If a spectrum ·estimate is computed using the above formula, the result may be statistically rather unreliable. Although the number of samples is increased, the variance of the·estimate does not decrease when the signal is white noise (ref. 6). This indicates that to decrease the variance, an average of·several estimates must be comput~d. Another possibility is to use a window in the frequency domain.

i i

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2.3 THE CHIRP Z-TRANSFORM

The basic idea of the ~hirp ä-~ransform (CZT) is to use a convolution to perform most of the calculations which are needed in the DFT. The CZT algorithm qan be .oerived from formula (1) by substitution:

1

!. \ 1'

li I

nk = · ( n 2 + k 2 - ( k-n 1) 2 ) / 2 ( 4 )

This gives: . 2 ; N=1 2 i 2

X(k) = e-iwk /N t (x(n) 8iwn JN )eiw(k-n) /N, (S)

n=O

k = 0, 1 , ... , N-1 .

This can be handled as a three ph~se process where first a new data series is made:

2 y(n) = x(n)Wn 12 , n = 0,1, ... ,N-1. (6)

Then a convolu~ion is made between y(n) and v(n) where v(n) is:

2 v(n) = wn 12

This gives a sequence:

N-1 g ( k) = t y C n) v ( k-n) , k = O, 1 , .•• , M-1

n=O

k2/2 The third step is to multiply g(k) by sequence W

2 X(k) = g(k)Wk 12 , k = 0,1, ... ,M-1.

(7)

(8)

(9)

The sequence (7) isa complex sinusoidal function where the frequency increases linearly. That is called chirp. From the formufas above it cari be seen that the num'ber ·of transfo.rmed points in CZT need not to -be the same.as the number of data points in general case.

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: I :. i.' i

I When the charge coupled device is used to ,com,pute the CZT it is phase two descrlbed by·formula (8) which is~done by the·cco. This means that the chip does most of the calculations which are needed to compute the DFT.. ·

When the power spectrum· is computed using the CZT, it is possible to omit the last factor because the magnitude of that factor is alwafs one and it affects o~ly th~ ~hase. Thus the final formula for the power spectrum estimastion by CZT is:

N-1 . . 2 . 2 1 ·2 X(k)

2 -iwn /N in(k-n) /N = r (x(n) e ) e · ·. n~o·"· . . . . ...

3. OPERATION OF THE SPECTRUM ANALYZER

3.1 INTRODUCTION

( 10)

I

I .

A block diagram of the spectrum analyzer is given in fig.1. The complex samples from the ADC are first read into the buffer memory of the spectrum analyzer. The buffer memory is divided into two parts; when one side of the memory is written, the other side is read. .

From the buffer memory the data is read into four multipliers, which are needed in the chirp z-algorithm. The other multiplicants come from the chirp ROM chips. From the multipliers the data go to s.rithmetic logic ynits (ALUs), which perform addition and subtraction accokding to the algorithm. Then t~e dat~ are transformed to analog form for the CCD.

The CCD chip is controlled by one megaherz clocks. This means that the sampling rate of the CCD is also 1 MHz. The data is read out from the. CCD by buffer amplifiers and then it is fed to differential amplifiera to extract the data from the CCD clock lines 1 and·3.

The voltage coming out from the differential amplifiers is digitized by fast flash ADCs. Then the spectral components are squar.ed and summed to get the power spectrum. Because the points of the power spectrum are coming out from the.CCD in serial, the rest of the system also runs at 1 MHz rate.

The integrator has four 512 point memory banks, 32 bits wide. The 'integrated results are written ·simultaneously to the integration memory and to the read-out me-ory. When the integration period ends·, DMA starts from the read-out memory anda new period is started in the integration memory after first reseting it.

There is also a display controller in the spectrum analyzer which can be used to show ~he spectra on an oscilloscope screen. The display controller contains an automatic scaler which always shows the 8 highest used bits in the spectra. Manual scaling li also possible.

. ''

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Start and stop command for the analyzer.can be given either manual ly or from the computer. Also thEf. integration time can be controlled ·from.the radar .controller or internally.by the spectrum analyzer. · ·

3.2 TIMING ARRANGEMENT

The basic timing of the spectrum analyzer is· based on a 16'MHz crystal c6ntrolled oscillator. Fig.2 shows the clock generator circuit diagram. The 16 MHz signa1 goes toa counter which controls iwo decoder chips. These decoders are fou;-to-sixteen and three-to-eight devices which then generate sixteen 62.Sns pulses co ... C15 and eight 125ns pulses so ... 57, respectively, during a microsecond~ These pulses are used to control the synchronous part of the spectrum analyzer.

The data write phase into the buffer memory is controlled externally by the data strobe signal coming from the ADC. Thus writing is asynchronous compared to the other.part of the system.

At the user level, the timing of the analyzer is controlled by the desired integration time. With no integration, anormal DFT spectrum can be obtained every millisecond.

3.3 BUFFER MEMORY AND PREMULTIPLIERS

Fig.3 isa circuit diagram of the buffer memory. The· data which come from the ADC.(2 X 8 data bits+ 3 address bits) are divided into two independent liusses which allow simultaneous write and read phases in the memory. The· three address bits which come wlth the data.-are compared in a channel selector to allow only data coming from one channel to be strobed into the memory. It is possible also to switch the channel .selector·.

. . Fig.4 isa timlng diagram of the buffer memory write and also the buffer mem6ry read synchronization. _Th~ ope~ation of the· buffer memory is controlled by the control flip-flop (fig.3). When the operation starts, this FF is cleared· and the first data words are written into memory side .o~e. After 512 words are written the address counter of side one generates a flip buffer signal which toggles the FF and enables writing into the other half of the memory.

The flip buffer signal also starts the syn~hronization of the read phase of the buffer memory (fig~4) and thus enables the reading. The two FFs, FF1 and FF2; are used to. synchronize the reading. ·

In the recycle mode which is used in the spectrum analyzer the buffer memory must be read twice for each data set. For this purpose a recycle FF (fig.3) is included in the b~ffer memory control part. During the first .cycle, data is read to the CCD and then during· the second reading cycle integratiQn is done.

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When the clock rate of the analyzer·is 1 MHz, the maximum writing rate into the buffer memory is about 500 kHz. If this rate is ~xceeded, an error occurs that is i~dicated by an input error FF driving an error LED on the front.panel of the analyzer. 1 !

In the chirp z-algorithm the data must. be multiplied by sine and cosine chirp functions. These functions are stored in 512 x 8 bits ROMs. These ROMs are read·synchronously with the data from the buffer memory; the address counter of the ROMs is c~ocked by clock pulse so.

Before reading the data from the ROMs into the multipliers a modifica:tion is done which converts the value -128 to -127 because the mul tipliers ·used ca.n not handle mul tiplication -128 x -128. The ROM address cdunters and the modification circuits ·are shown i~ fig. 5.

Fig.6 isa circuit diagram of the arithmetic part. First the data and the chirp functions are read to multipliers which are TRW MPY-8HJ chips. The data and chirp functions are in two's complement format. The additions and subtractions which are needed in the algorithm are performed by AMD 25LS2517 ICs. The timing of the premultipli~rs is shown in fig. 7.

3.4 CONTROL AND READOUT OF THE CCD

The Reticon charge-coupled device, R 5601 is controlled by a four-phase clock. The timing of .these four clock signals is given in figure 8. In the same figure there is also the timing of the C(i) and S(i) pulses, which are used to generate the phi-pulses cn1,2, ... > ..

The circuit diagram of the clock drivers of the R 5601 is shown in fig. 9. The four main clock lines, phi 1 ... 4, are highly capacitive; phi 1 and 3, are about 500 pf, and phi 2 and 4 are about 200 pf. Because the required voltage level of the pulses is 10-14 volts, special° driver cir.cuitry is needed to avoid over- arnd under-shoots as much as possible. After testing several different solutions, the one given in fig. 9 turned out to be the best and was adopted.

In this system the TTL level clock signals first control driver circuits DS 0026. These ICs then.drive n-channel FETs which are the final driver transistors. The supply voltage of the DS 0026 chips is 22 volts for clock~ 1 and 3 and it is dropped to 20 volts for the FETs. This gives pulses of about 12 volt for the clock lines. For lines 2 and 4 only about 5 volts are needed. It is important to filter carefully the voltage lines for the main clocks.

The other control clocks for the CCD are driven_by CMOS gates wich are supplied by 15 volts. These ·gates are driven by TTL open collector circuits.

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In fig. 10 there isa schematic illustration of the charge transfer in the CCD together with the phi-pulse timing .which was giv~n in fig.8.

The signal processing circuits which are.needed with the CCD are given in. fig~11. These-comp6nertt~ ~nd-fhe driver circ~its in fig.9 are located on one double european printed circuit board.

The data comes first to the DACs (TRW TDC 1016) The analog voltage is then· amplified ·and shifted to ~b·out 6 vol~ level

·where the maximum signal amplitude fs about 4 volts. The .settling time of the DACs to· 0.1\ is 25ns ·and that of the MSK 730 amplifiers is 100ns.

The convolution made by the CCD is' read out·from the main clock lines phi 1· and 3. This is done .. in prin.ciple by a differential amplifier which reads the phi (+) and' phi (-J lines. · ·

To reduce th~ swing of the clock lines.before the differential amplifier there is first a capacitive divider and also CMOS switches to reset the lines between the puises. Then there are buffer amplifiers (LH 0033) t6.get ~quai impedancei for the clock lines. The differential amplif!er is~ La 0032 type which hasa settling time of 300ns t6 0.1\. The ~mplification is set to 25 to: get about a 10 volt ma~imum·butput for the ADC.

In the readout circuit of the CCD there is an offset compensation system. This is described in fig.J2 and in fig.11. The ADC is used in two's complement mode and thus the sign bit always tells whether the output voltage of the differential amplifier is positive or negative: That sign. bit i~ used-to control an integrator which in turn ·tonttols the offset voltage of the other buffer amplifiers. Thus the compensation system takes care of all offset voltages within the feedback loop. The maximum outp~t voltage swing from the qffs~i compe~sation circuit is about +/-. 15 volts which is theri attenuated down to + /- 15 mV for the buf fer amplif ier. · ··

The ADC, a TRW type TDC 1007, is an·eight bit flash con­verter. The timing of the readout system is shown in fig.?.

The offset compensation circuit tends to generate some noise when there is no signal to be analyze.d· in the device because operating the system always genera tes chan_ge~ in the_ sign bit. This means that the ADC output vari'e's between O and -1 even when there is no signal coming from the CCD. When there isa signal to · be analyzed in the sys·tem this is not a problem with reasonable integration periods~ · ·.· ·

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3.5 POWER COMPUTATION AND INTEGRATION

If Fourier coefficients are needed, then .the signal coming from the CCD must be post-multiplied by a chirP: factor. But if only the power spectrum is needed, then no post-multiplicåtion is necessary ~ince phase information is irrelevan~_when computing power spectta.

The power comp~tation is done by the circuit given in fig.13. The data from the ADC first comes to multipliers (TRW MPY-8H~) where the real and imaginary parts. are· squared and the squares added together to get power. There is al•o a DAC to display_ the eight most significant bits of the data for test purposes.

After the power computation, the data go to the integrator! This is shown in fig.14. There are eigbt.4-bit ALUs which add the computed power to the previous data.1rom the integrato~ memory. ALU units are used to.permit writing of zeroe- into the memory before starting a new integration period. After adding, the data is stored in registers and then written into the · integrator memory. ,

The integrator memory is made of eight Mostek Ml< 4118 1K x 8 bit chips which .~re configured to provide four 512· x 32 bit integration banks. The number of banks is selected· externally by a switch on the front panel of the analyzer. The· address couriter is used to control the amount of banks as described in fig.14. The timing of the integrator i$ given in fig. 15.

The operation of the integrator is controlled b~ the circuit shown in fig. 16. 'rhe enable integration signal coming from the buffer me~ory is u~ed to set a FF which controls multiplexer circuits·that ·drives the,integrator control signals. The timing of the integrator' control is show~ in fig.~7. Also·shown is the timing for the star·t of a new integration period when there is a memory· clear cycle before the integration cycle. When integration takes place into four banks~ four Enable "emory clear pulses are needed.

The integration period is controlled by a counter shown in fig.18. The counter 1s made up of 6 up/down counter chips which count the ·integration ~ycle &omplete (ICC) pulses coming from .. the integrator. The counters are preloaded at the beginning of the· integration period from the registers which coritain the number of cycles to be integrated. That register is ·1baded manually from front panel sw~tches.

It is also possible to confrol.t~e integratio~ time externally from the radar ·cdntroller. That option. is selected by a manual ··switch from the front panel and it controls the operation of a multiplexer as described in fig.16. For the DT pulse coming from the radar controller there is an additional delay of about 1.5 seconds to allow parallel operation of the spectrum analyzer and correlator.

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Fig.19 isa delay diagram for the spectrum analyzer that ~hows the pipe-line delay in the sy-s~e~ .. F-rom the .figure it can be seen that in addition to the. s1i mi.crosecond delay caused. PY the CCD · ·there is a three microsecond delay. This is ·taken fi1to · account by th~ pipe-line delay counter. shown in tig.f6. The counter is needed ·to arra.nge .the· integration timing such that all ~data points for a CZ·T ax:~, ~ken from one data se.t. 'This is impor·tant when s·ev.eral spectr~ are ;integrated simul taneousl"y.

3.6 DISPLAY AND OUTPUT CONTROL

When the integ~ation period has ·finished, the data~~ transferred by DMA into the computer. To make the transfer without disturbing the operation of the analyzer, a .specjal output memory has been included in the system. ·· ·

When the integration is running this output memory" is written in pa·l:!allel. wi th the actual integration memory. When the integr.ation period ends, the DMA is started from 'the · ou~p~-t·, · · memory and a.·new integration perioq.,is starteq simulta~eous1,y:·, .. ~

·· When the-·data -transfer into the computer has finished the;_•- '··· ;· out:put. memory starts to opera te .. in_. parallel. wi th the integriltio·n memory again. This means that, i~ principle, ther~ i~ al~ost~f6e entire integration period for data transfer; only one parallel integration cycl~ is needed to-update.the o,utput mem?rY~

The circuit diagram of the output memory is given.in fi~~2b~ · The A-bus from the integrator comes to the readout part.af the system where there isa tri-directional bus driver whicb · transfers the data into the output memory and to the display system. The DMA system described in fig. 20 is intended for an interface which has no handshake system. There the trigger DMA pulse is .used to control the timi·ng of the DMA. Another system has also. been designed where a ·handshake wi th the. input. 'mo.dule. in the computer ( or CAMAC ) ... can be used. For the DMA int~r"t"ace, the J-2·· bit wide data words are inultiplexed int:.o a 16 bit ·bus to make the system compatible with the ND-10 computer. · ·

The ,display controller is described in fig.21. There the C-bus coming from the output memory goes toa multiplex~r which takes 8 bits for the display ADC. The multiplexer can be controlled either manual ly or autom~tically .. In automatic mode, the multiplexer takes the 8 highest used bits from the bus.· This results in a :09ntinuo.us optimum s_c~ling of the display du.ring int.egz:_ation .· · · . ,,

3.7 CONTROL OF THE .SPECTRUM ANALYZER ...

The operation ·.of the sp.ectrum analyzer can be.·controlied either manualli from the front panel. or by c~mputer .. T~e :c6nti6l~part -~ of the system is shown in fig.22. A multiplexer, controlled from the front panel, selects either manual or computer mode for the analyzer.

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To initialize the analyzer, a clear/load··command·must be given to the a~alyzer~.Then the run command can·be,given arid the anal~zer goes ~from the STOP state into th~ READY state where it wai.ts for the'.firs.t ·data ·strobe signal. Whe.n that comes, it .. sets .. the analyzer to RUN state until it · is :stopped again. This means th~t·there is no upper time limit bet~een the data stro~e pulses.which are· coming into the device. Thus the sampling rate can be as low as desired.

The interface of the spectrum analyzer with the EISCAT receiving system is shown in fig.23.

4. SPECTRUM ANALYZER TESTS

4.1 ON THE ANALYSIS OF THE TEST RESULTS

The spectrum an~lyzer has been test~d in two basic ways. First it was used in,. the test mode to meå.sure the integrated noise generated by the spectrum analyzer itself. Then externa! noise from the receiver has been analyzed·and integrated~ and the variance ot. the integrated spectrum compared- to the theoretically expected value.

It can be shown that the variance of-integrated spectra can be computed by the formula:

N 2 var( r S.) = 1/N(E(SN))

. 1 1 l.=

( 1 1 )

where N is the number of added spectra,s. are the spectra to be added and SN is the sum of spectra~ Thus the formula says that the variance of the integrated spectra is equal to the square of the expectation value of the sum divided by the number of added spectra.

This indicates that it is possible to reduce the variance of a spec~rum estimate by integration.

The theoretical result of formula (11·) has been used to compare to the experimental variance of integrated spectra. It must be noted that generally the variance of a ~pectrum means the variance of one spectral point of different spectra. This makes the variance a function of frequency as it is in general case (ref.6,7,32). When (11) was used with spectrum analyzer tests, the variance was calculated from one· ·1n'tegrated estimate normally over 200 spectral points. Thus the variance within a spectrum was analyzed to see if there are differences between the spectral channels in gaih or noise.

· ~11 ....

· 4.2 TEST RESULTS

The C:,.ynamic range. of ·the spect;i:um an,a.lrze;r was.c;;qmput~d from·

th~ test measur_emel'lti when ·test mode artd noi.~e. l.l'.R'1t was :used ~ .

In ief. 27, i·t wqs .informecl that tbe dyna8'ic xi,tHJe c;>f· the CCI) i-s.

specified to be 60 d~, ·Tl\i, i• defin~d to.be_ th~ f'-tio_ of the­

peak output s~g1;1~l to tbe. rms nois~r ·in test~ the noi11e generated by the system wat? nie,:sured ·by int~q;~ting it and th~n

calculating tne rm~ av~ra9e rioi,e tn one c:hannel,

The dynamic 1;an41e_ of tn~ CCD ·can ·\;>• pa).culate~ by

(.1.2)

whete vPP is the maxinn~m ~ak~to-J;>~a~ ~mplitudf! of onc:r ecn

output $ign4l a.nd vN !$ tbe ave,;age ~s na~ie·of t)a.t 01.>rtput:,.

The RMS nQise can p~ calculi4.t,d ?V tbe t9flftl.Jla ~ ·

( 13l

wh,are VI,SB is t.he atllpli~u<Je xep~e,ente4 P)' :tb• ·t,S,B ,of. tbe ADC,

SN is the average ·valliie o, the. ~pte~u:ated SPe(,tr.um a,pd N is the . ~umber of integrated spe·c~ia ..

·. When vPP is +/- .sv, vl:aSB is +/- 51\V, N i~ 1. tac105

and S"

is 1. 56x 105 as in fig. · 24, the d·yn~1'tic r•n,e is ij?, 5 d·e ~· The

tesult~ were within +/- o~e dB with differ,~t v~lut,.of Na

When e~t~rnal rec;eiver noiJe ~-, U$ed tQ t~,t th.e dev.;i.~, . . . . . . .

. tor~ul{A ( 11 ) . was us~d to ev4lua te tl\9t r~a\ll i;i. ,taown i11 1! it. ?S

•re four spectra of (iltered n~i••, Th•'nu~bo~ o~ ~P~~t~a . . . . . '

i~t~gra~ed are 10, 100, 1000 f\Jld 10 OOQ, 'fhe deqie•se <:>f· -~he.

Vq.riance with inc:rec\sin, -~ ill ·ol~a_rly .sl\QW~ · i·~--:thf;? t.i-c,ur,. ·

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From the results it can be see~ that the vatiance of the first

three spectra agr·ee well _ with the._. v~rianc;:e calculated by

formula ·c 1 {) ... When N is 1Q4 , the measured var~ance is about 50\ ' . ' . ,,.

hi~h$i thiri give~ b~ (11). This i~ because of the small tilt !n

., th·e' 's·p·~·ctrum which. is caused by the. s~ape of the receiver

fiifer. The trend can be remov~d by subtracting two simulta-. ;.-< ..

neously integrat~d spec;:tra from each. other.

The non-random self-noise of the analyzer starts to disturb the

results when the number of integrated spectra i$ mo~e than 105 .:

More complete results of the test meas~rements ~r~ ~bown and

discussed in detail in the original report (in finni~h!) and

~re not repeated here.

5. SUMMARY

~ real time spectrum analyz~r has been.designed, constru~ted, ant:l tested at the EISCJ\T Sodankylä site.' This repqrt contains a di~cussion on spectrum analysis and describes the design of the analyzer. Also some test res~lts are given.

Witn· this report isa ljst of references from the original repo.rt .. These :.references iriclude da.tå on subject~ which have not been discussed in this report, e.g. ~OQ the use of window functions for spectral estimation and on CCD technology. Also som~ references on incoherent scatter and plasma line studies have been included. . .

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· .41, 1978, So 911. • .956

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/3/ Hagfors T. 0 Lehtinen Mo: Electron temperature derived from incoherent scatter radar observations of the plasma line 0

f~equency 0 Journal of Oeophyai~al Research 11 Vole ··~6·0 Noo ., A1 0 January 1981 9 So 119oeo124o

.. ·. / 4/. Kay SoMo O Marple So Le, : Sp~ctrum analysis å modern perspective 9 Proceedings of the IEEE0 Vol. 69 0 Noo 11 November 1981, So 13800001419~

/5/ Childers, D.Go (editor):. Modern spectrum analysis, John Wiley & Sons, 1978, 334 s.

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v"".::.i 11/. Otnes R., Enochson Lo: Applied time series analysis 0

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.. 1978,' s. 175 •• 01990 . : ·'

' ~ ./9/ Rabiner LoRo;. Sch~fer RQ p Rader CoMo: The ohir:P. z-transform algorithm 0 IEEE Trans. Audio iiectroacoustop Vol~ AU--17·9 June 1969, s·o 860 o o92o , . .

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/10/ Nuttall AoH•, Carter G.Co :. Spectral estimation using combined· ~ime and lag weighting, Procee~-ings of the IEEE

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. . ' .

···~ · ···., · IEEE, V'ol~·. 66p No. 1 9 ··January 1978, ·s. 51 •• ·oa3·

/12/ Bendat Jo, Pierson Ao: Random.data: .analysis .and

measurement procedures, John Wiley & Sons, 1971, 4~7 So ..... \

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aegmentation, Proceedings of the IEEE, Volo 65, No. 6 0 . · . .,. ·~ .. .'·'·.;, ·.· .. June 1977 ,. ·so 904.· .•. 0986. ,· ' ,.\)

_ ., /14/ ~arter. C~G·o·, ·N\.\ttall AoH·o.; On ·the weighted ·overlapped segment averaging met.hqd for ;power· spectral estimation,

Proceedings of the IEEE, Volo 68, Noo 10, October. 1.980 9 . •· , .. '\ ' ·s O 1 3 5 2 0 0 'o 13 54 0°

/15/ Welch PoDo: The use of fast· ·Fourier transform· fcir the estimation of power spectra: a method based on tim,

. averaging over ·shört, modified periodogramso . IEEE\ Transe Audio Electroacousto s, Vol •. AU,b,15, June· 1967 9 .. s~. 700 u 73.

/16/ Geckinli No·Co O Yavuz Do: Some 'novel ,jindows· and ·con~ise tutorial comparison of window· familiesp IEEE'Transo on Acoustics 9 Speech11 .and Sign~l Proce~sing, Vol9. .

1?6 11 ,oo 61)

. . ,, . . . .. . - .. .:.-.. ~ . . . . . . : . ' .

December 1978 0 · ·sQ 501 o o 0507 o.

/17/ Yuen CoK,: Comments on mod~rn m~thods for. spect~ .. '·. . . \ . . •. ~" . : ' . . . . .

estiinationi IE;EE Transa. on Ac;oµs-J;ics 9 Speech, and Signal Proce~sing ~ Vo.lo 2'i9 Noo 3 p June 1979·, ,. Bo 298.o .: 2990

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.. /J9./ J{arp~us. ,w •. J •. ,· ·Cohen. D. : Archi tectural and sottware issues .. . in ... the design and applications o.f peripheral årray

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Speech, and signal Processing, Vol 26, NQg 6, December 1978, So561ooo566

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/28/ National Semiconductor: Special functions databook~ 19790

/29/ TRW LSI Products 0 1981 cataiogo

IJ

-16-

._,__:./'30/ -Advanced ;Micro.····Devices: Schottky ·and low-power schottky ·data book,. 197'7;.

··i31/ Texaa Instruments: The TTL data book, 198~ •.

_:.:.~ :.;. · .. · .1,21 Priestley M.:a.: Spectral analysis and time series., Volo 10 • -~ ,, • 0 ·: .' : ., • ; ~ C !'. ·•. • •

· .. r.·1.:··:} .. · ~cademic Press, 1981, 65.3 s.

/3~/ Hagfors T.: Incoherent scatter radar observations o~ the : . ~-,,·

~ 't# • I

. ·. ~ . .... ' ~'' . .

:'.'''~

plasma line with chirped pulse system, Radio Scien9e, Volo 17, No. 3, May-June 1982, s. 727 ••• 734.

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