IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 54, NO. 6, DECEMBER 2007 2969

Performance Evaluation of a Multicell TopologyImplemented With Single-Phase Nonregenerative

Cells Under Unbalanced Supply VoltagesCarlos R. Baier, Johan I. Guzmán, José R. Espinoza, Member, IEEE, Marcelo A. Pérez, and

José R. Rodríguez, Senior Member, IEEE

Abstract—The analysis of a multicell topology that is imple-mented with single-phase nonregenerative cells under an unbal-anced ac mains is presented. The study shows that the topologynaturally compensates most of the voltage unbalance; for instance,for a 100% voltage unbalance in the ac mains, just 32% reachesthe load. For critical applications, a feedforward control techniqueis proposed in order to compensate the remaining unbalance atthe load side. The resulting topology, in combination with the pro-posed strategy, reduces near to zero the load fundamental voltageunbalance, while the input current unbalance and distortion arealso improved. A theoretical analysis that is based on symmetricalcomponents and the experimental results confirm the theoreticalconsiderations.

Index Terms—AC–AC power conversion, insulated-gate bipo-lar transistor, multicell single-phase topology, multilevel system,power electronics, variable-speed drives.

I. INTRODUCTION

MULTICELL topologies can generate more than twovoltage levels at the ac load terminals. Thus, among

the advantages are the potential operation in medium-voltageapplications with reduced dν/dt, the use of off-the-shelf semi-conductors due to its modular implementation, and high qualityof the input–output voltage and current waveforms (near sinu-soidal). This last feature leads to a low distortion at the loadside and a high displacement power factor at the input side,even at light loads. This is the case of the system that is shownin Fig. 1 and the ones presented in [1]–[6], where the topologiesare based on basic units, namely, cells.

In particular, the multicell converters that are described in[1]–[6] feature cells by using three-phase diode-rectifiers asinput stages, which requires a transformer with three isolatedsecondaries in order to supply a single-phase voltage to eachphase of the load. If three cells are required to form a phaseof the load, then nine isolated three-phase secondaries should

Manuscript received March 28, 2007; revised May 29, 2007. This work wassupported by the Chilean Government through projects FONDECYT 103-0368and 105-0958.

C. R. Baier, J. I. Guzmán, and J. R. Espinoza are with the Department ofElectrical Engineering, Universidad de Concepción, Concepción, 160-C Chile(e-mail: cbaier@udec.cl; jguzmand@udec.cl; jose.espinoza@udec.cl).

M. A. Pérez and J. R. Rodríguez are with the Department of ElectronicEngineering, Universidad Técnica Federico Santa Maria (UTFSM), Valparaíso,110-V Chile (e-mail: marcelo.perez@elo.utfsm.cl; jose.rodriguez@elo.utfsm.cl).

Color versions of one or more of the figures in this paper are available onlineat http://ieeexplore.ieee.org.

Digital Object Identifier 10.1109/TIE.2007.903977

be available. On the contrary, if cells that are based on single-phase diode-rectifiers are used as input stages (Fig. 1), just threethree-phase secondaries with isolated phases are required toachieve the same voltage waveform at the load side and thesame current waveform at the primary. This feature makes thestudied structure more attractive as it becomes less expensive(the transformer is simpler) and more reliable (because of thelesser components); both features are critical in medium-powerapplications. This topology has only been presented in caseswith regenerative cells [7], [8].

On the other hand, the presence of unbalances in the acmains affects the operating performance of diode-based rec-tifiers. This issue has widely been reported in the technicalliterature for rectifiers based on three-phase diode-bridges [10],[11]. Among the undesirable effects that are present on thetopology that is described in [1]–[6] are the presence of a largesecond voltage harmonic in the dc-link voltage of each cell,as well as distorted and unbalanced ac input currents. Thisis due to either six-, four-, or two-pulse operating modes ofthe input ac currents in these rectifying topologies [10], [12].This phenomenon is not present in a single-phase rectifier andbecomes the reason why these last structures behave with betterperformance indexes under unbalanced supply voltages.

In this paper, the effects of an unbalanced ac mains on a mul-ticell topology that is implemented with cells by using a single-phase diode-rectifier as input stage are quantified (Fig. 1).Specifically, the amount of unbalance that reaches the load sideand the unbalance that is generated by the ac input currents arestudied. It is shown that the topology behaves as a buffer forthe unbalance in the ac mains, and just a residual part of theunbalance reaches the load side. Besides the buffering behaviorof the topology, this paper presents an alternative for criticalloads to mitigate the unbalance left at the load side by means ofa feedforward control technique. A theoretical analysis that isbased on symmetrical components and the experimental resultsare presented to validate the theoretical considerations.

II. MULTICELL TOPOLOGY IMPLEMENTED WITH CELLS

USING A SINGLE-PHASE DIODE-RECTIFIER

AS THE INPUT STAGE

A. Cells Arrangement and Number of Cells

The multicell topology that is implemented with cells usinga single-phase diode-rectifier as the input stage [Fig. 1(a)]

0278-0046/$25.00 © 2007 IEEE

2970 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 54, NO. 6, DECEMBER 2007

Fig. 1. Multicell topology based on single-phase diode-rectifier cells. (a) Topology. (b) Power cell.

requires a transformer with a minimum of three single-phasesecondaries to feed three cells (one per load phase). An alter-native in accommodating the secondaries in order to obtain ahigh-quality overall input ac current is to use as many three-phase secondaries—with independent neutral points—as cellsin series are connected. For instance, the topology that is shownin Fig. 1(a) has three secondaries to accommodate three cellsper phase. Moreover, the secondaries are designed to featurevoltages with a phase shift (δ = 20◦ in this case) that is cal-culated as explained shortly. This is achieved using a standardzig-zag transformer, as shown in Fig. 1(a).

The cells are connected in series to form one phase, asshown in Fig. 1(a). Thus, the output of the cell C1U (fed bythe voltage from the first secondary with rms value V a

(+10) )

is connected in series with the output of the cell C2U (fed bythe voltage from the second secondary with rms value V a

(+30) )

and is finally connected in series with the output of the cellC3U (fed by the voltage from the third secondary with rmsvalue V a

(+50) ) to form the load phase u. The same arrangement

is used to form phases ν and w of the load. The number ofvoltage levels that is attainable at the load side is given by thenumber of cells NC that are connected in series to form a phaseof a load. Thus, to achieve N levels, the following expressionmust hold:

N = NC + 1. (1)

A disadvantage of a cell that is based on a single-phase inputstage is the bigger size of the capacitor as compared to cells thatare based on a three-phase input stage. This is due to the factthat, in this case, both the rectifier and the inverter inject into

the dc link a second current harmonic that must be taken by thedc link capacitor in order to hold a constant dc link voltage.The worst case is when both second harmonics feature thesame frequency and are in phase. This issue limits the level ofpower to low and medium applications, but where high-qualityinput–output waveforms are required.

III. UNBALANCE FACTOR

The unbalance factor—computed from the symmetrical com-ponents decomposition—as a quality index is used in this paper[4], [5]. Such index has been approved by the standard IEC61000-4-27. This standard is preferred instead of the NationalElectrical Manufacturers Association’s definition, as it providesthe magnitude and phase of the unbalance when used in itsphasorial form.

The transformation to symmetrical components is based onthe standard Fortescue transformation matrix. Thus, a three-phase voltage can be represented by its positive, negative, andzero symmetrical components according to

�νp

�νn

�νz

= �F

�νa

�νb

�νc

=

13

1 �a �a2

1 �a2 �a1 1 1

·

�νa

�νb

�νc

(2)

where the phasor �a features a unitary module and a phase of120◦, hence

�a = (1, 120◦) (3)

and the phasors �νa, �νb, and �νc are phase voltages, and �νp,�νn, and �νz are its positive, negative, and zero symmetricalcomponents.

BAIER et al.: PERFORMANCE EVALUATION OF MULTICELL TOPOLOGY WITH NONREGENERATIVE CELLS 2971

Fig. 2. Zig-zag configuration of one secondary of the multipulse transformer.(a) Secondary with isolated phases. (b) Phasorial triangle for design purposes.

The unbalance factor �uν for the voltage in its phasorialrepresentation is, hence, given by

�uν = (Uν , αu) = �νn/�νp (4)

where Uν and αu are the magnitude and phase of the unbalancefactor, respectively, and could be calculated, as shown in [9],out of the voltage magnitudes.

IV. AC MAINS UNBALANCE IN THE TRANSFORMER

A. Effects in the Secondary Voltages

An alternative to quantify the effect of the voltage unbalancein the ac mains in the secondary of the transformer that isshown in Fig. 1 is to use the symmetrical components. Thetransformer is considered ideal, and as such, it is modeled aspure gains according to its zig-zag arrangement. In fact, two ofthe secondaries of the transformer [Fig. 1(a)] are in a zig-zagarrangement and can be represented as in Fig. 2(a), where xand y are the corresponding voltage ratios. These voltage ratiosdepend on the phase shift δ that is required in the secondaryvoltages, which is fixed to

δ =60◦

NC. (5)

The voltage ratios x and y in a zig-zag configuration areobtained by the phasorial voltage triangle that is formed in thesecondary, as shown in Fig. 2(b). If the sine theorem in thetriangle is used, it is found that

y =2√3

sin(δ) (6)

x =2√3

sin(60 − δ). (7)

As expected, x and y correspond to a fraction of the total ratio.Hence, the expressions that relate the primary and secondary

voltage phasors (Fig. 1) are

�νa

(+10)

�νb(+10)

�νc(+10)

= g

x + y −x −y

−x x + y −x−x −y x + y

�νa

p

�νbp

�νcp

= gT(+10)

�νa

p

�νbp

�νcp

(8)

�νa

(+30)

�νb(+30)

�νc(+30)

= g

1 −1 0

0 1 −1−1 0 1

�νa

p

�νbp

�νcp

= gT+30

�νa

p

�νbp

�νcp

(9)

�νa

(+50)

�νb(+50)

�νc(+50)

= g

x −(x + y) y

y x −(x + y)−(x + y) y x

�νa

p

�νbp

�νcp

= gT+50

�νa

p

�νbp

�νcp

(10)

where g is the total transformer ratio; �νap , �νb

p, and �νcp are the

primary phase voltage phasors; and �νa(+10) , �νa

(+30) , and �νa(+50)

correspond to the secondary phase voltage phasors of phasea. A similar notation is used for the other phases, as shownin Fig. 1(a). Thus, the secondary voltages into its symmetricalcomponents become

�νp

(+10)

�νn(+10)

�νz(+10)

= g�FT(+10)

�F−1

�νp

p

�νnp

�νzp

(11)

�νp

(+30)

�νn(+30)

�νz(+30)

= g�FT+30

�F−1

�νp

p

�νnp

�νzp

(12)

�νp

(+50)

�νn(+50)

�νz(+50)

= g�FT+50

�F−1

�νp

p

�νnp

�νzp

(13)

where T+10, T+30, and T+50, correspond to the matricesgiven in (8)–(10), respectively. After some math work and afterreducing some terms, we can simplify the previous expres-sions to

�νp

(r)

�νn(r)

�νz(r)

= gDr

�νp

p

�νnp

�νzp

(14)

2972 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 54, NO. 6, DECEMBER 2007

where the subindex r could be +10◦, +30◦, or +50◦, dependingon the secondary. The resulting Dr matrices are diagonal andare given by

D+10 = diag

(x2+xy+y2, atan

(1√3

x−yx+y

))(x2+xy+y2,−atan

(1√3

x−yx+y

))0

(15)

D+30 = diag{(

1, atan

(1√3

)),

(1,−atan

(1√3

)), 0}

(16)

D+50 = diag

(x2+xy+y2, atan

(1√3

2y+xx

))(x2+xy+y2,−atan

(1√3

2y+xx

))0

. (17)

Because x and y are constant and Dr is diagonal, we cancome up with the following conclusions: 1) the symmetricalcomponents of the secondary with respect to the primary justdiffer by a phasorial factor; 2) the positive primary componentsjust affect the positive secondary components; and 3) the neg-ative primary components just affect the negative secondarycomponents. According to the definition of the unbalancefactor (4), (14)–(17), the secondary unbalance factors can bewritten as

�uν(+10)

�uν(+30)

�uν(+50)

=

�νn(+10)

�νp

(+10)�νn(+10)

�νp

(+10)�νn(+10)

�νp

(+10)

=

(1,−2atan

(1√3

x−yx+y

))(1,−2atan(1/

√3))(

1,−2atan(

1√3

2y+xx

)) �uνp

(18)

where �uν(+10), �uν(+30), and �uν(+50) are the unbalance factorsof the secondaries as a function of the unbalance factor of theprimary �uνp. In particular, by considering three cells per phase(thus δ = 20◦) and the factors x and y that are defined by (6)and (7), the unbalance factors for the arrangement in Fig. 1become

�uν(+10)

�uν(+30)

�uν(+50)

=

(1,−20◦)

(1,−60◦)(1,−100◦)

�uνp. (19)

The previous expressions (18) and (19) indicate that themagnitude of the unbalance factors is not modified by thetransformer configuration, instead just its phase is modified.

B. Effects of the Unbalance in the Primary AC Currents

In the same manner as the voltages, the unbalance factorsfor the currents are found. The results show that the primarypositive component is the summation of the secondary positivecomponents and that the primary negative component is the

summation of the secondary negative components. By consid-ering δ = 20◦, we can write

�ipp =�ip(+10)(1,−10◦) +�ip(+30)(1,−30◦) +�ip(+50)(1,−50◦)

(20)

�inp =�in(+10)(1, 10◦) +�in(+30)(1, 30◦) +�in(+50)(1, 50◦)

(21)

where�ipp and�inp are the primary line current’s symmetrical com-

ponents, while�in(+10),�ip(+10),

�in(+30) ,�ip(+30) ,�in(+50) , and�ip(+50)

are the secondary line current’s symmetrical components. Thus,the fundamental unbalance factor for the primary currents �uip

as a function of the secondary symmetrical components is

�uip =�in(+10)(1, 10◦) +�in(+30)(1, 30◦) +�in(+50)(1, 50◦)

�ip(+10)(1,−10◦) +�ip(+30)(1,−30◦) +�ip(+50)(1,−50◦).

(22)

The previous expression indicates that the unbalance factorof the primary currents is less than or equal to the highest unbal-ance factor that is found in the secondary. This is due to the factthat the positive-sequence components of the secondaries areadded up with an identical phase (their angles do not dependupon the amplitude of the secondary currents). However, thephase of the negative-sequence component depends upon boththe configuration of the secondaries of the transformer andthe amplitude of each secondary current. Thus, the negative-sequence components get add up with different phases, depend-ing upon the unbalance of the secondary currents (Fig. 3).

In the worst case, if the phases of the negative sequences ofthe secondary are equal, then the magnitude of the unbalancefactor in the primary is less than the highest unbalance factor ofthe secondary. It can be probed that

max{Ui(+10), Ui(+30), Ui(+50)

}≥ Uip ≥ 0. (23)

Hence, the magnitude of the unbalance factor of the primarycurrents Uip is bounded, according to (23), to the maxi-mum magnitude unbalance factor of the secondary currents(Ui(+10), Ui(+30), Ui(+50)).

V. EFFECTS OF THE AC MAINS UNBALANCE

An unbalance in the ac mains would result to a higher orlesser ac voltage in the input of the cell that is connected tothat phase. Consequently, the dc-link voltage of the cell willbe higher or lower, and for a constant modulation index of theinverter, a higher or lower ac voltage will be produced in the acoutput terminals of the cell. Hence, each cell will generate itsown ac output voltage, which, in turn, may generate unbalancedload voltages. In the following, an expression for this resultingunbalance is derived.

BAIER et al.: PERFORMANCE EVALUATION OF MULTICELL TOPOLOGY WITH NONREGENERATIVE CELLS 2973

Fig. 3. Symmetrical components decomposition of the line currents. (a) Negative. (b) Positive.

The average dc-link voltage of a given cell is proportional tothe input ac voltage, thus

Vc = k0Vf (24)

where Vc is the dc-link voltage in a given cell [as in Fig. 1(b)]and V f is the rms phase voltage at its input. If every cell hasthe same modulation index at the inverter stage, the voltage ofone phase of the load becomes proportional to the summationof the voltages that form that phase, hence

V u = k1

(V a

(+10) + V a(+30) + V a

(+50)

)(25)

V ν = k1

(V b

(+10) + V b(+30) + V b

(+50)

)(26)

V w = k1

(V c

(+10) + V c(+30) + V c

(+50)

)(27)

where V u = V uo1 + V u

o2 + V uo3, V ν = V ν

o1 + V νo2 + V ν

o3, andV w = V w

o1 + V wo2 + V w

o3 are the rms load phase voltages;V a

(+10), V a(+30), and V a

(+50) are the rms secondary voltages of

phase a; V b(+10) , V b

(+30) , and V b(+50) are the rms secondary

voltages of phase b; and V c(+10), V c

(+30), and V c(+50) are the rms

secondary voltages of phase c. It is important to point out that,because the unbalance factor is calculated as the ratio of thenegative to the positive sequence, the gain k1 becomes irrele-vant. On the other hand, by using the symmetrical componentsand by considering that the zero sequence is not present in theprimary side, the rms phase voltages at the input of the threecells, which is fed by an arbitrary secondary, are

V a(r) = k2

∣∣1 + �uν(r)

∣∣ (28)

V b(r) = k2

∣∣�a + �uν(r)

∣∣ (29)

V c(r) = k2

∣∣1 + �a�uν(r)

∣∣ (30)

where �uν(r) (for r: +10◦, +30◦, +50◦) is the unbalancefactor in the corresponding secondary, and constant k2 is

related to the magnitude of the positive sequence in theprimary.

By replacing (28)–(30) into (25)–(27)

V u = k(∣∣1+�uν(+10)

∣∣+∣∣1+�uν(+30)

∣∣+∣∣1+�uν(+50)

∣∣) (31)

V ν = k(∣∣�a+�uν(+10)

∣∣+∣∣�a+�uν(+30)

∣∣+∣∣�a+�uν(+50)

∣∣) (32)

V w = k(∣∣1+�a�uν(+10)

∣∣+∣∣1+�a�uν(+30)

∣∣+∣∣1+�a�uν(+50)

∣∣) (33)

where k = k1k2, and the magnitudes of the phasorial terms in(31)–(33) are functions of the primary unbalance factor and arefound to be

∣∣1 + �uν(r)

∣∣=√

U2νp + 2Uνp cos

(αup + αu(r)

)+ 1 (34)

∣∣�a + �uν(r)

∣∣=√

U2νp+Uνp

(√3 sin

(αup+αu(r)

)−cos

(αup+αu(r)

))+1

(35)

∣∣1 + �a�uν(r)

∣∣=√

U2νp + 2Uνp cos

(αup + αu(r) + 2π/3

)+ 1 (36)

where αu(r) is the phase that corresponds to the secondary r,according to (19), and (Uνp and αup) are the magnitude andthe phase of the primary unbalance. It is important to pointout that the load phase voltages are unbalanced just in termsof magnitude, but the phase shift remains balanced. In fact, theload phase voltages are 120◦ out of phase, and this is ensuredby the modulating references that are used in the gate to turn onand off the inverter stage of the cells. By using this fact and theexpressions given in [4], the previous relations can be given as

2974 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 54, NO. 6, DECEMBER 2007

Fig. 4. Magnitude of the load voltage unbalance factor as a function of the magnitude and phase of the ac mains voltage unbalance factor.

a function of the load line voltages. Thus, the unbalance factorof the load voltages (Uνo and αu0) could be computed as

Uνo =√

Ke − K

Ke + K(37)

αu0 = atan

( √3((V νw)2 − (V wu)2

)2(V uν)2 − (V νw)2 − (V wu)2

)(38)

where K is shown by (39) at the bottom of the page, and itrepresents the area of the triangle that is formed by the linevoltage phasors.

Ke =√

34

[(V uν)2 + (V νw)2 + (V wu)2

3

](40)

and it represents the area of the triangle that is formed bythe line voltage phasors when all the phasor magnitudes areidentical. V uν , V vw, and V wu are the rms load line voltages,considering load phase voltages that are 120◦ out of phasewith the rms magnitudes that are given by V u, V ν , and V w

(31)–(33).Fig. 4 shows the magnitude of the unbalance factor of the

load voltages as a function of the magnitude and phase of theunbalance factor of the input voltages using (31)–(40). It canbe seen that, for a 100% unbalance at the ac input voltages(Uνp = 1 p.u.), at most, just 32% of the unbalance voltageis obtained at the load side. Moreover, depending upon thephase of the unbalance factor at the input αup, up to 75%compensation could naturally be supplied by the topology. Thisprobes the natural buffer operating mode of the topology toreject supply unbalances.

The effects of the unbalances in adjustable-speed drives haveextensively been reported in the literature [11], [13]–[17], andsome critical loads may not tolerate it. The previous resultsshow that the topology naturally filters out the unbalances.However, for those critical loads, an alternative to compensatethe residual unbalance is presented in the following.

VI. CONTROL STRATEGY TO MITIGATE THE RESIDUAL

UNBALANCE AT THE LOAD SIDE

A. Control strategy

It is assumed that every cell is gated using a carrier-basedPWM type of modulation. Thus, a triangular carrier and asinusoidal reference are needed in every cell. The triangularamplitude of the waveform defines the rms output voltage ofthe cell, and it is used in a feedforward scheme to compensatethe residual unbalance. This is achieved by sensing the dc linkvoltage of the cell and by accordingly modifying the amplitudeof the carrier before it is compared with the modulating signal.Thus, all the cells will generate identical fundamental ac outputvoltages. An alternative for the implementation of the schemeis given in Fig. 5.

It is important to point out that, in order to have the com-pensating capability, the modulation index cannot be equal toone; otherwise, sags will not be possible to compensate withoutavoiding overmodulation. On the other hand, operating at a verylow modulation index decreases the dc-link voltage utilizationfactor and deteriorates the voltage waveform quality. Therefore,a tradeoff is required to set a maximum modulating index (inthis paper, it is set to 0.8). Because the strategy is based ona feedforward approach, zero unbalance at the load side isnot totally expected. The experimental results will confirm thisissue.

K =

√2 ((V uν)2(V νw)2 + (V νw)2(V wu)2 + (V wu)2(V uν)2) − (V uν)4 − (V νw)4 − (V wu)4

4(39)

BAIER et al.: PERFORMANCE EVALUATION OF MULTICELL TOPOLOGY WITH NONREGENERATIVE CELLS 2975

Fig. 5. Proposed feedforward control strategy to mitigate the residual unbalance at the load side.

B. Input Current Performance Improvement

A secondary effect when using the feedforward scheme isthe improvement of the input currents in terms of balancingand reducing the distortion. Two reasons will explain this fact.First, the scheme changes the phases of the negative sequencecomponents of the secondaries, which, in turn, reduces thenegative sequence in the primary side (Fig. 3). Second, thehigher positive sequence in the secondaries in order to balancethe output power, as performed by the feedforward scheme,turns out in a higher positive sequence in the primary side. Infact, in a steady state, by equalizing both ac input and outputinstantaneous powers and by assuming a large capacitor size,one can write for a set of three cells Ia

(+10)

Ib(+10)

Ic(+10)

= ks1

Iu

o

Iνo

Iwo

= kdiag{s1u, s1ν , s1w}

Iu

o

Iνo

Iwo

(41)

where s1u, s1ν , and s1w are the switching functions that cor-respond to the cells that provide power to phases u, ν, and w,which are fed by the first secondary shifted δ = +10◦; Ia

(+10),

Ib(+10), and Ic

(+10) are the magnitudes of the secondary currents(r = +10); and Iu

o , Iνo , and Iw

o are the magnitudes of the loadcurrents. We can build the symmetrical components for thesecurrents as (42) and (43), shown at the bottom of the page, ifwe know the amplitudes of the secondary currents (41).

If there is an unbalance that lowers the output volt-age of a given cell, the compensating feedforward approach

Fig. 6. Implementation of a nine-cell converter as in Fig. 1. (a) Multicellarrangement. (b) RL load. (c) PC host for the DSP TMS320C30. (d) Opticfiber driver. (e) Data acquisition and oscilloscope. (f) Power supply with nineisolated dc outputs.

will increase the switching function average component,and—according to (41)—an increment in the magnitude ofthe fundamental component of the secondary current will takeplace. By considering (42) and Fig. 3(b), the increment of thepositive sequence becomes a considerable contribution to thepositive sequence of the primary current. Differently, the neg-ative sequence increases due to the different amplitudes in theinput of each set of cells. This effect occurs in both without and

�ip(+10) =(

13

(Ia(+10) + Ib

(+10) + Ic(+10)

),+10◦

)(42)

�in(+10) =

(13

√(Ia(+10)

)2

+(Ib(+10)

)2

+(Ic(+10)

)2

− Ia(+10)I

b(+10) − Ib

(+10)Ic(+10) − Ic

(+10)Ia(+10)

× atan

( √3(Ib(+10) − Ic

(+10)

)2Ia

(+10) − Ib(+10) − Ic

(+10)

)(+10)◦

)(43)

2976 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 54, NO. 6, DECEMBER 2007

TABLE IPARAMETERS AND RESULTS OF THE SEVERAL EXPERIMENTAL TESTS

Fig. 7. Test 1. AC mains with balanced voltages. (a) AC mains line inputcurrents. (b) Load phase voltages. (c) Load phase voltage spectra.

with compensations. Moreover, the compensation may cause alarger negative sequence, but, because the phasors are not inphase, the overall negative sequence does not proportionallyincrease, as shown in Fig. 3(a) and (43).

VII. EXPERIMENTAL RESULTS

The topology that is shown in Fig. 1 has been implemented,and a general view is shown in Fig. 6. The multicell prototypewas designed to operate with 100 V maximum in each dc linkand to provide a maximum load current of 6 A. The modulatingtechnique and control algorithms are implemented in a DSPTMS320C30 [Fig. 6(c)]. The gating signals that are generatedby the DSP system [Fig. 6(d)] are sent to the driver of eachcell via a fiber optic in order to electrically isolate the controland power stage and to reduce the noise-based troubles. Eachcell [Fig. 6(a)] works with a switching frequency of 550 Hzin the inverter stage. This leads to a first set of unwantedharmonics at 2 · 3 · 550 = 3.300 Hz in the load voltages due

Fig. 8. Test 2. AC mains with 10% unbalanced voltages. (a) AC mains lineinput currents. (b) Load phase voltages. (c) Load phase voltage spectra.

to the appropriate carrier signal phase shift that is used by themodulating technique algorithms [2].

The natural compensating capabilities of the topology andthe additional improved features that are achieved by usingthe proposed feedforward technique were tested by performingthree tests. In particular, the first test is used to obtain theperformance indexes under an ideal ac mains. The parametersand the results are summarized in Table I, and key waveformsare shown in Fig. 7. Clearly, the input currents are balanced,and near sinusoidal waveforms have a total harmonic distor-tion (THD) of about 8%, which is expected for a total of18 pulses type of configuration from the ac mains side. Theoutput voltages present a small unbalance of about 0.6% dueto the small differences in the input line voltages, althoughthe supply is provided by an electronic three-phase ac source.The second test considers an unbalanced ac mains of about10%, with similar parameters to the test one. The results aresummarized in Table I, and key waveforms are depicted inFig. 8. In this case, the input currents are unbalanced and featurea THD of about 17%, and despite the 10% of unbalance in

BAIER et al.: PERFORMANCE EVALUATION OF MULTICELL TOPOLOGY WITH NONREGENERATIVE CELLS 2977

Fig. 9. Test 3. AC mains with 10% unbalanced voltages and feedforwardcontrol strategy. (a) AC mains line input currents. (b) Load phase voltages.(c) Load phase voltage spectra.

the input voltages, the load voltages feature 5.6%. This resultconfirms the theoretical analysis, as shown in Fig. 4, and is dueto the compensating feature of the topology. Finally, the thirdtest also considers an unbalanced ac mains of about 10%, withsimilar parameters to the test one, but includes the feedforwardcontrol strategy in order to mitigate the residual load voltageunbalance. The results are summarized in Table I, and keywaveforms are shown in Fig. 9. Clearly, the fundamental loadvoltage unbalance is reduced to near zero, and the input currentsfeature a THD of about 14%, which is lesser than the 17% of theprevious case. This is because the currents unbalance improvesfrom 3.8% (test 2) to 1.3% (test 3) and confirms the improve-ment on the input current indexes due to the feedforward controlstrategy.

VIII. CONCLUSION

The multicell topology that is implemented with cells thatfeature a single-phase nonregenerative input stage naturallycompensates the voltage unbalance that is present in the acmains. In fact, the analysis shows that, for 100% unbalance inthe supply voltages, a maximum of 32% unbalance can get tothe load. The study is based on the unbalance factor, which iscomputed from the symmetrical components, and its magnitudeand phase are considered. To mitigate the residual unbalance, afeedforward control strategy is used. A near-zero fundamentalunbalance voltage factor is then achieved at the load side whileimproving the performance of the input ac currents in terms of

unbalance and distortion. However, it is required to operate thecells with a reduced dc-link voltage utilization in order to avoidovermodulation under phase voltage sags. Experimental resultsprove the theoretical considerations.

REFERENCES

[1] P. W. Hammond, “Enhancing the reliability of modular medium-voltagedriver,” IEEE Trans. Ind. Electron., vol. 49, no. 5, pp. 948–954, Oct. 2002.

[2] J. Rodriguez, P. W. Hammond, and J. Pontt, “Operation of a medium-voltage drive under fault conditions,” IEEE Trans. Ind. Electron., vol. 52,no. 4, pp. 1080–1085, Aug. 2005.

[3] M. Pérez, J. Espinoza, J. Rodriguez, and P. Lezana, “Regenerativemédium-voltage AC drive based on a multicell arrangement with reducedenergy storage requirements,” IEEE Trans. Ind. Electron., vol. 52, no. 1,pp. 171–180, Feb. 2005.

[4] J. Rodriguez, J. Pontt, S. Kouro, and P. Correa, “Direct torque controlwith imposed switching frequency in an 11-level cascaded inverter,” IEEETrans. Ind. Electron., vol. 51, no. 4, pp. 827–833, Aug. 2004.

[5] J. Rodriguez, J. Pontt, P. Correa, P. Cortez, and C. Silva, “A new modu-lation method to reduce common-mode voltages in multilevel inverters,”IEEE Trans. Ind. Electron., vol. 51, no. 4, pp. 834–839, Aug. 2004.

[6] P. C. Loh, D. G. Holmes, and T. A. Lipo, “Implementation and control ofdistributed PWM cascaded multilevel inverters with minimal harmonicdistortion and common-mode voltage,” IEEE Trans. Power Electron.,vol. 20, no. 1, pp. 90–99, Jan. 2005.

[7] P. Lezana, L. Morán, and J. Pontt, “Zero-steady-state-error input-currentcontroller for regenerative multilevel converters based on single-phasecells,” IEEE Trans. Ind. Electron., vol. 54, no. 2, pp. 733–740, Apr. 2007.

[8] J. Rodriguez, L. Morán, and J. Pontt, “High-voltage multilevel converterwith regeneration capability,” IEEE Trans. Ind. Electron., vol. 49, no. 4,pp. 839–846, Aug. 2002.

[9] S.-G. Jeon, “Representing line voltage unbalance,” in Proc. 37th IASAnnu. Meeting, Pittsburgh, PA, Oct. 3–18, 2002, vol. 3, pp. 1724–1732.

[10] S.-G. Jeon and J.-Y. Choi, “Line current characteristics of three-phase un-controlled rectifiers under line voltage unbalance condition,” IEEE Trans.Power Electron., vol. 17, no. 9, pp. 935–945, Nov. 2002.

[11] A. Von Jouanne and B. Benerjee, “Assessment of voltage unbalance,”IEEE Trans. Power Del., vol. 16, no. 4, pp. 782–790, Oct. 2001.

[12] M. A. Perez, C. R. Baier, J. Espinoza, and J. Rodriguez, “Analysis of amulti-cell converter under unbalanced AC sources,” in Proc. IEEE PESC,2005, pp. 1011–1017.

[13] C.-Y. Lee, “Effects of unbalanced voltage on the operation performanceof a three-phase induction motor,” IEEE Trans. Energy Convers., vol. 14,no. 2, pp. 202–208, Jun. 1999.

[14] R. F. Woll, “Effect of unbalanced voltage on the operation of polyphaseinduction motors,” IEEE Trans. Ind. Appl., vol. IA-11, no. 1, pp. 38–42,Jan./Feb. 1975.

[15] H.-S. Song and I.-W. Joo, “Source voltage sensorless estimation schemefor PWM rectifiers under unbalanced conditions,” IEEE Trans. Ind.Electron., vol. 50, no. 6, pp. 1238–1245, Dec. 2003.

[16] K. Lee, G. Venkataramanan, and T. Jahns, “Modeling effects of volt-age unbalances in industrial distribution systems with adjustable speeddrives,” in Conf. Rec. IEEE IAS Annu., Meeting, Oct. 3–7, 2004, vol. 4,pp. 2579–2586.

[17] M. Bollen and L. Zhang, “Analysis of voltage tolerance of AC adjustable-speed drives for three-phase balanced and unbalanced sags,” IEEE Trans.Ind. Appl., vol. 36, no. 3, pp. 904–910, May/Jun. 2000.

Carlos R. Baier was born in Temuco, Chile, in 1979.He received the B.S. and M.Sc. degrees in electri-cal engineering from the University of Concepción,Concepción, Chile, in 2004 and 2006, respectively,where he is currently working toward the Ph.D.degree in electrical engineering.

His research interests include improved controltechniques for multicell converters and implementa-tion of low-cost control systems for medium-voltageconverters.

2978 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 54, NO. 6, DECEMBER 2007

Johan I. Guzmán was born in Chile in 1976. Hereceived the M.Sc. degree in electrical engineeringfrom the University of Concepción, Concepción,Chile, in 2003, where he is currently working towardthe Ph.D. degree.

His research areas are modulation and control oflarge ac–dc and dc–ac converters.

José R. Espinoza (S’92–M’97) was born inConcepción, Chile, in 1965. He received the Engi-neer degree in electronic engineering and the M.Sc.degree in electrical engineering from the Univer-sity of Concepción, Concepción, Chile, in 1989 and1992, respectively, and the Ph.D. degree in electricalengineering from Concordia University, Montreal,QC, Canada, in 1997.

Since January 2006, he has been a Professor withthe Department of Electrical Engineering, Universityof Concepción, where he is engaged in teaching

and research in the areas of automatic control and power electronics. Hehas authored or coauthored more than 100 refereed journal and conferencepapers and has contributed to one chapter in the Power Electronics Handbook(Academic, 2007).

Marcelo A. Pérez was born in Concepción, Chile,in 1976. He received the Engineer degree in elec-tronic engineering and the M.Sc. and D.Sc. de-grees in electrical engineering from the University ofConcepción, Concepción, in 2000, 2003, and 2006,respectively.

He is currently a Postdoctoral Researcher in thearea of efficiency improvement in multilevel con-verters with the Universidad Técnica Federico SantaMaria, Valparaíso, Chile.

José R. Rodríguez (M’81–SM’94) received the En-gineer degree in electrical engineering from the Uni-versidad Técnica Federico Santa Maria (UTFSM),Valparaíso, Chile, in 1977, and the Dr.Ing. degreein electrical engineering from the University ofErlangen, Erlangen, Germany, in 1985.

Since 1977, he has been with UTFSM, where he iscurrently a Professor and Rector. During his sabbati-cal leave in 1996, he was responsible for the miningdivision of Siemens Corporation, Chile. He has ex-tensive consulting experience in mining, especially

in the application of large drives, like cycloconverter-fed synchronous motorsfor semi-autogenous grinding (SAG) mills, high-power conveyors, controlleddrives for shovels, and power quality issues. His research interests are mainlyin the area of power electronics and electrical drives. In the last few years,his main research interests have been multilevel inverters and new convertertopologies. He has authored or coauthored more than 130 journal and confer-ence papers and contributed to one chapter in the Power Electronics Handbook(Academic, 2007).