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1 ©2014 TCX Inc
Successful Entrepreneurship
for Microsystems
Rakesh Kumar, Ph.D., Life Fellow IEEE
April 16, 2014
858.945.3758
Teaching assistant – Kashyap Tumkur [email protected]
http://cse.ucsd.edu/~ktumkur
Tutor – Pavan Kumar [email protected]
Course presented at UCSD CSE 190, Spring Quarter 2014
Day 3_2
12 ©2014 TCX Inc
Digital 6th Sense… Augmentation of human ability
NOW the LOCATION
SENSE the user’s MOTION
SEE the user’s ENVIRONMENT
HEAR the user’s SURROUNDINGS
Ref: Qualcomm Analyst Day, November 20,2013
16 ©2014 TCX Inc
Smartphones drive diverse technologies
User Experience
Low Cost
Battery Life Low Power
Compact
Performance Architecture, SW, Design, …
FC + WB stack
TSV + FC stack TSV system stack
More Moore
More than Moore
MEMS Sensors
Ultrabook PCs also drive diverse technologies
17 ©2014 TCX Inc
0.001
0.01
0.1
1
10
100
1000
1970 1975 1980 1985 1990 1995 2000 2005 2010
Year Source: IC Knowledge, ISSCC, TCX
Tra
nsis
tors
per
Ch
ip, M
Min
imu
m F
eatu
re S
ize, u
m
More Moore
…Transistor complexities have doubled every 2 years
System Co.’s – IBM, Hitachi, Sony, Philips, Unisys,…
Semiconductor Co’s – Fairchild, T.I., Motorola, National, Intel, Toshiba, …
Fabless Co.’s
MF µP PC iNet Cellular
+43% / year
Moore’s Law 2x / 12mos…1965-70 2x / 18mos,,,1970-90’s
2x / 24mos…now
-13% / year
18 ©2014 TCX Inc
ECONOMIC challenges are threatening
Increased Cost of Capital, R&D, Design
Sources: imec Sematech intel tsmc umc asml
McKinsey & Company 4
Working D
raft -Last Modified 4/18/2011 11:19:18 A
MP
rinted 10/13/2010 8:56:28 PM
|
Costs associated with node progression have been rising significantly
6,700
4,850
4,000
2,500
1,800
1,450
22nm32nm45nm65nm90nm130nm
+36% p.a.
Fab cost
$ Millions
Process development cost
$ Millions
Chip design cost including fabless
overhead costs*
$ Millions
SOURCE: Press Reports; iSuppli; ICKnowledge; GSA; WorldFabWatch; ITRS
Estimated
cost CAGR
Percent
16 18 17 21 25 25
1,300
900
600
400
310250
22nm32nm45nm65nm90nm130nm
+39% p.a.
150
100
60
34
24
15
22nm32nm45nm65nm90nm130nm
+58% p.a.
* Chip design cost includes product R&D cost (design, verification & photomask) and other fabless costs (overhead, IP licensing, etc.)
>30% ~40% ~60%
20 ©2014 TCX Inc
So, if you had an idea, what should you do? …entrepreneurship creation
ElectronicsIdea
End-product
~1300 fabless IC companies worldwide
Software or Board level
product
License IP
Fabless I.C. company
Internal Development
at an IDM
Existing New
Standard, Technology
Market Customer Base
..but, only a very small fraction of fabless start-
ups are successful!!
Opportunities - Entrepreneurial
21 ©2014 TCX Inc
Create product that solves a real Customer Problem…
A “must-have” for the customer …a Differentiated solution
Top reasons for failure – Fabless Startups
No customer engagement until it’s too late
Not understanding and meeting customer expectations
Overly aggressive product specifications
The “kitchen-sink syndrome”
Poor management of the Supply Chain
A systematic approach to planning and execution
22 ©2014 TCX Inc
Typical ASIC Development Cycle
ASIC DESIGN Proto Prod Ramp Hi Volume
Year 0 Year 1 Year 2
Software α
Software β
Software Prod.
Initial Silicon
Initial Silicon Ramp
Initial Product Ramp
Volume Production
Start Design Tapeout ESProd
HW/SW LaunchQS
FPGA
Ref Board
SW
23 ©2014 TCX Inc
The New Focus
Ref: https://www.youtube.com/watch?v=EOhzUMseaHs
25 ©2014 TCX Inc
Please review the following video:
https://www.youtube.com/watch?v=EOhzUMseaHs
What are the top 3 learnings from Ash Maurya’s Introductory video?
Why do you consider these important
…a 1-page summary.
HW 4 – Vetting Product Ideas Due on Wednesday, April 23rd