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902 - elektor september 1975 publisher's notices

EPS rrinT serince

Many Elektor circuits are accompanied by designs for printed circuits. ForThose who do not feel inclined to etch their own printed circuit boards,

number of these designs are also available as ready -etched and predrilledboards. These boards can be ordered from our Canterbury office.Payment, including £ 0.15 p & p, must be in advance.Delivery time is approximately three weeks.Bank account number: A/C No. 11014587, sorting code 40-16-11Midland Bank Ltd, Canterbury,

circuitaustere° 3-viett amplifieraustere° power supplyaustere° control amplifieraustereo disc preemPuniverssl frequency referencedistortion meteraid convertertap sensorminidrum gyratorminidrum miser/preampminidrum noisebeetleequa amplifierelectronic loudspeakermos-tellCar power supplydigital rev counter (control p.c.b. only!car anti -theft alarmmos clock 5314 clock circuitmos clock 5314 display board

minidrum tapminidrum ruffle circuitautomatic bassdrummicrodrumaerial hidwitless receiver for MW and LWtun primptwin minitron displaytwin led displaytwin decade counterresin -rimdisc primp 76131maxi displaydil-led probebig ben 95compressortv soundtup/tun testertug/tun tester from panelP.c.b. and wiring testerrhythm generator M2527400 sirenCA3090AQ stereo dekoderkitchen timer°Keegan. meter

NEW:

circuitedwin amplifierminiature amplifierINht dimmerversatile digital clockcar clock 12 boards)car clock front panel (trans..nt redplastic)

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eLemerurVolume 1 - number 6

Editor W. van der HorstDeputy editor P. Holmes

Art editor : C. SinkeDrawing office : L. MartinSubscriptions : Mrs. A. van Meyel

UK. Staff:Editorial : T. EmmensAdvertising : P. Appleyard

Editorial offices, administration and advertising:6 Stour Street, Canterbury CTI 2X2.Tel. Canterbury 10227) - 54430.Telex: 965504.

Hairier has been published every two months untilAugust 1975) it now app..: monthly.Copies can be ordered from our Canterbury office.The subscription rate for 1975 is £ 3.60 (incl. p & phthe first gem (Nov/Dec 1974) will be included in thisat no additional cost.Single copies: £ 0.35 (not incl. p & p).

Subscription rates (airmail):

Australia/New Zealand - 8 issues £ 7.20European countriesoutside UK - 8 issues £ 5.20USA - 8 issues £ 6.25All other countries - 8 issues E 640

Subscribers are requested to notify a change ofaddress four weeks in advance and to return envelopebearing previous adress.Members of the technical staff win be available toanswer technical queries (relating to articles publishedin Elector) by telephone on Mondays from 14.00 to16.30.Letters Mould be addressed to the departmentconcerned: TQ = Technical Queries: ADV - Advertise-ments) SUB s Subscriptions: ADM = Administration:ED = Editorial (articles submitted for publication etc.);EPS = Elektor printed circuit board service.

The circuits published are for domestic use only. Thesubmission of designs or articles to Elektor impliesperxtmission to the publishers to alter and translate thete and design, and to use the contents in otherElektor publications and activities. The publisherscannot guarantee to return any material submitted tothem.All drawings, photographs, printed circuit boards andB.C. published in Elektor are copyright and maynot be reproduced or imitated in whole or partwithout prior written permission of the publisher.

All prices include VAT at the rate shown in brackets.Copyright © 1975 Herter publishers Ltd - Canterbury.

Printed in the Netherland.

elektot optamber 1975 - 90311

contents

sMaktor 905

W ain amplifier 910Teas is a simian for a high -quality 40 W audio amplifier based on an orlier 20 W diffign. The amplifier embodieslone weal design features and the construction is problem -free.

minimise -0 amplifier 917The dm. Mil operate horn a 4.5 V battery and can be used to amplify the output of a crystal pickup to drivea owe loudspeaker or headphones. TM circuit is not outstanding for its power or quality, but it is ,impel, andadses

versatile digital clock 918ovvrivir digital docks, such as the MM5314 (Elektor 1, p. 241, are excellent for simple time -keeping. HowN ea they re not ideal for driving external devices such as time signah, calendars, etc. This is where a 'conwntixor dock design with standard TTL ICs scores, it has a BCO-coded time output, as well as pulse train out-puts winrq repetition rates varying from one per second to one per day.

phasing - G. Knapienski and F. Mitschke 922Nowadays there area greet number of methods of producing unusual electronic sound effects. A favouriteOhio n 'PMsirg' and in this article this Is accomplished, somewhat unusually, by using a 'path filter'.

disco lights 924Vassoos kinds of psychedelic ,Inning light display can be generated easily using logic shift registers. Severalcreams are discuss. here of varying complexity.

Obi 927The OTA lOperational Transconductance Amplifier) is a new type of operational amplifier. The gain can bedieermined externally by the value of the output load roister, and by the weaned bias current. The latter'm.n a possible to control the gain instantaneously over a range of about 80 dB by an external potential.Ser. the OTA will he used in several Elektor projects, an explanation of the working principles of this deviceW ould prow useful.

fish feeder - F. Sax 931The ore of aquaria during holidays can be something of a problem. However the device described here willOvercome this problem by aummetically dispensing the required quantity of feed each day.

01 -stable - J. Koper 933roll out the bandit - L. Wiechers 934The chsadvantage of the Ihree-ey. bandit' 15 lektor No. 2 page 2381 is that a stop button must be primed toP on the three oscillators and obtain the final display. Thus the tension and anticipation obtained with a reelonemmed bandit as the number drums slowly grind to a hen is missing. The circuit described here overcome.Ms by providing an output whose frequency slowly redoces until it finely eons.

light dimmer 935dual slope dm - H. L. Krielen 936A design is described fora basic 7th digit digital voltmeter using the dualalope integration principle. TM DVMhie a full-scale sensitivity of 199 mV, but may be extended at the constructor's option.

legs - A. Schulz 942A LOP (light emitting pistol) with electronic time and hit indimtion offers the possibility of moving the weak]"air attraction 'the shooting stall. to the living -room

bicycle trafficator - N. Beun 94430 mhz amplifier - W. Kiimmel 945Ten input threshold voltage of TTL ICI lies between 1.8 and 3 volts. This simple transistor amplifier can bewed to amplify relatively bw-leval signets to a level suitable for driving frequency counters and Otherequipment.

car clock 946The E urosil E11091C offers the possibility of a single -chip digital clock Operating directly from a ereetei refer- nce. Using this IC a compact clock can be constructed which is eminently suitable as a car clock or portabledock.

market 949the missing link 952

elektor september 1975 - 905seueillurAutomatic tester for mono and

iistereo broadcast circuits

For regular interchange of programmes,broadcasting organizations use specialprogramme circuits placed at theit dis-posal by the telephone administrationseither as permanent connections or, ifthey cross national borders, as tempor-arily established transiniceion paths.Until now, assessment of the quality ofsuch citcuits was performed manuallyand met with some difficulties, es-pecially in the case of internationalprogramme transmision (non -uniformtest methods, different test instruments),as well as being unsatisfactory withregard to the time required for lining -up.With automatic tester K 1060, Siemensare now offering an instrument for auto-matic quality supervision of mono andstereo programme circuits.The automatic tester, designed accord-ing to the most recent CCITT rec-ommendation for programme circuitsfrom 30 Hz to 16 kHz, consists of atransmitter and receiver, each contain-ing a test and control unit, and a high-speed recorder. Among other things, theweighted (psophometric) and un-weighted noise, non-linear distortions,level step, frequency response, leveldifference and sum level, phase differ -

and crosstalk can be assessed. Twomain routines (mono and stereo) andnine sub -routines are available. Theautomatic test routine for mono cir-cuits, including printout of the record,takes only about 133 seconds, whilethat for stereo circuits takes about 370seconds.The test unit of the transmitter containstwo spot -frequency generators and afunction generator which supplies vari-

ous spot -frequencies at certain inputvoltages; a frequency sweep from 30 Hzto 16 kHz is achieved by using a variabledo voltage. This de voltage increasesexponentially, producing a logarithmicfrequency sweep. In addition to this,beginning at 50 Hz a pulse is added tothe signal at each octave, the recorderregistering the pulse as a frequencymarker. The output voltages of thethree generators are supplied individu-ally or in a combination, depending onthe test mode, to an amplifier; they arethen set automatically by means of vari-able attenuators to the exact value re-quired in each case. The outputs forchannels A and B are balanced andBoating. For monitoring purposes, thetest routine in progress can be followedover the built-in loudspeaker or overearphones. The control unit of thetransmitter, which is equipped with aclock generator, is used for automaticstep-by-step execution of the test rou-tine.The test unit of the receiver has twobalanced floating transformer inputsof identical design for channels A andB. The test circuit for channel A hasattenuators in front of and behind theamplifier which can be cut in auto-matically according to the test mode.These are followed by various filtersfor weighted and unweighted measure-ment of noise, non -linearity and cross-talk. The signal is applied via a furtheramplifier to the rectifier, whose outputvoltage is passed through a logarithmicnetwork to obtain level -linear indicationon the recorder. Here again, the testroutine can be monitored over the built-in loudspeaker or over earphones. Thetest circuit for channel B is similar indesign to that for channel A. As in thecase of the transmitter, the control cir-cuit of the receiver is equipped with aclock generator, and in addition to thisit has automatic start -signal selectionfacilities.A high-speed recorder is connected tothe output of the receiver to record thetest result. The utilized recording widthis 100 mm, corresponding to a range of20 dB for level measurement and 50angular degrees for phase -differencemeasurements.

Modem without modulation

For the transmission of data signals overswitched telephone networks, modemsare used to modulate the do signals onthe send side and to demodulate themon the receive side. If dedicated circuitsare used, however, which is especiallyfavourable over short distances - in con -

111111111111

equipment can be used which operateswithout modulation and which is there-fore less complex. One device of thiskind is the Modem NIO developed bySiemens, which uses direct -current key-ing for transmission.The Modem NIO is suitable for datatransmission over metallically coupledtwo - or four -wire line% at bit rates ofup to 9600 bit/s. The device has nofixed code or speed and permits allconventional operating modes -simplex, half -duplex and duplex oper-ation. This last mode is alsopossible over two -wire lines, whichsubstantially reduces line costs. Themaximum range is rated - dependingon operating mode and speed - at al-most 30 km. Under adverse operatingconditions and with a bit rate of 2400bit/s the error rate is only 10'out of 100 million characters one maybe falsified.The device may also be used for multi -point operation. In this mode, onecontrol station transmits over onlyone line to a number of outstations.A station address is previously speci-fied, so that the message is only evalu-ated by the data terminal for which itis intended; if necessary, this can thenreturn an answer to the control station.The operational integrity of the ModemNIO can be checked at any time withthe aid of the built-in test facilitywithout further aids. The interface tothe data terminal corresponds to therelevant CCITT Recommendations, sothat the modem can interoperate,without matching problems, with thesame data terminals as the modemsemployed for the speed range up to9600 bit/s over switched telephone

PIO - eisktor septemear 1975 Weis amplifier

The Edwin amplifier is unusual in that itembodies two types of output stage inone amplifier. A class A output stagehandles the low level signals and alsoserves as a driver fora class B stagewhich handles the larger outputs.The principle of operation is shown infigure 1. T2 and T3 are biased on bythe voltage drop across the diodesDl-D3. 72 and T3 function as a class Astage at low signal levels supplyingcurrent to the load via resistors R. As thesignal is increased the voltage drop acrossthese resistors becomes sufficient tocause T4 and T5 to conduct and theclass B part of the output stage begins tooperate. Crossover distortion is quitelow with this type of design.

The complete circuitAs figure 2 shows, the complete amplifier

circuit consists of a voltage amplifier, aclass A driver stage and a class B outputstage. The input stage consists of T1 andT2 in a Darlington configuration, resulting in a high input impedance. Thesignal passes to the base of T3 via thelimiting resistor R4. T3 operates as avoltage amplifier and in its collectorcircuit has T4, which is conceded as asimulated rr diode to provide aconstant d.c.enebias voltage of about 2 Vacross the bases of the driver transis-tors T7 and TI. Feedback is applied be-tween the output and the junction ofRI I and 1112 to provide a high collectorimpedance so that true current drive isachieved. This helps to reduce crossoverdistortion still further so that despite thesmall amount of overall negative feed-back and the absence of quiescent cur-rent in the output stage the distortionfigures are very good.

features- output power from

10-40 W depending onpower supply.

- high efficiency.- low crossover

distortion.- short circuit proof.- no quiescent current in

the output transistors.

- output transistors anddrivers need not bematched.

- unconditionally stable.

figures

- Sensitivity:1 V (RMS).

- Input impedance:45 kll.

- Distortion:1 kHz, 30 W: 0.1%,10 kHz, 30 W: 0.3%.

- Power bandwidth:20 Hz - 100 kHz.

- S/N ratio:> 90 dB.

Figure 1. Bait circuit of an Edwin -typeoutput stage.

Figure 2. Final circuit of the Edwin amplifierfor output p.n.s up to 40 W.

Figure 3. The power supply.

Figure 4. Graph of available output powerversus transformer secondary voltage for 412and 812 loads.

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edwin amP55er elektor september 1975 - 919

The a.c. gain of the amplifier is, ofcourse, given by

Av _ V,;imut _ Rio:sits

It is worth noting the effect of the com-bination R7, C5 on the operation of theamplifier. Some amplifiers, when usedwith an unstabilised supply, displayripple on the peaks of the waveformwhen driven to clipping. This is elimin-ated by R7 and C5 as follows. When theamplifier is being driven, current flowsthrough R7 and the voltage on C5 isalways below the ripple 'troughs' on thesupply. The drive voltage available fromT3 is limited to the voltage on C5 andthe output of the amplifier can neverswing into the ripple region of thesupply voltage. R7 also limits the currentthrough T3 in the event of an overload.

Overload protectionThe protection circuit is designed toprevent excessive current peaks fromoccurring during signal overloads orshorbcircuiting of the output. The pro-tection circuit consists of transistors T5and T6. Their base bias is set such thatunder normal operating conditions thevoltage across R20 and R2I is insuf-ficient to turn them on. In the event ofexressive output current flowing in R20or R2I, due to a signal overload or ashort-circuited output, the voltage acrossthese resistors is sufficient to cause T5or T6 to conduct. This reduces the drivevoltage to the output stage and there-fore limits the output current, thusprotecting the amplifier.

Power supplyA stabilised power supply is unnecessarywith the Edwin amplifier, as its perform-ance will not be significantly improved.A simple unregulated supply is quiteadequate and two suitable circuits aregiven in figure 3. Figure 3a shows asupply using a normal full -wave bridgerectifier, whilst figure 3b shows a full -wave rectifier with a centre -tapped trans-former.The component values and specificationfor supplies suitable for 20, 35 and 40 Wversions of the amplifier are given intable 1. Of course any suitable trans-former may be used, there is no need toadhere to the exact voltages specified.Figure 4 gives the output power availableversus transformer secondary voltage.The only points to watch am that thecurrent rating of the transformer isadequate for the required output power,that the voltage rating of the smoothing

Table I

capacitor is sufficient and that theRMS secondary voltage of the trans-former does not exceed 33 V on load,otherwise the voltage rating of the tran-sistors may be exceeded.Over the range of supply voltages givenin figure 4 nothing need be changedin the amplifier as the operating pointis self-adjusting.

Performance figuresThe performance figures, as measured onthe 35 W prototype of the amplifier aresummarised in table II and displayedgraphically in figures 5, 6, 7, and 8. Ascan be seen they are quite exceptional.Among the outstanding features are thelarge power bandwidth, good signal tonoise ratio, immunity to transients, lowdistortion and absolute stability, evenwith large capacitive loads.Figure 9 shows the printed circuit boardand component layout of the amplifier.

'n ,,,,,, (W)(FIL = 4 Ohm)

V,rRMS

It,. maxfigure

\Mono

(Al3b

MonoStereo

igure 3a

Stereo

Cl Powersupplyno-loadvoltage(VI

ug

Mono Stereo

workingvoltage(V)

42 33 1,1 2,2 4,5

2500 5000

60 46,5

35 30 1 2 4 50 42,5

21 24 0,8 1,5 3 40 34

914 - elektor september 1975 edwrin amplifier

elektor september 1975 - 915

9

fr I LILwelb

-0

Components lid for figures 2 and 9

Resistors:91=10 k,OWR2= 82 k,63=100 k,XWRO65.914.915 = 100. W

96.14897.812 -220,14 W09- 330,%WRIO =1911 = 1k5,14 W913,1116 = 8112,1e W617.018,919 10, 1, W920,921 = 0.12, 2 W

Capacitors:Cl =C2 =C3 = 100C4 =10 P ceramicC5 - 250 0. 50 V

= 2500p, 50=

Semiconductors:T1,T2 - BC 107, BC 171TT34,,,T5

80138TB-

BC 140

BC 1713,130 158T7 = 80 137T9,TIO = 293055. BD 130DI = BY 127

Reime 9. Printed pimp, bowd and -.P.nent

916 - alaktor eaptember 1975 ad v. amp.

10

Length

42Wati

25Watt

21Wen

VP.=100mrn

+mama.son 15mm

50ram

Heatsink for two outputtrannisInrs

2

Heel=

Cooling fin fora ilrMar transinor

2

Tem 10 Hansink details for the driver andoutput vanes..

The driver transistors are mounted on theboard, with a cooling fin as detailed infigure 10a. The output transistors aremounted on a separate extruded alu-minium heatsink, details of which aregiven in figure 1017 and the associatedtable. Most manufacturers of heatsinkswill have something similar to this intheir range.If resistors R20 and R21 are not readilyobtainable they may be wound fromsuitable resistance wire. Alternativelywire eight 1 12 0.25 W resistors in parallel,there is plenty of space on the board tomount them vertically (figure II).

Concluding remarksWhilst the Edwin amplifier meets anexacting specification this is no reasonto recommend its construction by theHi-Fi enthusiast. There are many otherdesigns with similar performance. Whatmakes the amplifier eminently suitablefor the amateur is its problem -free con-struction and virtual (electrical) inde-

h...ktnictibility.

Table II

Performance figures of 35 W version

Maximum output power 36 W (4 0); 20W 1812145W 14121; 27 W18121

f = 1 kHz, THO - 1 %THO = 101P

Efficiency >60% f - 1 kHz; P. = 35 W

Load impedance 0 ....(Maximumpower into 4121

Overload protection Proof against longduration short-circuit

Maximum capacitive load >100 µF Ill

Sensitivity .1 V HMS f = 1 kHz. P. = 35 W

Input irrIPM19.919 m45 1,12

Distortion0,1%0,2%0,3%

P. = 0... 30Wf = 1 kHzf = 30 Hzf = 10 kHz

Frequency response 25 Hz... 1,2 MHz 1-3 dB)40 H....1,0 MHz (-1 d13)

Vip= 245 mV

Power bandwidth >100 kHz 1-3461

Noise rejection 73 dB93 dB

input open -circuitinput short-circuit

Signal to noise ratio 95 dB>105dB

input open -timeinput shorncircuir

Feedback factor .36 dB

Stability unconditional

miniature 'mamma etaktor September 1975 - B17

The input and driver stages TI and T2operate as voltage amplifiers. The out-put stage, T3 and T4, operates in class Bto achieve Meg battery life. D.C. feed-back is provided by means of R3 andA.C. feedback by means of R3, R4 andC2. This defines the gain, stabilises theoperating point and increases the inputimpedance.The biassing of TI is critical and thevalues for RI and R2 must be adheredto. Should the circuit fail to operate cor-rectly the D.C. conditions may bechecked at the base of 13 and T4 andthe junction of R6 and R7.If 25 ohm loudspeakers are difficult toobtain, then 8 or 15 ohm types may beused instead. In that case R6 and R7should be replaced by wire links.As can be seen from figure 2 the p.c.board is extremely miniature andfinding space in the record player cabi-net should be no problem. To improveloudspeaker efficiency the loudspeakercabinet should be as large as possible.

Figure 1. The yen simple amplifier cirenfL

Figure 2. Layout of match -box sin wined.circuit board.

4,5V

Input impedance 21,900Input sensitivity ei 200 my Ir.ma.)Output power (win 2512) P = 50 in9l.

Perm tut

Resistors:RI = 2M2R2= 820kR9= 22kR4 = I kR5= 470 E2

Rs - 2.2 11R7 2.2 E2Pt 2M2 log

Capacitors:C1= 470nC2=109/10C3= 1009/10 V

Semiconductors:Tl.T4 - TUPT2,T3 - TUNDI,D2 - OUS

Sundries:Torah battery 4.5 VLoudspeaker 25 fl

r§ Ingo

A,

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918 - aleklee september 1976 vela**. digital clock

(0613"Aletmt

Elektor has previously published designsfor 'one -chip' digital clocks, with bothmains and crystal reference frequencies.Whilst ICs such as the MM5314 areexcellent for simple timekeeping, theyhave certain disadvantages. Since theoutput to the display is multiplexed thetime output of the clock is not easilyaccessible in a parallel form. This meansthat the clock is unsuitable for drivingtime -controlled devices such as alarms,calendars, central heating programming,automatic recording of radio pro-grammes or other systems. The clockdescribed in this article is based onTTL circuitry and is eminently suitablefor control systems. The time is mail-able as a BCD coded output, and clockpulse trains with rates varying from onea second to one a day am obtainable.Many constructors will probably havesome of the ICs in their 'junk box'.The complete circuit of the clock (ex -chiding power supply) is given in fig-ure 1. The basic operation is quitesimple. With all the switches in thepositions shown the clock runs nor-mally. The 50 Hz input is rectified byDI, clamped to 4.7 V by D2 and thenfed into the NAND Schmitt trigger ST1.A 50 Hz square Wave suitable for drivingTTL appears at the output of ST1 and isfed to ICIO which is connected asdivide -by -five counter. Asymmetric10 Hz pubes are available at the 'D' out-put of IC 10. These pulses are fed toIC9, which is connected as a divide -by -10 counter. A symmetrical 1 Hz squarewave is available at output `A' of thisIC.The I Hz pulses am fed to IC6, which isconnected as a BCD decade counter.This counts seconds from 0 to 10 andthe BCD output may be decoded fordisplay using a 7447. The 'D' output ofIC6 produces one pulse every ten sec-onds, and this is fed to IC5, which isconnected as a divide -by -6 counter. Thiscounts tens of seconds from 0 to 6.When the tens of seconds count reaches6 (i.e. the seconds display changes from59 to 60) the BCD output of IC5 is0110, that is to say the .13' and 'C' out-

puts of the IC are both 'I'. These out-puts are connected to the Reset 0 in-puts, so that when the count reaches 6IC5 is mset instantaneously, and the6 display is newer seen.One pulse per minute is obtained fromthe 'C' output of IC5, and this is fedthrough N2 and NI to IC4, which isagain connected as a BCD decade coun-ter.The time -setting circuits around N I andN2 will be discussed later.Like IC5, IC3 is connected as a divide -by -6 counter, m that it counts tens ofminutes.Counting of the hours is slightly morecomplicated. Since the clock is a24 hour design, the hours counter (IC2)must count up to 10 twice, then reset at4 on the third count sequence (i.e. whenthe hours count reaches 24). Since thetens of hours counter only counts to 2 acounter is made up from two JK flip-flops (7473) instead of using a 7490.Resetting is accomplished as follows:During the first 0-10 count of IC2 theQ outputs of FFI and FF2 are low.When the '0' output of IC2 goes low onthe tenth count the Q output of FF1goes high. At the end of the secondcount sequence the Q output of FF1goes low and the Q output of FF2 goeshigh. The Q output of FF2 and the'C' output of IC2 am connected to theReset 0 inputs of IC2, so that when IC2reaches 4 in its third count sequence itis reset. However FF2 cannot similarlybe reset as it has no gating on the clearinput. This difficulty is overcome byfeeding the 'B' output of IC2 to theclear input of FF2 via CI and R3. Oncount 4 of IC2 the 'B' output goes low,feeding a momentary reset pulse toFF2. Of course this occurs at count 8also, and during the first and secondcount sequences. However, it is onlyduring the third count sequence that theQ output of FF1 is high anyway, sothese earlier mast pulses do not matter,since the flipflop is reset already.The capacitive coupling (Cl, R3) isnecessary to ensure that only a shortreset pulse is provided. If direct coup-

ling were used then the clear inputwould be held low on count 10 duringthe second count sequence, and theQ output of FF2 could not go high.

Provision of 'tideIt will be noted that IC9 is connecteddifferently from the other divide -by10 counters (IC2, IC4 and IC6). This isbecause a BCD output is required fromthe other counters. IC9 is connected togive a symmetrical square -wave output,as a coenient simulated 'tick', and thishappensnv to sound better with a1:1 mark -space ratio.

Time -settingThree time -setting switches are pro-vided. Two to make the clock advanceat a fast rate, and one to stop the clock.This is useful because the clock can beset to a particular time, stopped, thenthe stop button can be released exactlyon the time signal from radio or tele-phone. It is also handy if the clock isaccidentally advanced too far as it savesgoing all the way 'round the dial'.Gating for the time -setting is providedby a 7400 (IC7) plus the spare half ofthe 7413 Schmitt trigger (15IC8).The operation is as follows: when S2 isin the position shown in figure 2a theset -reset flipflop N3/N4 is reset, so theoutput of N3 is high and the output ofN4 is low. This means that the outputof ST2 is high. Pulses from output 'C' of

Hews 1. Circuit diagram of the clock. Theprinted circuit board does not include the dis.play and its Associated decodes/drivers.

Lope leans sr NAND galas fornorIal timakaebing.

Figure 2b. Logic ler. at NAND gates fortime-sattine

1

1%.181115

T

H - T -rfttltrf

IS1

r I =17! qp

r ° 11

B - -r

I.

6I6-9161 nquIe4des aopiel nsoP

Parts list

Resistors:01,02 = 470 52R3 = 1 k144 = Cl

Sernicondunors:101 = 7073

Capacitors: IC2 ... IC6,1C9IC10 = 7490 Switches:CI .C2,C3,C4 - 100 n IC7 = MOO Si = 2 -wayCS = 100 IC8 = 7413 S2 = Single -pole. 2-eary, push-button

D1.133 = DUS operatedD2 = Zener C4V7 S3 = Single -pole on -off

wpm. dia. dock Idder Mtnlimber 11176- volIC5 are thus transferred through N2 andNI. When S2 is changed over (figure 2b)the flipflop is set. The output of N3 islow and the output of N4 is high. Theoutput of N2 therefore goes high. 1 Hzor 10 Hz pulses (depending on positionof SI) are now transferred through ST2and NI to the input of 1C4. The clockwill therefore count at the rate of oneminute per second or 10 minutes persecond. As an alternative to the 10 Hzrate, 50 Hz pulses may be used. Thisrate is useful only for setting the hoursrapidly.The flipflop is necessary to suppresscontact bounce on S2. The flipflop isset (or reset) when the switch initiallymakes contact on being changed over.Subsequent switch bounce will notaffect the state of the flipflop.When S3 is changed over the I Hz driveis disconnected from IC6 so the clockstops. The position of S3 during film-setting with S2 is unimportant.

Power SupplyThe clock requires a supply of about1 A at 5 V. As transient interference onthe mains supply could interfere withthe timekeeping of the clock a stable,well -filtered mains supply is essential.The circuit of figure 3 is recommended,as this can deliver up to 2 A and is wellstabilised. The 50 Hz drive for the clockcan be derived from either side of thetransformer secondary winding.

ConstructionThe p.c. board and layout for the clockare given in figure 4, and the assemblyrequires little comment. The BCD out-puts of the counters are brought out tothe edge of the board. Display decodingis not provided on the board. Suitabledecoder and display boards are the'Universal Display' (Elektor No 2,Page 223). If zero suppression on thetens of hours display is required pin 5 ofthe 7447 should be grounded.The layout and p.c. board of the powersupply are given in figure 5. The outputvoltage of the supply should be set to5 V before connecting to the clock.

Teble1COUNT

INPUTS

0 C 8A0I234567a9

0000

1

1

1

I00

0 00 I

1 0I 1

00011 0I 1

o00 1

Pens lid

Resistors:RI ,R2 a 3k903= 6k8R4 = 470 12R6 = 10012R13. 19312R7 =1 kR8,119,R10 = 1.511PI = 1 k, preset

Capacitors:CI ,C2 = 100 nC3C4 = I nC5=2210 µ/16VC6= 2201.114 VC7 =10 µ/16VC8 = 470 d/6.3 V

Semiconductors:131 = Bridge rectifier, e0.1320C2200DI =omittedD2,D3 = DUS04 menet 4.7 V, 400 rnWTI -TOP12,13,15 = TUNT4 =11C1240 or eon.

Sundries:Fl =2 A delayaction fuseTer =transformer, 8 V/2 A

1=4o-

Tebb 2

Clock FF1 FF2 LEDPulseNum-bas

In-pot

Out-put

In-put

Output,die-Moe

02 a2J1 Ill J2141eon.

1121BCD

Illcon-

19)BCD

191

nee- Code nee- Codeledto

A tedto

B

02 01

1 0 0 0 I 0I

1 1 1 0 1 1

20 0 0 1 0 2

31 0 0 0 1 0

Table 1. BCD code.

Table 2. Truth table for ICI 17473 connectedes 1:3 divider).

Figure 3. Circuit of 5-V stabilised power sup -

Figure 4. Printed circuit and component lay-out of the clock.

Figure 5. Printed circuit and component lay-out of the 5-V stabilised power merle.

1

ict

10-

1F-5

--LL._.=---114-'

(c3,

ral-* *

um

922 - Wekim »ptamW r 1975 Phasing

G. Knapienski and F. Mitschke

.

Phasing ewe. ewe when a portion of asignaltheo is delayed and then mixed with

audiooriginsucal signal In the middle of the

delays of less thana bou t 100ctits"wkill produce no noticeable30effect,ms

willwwhilst delays greater than about

ill P.duce a distinct echdelay between them limits will °. Arequired'c Phasing, effect.

... give the

course, a fixed delay time will nothave ieeueinhcesaa allme effect on signals of

If, fee example, a I kHzsignal is delayed by exactly I ms and

fixed atoriginal,

th.o°1u1 an -Maude with the

with twicethe result will be a signal

the amplitude of the original,eesinouswtshhte delayed signal has in fact been

fted by 360°. For a 500 Hzsignal,fe however, the situation ft quite

tolesnot.oHem a 1 ms delay corresponds

is mixedshift, so if the delayed

will id with the original signalcancel, resulting in no sg-

cancellations will occur for allfasquen

numberiserwhich the delay time

half -periods. Foretzsambitplae waisithnda delay of I ms and a

O shifted b'y 540.onay;dh signal is

At2.5 kHz the delayed signal"I' C""".shifted by 5 half -cycles.

k phase

As with the I kHa signal, all signalsfowhich the delay time

' 'an e umber

of half periods havetheir"eamknpulituhde

doubled. This ft true for 2 kHz, 3 lill4 kHz etc.etc. The result is a series of z.

s throughout the spectme asshown

milsin figureI. A circuit that

wa

-

du.c. this type of response is known as

comb filter', because of theunusual

shape of the response curve.

Practical RealisationEtaarpely

recordersat phasing often used

ning sbghtly out of

synchronism,kbunt'kftis entails a numberof difficulties, notleast of which beingthat the sound is not 'live, and

oquently the musician cannot adjusttheiTsorEan:liadv da,euapring the

sEhleectrerilcaalt delay lines are impractical fo

used givedelay tines can be

mechanical' dtimesare fixed by their

ut these have the disadvantagerRC phase -shift

Ail -Pam LC ort networks may also b

thatvariedthe0T0Pshame shift cannot easily bewide range. An obvious

shsoilifittiosenptawould be to um an analogue

these devices are ratherter such as the TCA590, but

principlealternativeis the path filter, theA cheap 'expensive.

SI-S7of which ft shown in figure

are closed and opened rucreces2.at a high rate, i.e. SI is closed,

thenh sS32ft closed while SI opened,

is closed while S2 'continu-

ously. WhenThis acycle

repeatedeP eceoednt :actparticular switch ft closed,

theassociated capacitor can charge frominput voltage through the inputm

their dela." the requiredbut

Electromechanicaltel"long delay times required.

distorted due to the noneaaurccchazging of the capacitors). I

If

andeasixte

cycles of the input wave-eawswitching cycle occur in

same relationship, then thevbecthoeltoateonequalh capacitor will eventuallyparticularto the input voltage at a

point along thewaveform. No

and theof the capacitors will

at whichThis ft true for [he

r'resistor R. The voltage on each capaci-tortstoaranthliasCed theecapn-

seadheniatfeed

tfthane

e value) the Hine foie -

which each switchft also fixed) andirme instantaneous levelkchof the input signal.

apparentofft is thereforeherefore that after a cycleSwitch sequence the voltages onthe

vle'e esample f°Pjf"of

the input(albeit slightly

during that period-

able at theinput signal

will h"yed.

frequencyalso °flee

cycle

etipolef s

[hetime,andis equal to the switching

frequency.At other frequen .attenuated.the *""nh"1""Consider what happens'

equal toof the input waveform '

oo: theh switch cyclecycletime.

Im-agine thatPositive half -cycle thepeak of the input waveformecCy40 li ne srrwreitt2. Dmingthene'gas lioygredholg". '

thebe closed at the trough of

zero.. The net voltage on C4

capacitors, theu true for the other

fThis will also""Put '"nr"equ"en"cire'soccur at all .

2

tTtrYYsty

',CI ne ry.

the capethe

phasing elektor saptember 1975 - 923

where an odd number of half -cyclesequal to the switch cycle time.In practice, of course, the switching isaccomplished electronically, forexample by a ring counter. The result isa comb filter whose rejection fre-quencies can be varied by varying theclock frequency of the ring counter.The Q -factor can be altered by thesingle input resistor, R. Distortion ofthe output signal may be reduced by in-creasing the number of 'paths', i.e. thenumber of capacitors.A practical realisation of a 40 -path filteris shown in figure 3. A 7490 decadecounter and a 7474 dual D -flip-flopform a divide -by -40 counter. The out-puts of the 7474 are decoded by ten7401 packages, each of which switchesfour capacitors, making 40 in all. Theoutputs of the 7490 are decoded by a74141 BCD -to -decimal decoder/driver

4 and used to switch the supplies to the740I's via PNP transistors. The capaci-tors are thus arranged in a 4 k 10 matrix,and are switched as follows:At the start of a cycle the outputs ofthe 7474 are all '0' so the capacitorsconnected to pin 4 of each 7401 areswitched in sequence as the 7490 countsfrom 0 to 9 and the supplies to each7401 package are switched in turn.When the count reaches 10 output E ofthe 7474 becomes 'I'.The capacitors connected to pin 13 ofthe 7401's are switched as the 7490counts the second decade, and so on.The Q -control is provided by the 50kpotentiometer. The signal source musthave a low output impedance and theoutput of the filter must be connectedto a high impedance load.

ApplicationsThis filter has a very narrow bandwidth,with the Q -control at maximum typi-cally less than a semitone. Various effectscan be obtained with the circuit. If anarrow pulse waveform is fed in, chimesor percussion effects can be produced atthe output, depending on the controlfrequency. Aircraft noises and otherengine noises can also be simulated byfiltering out harmonics of complextones.

a The phasing effect occurs when a clockfrequency is used which is higher thanthe upper limit of the audio spectrum(say 20 to 100 kHz). The Q -controlmust be set in a fairly high position.The path filter may also be used with anelectronic regain or synthesizer, toproduce strange effects. A particularlyunusual sound can be obtained byfeeding the clock input of the filterfrom the signal outputs of an electronicorgan (squarewave outputs from div-iders, before filtering) and by feeding anoise signal into the signal input. Theremits are, to say the least, unlike anyorgan in existence.The circuit as described does have itslimitations. It will not operate effec-tively below the frequency whose half -cycle is the same length as the countercycle. Lowering the clock frequency tocompensate for thisintroduces problems

with noise due to the clock frequencyand the switching of the supplies to the7401's. This is aggravated by differencesin the characteristics of the 7401's andof the transistors. Increasing the numberof stages so that a higher clock fre-quency may be used will overcomemany of them problems.

N

Figure . Frequency response of @comb fiber.Precise ties phase-Miftad by odd muffle.. of180. are almost comple.91/ 'elected.

Figure 2. Principle of a path filter. All cape..on ham Me same value and the number ofcapacitors may be optionally increased almostindefiniteW.

Figure 3. Circuit fora ical path filer.The 7401 and the associatpracted supply switchingtransistor are duplicated 10 times. Each 7401is connected to the outputs of the 7474 asMown.

Figure 9. Showing the internal circuitry ofone gate in a 7901 package, and how eachcapacitor n tonne..

4

'1-812.

c4

BC177

0 Ed

1/47401

To Decoder74141

Various kinds of psychedelic flashinglight display can be generated easilyusing logic shift registers. Several cir-cuits are discussed here of varyingcomplexity.The shift register chosen for this appli-cation is the 7495. This is a four -bit par-allel/serial load, parallel/serial out, shift -left, shift right register, and was chosenbecause of its versatility.The circuit for generating a type of dis-play commonly used is given in figure I.Four lamps light in sequence until allare lit, then all are extinguished simulta-neously. The circuit operates as follows.The outputs A to D of the shift registerare initially at '0' so the mode controlinput (pin 6) is low. In this mode serialdata is entered at pin I and is shiftedone place right on each clock pulse.Since the serial input is held high by theI k resistor, outputs A to D successivelygo high until all are high. When outputD goes high the mode control goes highwith it and the shift register is now inthe parallel load, shift left mode. Theparallel inputs A to D are grounded sothat 'S's are entered and subsequentlyappear on the outputs. The cycle thenrepeats. A truth table for the sequenceis given in Table I.Figure 2 is a variation on the circuit offigure I. Instead of changing the modewhen all the outputs have become 'I'the D output is connected to the serialinput via an inverter. When the D out-put goes high this input is held low sothat 'Ms are entered. The outputs A toD go low in tore. When all are low theserial input goes high and the sequencerepeats. The visual effect is that lamp Alights, then lamp B and so on until allare lit. The lamps then extinguishstarting with lamp A until all are etinguished.Table 2 is the truth table for this se-quence. A reset button is provided toclear the register of unwanted statesthat may occur at switch -on.It is also possible to operate the shiftregister in the serial in, shift left mode.To do this it is necessary to connect

disco lights elekter septerriber 1975 - 925

Figures 1-5. These five basic circuits show theversatility of the 7495. Each circuit gives adifferent output sequence.

Tables 1.5. These tables show the outputsequences of the corresponding circuits

Figure 5. One way of isolating Me controlcircuit, from Me trim is to um trans-formers. The input to this circuit is TTLcompatilde.

each output to the preceding input(D to C, C to B, B to A). Serial data isthen entered at the D input and isshifted left on each clock pulse.This may be used to make a displaywhere the lamps light in the order Ato D, then extinguish in the order Dto A, as in figure 3. This circuit operatesas follows: the flip-flop NI, N2 is in-itially set so that the serial input is highand the mode control is low.'l's are thus entered at the serial inputand appear successively at the outputsA to D. When output D becomes highTI is turned on and the flip-flop is reset.The mode control input becomes .1',reversing the shift direction. Since the Dinput is grounded the data entered is ST,so the outputs go low starting with theD output. When all the outputs are lowthe flip-flop is set and the sequencerepeats. The truth table is given in table3.The circuits so far discussed are similarin that after four clock pulses all lampsare lit. It is, however a simple matter todevise a circuit where the lamps light inusequence but only one at a time, by cis-. notating a single `I' through the shiftregister.In the circuit of figure 4 the lamps lightin the sequence A to 13, with only onelamp at a time being lit. When lamp 13extinguishes lamp A lights and the se-quence repeats (table 4). The circuit op-erates as follows: on switching on theA to D outputs will set randomly sothat more than one output may be high.This would mean that a number of I'swould be circulating, whereas only asingle `V is required. For this reason areset button is provided. When SI is de-pressed the flip-flop comprising N5 andN6 is set, taking the serial input high.At the same time the mode control istaken high by the other half of SI, sothat on the next clock pulse the registershifts the `O's from the grounded A toD inputs to the corresponding outputs,clearing the register.When the switch is released the registeris in the serial -in, shift right mode, so onthe next clock pulse the 'I' present on

IN

the serial input will appear at output A.The output of N2 will go low, resettingthe flip-flop N5, N6 so that the serial in-put is low. On each successive clockpulse the 'I' on the A output is shiftedone place to the right until it appears atoutput D. When this occurs the outputof N I goes low, setting the flip-flop, A'I' now appears at the serial input, andthe process repeats.

Figure 5 shows a variation on this cucult, in which a 1' travels back andforth from one end of the register to theother (table 5). The circuit is initiallyreset by pressing SI. This sets the flip-flop NI, N2 so that a `I' appears at theserial input. It also puts the register inthe shift -left mode, so that the '0' onthe grounded D input is shifted left,clearing the register. The flip-flop corn--

1128 - elekter september 1975 dace fights

prising N3, N4 is reset, so that the out-put of N3 is low.On releasing SI the register mode con-trol is connected to the (low) output ofN3, so the register is in the shift -rightmode. On the first clock pulse the 'I'applied to the serial input appears at theA output. It is inverted and resets theflip-flop NI, N2 so that no more 'l'sare entered. The 'I' which is in the regis-ter is shifted right on each successiveclock pulse until it reaches the 12 out-put. Flip-flop N3, N4 is then set, revers-ing the shift direction. When the `I'again reaches the A output flip-flop N3,N4 is reset and the shift direction againreverses, and so on.

The number of variations on these circults is, of course, limited only by theingenuity of the constructor.Actual switching of the lamps is ac-complished using macs. Unless theentire circuitry is housed in an insulatedbox the logic circuitry must be isolatedfrom the mains. This may be ac-complished by either transformer or op-tical isolation of the control circuitryfrom the triac, and suitable circuits aregiven in figures 6 and 7.In figure 6 the secondary voltage of Telis full -wave rectified and applied to thecollector of the transistor via theprimary of Tr2. When the transistor isturned on by one of the outputs of the

Figure 7. A more elegant solution a to usespas-iv:elation.

Figure 8. Two NAND gates for inverters)can be connected as an astable multivibrator.This provides a simple clock generator circuitto dove the 7495.

Figure 9. If four outputs am considered in.sufficient. circuits 1. 2 and 4 can be extendedad infinitum in MP way.

Figure lo. Circuits 3 and 5 inn also be seedilyextended to give me number of additionsoutputs.

register, current flows through thprimary of Tr2 and the current inducein the secondary ttiggers the triac. Thchoice of transformers is not critiTel can be a small bell transformerwhilst Tr2 should have a ratio of abou

I 6 and can be a miniature type sinonly a small CUMIII flows through itOf course Tel and the bridge rectifiare required only once in the circuibut the transistor, Tr2 and the teamust be repeated for every output frothe shift register. With this circuit t '

Bering of the triac is not optimumPhasing of the transformers is important, so if the circuit does not worktime reverse the polarity of one of thwindings.A mom elegant soiution is to use optisolation, as in the circuit of figure 7.This is simply a conventional triac dim -

with the main potentiometerreplaced by a light -dependent resistorhoused in a fight -tight enclosure with aLED. When the transistor is turned onby an output of the shift register theLED lights and the illumination causesthe resistance of the LDR to fall. Thetriggering point of the triac is thus ad.`yawed and the lamp lights.The base current of the transistorboth these circuits is about 3 mA, sthey can easily be driven by the outpuof the shift register. The choice of diand triac for both these switches depends on the maximum load to beswitched.A simple clock generator circuit is givein figure 8. This is simply two NANgates or inverters connected as

astable multivibrator. A variable fquency pulse generator could also bused so that the travelling speed of thlight pattern could be altered. Figu9 and 10 show how the discolig,hts mabe extended with several shift registersFigure 9 is intended for extension ofigures I, 2, and 4, and figure 10 for thextension of flames 3 and 5.

eiliktur semen*. 1975 - 927

As the gain in en OTA can be controlledby the current from an external source(the bias current IABc), possibilities areopened up for new applications whichhave up to now been difficult to performsatisfactorily with discrete components.A simple application of the OTA, forexample, is amplitude modulation. Al-though it is basically possible to effectthis with one or more discrete transis-tors, closer inspection shows that dis-crete circuits do not achieve all formsof amplitude modulation really satisfac-torily. Tremolo (amplitude modulationof a signal which is to be reproducedacoustically) is not easy to achieveelectronically without relatively highdistortion or interference. Other appli-cations of the OTA such as multiplexingor sampling of signals are more success-ful than with other methods because ofthe OTA's high slew rate of 50 Viimec.Automatic volume control is also anobviously attractive application forOTAs. More applications of two typesof OTA, the CA 3080 and theCA 3094 AT, will be given in futureissues. These are the most interesting ofthe large range of OTAs which havebeen developed by RCA. TheCA 3094 AT has in fact been developedfrom the CA 3080, and the only basicdifference concerns the output circuit.

Linear transconductance(forward slope)Before using the OTA in practical cir-cuits, it is important to understand themeaning of the term 'forward slope' forwhich the abbreviation `gm' is used.The term gm is expressed in mho ( I /a)or millim1,0 3 The amplification

factor of a normal operational amplifier(known m a voltage amplifier) corre-sponds to the gm of a voltage -drivencurrent source (i.e. ml OTA). Therelationship between the output currentand the corresponding input voltage ofen OTA is:

Afoot = gm 7 AVM.The output signal of an OTA is thus a

current which is proportional to its gm.The output voltage (fiVo.,) appearingas a result of the output current, Abut,in an OTA is the product of this currentand the load resistor.

CA 3080Figure I shows a simplified circuit ofthe CA 3080. T, and T. in figure I

form a differential amplifier, which isalso found in most normal operationalamplifiers. W, X, Y and Z are knownas current mirrors. A current mirrorconsists in principle of two transistors,one of which is connected as a diode.Figure 2 gives the circuit of a currentminor of this type. As the transistorsT. and Tb are supposedly identical,a current I' into T. results in a secondcurrent I into Tb with the followingrelationship to I':

L=I' oe+ 2

In this formula a' is the current amplifi-cation of transistors T. and Tb. Acurrent mirror can be regarded in prac-hoe as a current source in which the out-put current (I) is almost identical to thecontrol current (P), and in which thetwo currents I and I' can in fact beregarded as isolated from one another.A disadvantage of the current mirror asshown in figure 2 is that it is sensitiveto small differences in the current ampli-fications of transistors T. and Tb, thesedifferences resulting in the currents I'and I not being precisely equal. Thiseffect can be greatly reduced by theinclusion of a third transistor (T, infigure 3).Current mirror W in figure I has thecircuit shown in figure 2, while current

Figure 1. Simplified circuit of the CA 3080.Transistors Tr end Tr form the differentialinput amper. W, X, and 2 are so-calledcurrent mirrors.

Figure 2. A curient mirror can be simplymade up with two transistors IT. end TO.The drive current l' gives rise to a current Iwhich is proportional to

Figure 3. Thewrrent mirror of figure 2 issensitive to differencesbet-seen the °errantgains of the two transistors IT. evil TO.Addition of Tr reduces this sensitivity con-siderably.

ota

mirrors X, Y and Z are as shown infigure 3. It should also be noted thatY and Z have PNP transistors.The complete circuit diagram of theCA 3080 is given in figure 4. The circledpoints indicate the connection numbersin the TO -5 housing. This housing, asseen from the upper side, is showndiagrammatically in figure 5.In one of the RCA data sheets a drawingcorresponding to figure 5 shows thereference tip between connections I

and 8. This can lead to confusion: thedrawing in figure 5 is correct.he the circuit shown in figure 4, Ts andT3 are the differential input amplifier.Transistor Ts is the common emitterimpedance of this differential amplifier.The most significant difference fromthe input stage of a normal opamp isthat T3 is part of a current mirror, sothat its collector current is equal to thebias current (IABC). The value of thecollector current of T3 determines theemitter current of the differentialamplifier Ts/Ts, and this provides aneffective means of controlling the overalltransconductance. The gm of an OTAin normal ambient temperatures(16°C ... 27°C) is given by:

am = 19.2 x 'ABC

in which gm is expressed in millimhoa

(I/S2 x 10') and IABC in mA.In figure 4 the ou pu signal of the OTAis taken from the collectors of "fa andT. (connection 6) which form part ofthe current mirrors Z and X respectivelyin figure I. As IABC is varied, the gmof the OTA changes and therefore theoutput current does likewise; hence:

Alput =gm x AVsa = 19.2 x IABC x Vss,(at normal temperatures!)

The OTA can easily be made to operateas a voltage amplifier by connecting aload resistor RL between the output andcircuit earth. The output voltage thenbecomes:

AVous = RL x 19.2 x IABC x AVin

in which IABC is in mA, RL is in kS2,Vol, and Yin are in volts.

Characteristics of the CA 3080Table 1 gives various important limitingvalues for the CA 3080 and theCA 3080 A. The difference betweenthese two types is related only to theirworking temperature ranges. In additionto these characteristics, which are forthe specified supply voltages and anIABC of 500 µA, it can be said that thelimit of the working frequency rangeN about 2 MHz. The quoted input

Figure 4. Complete circuit of the CA 3080 ICThe circled numbers correspond to the codingof the connecting leads.

Figure 5. Connections for the CA 30130 ICare the same m on the /./A 708 rumps forPins 1 and 0.The drawing shows the top V./ of the IC.

Figure 6. Thew curves snow changes ine. currett (Amour) plotted as functions ofchanges in the input voltage 1.0Viol.

Figure 7. Input resistance 111,n) as a functionof the so-called bias current 114,e.

Figure 8. As with the input resistce, theoutput resistance of M

ane CA 3080 is depen

dent on the bias current lash. As figure 7and this graph Mow, both relationships arecompletely linear.

Figure 9. The CA 3080 connected as a D.C.-coupled differential amplifier. Gain can bevaried by pottneter Pi from about 30 toabout 100 urea.

Table 1. Characteristics and maximum resin of the CA 3080 and CA 3080 A ICs.

Maximum ratings:DC supply voltagebeMiwn +V, and

Vb: 36 VDifferential inputvoltage: ±5 VCommon mode inputvoltage: Mr, to -V,Input signal current: 1 mABids current 0403,1: 2 mAOutput short-circuitduration: no limitationDevice dissipation: 125 mWOperating temperaturerange:

CA 3080 0°M 70°CCA 3080 A -55° to +125°C

Characteristics:IV, -*15 V; -Vc= -15 V;!ARC - 500 PA!Input capacitance:Input resistance:Input offset current:Input bias current:Slew rate with unity gain:Transonductance WO'Output resManm:Peak output current:Peak output voltage:

positivenegative

Amplifier sunk, current:Device dissipation:

3.6 pF26 k3-30.2 pA

2µA50 WA

9600 prnho151141.3

50011A

13.5 V-14.4 V

1 mA30 mW

Welder matembar 1975- 929

7 8aVb=t6 V, - 15 V (TA 1.75°C

111.991111111=0111111=111111111=M11191=19111111

1101111111111111111.IIIIIIMI11111011111111===.17

ME1111111101111111=M1 iimmum =Eo21lithM1111111110110111111111 11111111111111111111111

.1111111.11111110.111.11111.11111i11111111.11111.1.,11111 1.11111111

mutilinniummusionii.ABC WA)

1609

resistance of 26 k is dependent on thevalue of IABC.If a value of I MIT is chosen for theoutput load resistor, the voltage gain iseasy to work out from the character-istics given in table I:

A = 4444 = 11 gm

=10. x 9.6 x 10-'m80 dB

It can be deduced from this last formulathat the voltage gain can also be variedby changing the load resistance.The curves in figure 6 show that theoverall characteristic of the CA 3080 iscompletely linear for small inputs tothe differential amplifier. The curvesshow the relative values of Aloof andthe deviations from linearity as functionsof the relative values of AVjb. Figure 7shows the input impedance of theCA 3080 m a function of the binscurrent 'ABC. The maximum impedanceattainable in this OTA is about 40 MUwith a bias current of 0.1 µA.The output impedance is also, of course,

4 dependent on the value of IABC.Figure 8 shows that this relationship islinear.

7 For the sake of completeness, it shouldbe said that the characteristic of figure 7

as

BEM::2E11;1

11111111=9111111=M9111111MMIMmilM11111111111

.110111.11111111.11llq

Nalin...Lvoniim..11 mNIIIIIIIIIMMIIIIIII.111011.1101111.111111111111111111IIIR

INNIIIIIIMM1111111=k 911111 IMMIIIIIIIIIM111111

1.1111111.1IMMIV:111.IIII!!11.11M11'=ES=.=.F.Ii!!!!ME.).11..11111E11111121fill 'N!linInti;;;;

mcquoutini

Vb. la V,-Vb.15V R.) -28-d

OD NW

,ABC leAt

also holds good for the CA 3094 AT.Figure 8 also holds good for theCA 3094 AT, but only for its currentoutput. This IC has other outputs.

OTA opampFigure 9 shows a practical circuit for theCA 3080 from which a comparison canbe made with normal opamps.The power supply is symmetrical at± 6 V. Both inputs are D.C.-coupled andare connected to chassis earth throughRi and Ra respectively. Resistor Rs offigure 9 is introduced in order to obtainvoltage amplification, as in an opamp.The usual feedback from the outputto the inverting input of the IC is miss-ing, be.use the gain can be controlledby the bias current 'ABC at pin 5.'ABC is easy to calculate. While re-calling that the emitter of Ta is connec-ted to -Vb (pin 4), assume that 'ABCis drawn via a resistor R. from chassisearth, which is 6 V positive in relationto -Vb. The relationship then becomes:

IABCRx

Vb- 0,7

In this formula, IABC is in mA, whileVb is in volts .d R. is in 142. Thequantity 0.7 is the base -emitter poten-tial of l'a in figure 4. To find the valueof R. for a desired value of IABC, theformula can, of mune, be rewritten:

Rx-VbIArico7

In figure 9 R. is replaced by the combi-nation Re, Rs and Pt. When the sliderof Pi is at the positive end of its travel(i.e. at 0 V), the voltage across theseries connection of R. and the base -emitter junction of In is Vb, so that

IABC = Vb 0'7 .0.53 mA.Rs

It therefore follows that the voltage gain

A=Rixg.sx1ABc.10819.2x0.53.100.When, however, the slider of Pt is at thenegative end of its travel (the junctionof Rs and Pt), the voltage relative to-Vb at the slider of Pt is:

Rs/P1 x (Vb +0.7 )

V..Rs/Pi +Rs

. 2.2 V15

The effective voltage across R., is here -fore:

2.2 V- 0.7 V = 1.5 Vso the bias current is given by:

IABc mA = 0.15 inA.

The voltage gain is therefore:

A.Rixgsbxlmjc.10x19.2x0.15.29XIf the gain of this IC is allowed to dropsubstantially, considerable distortionmay result unless special attention isgiven to the design of the differentialinputs. Should the input transistors Tsand Ts (figure 4) not be exactlymatched, their emitter currents willdiffer when IABC is low, and this willcause distortion. In this connection, thefollowing roles of thumb apply:a. If the OTA gain is fixed, resistors RI

and Rs (figure 9) must have valueswhich are lower, by a factor of atleast 2 I, than the value of inputimpedance read from figure 7 for therelevant value of IABC.

b. 125 and Rs must have the same valuewhen IABC is less than about 0.5

C. For fixed gain with values of IABCbetween I µA and 10 µA, the valuesof resistors Ri and Rs may differ bya factor of 2.

d. When IABC is over 10µA, Rs and Rsmay differ in value by a factor of 4.

0. If the gain is to be variable over arange greater than I : 5, resistors Riand Rs must have values lower, bya factor of at least 2, than the

930 - elsktor remember 1975

10

C1

-II111

A 3080

-I-VH=15V

64. 4a

II

V,%15V

62 R R5

160910

value of input impedance, indicatedby figure 7, for the maximum IABC.

Negative feedbackNegative voltage feedback can be usedwith an OTA as it can with a normalopamp. Figure 10 gives an example of acircuit for a CA 3080. The bias currentIABC is determined by Ra. The poten-tial across this resistor is the negativepower supply (15 V), less the 0.7 Vbase -emitter voltage which was discussedin relation to Ts of figure 4. In this casethe value of bias current is given by:

IABC 151-00.7 - 143 µA

so that gm works out at19.2 x IABC = 2.74 mmho.

The voltage gain given by a CA 3080 inthe circuit shown in figure 10 is notdetermined solely by the value of theload resistor Rs, but also by R, and Rs.In the first place, the effective outputload resistance is Rs and (Rs + 131) inparallel. In the second place, the voltagedeveloped at pin 6 across this effectiveoutput load is fed back to the invertinginput (pin 2) with a step-down ratioB; ((its +123).The effective voltage gain between theinput and pin 6 is thus:

Ao1 + (A04) I + (gm111,4)

gm ((Rs + Ra )WA, ]

1 + gm [(RI + Wits

6m Rs - 10x1 + gm Rs

(f is the feedback factor R,R:R3

It can be wen from figure 10 that if Rais omitted there will be no voltage fed -back from the output. This is equivalentto making Ra infinitely large in theforegoing calculations, and results inin the voltage gain being increased bya factor of about 8.

Table 2. Characteristics and maximumratings of Ma CA 3094 AT.Maximum ratings:DC supply voltage 05.tween *V, and -V0: 36 VDifferential inputvoltage: ± 5 VCommon mode inputvoltage:Input signal current:

Bias current 11,3c/ 2 mAOutput current:

peak: 300 mAaverage: 100 mA

Device dissipation:without heat sink: 630 mWwith heat sink: 1.6 W

Peak dissipation 11 rnSI: 10 PIOperating temperaturerange: -55' to +125°C

Characteristics:14V,- 15 V; -VI,- -15 V;IABC =100 MM.Differential input C.81,..6.6.. 2.6 P,Differential input resistance:

ABC 209A): 1 milInput offset current: 0.02 p.AInput bias current: 0.2mADevice dissipation: 10 mlalBandwidth (Unity min1: 30 MHzAmplifier bias voltage: 0.6111 V

If a comparison is now made betweenthe circuit of figure 10 and a normalopamp, such as the µA 741, a numberof similarities become evident. Both theOTA and the opamp can be operatedas voltage amplifiers, and voltage nega-tive feedback can be used with either.Both can have either symmetrical orasymmetrical inputs, inverting orinverting. TheThe OTA, however, becomesa pure current source when it has noload resistance; a feature which can beadvantageous for some applications.Besides this, the OTA has the featurethat, as the transconductance is variedby varying the hi. current, the inputand output impedances also vary over

Ot8 fish feeder elektor september 1975 - 931

Figure 10. OM circuit incorporates negativefeedback from the output through Rs to theinvesting input.

F. San

Figure 11. A CA 3080 connected as an A.C:coupled asymmetrical amplifier. Negativefeedback is taken from the emitter of Tithrough St to the inverting input of the IC.

Figure 12. Detailed circuit of the outputsection of a CA 3994 AT OTA. The differencefrom the CA 3080 consists of Me addition ofresistors Pi/R2 and transistors Trani,.

Figure 13. Functional diagram of theCA 3094 AT. The corresponding output ofthe CA 3080 (Pin 61 is connected in MN caseto Pin 1.

a wide range. If it is important for aparticular application that one of theseparameters (but not the other two)should have a specific value, it can beadjusted to this value by controllingthe bias current.Yet another feature possessed only bythe OTA is that the gain can be con-trolled as may be required by D.C. orA.C. potentials, thus malting amplitudemodulation, sampling or switchingfunctions possible.

Output buffer stageTable 1 shows that the peak outputcurrent of the CA 3080 is only 500 µA,and this can be a drawback in a numberof applications; moreover a `power'OTA such m the CA 3094 AT coststwice as much.A simple solution is given in figure II,which shows a buffer transistor follow-ing the OTA. By this means the outputcurrent (Alma) of the OTA is multipliedin the same ratio as the current amplifi-cation of Ts. Another advantage accru-ing to the addition of Tj is that, beingan emitter follower, its output im-pedance is low.The load impedance which the OTA`sees' at its output is equal to the valuesof R5, R5 and the input impedance ofTi , all in parallel.The fact that the CA 3094 AT has beendeveloped shows that RCA themselveshave, indeed, given thought to the needfor higher output currents. This OTA isequivalent to the CA 3080 except forthe addition of two resistors and twotransistors. Figure 12 shows in detailthe output circuit of a CA 3094 AT.A comparison with figure 4 shows thatRj/R, and TaT, have been added infigure 12. Some of the characteristics ofthe CA 3094 AT are given in table 2,and the connections are given infigure 13. Pins 8 and 6 become poweroutput points for `sink' or 'drive' cur-rents respectively. The low -power out-put, which is at Pin 6 in the CA 3080,is brought out at Pro I re theCA 3094 AT.

tob1efa

**41'G' ar13;:°7.:35):::riaa;I:e;

dligZ'SvetlIcO°1:h '3"t'6s:da'fl'cea'

She leet

The store of dried feed is held in atrough with V-shaped sides (figure I).At the bottom of the trough is a cylin-drical container which tons the lengthof the trough, and which has one sidecut away. This cylinder is driven, via areduction gear, from a small modelmotor. As the container rotates it willfill when the open side is uppermost,and empty into the aquarium as it ro-tates. The number of revolutions madeat each feeding session, and hence theamount of food delivered, is controlledby the electronic circuitry. A cowl atthe bottom of the dispenser preventssplashing caused by the fah or the aer-ator from malting the feed sticky andthus clogging the dispenser.

The circuitIn figure 2, TI is an emitter -followerwhose base potential is controlled bya light dependent resistor RI and apotentiometer P1. This is followed by aSchmitt trigger, T2 and T3, which has alarge degree of hysteresis. This drives T4via R9 and Tenor diode D2. During dark-

ness the resistance of the LDR is high.The emitter potential of TI is thereforehigh, T2 is tamed on and T3 is turnedoff. Hence T4 is also turned on. Whendaybreak comes the resistance of theLDR drops, the emitter potential of T1drops, and when the switch offthreshold of the Schmitt trigger isreached T2 turns off and T3 toms on.T4 therefore rums off. Point A goes upto supply potential.The switch -on threshold at daybreakcan be adjusted with P1. The hysteresisof the Schmitt trigger is ro great thateven large brightness variations duringthe day will not cause spurious trig-gering. However, care must be taken toensure that the LDR is screened fromroom lighting so that spurious trig-gering does not occur in the evening.The motor control circuit is shown infigure 3. When T4 switches off at day-break, T5 turns on. This shorts out thebase of T6 through C2, and T6 turns offuntil C2 has charged sufficientlythrough R15 and P2 for T6 to turn onagain. During this time T7 and T8 areturned on and the motor runs. Thecharging rate of C2, and hence themotor running time, can be adjusted byP2. In the evening when T4 turns on,T5 turns off but this does not affect thestate of the following stage, so nofeeding occurs.If the fish feeder is to be used otherthan at holiday times the triac switch offigure 4 may be used to control theaquarium lighting. It is important to in-clude C3 across the choke of the fluor-escent tube to avoid high voltages beingapplied to the triac. If the lighting cir-cuit is connected to the automaticfeeder it is imperative to ensure that thefinished construction is adequately in-sulated as the ground connection of thefish feeder is connected to the mainsneutral. No part of the circuit should beaccessible, and in particular the motorshould be insulated, including the driveshaft. Potentiometer P2 should have aplastic shaft, and the whole assemblyshould be mounted in a plastic box,with no metal protrusions.

F

932- Wk.. eretember 1915 fish feeder

The dispenserofp

xobtheably dbicssptencosenr_

structed of cleargcprmearbelnmeovtaxeeyl:ii,o.cofatongifybe:vr,.:oriuiyli,tehteriabeshriewe;firotiehbmdscauocsti!ih000linasi.

model shops.

evictor sspumber 1975- 933nsita

J. Koper

It is possible to use two NAND orNOR gates to make up a flipflop-a circuit with two stable con-ditions. The process can beextended to obtain circuitswith three or even more stablestates.

The arrangements shown in figure Iboth have 3 stable states. The statetaken up by the outputs will depend onthe input conditions applied. These cir-cuits have the objection that correctoperation is only guaranteed whendrive is applied to two of the inputsat once (see table I).It is however possible to modify the Or -cults so that a single input dnve willproduce the desired output state. Thecircuit as a whole becomes more exten-sive; but it becomes easier to use.Figure 2 shows the modified arrange-ment. The operation of this circuit canbe followed from table 2.Figure 3 shows a master -slave shift regis-ter. If C is at logic 'I', then the OR -gateoutputs will also be 'I', so that the stateof Qt-Qa-Q, does not change. If Cbecomes '0', the AND -gate outputswill also be '0', so that the state ofOvOsOs is held.Suppose for example that C is logicwith Ii = '0', Ia = '0' and I, = 'I'. Wefind that Qi ='1', Qa = `I' and Qa = '0'.Since C is '0' the state of Qs -Oa -Qs ismaintained. If C now goes to 'I', the=q.t. Qt, Qa and Q3 will not change.This state is also the state at the inputsIs, Is and Is. Q9 therefore becomes '0',Qs also '0' and Qs 'I'. This shows thatthe input information appears,after one clock pulse, at the output. N

NOR gam NOR gees

11 12 13 121 02 03 II 12 13 02 03

1

01

00

X

0X

0X

1

0 00

00 0 1 1

0 1 0 1 0 0 I 0 o 1

1 1 0 0 o 1 01 1 1 0 0 0 0 0 0

NAND pros NAND gates

00

1200

13

012,

1

021

1

031

0oo

Q0

130

02 03I 1

0 00

0 0o

00

x 1 1

Table 1 Tele 2

a

934 - &atom seutember 1975 mg out the bandit

L. Wiechers

leg 001LOettiiiitThis oscillator was designed fordriving electronic games ofchance, such as the 'three -eyedbandit' (Elektor No. 2 page 238)or an electronic 'roulette wheel'.The disadvantage of the 'three -eyed bandit' is that a stop buttonmust be pressed to stop the threeoscillators and obtain the finaldisplay. Thus the tension andanticipation obtained with a realone-armed bandit as the numberdrums slowly grind to a halt ismissing. The voltage -controlledoscillator overcomes this by pro-viding an output whose frequencyslowly reduces until it finallystops. This can also be used tosimulate the 'rolling out' of theball in a roulette wheel.

The circuit is based on the well-knownastable multivibrator (figure I). The fre-quency of oscillation of this circuit isdetermined by the charging current intoC1 and C2 through RB2 and RBI wheneither of the transistors is in the cutoffstate. The multivibrator can be tamedinto a simple VCO by connecting RBIand RB2 to a seperate supply instead ofto +Vb. Increasing the voltage appliedto the base resistors will increase thecharging current through them into CIand C2, and will hence increase the Em-

ail'

quency of oscillation. Reducing thevoltage has the opposite effect.There are however, certain limitationsto this simple approach. The base mu-sistors perform two functions. When(for example) TI is turned on RBI sup-plies its base current. The minimum cur-rent must be such that the transistorremains in saturation. This places arestriction on the minimum voltage thatmay be applied for a given base resistor.When TI is turned off and T2 is turnedon, RBI supplies the discharge currentfor C2 whilst RI supplies the chargingcurrent for CI. For correct operationCI must have charged up to almost +Vbbefore TI turns on again. This meansthat C2 must discharge more slowlythan Cl charges, and this limits themaximum control voltage that may beapplied to the base resistors. In practicefrequency changes of between 10 : Iand 50 :1 can be achieved, dependingon the gain of the transistors. This is in-sufficient for this application.

Base current feed through zenerdiodesThe limited frequency range can be ex-tended by the circuit of figure 2. Nor-mally the coupling capacitors supply aportion of the base current whilst theyare charging from the collector resistors,but this ceases as soon as the capacitorsare charged. The zener diodes performtwo functions:I. they limit the voltage to which thecoupling capacitors charge, and hencethe time required for charging.2. they provide a D.C. path for thetransistor base current, even when thecapacitors have charged. This meansthat the base resistors only provide thedischarge current for the capacitors withthe transistors in a cutoff condition.They can thus be much larger. Also,since one transistor is always cut off,only one base resistor is required(shown dotted in figure 2) provided thetransistor bases are isolated by diodes.When this circuit is used as a VCO byconnecting RB to a control voltage a

roll out the bandit daktor ceptember 1975 - 935

Figure 1. A basic astable multivibrator. Thismay be voltage -controlled by connecting thebees resistors to a variable voltage instead of+ Vb.

Figure 2. Addition of zones diodes makestransistor base current almost independentof base resistors. The two base resistors canbe replaced by a single resistor and twodiodes.

Figure 3. Base resistor replaced by a rottOce-controlled currant source.

Figure 4. Addition of emitter followers im-proves risetime without sacrificing loop gain.T6 further improves risetime and drives TTL.

frequency range of between 200 I

and 500 I is obtainable.

Decaying frequency characteristicThe next step is to achieve the gradualdecay of frequency required. This isaccomplished in the circuit of figure 3.When the pushbutton is pressed C3 ischarged rapidly. The voltage on C3turns on T3 which causes the oscil-lator to start. As C3 slowly dischargesthe collector current of T3 decreasesand the oscillator frequency reduces

until the voltage across C3 is less thanabout 0.6 V, when T3 cuts off and theoscillator stops.

The final circuitFigure 4 shows the final circuit. Emitterfollowers T4 and T5 are incorporatedto provide a low impedance chargingpath for the coupling capacitors, thusimproving the rise time of the waveformwithout reducing RI and R2, whichwould reduce the loop gain. T6 converts

the output to a level suitable for drivingTTL circuits.The discharge rate of C3, and hence the'rolling out' time, is adjusted by Pl. Theinitial frequency of oscillation is ad-justed by P2. Note that CI and C2should be non -electrolytic types.With the component values shown theresults obtained were as follows:Starting frequency 100 to 300 Hz.Final frequency about 0.3 Hz.`Rolling out' time 25 s maximum.

box for portable applications. Thefollowing safety points should be noted.No part of the circuit should be access-ible from the outside. The case shouldpreferably be made of plastic or otherinsulating material, and fixing screws forthe board should be nylon. If a metalcase is used the board must be ad-equately insulated from it and the caseshould be earthed. The potentiometershould have a plastic spindle.

This simple triac dimmer can be used tocontrol incandescent filament lamps upto 1500 W. The circuit operates on thephase -control principle. The main con-trol is provided by P2. This determinesthe rate at which C2 charges and hencethe point along the mains aveform atwwhich the voltage on C2 reaches thebreakdown voltage of the disc, which iswhen the triac is triggered. PI, in con-junction with RI and CI determines theminimum brightness level, or alterna-tively may be used as a fine brightnesscontrol. Interference suppression isprovided by R2 and C3.

ConstructionThe printed circuit board is very com-pact and can easily be accommodatedinside the modern, square type of flush-Amounting switch panel, or in a small

938 - elektor september 1975dual slope dam

H.L. Krielen

4"40,46 P. deSg

69,

gel

0

©I @

dockWerator

COntral lagic

integratOr

Ill

The dual -slope technique is one of thesimplest and most reliable DVM sys-tems. The voltage to be measured is fedto an integrator for a fixed period oftime. The current into the integrator,and therefore the charge on the inte-grater capacitor at the end of thisperiod, is proportional to the input volt-age. The capacitor is then discharged ata (known) constant current and thetime taken for the capacitor to com-pletely discharge is measured. Since thedischarge current is constant the timetaken to discharge is proportional tothe original charge, which in turn is pro-portional to the input voltage. The dis-charge time is measured by feeding

clock pulses from an oscillator to a digitoll counter until the voltage on the capacitor reaches zero. The same oscillatois used to determine the original chargetime. This means that any long-termvariations in the oscillator frequency areunimportant since they will affect boththe charge time and the measured dis-charge time equally. The long-term stab-ility and absolute frequency of the oscil-lator are thus unimportant. The onlyreference standard in the DVM is theconstant discharge current, which mustbe stable.Looking at the system mathematically:Current into integrator I, = V/R, whereV is voltage to be measured and R is in -

Figure 1. Block diagram of the cornMOM. The arrows in the various connectindicate the remotion of action.

Figure 2. The input volume applied.

Figure 3. The Moe axis The time tie, ischarging time, 12-ts is the discharge time, a12 -to is the display erne.

Figure O. Output voltage of the reset pugenerator.

Figure 5. The input voltage to Me integrator.

Figure current of the inte-grator.

Figure 7. The output voltage of Me integrator.

Figure 8. The output .tape of Me zero-crossing detector.

Figure 9. The recck pubes applied to thecounter. They first con. of 100 referencepulses, .99 determine Me charging time,followed by a num. of pulses proportionalto the voltage al the Maul signal. The fre-quency of these pukescan be assumed to beconstant during Me 5.11.10.

Figure 10. The Score generator. Via line A thepulses go to the count gate, whilst via line Elthe reset pulse generator is driven.

Figure 11. The reset pulse generator. This,applies reset plasm to the counter (via C andDi, ma a non pulse to the control logic Ina

tegrator input resistor.Charge on integrator capacitor at end ofcharge period At,

Q = ',At, = kV rit,.

Time taken for capacitor to discharge aconstant current 12

Since At, and At, are derived from thesame oscillator it can be seen that a vari-ation in oscillator frequency will affectboth At, and At, equally, and the finalresult will remain the same, provided ladoes not change and R is faxed.

A

dual slope dvm alektor septamber11376 - 937

The block diagram of the DVM is givenin figure I and an operational timingdiagram in figures 2-9. The timing dia-gram is drawn for both a positive anda negative input voltage.The sequence of operation is as follows:the input chopper applies the input volt-age (figure 2) to the integrator for afixed time I'd, (figure 3). The choppedinput to the integrator is shown in fig-

!ure 5. During this time the integratoroutput rises linearly as the capacitorcharges (figure 7). The step in the inte-grator output waveform at the beginningand end of the charge period is ex-plained in the detailed description of theintegrator later in the text.At the end of the charge period the inte-grator is disconnected from the inputvoltage and is connected to the dis-charge circuit. The integrator capacitordischarges linearly during the period ta-ts (figure 6). During the wholeperiod tats the output of the zero -crossing detector (figure 8) is positive.When the voltage on the integrator ca-pacitor reaches zero the output of thezero -crossing detector falls to zero. Thisis used to control the clock pulses to thecounter (figure 9). The operation is ef-fected by the control logic in the blockdiagram. Before each measuring periodthe counter and control logic are resetby a pulse from the reset oscillator(figure 4).Measurement of a negative voltage isperformed in a similar manner. The onlydifferences are that the output of thezero -crossing detector is negative. This isdetected by the polarity detector and isused to reverse the polarity of the con-stant current from the discharge circuit.(Otherwise the integrator output, beingalready negative, would simply becomemore negative and would never crosszero.)A refinement is incorporated in theform of a drift compensator circuit,which nulls out the effect of zero driftin the integrator and zero -crossing detec-tor.

Circuits in the DVMClock GeneratorThe clock generator, which providesdrive pulses for the counter, is shown infigure 10 and consists simply of a two -transistor astable multivibrator with a

measurement

I1

Intl measurement

112

1 , I I

i_ x_i__._ ,t,.!It, I 1, : 1

, ,apt In la iti

31 1 I § II i I

41/: 14

5......d

, 1

I

1----71 1 i v.I, 1

El -.---/ I 1

1 I

1 ,,..77.....,.......... j1.-1-._ I

I ' i

8 Mal 1I__,Fi. _F

i I

9 1110 i !IIKIN9111111111

..--..-: ".-I-:1000u1set 100,anam

frequency of approximately 15 kHz. Asstated earlier, the long-term stability ofthis oscillator is unimportant.

The Reset Pulse GeneratorThis circuit is shown in figure I 1 and isbased on a programmable unijunctiontransistor, T14. The gate of this devicereceives a D.C. bids from R42 and R43.Pulses from the clock generator areapplied to point (B) and charge up C7through D10 and 1141. When the uni-junction fires C7 discharges through theunijunction and 1144, and the voltageacross R44 causes T10 to turn on. Thiscauses TI1 to turn off. A negative -going pulse is therefore available at thecollector of TIO and a positive -goingpulse is availabl at the collector of TI 1.The time between reset pulses is deter-mined by the time constant R41 it C7,

and in this case is one second. The intervat between reset pulses determines themeasurement repetition rate and alsothe time for which each reading is dis-played. It may be altered to suit per-sonal taste, provided it is longer thanthe measuring period ti -taC7 should be a low -leakage type, prefer-ably tantalum.

The CounterThe counter circuit (figure 12) consistsof two 7490 decade counters and aJK fliptlop (half of a 7473). The 7490'scount the two least significant decadesand drive 7447 seven segment decodersand LED or Minitron displays. TheJK flipfiop counts the `hundreds'. Sincethe maximum display is 199 only a oneneed be displayed by the hundreds dis-

1138 -elector soptombor 1975 dual daps dear

play. For economy, a seven segment dis-play is not used but simply two LED'sin series. The other half of the 7473 isused in the control logic.Clock pulses to the counter are gated bya two -input NAND -gate (quarter of7401).

Input ChopperThe input chopper (figure 13) connectsthe input voltage to the non -invertinginput of the integrator during the chargeperiod, ti -Is . For the rest of themearement cycle it grounds this input.The circuit functions as follows:during the interval ti-ts point H is atlogic '1' (+5 V) so T1 is turned off. T2is also turned off. The gate of Fl is heldat about -10 V so Fl is cut off. Thegate of F2 is held at about -1.2 V, soF2 is turned on. The input voltagetherefore appears at point I via theFET F2, and is thus fed to the inputof the integrator.At time to point H becomes low, m TIand T2 are both tamed on. The gatevoltage of F I becomes about -2 V, so itconducts and grounds the input of theintegrator. The gate voltage of F2 be-comes about -10 V, so it is cut off andthe input voltage is disconnected fromthe integrator.

The IntegratorThe integrator of figure 14 serves toestablish a voltage -time relationship, i.e.the number of clock pulses countedmust be proportional to the input volt-age. The circuit operates in the follow-ing manner:to achieve a reasonably high input im-pedance without additional bufferamplifiers a non -inverting integratorconfiguration is used. When the inputvoltage in applied to the input I by the

input chopper, the output of the 741will swing positive. Since C2 appears asa short circuit to this step input them is100% negative feedback through C2.The output voltage of the 741 musttherefore assume the same value as thevoltage on the inverting input (pin 4),which by definition is the same as theinput voltage on pin 5. The input volt-age thus appears at the output aspositive -going step. Since there is now avoltage across RI2 a (constant) currentflows through it which is proportionalto the input voltage. Since no currentcan flow into the inverting input of the741 this current must flow into C2.Sinm the current is constant the chargeon the capacitor, and therefore the volt-age across it, increases linearly. Thecapacitor is allowed to charge for aperiod of 100 clock pulses. The voltageacross C2 is then

11c;'t

where At represents the time interval t,-ty.At time tea the input chopper discon-nects the input voltage and grounds thenon -inverting input of the integrator.This causes a negative -going step, whichcancels out the earlier positive -goingstep. The voltage on the inverting inputof the amplifier is now zero, an the volt-age across C2 is the same as the outputvoltage.When the discharge circuit is connectedto point .7 (the inverting input) the inte-grator begins to function in the in-verting mode. The discharge circuit sup-plies a constant current Is into the ca-pacitor of opposite polarity to thecharging current. The capacitor thusdischarges linearly. The voltage on theinverting input is, by definition, zero, soas the voltage across C2 falls so does the

Figure 12. The corerres. C end D are reset in.puts, A is the count input, F the driver for thecont gate. Output G repplre a pulse to reaucontrol logic at the our hundredth countpulse.

Figure 13. The input chopper. It is driven reand during as.

input signal on to the intrerator Iris lice il.

Figure 14. The integrator. I es the input and Lthe output. The lines J and K, come from thedischarge circuit and the drift compensator.respectively. C2 is the integration ce.Oitsis.P1 serves for sere -adjustment, with input I toearth and the lines J and K interrupted, theoutput L must he Wrest. to 0 with thepotentiometer.

Figure 15. Tha zero-m®n° detector. It

amplifim the output voltep of the integrate(line LL and drive the drift compensator andthe polarity detector Iris M and NI.

Figure 16. The polarity detector. This is in

fact a rense-pmitien sere*: tor input voltageshigher than .600 mV output 0 is yew' and P

for noise *mere .300 mV and-600 mV Goth purees ere 'high': whilst fieyore., Slow -600 50/ 0 O high and P elow.

Figure 17. The polarity indicator. It drives thepiret remps, depending on the polarity of theinput signal during the measuring period.

Figure 18. The discharge rem.. This eswitched on via line S or T from Me cont.logic, and ensures dud Me integration ca.

reciter is discharged via line J. The DVM iscalibrated with edjusdnent potentiometer PIfor positive, a. with P3 for negative involtages. Both are adjusted ono the souindicates one unit per millivolt.

741 output voltage (which is identical).During this time the counter is countingclock pulses, until the zero -crossingdetector monitors z volts on theoutput of the 741.

eroThe discharge

time Atg is given by:voltage on C2,

_12-ttgCz

therefore

titg1s

At

but

thereforeAt

Since At, RI2 and h are all fixed Atg isproportional to yin.

The Zero -Crossing DetectorThis circuit also uses an op -amp (fig-ure 15), but in this case a 709 is usedwhich has a greater slew -rate than the741. The circuit has a high gain, about70 g, so a small swing of the input volt-age positive or negative will make theoutput swing hard over to plus or minus10 V. D5 and D6 provide input protec-tion by limiting the voltage on pin 5 ofthe IC to about ±0.2 V maximum, andR23 limits the current through thediodes. C3 and C4 are included to keepthe 709 stable.The output of the zero -crossing detectoris connected to the input of the polaritydetector (figure 16). For outputs fromthe zero -crossing detector greater than+0.6 V T6 is turned on and T7 is fumedoff, while for outputs more negativethan -0.6 V T7 is turned on and T6 isturned off. For voltages between -0.6 Vand +0.6 V both transistors are turnedoff, thus providing a zero indication.

Polarity IndicatorThis consists of two high power NAND -gates (7440), connected as a set -resetflipflop (figure 17). During themeasuring period this flipflop is eitherset or reset by the polarity detector de-pending on the polarity of the measuredvoltage and the appropriate LED is lit.The flipflop is necessary to store thepolarity indication during the displayperiod, when the output of the inte-grator (and hence of the zero -crossingdetector) is zero.

The Discharge CircuitThere are in fact two discharge circuits,one of which is used depending on thepolarity of the input signal. The circuitis shown in figure 18. When the inputsignal is positive, the output of the 741in figure 14 is positive, and C2 chargesso that the 'right-hand' end is morepositive than the left-hand' end. Thismeans that to discharge the capacitorthe output of the integrator must benegative -going during the discharge

elector sentembei 1975

period. Current must therefore flow intopoint J. For a negative input signal theoutput of the integrator is negative, sothe output must be positive -goingduring the discharge period. Currentmust therefore flow out pf point J.The discharge circuits operate as fol-lows: when the input signal is positivepoint T is grounded by a control signalfrom the polarity indicator via the con-trol logic while point S remains high. T4and T5 are therefore turned off, whilstT3 is fumed on. +5.6 V therefore ap-pears across ZI. The voltage applied toR13, and therefore the current throughR13 into the integrator, can be adjustedby P2.When the measured voltage is negative,point T is 'high' and point S is 'low'. T3is turned off and T4 is turned ors-5.6 V appears across Z2 and the cur-rent through RI4 can be adjusted by P3.

The Drift CompensatorTo prevent zero drift in the integratorand zero -crossing detector from causing

Figure 19. The drift compensator. It is

switched on via line U, and provides a feed-back from the output of the mrohrossingdetector to the inverting input of the integrWor.

Figure 20. The control logic. It receivessignals from the reset pulse generator MI, thecounter IGI and the polarity detector ICI andF). It drives the input chopper 011, the countgate lel, the discharge circuit IS and TI, thepolarity indicator 10 and la) and the driftcompensator (U).

Figure 21. The overall diagram. P1 serves forzero adjustment of the integrator (see fig-ure 14). P2 and P3 serve to calibrate the DVM(see figure 181.

dual WOW de..

inaccuracies feedback is applied roundthese circuits during the display period.During this time point U is low, so T13is turned on and hence F3 is conducting'(figure 19). Points M and K are conneoled to the output of the zero -crossingdetector and the inverting input of theintegrator respectively, so any voltageoffset on the output of the zero -crossingdetector will be integrated, which willtend to null out the offset.During the measuring period point U is'high', and the drift compensator itswitched off so that the integrator andzero-cr.sing detector can functionnormally.

Control logicThe measurement sequence timing isperformed by the control logic, the cir-cuit of which is given in figure 20. Themeasurement sequence starts with apositive pulse from the reset pulse gen-erator, which resets the counter viapoint D (figure 12). This pulse is alsoapplied to point E of the control logic,and on the trailing edge of the pulse theOK tlipflop (84IC3) is set. The Q outputconnected to line H switches on theinput chopper, whilst the Q output goeslow' and sets the set -reset flipflop con-sisting of two NAND -gates. Output Fthus goes Irish', opening the gate to thecounter, so that it begins to count clockpulses. The drift compensator is alsoswitched off via line U. A negative goingpulse presets FF I in figure 12 via line C.The 0 output of the 7473 holds the

which holds both inputs to the dis-charge circuit (S and T) high. The dis-charge circuit is therefore inoperative.When DM clock pulses have beencounted (time ts) output G in figure 11goes low', resetting the OK tlipflop(MIC3). The input chopper is nowswitched off via line H. In the meantimethe flipflop comprising As and aia hasbeen either set or reset by the polaritydetector. Since the 0 output of the7473 is now 'high' the outputs of Asand A., can be gated through At andAs to set the polarity indicator vialines Q and R, and also to enable theappropriate part of the discharge cir-cuit. The counter continues to countclock pulses. Note that it is not necess-ary to reset the counter at time t1, as atthe hundredth pulse it has reached zero!When the output of the integratorreaches zero the output of the zerocrossing detector is also zero. Both out-puts of the polarity detector go !high',so the output of gate Bs goes low,resetting the flipflop (13, and Bs),which disables the discharge circuit viaD7 and A,, A, The counter gate isclosed via line F so the count .ases.The display now indicates the measuredvalue of the input voltage until the nextreset pulse.

NI

duel slope dem elektor semernber 1975 - 991

21

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sensitivefigure 2. Th

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d the rtime

target.

Block diagramFigure 3 shows th e block diagram of th e

hitand timekthea!°LA star-stop-osckahr (block 1)miplesthe counting pulses for the timer. Thistimer (block 2) indicates the time be

awe

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thi,.very. lime the'minter starts all over again.

Nun 1. Circuit diagram of Me flash circuit.

Figure 2. The Pectic. Fonstoietien PPP.very realistic, depending on the

an

of the builder. All components are easilyaccommodated inside the pistol.

Figure 3. Block diagram of the LEP.

Figure 4. Timing diagram of a: the outputof MM1, 5: the output of MM2 and c: thethe oscillator output.

Figure 5. Circuit of the 'LEP complete withInner and traffic light'.

leo eloktor saptember 1975 - 949

This counting cycle can be interruptedonly by a direct hit on the light sensitiveresistor (block 7). Then a pulse is Pro-duced which via the OR -gate (block 4)triggers the monostable multivibrator(block 5) so that the oscillator isstopped.

DiagramFigure 5 gives the overall diagram ofthe hit and time indication. The indi-cation unit uses three cascaded 7490decade counters with 7447 decodersdriving Minitrons and needs little furtherdiscussion.The minitron has been chosen for thedisplay. Any other seven -segment dis-play could, however, be used instead.The counter input is connected to anastable multivibrator. This multivibratoris formed by two nand gates (N5 andN6) with frequency -determining el-ements.A control unit starts and stops theoscillator, also resets the counter. Animportant part of the control unit is thehit detector built around TI.Transistor TI is adjusted so that it isnormally conducting. The voltage div-ider consisting of RI and R2 coupledby a capacitor can, however, brieflyinfluence the bias of Tl. When a lightflash hits R2, the base of TI will bebriefly grounded. As a result TI blocksand by means of the trigger circuitconsisting of NI and N2, a short pulsegoing from `I' to '0' is generated. This

triggers the monostable multivibratorMMI connected behind. The sensitivityof the trigger circuit can to some extentbe adjusted with P 1.NAND N4 is used m an OR -gate here!As long as the output of the Schmitt

4Start

SI71

II pulsesneed cycle

sr

trigger produces no pulse, it remains atthe logic `I' level. The same applies tothe output of N3. This output remains

until the last counter has reachedposition 1001. This happens after9 seconds. As soon as the position 1001is reached, the output of N3 changesto '0', so that MMI is triggered via N4.From then on it is impossible to triggerMM I from the hit indicator.The triggering of the monostable multi -vibrator MM1 causes the oscillatorformed by the gates N5 and N6 to beblocked, because one input of N6 iscovetted to the 0 -output of MMI.Atnthe same time the set -reset thpflop(N7 plus N8) W reset by the 0 -signal onthe input of N8. As a result the outputof N8 becomes '1' so that the red lamp,connected in the collector circuit of T2,

r 941- elektor samember 1970 lea

lights up. The output of N7 goes to If ,so that the green lamp in the collectorcircuit of T4 extinguishes.The circuit uses a kind of 'traffic light'as an indicator, which gives the startsignal (green) and also indicates eitherthat a hit has been made or that theplaying time is over (red).The cycle time of MM1 is about2 seconds. MM2 is started on the trailingedge of the output signal of 0 of MM1(that is after two seconds). The Q -outputof MM2 then becomes `I'. This causesthe amber lamp of the traffic lights tolight up. The set -reset flipflop is reseton the trailing edge of the Q -signal. Thered and amber lamp 7xtinguish and thegreen one lights us.r. As won as theQ -output signal of the first monostableMM I becomes 'I' tie oscillator N5 plusN6 starts again. At the same time thecounters are reset by the output signalof MM2, and kept at .0' during thecycle time of this monostable. Onlywhen Q of MM2 becomes .0' again, canthe counter start ranting the pulses

of the oscillator. This coinddes withthe traffic lights changing to green.For 9 seconds it is then permitted toshoot at the target. The cycle describedabove repeats itself.The functioning of the traffic light isslightly unconventional. Normally theamber lights gives warning that red iscoming up. In this circuit, the amberwarns that green is coming up (toindicate that the marksman may 'go'i.e. fire at the target).

ConstructionThe target is basically a board with ahole in the centre. This hole accommo-dates a lens with a focal length of about20 ram. The light sensitive resistor ofthe hit detector is mounted at theprincipal focus behind the board. A lenswith about the same focal length ismounted in the barrel of the pistol.A diaphragm with a lamp directly be-

hind it is mounted at a distance of about20 mm from the lens in the pistol barrel.The batteries can be housed in the buttof the pistol, which is a modified toypistol of an `automatic' type.The pistol should be fairly large, so thatthe components can easily be accommodated inside it (see figure 2). Themost realistic results are obtained ifthe pistol can retain the original cap -flung mechanism to produce a bangwhen the trigger is pulled.

ConclusionBesides its original purpose (shooting)this apparatus ran also be used for test-ing reaction speed. The possibility ocheating is then, however present be-cause of the amber warning light and thefixed time cycle.

N. Beun

tiestottotThe author does not pretend to present arevolutionary design, but only wishes togive a positive contribution to safety onthe road, because in his opinion directionindication is something that leaves muchto be desired with cyclists and mopedriders.The design described here is a trafficatorcircuit which consists of an astable maid -vibrator and a switching darlington.Since the trafficator must also operatewhen the cycle is stationary, a battery isprovided; if the dynamo is not to beused at all, Ds can, of course, be omitted.

The flashing frequency is 64 'flashes' pertsminute and is reasonably constant owingto the characteristics of the multivibra-tor. With the switching transistor (Ta)used here, a maximum current of 0.4 Acan be switched. Transistor Ta shouldhave a low leakage current.The whole assembly (including batteries)should be shock and rattle -proof andmounted resiliently in a watertight cabi-net. Unauthorised use of the circuit iiavoided by using a lock switch for Ssaand Sib.

99 nitri amplifies

W. Kimmel

cii*oft°

Amplification of signals at frequenciesup to 30 MHz without distortion andwith a level frequency response requiresfartlY complex circuitry and may needexpensive measuring equipment to set upFor driving digital equipment, however,distortion is less important, and in factthe amplifier described here clips therignal. to provide a square wave output.The circuit will operate from a standardTTL (5 V) supply.

Transistors usedExperiments with various B.F. transis-tors proved unsuccessful due to thetendency of the circuit to lake -off intooscillation at umpteen megahertz, or notto work at all with the required supplyvoltage. Quite by chance a BC109C wassoldered into the circuit, which at onceperformed perfectly. Further exper-iments showed that a large proportionof BC109C's performed quite happily toabove 30 MHz. Tests were tamedout on200 samples of BC107B, BC109C andunmarked `TUN's', and the results areshown in figure I. The BC109C gave thebest results, with 50% of the specimenstested being usable up to 30 MIT10% still usable at 80 MHz. e,

The CircuitThe circuit of figure 2 is extremelysimple. Dl and D2 limit the input voltageto protect the transistor. The transistoroperates as a common -emitter amplifier.

Figure 1. Graph of percentage of usable devicesversus operating freq..cy.

Figure 2. The circuit of the amplifier.

The output is fed to a pulse shaper con-sisting of 2 NAND Schmitt triggers(7413). This produces pulses with a risetime of less than 10 nanoseconds whichwill ensure reliable operation of theTTL circuits which the amplifier drives.

ConstructionOne or two points are worthy of notewhen building the circuit,1. Lead lengths should be kept short in

elektor September 1975-946

view of the high frequencies involved,and in particular the output should

asbeclose as possible to the inputof the first 7413.

2. A transistor should be chosen with aD.C. current gain of greater than 200as these are more likely to have a good

3.high -frequency

D.C.YiarbforshimsalceanR2 providesd feed-back and should be selected to give acollector voltage of about 1.25 V.The supply filter (R4, C2, C3) is

the

efinLtepllify to avoidtransients on the supply line driving

If all thew points are attended to, tlieamplifier should operate up to at least30 MHz with an input sensitivity of100 mV. Measurements on the localoscillators of receivers can be carried outusing the amplifier, although a smallerinput capacitor may be required toavoid detuning the oscillator. Alterna-tively, a direct connection may not benecessary if sufficient signal strength isavailable. In that case a capacitive

coupling may be made by windingshort length of insulated wire arodthe end of a suitable resistor or capacitorin the circuit under test.Finally, it should be emphasised that thisamplifier is not suitable for analogueamplification of signals, for instance,an

asaerial preamplifier, since the signal is

dipped.

946 - alektor saptember 1975 car clock

The E1109 ICThis COSMOS IC contains all the func-tions necessary for a 12 or 24 hourclock. It incorporates an oscillator cir-cuit requiring only an external4.194304 MHz crystal and trimmer ca-pacitor for operation. The display out-puts are multiplexed, and commoncathode LED displays can be driven viasingle transistor buffer stages. A I

second output is available to drive aflashing LED, and an output is alsoavailable that gives one pulse every24 hours. Control inputs are provided in

the form of reset (to 0.00), stop, slowand fast forward cycle, for setting thecornet time. The circuit will operateon supplies up to +15 volts.

The complete circuitThe circuit of the complete clock isgiven in figure 1. Although the IC hasgood noise immunity a supply stabil-ization circuit is included that incor-porates interference suppression, for usein cars. The stabilizer is a simple weerreference driving an emitter follower,

113. However, due to the high currentgain of the BC517 (typically 30,000)this circuit gives good regulation withfew components. A filter consisting ofRI, R2 and CI suppresses pulses fromthe car ignition system. CI should bea low -inductance type of capacitor,preferably ceramic. The stabilizer pm-vides a supply to the clock of about 9or 10 volts.The clock may also be powered fromthe mains by a simple power pack consilting of a transformer, bridge rmtiheand smoothing capacitor. The trans-

' 8C 67

Is

.,77,-....".

akevle- r '- `+'

TI ... TII BC518

12/24,1ink

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. ..SI = mat

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6c 78

car clock Weimar septersims 1975 - 997

former should have a secondary voltageof about 8 V r.m.s. The output of thepower pack can then be connected tothe input of the stabilizer on the clockboard.The display outputs of the IC operateon the well-known multiplex system(see `HOSCLOCK 5314, Elektor Dec.1974). The multiplex frequency of1024 Hz is derived, inside the IC, bydividing down the 4.194304 MHz refer-ence frequency. The displays are pulsedsequentially for approximately Alps.This means that the segment resistorsmust be quite low to achieve reasonablebrightness.Sin. the IC can sink only 0.1 mA atthe digit outputs high gain transistorsmust be used for T8 - T11. For thisreason the BC516 was chosen, whichhas a current gain of typically 30,000.The maximum collector current is alsoan adequate 400 mA. As the segmentdrive transistors TI - T7 carry only one -seventh the current (maximum) ofTO -T11, the BC179C may be a suitablealternative. However, these should beselected for a minimum gain of 400.

The crystal X and C6 are the externaloscillator components. The trimmer ca-pacitor is used to adjust the timekeepingof the clock by 'pulling' the oscillatorfrequency. This may be done by con-necting a frequency counter in theperiod mode to the seconds outputpin 13. Direct measurement at the os-cillator output should be avoided, mthis may load the output and alter the

frequency. Alternatively the time-keeping may be adjusted over a longerperiod using radio or telephone timesignals.The seconds output drives T12 whichcauses the LED D2 to flash, thus show-ing that the clock is working. This is, ofcourse, a refinement and may be omit-ted if the continual blinking of the LEDis annoying. The clock may be connec-ted for a 12 or 24 -hour cycle by meansof pin 18. This is grounded for a

Figure 1. The complete diagram of the cardark, including the stabilized supply. Ifnecessary, the transistors T1... T7 can be re-placed by types such as the BC 179 C. Eachof the latter must then be checked for currentamplification factor.

Figure 2. Lay -out and component arrange-ment of Me main p.c.b. The wire bridgeserving es the fixed adjustment for 12 -hour or24 -hour clock requires extra attention 1s.beak

Figure 3. The layout and comp..nt rarenessmans of the display p.c. board. This boar. isconnected to Prt main p.c.board by means ofthe segment resistors

Part. list figure 1

Resirtors:R1,1112 =470 02R3 ... R9 = 100 11RIO = 56012

Capacitors:01,07 ... 010= 100nC2,C4,C5 = 1.5rt tantalumC3=22µ. 16 VC6 = trimmer 5 ... 25 p

Semiconductors:IC -E 1109 - EurosilT1 ... T11 BC 516T12 = BC 177 B etc.T13 = BC 517DI - zeroes diode 10 Vt00 mmD2 - LED (TIL209 or similar)

Miscellaneous:X - 4.194304 MHz -crystalDPI ... DP9 - DL 7041Litronirt or

equivalentsSI ... S4 = change -over switches, if

required double pole.

sarisrSO- Weldor remember 1970

I4 Swage 4. Showing how the main- and displayprinted circuit boards Sr. interconnected.

12 -hour cycle and connected to positivesupply for a 24 -hour cycle. A link onthe board makes this connection to theconstructors requirements.

Setting the clockGrounding the 'reset' input (pin 14) bymeans of SI will reset the display to0.00. Grounding the 'hold' input (pin15) will stop the clock. S3 causes theminute display to advance by oneminute per second, while S3 causes thehours display to advance by one hourper second. C7 - CIO are included tominimise the effects of switch contactbounce. The use of double pole switcheswith their contacts wired in parallel willalso help if needed.

ConstructionTo keep the finished clock as compactas possible a three-dimensional con-struction is employed with the displayboard mounted on top of the main p.c.board, and connected to it by the seg-ment resistors and wire links. The boardand component layouts are given infigures 2 and 3, and the general appear -

an be seen from figure 4 and thephotograph. The link for 12/24 -houroperation is at the bottom laths= cor-ner of the main board. Only one linkshould be soldered in as otherwise thesupply will be shorted out.The IC should be the last componentmounted on the main board and if itis soldered in then an earthed solderingiron must be used. For preference asocket should be used for the IC. Fi-nally, a 500 mA fuse should be connec-ted in series with the positive supplyLine when the unit is installed in the car.

Variations on the designAs mentioned earlier the clock may, ifso desired, be run from a mains powerpack. Like the MOSCLOCK a standbybattery supply may also be incorporatedif it is arranged that the supply to thedisplays is switched off in the event ofa mains failure. (This reduces the powerconsumption to the few microampsneeded to power the COSMOS cir-cuitry). Alternatively, the clock may beused as a travelling clock by powering itfrom a rechargeable NiCd battery, andincorporating a pushbutton to activatethe display when required. For suitablecircuitse MOSCLOCK 2, ElektorJune 1975.se 1,1

market elektor september 1975 - 949

COS/MOS opampThe CA3I30 series of operationalamplifiers, which RCA have intro-duced, offer a combination of theadvantages of COS/MOS andbipolar transistors. A very highinput impedance is achieved bythe use of MOS (P -channelMOS) FETs in the input stage,while a large output voltage swingis made possible by the use of aCOS/MOS transistor pair for theoutput amplifier.The CA3130 is supplied in aTO -5 horoing. Type CA3130T hasnormal leads, while those of typeCA3130S are bent into aDIL configuration. Three variantsof the electrical specification areavailable:CA3130T and CA31305 are thestandard versions;CA3130AT and CA3130AS haveimproved input specification;CA313OBT and CA3130BS arebetter still.Figure I shows the connectionsfor the T versions. In the S ver-sions, connections 1, 2, 3 and 4lie along one line while 5, 6, 7 and8 tie along the other lime.The CA3130 can work off asym-metrical power supplies from +5to +16 V, or from 72.5 to TO Vsymmetrical supplies.Figure 2 shows the block diagramof the CA3130. Input pins 2 and3 can be driven down to 0.5 Vbelow the negative supply (pin 4).In many applications the outputcan be swung very nearly positiveor negative supply leveL For thesereasons, the CA3130 is ideal foruse with a single supply.Thee class -A amplifier stages(shown as B, C and D in figure 2)provide the overall gain of theCA3130. A bias circuit (A) pro-vides two voltages for the firstand the second stage.Pin 8 can be used for phase com-pensation, and/or to strobe theoutput stage into quiescence.When pin 8 is connected to thenegative supply (pin 4), the out-put voltage at pin 6 rises almostto that of the positive supply volt-age on pin 7. This condition ofessentially zero current drain inthe output stage under thestrobed `off condition can onlybe achieved when the ohmic loadresistance presented to the ampli-fier is very high (e.g. when theamplifier is used to drive COS/MOS digital circuits).Input stasesThe internal circuitry of theCA3130 is shown in figure 3. Thecircuit has a differential inputstage with P-MOS field-effecttransistors (T6 and T7), workinginto a error -pair of bipolar tran-sistors (T9 and T10) whichfunction as load resistors.The output voltage of T10 is usedto drive TI I in the second stage.

Offset nailing, when desired, canbe effected by connecting a100 kUpotentiometer acrosspins I and 5, with the slider con-nected to pin 4.Cascodecennected P-MOS transis-tors T2 and T4 are the constant -current source for the input stage.The bias circuit for the currentsource will be described later.The diodes D5 -D7 provide protec-tion for the gate against high -voltage transients due, forexample, to static electricity.

Second stageMost of the voltage gain in theCA3130 is provided by thesecond amplifier stage, consistingof bipolar transistor TI I and itscascode-connected load resistanceprovided by P-MOS transistors T3and T5. The source of bias poten-tials for these P-MOS transistorswill be described later. Miller -effect compensation (olloff) isaccomplished by simply co.fleeting a small capacitor betweenpins 1 and 8. A 47 pF capacitorprovides sufficient compensationfor stable unity -gain operation inmost applications.

Bies-Source CircuitAt total supply voltages some-what above 8.3 V, resistor R2 andzeerr diode D9 serve to establisha constant voltage across theseries-cormceted circuit, con-sisting of resistor RI, diodes DIto D4 inclusive, and MOS tran-sistor T1. A tap at the junction ofresistor RI and diode D4 providesa gate -bias of about 4.5 V forP-MOS transistors T4 end T5 withrespect to pin 7. A potential ofabout 2.2 V is developed acrossdiode -connected transistor T1with respect to pin 7 to providegate bias for transistors T2 andT3. It should be noted that Ti in'mirror -connected' to both T2and T3. Since transistors 71, T2and T3 am designed to be iden,ical, the approximately 200 pA inT1 establishes a similar current inT2 and T3 as constant -currentsources for both the first andsecond amplifier stages, mspect-ively. At supply voltages some-what less than 8.3 V, the zenerdiode becomes nonconductiveand the potential, developedacross series -connected RI,Dl ... 1)4, and Ti, varies directlywith variations in supply voltage.Consequently, the gate bias forT4, T5 and T2, T3 varies inaccordance with supply voltagevariations. This variation resultsin deterioration of the powersupply rejection ratio (PSRR) attotal supply voltages below 8.3 V.Operation at total supply voltagesbelow about 4.5 V +gnats inseriously degraded performance.

IMO -*Nor september 1975 market

11111RICETOutput StepsThe output stage consists of adrain -loaded inverting amplifierusing COS/MOS transistors T8and T12 operating in the class -Amode. When operating into veryhigh resistance loads, the outputcan be swung within iniMvolts ofeither supply rail. Because theoutput stage is a drain -loadedamplifier, its gain is dependentupon the load impedance. Typicalop-arnp loads are readily drivenby the output stage. Becauselarge -signal excursions are non.linear, requiring feedback forgood waveform reproduction,transient delays may beencountemd. As a voltagefollower, the amplifier canachieve 0.01 per cent accuracylevels, including the negative

supply

APPlicartiorisIn figure 4 the CA3130 is used as

voltage follower. The bandwidthis 4 MHz and the slew rate is10 V&AFigure 5 gives the circuit of aCA3 f30 as a peak detector forpositive voltages. It should benoted that, became of internalcapacitances, the bandwidth forsmall signals is less than for largesignals. For a 6 V peak -to -peaksignal, the 3 dB bandwidth is1.3 MHz, while fora 0.3 V peak -to -peak signal the 3 dB bandwidthis 240 kHz.In conclusion, figure 6 shows acircuit in which a CA3600E isused to boost the output powerof the CA3I 30. The current con-sumption of a CA3600E as aclaw -A amplifier is 20 mA with asupply potential of 15 V. Thisarrangement Increases the current -handling capacity of the CA3I30output stage by about a 2.5.With feedback, the closed -loopgain of the circuit is 48 dB. The3 dB bandwidth is about 50 kHz.Output power is 150 mW with atotal harmonic distortion of 10%.

Figure 1. Connection diagram forthe CA3130T.

Figure 2. Block diagram of theCA3130 series of seamen.

Figure 3. Basic circuit of theCA3130 series of oparnps.

Figure 4. Voltage -follower circuitfora CA3130.

Figure 5. Peek positive detectorcircuit for the CA3130.

Figure 6. Increasing the outputpower of a CA3130 by connaming a CA3600E.

TableTypical values for the CA3133COS/MOS OPS.P.Supply voltage+5 V...+113Vor±2.5Input offset voltage(Vb ±7.5 VI amVInput offset current(Vb = ±7.5 0.5 pAInput resistance(Vb = 37.5 V) 1.5x 10tri-2Input quiescent current(Vb = ±7.5 VI 6pAInput -voltage ranee(Vb - +15 VI -0.5 12Maximum output voltage(Vb -+15 V: Flt_ = 2 k) 13.3V(Vb +15 V: FIL = 15VMaximum output current(Vb = +15 VI Iseum 22 mA

'sink 20 mAOpen.loop gain fib - +15 0/when V... 10 yg,and Hi . 2 k 110d9

Unity gain cronover freelcerwe(Vb ±7.5 V/without compensation 15 MHzwith compensation (Cc 47 PIand 0 dB gain 4 MHzInput capacitance (Vb ±7.5 VIm1 MHz 4.3 pFCommon mode rejection(V, . +15 VI 90 dBPower supra,' miriceian(Vb ±7.5 VI 32 AV/VEquivalent input noise(Vb k7.5 VI when Rs- 1 M;bandwidth . 200 kHz 23µVSlew rate - ±7.5 VIwith open loop and Cc . 0

30 V/Pswith closed loop and CO . 56 P

10 V/AsThese values are vend for enambient temperature of 25°C.

5% digit panel meterDigilin, Inc., of Burbank,California, announce the intro-duction Of a 555 -digit panel mete,Model 2552, offering .01% accu-racy, four counting modes and100% overranging. Direct readoutin measurment units, e.g., lbs,CFM, PSI,e makes the new instru-ment suitable for monitoring ofweight, pressure, flow or otherindustrial processes.Model 2552 permits count by10's, 5's, 2's and l's. Maximumreadout in the 'count by 10'smode', including oveminge, is199,990, with the least scant digit a `dummy' zero. Fullsale readout for count by 5's,2's and l's is 50,000, 20,000 or10,000 respectively, plus 100%ovarrange. A Beckman (Sperry -type/ display is utilized.Counting modes and decimalpoint location am selected bychanging jumper wires on therear connector. A hold functionis also available at the connectotAutomatic polarity, TTL compat-ible BCD outputs, display storageand a sealed case are other fea-ture& Mceimurn resolution is100 IN per count (1µV me&talon is available man option.)Other major specifications: tem-Oceacem stability (0 to +50°C) isbetter than ±.005% full scale per°C. NMNR is 30 dB at 60 Hz.CMNR is 100 dB at DC, 80 dBat 60 Ha. Input impedance isgreater than 100 megohms andbias current is typically 20 nA(50 nA maximum). The panelopening required is a compact3.74-91 x 2.05'0.

F -Dyne electronicsestablishes internationaldivisionF -Dyne Electronics Company ofBridgeport, Connectiat has es-tablished an International Div-ision to sell their precision ca-pacitors to the overseas market.The new international divisionwill be located at 2200 ShamesDrive, Westbury, L.I., New York11590. Telex 961474.F -Dyne Electronics Co. manatee -lure precision wound -film dielec-tric cepacitors, and also epoxy,ceramic, dip -coated and metalcased types.

152 - Weldor september 1975 asNertisament

MAL ORDER COMPONENTSG.Newman,12 Francis Aura, St Albans

Herts.AL3 6BX

MullardC2130 2SOV

VnTM0.01oF0.047u F So

01SuF 4p0.22, Sp0.33, 7P

P=.

Integrated Circuits5N7400 series TT L 60. 7400139 7403/10/40 14p. 74414SI., 7473/121 320, 74..0

4 SP. pa,c SP

0 NIMDMD

:`7111`411°clog an

"tl'als 3p1N4001 SP

PEA CHAFIGE.EPECPCISTAGE

mIs511116

Llille

a I -Rea 10pYellow 1PPGesn =PT%low 1'IGreen 21p

nod U::Green 26p

TUNTUP SpDUS 2KpDUG Zere

SAE for full 1.1

In the pinning list for linearICslElektor 'Summer circuits',P. 7751, pins 1 and 8 of theCA3080 are shown es 'phaseonmpansation'. This n in ac-cordance with the1975 edition of the FICAdatabook, but it is not coorect .. These pins are not con-nected, and should be labeled

Modifications toAdditions toImprovements on ebd

Corrections inCircuits published in Elektor

NC 0

Al%T"

flap°0 0 ram;

mr

CLOCK COMPONENTS01011T 4.114,4 CLOCK KR comMene less use . bleep ale., . ....

OUT:TrCTATDALLILEVSErsoineble fm'ebVP16doi OTC, .92.760 MP Min. Xtel,Pipharsuracv/stabilbvslplv,gtimemrsMro..=

2 CMOS ICS, trirn

micas Red Common C.* 7 7,7 LEO bl,loy

:ILK767262 Ft I A711?1.2TeD2411Tonea eltr'rn ."444.4:1;44:61M5312 410 digit clock IC ..22.44 A25122% 0 4101 double .94.26

VEYIrrn!CM'oll====pfl'g,MmrdrA27:1orlOVVOVern'"Ur2"'."=or2;rd' 3000 for 210.50

CMOSTCMOS-CMOS-CMOS-CMOSMen stock range in UK from RCA. Monopole, Nabonel,,Siltekg1.42.

Paaal.002

0.31&:]text021C04023

1.600.21

.0411.14.2

202137 0.61 20.03 C04002 1.49

04036.007

1.47004024021.24025

1.160.21

0.42 2.02MOM 2.02

04062.063

7.99 C04(08 1.2.22 C134000 272

.000 1.021.24026

.006 OAP C.0271.96061

04045.0. 220202

.066INV.

1.05 M1.14601 OM0.26 MC14602 966

D4010 0.07C0402604011 921 CD..

MO1.66

04047 137LAO. 0.7B

MOS.070

0.26 MC12500 4.20920 MC12610 1.26

ggfj t.623 gr4C73? 040'''60 g",42;; 11.4",442;:41;1

M22;44111,174 1,',1; 11; P;44;2 12,4,121.1Eg 4'4:1;04016

E44r11

0.62 CD4034

122°4140.26

;1:04063

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04076

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__AS. 1.45&IN 722= 12 040672011

0.21.082

0.20 MM74C14 LIB0.20

ATes Opber rated.. not epo12 CleoI:07;43 on orden under ez Desna.. IP Cleo Pm PP RETURN I

an sem PEE Mth en2 or.. or. inquest tan see belpsLOPRolel orders

SINTEL, 53 K Aston Str.Oxford Tel. 0865 43203 SINTEL

OTE: Pin 4 ism Id so case.

advema.m.nt &kw op.*. 1975 - 953

ElektorMOS Clockboards andcomponentsin stock

u aa.

RBITORPC

BOARDSFull range of Elektor boards exmock

number priceMOS Clock (two boards . £ 2.20TV Sound £ 1.50High quality Disc Preamp £ 0.99Aerial Amplifier £ 0.99AID converter £ 0.92P. and P. 15 pence.

MATRONELECTRONIC KITS

UK 300 Radio Control TransmitterUK 310 Radio Control ReceiverUK 325 R/C 'G XC2' Channel Splitting Unit

1000 & 2000 HzUK 330 GXC2 Channel Splitter Unit

15000 2500HzUK 330/A R/C Splitter Unit 1500&2500 HzUK 345/A Superhet R/C ReceiverUK 555 R/C 27 MHz Field Strength MeterUK 780 Electronic Metal DetectorUK 975 Capacitive Discharge Electronic Ignition

Unit. Neg. EarthPrices on Application

*NEW*low-cost £ 1.45IC insertion eachtool Trade

Supplied

all pricesinclude VAT

please add 20p to corer post

*NEW*low cost 55pIC extraction endstool Trade

Supplied

RCA2N 3055

70p each

BOOKSMallard Field Effect Transistors £ 180Mallard MOS I ntegrated Circuits £ 2 00Mallard Data Book 1974/75 . .........40 PMallard Transistor Audio & Radio Circuits . .£ 1.80Basic Electronics Part 1Basic Electronics Part 2Basic Electronics Pert 3Basic Electronics Part 4

lee&.Basic Electronics Pert 5Bask Electronics Part 6Basic Electronic Circuits Pan 1Basic Electronic Circuits Part 2 14.11Basic Electronic Circuits Part 3 lIBask TMevision Pert 1Basic Television Pan 2Basic Television Part 3Basic Electricity Pan 1Basic ElectricityElectricity Part 2Basic Electricity Part 3Basic Electrkity Part 4Basic Electricity Pan bELEKTOR Issues No. 1, 2, 3, 4 35 p each

LINEAR IC 'S

FAIRCHILDVat. Voltage Reg.

65p

FAIRCHILD8 Pin D.I.L.Op.Amp

NATIONALsemiconductor

33p

14 Pin D.I.L.2 WattAudioAmp.

£ 1.20

£ 1.65

MOTOROLACoilesStarao Decoder

£ 2.30

FERRANTIradio chip

£ 1.25

SIGNETICS

Timer

70p

NATIONALsemkonductors

24 PinClockChip

£ 4.35

gE5BELECTRONICS

283 Edgware Road, London W2.Tel. 01-262 8814

Hours of business 9.30 - 6.00Monday to Saturday

callers wekome

151 - elektor September 1975

* OVER 5,000 ITEMS - largest UK range ofelectronic components for homeconstructors.

* 200 PAGES - every aspect of electronics andcomponents for amateurs and hobbyists -kits, projects, test gear.

* DOZENS of new lines and new ranges.* MANY price reductions throughout the new

Catalogue.* A Discount Voucher with every copy, worth

50p.

ALL PRICES INCLUSIVE OF VAT

Write now for your copy, enclosing 70P remittance.

MIDLANDSNEW ELECTRON. STORE OPEN.GU% UPPER PARLIAMENT STREET

NOTTINGHAM. TEL.: 40003

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HENELEC STEREO FM TUNER.

26.25 ,tAge INGE 50p1lalso built and E 3/201

JOIN THE LARGE BAND OFCONSTRUCTORS.

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OUR INCREDIBLE PRICE£ 29.50 INCL. VAT

OTOZI:PATIONS HOW IN. ALL

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op

;MA varlable nun. slow elation..

ELEKTOR VERI An GMBHInternationaleFunkausstellung 1975

Berlin 29.8. - 7.9.1975Bitte besuchen Sie unserenStand in Halle 7 Stand 731

Elektor Verlag GMBH, 03133 Gengelt 1, W.Germen, Tel.1W-GerfM19110 02454 -5055

Unlike filament indicator lamps, Motorola Light EmittingDiodes don't die.They come in three colours- red,yellow and green-

and in viewing angles to suit all applications.We're so confident of your determination to be

up-to-date, that we've invested heavily to give youthe LEDs you want, when you want them.

Use indicator lamps that are worthy of yourequipment. Use Motorola LEDs as sentries to

watch over it.To find out more about the design

ssibilities of these high -reliabilityproducts,just send for the new

Motorola Opto Electronics brochure,which gives you information about our

light detectors and couplers too.You'll find it profitable reading.

/4) MOTOROLA Semiconductors ']-1'edserre'lVi'sn'Otle 01 90,8686,,rsg,sn0 East Kdistscle

DeWe':