IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 61, NO. 5, MAY 2013 2177

5.2-GHz RF Power Harvester in 0.18- m CMOS forImplantable Intraocular Pressure MonitoringMahmoud H. Ouda, Student Member, IEEE, Muhammad Arsalan, Member, IEEE, Loïc Marnat,

Atif Shamim, Member, IEEE, and Khaled N. Salama, Senior Member, IEEE

Abstract—A first fully integrated 5.2-GHz CMOS-based RFpower harvester with an on-chip antenna is presented in thispaper. The design is optimized for sensors implanted inside theeye to wirelessly monitor the intraocular pressure of glaucomapatients. It includes a five-stage RF rectifier with an on-chipantenna, a dc voltage limiter, two voltage sensors, a low dropoutvoltage regulator, and MOSCAP based on-chip storage. The chiphas been designed and fabricated in a standard 0.18- m CMOStechnology. To emulate the eye environment in measurements, acustom test setup is developed that comprises Plexiglass cavitiesfilled with saline solution. Measurements in this setup show thatthe proposed chip can be charged to 1 V wirelessly from a 5-Wtransmitter 3 cm away from the harvester chip. The energy thatis stored on the 5-nF on-chip MOSCAP when charged to 1 V is2.5 nJ, which is sufficient to drive an arbitrary 100- W load for9 s at regulated 0.8 V. Simulated efficiency of the rectifier is 42%at 7 dBm of input power.

Index Terms—Batteryless, energy harvesting, implantable de-vices, low dropout (LDO), on-chip antenna, pinless, RF identifica-tion (RFID) tag, RF rectifier, wirelessly powered devices.

I. INTRODUCTION

G LAUCOMA is the second leading cause of blindness,affecting millions of people worldwide [1]. In this

disease, the optic nerve is harmed due to increased pressureinside the eye, also called intraocular pressure (IOP). This canpermanently damage vision and lead to permanent blindnessif left untreated. Regular eye pressure monitoring can identifythe patients at risk and help start early preventive measuresto avoid further eye damage. Current clinical devices, such asGoldman tonometry and Pulsair pneumo tonometry, do notprovide continuous monitoring [2]. Continuous measurementcan be achieved with an implanted intraocular pressure monitor(IOPM) to improve treatment regiments. The IOPM implantneeds to be self powered to prevent the patient from undergoingrepeated invasive procedures to replace the device.Self-powering in implantable devices requires energy har-

vesting or wireless power transfer. One of the widely used

Manuscript received October 23, 2012; revised March 16, 2013; acceptedMarch 19, 2013. Date of publication April 09, 2013; date of current versionMay 02, 2013.The authors are with the Electrical Engineering Program, King Abdullah

University of Science and Technology (KAUST), Thuwal 23955-6900,Saudi Arabia (e-mail: mahmoud.ouda@kaust.edu.sa; muhammad.ar-salan@kaust.edu.sa; loic.marnat@kaust.edu.sa; atif.shamim@kaust.edu.sa;khaled.salama@kaust.edu.sa).Color versions of one or more of the figures in this paper are available online

at http://ieeexplore.ieee.org.Digital Object Identifier 10.1109/TMTT.2013.2255621

power transfer method is RF power harvesting. RF power har-vester is an essential module in any RF identification (RFID)system [3]–[10]. However, most of the published RF powerharvesters for RFID such as [3]–[8] were designed at UHF850–950 MHz and have to be attached with a bulky off-chipantenna or a large external inductive loop, which are not suit-able for biomedical implants. The RF power harvester proposedin [9] requires off-chip matching to achieve a highly sensitiveperformance of 32 dBm at 915 MHz. It utilizes low thresholddevices in its 30-stage rectifier that operate in subthresholdregion. This results in a very low input impedance that cannotbe matched using on-chip components. Large number of stagesalso increase the leakage and parasitics, which, in turn, degradethe rectifier efficiency and makes its performance worse. Thisis particularly severe for frequencies in a low gigahertz range,which is the preferred spot for implantable system [11]. Onthe other hand, very high-frequency RF harvester such as the45-GHz system presented in [10] is easier to be integratedwith an on-chip antenna, but it is not suitable for biomedicalimplantables due to very high losses of the medium at highgigahertz frequencies.Several CMOS-based RF power harvesters are compared in

Table I for implantable devices in [12]–[17]. All of these designsneed an off-chip antenna. The design in [12] has an off-chipmonopole that is 27 mm long that is potentially harmful to beimplanted inside the eye. The design in [13] utilizes on-chipinductive loops that is only good for near-field inductive cou-pling and requires perfect alignment with the external coil. Theimplantable neural sensor in [16] has the same issue, where aflip-chip inductive loop is attached to the chip and works atnear-field. To the best of authors’ knowledge, no CMOS-basedRF power harvester has yet to be reported with an on-chip an-tenna and built-in energy storage.In this paper, a fully integrated RF energy harvester with

an on-chip antenna is presented. It harvests RF energy froman incoming 5.2-GHz signal and stores the energy on theMOSCAP-based on-chip storage. The higher design frequencyenables smaller antenna that facilitates monolithic integration.The rectifier needs at least 17 dBm of power at its input to startfunctioning. It generates 1.3 V from 17 dBm of input power.The energy is stored on the 5-nF on-chip MOSCAP-basedstorage. When charged at 1.0 V, the storage can have up to2.5 nJ of energy. This energy is sufficient for 9 s to drive100 W of load at 0.8 V regulated. Simulated efficiency of therectifier is 42%, which is among the highest in this frequencyrange. The system is designed and characterized for a lossy eyeenvironment. On-chip antenna and MOSCAP storage make

0018-9480/$31.00 © 2013 IEEE

2178 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 61, NO. 5, MAY 2013

TABLE ICOMPARISON OF RF POWER HARVESTER FOR IMPLANTABLE SENSORS

Fig. 1. 5.2-GHz on-chip RF power-harvesting module utilized in an im-plantable sensor.

this design the smallest and the first fully integrated RF powerharvester solution suitable for implantable biomedical devices.This paper is organized as follows. Section II describes

the system design and test setup, Section III discusses theantenna design. Section IV describes the circuits design. Themeasurement setup and the experimental results are presentedin Section V, and finally, conclusions are drawn in Section VI.

II. SYSTEM DESIGN AND TEST SETUP

A. System Description

The proposed RF power harvester is part of an implantableIOP monitoring system-on-chip (SoC). A simplified block dia-gram of the entire system is shown in Fig. 1. The system consistsof RF power harvesting and storage, control and power manage-ment module, sensors module, and transmitter module. It hasseparate on-chip transmit and receive antennas. The system isdesigned at a 5.2-GHz license-free Unlicensed National Infor-mation Infrastructure (UNII) band that is widely used for indoorbiomedical applications. The frequency is selected to facilitate

on-chip antenna integration with usable gain while having ap-preciable signal penetration inside the eye. The system is de-signed and fabricated in a standard 0.18- m CMOS process.This paper is focused on the RF power harvester only. The en-tire system will be published elsewhere. The power-harvestingmodule includes an on-chip antenna to receive data and RFpower, synchronous RF rectifier to convert the incoming RFsignal to dc power, impedance-matching circuit between the an-tenna and rectifiers, dc voltage limiter for over voltage protec-tion, a low dropout (LDO) regulator to generate cleaner analogpower rail (VDDA) for circuits sensitive to voltage variations,voltage references for LDO and voltage sensors, andMOSCAP-based on-chip energy storage.The targeted system specifications are to provide an energy

pocket of 1 nJ that can supply 180- W average power to the SoCfor one complete communication cycle of 5.5 s after a chargingtime of 800 s. The system has been designed to be wirelesslypowered from an external reader with 4-W effective isotropic ra-diated power (EIRP) placed at a distance of 10 cm from the eye.This ensures a power density of 70.6 W/m when averagedover 6 min. This value is far less than the 50-W/m limit for oc-cupational use set by the International Commission on Non-Ion-izing Radiation Protection (ICNIRP) and Federal Communica-tions Commission (FCC) for human exposure to electromag-netic (EM) waves [18], [19]. The limit of 50 W/m correspondsto a maximum eye temperature rise of 0.3 C at a 5–6-GHzrange [20]. This temperature increase inside the eye using max-imum allowed power density is at least ten times lower thanthe threshold temperature rise 3 C for cataract formation [20].Since the averaged power density specified for the system ismuch smaller than the FCC limit, its corresponding tempera-ture rise inside the eye will be negligible. HFSS simulations ofa simplified human eye model for 4-W EIRP at 10-cm distancegives the value of instantaneous specific absorption rate (SAR)as 4.5 W/Kg, which complies with the IEEE short-term SARstandard of 30 W/kg for occupational use [21].

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Fig. 2. Cross section of the implantable IOP monitoring SoC test setup mim-icking anterior chamber of the eye.

B. Test Setup to Emulate Eye Environment

A custom setup is designed to mimic the real operation ofthe sensor inside the human eye, as illustrated in Fig. 2. Thechip is designed to be tested through 5 mm of saline solutionand 10 cm of air. This medium emulates the attenuation fromaqueous humor in the eye and the distance from the eye to theexternal reader. The chip is wire bonded to a custom designedprinted circuit board (PCB) and coated with 20- m-thick Pary-lene-C, which is a widely used organic bio accepted organic ma-terial. The chip is then immersed in a (1 1 0.5 cm ) Plexi-glass cavity, filled with high-permittivity saline solu-tion to emulate the aqueous humor in the human eye [22], [23].All the materials utilized for test setup design including PCB(Rogers Duroid RT5880, ), Plexiglass , andParylene-C have low dielectric constants to have aminimal effect on the high-frequency test environment.

III. ANTENNA DESIGN

Since the chip is for eye implant, due considerations mustbe taken for the design and subsequent characterization. A bio-compatible package is necessary and must be added around thechip for a safe implant. The chip must be placed 5 mm inside theanterior chamber of the eye, as shown in Fig. 2. Due to the sizelimitations, integration of the antenna on the chip is quite chal-lenging. However, the high-permittivity aqueous humor insidethe eye aids in antenna miniaturization. However, theloss of this medium ( ) seriously affects the an-tenna efficiency.According to [24], with an EIRP of 4 W, a wireless IOPM

device should be able to communicate with an external readerplaced 10 cm away from the eye. The gain required for the an-tenna can then be calculated using a Friis equation [25]. Theminimum voltage needed at the input of the rectifier to functionis 0.4 V, which corresponds to roughly 21 W for the rectifiersin our design. The gain of the antenna must be equal to or largerthan 20 dBi.The antenna is designed to receive 5.2-GHzRF signal from an

external source and feed it to the energy harvesting and storageunit. The antenna needs to be matched to the rectifier circuit,which has a complex input impedance ofat 5.2 GHz. The design of the antenna must provide an input

impedance of that is the conjugate of . In addition, theantenna geometry should leave enough space to design capaci-tors in the top metal (M6) layer.A custom monopole is designed in the top metal layer, as

shown in Fig. 3. An inductive feeding is used to provide the

Fig. 3. 5.2-GHz differentially feed monopole antenna structure (red in onlineversion) within the chip pad frame in top metal (M6).

Fig. 4. Simulated 3-D radiation pattern of the antenna with 14.3 dBi of gain.

required large inductance for matching with a highly capaci-tive impedance of the rectifier circuit. Furthermore, an induc-tive load is added at the other end to reduce the antenna size.A parasitic element near the monopole helps increase the gain.The input impedance of the monopole isat 5.2 GHz. Despite considerable inductive antenna impedance,the large capacitive part of the rectifier could not be matchedcompletely. A matching network composed of an on-chip in-ductor and two capacitors is thus utilized to provide the requiredconjugate match. Further details about the impedance matchingfollow in Section IV. Fig. 4 presents the simulated 3-D radia-tion pattern and gain of the antenna. It can be observed that amaximum gain of 14.3 dBi is obtained along the plane of thesubstrate. Design and measurements details of the antenna canbe found in [26].

IV. CIRCUITS DESIGN

A. RF To DC Voltage Rectifier

A multistage voltage multiplier is used as an RF to dcvoltage converter to provide the complete system with a dcsupply voltage (VDD) from an extremely low-level RF powersignal that is available from the on-chip antenna. As discussedin Section III, the rectifier should work with input RF powerof 21 W ( 16.7 dBm). A circuit schematic of the five-stagevoltage multipliers used in the power-harvesting moduleis shown in Fig. 5. Differential drive synchronous rectifiertopology is selected to have higher efficiency and to minimizethe effect of threshold voltage in the CMOS rectifier [8].In this work, the voltage multiplier is successfully operating

at 5.2 GHz with minimum input received RF power equal to17 dBm (20 W) to supply 1.3-V dc output voltage as the

global VDD rail. Simulation of the RF to dc power conversionefficiency and the dc output voltage of the rectifier versus the

2180 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 61, NO. 5, MAY 2013

Fig. 5. Five stages of synchronous rectifier are used as a voltage multiplier.

Fig. 6. Simulated RF to dc power efficiency and the dc output voltage of therectifier versus the RF input power.

Fig. 7. Simulated input impedance versus RF .

input RF power in dBm is shown in Fig. 6. The designed rec-tifier achieved RF to dc power conversion efficiency of 28% at5.2 GHz with the minimum received RF power condition and42% as the maximum efficiency at 7 dBm of input power.As a typical nonlinear circuit, the input impedance of the

rectifier varies with respect to the input RF power, as shownin Fig. 7. This effect complicates the power matching circuitdesign and highly affects the overall sensitivity of the RFpower-harvesting module. To achieve the highest sensitivityfrom the rectifier topology, a matching network has beendesigned to match the input impedance of the on-chip antennato the input impedance of the rectifier at the minimum inputRF power with which the rectifier can generate the minimumaccepted dc voltage. An on-chip inductance and RF metal–in-sulator–metal capacitors (MIMCAPs) are utilized to build the

Fig. 8. Input matching between the rectifier and the antenna.

Fig. 9. DC voltage limiter schematic.

required matching network ( pF, nH), asshown in Fig. 8.

B. DC Voltage Limiter

For short-range communications, RF power can reach highlevels that can generate dc voltage higher than the breakdown ofthe remaining circuits of the chip. A dc voltage limiter has beendesigned to clip the generated dc voltage to maximum 1.6 V, asshown in Fig. 9. This voltage limit acts as an over-voltage pro-tection for the whole circuits supplied from the rectifier outputvoltage VDD. This dc voltage limiter is working to drain theexcess power in case high RF power is received, for example,by a short reading distance.

C. LDO Voltage Regulator

An LDO voltage regulator is designed to supply a cleananalog power rail VDDA for the sensitive blocks, such as thetransmitter voltage-controlled oscillator (VCO) and the IOPsensor that can be significantly affected by supply voltagevariations. The LDO schematic is shown in Fig. 10. In thiswork, LDO is operating on the VDD full input range (1–1.6 V)to supply constant output with lineregulation of 30 mV/V when it is loaded by 0.5 mA and withload regulation of 15 mV/0.5 mA. A load condition of 0.5 mAis considered for the VCO transmitter and sensor circuits in theLDO design.Low quiescent currents A and A are internally

consumed by LDO at input voltage and 1.6 V,respectively (with load condition mA). The simulatedquiescent current and LDO output voltage VDDA are shownin Fig. 11. To reduce this quiescent current from the standbycurrent, LDO has been designed to be switched off completelyduring charging mode. This switching is achieved by an enablesignal applied to M6, M7, and M8 in Fig. 10. This enable signal

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Fig. 10. LDO regulator schematic.

Fig. 11. Simulated quiescent current and dropout voltage .

is raised high only when the input VDD is charged to a sufficientlevel for the LDO to work properly. To generate this signal, avoltage sensor has been designed with a specific hysteresis andwill be discussed in Section IV-D.LDO stability analysis resulted in a gain margin dB

at MHz and phase margin deg atkHz at input voltage V and load conditionmA.

D. Voltage Sensors

In order to enable power management for the completeSoC, voltage sensors are utilized to generate power signals.These signals are raised high when the main power rail VDDis charged to a sufficient level for the system components. Thesystem remains in sleeping (charging) mode until it receivesthese power good signals. When these signals are received,the system will move to active mode. For stable transitionsbetween these modes, the voltage sensor is required to havehysteresis thresholds, i.e., different high level input voltage

and low level input voltage . This is to avoid systeminstability, which can take place by moving back and forth tocharging mode.Two different voltage sensors have been designed to generate

two separate power good signals (VDD GD and VDDA GD).Schematics of the voltage sensors are shown in Fig. 12. TheVDD GD signal is the main power good signal for the wholesystem and its range is ( V, V, V),

Fig. 12. VDD and VDDA voltage sensors schematic.

Fig. 13. Die microphotograph.

while the VDDA GD signal is generated to enable the LDO asdiscussed in Section IV-C and it has narrower hysteresis (V, V).

V. EXPERIMENTAL RESULTS

The on-chip RF power-harvesting module is implemented in0.18- mCMOSwith chip size equal to 1.5 3.2 mm . The chipmicrophotograph is shown in Fig. 13. Both dc and RF measure-ments have been performed and are discussed in Sections V-Aand V-B.

A. DC Measurements

On-chip dc measurements have been done using a microprobe-station for the LDO and the voltage sensors. The resultsvalidate proper operation of these circuits. The regulated outputvoltage of the LDO (VDDA) versus the unregulated voltage rail(VDD) is shown in Fig. 14. The voltage sensor control signal(VDDA GD) is also measured versus the unregulated inputVDD and it is shown as a dotted line in Fig. 14. As discussedbefore in Section IV-D, VDDA GD is used as an enable signalfor the LDO to disable it during the charging mode. This savesthe LDO quiescent current. VDDA GD is raised high whenthe VDD is sufficient for the LDO to generate 1 V. As shown

2182 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 61, NO. 5, MAY 2013

Fig. 14. Measured VDDA (the LDO output) and VDDA GD versus the inputVDD.

Fig. 15. Measured VDDA GD and VDD GD versus the input VDD.

in Fig. 14, when VDDA GD is raised high, the LDO providea regulated V 0.1 . It is to be noted that theVDDA GD high value equals the VDD (not VDDA) as thevoltage sensor itself is supplied from the unregulated voltage(VDD).In order to test the voltage sensors thresholds [high level

input voltage , low level input voltage ] and theirhysteresis, a ramp input voltage is supplied to the VDDpower rail and the voltage sensor outputs are measured, asshown in Fig. 15. The measured thresholds for VDD GD are

V, V, while the measured hysteresis forthe VDDA GD is narrower as designed for the sensitive analogpower rail VDDA with V and V.

B. RF Measurements

RF measurement has been done in the proposed bio environ-ment test setup explained before in Section II. The implementedtest set up is shown in Fig. 16 where the chip is wire bonded tothe Duroid PCB and immersed in a Plexiglass box filled withsaline solution. The on-chip antenna is immersed in the salinesolution so it cannot be directly accessed with RF probes.For antenna testing, a PCB balun has been implemented to

feed the differential on-chip antenna from an SMA connector asshown in Fig. 16. Simulated and measured for the on-chip

Fig. 16. Immersed setup for RFmeasurement (wire-bonded chip in a Plexiglassbox filled with saline solution).

Fig. 17. Measured and simulated for the on-chip antenna.

antenna is shown in Fig. 17. For this antenna testing, the on-chipmetal wires between the on-chip antenna and harvester circuitshave been cut using a focused ion beam (FIB).A microstrip patch antenna (with 5-dBi gain) is used as a

transmitting antenna to wirelessly power the whole immersedon-chip module (on-chip antenna and rectifier). The availablepower at the top of the immersed on-chip antenna canbe calculated by (1)

(1)

where is the transmitted RF signal power, is the trans-mitting antenna gain dBi, cm, and is thecommunication distance between the transmitting antenna andthe immersed on-chip antenna.Using variable and fixing the communication distance,

the wirelessly harvested dc voltage (VDD) is plotted in Fig. 18versus . Communication distance is then tested usingconstant dBm. The immersed on-chip power-har-vesting module was able to charge the on-chip storage capac-itor ( nF) and build up V and 560 mVat 3- and 10-cm distances, respectively. Different wirelesslycharging cases are shown in Fig. 19 for different communica-tion distances of 3, 7, and 10 cm. These measurements demon-strated that the proposed on-chip RF power harvester is ableto charge to 1.0 V wirelessly from a transmitter with

OUDA et al.: 5.2-GHz RF POWER HARVESTER 2183

Fig. 18. Measured harvested dc voltage (VDD) versus available power to theon-chip antenna (wireless powering).

Fig. 19. Measured harvested VDD charging wirelessly versus different dis-tances (wireless powering).

W (37 dBm) at 3-cm distance (which corresponds to 200-mWavailable power at the immersed antenna) in 60- s chargingtime.A shift in the system performance is observed in the mea-

surement. This shift is due to the complex nature of the system,challenging test setup, and fabrication tolerances that caused thebehavior of the RF components to change, including on-chip an-tennas, matching circuitry, and the baluns. To account for thesemismatches and losses, we used a 5-W EIRP at a distance of3 cm for 65 s to be able to characterize the chip functionality.The average EM exposure value (80 W/m ) is still in compli-ance with the FCC’s EM exposure limit of 50 W/m .

VI. CONCLUSION

A completely monolithically integrated 5.2-GHz CMOS-based RF power harvester has been presented in this paper forimplantable IOP monitoring. For the first time, the harvesterdesign is complete with an on-chip antenna that is used toreceive both RF power and the data. The design has beenoptimized for the eye environment to account for signal deteri-oration at the designed frequency. A custom test setup has beenpresented imitating real eye environment. The size of the chipis only 1.5 mm 3.0 mm, and when measured in the eye-likeenvironment, it successfully harvested 1 V from an incoming

5.2-GHz 5-W EIRP RF signal from a distance of 3 cm. Thepower harvester module stores sufficient energy ( 2.5 nJ) onthe integrated 5-nF MOSCAPs to power the circuits for reliableIOPM operation.

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Mahmoud H. Ouda (S’10) received the B.Sc.degree in electronics and communications (magnacum laude) and M.Sc. degree in electronic engi-neering from Ain Shams University, Cairo, Egypt,in 2006 and 2011, respectively, and is currentlyworking toward the Ph.D. degree at King AbdullahUniversity of Science and Technology (KAUST),Thuwal, Saudi Arabia.From 2007 to 2009, he was a Research and Devel-

opment Design Engineer with the Al-Kharafi Group,The Arab Company for Computer Manufacturing,

where he was involved with the design and development of communicationand computing products. From 2009 to 2010, he was a Research CircuitEngineer with ACCIT, an EDA company of the Arab Academy for Scienceand Technology (AAST), during which time he was involved with research onfast parallel electronic design automation (EDA) tools. His research interestsinclude analog RF integrated circuit (RFIC) design, RF power harvesters, andbiomedical implantables.Mr. Ouda was the recipient of First Prize of the Worldwide Mentor Graphics

Competition for the Technology Leadership Award (TLA-2008). He was alsothe second-place recipient of the International Microelectronics Olympiad,Yerevan, Armenia, 2012. His research on RF energy harvesting was awardedthe DOW Sustainability Innovation Student Challenge Award (SISCA) in 2012.

Muhammad Arsalan (S’99–M’10) received theB.Sc. degree from the University of Karachi,Karachi, Pakistan, in 1995, the B.Eng. degreefrom Institute of Industrial Electronics Engineering(IIEE), NED University of Engineering and Tech-nology, Karachi, Pakistan, in 1999, and the M.A.Sc.and Ph.D. degrees in electronics engineering fromCarleton University, Ottawa, ON, Canada, in 2004and 2009, respectively.In 2004, he was an Invited Researcher and Natural

Sciences and Engineering Research Council–JapanSociety for the Promotion of Science (NSERC–JSPS) Summer Fellow withthe Tokyo Institute of Technology. From 2005 to 2008, he was an NSERCAlexander Graham Bell Graduate Scholar with Carleton University. From 2009to 2010, he was a National Aeronautics and Space Administration (NASA) Post-doctoral Fellow with the University of Maine. In 2010, he joined the King Ab-dullah University of Science and Technology (KAUST), Thuwal, Saudi Arabia,as an NSERC Postdoctoral Research Fellow. His research interests are in low-power mixed-signal application specific integrated cirucits (ASICs), microsen-sors/nanosensors, on-chip antennas, RFICs, and energy harvesting.Dr. Arsalan was the recipient of a number of academic, research, and entre-

preneurial awards for his research and innovations including the InformationTechnology Association of Canada (ITAC) Strategic Microelectronics Council(SMC) Award of the Canadian Microelectronics Corporation TEXPO 2007,the Ottawa Centre of Research Innovation (OCRI) Researcher of the YearAward 2008, the OCRI Entrepreneur of the Year Award 2010, the Enterprize

Canada Entrepreneurial Award 2009, and the NSERC Innovation ChallengeAward 2010.

Loïc Marnat received the M.A.Sc. and Ph.D.degrees in electrical engineering from the InstitutNational des Sciences Appliqués (INSA) de Rennes,Rennes, France, in 2006 and 2009, respectively.In 2010, he was a Lecturer and Research Fellow

with the INSA de Rennes. Since 2011, he hasbeen with the Abdullah University of Science andTechnology (KAUST), Thuwal, Saudi Arabia, wherehe is currently a Postdoctoral Fellow. His researchinterests are integrated on-chip antennas, antennason flexible substrate and antenna reconfigurability

through microfluidic networks, and advanced system-on-package (SoP) de-signs.

Atif Shamim (S’03–M’09) received theM.A.Sc. andPh.D. degrees in electrical engineering from CarletonUniversity, Ottawa, ON, Canada, in 2004 and 2009,respectively.From 2007 to 2009, he was an Natural Sci-

ences and Engineering Research Council (NSERC)Alexander Graham Bell Graduate Scholar withCarleton University. From 2009 to 2010, he was anNSERC Postdoctoral Fellow with the King AbdullahUniversity of Science and Technology (KAUST),Thuwal, Saudi Arabai. In August 2010, he joined the

Electrical Engineering Program of KAUST, where he is currently an AssistantProfessor. In 2006, he was an Invited Researcher with the VTT ElectronicsMicro-modules Research Center, Oulu, Finland. His research interests are inintegrated on-chip antennas, low-power CMOS RFICs for SoC applications,and advanced system-on-package designs employing multilayer low-temper-ature co-fired ceramic (LTCC) and liquid crystal polymer (LCP) packagingtechnologies.Dr. Shamim was the recipient of the Best Paper Prize of the EuWiT Confer-

ence during European Microwave Association (EuMA) Week (2008). He wasthe recipient of the Ottawa Centre of Research Innovation (OCRI) Researcher ofthe Year Award (2008). His work on “Wireless Dosimeter” received the Infor-mation Technology Association of Canada (ITAC) Strategic MicroelectronicsCouncil (SMC) Award of the Canadian Microelectronics Corporation TEXPO(2007). He was also the recipient of the Best Student Paper Prize of the IEEEAntennas and Propagation Society (AP-S) Conference (2005).

Khaled N. Salama (SM’10) received the Master’sand Doctorate degrees in electrical engineering fromStanford University, Stanford, CA, in 2000 and 2005,respectively.From 2005 to 2009, he was an Assistant Professor

with the Rensselaer Polytechnic Institute (RPI),Troy, NY, USA. In January 2009, he joined the KingAbdullah University of Science and Technology(KAUST), Thuwal, Saudi Arabia, where untilAugust 2011, he was the Electrical EngineeringFounding Program Chair. He is the cofounder of

Ultra Wave Labs, a biomedical imaging company that is funded by Johnsonand Johnson and the Mayo Clinic. He has authored or coauthored 100 papers.He holds ten patents on low-power mixed-signal circuits for intelligent fullyintegrated sensors and nonlinear electronics, especially memristor devices. Hisresearch on CMOS sensors for molecular detection has been funded by theNational Institutes of Health (NIH).Dr. Salama was the recipient of the Defense Advanced Research Projects

Agency (DARPA) Stanford–Berkeley Innovators Challenge Award in biolog-ical sciences, the work of which was acquired by Lumina Inc. in 2008.