STC90C58AD series MCU STC90LE58AD series ... - STCmicro
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67& 0&8 /LPLWHG 67&&$' VHULHV 0&8 67&/($' VHULHV 0&8 'DWD 6KHHW 67& 0&8 /LPLWHG 8SGDWH GDWH 1
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Transcript of STC90C58AD series MCU STC90LE58AD series ... - STCmicro
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STC MCU Limited
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STC MCU Limited
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STC MCU Limited
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STC MCU Limited
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，
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10μF
10μF
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0.1μF
10μF
10μF
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θ
θ
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θ
θ
θ
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θ
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θ
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5MΩ
300Ω
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,
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Ω
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Ω Ω Ω Ω
Ω Ω Ω Ω
Ω Ω Ω Ω
Ω Ω Ω Ω
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(PC)← (PC)+ 2← (PC)+ 2(SP)←(SP) + 1←(SP) + 1((sP)) ← (PC← (PC(SP)←(SP) + 1←(SP) + 1((SP))←(PC←(PC
)← page address← page address
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(A)←(A) + (Rn)←(A) + (Rn)
(A)←(A) + (direct)←(A) + (direct)
(A)←(A) + ((Ri))←(A) + ((Ri))
(A)←(A) + #data←(A) + #data
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(A)←(A) + (C) + (Rn)←(A) + (C) + (Rn)
(A)←(A) + (C) + (direct)←(A) + (C) + (direct)
(A)←(A) + (C) + ((Ri))←(A) + (C) + ((Ri))
(A)←(A) + (C) + #data←(A) + (C) + #data
(PC)← (PC)+ 2← (PC)+ 2)← page address← page address
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Note:
(A)←(A)←(A)
(A)←(A)←(A)
(A)←(A)←(A)
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(A)←(A)←(A)
(direct)←(direct)←(direct)
(direct)←(direct)←(direct)
but the source bit itself is not affceted.
(C) ← (C)← (C)
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(C)←(C)←(C)
(PC) ← (PC) + 3← (PC) + 3(direct)
(PC) ← (PC) +← (PC) + relative offset(direct)
(C) ← 1← 1
(C) ← 0← 0
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(PC) ← (PC) + 3← (PC) + 3(data)
(PC) ← (PC) +← (PC) + relative offset(data)
(C) ← 1← 1
(C) ← 0← 0
(PC) ← (PC) + 3← (PC) + 3(data)
(PC) ← (PC) +← (PC) + relative offset(data)
(C) ← 1← 1
(C) ← 0← 0
(PC) ← (PC) + 3← (PC) + 3(data)
(PC) ← (PC) +← (PC) + relative offset(data)
(C) ← 1← 1
(C) ← 0← 0
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(A)← 0← 0
(C) ← 0← 0
(bit) ← 0← 0
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(A)←←
(C) ←←
(bit) ←←
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) ← (A← (A
) ← (A← (A
Note:
(A)←(A)←(A)
(Rn)←(Rn) - 1←(Rn) - 1
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(direct)←(direct)←(direct)
((Ri))←((Ri)) - 1←((Ri)) - 1
Exception:
← (A)/(B)
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(PC) ← (PC) + 2← (PC) + 2(Rn) ← (Rn) – 1← (Rn) – 1
(PC) ← (PC)+ rel← (PC)+ rel
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(PC) ← (PC) + 2← (PC) + 2(direct) ← (direct) – 1← (direct) – 1
(PC) ← (PC) + rel← (PC) + rel
(A) ← (A)+1← (A)+1
(Rn) ← (Rn)+1← (Rn)+1
(direct)←(direct)←(direct)
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((Ri))←((Ri)) + 1←((Ri)) + 1
(DPTR) ← (DPTR)+1← (DPTR)+1
The bit tested is not modified. No flags are affected.
(PC) ← (PC)+ 3← (PC)+ 3
(PC) ← (PC) + rel← (PC) + rel
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The bit wili not be cleared if it is already a zero.
(PC) ← (PC)+ 3← (PC)+ 3
(bit) ← 0← 0 (PC) ← (PC) + rel← (PC) + rel
(PC) ← (PC)+ 2← (PC)+ 2
(PC) ← (PC) + rel← (PC) + rel
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(PC) ← (A) + (DPTR)← (A) + (DPTR)
The bit tested is not modified.
(PC) ← (PC)+ 3← (PC)+ 3
THEN (PC) ← (PC) + rel← (PC) + rel
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(PC) ← (PC)+ 2← (PC)+ 2
THEN (PC) ← (PC) + rel← (PC) + rel
(PC) ← (PC)+ 2← (PC)+ 2IF (A) ≠ 0 THEN (PC) ← (PC) + rel← (PC) + rel
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(PC) ← (PC)+ 2← (PC)+ 2
THEN (PC) ← (PC) + rel← (PC) + rel
(PC) ← (PC) + 3← (PC) + 3(SP) ← (SP) + 1← (SP) + 1((SP)) ← (PC← (PC(SP) ← (SP) + 1← (SP) + 1((SP)) ← (PC← (PC(PC) ← addr← addr
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(PC) ← addr← addr
(A) ← (Rn)← (Rn)
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(A)← (direct)← (direct)
(A) ← ((Ri))← ((Ri))
(A)← #data← #data
(Rn)←(A)←(A)
(Rn)←(direct)←(direct)
(Rn) ← #data← #data
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(direct) ← (A)← (A)
(direct) ← (Rn)← (Rn)
(direct)← (direct)← (direct)
(direct)←((Ri))←((Ri))
(direct) ← #data← #data
((Ri)) ← (A)← (A)
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((Ri)) ← (direct)← (direct)
((Ri)) ← #data← #data
(C) ← (bit)← (bit)
(bit)← (C)← (C)
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(DPTR) ← #data← #dataDPH DPL ← #data← #data
(A) ← ((A)+(DPTR))← ((A)+(DPTR))
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(PC) ← (PC)+1← (PC)+1(A) ← ((A)+(PC))← ((A)+(PC))
(A) ← ((Ri))← ((Ri))
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(A) ← ((DPTR))← ((DPTR))
((Ri))← (A)← (A)
(DPTR)←(A)←(A)
← (A)×(B)
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← (PC)+1
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(A) ← (A)← (A)
(A)← (A)← (A)
(A)← (A)← (A)
(A)← (A)← (A)
(direct)← (direct)← (direct)
(direct) ← (direct)← (direct)
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(C) ← (C)← (C)
(C) ← (C)← (C)
← ((SP))(SP) ← (SP) - 1← (SP) - 1
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(SP) ← (SP) + 1← (SP) + 1((SP)) ← (direct)← (direct)
) ← ((SP))← ((SP))(SP) ← (SP) -1← (SP) -1
) ← ((SP))← ((SP))(SP) ← (SP) -1← (SP) -1
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) ← ((SP))← ((SP))(SP) ← (SP) -1← (SP) -1
) ← ((SP))← ((SP))(SP) ← (SP) -1← (SP) -1
) ← (A← (A) ← (A← (A
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) ← (A← (A) ← (C)← (C)
(C) ← (A← (A
) ← (A← (A) ← (A← (A
) ← (A← (A) ← (C)← (C)
(C) ← (A← (A
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(C) ← 1← 1
(bit) ← 1← 1
Note:
) ← (PC)+2← (PC)+2(PC) ← (PC)+rel← (PC)+rel
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(A) ← (A) - (C) - (Rn)← (A) - (C) - (Rn)
(A) ← (A) - (C) - (direct)← (A) - (C) - (direct)
(A) ← (A) - (C) - ((Ri))← (A) - (C) - ((Ri))
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(A) ← (A) - (C) - #data← (A) - (C) - #data
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Note
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(A) ← (A)← (A)
(A) ← (A)← (A)
(A) ← (A)← (A)
(A) ← (A)← (A)
(direct) ← (direct)← (direct)
(direct) ← (direct)← (direct)
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STC MCU Limited
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STC MCU Limited
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simultaneous requests of the same prionty level.
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OPcode fetch cycle. OPcode fetch cycle
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Example
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Solution:
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ΩΩΩΩ520Ω
Ω
Ω
Ω
Ω Ω Ω Ω Ω Ω Ω Ω Ω
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0.1μF
10μF
10μF
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Legend
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Legend
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and programs have been compiled and tested with Keil's μ Vision 2 IDE by Keil Software, an integrated 8051
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data memory type
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10μF
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