Diffusive capacitance in space charge limited organic diodes: Analysis ofpeak in capacitance-voltage characteristicsDurgesh C. Tripathi and Y. N. Mohapatra Citation: Appl. Phys. Lett. 102, 253303 (2013); doi: 10.1063/1.4812487 View online: http://dx.doi.org/10.1063/1.4812487 View Table of Contents: http://apl.aip.org/resource/1/APPLAB/v102/i25 Published by the AIP Publishing LLC. Additional information on Appl. Phys. Lett.Journal Homepage: http://apl.aip.org/ Journal Information: http://apl.aip.org/about/about_the_journal Top downloads: http://apl.aip.org/features/most_downloaded Information for Authors: http://apl.aip.org/authors

Diffusive capacitance in space charge limited organic diodes: Analysisof peak in capacitance-voltage characteristics

Durgesh C. Tripathi1,2 and Y. N. Mohapatra1,2,3

1Department of Physics, Indian Institute of Technology Kanpur, Kanpur 208 016, India2Samtel Center for Display Technologies, Indian Institute of Technology Kanpur, Kanpur 208 016, India3Materials Science Programme, Indian Institute of Technology Kanpur, Kanpur 208 016, India

(Received 12 May 2013; accepted 12 June 2013; published online 28 June 2013)

One of the significant features of capacitance-voltage (C-V) characteristics of organic diodes is

the occurrence of a peak near the built-in voltage due to competition between diffusion and drift

of carriers. The voltage dependence of the rise in small signal capacitance prior to the peak is

modulated by the transit time of the carriers and leads to a linear 1=C2=3 vs V dependence, which

has been demonstrated both through simulation, and experiments using small molecule

(m-MTDATA) based diodes. The utility of such analysis in obtaining threshold voltages significant

for characterization of organic diodes has been demonstrated. VC 2013 AIP Publishing LLC.

[http://dx.doi.org/10.1063/1.4812487]

Organic semiconductor diodes have assumed great

significance since the emergence of potential large area elec-

tronic applications based on the successes of organic light-

emitting diodes, thin-film transistors, and solar cells.1–3 There

is currently significant focus on the understanding of space

charge limited organic diode, which is one of the simplest

building blocks of organic electronics, consisting of an active

layer sandwiched between two electrodes of choice. There con-

tinues to be interpretational difficulties in the analysis of the

basic current-density voltage (J-V) and capacitance-voltage

(C-V) characteristics of such structures4–10 due to differences

between observed characteristics and those simulated from

known properties.

It is experimentally observed that there occurs a peak in

C-V characteristics when the applied bias of a space charge

limited (SCL) current diode is changed from reverse bias

towards the theoretically expected built-in voltage, Vbi.6–12 The

voltage dependence of capacitance prior to this peak is quite of-

ten interpreted as a case of Schottky diode and 1=C2 vs V plot

is used to interpret the data, borrowing uncritically the usage

from conventional inorganic semiconductor diodes.13–16 It is

now recognized that such an analysis is invalid due to break-

down of underlying assumptions of voltage dependent space

charge width, and hence conclusions regarding carrier concen-

tration and Vbi so derived are erroneous.17,18 Over the last two

decades, many ad hoc interpretations of the origin of the peak

has been advanced invoking variously involvement of traps at

the electrode interface,11 competition between injection and

recombination,8 variation in space charge in p-i-n structures.4

Recently, Mensfoort and Coehoorn9 proposed the involvement

of diffusion and drift, and investigated the dependence of the

peak on boundary conditions through simulations, and sug-

gested an empirical relation between Vbi and the peak voltage

in C-V. The effect of disorder on the C-V peak has also been

recently studied within the extended Gaussian disorder model

of mobility using one dimensional Master equation approach.10

However, there exist no simple interpretations which would

experimentally demonstrate the utility of observed C-V charac-

teristics and their correlation with J-V characteristics which is

of crucial importance in most applications.

In this letter, we report studies using high quality small

molecule based organic diodes, in whose design a doped

layer is introduced in the stack to control Vbi. This allows us

to correlate their C-V and J-V characteristics in order to

understand the underlying mechanisms. The insight so

obtained is used to provide a heuristic derivation of voltage

dependence of capacitance prior to the C-V peak. We estab-

lish a relationship of considerable practical utility in C-V

analysis in this regime by showing that 1=C2=3 vs V plot is

linear due to modulation of transit time in the diffusive

regime.

It is important to note that any study of intrinsic C-V and

J-V characteristics has to avoid any significant effects due to

trapping and hence high quality diodes fabricated under strin-

gent controlled conditions are needed. We fabricate diodes

studied in this work using a state-of-the-art cluster tool with

automated control of process parameters including thickness

control. All organic layers including the cathode metal are

thermally deposited in ultra-high vacuum system with base

pressure 10�8 mbar. Hole only diode structures were fabri-

cated using 4,40,400-tris(N-3-methylphenyl-N-phenyl-amino)

triphenyl-amine (m-MTDATA), a well known hole transport

material and 2,3,5,6-tetrafluoro-7,7,8,8-tetracyano-quinodi-

methane (F4-TCNQ), a p-type dopant. The studied device

structure is depicted in Fig. 1. In all of these structures, in-

dium tin oxide (ITO) is used as anode and aluminum (Al) as

cathode. The pre-patterned ITO coated glass substrates are

RCA cleaned and treated under oxygen-argon plasma ambi-

ent prior to the deposition of organic layer. The p-doped layer

is deposited by the co-evaporation technique. Matrix and

dopant for doped layer is kept in separate graphite crucibles

and deposition rates are monitored by independent quartz

crystals. The organic layers are deposited sequentially as per

the device structures without breaking the vacuum. The fin-

ished samples are immediately encapsulated in a nitrogen

glove box for room temperature measurements. J-V and C-V

measurements are carried out using a Keithley 2601 source

measuring unit and Agilent 4924 A Impedance Analyzer,

respectively. Simulations of single layer diode structures

were performed using ATLAS-Silvaco platform,19 assuming

0003-6951/2013/102(25)/253303/5/$30.00 VC 2013 AIP Publishing LLC102, 253303-1

APPLIED PHYSICS LETTERS 102, 253303 (2013)

no injection barrier at the anode while a finite injection bar-

rier at the cathode resulting in a finite Vbi and assuming

Poole-Frenkel (P-F) field dependent model of mobility.

Figure 2 shows the J-V and C-V curves of all the three

structures depicted in Fig. 1 in order to facilitate correlation

in the characteristics, and comparison of the features for the

following three cases:

(a) intrinsic material sandwiched between Al and ITO as is

conventional,

(b) p-type doping of the material next to Al (referred to as

AIP, i.e., anode-intrinsic-p-type stack), and

(c) p-type layer placed next to ITO (referred to as API, i.e.,

anode-p-type-intrinsic stack).

In frame (a) of Fig. 2, the C-V curve is asymmetric with

a peak close to Vbi. The ideal Vbi should be due to the differ-

ence in the work function of ITO and Al which is estimated

to be 0.6 in this case. Treating this device as the reference,

we see in frame (b) that when the p-doped layer is brought to

the anode side (next to ITO), the peak in C-V and built-in

voltage shifts to higher voltage since it is now effectively

controlled by the difference of the Fermi level of the doped

layer and the work-function of the Al cathode. However,

note that both C-V and J-V curves become fully symmetric

when the p-type layer is placed next to Al in the AIP struc-

ture [Fig. 2(c)]. This is because now the intrinsic layer is

sandwiched between ITO and the p-type layer giving rise to

no Vbi. This results in a highly symmetric characteristic with

the C-V peak appearing at 0 V. The ability to control the

degree of asymmetry and hence the position of the C-V peak

with the same set of controlled materials provides us with an

opportunity to validate mechanisms underlying these charac-

teristics. The correlation with J-V curves in each case indi-

cates that the diodes enter the space charge region well after

the voltage corresponding to the C-V peak,6,7 and a precise

measurement of the transition voltage at which that occurs

would be useful.

To provide further insight, we show in Fig. 3 the typical

C-V characteristics of standard sandwiched diodes for two

distinct cases, (a) an insulator (intrinsic organic layer in this

case) considering only drift and ignoring diffusion20 and (b)

in which both drift and diffusion of the injected carriers are

considered in the simulation, all other conditions remaining

the same. In the former case, the diode capacitance changes

from geometrical capacitance (Cgeom) of the structure to its

(3/4)th of Cgeom when the diode operates fully in the forward

biased SCL regime.20 In the second case as shown in the

lower frame of Fig. 3, the capacitance begins to rise with dif-

fusion of injected carriers, and eventually looses to the

downward trend due to the drift dominated SCL regime.

Hence, the capacitance peak owes its origin in SCL diodes to

a competition between carrier diffusion and drift of the

injected majority carriers.

FIG. 1. Schematic of the typical device structures used for this study: (a)

Intrinsic diode; (b) AIP homojunction diode; and (c) API homojunction

diode. Note that the p-type layer is adjacent to the cathode and anode in AIP

and API homojunction diode, respectively.

FIG. 2. Correlated J-V and C-V curves measured at 100 Hz: (a) for intrinsic

diode; (b) API homojunction diode; and (c) AIP homojunction diode. The

total thickness of the device is kept the approximately same with intrinsic

layer thickness as indicated in Fig. 1.

FIG. 3. A typical C-V curve for the case of drift only (upper panel), and for

the case where both drift and diffusion are included (lower panel). Note that

only two regions of operation are distinct for the drift-only transport, while

drift-diffusion transport has four distinct regions of operation.

253303-2 D. C. Tripathi and Y. N. Mohapatra Appl. Phys. Lett. 102, 253303 (2013)

We first demonstrate that indeed the rise of capacitance

comes from additional carriers stored under the carrier profile

for increasing injection at higher voltage. In our device simula-

tions using ATLAS-SILVACO, we have considered that the

mobility of the injected carriers increases exponentially with

the square root of electric field [lðE; TÞ ¼ l0ðTÞexpðb E1=2Þ],i.e., the standard Poole-Frenkel type of field dependence

with the following parameters l0; hðTÞ¼ 10�4 cm2/V-s,

l0; eðTÞ¼ 10�6 cm2/V-s, b0; hðTÞ¼ 3�10�4 (cm/V)1/2, and

b0; eðTÞ¼ 7� 10�4 (cm/V)1/2] at room temperature. For sim-

plicity, we have not taken into account the carrier density de-

pendence of mobility, which is also justified since we are

dealing with phenomena near or below the built-in voltage

with low injection levels.21 We have shown in Fig. 4 simulated

C-V curves for a 100 nm thick diode in the inset and the corre-

sponding carrier profile for different applied bias spanning the

peak region, i.e., 0–0.9 V. The voltage at which the peak occurs

is practically independent of thickness making it a robust

measurable quantity occurring just below the theoretical built-

in voltage. This is consistent with insights of Mensfoort and

Coehoorn.9 It is seen in Fig. 4 that the carrier concentration as

a function of distance from the injecting electrode follows

nearly an ideal exponential diffusion profile apart from some

accumulation in a narrow region at the injecting contact. Our

simulations for a large number of cases bears out that the

potential drop in this narrow region is not very sensitive to the

applied voltage in this regime of operation. Hence, the increase

in amount of charge stored mainly comes from increased area

under the voltage dependent diffusive carrier profile. The

change in carrier profile is insignificant at voltages well past

the peak voltage in the SCL regime due to balance achieved

between carriers injected and carriers extracted due to drift.

With this insight, the voltage dependent carrier density

in the bulk region can be simply modeled by the expression

pðxÞ ¼ po exp � x

Lp

� �; (1)

where po is the carrier density in the accumulation layer and

Lp is carrier diffusion length. At steady state, in absence of

generation and recombination,22 the injected space charge is

governed by

Dp@2p

@x2¼ lpE

@p

@x; (2)

where Dp is carrier diffusion constant and lp is charge-

carrier mobility. By substituting Eq. (1) into Eq. (2) and

solving it for Lp and using standard Einstein relation we get

Lp ¼kBT

q

d

Vbi � V

� �: (3)

Hence, this demonstrates that under drift and diffusion

conditions, Lp takes the burden of the voltage variation. To

verify the robustness of Eq. (3), carrier profile simulations

are performed at different temperatures for zero bias. The

temperature dependent Lp variation exactly follows the linear

dependence, suggesting the essential correctness of the

assumptions leading to Eq. (3). We may also like to note

here that though the validity of Einstein relationship in

describing transport in organic semiconductors has been a

point of controversy, any substantial deviation occurs only

for fields corresponding to voltages much larger than built-in

voltage as observed elsewhere.23,24 Since in this work we are

restricting ourselves to fields below or near built-in voltage,

we do not expect deviation from the standard Einstein

relationship.

The increased carrier concentration though would not

explain the change in differential or small signal capacitance

typically measured experimentally. However, the voltage de-

pendence of the diffusion length gives us the handle to calcu-

late the voltage dependence of small signal capacitance as

well. To measure the device capacitance, a small ac signal

superimposed on the dc voltage is applied across the device.

The steady state carrier distribution in the bulk region can

get modified owing to charge-carrier response to ac voltage.

The crucial ansatz that we make here is that the voltage sen-

sitivity of Lp, i.e., @Lp due to changes in ac field would be

dependent on the transit time of the drifting carriers. In such

a situation, Dp is related to the modified charge-carrier diffu-

sion length by expression, Lp ¼ffiffiffiffiffiffiffiffiDps

p, where s denotes the

carrier transit time. Dp is replaced by the charge-carrier mo-

bility assuming classical Einstein relation and when simpli-

fied in terms of the temperature and voltage, we get

@Lp ¼

ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffikBT

q

d2

Vbi � V

s: (4)

The diffusion capacitance (Cdif f ) for a device of area A and

charge Q assuming d � @Lp is obtained as

Cdif f ¼ AdQ

dV¼ A

d

dV

ð10

qpo exp �x=@Lp

� �dx

264

375: (5)

By substituting Eq. (4) into (5) and solving, we get

Cdif f ¼qApod

2

kBT

q

� �1=2

ðV�VbiÞ�3=2; (6)

FIG. 4. Simulated carrier profile of the hole concentration across the device

at different voltages (0, 0.2, 0.4, 0.6, 0.72, 0.8, and 0.9 V) prior to the theo-

retical built-in voltage. Note that the origin is at the anode and the cathode

contact is 100 nm away. Inset shows the normalized capacitance curve for

the same diode which peaks at 0.72 V.

253303-3 D. C. Tripathi and Y. N. Mohapatra Appl. Phys. Lett. 102, 253303 (2013)

which predicts that C�2=3dif f / ðV � VbiÞ. In the following sub-

section, we ensure the robustness of expression of Cdif f

which is obtained by the subtracting the geometrical capaci-

tance from total capacitance in both simulations and experi-

mental C-V data.

Figure 5 shows the validity of this model both in case of

simulation (a) and for experiment (b). In Fig. 5(a), C�2=3dif f vs V

is plotted in the diffusive regime (where capacitance increases

prior to the peak) and it fits as an excellent straight line which

intersects at a voltage higher than the C-V peak. We christen

this characteristic voltage (Vo, SCL) as the threshold at which

the device enters fully into SCL regime as evidenced by

J-V curve plotted on the same plot. As shown in Fig. 5(a), we

obtain three well characterized voltages from these character-

istics viz. the starting of injection at Vo, inj, VCV peak, and

Vo, SCL. The Vo, SCL is close to the theoretical Vbi apart from

the voltage drop at the contacts due to accumulation of car-

riers. Hence, Vo, SCL is to be considered as the threshold volt-

age at which a transition occurs from the diffusion-dominated

to the drift-dominated ac transport. This cross-over voltage is

an important quantity.10 The flat band voltage is often

extracted from J-V analysis close to Vbi and detailed electro-

absorption studies.25,26 The slope of the straight line is propor-

tional to the carrier concentration in the accumulation layer.

Its thickness and temperature dependence has also been veri-

fied in the simulations. Figure 5(b) shows the validity and

the utility of the ideas described here for experimental charac-

teristics for a typical diode with a thickness of 100 nm. The

straight-line fit to C�2=3dif f vs V is very good and helps in

determining the voltage drop at which the device enters SCL

regime. Hence both the experiment and simulation bear out

the validity of our analysis and provide an invaluable tool for

understanding organic diodes and SCL diodes in general.

The various voltage levels obtained from such analysis

is significant from the point of view of charge storage and

injection models as regards, for example, the study of open

circuit voltage and loss mechanisms in solar cells, the operat-

ing modes of organic light emitting diodes, and detailed sim-

ulation and modeling of such devices. It is important to note

that the foregoing analysis for simplicity assumes single car-

rier injection avoiding any complications due to recombina-

tion. The analysis would need care if the C-V peak is

symmetric as in the case of AIP homojunction [Fig. 2(c)]

since both sides would be dominated by drift. The analysis

need be suitably modified in the presence of traps which gen-

erally give rise to additional peaks in C-V, typically at volt-

age higher than Vbi.

In summary, we have used specifically designed diode

stacks in controlling and correlating C-V and J-V character-

istics. They are compared with simulation to demonstrate the

origin of C-V peak in diffusion limited capacitance. Instead

of oft- used standard Mott-Schottky plot, we show that C�2=3dif f

vs V prior to the peak is linear and can be used to obtain the

voltage onset for space charge limited conduction and its

relation to built-in voltage. The study opens up more oppor-

tunities for detailed studies on other significant features such

as dependence of C-V peak height on thickness, accumula-

tion layer, and the drift-limited saturation capacitance.

We thank S. M. H. Rizvi for his initial support in the

simulation part of the work and the Department of Science

and Technology, New Delhi, India for their financial support

(DST/R&D/20060243).

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253303-5 D. C. Tripathi and Y. N. Mohapatra Appl. Phys. Lett. 102, 253303 (2013)