An implantable seizure-onset detector based on a dual-path single-window count-based technique for...

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This article has been accepted for inclusion in a future issue of this journal. Content is final as presented, with the exception of pagination. IEEE JOURNAL ON EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS 1 An Implantable Seizure-Onset Detector Based on a Dual-Path Single-Window Count-Based Technique for Closed-Loop Applications Mona Safi-Harb, Muhammad Tariqus Salam, Dang K. Nguyen, and Mohamad Sawan, Fellow, IEEE Abstract—In this paper, we present a single voltage-window count-based seizure onset detection algorithm and its associated hardware implementation. The proposed algorithm combines the advantages associated with voltage-window count-based and event-based threshold-voltage detections. The result is an algo- rithm that is more tolerant to noise, dc offsets, baseline energy variations, and seconds-long nonseizure related sharp activities. In addition, only one parameter (one threshold voltage) needs to be optimized per patient, and for that, only one seizure per patient is used for training, making the process of optimizing the patient-specific detector a simple task. The time evaluation period when counting is performed is kept constant across all patients studied, and is fixed at 5 s in this work. A novel dual path digital signal processing unit in the back-end of the detector is included and is shown to decrease the detection latency by 14%. Experimental results on a printed circuit board using commercially available discrete components confirm the correct functionality of the proposed detector. The proposed algorithm achieves 100% sensitivity, 10.7 s average detection delay, and a single false alarm when evaluated on a total of 25 seizures and 24 nonseizure datasets of intracerebral electroencephalographic (icEEG) recordings from five patients from the epilepsy mon- itoring unit of Notre-Dame Hospital in Montréal. In addition, monolithic integration of the overall system, including bio-ampli- fication and comparison, is also carried out in a TSMC 0.18- m complementary metal–oxide–semiconductor technology. Simu- lations show that a static power dissipation of 7 , 99% of which is consumed by the front-end bio-amplifier, is achieved, showing the potential of using the proposed seizure detector in a closed-loop brain–prosthesis device interface for seizure control and treatment. Index Terms—Analysis of neural signals, brain–machine inter- face (BMI), epilepsy, implantable systems, neural engineering, neu- rological disorder, seizure detection. Manuscript received June 15, 2011; revised September 13, 2011; accepted November 05, 2011. This work was supported in part by the Natural Sciences and Engineering Research Council of Canada (NSERC) and in part by the Canada Research Chair in Smart Medical Devices. This paper was recom- mended by Guest Editor P. Mohseni. M. Safi-Harb was with the Department of Electrical Engineering, Ecole Polytechnique de Montréal, Montréal, QC, H3T 1J4 Canada. She is now with the Montreal Neurological Institute, Montréal, QC, H3A 2B4 Canada (e-mail: mouna.safi[email protected]). M. T. Salam and M. Sawan are with the Polystim Neurotechnologies Labora- tory, Department of Electrical Engineering, École Polytechnique de Montréal, Montréal, QC, H3T 1J4 Canada. D. K. Nguyen is with Neurology Service, Centre Hospitalier de L’Université de Montréal, Montréal, QC, H2L 4M1 Canada. Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/JETCAS.2011.2176369 Fig. 1. An illustration of the high-level block diagram of a brain–machine in- terface, and its application in closed-loop seizure onset detection and treatment. At the heart of such closed-loop system is a seizure detector device. I. INTRODUCTION N EURAL signal recording, automatic signal processing, and responsive stimulation are novel approaches for de- veloping new prosthetic devices to treat epilepsy. Implantable devices are an interesting alternative for drug-resistant epileptic patients who are not candidates for (or have failed) epilepsy surgery. Proof-of-concept experiments have demonstrated pos- sible suppression of a seizure in its early phase using focal treat- ment (i.e., focal electrical stimulation, cooling, or drug delivery) [1]. Efficiency of this type of focal treatment which is delivered in response to a seizure onset (closed-loop control) depends on high quality intracerebral electroencephalographic (icEEG) ac- quisitions and accurate seizure onset detection [2], as illustrated in Fig. 1. Electrophysiological seizure onset patterns vary from pa- tient to patient. The most frequently encountered ones are the low-voltage fast-activity, high-voltage fast-activity, and rhythmic spiking patterns [3]. This ictal icEEG changes at onset evolve dramatically in frequency and amplitude [4], spreading regionally and/or to distant areas with accompanying clinical manifestations. Electrical seizures (i.e., without clinical accompaniment) are frequently encountered in intracerebral recordings of patients with pharmacoresistant partial epilepsy. In some patients, they may warrant intervention if for ex- ample they are rare, long and/or frequently degenerate into an electroclinical seizure. In others, it might be preferable to ignore them if they are brief (few seconds only), remain very focal (infrequently evolving into an electroclinical seizure) and so frequent that they would rapidly deplete the battery from “unnecessary” triggered focal treatment [3]. Seizure detection parameters must adapt to these individual variables. 2156-3357/$26.00 © 2011 IEEE

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IEEE JOURNAL ON EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS 1

An Implantable Seizure-Onset Detector Basedon a Dual-Path Single-Window Count-Based

Technique for Closed-Loop ApplicationsMona Safi-Harb, Muhammad Tariqus Salam, Dang K. Nguyen, and Mohamad Sawan, Fellow, IEEE

Abstract—In this paper, we present a single voltage-windowcount-based seizure onset detection algorithm and its associatedhardware implementation. The proposed algorithm combinesthe advantages associated with voltage-window count-based andevent-based threshold-voltage detections. The result is an algo-rithm that is more tolerant to noise, dc offsets, baseline energyvariations, and seconds-long nonseizure related sharp activities.In addition, only one parameter (one threshold voltage) needsto be optimized per patient, and for that, only one seizure perpatient is used for training, making the process of optimizingthe patient-specific detector a simple task. The time evaluationperiod when counting is performed is kept constant across allpatients studied, and is fixed at 5 s in this work. A novel dualpath digital signal processing unit in the back-end of the detectoris included and is shown to decrease the detection latency by14%. Experimental results on a printed circuit board usingcommercially available discrete components confirm the correctfunctionality of the proposed detector. The proposed algorithmachieves 100% sensitivity, 10.7 s average detection delay, and asingle false alarm when evaluated on a total of 25 seizures and24 nonseizure datasets of intracerebral electroencephalographic(icEEG) recordings from five patients from the epilepsy mon-itoring unit of Notre-Dame Hospital in Montréal. In addition,monolithic integration of the overall system, including bio-ampli-fication and comparison, is also carried out in a TSMC 0.18- mcomplementary metal–oxide–semiconductor technology. Simu-lations show that a static power dissipation of 7 �, 99% ofwhich is consumed by the front-end bio-amplifier, is achieved,showing the potential of using the proposed seizure detector in aclosed-loop brain–prosthesis device interface for seizure controland treatment.

Index Terms—Analysis of neural signals, brain–machine inter-face (BMI), epilepsy, implantable systems, neural engineering, neu-rological disorder, seizure detection.

Manuscript received June 15, 2011; revised September 13, 2011; acceptedNovember 05, 2011. This work was supported in part by the Natural Sciencesand Engineering Research Council of Canada (NSERC) and in part by theCanada Research Chair in Smart Medical Devices. This paper was recom-mended by Guest Editor P. Mohseni.

M. Safi-Harb was with the Department of Electrical Engineering, EcolePolytechnique de Montréal, Montréal, QC, H3T 1J4 Canada. She is now withthe Montreal Neurological Institute, Montréal, QC, H3A 2B4 Canada (e-mail:[email protected]).

M. T. Salam and M. Sawan are with the Polystim Neurotechnologies Labora-tory, Department of Electrical Engineering, École Polytechnique de Montréal,Montréal, QC, H3T 1J4 Canada.

D. K. Nguyen is with Neurology Service, Centre Hospitalier de L’Universitéde Montréal, Montréal, QC, H2L 4M1 Canada.

Color versions of one or more of the figures in this paper are available onlineat http://ieeexplore.ieee.org.

Digital Object Identifier 10.1109/JETCAS.2011.2176369

Fig. 1. An illustration of the high-level block diagram of a brain–machine in-terface, and its application in closed-loop seizure onset detection and treatment.At the heart of such closed-loop system is a seizure detector device.

I. INTRODUCTION

N EURAL signal recording, automatic signal processing,and responsive stimulation are novel approaches for de-

veloping new prosthetic devices to treat epilepsy. Implantabledevices are an interesting alternative for drug-resistant epilepticpatients who are not candidates for (or have failed) epilepsysurgery. Proof-of-concept experiments have demonstrated pos-sible suppression of a seizure in its early phase using focal treat-ment (i.e., focal electrical stimulation, cooling, or drug delivery)[1]. Efficiency of this type of focal treatment which is deliveredin response to a seizure onset (closed-loop control) depends onhigh quality intracerebral electroencephalographic (icEEG) ac-quisitions and accurate seizure onset detection [2], as illustratedin Fig. 1.

Electrophysiological seizure onset patterns vary from pa-tient to patient. The most frequently encountered ones arethe low-voltage fast-activity, high-voltage fast-activity, andrhythmic spiking patterns [3]. This ictal icEEG changes atonset evolve dramatically in frequency and amplitude [4],spreading regionally and/or to distant areas with accompanyingclinical manifestations. Electrical seizures (i.e., without clinicalaccompaniment) are frequently encountered in intracerebralrecordings of patients with pharmacoresistant partial epilepsy.In some patients, they may warrant intervention if for ex-ample they are rare, long and/or frequently degenerate intoan electroclinical seizure. In others, it might be preferable toignore them if they are brief (few seconds only), remain veryfocal (infrequently evolving into an electroclinical seizure) andso frequent that they would rapidly deplete the battery from“unnecessary” triggered focal treatment [3]. Seizure detectionparameters must adapt to these individual variables.

2156-3357/$26.00 © 2011 IEEE

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2 IEEE JOURNAL ON EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS

The Responsive NeuroStimulator (RNS) system (Neuropace,Mountain View, CA) is currently the only responsive device forfocal treatment of partial epilepsy which has been submittedfor FDA approval. As such, a growing interest for developingsensitive and specific seizure detection algorithms can be seenin the literature [5]–[15]. The first seizure detection algorithmproposed to be used as a patient-specific warning device wasintroduced in [5]. Other univariate patient-specific algorithmsfollowed and are based on wavelet transforms for machinelearning and classifiers identification [6], correlation integral[7], Lyapunov exponent [8], or phase synchronization in mul-tivariate systems [9]. However, these algorithms use heavymathematical computations on desktop computers and cannotbe employed in a low-power implantable device for responsivefocal treatment of epilepsy. Low-power VLSI implementationshave also been recently reported and are based on energy banddecomposition [10], parallel wavelet spectral analysis [11],or analog wavelet filtering [12]. The totality of the electroen-cephalographic recordings is captured in [10] and [11] usingan analog-to-digital converter (ADC), and 15 amplifiers arenecessary in [12]. The algorithms in [13]–[15] issue a seizureor no-seizure detection output without digitizing nor storingthe overall icEEG recordings, while using minimal analogcomponents, resulting in more power-efficient implementationsthat preserve the battery lifetime. Although either of the twoalgorithms is based on the detection of the increase in theamplitude and frequency of the icEEG signal (and here wefocus our efforts on low-voltage fast-activity patterns), theyhowever operate with subtle differences. The algorithm in [13]and [14] is count-based over multiple voltage windows anda fixed time window, whereas it is event-based with a singlethreshold voltage and no fixed time window1 for analysis in[15]. Each algorithm offers advantages and disadvantages aswill be detailed in Section II. It is the objective of this paperto propose a single voltage-window seizure onset detectionalgorithm that combines the benefits of count-based detectionwith the simplicity of optimizing the threshold parameters ofa single voltage window. It will be shown that the proposedalgorithm offers the following advantages.

• Less complex optimization since a single voltage-windowis used for all patients.

• Large voltage separation between the threshold voltages ofthe single-window chosen, allowing for more immunity tonoise and dc offsets in the threshold voltage.

• No time window (referred to herein as the time frame, TF)optimization is needed; a single 5 s time window that iskept constant across patients is adopted.

• Lower false alarms due to seizure-unrelated physiologicalrhythmic activity, partially because of the relatively longevaluation window ( ).

• Lower false alarms due to baseline activity variations. Thethreshold voltage setting mechanism is not based on base-line activity alone. Instead, its optimized value is obtainedfrom the signal energy level partially pre- and partiallypost- electrographic onset.

1Voltage and time windows will be defined more formally in Section II.

• Simple intuitive optimization of the threshold voltagethrough a single seizure (one training seizure needed).

• Reduced detection delay, despite the increased TF length,by relying on a two parallel-path system with clocks time-offseted by half a window length. The case can be gener-alized to multiple paths.

A hardware prototype using commercially available discretecomponents is also devised to confirm the correct functionalityof the proposed detector. Additionally, the proposed algorithmwill be shown to be totally amenable to miniaturization throughmonolithic integration of the front-end amplifier and compara-tors with the rest of the detector circuit blocks in a standardTSMC 0.18- m CMOS technology with sub-10 totalpower dissipation.

The remainder of the paper is organized as follows: Section IIhighlights the working principles of the count- and event-basedalgorithms in details, and compares their performance to theproposed detection method. Section III presents the systemand hardware realizations. Clinical methods and validationof the hardware on data recorded from five patients are thenhighlighted in Section IV. Concluding remarks are provided inSection V.

II. EXISTING AND PROPOSED MINIATURIZED ALGORITHMS

In this section, a comprehensive description of the algorithmsin [14] and [15] is provided, and will be referred to herein as themulti-window count-based and event-based algorithms, respec-tively. Examples and simulation results are shown to providemore details about the failures associated with each, and howthe advantages of each can be combined in realizing the singlevoltage-window count-based algorithm proposed in this paper.

A. Multiple Voltage-Window Count-Based Algorithm

In [14], the icEEG waveform is analyzed simultaneously inthe voltage and time domains. The voltage space of the icEEGwaveform is divided into equally spaced intervals, delimitedby threshold voltages, with each two consecutive thresholdvoltages separated by a spacing. The voltage spacingbetween two consecutive threshold levels is referred to as avoltage window. In general terms, the algorithm is based on amulti-level -bit digitizer or ADC ( is typically 8-bits). Insteadof realizing the whole -bit ADC, which would then requirea growing number of circuit components (comparators as anexample) and additional power dissipation, offline observationof the signal activity during seizures for a particular patientallows the selection of the windows that present significantactivity levels variations during a seizure onset, while ignoringthe rest. This results in a number of windows that is sig-nificantly less than , with typical varying between 2 and4. Signal energy in consecutive time intervals is then inferredby counting the number of occurrences of the signal fallinginside each voltage window, which would be referred to assignal logic-ones count (or ones count, ). The on theother hand for the unamplified icEEG signal is in the 10–30range (in ADC terminologies, this would be equivalent to theleast-significant-bit, or LSB). The frequency contents of the

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SAFI-HARB et al.: AN IMPLANTABLE SEIZURE-ONSET DETECTOR BASED ON A DUAL-PATH SINGLE-WINDOW COUNT-BASED TECHNIQUE 3

Fig. 2. (a) Algorithm flowchart and (b) its demonstration on an eletrographicseizure signal obtained from icEEG recordings, with optimized voltage levelsand time frames [13] superimposed. The algorithm output counts are shown in(c) and three distinct regions identified (namely baseline, brief electrical seizure(BES), and seizure detection). The first seizure detection of the algorithm isgenerated at � � �� �, i.e., at a delay of � � � with respect to electrographicseizure onset.

signal are indirectly measured because the signal ones-count isperformed in a fixed TF. An increasing number of detectionsfor the higher voltage windows, coupled with an equal numberof detections/counts across all the voltage windows chosen, inthe given TF, imply a signal with higher frequency and energycontents. The TF is another parameter that also needs to betuned per patient, and generally varies between a fraction of asecond to long. Long TFs are usually used for patientswhich exhibit a large number of brief electrical seizure (BES)that do not develop into electroclinical seizures, or rhythmicspiking that is sustained for times larger than 1–1.5 s.

An illustration of the algorithm flowchart described earlier isshown in Fig. 2(a), with an example EEG signal and optimumalgorithm inputs [13] overlaid on the same graph in Fig. 2(b).For the remainder of the paper, it will be assumed in all the illus-trations/discussions that the signal processing is performed onthe positive part of the icEEG waveform. However, the actualimplementation (unless modulation is adopted) includes twiceas many voltage windows/thresholds since real icEEG signalscontain both positive and negative parts (that are usually sym-metrical with respect to the signal mean, generally equal to 0 V).In other words, a four-window algorithm corresponds in fact toeight windows (four for processing the positive and four for pro-cessing the negative parts of the waveform). Shown in Fig. 2(c)is the algorithm count output for each window, as well as the

Fig. 3. An example of (a) an icEEG seizure signal [same signal as Fig. 1(c)],that is (b) missed by the algorithm due to noise and offsets superimposed onthe voltage threshold levels. Another example of a false positive for a (c) BESsignal, and (d) the output count of the algorithm that could falsely declare aseizure at 10 s. The signals in Fig. 3(c) and (d) correspond to an expanded viewof the signal in Fig. 1(a), around the [0–15 s] region of interest.

progression of the count as the signal goes through different ac-tivity levels; from baseline, to BES, to seizure accompanied sec-onds later by clinical manifestation. The illustration in Fig. 2 isdone for the case of four voltage windows [ , , , and

in Fig. 2(b)]. A baseline activity corresponds to a largerin whereas a progressively rising amplitude signal, such asshortly after electrographic onset, results in almost equalin all voltage windows ( ). In other words, in time frame ,

, and for all voltage windows, between two thresholdcounts, and , is one possible condition for issuing aseizure warning. Mathematically, this can be expressed as

The first detection issued by the algorithm happens at the end ofin Fig. 2(c), where all counts, through fall within

the count thresholds. This algorithm, although ca-pable of achieving high sensitivity if tuned properly, requiresthe optimization of many parameters. Another major drawbackof the algorithm is in the sensitivity of the optimized windowthreshold voltage levels to noise and offsets (accurate level gen-eration is mandatory), as well as its sensitivity to declaring afalse detection for BES (i.e., a false positive). In order to il-lustrate this, a random noise with a Gaussian distribution anda standard deviation of 10% of is superimposed on thethreshold voltages delimiting the voltage window. The averagecounts and error counts ( ) are replotted for the sameicEEG signal shown earlier in Fig. 2(b), and repeated in Fig. 3(a)for convenience. Systematic offsets (such as for example bio-

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Fig. 4. Illustration of the algorithm flowchart for the event-based seizure de-tection [15].

amplifier dc output common mode shift, or offsets due to theresistor string or digital-to-analog converter (DAC) used to gen-erate the dc levels for the comparison windows) are also em-ulated using an added dc shift to all the threshold comparisonlevels. A dc level of is added, together with the noisesuperimposed on .

Fig. 3(b) shows how the seizure detected in Fig. 2(c) canbe missed (there is no time window in Fig. 3(b) where all thecounts are within the threshold count limits). Fig. 3(c) and (d)shows an example of a possibility of a false positive due to aBES, given that the count corresponding to can see a proba-bility of falling outside the and limits. When testedon icEEG data from a drug-resistant epilepsy patient, with thenoise and dc offset superimposed, the sensitivity to seizures wasseen degrading from 100% to 80%, with three false alarms (thatwould otherwise not be issued in the absence of noise and off-sets). The algorithm performance therefore can see degradationin its sensitivity and specificity, unless extra circuit measures forreducing such dc offsets and noise mechanisms are adopted.

B. Single-Window Event-Based Algorithm

In the event based detection [15], with algorithm flowchartshown in Fig. 4, a single threshold voltage is generated throughan optimization process. The choice of this voltage will be di-rectly linked to the detection of the progressively increased en-ergy in a signal during a seizure event. A factor is intro-duced in [15], which when multiplied with the baseline signalenergy, results in an optimum threshold voltage, . Typ-ical values for are in the 3–5 range. Every time the icEEGsignal crosses , an event is marked. The frequency in-crease during a seizure event, on the other hand, is measuredthrough a measurement of the time separation between two con-secutive events, as illustrated in Fig. 4. A seizure is declared ifthis time separation between a pair of events is less than a safetime threshold, , for a number of consecutive stages. Alarger number of stages reduces false positives at the expenseof an increased detection delay. Typically, is between 9 and12, and can go up to 30 without major detection delay increase[15]. The advantages associated with this type of algorithm are

Fig. 5. Example of (a) one correct and one false detection, and (b) a missedseizure. Data used here is from patient 5 for part (a) and patient 1 for part (b),from the database in [16], described in [17].

that no fixed evaluation window is needed, instead, the time de-cision window is adaptive, and depends on how quickly the con-secutive events occur. For seizures in the band (8–13 Hz), theseparation between the events time stamps corresponds roughlyto , which is in accordance with valuesused in [15]. This observation implies that this type of detec-tion can perform similarly to evaluating the count in a max-imum fixed time window of (forand ). Theoretically, a single missed event can seethe pipeline count reset which can result in an increased seizuredetection delay and/or missed seizure detection altogether. Onthe other hand, false positives can result from seizure-unrelatedspikes that are sustained for a time period in excess of[15]. In addition, the threshold setting mechanism is a strongfunction (through a linear multiplication factor, ) of thebaseline activity. Changes in this baseline activity can result insensitivity and/or specificity performance degradation. Baselineactivity updating can be performed [15] at the expense of extrahardware and power dissipation.

Two examples illustrating where this event-based algorithmmight fail are illustrated in Fig. 5(a) and (b) for a false positiveand a false negative (missed seizure) alarm, respectively. Thedata used here is obtained from patients 1 and 5 in the publicdatabase described in [16] and analyzed in details in [17]. A1-h recording is shown in Fig. 5(a). One correct detection isrecorded in time epoch 1 and one wrong alarm (false positive) intime epoch 2. It is worth noting that two additional false alarmsare seen at the beginning of time epoch 1 of Fig. 5(a) but werenot counted here when normalized to the time epoch chosen of30 min. The parameters used here are optimized as describedin [15]. False alarms were observed [e.g., Fig. 5(b)] when the

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SAFI-HARB et al.: AN IMPLANTABLE SEIZURE-ONSET DETECTOR BASED ON A DUAL-PATH SINGLE-WINDOW COUNT-BASED TECHNIQUE 5

Fig. 6. Illustration of the algorithm: (a) flowchart, and evaluation showing the(b) icEEG recording � ���, (c) ones or “true” count � corresponding to thesignal � ��� within the thresholds, and (d) detection output � . The insetto the right of the flowchart is an illustration of how the threshold voltage isdetermined.

baseline activity was seen varying, while an optimized of3 or 5 [15] was kept constant (i.e., no threshold updating wasperformed).

C. Proposed Algorithm

An illustration of the proposed algorithm flowchart is shownin Fig. 6(a). The voltage window is set by two threshold levels,

and . A single 1–2 min long seizure is used perpatient to determine the values of and , centeredaround the mean of the icEEG signal. This mean value wasfound to remain relatively constant, hence only needs tobe determined. The choice of is obtained from the stan-dard deviation of a representative seizure, with time length de-termined by pre- and post-seizure onset, as illustrated inthe inset to the right of the flowchart of Fig. 6.2 This quantityis directly related to the variation incurred in the signal energyat the electrical seizure onset time. It was observed that evenwhen the baseline energy levels varied across patients from thedatabase in [16], the energy of the signal for a time durationequally spaced pre- and post-seizure onset presented less vari-ations for the purpose of algorithm sensitivity and specificitymeasures. Linking therefore the optimized threshold voltage tothe energy of the signal around a seizure onset (rather than being

times the baseline activity) provided in the current work abetter means of minimizing false positives and negatives simul-taneously. With the icEEG signal samples fitted to a Gaussiandistribution with zero mean, placing the at around sigma( ) would correspond statistically speaking to a probability of

2This time duration of 20 s pre- and post-seizure onset was also varied be-tween 15 s and 30 s, in steps of 5 s, to test for the robustness of the thresholdvoltage estimation. It was found that for a pre-post- period varying by as muchas 50% from its chosen value, the standard deviation observed in the thresholdlevel varied by no more than 5% from its selected value, and no significant degra-dation in the sensitivity/specificity measures was observed.

69% for the signal falling inside those bounds, and 31% other-wise. In other words, for a fixed size voltage window, and aroundthe seizure occurrence, 69% of the samples collected would fallinside the [ and ] voltage window. A progressivelyincreased amplitude (as one would expect shortly after seizureonset) manifests itself as more occurrences of the signal outside,and less inside, the window (i.e., lower count of logic ones, ).Here we define a parameter as the threshold count whenthe number of occurrences of the signal inside the definedlimits drops. For a fixed window size of 5 s, and a sampling fre-quency of 200 Hz, 1000 samples are collected. Around seizureonset, 690 samples would fall inside, and 310 would fall outsidethe [ and ] voltage window, statistically speaking.Hence is set to 690, and a signal ones count evalu-ated in a time frame ( ) less than 690 would thus imply adetected seizure. Lowering the value of while keeping thevoltage threshold fixed would result in a more conserva-tive seizure detector from a false positive point of view (at theexpense of an increase in the detection delay). The algorithmoutput for an example seizure is shown in Fig. 6(b)–(d). Thefirst seizure detection is issued by the algorithm at 32.5 s, i.e.,at a delay of 7.5 s with respect to the electrographical seizureonset. The signal count is directly related to the windowlength chosen (fixed at 5 s in this work). A longer window re-sults in lower false positives at the expense of a larger detectiondelay. A shorter time frame length, on the other hand, couldsee an increase in the rate of false positives (due for exampleto some nonseizure-related high-amplitude artifact sustained formore than 4 s). Window count algorithms can only issue a deci-sion at the end of the window length. In order to maintain algo-rithm good performance metrics while reducing the detectiondelay, we propose relying on a two-path system whereby thetime window increment is done with an overlap of 50% withrespect to the previous TF, as illustrated in Fig. 7. This will re-sult in combining the benefits associated with a longer window,while reducing the detection delay.

D. Proposed Algorithm: Performance Comparison

When compared to the multi-window based algorithm, andusing the same patient as in Section II-A, a dc offset super-imposed on that is 50% larger, and with a noise en-ergy superimposed on that is 30% its value (this is 10times more voltage noise in absolute terms than the multiplevoltage-window case), we see a possibility of degradation in thesensitivity from 100% to 80% (while maintaining 0 false alarms,as opposed to three false alarms in the former case). As summa-rized in Table I, the proposed system presents more detectiondelays, has marginal increase in power dissipation, but is muchsimpler, and more robust to threshold voltage variations.

A comparison of the event-based and proposed count-basedalgorithms on the first five patients in the database in [16] issummarized in Table II. In contrast to the work presented here,the CMOS circuit realization in [15] miniaturizes only the postprocessing blocks, while excluding the front-end amplifier andcomparators from the detector integrated circuit (IC) and powerestimation, as those latter were assumed an integral part of theinstrument acquiring the EEG recordings. Hence, no powermeasures are included in Table II. It is important to note here

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6 IEEE JOURNAL ON EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS

Fig. 7. Illustration of the two-path system with 50% overlap between �� and�� .

TABLE IPERFORMANCE COMPARISON TO [14]

TABLE IIPERFORMANCE COMPARISON TO [15]*

that the figures presented in Table II are not a measure of thegoodness of the algorithm in [15]. Further optimization canpossibly improve the numbers reported, in particular, if con-stant updating of the baseline energy is adopted as suggestedin [15]. In the context of the algorithm presented here, onceoptimized per patient, no threshold updating was performed ineither algorithm. For comparable overall false detection rates,and for the cases studied, the proposed algorithm has a superiorsensitivity. Alternatively, for comparable sensitivity (such asfor patients 1 and 5), the false detection rate is considerablyhigher for event-based detection when compared to the pro-posed algorithm.

III. PROPOSED SYSTEM AND DEVICE MAPPING

A. System Design

A system-level block diagram of the seizure detection algo-rithm is shown in Fig. 8. It consists of a front-end amplifier toamplify the icEEG signal from to mV levels. It is then

Fig. 8. System level design of the proposed algorithm: amplification, windowdetection, and a two-path system with 50% time offset between �� and ��are illustrated.

followed by window detection realized with two threshold com-parators. The comparators outputs are then synchronized with(second AND gate in Fig. 8) and fed serially to an asynchronouscounter. The number of bit stream in this work is equal to 1 kgiven that the pre-chosen window is 5 s and the sampling fre-quency of the icEEG data is . The countercounts the number of logic ones present in the bit streamand compares it to a predefined safe threshold count, , usingall-digital counter and magnitude comparator. Given that thetotal number of bits is 1 k, 10-bit counter and digital magnitudecomparator are needed. A smaller count, and therefore reducedhardware (less bits) for the counter and the digital comparatorcan be easily accomplished if synchronization to a fraction ofis adopted, or if synchronization to is eliminated altogether(i.e., removing the second AND gate in Fig. 8). A progressiverise in amplitude results in a transition from 1 to 0 in the digitalcomparator output at the end of the time frame, and thereforesuch a transition signal indicates an imminent seizure. The de-tection decision is evaluated at the end of the time frame sincethe counter has to finish accumulating/counting the number ofsignal logic ones in the time window selected ( ) before com-paring to . As a result, a large window will inevitably corre-spond to a large latency. To minimize the detection delay, twoparallel paths are incorporated in the design, each synchronizedto the same clock, , but with time frame windows that havean offset (overlap) of half a window length with respect to eachother ( and in Fig. 8). The flag that a seizure is im-minent is raised when either of the two paths system issues awarning. Each path has its data valid at the end of the window,i.e., points A and C for and B and D for , as shownin Fig. 8. In the implementation, a clock with 5 s period and aduty cycle in the vicinity of 100% is used (i.e., the clock is on allthe time except for a brief moment at the end of the 5 s intervalto reset the counters). This corresponds to a worst case detec-tion delay of 5 s per path, but both combined will give a detec-tion delay of 2.5 s given the time multiplexed nature of and

. This has the advantage of reducing the latency of the detec-tion algorithm, at the expense of additional hardware. However,this hardware consists of digital counters, a digital comparator,and a detection logic, all of which occupy little area overheadand consume negligible static power in a silicon integrated re-alization. The front-end amplifier and window comparators areshared by both signal paths, and these blocks dominate the static

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SAFI-HARB et al.: AN IMPLANTABLE SEIZURE-ONSET DETECTOR BASED ON A DUAL-PATH SINGLE-WINDOW COUNT-BASED TECHNIQUE 7

Fig. 9. Experimental setup and device details. The 8-bit digital icEEG(����� ) data is stored on a logic analyzer and streamed to the PCBsynchronously with a global clock, � , generated using the timer circuit.

power dissipation. Of course, the dual-path case can be gener-alized to more multiplexed paths to reduce the detection delayeven further.

B. Hardware/Device Design

A device prototype of the system-level shown earlier in Fig. 8was built using commercially available discrete components andassembled on a two-layer printed circuit board (PCB). The de-vice and experimental setup used are shown in Fig. 9. An 8-bitdigital representation of the icEEG analog data (selected as de-tailed in Section IV) is first stored on a Tektronix 715 LogicAnalyzer. The digital data is then streamed to the PCB at a rateof , generated using the “timer” circuit, to emu-late a real-time test setup. The digital data is fed to the headershown on top of the PCB whereby a DAC/buffer combination isused to reconstruct the analog data. An attenuator is then usedto convert the data back to -level analog form. Following thisstep, an instrumentation amplifier (IA) and analog window com-parison are included. Potentiometers are used to allow for pa-tient-specific threshold voltage level adjustment. Digital signalprocessing then follows as detailed in the previous section. Thetime frames, and , are generated from using a simplecounter and digital delays. The PCB diameter is . Usingsurface mount components instead reduces the components areaby at least a half, and so would using a multilayer PCB. It is clearthat the digital processing (Path1, Path2, and and gen-eration) occupies at least 80% of the PCB dimensions (this isdue to the standard 14- or 16-pin DIP packaging). Consider thecomponents labeled as “Path1.” Those include one 12-bit asyn-chronous counter and three 4-bit digital magnitude comparators.Integrated in silicon, these would require 12 flip-flops, with one4-bit magnitude comparator realized using 31 basic logic gates.This clearly can easily be integrated in silicon with minimal areaoverhead. In other words, the dimensions reported for the PCBdevice here are not representative of a spatially optimized de-vice (surface mount components and/or multilayer PCBs), noran IC realization. An IC would see a reverse situation whereby

Fig. 10. Schematic diagrams: (a) Front-end amplifier and (b) Comparator cir-cuits.

the IA occupies the largest silicon percentage (mainly due tothe large capacitors for dc offset rejection), whereas the digitalcomponents would occupy a negligible percentage of the siliconspace.

C. Monolithic Integration

The proposed detector, shown in Fig. 8, and implemented inhardware in Fig. 9, is designed in a monolithic IC [18] in orderto obtain a reasonable estimate of the power dissipation, and tofurther confirm the possibility of complete miniaturization ofthe proposed detector.

1) Front-End Amplifier and Comparator: Due to the low-amplitude of the signal recorded by the intracranial electrodes,low-noise amplification precedes the rest of the detection stepsof window comparison and seizure decision circuit. In orderto suppress dc components, which could saturate the ampli-fier, and attenuate high-frequency components beyond 50 Hz,a low-noise amplifier with a bandpass frequency response isused. The amplifier is composed of two amplification stages.The first one [19] is designed to achieve a low gain ( )to keep the capacitor ratio ( ) minimal, therefore savingsilicon space. The very low-frequency pole (high-pass response)is obtained with a large resistor ( ) integrated using apseudo-resistor [19] [Fig. 10(a)]. The second stage consists ofanother amplifier stage with additional dc rejection based on thefeed-forward cancellation technique [20]. The overall amplifier3-dB bandwidth is to 215 Hz and has an overall gain of62 dB. Additional high-pass low-pass filters could be added atthe output of the amplifier to reduce dc offsets further, and to de-crease the bandwidth from 215 to 50 Hz, which then also servesas an attenuator for the 60 Hz line interference. Experimen-tally using a custom-made PCB with commercial discrete com-ponents, the additional filtering was not needed following thelow-noise instrumentation amplifier, and all seizures were prop-erly detected. As a result, the choice made here was to excludethem to save power and reduce silicon area and complexity. Thecomparator [Fig. 10(b)] is realized using a low-power standardpreamplifier stage followed by a positive feedback regenerativelatch for fast response time.

2) Digital Signal Processor: The counter and 10-bit digitalcomparator are integrated using digital blocks from the stan-dard-cell libraries available in the TSMC 0.18- CMOS tech-nology. The asynchronous counter consists of ten JK flip flops,and is activated at the beginning, and is reset at the end, of the

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8 IEEE JOURNAL ON EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS

Fig. 11. (a) Intracranial electrodes were implanted through right craniotomywindow, (b) MRI images after implantation, and (c) 3-D reconstruction of theelectrodes in gridview.

5 s time frame. Just before resetting the counter output, a dig-ital comparator is activated to generate the comparison decisionwith respect to . The 10-bit digital comparator is realizedusing three cascaded stages of 4-bit logic comparator.

IV. CLINICAL METHODS AND RESULTS

A. Clinical Methods and Case Studies

The proposed algorithm and seizure detection device werevalidated using icEEG recordings of five patients (ages: 15–41)with epilepsy. Details of the patients are described below.

1) Patient Selection Criteria: This study was conducted atNotre-Dame Hospital, Centre Hospitalier de l’Université deMontréal (CHUM), Montréal, QC, Canada. The proposed de-tector was validated using icEEG recordings from patients withdrug-resistant partial epilepsy candidate for epilepsy surgery.At first, these patients underwent a comprehensive presurgicalevaluation, such as video-scalp EEG, a brain magnetic reso-nance study (MRI), an ictal single-photon emission computedtomography (SPECT), a positro emission tomography (PET),a magnetoencephalo-graphic (MEG) study, and an EEG-func-tional MRI (EEG-fMRI). Most of the noninvasive studies failedto adequately localize the epileptogenic zone (EZ) in thesepatients, thus invasive studies were required to localize the EZ.The selected patients with refractory epilepsy who were goodcandidates for epilepsy surgery underwent an intracranial studyfor better EZ delineation.

2) Surgical Electrode Implantation: In invasive studies, in-tracranial electrodes were implanted through a craniotomy orburr holes under general anaesthesia. Case 1 is a 24-year-oldmale with drug-resistant partial epilepsy since the age of 18years. Through a craniotomy subdural/depth electrodes wereimplanted in both right temporal and insular regions. Case 2 isa 36-year-old male with drug-resistant epilepsy since the age of30 years. An intracranial study was performed with extensivecoverage of the left frontal and temporal neocortices. Similarly,Case 3 (37/F) had intracranial electrodes implanted in the leftinsular, frontal, temporal, and interhemispheric regions. Case 4(15/M) had the electrode implantation in the right occipital andinterhemispheric regions. Case 5 (41/M) had electrodes sam-pling the right temporal, amygdala, and hippocampus.

3) Presurgical Evaluation: Following the implantation ofintracranial electrodes, the patient underwent MRI imaging toidentify the implanted electrodes. The gridview software (Stel-late Inc., Montréal, Canada) was used to reconstruct 3-D imagesof the implanted electrodes, and is shown in Fig. 11 for one pa-tient (case 1). IcEEG recordings of the patients were acquired

TABLE IIIPERFORMANCE SUMMARY

using amplifiers (Stellate Harmonie system) with video-EEGrecording unit (Stellate Inc.). The recording system had a gain of1000 V/V, a 0.1–70 Hz bandwidth, 200 Hz sampling frequency,and 8 bits of digitization resolution. Duration of the recordingsfor each patient was approximately three weeks and on averagefive seizures per patient were recorded. The recorded seizureswere carefully analyzed to identify the EZ and electrographicseizure onset was marked by an epileptologist (DKN). The pa-tients studied here exhibited the low-voltage fast-activity patternat seizure onset.

B. Validation of the Proposed Detector Device

A total of 49 data sets of short recordings (on average minlong each) from the EZ, half of which corresponded to seizures,were used in the validation phase. The remaining 24 data setscorresponded to variable patient activities. Of particular interestwere BES (occasionally 2–3 s long) and sleep patterns that werespecifically included to test the algorithm capabilities to ruleout false positives. In this particular example, the algorithm wasspecifically set to ignore brief paroxysmal discharges in orderto minimize the need for intervention as the clinician foundthat a high percentage of them did not necessarily progress intoan electroclinical seizure. The selected data sets were importedoffline into MATLAB to validate the algorithm devised, fol-lowed by hardware (PCB) measurement results. Simulation re-sults using Spectre (in Cadence) were also carried out for veri-fying the circuit designed in the TSMC 1.8-V 0.18- CMOStechnology and to estimate the power dissipation in the mono-lithic integration. A sensitivity of 100% with a mean detectionlatency of 10.7 s is achieved from the PCB for the five casesstudied. Of particular interest is the ability of this device to de-tect all seizures it was tested for, achieving therefore 100% sen-sitivity, with no extra filtering adopted following the IA wherebyno low-pass, high-pass, nor notch filtering (as was adopted in[15]) was used. Using both time frames as opposed to a singleone saw a reduction of 14% in the seizure onset mean detectiondelay, for a negligible penalty in area and power dissipation ina silicon integrated circuit implementation. The total simulatedstatic power dissipation of the IC was 7 . The achieved spec-ifications of the proposed detector are summarized in Table III.

V. DISCUSSION AND CONCLUSIONS

A low-complexity seizure onset detector has been proposedfor long term implantable applications. Value of one threshold

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SAFI-HARB et al.: AN IMPLANTABLE SEIZURE-ONSET DETECTOR BASED ON A DUAL-PATH SINGLE-WINDOW COUNT-BASED TECHNIQUE 9

voltage ( ) is extracted per patient, while other parame-ters are kept constant (window length, comparison threshold

), minimizing the overhead and complexity associated withmulti-parameter optimization. The mapping to the system levelincludes multiplexing the detection decisions of two-paths (thatshare the same bio-amplifier and window comparators) and wasmeasured to reduce the detection delay of the proposed deviceby 14%, when compared to a system with a single time frame.The algorithm is validated in MATLAB and mapped to hard-ware in a PCB realization using commercially available discretecomponents, and a 0.18- CMOS process monolithic inte-gration. The detector is tested on icEEG recordings from fiveepileptic patients, and a sensitivity of 100% is achieved with a10.7 s mean detection delay, well before overt clinical manifes-tations.

The simplicity and good overall performance of the proposeddetector is achieved by combining the advantages associatedwith each of the count-based [14] and single-window event-based algorithms [15]; namely the count within a fixed timeframe of the former, and the simplicity and single-thresholdoptimization of the latter. Less sensitivity to threshold voltagevariations (due to noise and dc offsets) were observed whencompared to [14], and better overall sensitivity and/or speci-ficity measures were obtained when compared to [15]. Detec-tion delay, on the other hand, is reduced despite the relativelylong evaluation window of 5 s adopted in this work due to thedual path detection decision multiplexing.

The detector was designed and tested for patients who ex-hibited the low-voltage fast-activity pattern at seizure onset, be-cause this kind of pattern at onset is commonly encountered [3],[21], [22]. The results presented in this paper are promising,allowing this type of patients to benefit directly from the pro-posed detector. It is worthwhile expanding the testing of such adetector on a larger population of patients exhibiting the low-voltage fast-activity pattern, and on longer datasets for theirrecordings. It is also worth investigating the performance of theproposed detector when the seizure pattern changes at onset toencompass other types of ictal patterns such as the high-voltagefast-activity pattern, and the rhythmic spiking, among others,and what modifications or tuning, if any, are needed for suchdetector to perform well.

Another important point that needs to be investigated furtheris the impact of the electrode contact impedance on the qualityof the recordings. The detector was tested offline on selectedsegments from icEEG recordings collected over a three-weekpresurgical evaluation period and without any changes to thedetector settings (threshold voltage, number of windows, etc.).However, it is obvious that these kinds of neural prosthetic de-vices are meant to be used over a much longer period of time,whereby the quality of the recordings and those of the recordingsystem due to the contacts need to be evaluated. Higher contactimpedances are associated with poorer signal-to-noise ratio, andeven device failure in long term usage. The interested reader isreferred to [23] for a recent publication that addresses some ofthe concerns associated with long term recordings.

ACKNOWLEDGMENT

CAD tool support is provided by the Canadian Microelec-tronics Corporation (CMC Microsystems).

REFERENCES

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[14] M. T. Salam, M. Sawan, D. K. Nguyen, and A. Hamoui, “Epilepticlow-voltage fast-activity seizure-onset detector,” IEEE BioCAS, pp.169–172, Nov. 2009.

[15] S. Raghunathan, S. K. Gupta, M. P. Ward, R. M. Worth, K. Roy, and P.P. Irazoqui, “The design and hardware implementation of a low-powerreal-time seizure detection algorithm,” J. Neural Eng., vol. 6, no. 5, p.056005, 2009.

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[18] M. Safi-Harb, M. T. Salam, S. Mirabbasi, D. K. Nguyen, and M. Sawan,“A low-power high-sensitivity CMOS mixed-signal seizure onset de-tector,” in IEEE Eng. Med. Biol. Conf., 2011, pp. 5847–5850.

[19] R. R. Harrison and C. Charles, “A low-power low-noise CMOS am-plifier for neural recording applications,” IEEE J. Solid-State Circuits,vol. 38, no. 6, pp. 958–965, Jun. 2003.

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[20] J. Parthasarathy, A. G. Erdman, A. D. Redish, and B. Ziaie, “An in-tegrated CMOS bio-potential amplifier with a feed-forward DC can-cellation topology,” in IEEE Eng. Med. Biol. Soc. Conf., 2006, pp.2974–2977.

[21] R. L. Kutsy, D. F. Farrell, and G. A. Ojemann, “Ictal patterns of neocor-tical seizures monitored with intracranial electrodes: Correlation withsurgicla outcome,” Epilepsia, vol. 40, no. 3, pp. 257–266, 1999.

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[23] S. F. Lempka, M. D. Johnson, M. A. Moffitt, K. J. Otto, D. R. Kipke,and C. C. McIntyre, “Theoretical analysis of intracortical microelec-trode recordings,” J. Neural Eng., vol. 8, p. 045006, 2011.

Mona Safi-Harb received the B.A.Sc. degree fromthe University of Toronto, Toronto, ON, Canada, in2000, and the M.Eng. and Ph.D. degrees from McGillUniversity, Montréal, QC, Canada, in 2003 and 2007,respectively, all in electrical engineering.

Between 2008 and 2011, she was a NaturalSciences and Engineering Research Council ofCanada postdoctoral research fellow (NSERC PDF)at Polytechnique, Montréal, QC, Canada working onlow-power circuits for biomedical applications. Sheis currently at the Montreal Neurological Institute,

Montréal, QC, Canada working on efficient algorithms for signal and imageprocessing in epileptic patients. In the years 2004 and 2005, she was a facultylecturer at McGill University teaching mixed-signal test techniques, and in2010 she taught analog and mixed-signal microelectronics at PolytechniqueMontréal.

Dr. Safi-Harb is the co-recipient of the 2003 Micronet Best Paper Award inthe circuits category, the Best Graduate Student Paper Award at the 2006 Instru-mentation and Technology Measurement Conference (IMTC), and the SecondPrize at the 2006 Design Automation Conference/International Solid-State Cir-cuits Conference (DAC/ISSCC) student design contest.

Muhammad Tariqus Salam received the B.A.Sc.degree in electrical and electronics engineering fromIUT, Gazipur, Bangladesh, in 2003, the M.A.Sc.degree in electrical and computer engineering fromConcordia University, Montréal, QC, Canada, in2007. He is a Ph.D. candidate in electrical engi-neering at École Polytechnique, Montréal, QC,Canada.

He is currently working in the Polystim Neurotech-nologies Laboratory and the Epilepsy MonitoringUnit, CHUM–Hôpital Notre-Dame, Montréal, QC,

Canada, where his research focuses on implantable microdevices for the presur-gical evaluation of patient candidates for epilepsy surgery, ultra-low power

seizure detectors and subsequent treatments, including direct drug delivery andelectrical stimulation. He was Research Assistant and Teaching Assistant inConcordia University (2006), lecturer in Prime University, part-time electricalengineer in the Bengal Company (2003), and intern in the Atomic EnergyCommission and Ghoralshal Power Station (2002).

Dang K. Nguyen received the M.D. degree andcompleted his neurology residency at the Universityof Montreal, Montréal, QC, Canada. His trainingincludes a two-year fellowship at Yale University,New Haven, CT, under the supervision of SusanSpencer with specialized formation on the care ofcomplex refractory epileptic patients, presurgicalevaluation of patients candidate for epilepsy surgery,and interpretation of continuous video-EEG moni-toring using scalp or intracranial electrodes.

He is an Associate Professor of Medicine at Uni-versity of Montreal with expertise in epilepsy. He is currently practising atNotre-Dame Hospital. His research interests center on the study of medicallyintractable epilepsies. He and collaborators are developing and evaluating novelmethods to better localize the epileptogenic zone (near infrared spectroscopy,magnetoencephalography, combined EEG-fMRI) and treat them (seizure detec-tion, responsive drug delivery, responsive electrical stimulation).

Mohamad Sawan (S’88–M’89–SM’96–F’04)received the Ph.D. degree in electrical engineeringfrom Sherbrooke University, Sherbrooke, QC,Canada, in 1990.

He joined Polytechnique Montréal in 1991, wherehe is currently a Professor of Microelectronics andBiomedical Engineering. His interests are the designand test of analog, digital, RF, MEMS and optic cir-cuits and microsystems. He is founder of the PolystimNeurotechnologies Laboratory. He is a holder of aCanada Research Chair in Smart Medical Devices,

and he is leading the Microsystems Strategic Alliance of Quebec (ReSMiQ). Hehas published more than 500 peer reviewed papers, two books, 10 book chap-ters, and 10 patents.

Dr. Sawan is founder and cofounder of several international conferencessuch as the IEEE NEWCAS, ICECS, and BioCAS. He is also cofounder andAssociate Editor (AE) of the IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS

AND SYSTEMS, and he is Deputy Editor-in Chief of the IEEE TRANSACTIONS

ON BIOMEDICAL CIRCUITS AND SYSTEMS–PART II. He is Editor and AE, andmember of the board of several international journals. He received severalawards, among them the Bombardier Award for technology transfer, and theBarbara Turnbull Award for spinal cord research. He is Fellow of the CanadianAcademy of Engineering, Fellow of the Engineering Institute of Canada, andOfficer of the Quebec’s National Order.