IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 57, NO. 8, AUGUST 2010 2623

A Different Multilevel Current-Source InverterNimrod Vázquez, Member, IEEE, Hector López, Claudia Hernández, Member, IEEE,

Eslí Vázquez, René Osorio, and Jaime Arau, Senior Member, IEEE

Abstract—DC/AC converters are widely used in several ap-plications; traditionally, they can be classified in two types: thevoltage-source inverters (VSIs) and the current-source inverters(CSIs). Their use depends on their application; however, some ofthem are common for both types of converters. Another possibilityfor the dc/ac conversion is the multilevel configuration, and themost analyzed is the VSI. In this paper, a different multilevel CSI isproposed: the paralleled configuration. To control the converter, adifferent sinusoidal pulse with modulation is employed; it consistsof modifying the reference signal instead of using multiple carri-ers. Additionally, a balancing method for the inductor currents isgiven. The operation, analysis, and implementation are presented;moreover, simulation and experimental results are shown.

Index Terms—Current source, dc/ac converter, low harmonicdistortion, multilevel converter.

I. INTRODUCTION

TRADITIONALLY, dc/ac converters can be classifiedin two types: the voltage-source inverters (VSIs) and

the current-source inverters (CSIs) [1]–[25]; however, theimpedance-source inverter called “z” source inverter (ZSI) hasbeen recently proposed [26]. These three inverters have beenproposed as adjustable motor drives [27]–[29]. However, sev-eral more applications of these converters can also be found inliterature [27]–[33].

The VSI has been studied extensively [1]–[19]. This type ofconverter can be classified into half-bridge inverters, full-bridgeinverters, and multilevel inverters (MI), and the last one can besubdivided into neutral-point-clamped inverters (NPC), flying-capacitor inverters, cascade full-bridge inverters [1], and re-cently, hybrid and hexagram inverters [10]–[12]. Furthermore,many works have been studying the MI [13]–[19]. In Fig. 1, thetopologies of the different types of multilevel VSIs are shown.

Nowadays, the CSI has been studied less than the VSI;however, it is used extensively in motor drives, and it isrecommended in applications when boosting capabilities arerequired [30], [31]. This type of converter can be classifiedinto pulsewidth-modulated CSIs [20]–[22], load-commutated

Manuscript received February 15, 2009; revised June 20, 2009; acceptedJuly 23, 2009. Date of publication August 28, 2009; date of current versionJuly 14, 2010.

N. Vázquez, H. López, C. Hernández, and R. Osorio are with the Departmentof Electronics Engineering, Instituto Tecnológico de Celaya, 38010 Celaya,México (e-mail: n.vazquez@ieee.org; hectroy1@hotmail.com; chdz@itc.mx;reneosorios@yahoo.com).

E. Vázquez is with the Department of Biochemistry Engineering, Insti-tuto Tecnológico de Celaya, 38010 Celaya, México (e-mail: evazquezn@gmail.com).

J. Arau is with the Department of Electronics Engineering, Centro Nacionalde Investigación y Desarrollo Tecnológico, 62490 Cuernavaca, México (e-mail:j.arau@ieee.org).

Color versions of one or more of the figures in this paper are available onlineat http://ieeexplore.ieee.org.

Digital Object Identifier 10.1109/TIE.2009.2030814

Fig. 1. Different topologies of multilevel VSI. (a) NPC converter. (b) Flying-capacitor converter. (c) Cascaded converter.

inverters [23], and multilevel CSIs [24], [25]. The last type canbe subdivided into inverters with topologies having an “em-bedded” configuration [24] and those with topologies havinga “two-stage” configuration [25]. In Fig. 2, the topologies ofmultilevel CSIs (MCSIs) are shown.

The last type of inverter recently proposed is the ZSI [26].This type of converter can also be suitable for applicationsthat require boosting capabilities. There are no subdivisionsreported in literature; however, it is complex to control because

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2624 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 57, NO. 8, AUGUST 2010

Fig. 2. Different topologies of MCSI. (a) Embedded converter. (b) Two-stageconverter.

Fig. 3. ZSI.

this is a nonminimum phase system. In Fig. 3, the topology ofthe ZSI is shown.

Basic concepts are different for each inverter. VSI requiresthe consideration of a blanking time, but an overlapping time isprohibited in one inverter leg. CSI needs an overlapping time,but a blanking time is strictly prohibited in the upper/lowerswitches of the inverter legs. Finally, the ZSI allows both inone inverter leg.

Current-source converters feature a simple structure, lowswitching dv/dt, and reliable overcurrent/short-circuit protec-tion [27]. On the other hand, multilevel converters offer theadvantage that a low harmonic content can be obtained witha relatively low switching frequency [1].

In this paper, a type of CSI is discussed; in fact, it is amultilevel type that combines the characteristics of CSIs andmultilevel converters. A topology different from those reportedin literature is proposed; we refer to it as the “paralleled” con-figuration. This converter is quite simple. It uses fewer or equalnumber of semiconductors to that of the MCSI reported in liter-ature [24], [25]; moreover, the current is equally distributed inthe inductors associated to the topology (this does not occur inthe other reported schemes). In Fig. 4, the general classificationof the dc/ac converters is shown, including the proposed one.

This paper is organized as follows. The proposed MCSI isaddressed in Section II; not only the operation and waveforms

but also the implementation details for this converter are in-cluded. Simulation and experimental results are discussed inSection III, and finally, some conclusions are given.

II. PROPOSED MCSI

CSIs are suggested in applications where boosting capa-bilities are required. One of these applications is the photo-voltaic/wind system, where the input voltage is usually lowerthan the utility line and a boost converter is required to deliverthe energy to the ac mains [25]; another application for CSIsis the adjustable motor drive. These converters can operate inadequate manner even if voltage sags are present at the ac inputvoltage because the boosting capability is possible [28].

The proposed idea consists of a CSI, but of multilevel type,that permits one to produce an output current with a lowerharmonic content compared with the semiconductor switchingfrequency. The proposed converter injects current to the outputin a parallel connection.

In Fig. 5, the proposed three-level topology is shown; it con-sists of two CSIs connected in parallel. In Fig. 5(a), the schemewith two independent voltage sources is shown; however, if thesame power supply is used, the topology can be simplified asshown in Fig. 5(b). Then, the traditional CSI can be transformedinto a three-level converter by just adding an inductor and twoswitches; else, more levels can be obtained.

A. Operation of the Converter

In order to explain the operation of the proposed converter[Fig. 5(b)], the input current is considered constant (largeinductors). When the switches S1, S2, and S3 are turned on, theother switches are turned off; in fact, the control signal of S1 isexactly the opposite of Sa and so on for the other switches. Inpractice, there is a small overlapping in the control signals S1

and Sa; this is because a current path must always be providedto the inductors in order to avoid the semiconductor damage.

Fig. 6 shows the current generated by the proposed MCSI.These waveforms are at a low frequency, and only the positivesemicycle is shown in order to illustrate the behavior. Controlsignals for the switches S1, S2, and S3 are also included.According to Fig. 6, the converter operates as follows.

1) During t0–t1. S1, S2, and S3 are turned on [the equivalentsubcircuit is shown in Fig. 7(a)], and then, a zero currentis injected (also, a zero current can be produced when S1,S2, and S3 are turned off).

2) During t1–t2. S1 is maintained on, S2 and S3 are turnedoff [the equivalent subcircuit is shown in Fig. 7(b)], andthen, a positive current is delivered.

3) During t2–t3. The same switch combination for t0–t1 isused. Then, a zero current output is obtained.

4) During t3–t4. A positive current is injected to the load,but, in this case, the other combination is used. S2 isturned on, and S1 and S3 are turned off.

5) During t4–t5. S1 and S2 are turned on, and S3 is turnedoff [the equivalent subcircuit is shown in Fig. 7(c)]. Then,a double magnitude of the positive current is obtained.

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VÁZQUEZ et al.: DIFFERENT MULTILEVEL CURRENT-SOURCE INVERTER 2625

Fig. 4. Classification of the dc/ac converters and the proposed one.

Fig. 5. Proposed three-level CSI. (a) Complete converter. (b) Simplifiedconverter.

Fig. 6. Control signals and output current. (Top to bottom) Control signal ofS1, control signal of S3, control signal of S2, and output current.

6) After t5. During the rest of the time, the converter op-eration is similar to the aforementioned. In Table I, thedifferent switching states to produce the required outputcurrent are summarized.

Fig. 7. Subcircuits of the proposed MCSI. (a) Subcircuit for zero current.(b) Subcircuit for positive current. (c) Subcircuit for double positive current.

TABLE ISWITCHING STATES OF THE CONVERTER

B. PWM

An important part of this proposal is the modulation tech-nique employed. Normally, traditional methods are based onthe multicarrier or space vector method [6]–[8].

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2626 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 57, NO. 8, AUGUST 2010

Fig. 8. Waveforms of the proposed PWM. (a) Reference. (b) Carrier. (c) Rectified reference. (d) Modified reference. (e) Rectified reference bounded to 1/2Vt.(f) Modified reference compared with the carrier. (g) Pulses obtained from comparing carrier and modified reference. (h) Signal to change the output level.(i) Signal of the sign of the reference. (j) Output current. (k) Signal to balance the inductor current in steady state.

In this paper, the modulation is certainly based on apulsewidth modulation (PWM), but a single carrier was used.The main idea is to use the same triangular waveform tomodulate the whole converter, but the reference is modified; atthe end, the operation is similar to the multicarrier method.

By definition, the modulation index is given by

M =Vp

Vt(1)

where Vp is the amplitude of the reference and Vt is the peak ofthe carrier signal.

Fig. 8 shows the useful waveforms of the modulation, takinginto account an M that is almost equal to one. The referencesignal R is shown in Fig. 8(a), the carrier signal is shown inFig. 8(b), and the rectified reference |R| is shown in Fig. 8(c).To produce a multilevel output, it is important to determinewhen the converter must produce the next current level; thisis made with the carrier amplitude (Vt). In this case, 1/2Vt

is used since a three-level converter is analyzed. The rectifiedreference above 1/2Vt is inverted, as shown in Fig. 8(d). Thiscan be implemented by using a limiter. The signal |R| is limitedto the value 1/2Vt, resulting to that shown in Fig. 8(e), then theresultant signal is used to obtain its complement by making asubtraction, and finally, the resultant equation is

Rf

2=

(lim1/2

|R|)−

(|R| − lim

1/2|R|

)(2)

where R is the reference, lim1/2() bounds the half of the carriersignal, and |R| is the rectification of R or the absolute value.

As the signal obtained in (2) has a maximum value of one-half, Vt is multiplied by two for comparison reasons at any timewith the carrier signal [Fig. 8(f)]. Then, the modified referenceis obtained by using the following:

Rf =(

4 ∗ lim1/2

|R|)− 2|R|. (3)

In a traditional sinusoidal PWM, the reference is comparedat all times with the carrier signal; in this case, the modifiedreference Rf is compared with the carrier [P+ in Fig. 8(g)]. Itmust be noticed that, in this figure, it is represented as only onesemicycle.

To obtain the signals to control the semiconductors, otherimportant signals are considered. The signal L1 in Fig. 8(h) isobtained by comparing |R| with 1/2Vt, and it is used for es-tablishing the current level that must be produced at the output.Signal R+ in Fig. 8(i) is obtained with a zero-crossing detectorand defines the polarity at the output current. The output-currentform for the positive semicycle is shown in Fig. 8(j).

C. Inductor Balancing Technique

In multilevel converters, an important issue is to balance thevariable in question [13]–[15], i.e., the capacitor voltages inVSIs and the inductor currents in CSIs. A natural commutationof the switches was selected. This permits one to equalizethe inductor currents in ideal conditions, and in experimentalsituations, only a slight unbalance will appear.

Converter redundancy is taken into account to generate thesame output level with different switching states. There are

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VÁZQUEZ et al.: DIFFERENT MULTILEVEL CURRENT-SOURCE INVERTER 2627

two combinations of switches to deliver a positive current;alternating both of them gives balance at the inductor currents.An auxiliary signal is employed to do it, which we refer as P1/2

[Fig. 8(k)]. This signal is synchronized with the pulses P+. Twocases have to be considered. On the one hand, when P1/2 is highand a positive output current must be produced, one combina-tion is chosen; on the other hand, when P1/2 is low, the othercombination is selected in order to produce the positive outputcurrent. By doing this, the system is balanced; this is becausethe energy is distributed equally between the two inductors.

The implementation was made by alternating the two com-binations in steady state; however, a simple controller is em-ployed to regulate the inductor currents in a much better way,just in case of current unbalance due to parasitic elements ordisturbances in the system.

D. Implementation of the Control Signals of the Switches

A combinational array of logic gates is used (in fact, ageneric array logic circuit). Some of the signals shown inFig. 8 are taken into account to produce the semiconductor gatesignals as follows.

1) For the positive semicycle (R+ = 0) and a low signalL1. A zero or first output current level must be produced,depending on the value of P+; however, the variable P1/2

that determines the switching state used to produce thepositive output current is also taken into account. Theemployed combination for the zero current level in thiscase has switches S1, S2, and S3 turned “on.” This stateis produced when P+ is high. Moreover, the first currentlevel can be obtained with two possible combinations: Forthe first one, S1 is turned on and S2 and S3 are turned“off,” and for the second one, S2 is turned on and S1 andS3 are turned off. Both are alternated, depending on thevalue of P1/2; this occurs when P+ is low.

2) For the positive semicycle (R+ = 0) but with high signalL1. The first and second current levels must be producedat this time, also depending on the value of P+. Again,the signal P1/2 is used to establish the switching stateconsidered to produce the positive current level. Thecombination used for the second or double current levelis as follows: S1 and S2 are turned on and S3 is turnedoff; this state is produced when P+ is high. The twocombinations for a positive current level are the same;they are alternated depending on the value of P1/2. Thisoccurs when P+ is low.

3) For the negative semicycle (R+ = 1). A similar behavioris considered during this time; for this reason, we nolonger discuss it in this paper.

According to the aforementioned, the Karnough maps shownin Fig. 9 are obtained, and the combinational array was de-signed with them. The input signals considered are R+, L1,P+, and P1/2, and the output signals are S1, S2, and S3. Then,the logic equations for each control signal are

S1 =(P+ · R′

+

)+

(P ′

1/2 · R′+

)+

(P ′

+ · P1/2 · R+

)(4)

S2 =(P+ · R′

+

)+

(P1/2 · R′

+

)+

(P ′

+ · P ′1/2 · R+

)(5)

S3 =(P ′

+ · R+

)+ (L1 · R+) +

(P+ · L′

1 · R′+

). (6)

Fig. 9. Karnough maps. (a) Map for control signal S1. (b) Map for controlsignal S2. (c) Map for control signal S3.

Fig. 10. Implementation of the system.

The implemented circuit to generate the inputs of the previ-ous logic equation is shown in Fig. 10; as shown, three com-parators and also the block to modify the reference accordingto (1) are used. An advantage for this circuit is the generation ofthe signal P1/2; a flip-flop was used, where its entry is the signalP+. It should be noticed that an additional circuit was incorpo-rated to equalize the inductor currents. When the current is fullybalanced, the inputs L1up and L2up are set to be zero logic,and then, automatically, the system will alternate the switchingstates to generate the first current level. However, if the inputL1up is set to be one logic, then the system will charge oneinductor, and the second one will be discharged; this is because

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2628 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 57, NO. 8, AUGUST 2010

Fig. 11. Controller to balance the inductor current.

Fig. 12. Gain graphs versus modulation index.

the same switch combination is used instead of the alternatingcondition. The same happens when the signal L2up is set tohigh, but, in an opposite way, this means that the other inductoris being charged. A simple controller, which senses the differ-ence of the inductor currents, was implemented, and with somecomparators, the signals L1up and L2up are obtained (Fig. 11).

E. Converter Gain

For the analysis, an averaged method is considered, and it issupposed that the switching frequency is higher than the outputvoltage frequency. Then, for a three-level CSI, the following isobtained:

Iop = 2MIL (7)

where Iop is the amplitude of the average output current and IL

is the inductor current.Therefore, by neglecting the losses, the input and output

powers are equalized

Pin = Po

2ILVin =VopIop

2(8)

where Po is the output power, Pin is the input power, Vin is theinput voltage, and Vop is the peak of the output voltage.

By using (7) and (8), the following is obtained:

Vop

Vin=

2M

. (9)

Fig. 12 shows the graph of the voltage and current gains. Itcan be observed that, with M = 1, the current and voltage gainsare both two; this implies that the contribution of the inductorcurrents is optimal, but the boosting function is lower.

F. Passive Element Design

The dc link inductor (L) must be large to permit a goodoperation of the converter and, then, a low harmonic distortionat the output. Considering the inductor stored energy and thedesired time to be discharged in case of input voltage failure, Lcan be calculated with

L =2(Po/2)Δt

I2L

(10)

where Δt is the discharging time.Considering Po = 100 W, IL = 500 mA, and Δt = 1 ms,

L = 400 mH is obtained, which permits a small current rippleat the input current in each inductor.

The output current filter can be designed easily by consid-ering the desired filter corner frequency and selecting a smallinductor value (one freedom degree). Then, the output capacitorcan be calculated with

C0 =1

L0(2πfc)2(11)

where L0 is the output inductor, chosen small, and fc is thecorner frequency of the filter.

Considering fc = 5 kHz and Lo = 500 μH, Co = 2 μF isobtained.

G. Extrapolation of the Converter

This converter can also be extrapolated for three-phase sys-tems, and also, more levels can be added. For a three-phasesystem, using an extra leg of the converter is required, but thecomplete converter must be used [Fig. 5(a)]. The operation of athree-phase CSI is different to that of a single-phase CSI; thus,the modulation and the control circuitry are different for eachcase. This is the same for multilevel converters. An inverterwith more levels can be obtained if more parallel switchesand inductors are connected to the system; this will allowthe decrease of the switching frequency, maintaining a lowharmonic content.

III. SIMULATION AND EXPERIMENTAL RESULTS

The functionality of the system was not only mathematicallysimulated; an experimental prototype was also built, so that theproposed idea was validated.

Numerical simulations are shown in Figs. 13–16. They weremade at 600 Hz with an inductance of 40 mH due to the timeresponse of the simulator. Fig. 13 shows the output current witha modulation index of 0.99 and the inductor currents, and as itcan be observed, they are well balanced.

Fig. 14 shows the performance of the system with a lowermodulation index, particularly, for this case, the output currentand the control signals of the switches S1, S2, and S3 areshown. As it can be observed, the output has a higher switchingfrequency than the semiconductors.

In Fig. 15, a test of the system under a perturbation wascarried out. The inductor currents are unbalanced with a pertur-bation, and then, the controller balances the inductor currents.

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VÁZQUEZ et al.: DIFFERENT MULTILEVEL CURRENT-SOURCE INVERTER 2629

Fig. 13. Output current and inductor currents. (Top to bottom) Output current(500 mA/div) and inductor currents (125 mA/div). Time: 1 ms/div.

Fig. 14. Output current and control signals of the switches. (Top to bottom)Output current (500 mA/div) and control signals S1, S2, and S3, respectively.Time: 1 ms/div.

Fig. 15. Operation of the system under a perturbation. (Top to bottom) Outputcurrent (500 mA/div), inductor currents (125 mA/div), and perturbation signalP1/2. Time: 2 ms/div.

The output current, the inductor currents, the signal used toproduce the unbalance, and the signal P1/2 are shown. As it canbe seen, the proposed scheme effectively regulates the currents;after the perturbation was applied, the controller acts on thesignal P1/2 to make its function.

A simulation of a three-phase system was also carried out. InFig. 16, the line-to-neutral current, line-to-line current, and thefiltered current can be observed.

Fig. 16. Simulation of a three-phase system. (Top to bottom) line–neutraloutput (1 A/div), line–line output current (1 A/div), and filtered line–line outputcurrent (1 A/div). Time: 1 ms/div.

Fig. 17. Reference and modified reference.

Fig. 18. Comparison between the modified reference and the carrier. (Top tobottom) Output of the comparison between the carrier and modified reference.

In Figs. 17–22, some experimental results of the system areshown. The input inductors are of 400 mH, and the switch-ing devices are IRG4PC40 without antiparallel diode; as aconsequence, the extra topology diodes are not required. In

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2630 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 57, NO. 8, AUGUST 2010

Fig. 19. Modulation signals. (Top to bottom) L1, R+, P+, and P1/2.

Fig. 20. Semiconductor signals. (Top to bottom) Modified reference andsignals S3, S2, and S1.

Fig. 21. Output current and inductor currents.

Fig. 22. Output current and harmonic content.

Fig. 23. Filtered output current and inductor currents under load variation.

Figs. 17–20, the carrier frequency was reduced to illustrateclearly the PWM operation. In Fig. 17, the reference andthe modified reference are shown. The comparison betweenthe modified reference and the carrier is shown in Fig. 18.Moreover, the output of the comparator is shown.

The control signals used as entries of the logic array, i.e., L1,R+, P+, and P1/2, are shown in Fig. 19. These signals are usedto control the semiconductor gates. The logic equations (4)–(6)were implemented in the integrated circuit GAL22V10, and thesignals S1, S2, and S3 are shown in Fig. 20.

In Fig. 21, the output current of the proposed converter andthe inductor currents are shown. It can be observed that theyare well balanced. The converter operates as it was expected.Fig. 22 shows the output current and its respective harmoniccontent. It can be observed that the first high-frequency har-monic appears around 50 kHz; this is because the carrierfrequency is 25 kHz. The total harmonic distortion obtained inthis test is lower than 5%. In Fig. 23, a load variation was madein order to show how the system maintains the input currentin balance even under disturbances; it shows the filtered outputcurrent and inductor currents.

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VÁZQUEZ et al.: DIFFERENT MULTILEVEL CURRENT-SOURCE INVERTER 2631

IV. CONCLUSION

This paper has presented a different method to build anMCSI; it is suggested as a parallel connection. The converter isdifferent to the previous published schemes. For a single-phasethree-level CSI, six semiconductors and two inductors are used.The proposed idea can be extrapolated to three-phase systems,but also, more levels can be added.

The PWM employed considers just a single carrier instead ofmultiple carriers as in the traditional method. The reference ismodified to fully modulate the converter.

A natural balancing method has been proposed, which isbased on the redundancy of the converter to produce the sameoutput with a different switching state; however, a simplecontroller was used to assure its operation.

The operation, analysis, and implementation have been ex-posed, and finally, the simulation and experimental results havebeen presented.

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Nimrod Vázquez (M’98) was born in México City,México, in 1973. He received the B.S. degree in elec-tronics engineering from the Instituto Tecnológicode Celaya, Celaya, México, in 1994 and the M.Sc.degree in electronics engineering and Dr.Ing. de-gree from the Centro Nacional de Investigación yDesarrollo Tecnológico, Cuernavaca, México, in1997 and 2003, respectively.

Since 1998, he has been with the Departmentof Electronics Engineering, Instituto Tecnológico deCelaya. His fields of interest include uninterruptible

power supplies, dc/ac converters, power-factor correction, nonlinear controltechniques, and renewable energy.

Authorized licensed use limited to: Instituto Tecnológico de Celaya. Downloaded on July 14,2010 at 19:17:11 UTC from IEEE Xplore. Restrictions apply.

2632 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 57, NO. 8, AUGUST 2010

Hector López was born in Tecomán, México, in1982. He received the B.S. degree in electronics en-gineering from the Instituto Tecnológico de Celaya,Celaya, México, in 2007, where he is currently work-ing toward the M.Sc. degree.

His fields of interest include dc/ac converters andrenewable energy sources.

Claudia Hernández (M’98) was born in Salamanca,México, in 1971. She received the B.S. degreein electronics engineering from the Instituto Tec-nológico de Celaya, Celaya, México, in 1995 andthe M.Sc. degree in electronics engineering fromthe Centro Nacional de Investigación y DesarrolloTecnológico, Cuernavaca, México, in 2000.

Since 1998, she has been with the Departmentof Electronics Engineering, Instituto Tecnológico deCelaya. Her fields of interest include dc/ac convert-ers, power-factor correction, and active filters.

Eslí Vázquez was born in México City, México,in 1969. He received the B.S. degree from theInstituto Tecnológico de Celaya, Celaya, México,the M.Sc. degree from the Universidad AutonomaMetropolitana–Iztapalapa, México City, and thePh.D. degree from the Imperial College London,London, U.K.

He is currently a Lecturer with the Instituto Tec-nológico de Celaya.

Rene Osorio was born in Veracruz, México, in1977. He received the B.S. degree in electrical engi-neering from the Campeche Autonomous University,Campeche, Mexico, in 1999 and the M.Sc. degree inelectronics engineering and Dr.Ing. degree from theCentro Nacional de Investigación y Desarrollo Tec-nológico, Cuernavaca, México, in 2001 and 2007,respectively.

Since August 2008, he has been a Researcher withthe Instituto Tecnológico de Celaya, Celaya, México.He has published about 20 papers in magazines,

journals, and international conferences in power electronics.

Jaime Arau (M’92–SM’97) was born in Veracruz,México, in 1960. He received the B.Sc. degreein electronic engineering from the Instituto Tecno-logico de Minatitlan, Minatitlan, Mexico, in 1982and the Ph.D. degree in electronic engineering fromthe Universidad Politecnica de Madrid, Madrid,Spain, in 1991.

He is currently a Professor and the Director of theCentro Nacional de Investigación y Desarrollo Tec-nológico, Cuernavaca, Mexico, where he teaches andconducts research in the area of power electronics.

His fields of interest are power-factor correction, power quality, electronicsballasts, and power converters for nonconventional energy sources.

Authorized licensed use limited to: Instituto Tecnológico de Celaya. Downloaded on July 14,2010 at 19:17:11 UTC from IEEE Xplore. Restrictions apply.