Intel PCH(Panther Point) UMA & Optimus Schematics ...

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Size Document Number Rev

Date: Sheet ofLA480 SD

Cover Page

Wistron Corporation21F,88,Sec.1,Hsin Tai Wu Rd.,Hsichih,Taipei Hsien 221, Taiwan, R.O.C

A4

1 103Friday, January 06, 2012

<Core Design>

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Cover Page


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<Core Design>

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Cover Page


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<Core Design>

Intel PCH(Panther Point)

UMA & Optimus Schematics Document

IVY Bridge(rPGA989)

DY :NotInstalledUMA:UMA platform installedOPS:OptimusHR:Huron RiverCR:Chief RiverV: V-Series installed

http://laptopblue.vnhttp://laptopblue.vn

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Block Diagram


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Block Diagram


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Block Diagram


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<Core Design>

SYSTEM DC/DC

PCB LAYERL1:TopL2:GNDL3:SignalL4:Signal

VCC_GFXCORE

TPS51640

L5:VCCL6:SignalL7:GNDL8:Signal

42~43

45

41

46

1D05V_VTT

44

92

40

INPUTS OUTPUTS

INPUTS

VGA

DCBATOUT

OUTPUTS

26

TPS51728

VGA_CORE

0D75V_S0

3D3V_AUX_S5

TPS51640INPUTS

VCC_CORE

OUTPUTS

SYSTEM DC/DCRT8207M

DDR_VREF_S3

OUTPUTS

CPU DC/DC

DCBATOUT

1D5V_S3

INPUTS

TPS51225

DCBATOUT 5V_S5

OUTPUTS

3D3V_S5

TPS51219OUTPUTS

SYSTEM DC/DC

INPUTS

DCBATOUT

INPUTS

SYSTEM DC/DC

DCBATOUT

OUTPUTS

OUTPUTS

SYSTEM DC/DC

INPUTS

BQ24737INPUTS

TI CHARGER

DCBATOUT+PBATT+DC_IN_S5

47

INPUTS OUTPUTS

26

RT8068A

3D3V_S5 1D8V_S0

DCBATOUT

LDO46RT8207

5V_S5

71.08111.N03, IC PCIE CTRL RTL8111F-CGT QFN 48P

Finger Print BD

CRT 50

60 71

LPC debug port

NVIDIA

EMC2103-2-AP

ALC269Q-VC2

DMI x 4

GLAN RJ45CONN

SPI

Flash ROM8MB

51

HDMI

HDMI

Mini-Card

88,89,90,91

83.84,85,86,87

RTL8111F

KBC

ThermalInt. KB

LP

C B

us

Intel CPU

4,5,6,7,8,9,10

Block Diagram(UMA/Optimus co-lay)

Bluetooth 63

USB x 2

CAMERA 49

ComboJack

Mini-Card

LVDSLCD

RGB CRT

56

Intel

ODD

56

SATA x 2

USB 3.0/2.0 ports (14)

High Definition Audio

SATA ports (6)

HDD

ACPI 1.1

LPC I/F

74

SD/MMC+/MS/MS Pro/xD

USB2.0 x 3

AzaliaCODEC

29

Analog DMIC

NPCE885G

ETHERNET (10/100/1000Mb)

NUVOTON

28

PCIE ports (8)

DDR3800MHz

28

2GB/1GB/512MB

Fan

4

VRAM

27

49

69 25

N13P-GL (V)N13M-GE1 (B)

17,18,19,20,21,22,23,24,25

PCIe x 16

TouchPAD

69

FDI x 4 x 2(UMA only)

AZALIA

65

66

31

64Finger Print

59

(Discrete only)

##OnMainBoard

SMBus

PCIE x 1/USB2.0 x 1

USB 3.0 x 2

SATA x 1/USB2.0 x 1

PCIE x 1

IVY Bridge

PCHPanther Point

G-Sensor

79

DDRIII: 1066/1333/1600 MHz

DDRIII1066/1333/1600

DDRIII 1066/1333/1600 Channel A Slot 014

15

Slot 1DDRIII1066/1333/1600

DDRIII 1066/1333/1600 Channel B

(V only)

ALCOR

REALTEK

Internal DMIC(V only)

(B only)

WLAN

2CH SPEAKER

CardReader USB 2.0 x 1

AU6435B52

REALTEK

USB x 2USB 2.0 x 2

Project CodePCB P/NRevision

91.4TD01.00111264SC

91.4TE01.00111273SC

LA480 LA580

0D75V_S0


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Date: Sheet of

Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,Taipei Hsien 221, Taiwan, R.O.C.

LA480 SD

Table of ContentA3


<Core Design>

Title


Date: Sheet of


LA480 SD

Table of ContentA3


<Core Design>

Title


Date: Sheet of


LA480 SD

Table of ContentA3


<Core Design>

PCIe Routing

LANE2

LANE3 Card Reader

LANE4

CFG[6:5]

CFG[7]

Processor Strapping

CFG[2]

Disabled - No Physical Display Port attached toEmbedded DisplayPort.CFG[4]

Pin Name Strap Description Configuration (Default value for each bit is 1 unless specified otherwise)

1:

0:PCI-Express StaticLane Reversal

Normal Operation. Lane Numbers Reversed 15 -> 0, 14 -> 1, ...

DefaultValue

PCI-ExpressPort BifurcationStraps

11 : x16 - Device 1 functions 1 and 2 disabled10 : x8, x8 - Device 1 function 1 enabled ;function 2 disabled01 : Reserved - (Device 1 function 1 disabled ;function 2 enabled)00 : x8, x4, x4 - Device 1 functions 1 and 2enabled

PEG DEFER TRAINING

1

0

1

1:

0:Enabled - An external Display Port device isconnectd to the EMBEDDED display Port

11

1:

0: PEG Train immediately following xxRESETB de asse rtion PEG Wait for BIOS for training

SPKR

Name Schematics Notes

HAD_DOCK_EN#/GPIO[33]

HDA_SDO Weak internal pull-down. Do not pull high. S ampled at rising edge of RSMRST#.

HDA_SYNC

Chief River Schematic Checklist Rev0.72

INIT3_3V# Weak internal pull-up. Leave as "No Connec t".

GNT3#/GPIO55GNT2#/GPIO53GNT1#/GPIO51

Weak internal pull-down. Do not pull high. Sampled at rising edge of RSMRST#.

GPIO8 on PCH is the Integrated Clock Enable strap a nd is required to be pulled-downusing a 1k +/- 5% resistor. When this signal is sam pled high at the rising edge ofRSMRST#, Integrated Clocking is enabled, When sampl ed low, Buffer Through Mode isenabled.

PCH Strapping

SPI_MOSI

Internal weak Pull-down. Connect to Vcc3_3 with 8.2-k Ω

- 10-k Ω weak pull-up resistor.

NV_ALE

Enable Danbury:

Disable Danbury:

NC_CLE DMI termination voltage. Weak internal pull-u p. Do not pull low.

GPIO15

GPIO8

Reboot option at power-upDefault Mode:No Reboot Mode with TCO Disabled:

Connect to Vcc3_3 with 8.2-k? weak pull-up resistor .

Left floating, no pull-down required.

Connect to +NVRAM_VCCQ with 8.2-kohm weak pull-up resistor [CRB has it pulled up with 1-kohm no-stuff resistor]

Leave floating (internal pull-down)

Low (0) - Flash Descriptor Security will be overrid den. Also,when this signals is sampled on the rising edge of PWROK then it will also disable Intel ME and its features .High (1) - Security measure defined in the Flash De scriptor will be enabled.Platform design should provide appropriate pull-up or pull-down depending on the desired settings. If a jumper option is used t o tie this signal to GND asrequired by the functional strap, the signal should be pulled low through a weakpull-down in order to avoid asserting HDA_DOCK_EN# inadvertently. Note: CRB recommends 1-kohm pull-down for FD Overri de. There is an internalpull-up of 20 kohm for DA_DOCK_EN# which is only en abled at boot/reset forstrapping functions.

GPIO27

Default = Do not connect (floating)High(1) = Enables the internal VccVRM to have a cle an supply foranalog rails. No need to use on-board filter circui t.Low (0) = Disables the VccVRM. Need to use on-board filtercircuits for analog rails.

Voltage RailsVOLTAGE DESCRIPTION

ACTIVE INPOWER PLANE

CPU Core RailGraphics Core Rail

AC Brick Mode only

ON for iAMTLegacy WOL

Powered by Li Coin Cell in G3 and 3D3V_S5 in Sx

3D3V_M

3.3V

DSW, Sx ON for supporting Deep Sleep states

S0

S3

All S states

G3, Sx

5V_S03D3V_S01D8V_S01D5V_S01D05V_VTT1D0V_S0VCCSA0D75V_S0VCC_COREVCC_GFXCORE1D8V_VGA_S03D3V_VGA_S01V_VGA_S0

5V3.3V1.8V1.5V1.05V1.0V0.9 - 0.675V0.75V0.35V to 1.5V0.4 to 1.25V1.8V3.3V1V

5V1.5V0.75V

5V_USBX_S31D5V_S3DDR_VREF_S3

BT+DCBATOUT5V_S55V_AUX_S53D3V_S53D3V_AUX_S5

6V-14.1V6V-14.1V5V5V3.3V3.3V

3.3V

3D3V_AUX_S5

GNT[3:0]# functionality is not available on Mobile.Mobile: Used as GPIO onlyPull-up resistors are not required on these signals . If pull-ups are used, they should be tied to the Vc c3_3power rail.

Enable Danbury:

Disable Danbury:

Low(0) - Intel ME Crypto Transport Layer Security ( TLS) cipher suite with noconfidentiality. High(1) - Intel ME Crypto Transpor t Layer Security (TLS) cipher suite with confidentiality.Note : This is an un-muxed signal.This signal has a weak internal pull-down of 20 koh m which is enabled when PWROK is low. Sampled at rising edge of RSMRST#.CRB has a 1-kohm pull-up on this signal to +3.3VA r ail.

SML1_CLK/SML1_DATA

PCH_SMBDATA/PCH_SMBCLKPCH_SMBDATA/PCH_SMBCLKPCH_SMBDATA/PCH_SMBCLKPCH_SMBDATA/PCH_SMBCLK

Device

I C / SMBus Addresses2

BAT_SCL/BAT_SDA

SMBus ADDRESSES

Chief River CRV

Address Hex Bus

Ref Des

BAT_SCL/BAT_SDABAT_SCL/BAT_SDA

LANE1

Mini Card2(WWAN)

LANE5

LANE6

LANE7

LANE8 Express Card

Intel GBE LAN / LAN

SML1_CLK/SML1_DATASML1_CLK/SML1_DATA

X

XPCH_SMBDATA/PCH_SMBCLK

PCH_SMBDATA/PCH_SMBCLK

Mini Card1(WLAN)

SATA Table

Pair

SATA

Device

0

5

4

3

2

1

HDD1

ODD

N/A

mSATA

N/A

ESATA

X

Chief River Schematic Checklist Rev0.72

3D3V_AUX_KBC 3.3V

PCH SMBusSO-DIMMA (SPD)SO-DIMMB (SPD)Digital PotG-SensorMINI

EC SMBus 2PCHeDP

EC SMBus 1BatteryCHARGER

1D05V_M 1.05V S0/M0, SX/M3, WOL_EN

ON whenever iAMT is active1D05V_LAN 1.05V S0/M0, SX/M3

USB Table

13

12

X

Mini Card1 (WLAN)

Fingerprint (USB1.1)

X

New Card

USB3.0 ext port 4

10

0

11

USB3.0 ext port 2

Pair

4

5

2

3

1

Device

6

7

8

9

BLUETOOTH (USB1.1)

CARD READER

CCD

Mini Card2 (WWAN)

USB3.0 ext port 1

USB ext. port 4 / E-SATA /USB CHARGER

USB3.0 ext port 3

port9 is debug port


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D D

C C

B B

A A

PEG_C_TXN3

PEG_C_TXN15

PEG_C_TXN10

PEG_C_TXN5

PEG_C_TXN0

PEG_C_TXN12

PEG_C_TXN7

PEG_C_TXN2

PEG_C_TXN14

PEG_C_TXN9

PEG_C_TXN4

PEG_C_TXN11

PEG_C_TXN6

PEG_C_TXN1

PEG_C_TXN13

PEG_C_TXN8

PEG_IRCOMP_R

PEG_RXN5PEG_RXN4PEG_RXN3PEG_RXN2PEG_RXN1

PEG_RXP5PEG_RXP4PEG_RXP3PEG_RXP2PEG_RXP1

PEG_RXN14

PEG_RXP14PEG_RXP13PEG_RXP12

PEG_RXN13PEG_RXN12

PEG_RXP11

PEG_RXN11

PEG_RXP10

PEG_RXN10

PEG_RXP9

PEG_RXN9

PEG_RXP8

PEG_RXN8

PEG_RXP7PEG_RXP6

PEG_RXN7PEG_RXN6

PEG_C_TXP3

PEG_C_TXP15

PEG_C_TXP10

PEG_C_TXP5

PEG_C_TXP0

PEG_C_TXP12

PEG_C_TXP7

PEG_C_TXP2

PEG_C_TXP14

PEG_C_TXP9

PEG_C_TXP4

PEG_C_TXP11

PEG_C_TXP6

PEG_C_TXP1

PEG_C_TXP13

PEG_C_TXP8

PEG_TXN0PEG_TXN1PEG_TXN2PEG_TXN3PEG_TXN4PEG_TXN5PEG_TXN6PEG_TXN7PEG_TXN8PEG_TXN9PEG_TXN10PEG_TXN11PEG_TXN12PEG_TXN13PEG_TXN14PEG_TXN15

PEG_TXP15PEG_TXP14PEG_TXP13PEG_TXP12PEG_TXP11PEG_TXP10PEG_TXP9PEG_TXP8PEG_TXP7PEG_TXP6PEG_TXP5PEG_TXP4PEG_TXP3PEG_TXP2PEG_TXP1PEG_TXP0

DP_COMP

FDI_TXP4FDI_TXP5

DMI_TXN0DMI_TXN1DMI_TXN2DMI_TXN3

DMI_TXP0DMI_TXP1DMI_TXP2DMI_TXP3

DMI_RXN0DMI_RXN1DMI_RXN2DMI_RXN3

DMI_RXP0DMI_RXP1DMI_RXP2DMI_RXP3

FDI_TXP6FDI_TXP7

FDI_TXN0FDI_TXN1

FDI_TXN3FDI_TXN4FDI_TXN5FDI_TXN6FDI_TXN7

FDI_TXN2

FDI_TXP0FDI_TXP1FDI_TXP2FDI_TXP3

PEG_RXP0

PEG_RXN0

PEG_RXP15

PEG_RXN15

eDP_HPD

1D05V_VTT

1D05V_VTT

DMI_TXN[3:0]19

DMI_TXP[3:0]19

DMI_RXN[3:0]19

DMI_RXP[3:0]19

FDI_TXN[7:0]19

FDI_TXP[7:0]19

FDI_FSYNC019FDI_FSYNC119

FDI_INT19

FDI_LSYNC019FDI_LSYNC119

PEG_RXN[0..15] 83

PEG_RXP[0..15] 83

PEG_TXN[0..15] 83

PEG_TXP[0..15] 83

Title



CPU (PCIE/DMI/FDI)


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<Core Design>

Title



CPU (PCIE/DMI/FDI)


A3


<Core Design>

Title



CPU (PCIE/DMI/FDI)


A3


<Core Design>

SSID = CPU

NOTE.If PEG is not implemented, the RX&TX pairs can be left as No Connect

NOTE:Select a Fast FET similar to 2N7002E whose rise/fall time is less than 6 ns. If HPD on eDP interface is disabled, connect it to CPU VCCIO via a 10-kΩ pull-Up resistor on the motherboard.

PEG Static Lane Reversal

Signal Routing Guideline:PEG_ICOMPO keep W/S=12/15 mils and routing length l ess than 500 mils.PEG_ICOMPI & PEG_RCOMPO keep W/S=4/15 mils and rout ing length less than 500 mils.

Note:Intel DMI supports both LaneReversal and polarity inversionbut only at PCH side. This isenabled via a soft strap.

Note:Lane reversal does not apply toFDI sideband signals.

Note:Intel FDI supports both LaneReversal and polarity inversionbut only at PCH side. This isenabled via a soft strap.

Signal Routing Guideline:EDP_ICOMPO keep W/S=12/15 mils and routinglength less than 500 mils.EDP_COMPIO keep W/S=4/15 mils and routinglength less than 500 mils.

NOTE.Processor strap CFG[4] should be pulled low to enable Embedded DisplayPort.

01.00IVY.000 IVY BRIDGE ORCAD SYMBOL.

1 2C408 SCD22U10V2KX-1GPOPSC408 SCD22U10V2KX-1GPOPS





1 2R402 24D9R2F-L-GPR402 24D9R2F-L-GP






1 2R40124D9R2F-L-GP

R40124D9R2F-L-GP









1 2R403 10KR2J-3-GP

DYR403 10KR2J-3-GP

DY









DMI_RX#0B27

DMI_RX#1B25

DMI_RX#2A25

DMI_RX#3B24

DMI_RX0B28

DMI_RX1B26

DMI_RX2A24

DMI_RX3B23

DMI_TX#0G21

DMI_TX#1E22

DMI_TX#2F21

DMI_TX#3D21

DMI_TX0G22

DMI_TX1D22

DMI_TX3C21DMI_TX2F20

FDI0_TX#0A21

FDI0_TX#1H19

FDI0_TX#2E19

FDI0_TX#3F18

FDI1_TX#0B21

FDI1_TX#1C20

FDI1_TX#2D18

FDI1_TX#3E17

FDI0_TX0A22

FDI0_TX1G19

FDI0_TX2E20

FDI0_TX3G18

FDI1_TX0B20

FDI1_TX1C19

FDI1_TX2D19

FDI1_TX3F17

FDI0_FSYNCJ18

FDI1_FSYNCJ17

FDI_INTH20

FDI0_LSYNCJ19

FDI1_LSYNCH17

PEG_ICOMPI J22

PEG_ICOMPO J21

PEG_RCOMPO H22

PEG_RX#0 K33

PEG_RX#1 M35

PEG_RX#2 L34

PEG_RX#3 J35

PEG_RX#4 J32

PEG_RX#5 H34

PEG_RX#6 H31

PEG_RX#7 G33

PEG_RX#8 G30

PEG_RX#9 F35

PEG_RX#10 E34

PEG_RX#11 E32

PEG_RX#12 D33

PEG_RX#13 D31

PEG_RX#14 B33

PEG_RX#15 C32

PEG_RX0 J33

PEG_RX1 L35

PEG_RX2 K34

PEG_RX3 H35

PEG_RX4 H32

PEG_RX5 G34

PEG_RX6 G31

PEG_RX7 F33

PEG_RX8 F30

PEG_RX9 E35

PEG_RX10 E33

PEG_RX11 F32

PEG_RX12 D34

PEG_RX13 E31

PEG_RX14 C33

PEG_RX15 B32

PEG_TX#0 M29

PEG_TX#1 M32

PEG_TX#2 M31

PEG_TX#3 L32

PEG_TX#4 L29

PEG_TX#5 K31

PEG_TX#6 K28

PEG_TX#7 J30

PEG_TX#8 J28

PEG_TX#9 H29

PEG_TX#10 G27

PEG_TX#11 E29

PEG_TX#12 F27

PEG_TX#13 D28

PEG_TX#14 F26

PEG_TX#15 E25

PEG_TX0 M28

PEG_TX1 M33

PEG_TX2 M30

PEG_TX3 L31

PEG_TX4 L28

PEG_TX5 K30

PEG_TX6 K27

PEG_TX7 J29

PEG_TX8 J27

PEG_TX9 H28

PEG_TX10 G28

PEG_TX11 E28

PEG_TX12 F28

PEG_TX13 D27

PEG_TX14 E26

PEG_TX15 D25

EDP_AUXC15

EDP_AUX#D15

EDP_TX0C17

EDP_TX1F16

EDP_TX2C16

EDP_TX3G15

EDP_TX#0C18

EDP_TX#1E16

EDP_TX#2D16

EDP_TX#3F15

EDP_COMPIOA18

EDP_HPDB16EDP_ICOMPOA17

PC

I E

XP

RE

SS

* -

GR

AP

HIC

S

DM

IIn

tel(R

) F

DI

eD

P

1 OF 9

SANDY

CPU1A

SANDY62.10055.421

SKT-BGA989C470395-1H180

2nd = 62.10040.771

PC

I E

XP

RE

SS

* -

GR

AP

HIC

S

DM

IIn

tel(R

) F

DI

eD

P

1 OF 9

SANDY

CPU1A

SANDY62.10055.421

SKT-BGA989C470395-1H180

2nd = 62.10040.771








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5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

SKTOCC#_R

H_CATERR#

SM_RCOMP_0SM_RCOMP_1SM_RCOMP_2

XDP_TRST#

H_PROCHOT#_R

BUF_CPU_RST#

SM_DRAMRST#

XDP_DBRESET#

CLK_DP_P_RCLK_DP_N_R

H_PROCHOT#

H_CPUPWRGD_R

XDP_TMS

XDP_PREQ#

XDP_TDI

XDP_TCLK

XDP_TDO

XDP_PRDY#

XDP_TRST#

XDP_DBRESET#

CLK_DP_N_RCLK_DP_P_R

XDP_TDO

XDP_TDIXDP_TMS

XDP_TCLK

1D05V_VTT

3D3V_S0

1D05V_VTT

1D05V_VTT

H_PECI22,27

H_PROCHOT#27,42

H_PM_SYNC19

H_SNB_IVB#22

H_THERMTRIP#22,36

H_CPUPWRGD22,97

VDDPWRGOOD37

PLT_RST#18,27,31,36,65,66,71,80,82,83,97

SM_DRAMRST# 37

CLK_EXP_P 20CLK_EXP_N 20

XDP_DBRESET#19

Title



CPU (THERMAL/CLOCK/PM )


A3


<Core Design>

Title





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<Core Design>

Title





A3


<Core Design>

SSID = CPU Disabling Guidelines:If motherboard only supports external graphics:Connect DPLL_REF_SSCLK on Processor to GND through1K +/- 5% resistor.Connect DPLL_REF_SSCLK# on Processor to VCCPthrough 1K +/- 5% resistorpower (~15 mW) may bewasted.

Signal Routing Guideline:SM_RCOMP keep routing length less than 500 mils.

Intelrecommends43pf

Connect EC to PROCHOT# through inverting OD buffer.

0511-CHECK

If PROCHOT# is not used, then it mustbe terminated with a 68ohm ±5%pull-up resistor to VTT.

In order to minimize resistance, use thick traces t oroute all COMP signals, use 10-mils wide trace forrouting less than 500 mils, or 20-mils wide tracefor routing between 500 mils and 1000 mils. Keep20-mils spacing to any other signals in order tominimize crosstalk.

Need Add Test PointC26: PROC_SELECT#

0511-CHECK

DEL U501DEL R519DEL C503DEL R517DEL R515

ASM R510ASM R509

1 2R516 1KR2J-1-GPR516 1KR2J-1-GP

1 2R50162R2J-GPR50162R2J-GP

1 TP513TP513

12 3

4

RN502SRN1KJ-7-GPRN502SRN1KJ-7-GP

1 TP512TP512

SM_RCOMP1 A5

SM_RCOMP2 A4

SM_DRAMRST# R8

SM_RCOMP0 AK1

BCLK# A27BCLK A28

DPLL_REF_SSCLK# A15DPLL_REF_SSCLK A16

CATERR#AL33

PECIAN33

PROCHOT#AL32

THERMTRIP#AN32

SM_DRAMPWROKV8

RESET#AR33

PRDY# AP29

PREQ# AP27

TCK AR26

TMS AR27

TRST# AP30

TDI AR28

TDO AP26

DBR# AL35

BPM#0 AT28

BPM#1 AR29

BPM#2 AR30

BPM#3 AT30

BPM#4 AP32

BPM#5 AR31

BPM#6 AT31

BPM#7 AR32

PM_SYNCAM34

SKTOCC#AN34

SNB_IVB#C26

UNCOREPWRGOODAP33

CL

OC

KS

MIS

CT

HE

RM

AL

PW

R M

AN

AG

EM

EN

T

DD

R3

M

ISC

JTA

G &

BP

M

2 OF 9

SANDY

CPU1B

SANDY62.10055.421

SKT-BGA989C470395-1H180

2nd = 62.10040.771

CL

OC

KS

MIS

CT

HE

RM

AL

PW

R M

AN

AG

EM

EN

T

DD

R3

M

ISC

JTA

G &

BP

M

2 OF 9

SANDY

CPU1B

SANDY62.10055.421

SKT-BGA989C470395-1H180

2nd = 62.10040.771

1 2R5101K5R2F-2-GPR5101K5R2F-2-GP

1 TP511TP511

12

R509750R2F-GP

R509750R2F-GP

1 2R506 140R2F-GPR506 140R2F-GP

1 2R503 10KR2J-3-GPR503 10KR2J-3-GP

1TP502TP502

12

C502SC47P50V2JN-3GP

C502SC47P50V2JN-3GP

1 2R504 0R0402-PADR504 0R0402-PAD

1 2R508 200R2F-L-GPR508 200R2F-L-GP

1 2R523 51R2J-2-GPR523 51R2J-2-GP

1 TP516TP516

1 2R513 56R2J-4-GPR513 56R2J-4-GP

1234 5

678

RN501

SRN51J-1-GP

RN501

SRN51J-1-GP

12R502 4K99R2F-L-GPR502 4K99R2F-L-GP

12

C501SC220P50V2KX-3GP

DY


DY

1TP501TP501

1 2R507 25D5R2F-GPR507 25D5R2F-GP


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

M_A_DQ44

M_A_DQ36

M_A_DQ47

M_A_DQ40M_A_DQ39

M_A_DQ37

M_A_DQ35M_A_DQ34

M_A_DQ59

M_A_DQ54M_A_DQ53

M_A_DQ63

M_A_DQ60M_A_DQ61

M_A_DQ58

M_A_DQ51

M_A_DQ48

M_A_DQ57

M_A_DQ55

M_A_DQ49M_A_DQ50

M_A_DQ62

M_A_DQ52

M_A_DQ56

M_A_DQ0M_A_DQ1M_A_DQ2M_A_DQ3

M_A_DQ7

M_A_DQ5M_A_DQ4

M_A_DQ6

M_A_DQ12

M_A_DQ10

M_A_DQ13

M_A_DQ9M_A_DQ8

M_A_DQ11

M_A_DQ15M_A_DQ14

M_A_DQ27

M_A_DQ25

M_A_DQ20M_A_DQ19

M_A_DQ30

M_A_DQ18

M_A_DQ16

M_A_DQ28

M_A_DQ17

M_A_DQ26

M_A_DQ31

M_A_DQ29

M_A_DQ22M_A_DQ23M_A_DQ24

M_A_DQ21

M_A_DQ46

M_A_DQ42

M_A_DQ38

M_A_DQ32

M_A_DQ45

M_A_DQ33

M_A_DQ43

M_A_DQ41

M_B_DQ0M_B_DQ1M_B_DQ2M_B_DQ3M_B_DQ4M_B_DQ5M_B_DQ6M_B_DQ7M_B_DQ8M_B_DQ9M_B_DQ10M_B_DQ11

M_B_DQ15

M_B_DQ13M_B_DQ12

M_B_DQ14

M_B_DQ16M_B_DQ17M_B_DQ18M_B_DQ19

M_B_DQ23

M_B_DQ21M_B_DQ20

M_B_DQ22

M_B_DQ28

M_B_DQ26

M_B_DQ29

M_B_DQ25

M_B_DQ31

M_B_DQ24

M_B_DQ27

M_B_DQ30


M_B_DQ39

M_B_DQ37M_B_DQ36

M_B_DQ38

M_B_DQ44

M_B_DQ42

M_B_DQ45

M_B_DQ41

M_B_DQ47

M_B_DQ40

M_B_DQ43

M_B_DQ46


M_B_DQ55

M_B_DQ53M_B_DQ52

M_B_DQ54

M_B_DQ60

M_B_DQ58

M_B_DQ61

M_B_DQ57

M_B_DQ63

M_B_DQ56

M_B_DQ59

M_B_DQ62

M_A_DQS4M_A_DQS3

M_A_DQS5M_A_DQS6M_A_DQS7

M_A_DQS2M_A_DQS1M_A_DQS0

M_A_A7

M_A_A12

M_A_A14M_A_A13

M_A_A9

M_A_A15

M_A_A10

M_A_A0

M_A_A6

M_A_A8

M_A_A1M_A_A2M_A_A3M_A_A4M_A_A5

M_A_A11

M_A_DQS#4M_A_DQS#5M_A_DQS#6M_A_DQS#7

M_A_DQS#3M_A_DQS#2M_A_DQS#1M_A_DQS#0

M_B_DQS0M_B_DQS1M_B_DQS2M_B_DQS3M_B_DQS4M_B_DQS5M_B_DQS6M_B_DQS7

M_B_DQS#3M_B_DQS#2M_B_DQS#1M_B_DQS#0

M_B_DQS#7M_B_DQS#6M_B_DQS#5M_B_DQS#4

M_B_A5M_B_A6M_B_A7M_B_A8M_B_A9M_B_A10M_B_A11M_B_A12M_B_A13M_B_A14M_B_A15

M_B_A4M_B_A3M_B_A2M_B_A1M_B_A0

M_A_DQ[63:0]14 M_B_DQ[63:0]15

M_A_DQS#[7:0] 14

M_A_A[15:0] 14

M_A_DQS[7:0] 14

M_A_DIM0_CKE0 14

M_A_DIM0_CKE1 14

M_A_DIM0_CS#0 14M_A_DIM0_CS#1 14

M_A_DIM0_ODT0 14M_A_DIM0_ODT1 14

M_A_DIM0_CLK_DDR0 14M_A_DIM0_CLK_DDR#0 14


M_B_A[15:0] 15

M_B_DQS[7:0] 15

M_B_DQS#[7:0] 15

M_B_DIM0_CKE0 15

M_B_DIM0_CKE1 15

M_B_DIM0_CS#0 15M_B_DIM0_CS#1 15

M_B_DIM0_ODT0 15M_B_DIM0_ODT1 15

M_B_DIM0_CLK_DDR0 15M_B_DIM0_CLK_DDR#0 15


M_A_BS014M_A_BS114M_A_BS214

M_A_CAS#14M_A_RAS#14M_A_WE#14

M_B_BS015

M_B_WE#15

M_B_BS115M_B_BS215

M_B_CAS#15M_B_RAS#15

Title


Date: Sheet of


LA480 SD

CPU (DDR)A3


<Core Design>

Title


Date: Sheet of


LA480 SD

CPU (DDR)A3


<Core Design>

Title


Date: Sheet of


LA480 SD

CPU (DDR)A3


<Core Design>

SSID = CPU

SA_BS0AE10

SA_BS1AF10

SA_BS2V6

SA_CAS#AE8

SA_RAS#AD9

SA_WE#AF9

SA_CLK0 AB6

SA_CLK1 AA5

SA_CLK#0 AA6

SA_CLK#1 AB5

SA_CKE0 V9

SA_CKE1 V10

SA_CS#0 AK3

SA_CS#1 AL3

SA_ODT0 AH3

SA_ODT1 AG3

SA_DQS0 D4

SA_DQS#0 C4

SA_DQS1 F6

SA_DQS#1 G6

SA_DQS2 K3

SA_DQS#2 J3

SA_DQS3 N6

SA_DQS#3 M6

SA_DQS4 AL5

SA_DQS#4 AL6

SA_DQS5 AM9

SA_DQS#5 AM8

SA_DQS6 AR11

SA_DQS#6 AR12

SA_DQS7 AM14

SA_DQS#7 AM15

SA_MA0 AD10

SA_MA1 W1

SA_MA2 W2

SA_MA3 W7

SA_MA4 V3

SA_MA5 V2

SA_MA6 W3

SA_MA7 W6

SA_MA8 V1

SA_MA9 W5

SA_MA10 AD8

SA_MA11 V4

SA_MA12 W4

SA_MA13 AF8

SA_MA14 V5

SA_MA15 V7

SA_DQ0C5

SA_DQ1D5

SA_DQ2D3

SA_DQ3D2

SA_DQ4D6

SA_DQ5C6

SA_DQ6C2

SA_DQ7C3

SA_DQ8F10

SA_DQ9F8

SA_DQ10G10

SA_DQ11G9

SA_DQ12F9

SA_DQ13F7

SA_DQ14G8

SA_DQ15G7

SA_DQ16K4

SA_DQ17K5

SA_DQ18K1

SA_DQ19J1

SA_DQ20J5

SA_DQ21J4

SA_DQ22J2

SA_DQ23K2

SA_DQ24M8

SA_DQ25N10

SA_DQ26N8

SA_DQ27N7

SA_DQ28M10

SA_DQ29M9

SA_DQ30N9

SA_DQ31M7

SA_DQ32AG6

SA_DQ33AG5

SA_DQ34AK6

SA_DQ35AK5

SA_DQ36AH5

SA_DQ37AH6

SA_DQ38AJ5

SA_DQ39AJ6

SA_DQ40AJ8

SA_DQ41AK8

SA_DQ42AJ9

SA_DQ43AK9

SA_DQ44AH8

SA_DQ45AH9

SA_DQ46AL9

SA_DQ47AL8

SA_DQ48AP11

SA_DQ49AN11

SA_DQ50AL12

SA_DQ51AM12

SA_DQ52AM11

SA_DQ53AL11

SA_DQ54AP12

SA_DQ55AN12

SA_DQ56AJ14

SA_DQ57AH14

SA_DQ58AL15

SA_DQ59AK15

SA_DQ60AL14

SA_DQ61AK14

SA_DQ62AJ15

SA_DQ63AH15

SA_CLK2 AB4

SA_CLK#2 AA4

SA_CLK3 AB3

SA_CLK#3 AA3

SA_CKE2 W9

SA_CKE3 W10

SA_CS#2 AG1

SA_CS#3 AH1

SA_ODT2 AG2

SA_ODT3 AH2

DD

R S

YS

TE

M M

EM

OR

Y A

3 OF 9

SANDY

CPU1C

SANDY

2nd = 62.10040.77162.10055.421

DD

R S

YS

TE

M M

EM

OR

Y A

3 OF 9

SANDY

CPU1C

SANDY

2nd = 62.10040.77162.10055.421

SB_BS0AA9

SB_BS1AA7

SB_BS2R6

SB_CAS#AA10

SB_RAS#AB8

SB_WE#AB9

SB_CLK0 AE2

SB_CLK1 AE1

SB_CLK#0 AD2

SB_CLK#1 AD1

SB_CKE0 R9

SB_CKE1 R10

SB_ODT0 AE4

SB_ODT1 AD4

SB_DQS4 AN6

SB_DQS#4 AN5

SB_DQS5 AP8

SB_DQS#5 AP9

SB_DQS6 AK11

SB_DQS#6 AK12

SB_DQS7 AP14

SB_DQS#7 AP15

SB_DQS0 C7

SB_DQS#0 D7

SB_DQS1 G3

SB_DQS#1 F3

SB_DQS2 J6

SB_DQS#2 K6

SB_DQS3 M3

SB_DQS#3 N3

SB_MA0 AA8

SB_MA1 T7

SB_MA2 R7

SB_MA3 T6

SB_MA4 T2

SB_MA5 T4

SB_MA6 T3

SB_MA7 R2

SB_MA8 T5

SB_MA9 R3

SB_MA10 AB7

SB_MA11 R1

SB_MA12 T1

SB_MA13 AB10

SB_MA14 R5

SB_MA15 R4

SB_DQ0C9

SB_DQ1A7

SB_DQ2D10

SB_DQ3C8

SB_DQ4A9

SB_DQ5A8

SB_DQ6D9

SB_DQ7D8

SB_DQ8G4

SB_DQ9F4

SB_DQ10F1

SB_DQ11G1

SB_DQ12G5

SB_DQ13F5

SB_DQ14F2

SB_DQ15G2

SB_DQ16J7

SB_DQ17J8

SB_DQ18K10

SB_DQ19K9

SB_DQ20J9

SB_DQ21J10

SB_DQ22K8

SB_DQ23K7

SB_DQ24M5

SB_DQ25N4

SB_DQ26N2

SB_DQ27N1

SB_DQ28M4

SB_DQ29N5

SB_DQ30M2

SB_DQ31M1

SB_DQ32AM5

SB_DQ33AM6

SB_DQ34AR3

SB_DQ35AP3

SB_DQ36AN3

SB_DQ37AN2

SB_DQ38AN1

SB_DQ39AP2

SB_DQ40AP5

SB_DQ41AN9

SB_DQ42AT5

SB_DQ43AT6

SB_DQ44AP6

SB_DQ45AN8

SB_DQ46AR6

SB_DQ47AR5

SB_DQ48AR9

SB_DQ49AJ11

SB_DQ50AT8

SB_DQ51AT9

SB_DQ52AH11

SB_DQ53AR8

SB_DQ54AJ12

SB_DQ55AH12

SB_DQ56AT11

SB_DQ57AN14

SB_DQ58AR14

SB_DQ59AT14

SB_DQ60AT12

SB_DQ61AN15

SB_DQ62AR15

SB_DQ63AT15

SB_CLK2 AB2

SB_CLK#2 AA2

SB_CKE2 T9

SB_CLK3 AA1

SB_CLK#3 AB1

SB_CKE3 T10

SB_CS#0 AD3

SB_CS#1 AE3

SB_CS#2 AD6

SB_CS#3 AE6

SB_ODT2 AD5

SB_ODT3 AE5

DD

R S

YS

TE

M M

EM

OR

Y B

4 OF 9

SANDY

CPU1D

SANDY

2nd = 62.10040.77162.10055.421

DD

R S

YS

TE

M M

EM

OR

Y B

4 OF 9

SANDY

CPU1D

SANDY

2nd = 62.10040.77162.10055.421


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

CFG4

CFG2

CFG5CFG6CFG7

H_VCCP_SEL

CLK_XDP_ITP_PCLK_XDP_ITP_N

CFG0

CFG7

CFG2

CFG6

CFG5

CFG4

TP713

CFG1

CFG3

CFG16

DDR_WR_VREF0112DDR_WR_VREF0212

Title


Date: Sheet of


LA480 SD

CPU (RESERVED)A3


<Core Design>

Title


Date: Sheet of


LA480 SD

CPU (RESERVED)A3


<Core Design>

Title


Date: Sheet of


LA480 SD

CPU (RESERVED)A3


<Core Design>

SSID = CPU

0:Lane Reversed

1: PEG Train immediately following xxRESETB de asse rtionCFG7

PEG DEFER TRAINING

PEG Static Lane Reversal - CFG2 is for the 16x

1: Normal Operation; Lane # definition matches socket pin map definition

CFG2

10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled01: Reserved - (Device 1 function 1 disabled ; func tion 2 enabled)00: x8,x4,x4 - Device 1 functions 1 and 2 enabled

0: PEG Wait for BIOS for training

CFG[6:5] 11: x16 - Device 1 functions 1 and 2 disabled

PCIE Port Bifurcation Straps

0: Enabled; An external Display Port device is connected to the Embedded Display Port

Display Port Presence Strap

1: Disabled; No Physical Display Port attached to Embedded Display Port

CFG4

1TP705TP705

1TP717TP717

12

R7021KR2J-1-GP

OPS

R7021KR2J-1-GP

OPS

1TP704TP704

CFG0AK28

CFG1AK29

CFG2AL26

CFG3AL27

CFG4AK26

CFG5AL29

CFG6AL30

CFG7AM31

CFG8AM32

CFG9AM30

CFG10AM28

CFG11AM26

CFG12AN28

CFG13AN31

CFG14AN26

CFG15AM27

CFG16AK31

CFG17AN29

RSVD#AM33 AM33

RSVD#AJ27 AJ27

RSVD#J16 J16

RSVD#AT34 AT34

RSVD#H16 H16

RSVD#G16 G16

RSVD#AR35 AR35

RSVD#AT33 AT33

RSVD#AR34 AR34

RSVD#AT2 AT2

RSVD#AT1 AT1

RSVD#AR1 AR1

RSVD#B34 B34

RSVD#A33 A33

RSVD#A34 A34

RSVD#B35 B35

RSVD#C35 C35

RSVD#AJ32 AJ32

RSVD#AK32 AK32

RSVD#AE7 AE7

RSVD#AK2 AK2

RSVD#L7 L7

RSVD#AG7 AG7

RSVD#J15J15

RSVD#C30C30RSVD#D23D23

RSVD#A31A31

RSVD#B30B30

RSVD#D30D30RSVD#B29B29

RSVD#A30A30RSVD#B31B31

RSVD#C29C29

RSVD#J20J20

RSVD#T8 T8

RSVD#B4B4

RSVD#D1D1

RSVD#F25F25

RSVD#F24F24

RSVD#D24D24

RSVD#G25G25

RSVD#G24G24

RSVD#E23E23

RSVD#W8 W8

RSVD#AT26 AT26

RSVD#B18B18

RSVD#AP35 AP35

RSVD#F23F23

RSVD#AJ26AJ26

RSVD#AJ31AJ31

RSVD#AH31AH31

RSVD#AJ33AJ33

RSVD#AH33AH33

RSVD#AH27 AH27

RSVD#A19A19

RSVD#AN35 AN35

RSVD#AM35 AM35

RE

SE

RV

ED

5 OF 9

SANDY

CPU1E

SANDY62.10055.421

SKT-BGA989C470395-1H180

2nd = 62.10040.771

RE

SE

RV

ED

5 OF 9

SANDY

CPU1E

SANDY62.10055.421

SKT-BGA989C470395-1H180

2nd = 62.10040.771

12

R704

1KR

2J-1-GP

DY

R704

1KR

2J-1-GP

DY

1TP702TP702

1 TP718TP718

12

R701

1KR

2J-1-GP

DY

R701

1KR

2J-1-GP

DY

1 TP720TP720

12

R7051KR2J-1-GPDYR7051KR2J-1-GPDY

1 TP719TP719

12

R7031KR2J-1-GP

DY

R7031KR2J-1-GP

DY

1TP703TP703


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

H_CPU_SVIDCLKH_CPU_SVIDALRT#

VCCIO_SENSE

VSSIO_SENSE

H_CPU_SVIDDAT

VCC_CORE

VCC_CORE

1D05V_VTT

1D05V_VTT

1D05V_VTT

1D05V_VTT

1D05V_VTT

VCC_CORE

H_CPU_SVIDDAT 42

VR_SVID_ALERT# 42H_CPU_SVIDCLK 42

VCCSENSE 42VSSSENSE 42

VCCIO_SENSE 45VSSIO_SENSE 45

Title


Date: Sheet of


LA480 SD

CPU (VCC_CORE)Custom


<Core Design>

Title


Date: Sheet of


LA480 SD



<Core Design>

Title


Date: Sheet of


LA480 SD



<Core Design>

For CRB VIDSOUT need to pull high 130 ohm closr to CPU and IMVP7For CRB VIDALERT# need to pull high 75 ohm close to CPU

VCCIO:8.5AVCC CORE:53A

0511-CHECK CAP.

0511-CHECK CAP.

0511-CHECK

0511-CHECK

checkPlace neer PCU pin.

Reserve C846 & C847

12

R80910R2F-L-GP

R80910R2F-L-GP

12

C803

SC

10U6D

3V5K

X-1G

P

C803

SC

10U6D

3V5K

X-1G

P

12

C842

SC

10U6D

3V5K

X-1G

P

C842

SC

10U6D

3V5K

X-1G

P

12

R801100R2F-L1-GP-UR801100R2F-L1-GP-U

12

C844

SC

10U6D

3V5K

X-1G

P

DYC844

SC

10U6D

3V5K

X-1G

P

DY

12

C811

SC

10U6D

3V5K

X-1G

P

C811

SC

10U6D

3V5K

X-1G

P

12

C820

SC

10U6D

3V5K

X-1G

P

C820

SC

10U6D

3V5K

X-1G

P

12

C841

SC

10U6D

3V5K

X-1G

P

C841

SC

10U6D

3V5K

X-1G

P

12

C829

SC

10U6D

3V5K

X-1G

P

C829

SC

10U6D

3V5K

X-1G

P

12

C837

SC

10U6D

3V5K

X-1G

P

C837

SC

10U6D

3V5K

X-1G

P

12

C843S

C10U

6D3V

5KX

-1GP

C843S

C10U

6D3V

5KX

-1GP

12

C840

SC

10U6D

3V5K

X-1G

P

DYC840

SC

10U6D

3V5K

X-1G

P

DY

1 2R804 130R2F-1-GPR804 130R2F-1-GP

12

C838

SC

10U6D

3V5K

X-1G

P

C838

SC

10U6D

3V5K

X-1G

P

12

C808

SC

10U6D

3V5K

X-1G

P

C808

SC

10U6D

3V5K

X-1G

P

12

C830

SC

10U6D

3V5K

X-1G

P

C830

SC

10U6D

3V5K

X-1G

P

12

C802

SC

10U6D

3V5K

X-1G

P

DYC802

SC

10U6D

3V5K

X-1G

P

DY

12

C819

SC

10U6D

3V5K

X-1G

P

C819

SC

10U6D

3V5K

X-1G

P

12

C823

SC

10U6D

3V5K

X-1G

P

DYC823

SC

10U6D

3V5K

X-1G

P

DY

12

C828

SC

10U6D

3V5K

X-1G

P

C828

SC

10U6D

3V5K

X-1G

P

1 2R807 75R2F-2-GPR807 75R2F-2-GP

12

C812

SC

10U6D

3V5K

X-1G

P

C812

SC

10U6D

3V5K

X-1G

P

12

R802100R2F-L1-GP-UR802100R2F-L1-GP-U

12

C816

SC

10U6D

3V5K

X-1G

P

C816

SC

10U6D

3V5K

X-1G

P

12

C805

SC

10U6D

3V5K

X-1G

P

C805

SC

10U6D

3V5K

X-1G

P

12

C821

SC

10U6D

3V5K

X-1G

P

C821

SC

10U6D

3V5K

X-1G

P

12

C825

SC

10U6D

3V5K

X-1G

P

C825

SC

10U6D

3V5K

X-1G

P

12

C826

SC

10U6D

3V5K

X-1G

P

C826

SC

10U6D

3V5K

X-1G

P

12

C804

SC

10U6D

3V5K

X-1G

P

DYC804

SC

10U6D

3V5K

X-1G

P

DY12

C801

SC

10U6D

3V5K

X-1G

P

C801

SC

10U6D

3V5K

X-1G

P

12

C839

SC

10U6D

3V5K

X-1G

P

C839

SC

10U6D

3V5K

X-1G

P

12

C818

SC

10U6D

3V5K

X-1G

P

C818

SC

10U6D

3V5K

X-1G

P

12

C817

SC

10U6D

3V5K

X-1G

P

C817

SC

10U6D

3V5K

X-1G

P

12

C827

SC

10U6D

3V5K

X-1G

P

C827

SC

10U6D

3V5K

X-1G

P

12

C832

SC

10U6D

3V5K

X-1G

P

DYC832

SC

10U6D

3V5K

X-1G

P

DY12

C833

SC

10U6D

3V5K

X-1G

P

C833

SC

10U6D

3V5K

X-1G

P

12

C807

SC

10U6D

3V5K

X-1G

P

C807

SC

10U6D

3V5K

X-1G

P

12

C813

SC

10U6D

3V5K

X-1G

P

C813

SC

10U6D

3V5K

X-1G

P

1 2R803 43R2J-GPR803 43R2J-GP

12

C834

SC

10U6D

3V5K

X-1G

P

C834

SC

10U6D

3V5K

X-1G

P

12

C822

SC

10U6D

3V5K

X-1G

P

C822

SC

10U6D

3V5K

X-1G

P

12

C836

SC

10U6D

3V5K

X-1G

P

C836

SC

10U6D

3V5K

X-1G

P

12

C810

SC

10U6D

3V5K

X-1G

P

C810

SC

10U6D

3V5K

X-1G

P

12

C824

SC

10U6D

3V5K

X-1G

P

C824

SC

10U6D

3V5K

X-1G

P

12

C814

SC

10U6D

3V5K

X-1G

P

C814

SC

10U6D

3V5K

X-1G

P

12

C835

SC

10U6D

3V5K

X-1G

P

C835

SC

10U6D

3V5K

X-1G

P

12

R80810R2F-L-GP

R80810R2F-L-GP

12

C831

SC

10U6D

3V5K

X-1G

P

C831

SC

10U6D

3V5K

X-1G

P

VCC_SENSE AJ35

VSS_SENSE AJ34

VIDALERT# AJ29

VIDSCLK AJ30

VIDSOUT AJ28

VSSIO_SENSE A10

VCCAG35

VCCAG34

VCCAG33

VCCAG32

VCCAG31

VCCAG30

VCCAG29

VCCAG28

VCCAG27

VCCAG26

VCCAF35

VCCAF34

VCCAF33

VCCAF32

VCCAF31

VCCAF30

VCCAF29

VCCAF28

VCCAF27

VCCAF26

VCCAD35

VCCAD34

VCCAD33

VCCAD32

VCCAD31

VCCAD30

VCCAD29

VCCAD28

VCCAD27

VCCAD26

VCCAC35

VCCAC34

VCCAC33

VCCAC32

VCCAC31

VCCAC30

VCCAC29

VCCAC28

VCCAC27

VCCAC26

VCCAA35

VCCAA34

VCCAA33

VCCAA32

VCCAA31

VCCAA30

VCCAA29

VCCAA28

VCCAA27

VCCAA26

VCCY35

VCCY34

VCCY33

VCCY32

VCCY31

VCCY30

VCCY29

VCCY28

VCCY27

VCCY26

VCCV35

VCCV34

VCCV33

VCCV32

VCCV31

VCCV30

VCCV29

VCCV28

VCCV27

VCCV26

VCCU35

VCCU34

VCCU33

VCCU32

VCCU31

VCCU30

VCCU29

VCCU28

VCCU27

VCCU26

VCCR35

VCCR34

VCCR33

VCCR32

VCCR31

VCCR30

VCCR29

VCCR28

VCCR27

VCCR26

VCCP35

VCCP34

VCCP33

VCCP32

VCCP31

VCCP30

VCCP29

VCCP28

VCCP27

VCCP26

VCCIO AH13

VCCIO J11

VCCIO G12

VCCIO F14

VCCIO F13

VCCIO F12

VCCIO F11

VCCIO E14

VCCIO E12

VCCIO AH10

VCCIO AG10

VCCIO AC10

VCCIO Y10

VCCIO U10

VCCIO P10

VCCIO L10

VCCIO J14

VCCIO J13

VCCIO J12

VCCIO H14

VCCIO H12

VCCIO H11

VCCIO G14

VCCIO G13

VCCIO E11

VCCIO C12

VCCIO C11

VCCIO B14

VCCIO B12

VCCIO A14

VCCIO A13

VCCIO A12

VCCIO A11

VCCIO D14

VCCIO D13

VCCIO D12

VCCIO D11

VCCIO C14

VCCIO C13

VCCIO_SENSE B10

VCCIO J23

POWER

CORE SUPPLY

PEG AND DDR

SENSE LINES

SVID

6 OF 9

SANDY

CPU1F

SANDY

2nd = 62.10040.77162.10055.421

POWER

CORE SUPPLY

PEG AND DDR

SENSE LINES

SVID

6 OF 9

SANDY

CPU1F

SANDY

2nd = 62.10040.77162.10055.421

12

C815

SC

10U6D

3V5K

X-1G

P

C815

SC

10U6D

3V5K

X-1G

P

12

C806

SC

10U6D

3V5K

X-1G

P

C806

SC

10U6D

3V5K

X-1G

P

12

C845

SC

10U6D

3V5K

X-1G

P

C845

SC

10U6D

3V5K

X-1G

P

12

C809

SC

10U6D

3V5K

X-1G

P

C809

SC

10U6D

3V5K

X-1G

P


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

VSS_AXG_SENSEVCC_AXG_SENSE

1D5V_S0

VCC_GFXCORE

VCCSA

VCC_GFXCORE

1D8V_S0

VCC_AXG_SENSE 42

+V_SM_VREF_CNT 37

VCCSA_SENSE 48

VSS_AXG_SENSE 42

VCCSA_SELECT1 48VCCSA_SELECT0 48

Title


Date: Sheet of


LA480 SD

CPU (VCC_GFXCORE)A3


<Core Design>

Title


Date: Sheet of


LA480 SD

CPU (VCC_GFXCORE)A3


<Core Design>

Title


Date: Sheet of


LA480 SD

CPU (VCC_GFXCORE)A3


<Core Design>

Routing Guideline:Power from DDR_VREF_S3 and +V_SM_VREF_CNTshould have 10 mils trace width.

Refer to the latest Huron River Mainstream PDG (Doc# 436735) for more details on S3 power reduction implementation.

+V_SM_VREF_CNT should have 10 mil trace width

VCCA:6A

0511-CHECK CAP

PROCESSOR VAXG: 24A 0511-CHECK

VCCPLL:1.2A

VDDQ:5A

+V0.85S - VCCSA - System Agent rail voltage can be[0.9, 0.725, 0.8, 0.675] V for IVB[0.9, 0.8] V for SNB

12

C914

SC

10U6D

3V5K

X-1G

P

C914

SC

10U6D

3V5K

X-1G

P

12

C916

SC

10U6D

3V5K

X-1G

P

C916

SC

10U6D

3V5K

X-1G

P

12

C907

SC

10U6D

3V5K

X-1G

P

C907

SC

10U6D

3V5K

X-1G

P

12

RC901

SC

33P50V

2JN-3G

P

DY

RC901

SC

33P50V

2JN-3G

P

DY

12

C910

SC

10U6D

3V5K

X-1G

P

C910

SC

10U6D

3V5K

X-1G

P

12

C902

SC

10U6D

3V5K

X-1G

P

C902

SC

10U6D

3V5K

X-1G

P

12

C903

SC

10U6D

3V5K

X-1G

P

C903

SC

10U6D

3V5K

X-1G

P

12

C905

SC

10U6D

3V5K

X-1G

P

C905

SC

10U6D

3V5K

X-1G

P

12

C901

SC

10U6D

3V5K

X-1G

P

C901

SC

10U6D

3V5K

X-1G

P

12

C922

SC

1U10V

2KX

-1GP

C922

SC

1U10V

2KX

-1GP

12

C913

SC

10U6D

3V5K

X-1G

P

C913

SC

10U6D

3V5K

X-1G

P

12

C926

SC

10U6D

3V5K

X-1G

P

C926

SC

10U6D

3V5K

X-1G

P

12

C918

SC

10U6D

3V5K

X-1G

P

C918

SC

10U6D

3V5K

X-1G

P

12

C906

SC

10U6D

3V5K

X-1G

P

C906

SC

10U6D

3V5K

X-1G

P

12

RC902

SC

33P50V

2JN-3G

P

DY

RC902

SC

33P50V

2JN-3G

P

DY

12

C921

SC

10U6D

3V5K

X-1G

P

C921

SC

10U6D

3V5K

X-1G

P

12

C917S

C10U

6D3V

5KX

-1GP

C917S

C10U

6D3V

5KX

-1GP

12

C920

SC

10U6D

3V5K

X-1G

P

C920

SC

10U6D

3V5K

X-1G

P

1 234

RN901SRN1KJ-7-GPRN901SRN1KJ-7-GP

12

C915

SC

10U6D

3V5K

X-1G

P

C915

SC

10U6D

3V5K

X-1G

P

SM_VREF AL1

VSSAXG_SENSE AK34VAXG_SENSE AK35VAXGAT24

VAXGAT23

VAXGAT21

VAXGAT20

VAXGAT18

VAXGAT17

VAXGAR24

VAXGAR23

VAXGAR21

VAXGAR20

VAXGAR18

VAXGAR17

VAXGAP24

VAXGAP23

VAXGAP21

VAXGAP20

VAXGAP18

VAXGAP17

VAXGAN24

VAXGAN23

VAXGAN21

VAXGAN20

VAXGAN18

VAXGAN17

VAXGAM24

VAXGAM23

VAXGAM21

VAXGAM20

VAXGAM18

VAXGAM17

VAXGAL24

VAXGAL23

VAXGAL21

VAXGAL20

VAXGAL18

VAXGAL17

VAXGAK24

VAXGAK23

VAXGAK21

VAXGAK20

VAXGAK18

VAXGAK17

VAXGAJ24

VAXGAJ23

VAXGAJ21

VAXGAJ20

VAXGAJ18

VAXGAJ17

VAXGAH24

VAXGAH23

VAXGAH21

VAXGAH20

VAXGAH18

VAXGAH17

VDDQ U4

VDDQ U1

VDDQ P7

VDDQ P4

VDDQ P1

VDDQ AF7

VDDQ AF4

VDDQ AF1

VDDQ AC7

VDDQ AC4

VDDQ AC1

VDDQ Y7

VDDQ Y4

VDDQ Y1

VDDQ U7

VCCPLLB6

VCCPLLA6

VCCSA M27

VCCSA M26

VCCSA L26

VCCSA J26

VCCSA J25

VCCSA J24

VCCSA H26

VCCSA H25

VCCSA_SENSE H23

VCCSA_VID1 C24

VCCPLLA2

FC_C22 C22

POWER

GRAPHICS

DDR3 -1.5V RAILS

SENSE

LINES

1.8V RAIL

SA RAIL

VREF

MISC

7 OF 9

SANDY

CPU1G

SANDY

2nd = 62.10040.77162.10055.421

POWER

GRAPHICS

DDR3 -1.5V RAILS

SENSE

LINES

1.8V RAIL

SA RAIL

VREF

MISC

7 OF 9

SANDY

CPU1G

SANDY

2nd = 62.10040.77162.10055.421

12

C904

SC

10U6D

3V5K

X-1G

P

C904

SC

10U6D

3V5K

X-1G

P

12

C923

SC

10U6D

3V5K

X-1G

P

C923

SC

10U6D

3V5K

X-1G

P

12

R906100R2F-L1-GP-UR906100R2F-L1-GP-U

12

C924

SC

1U10V

2KX

-1GP

C924

SC

1U10V

2KX

-1GP

12

C912

SC

10U6D

3V5K

X-1G

P

C912

SC

10U6D

3V5K

X-1G

P

12

R907100R2F-L1-GP-UR907100R2F-L1-GP-U

12

C919

SC

10U6D

3V5K

X-1G

P

C919

SC

10U6D

3V5K

X-1G

P

12

C909

SC

10U6D

3V5K

X-1G

P

DYC909

SC

10U6D

3V5K

X-1G

P

DY 12

C911

SC

10U6D

3V5K

X-1G

P

C911

SC

10U6D

3V5K

X-1G

P

12

C908

SC

10U6D

3V5K

X-1G

P

C908

SC

10U6D

3V5K

X-1G

P


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


LA480 SD

CPU (VSS)A3


<Core Design>

Title


Date: Sheet of


LA480 SD

CPU (VSS)A3


<Core Design>

Title


Date: Sheet of


LA480 SD

CPU (VSS)A3


<Core Design>

SSID = CPU

VSST35

VSST34

VSST33

VSST32

VSST31

VSST30

VSST29

VSST28

VSST27

VSST26

VSSP9

VSSP8

VSSP6

VSSP5

VSSP3

VSSP2

VSSN35

VSSN34

VSSN33

VSSN32

VSSN31

VSSN30

VSSN29

VSSN28

VSSN27

VSSN26

VSSM34

VSSL33

VSSL30

VSSL27

VSSL9

VSSL8

VSSL6

VSSL5

VSSL4

VSSL3

VSSL2

VSSL1

VSSK35

VSSK32

VSSK29

VSSK26

VSSJ34

VSSJ31

VSSH33

VSSH30

VSSH27

VSSH24

VSSH21

VSSH18

VSSH15

VSSH13

VSSH10

VSSH9

VSSH8

VSSH7

VSSH6

VSSH5

VSSH4

VSSH3

VSSH2

VSSH1

VSSG35

VSSG32

VSSG29

VSSG26

VSSG23

VSSG20

VSSG17

VSSG11

VSSF34

VSSF31

VSSF29

VSS F22

VSS F19

VSS E30

VSS E27

VSS E24

VSS E21

VSS E18

VSS E15

VSS E13

VSS E10

VSS E9

VSS E8

VSS E7

VSS E6

VSS E5

VSS E4

VSS E3

VSS E2

VSS E1

VSS D35

VSS D32

VSS D29

VSS D26

VSS D20

VSS D17

VSS C34

VSS C31

VSS C28

VSS C27

VSS C25

VSS C23

VSS C10

VSS C1

VSS B22

VSS B19

VSS B17

VSS B15

VSS B13

VSS B11

VSS B9

VSS B8

VSS B7

VSS B5

VSS B3

VSS B2

VSS A35

VSS A32

VSS A29

VSS A26

VSS A23

VSS A20

VSS A3

VSS

9 OF 9

SANDY

CPU1I

SANDY62.10055.4212nd = 62.10040.771

VSS

9 OF 9

SANDY

CPU1I

SANDY62.10055.4212nd = 62.10040.771

VSSAT35

VSSAT32

VSSAT29

VSSAT27

VSSAT25

VSSAT22

VSSAT19

VSSAT16

VSSAT13

VSSAT10

VSSAT7

VSSAT4

VSSAT3

VSSAR25

VSSAR22

VSSAR19

VSSAR16

VSSAR13

VSSAR10

VSSAR7

VSSAR4

VSSAR2

VSSAP34

VSSAP31

VSSAP28

VSSAP25

VSSAP22

VSSAP19

VSSAP16

VSSAP13

VSSAP10

VSSAP7

VSSAP4

VSSAP1

VSSAN30

VSSAN27

VSSAN25

VSSAN22

VSSAN19

VSSAN16

VSSAN13

VSSAN10

VSSAN7

VSSAN4

VSSAM29

VSSAM25

VSSAM22

VSSAM19

VSSAM16

VSSAM13

VSSAM10

VSSAM7

VSSAM4

VSSAM3

VSSAM2

VSSAM1

VSSAL34

VSSAL31

VSSAL28

VSSAL25

VSSAL22

VSSAL19

VSSAL16

VSSAL13

VSSAL10

VSSAL7

VSSAL4

VSSAL2

VSSAK33

VSSAK30

VSSAK27

VSSAK25

VSSAK22

VSSAK19

VSSAK16

VSSAK13

VSSAK10

VSSAK7

VSSAK4

VSSAJ25

VSS AJ22

VSS AJ19

VSS AJ16

VSS AJ13

VSS AJ10

VSS AJ7

VSS AJ4

VSS AJ3

VSS AJ2

VSS AJ1

VSS AH35

VSS AH34

VSS AH32

VSS AH30

VSS AH29

VSS AH28

VSS AH26

VSS AH25

VSS AH22

VSS AH19

VSS AH16

VSS AH7

VSS AH4

VSS AG9

VSS AG8

VSS AG4

VSS AF6

VSS AF5

VSS AF3

VSS AF2

VSS AE35

VSS AE34

VSS AE33

VSS AE32

VSS AE31

VSS AE30

VSS AE29

VSS AE28

VSS AE27

VSS AE26

VSS AE9

VSS AD7

VSS AC9

VSS AC8

VSS AC6

VSS AC5

VSS AC3

VSS AC2

VSS AB35

VSS AB34

VSS AB33

VSS AB32

VSS AB31

VSS AB30

VSS AB29

VSS AB28

VSS AB27

VSS AB26

VSS Y9

VSS Y8

VSS Y6

VSS Y5

VSS Y3

VSS Y2

VSS W35

VSS W34

VSS W33

VSS W32

VSS W31

VSS W30

VSS W29

VSS W28

VSS W27

VSS W26

VSS U9

VSS U8

VSS U6

VSS U5

VSS U3

VSS U2

VSS

8 OF 9

SANDY

CPU1H

SANDY62.10055.4212nd = 62.10040.771

VSS

8 OF 9

SANDY

CPU1H

SANDY62.10055.4212nd = 62.10040.771


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of

LA480 SD

<Title>


A4


<Core Design>

Title


Date: Sheet of

LA480 SD

<Title>


A4


<Core Design>

Title


Date: Sheet of

LA480 SD

<Title>


A4


<Core Design>

BLANK


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

+V_V

RE

F_P

AT

H1

+V_VREF_PATH2

+V_V

RE

F_P

AT

H3

DDR_WR_VREF01_D1DDR_WR_VREF01_B4

DDR_WR_VREF01_B4

DDR_WR_VREF01_D1

M_VREF_DQ_DIMM0

M_VREF_DQ_DIMM1

M_VREF_CA_DIMM0

M_VREF_CA_DIMM1

DDR_VREF_S3DDR_VREF_S3

DDR_VREF_S3 DDR_VREF_S3

DDR_WR_VREF017

DRAMRST_CNTRL_PCH20,37

DDR_WR_VREF027

DRAMRST_CNTRL_PCH20,37

+V_SM_VREF 37

Title


Date: Sheet of


LA480 SD

M3A3


<Core Design>

Title


Date: Sheet of


LA480 SD

M3A3


<Core Design>

Title


Date: Sheet of


LA480 SD

M3A3


<Core Design>

SODDIM0

SODDIM1

VREF circuit -M1 (Voltage Driver Network) & M3 (Driven by Processor) Implementation

Driven by process (PIN#B4) Driven by process (PIN#D1)

SA_DIMM_VREFDQ SB_DIMM_VREFDQ

CAD Note: All VREF traces should have 20:20 mil tra ce geometry. Note that while 20 mil trace width is optimal, short violations is acceptable ifrequired due to tight routing constraints.

CLOSE PIN1

CLOSE PINCLOSE PIN

CLOSE PIN

12

R12090R2J-2-GP

DY

R12090R2J-2-GP

DY

G

S

D

U1201

2N7002K-2-GP84.2N702.J31

2ND = 84.2N702.031

U1201

2N7002K-2-GP84.2N702.J31

2ND = 84.2N702.031

12

R12320R0402-PAD

R12320R0402-PAD

12

R12170R0402-PADR12170R0402-PAD

1 2R12070R0402-PADR12070R0402-PAD

12

R12040R0402-PADR12040R0402-PAD

12

R12250R2J-2-GP

DY

R12250R2J-2-GP

DY

G

S

D

U1202

2N7002K-2-GP84.2N702.J31

2ND = 84.2N702.031

U1202

2N7002K-2-GP84.2N702.J31

2ND = 84.2N702.031

12

C1203SCD1U10V2KX-4GPC1203SCD1U10V2KX-4GP

12

R12210R0402-PADR12210R0402-PAD

12

R12271KR2F-3-GP DY

R12271KR2F-3-GP DY

1 2R1226 0R2J-2-GP

DYR1226 0R2J-2-GP

DY

12

C1202SCD1U10V2KX-4GPC1202

SCD1U10V2KX-4GP

1 2R12160R2J-2-GP

DYR12160R2J-2-GP

DY

1 2R12190R2J-2-GP

DYR12190R2J-2-GP

DY

12

R12100R0402-PADR12100R0402-PAD

1 2R12030R0402-PADR12030R0402-PAD

12


1 2R1208 0R2J-2-GP

DYR1208 0R2J-2-GP

DY

1 2R12220R0402-PADR12220R0402-PAD

12

R12281KR2F-3-GP DY

R12281KR2F-3-GP DY

12

C1201SCD1U10V2KX-4GPC1201

SCD1U10V2KX-4GP

12

R12180R0402-PADR12180R0402-PAD


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of

LA480 SD

<Title>


A4


<Core Design>

Title


Date: Sheet of

LA480 SD

<Title>


A4


<Core Design>

Title


Date: Sheet of

LA480 SD

<Title>


A4


<Core Design>

BLANK


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

M_A_A1

M_A_DQS#0



M_A_DQS3

M_A_DQ0

M_A_DQS#5

M_A_A2

SA0_DIM0

SA0_DIM0



M_A_DQS4

M_A_A3

M_A_DQS#6



SA1_DIM0

M_A_DQ1

M_A_A4

M_A_DQS5

M_A_DQS#7



M_A_DQS#1

M_A_A5

M_A_DQ2

SA1_DIM0

M_A_DQS6


M_A_DQS0


M_A_A7M_A_A8M_A_A9M_A_A10M_A_A11

M_A_A6

M_A_DQ3

M_A_DQS#2

M_A_DQS7



M_A_DQS1

M_A_A13M_A_A14M_A_A15

M_A_A12


M_A_DQS#3

M_A_A0


M_A_DQ8

TS#_DIMM0_1

M_A_DQ9M_A_DQ10M_A_DQ11

M_A_DQS2

M_A_DQS#4

1D5V_S3

1D5V_S3

3D3V_S0

0D75V_S0

0D75V_S0

3D3V_S0

M_VREF_CA_DIMM0M_VREF_DQ_DIMM0

M_A_RAS# 6M_A_WE# 6M_A_CAS# 6

M_A_DIM0_CS#0 6M_A_DIM0_CS#1 6

M_A_DIM0_CKE0 6M_A_DIM0_CKE1 6



PCH_SMBDATA 15,20,65,66PCH_SMBCLK 15,20,65,66

TS#_DIMM0_1 15

M_A_DQ[63:0]6

M_A_BS26

M_A_BS06M_A_BS16

M_A_DQS#[7:0] 6

M_A_DQS[7:0] 6

M_A_DIM0_ODT06M_A_DIM0_ODT16

DDR3_DRAMRST#15,37

M_A_A[15:0] 6

Title


Date: Sheet of


LA480 SD

DDR3-SODIMM1A2


<Core Design>

Title


Date: Sheet of


LA480 SD

DDR3-SODIMM1A2


<Core Design>

Title


Date: Sheet of


LA480 SD

DDR3-SODIMM1A2


<Core Design>

Note:If SA0 DIM0 = 0, SA1_DIM0 = 0SO-DIMMA SPD Address is 0xA0SO-DIMMA TS Address is 0x30

If SA0 DIM0 = 1, SA1_DIM0 = 0SO-DIMMA SPD Address is 0xA2SO-DIMMA TS Address is 0x32

SSID = MEMORY

Thermal EVENT

Place these capsclose to VTT1 andVTT2.

SODIMM A DECOUPLING

Layout Note:Place these Caps nearSO-DIMMB.

0511-CHECK

(H=8mm)

12

C1419

SC

1U6D

3V2K

X-G

P

C1419

SC

1U6D

3V2K

X-G

P

12

C1405

SC

10U10V

5ZY-1G

P

DY

C1405

SC

10U10V

5ZY-1G

P

DY

12

C1408

SC

10U10V

5ZY-1G

P

DY

C1408

SC

10U10V

5ZY-1G

P

DY

NP1 NP1

NP2 NP2

RAS# 110

WE# 113

CAS# 115

CS0# 114

CS1# 121

CKE0 73

CKE1 74

CK0 101

CK0# 103

CK1 102

CK1# 104

DM0 11

DM1 28

DM2 46

DM3 63

DM4 136

DM5 153

DM6 170

DM7 187

SDA 200

SCL 202

EVENT# 198

VDDSPD 199

SA0 197

SA1 201

NC#77 77

NC#122 122

NC#125/TEST 125

VDD 75

VDD 76

VDD 81

VDD 82

VDD 87

VDD 88

VDD 93

VDD 94

VDD 99

VDD 100

VDD 105

VDD 106

VDD 111

VDD 112

VDD 117

VDD 118

VDD 123

VDD 124

VSS 2

VSS 3

VSS 8

VSS 9

VSS 13

VSS 14

VSS 19

VSS 20

VSS 25

VSS 26

VSS 31

VSS 32

VSS 37

VSS 38

VSS 43

VSS 44

VSS 48

VSS 49

VSS 54

VSS 55

VSS 60

VSS 61

VSS 65

VSS 66

VSS 71

VSS 72

VSS 127

VSS 128

VSS 133

VSS 134

VSS 138

VSS 139

VSS 144

VSS 145

VSS 150

VSS 151

VSS 155

VSS 156

VSS 161

VSS 162

VSS 167

VSS 168

VSS 172

VSS 173

VSS 178

VSS 179

VSS 184

VSS 185

VSS 189

VSS 190

VSS 195

VSS 196

VSS 205

VSS 206

A098

A197

A296

A395

A492

A591

A690

A786

A889

A985

A10/AP107

A1184

A1283

A13119

A1480

A1578

A16/BA279

BA0109

BA1108

DQ05

DQ17

DQ215

DQ317

DQ44

DQ56

DQ616

DQ718

DQ821

DQ923

DQ1033

DQ1135

DQ1222

DQ1324

DQ1434

DQ1536

DQ1639

DQ1741

DQ1851

DQ1953

DQ2040

DQ2142

DQ2250

DQ2352

DQ2457

DQ2559

DQ2667

DQ2769

DQ2856

DQ2958

DQ3068

DQ3170

DQ32129

DQ33131

DQ34141

DQ35143

DQ36130

DQ37132

DQ38140

DQ39142

DQ40147

DQ41149

DQ42157

DQ43159

DQ44146

DQ45148

DQ46158

DQ47160

DQ48163

DQ49165

DQ50175

DQ51177

DQ52164

DQ53166

DQ54174

DQ55176

DQ56181

DQ57183

DQ58191

DQ59193

DQ60180

DQ61182

DQ62192

DQ63194

DQS0#10

DQS1#27

DQS2#45

DQS3#62

DQS4#135

DQS5#152

DQS6#169

DQS7#186

DQS012

DQS129

DQS247

DQS364

DQS4137

DQS5154

DQS6171

DQS7188

ODT0116

ODT1120

VREF_CA126

VREF_DQ1

RESET#30

VTT1203

VTT2204

DIMM1

DDR3-204P-96-GP-U162.10017.V61

3RD = *62.10017.V612ND = *62.10017.X51

DIMM1

DDR3-204P-96-GP-U162.10017.V61

3RD = *62.10017.V612ND = *62.10017.X51

12

R140210KR2J-3-GP

R140210KR2J-3-GP

12

C1422

SC

1U6D

3V2K

X-G

P

DY

C1422

SC

1U6D

3V2K

X-G

P

DY

12

C1417

SC

D1U

10V2K

X-5G

P

C1417

SC

D1U

10V2K

X-5G

P

12

C1409

SC

10U6D

3V5K

X-1G

P

DY

C1409

SC

10U6D

3V5K

X-1G

P

DY

12

C1416

SC

D1U

10V2K

X-5G

P

C1416

SC

D1U

10V2K

X-5G

P

12

TC1401

ST330U

2VD

M-4-G

P

DY

TC1401

ST330U

2VD

M-4-G

P

DY

12

C1415

SC

D1U

10V2K

X-5G

P

C1415

SC

D1U

10V2K

X-5G

P

12

C1404

SC

10U6D

3V5K

X-1G

P

C1404

SC

10U6D

3V5K

X-1G

P

12

C1410

SC

10U6D

3V5K

X-1G

P

DY

C1410

SC

10U6D

3V5K

X-1G

P

DY

12

C1401SCD1U10V2KX-5GP


1 2R140310KR2J-3-GPR140310KR2J-3-GP

12

C1421

SC

1U6D

3V2K

X-G

P

C1421

SC

1U6D

3V2K

X-G

P

12

C1407

SC

10U6D

3V5K

X-1G

P

C1407

SC

10U6D

3V5K

X-1G

P

12

C1418

SC

10U6D

3V5K

X-1G

P

DY

C1418

SC

10U6D

3V5K

X-1G

P

DY

12

C1414

SC

D1U

10V2K

X-5G

P

C1414

SC

D1U

10V2K

X-5G

P

12

C1402SC2D2U10V3KX-1GP

DY


DY

12

R140110KR2J-3-GP

R140110KR2J-3-GP

12

C1420

SC

1U6D

3V2K

X-G

P

DY

C1420

SC

1U6D

3V2K

X-G

P

DY

12

C1406

SC

10U6D

3V5K

X-1G

P

C1406

SC

10U6D

3V5K

X-1G

P

12

C1403

SC

10U6D

3V5K

X-1G

P

C1403

SC

10U6D

3V5K

X-1G

P


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

M_B_A1

M_B_DQ42M_B_DQ41M_B_DQ40

M_B_DQS#0

M_B_DQ43


M_B_DQ15

M_B_DQS3

M_B_DQ0

M_B_A2

M_B_DQS#5

SA0_DIM1

SA1_DIM1


M_B_DQ47


M_B_DQS4

M_B_A3

M_B_DQS#6



SA1_DIM1

M_B_DQ1

M_B_A4

M_B_DQS5

M_B_DQS#7

M_B_DQ53M_B_DQ52

M_B_DQ24

M_B_DQ55M_B_DQ54


M_B_DQS#1

SA0_DIM1

M_B_DQ2

M_B_A5

M_B_DQS6

M_B_DQ57M_B_DQ56

M_B_DQS0

M_B_DQ59M_B_DQ58


M_B_A7M_B_A6

M_B_A11M_B_A10M_B_A9M_B_A8

M_B_DQ3

M_B_DQS#2

M_B_DQS7


M_B_DQ33M_B_DQ32

M_B_DQ35M_B_DQ34

M_B_DQS1

M_B_A12

M_B_A15M_B_A14M_B_A13

M_B_DQ5M_B_DQ4

M_B_DQ7M_B_DQ6

M_B_DQS#3

M_B_A0


M_B_DQ8


M_B_DQS2

M_B_DQS#4

0D75V_S0

M_VREF_CA_DIMM1M_VREF_DQ_DIMM1

3D3V_S0

1D5V_S3

3D3V_S0

1D5V_S3

0D75V_S0

M_B_A[15:0] 6

M_B_BS26

M_B_BS06M_B_BS16

M_B_DQ[63:0]6

M_B_DQS#[7:0] 6

M_B_DQS[7:0] 6

M_B_DIM0_ODT06M_B_DIM0_ODT16

DDR3_DRAMRST#14,37

M_B_CAS# 6

M_B_DIM0_CS#0 6M_B_DIM0_CS#1 6

M_B_DIM0_CKE0 6M_B_DIM0_CKE1 6



M_B_RAS# 6M_B_WE# 6

PCH_SMBDATA 14,20,65,66PCH_SMBCLK 14,20,65,66

TS#_DIMM0_1 14

Title


Date: Sheet of


LA480 SD

DDR3-SODIMM2A2


<Core Design>

Title


Date: Sheet of


LA480 SD

DDR3-SODIMM2A2


<Core Design>

Title


Date: Sheet of


LA480 SD

DDR3-SODIMM2A2


<Core Design>

SODIMM B DECOUPLING

Note:SO-DIMMB SPD Address is 0xA4SO-DIMMB TS Address is 0x34

SO-DIMMB is placed farther fromthe Processor than SO-DIMMA

SSID = MEMORY

Place these capsclose to VTT1 andVTT2.

(H=4mm)

0511-CHECK

62.10017.X413RD:62.10017.V51

A098

A197

A296

A395

A492

A591

A690

A786

A889

A985

A10/AP107

A1184

A1283

A13119

A1480

A1578

A16/BA279

BA0109

BA1108

DQ05

DQ17

DQ215

DQ317

DQ44

DQ56

DQ616

DQ718

DQ821

DQ923

DQ1033

DQ1135

DQ1222

DQ1324

DQ1434

DQ1536

DQ1639

DQ1741

DQ1851

DQ1953

DQ2040

DQ2142

DQ2250

DQ2352

DQ2457

DQ2559

DQ2667

DQ2769

DQ2856

DQ2958

DQ3068

DQ3170

DQ32129

DQ33131

DQ34141

DQ35143

DQ36130

DQ37132

DQ38140

DQ39142

DQ40147

DQ41149

DQ42157

DQ43159

DQ44146

DQ45148

DQ46158

DQ47160

DQ48163

DQ49165

DQ50175

DQ51177

DQ52164

DQ53166

DQ54174

DQ55176

DQ56181

DQ57183

DQ58191

DQ59193

DQ60180

DQ61182

DQ62192

DQ63194

DQS0#10

DQS1#27

DQS2#45

DQS3#62

DQS4#135

DQS5#152

DQS6#169

DQS7#186

DQS012

DQS129

DQS247

DQS364

DQS4137

DQS5154

DQS6171

DQS7188

ODT0116

ODT1120

VREF_DQ1

VSS 2

NP1 NP1

NP2 NP2

RAS# 110

WE# 113

CAS# 115

CS0# 114

CS1# 121

CKE0 73

CKE1 74

CK0 101

CK0# 103

CK1 102

CK1# 104

DM0 11

DM1 28

DM2 46

DM3 63

DM4 136

DM5 153

DM6 170

DM7 187

SDA 200

SCL 202

VDDSPD 199

SA0 197

SA1 201

VREF_CA126

VDD18 124

NC#1 77

NC#2 122

NC#/TEST 125

VDD3 81

VDD4 82

VDD5 87

VDD6 88

VDD7 93

VDD8 94

VDD9 99

VDD10 100

VDD13 111

VDD14 112

VDD15 117

VDD16 118

VSS 3

VSS 8

VSS 9

VSS 13

VSS 14

VSS 19

VSS 20

VSS 25

VSS 26

VSS 31

VSS 32

VSS 37

VSS 38

VSS 43

VSS 44

VSS 48

VSS 49

VSS 54

VSS 55

VSS 60

VSS 61

VDD1 75

VSS 65

VSS 66

VSS 71

VSS 72

VDD2 76

VDD11 105

VDD12 106

VDD17 123

VSS 127

VSS 128

VSS 134VSS 133

VSS 138

VSS 139

VSS 144

VSS 145

VSS 151VSS 150

VSS 155

VSS 156

VSS 161

VSS 162

VSS 167

VSS 168

VSS 173VSS 172

VSS 179VSS 178

VSS 185VSS 184

VSS 189

VSS 190

VSS 195

VSS 196

RESET#30

EVENT# 198

VSS 205

VSS 206VTT1203

VTT2204

DIMM2

DDR3-204P-144-GP-U162.10024.G21

3rd = *62.10017.V512nd = *62.10017.X41

DIMM2

DDR3-204P-144-GP-U162.10024.G21

3rd = *62.10017.V512nd = *62.10017.X41

12

C1512

SC

D1U

10V2K

X-5G

P

C1512

SC

D1U

10V2K

X-5G

P

12

C1514

SC

D1U

10V2K

X-5G

P

C1514

SC

D1U

10V2K

X-5G

P

12

C1504

SC

10U10V

5ZY-1G

P

DY

C1504

SC

10U10V

5ZY-1G

P

DY

12

C1520

SC

1U6D

3V2K

X-G

P

DY

C1520

SC

1U6D

3V2K

X-G

P

DY

12

C1505

SC

10U6D

3V5K

X-1G

P

C1505

SC

10U6D

3V5K

X-1G

P

12

C1508

SC

10U10V

5ZY-1G

P

DY

C1508

SC

10U10V

5ZY-1G

P

DY

12

C1506

SC

10U6D

3V5K

X-1G

P

C1506

SC

10U6D

3V5K

X-1G

P

12

R150210KR2J-3-GP

R150210KR2J-3-GP

12

C1511

SC

D1U

10V2K

X-5G

P

C1511

SC

D1U

10V2K

X-5G

P

12

C1518

SC

1U6D

3V2K

X-G

P

DY

C1518

SC

1U6D

3V2K

X-G

P

DY

12

C1507

SC

10U6D

3V5K

X-1G

P

C1507

SC

10U6D

3V5K

X-1G

P

12

C1519

SC

1U6D

3V2K

X-G

P

C1519

SC

1U6D

3V2K

X-G

P

12



12

C1513

SC

D1U

10V2K

X-5G

P

C1513

SC

D1U

10V2K

X-5G

P

12

C1510

SC

10U6D

3V5K

X-1G

P

DY

C1510

SC

10U6D

3V5K

X-1G

P

DY

12

C1503

SC

10U10V

5ZY-1G

P

DY

C1503

SC

10U10V

5ZY-1G

P

DY

12

R150110KR2J-3-GP

R150110KR2J-3-GP1

2

C1502SC2D2U10V3KX-1GPDYC1502SC2D2U10V3KX-1GPDY

12

C1521

SC

1U6D

3V2K

X-G

P

C1521

SC

1U6D

3V2K

X-G

P

12

C1509

SC

10U6D

3V5K

X-1G

P

C1509

SC

10U6D

3V5K

X-1G

P


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


LA480 SD

DDR3-SODIMM2A4


<Core Design>

Title


Date: Sheet of


LA480 SD

DDR3-SODIMM2A4


<Core Design>

Title


Date: Sheet of


LA480 SD

DDR3-SODIMM2A4


<Core Design>

BLANK


A

A

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1

CRT_BLUE

CRT_REDCRT_GREEN

CRT_BLUECRT_RED

LVDS_IBG

DAC_IREF_R

LVDS_VDD_EN LVDS_VREFHLVDS_VREFL

L_CTRL_DATA

L_CTRL_DATAL_CTRL_CLK

L_BKLT_EN

L_CTRL_CLK

CRT_GREEN

3D3V_S0

3D3V_S0

PCH_HDMI_CLK 51PCH_HDMI_DATA 51

CRT_DDC_CLK50CRT_DDC_DATA50

L_BKLT_EN49LVDS_VDD_EN49

L_BKLT_CTRL49

LVDS_DDC_CLK_R49LVDS_DDC_DATA_R49

LVDSA_CLK#49LVDSA_CLK49

LVDSA_DATA0#49LVDSA_DATA1#49LVDSA_DATA2#49

LVDSA_DATA049LVDSA_DATA149LVDSA_DATA249

CRT_BLUE50CRT_GREEN50CRT_RED50

CRT_HSYNC50CRT_VSYNC50

HDMI_DATA2_R# 51HDMI_DATA2_R 51HDMI_DATA1_R# 51HDMI_DATA1_R 51HDMI_DATA0_R# 51HDMI_DATA0_R 51HDMI_CLK_R# 51HDMI_CLK_R 51

HDMI_PCH_DET 51

Title


Date: Sheet of


LA480 SD

PCH : LVDS/CRT/DDIA3


<Core Design>

Title


Date: Sheet of


LA480 SD



<Core Design>

Title


Date: Sheet of


LA480 SD



<Core Design>

DDI Port B Detect:(SDVO_CTRL_ DATA)1: Port B detected0: Port B not detected

L_DDC_DATA(K47):This signal is on the LVDS interface.This signal needs to be left NC if eDP is used for the local flat panel display

Close to PCH

Close to PCH

Notes:1K 0.5% 0402

HDMI

0511-CHECK 0511-CHECK

DDPB_[0]P DDPB_[0]N DDPB_[1]P DDPB_[1]N DDPB_[2]P DDPB_[2]N DDPB_[3]P DDPB_[3]N DDPB_AUXP DDPB_AUXN DDPB_HPD SDVO_CTRLCLK SDVO_CTRLDATA

TMDSB_DATA2TMDSB_DATA2#TMDSB_DATA1TMDSB_DATA1#TMDSB_DATA0TMDSB_DATA0#TMDSB_CLKTMDSB_CLK#NANAHDMIB_HPDHDMIB_CTRLCLKHDMIB_CTRLDATA

DDI PCH Pin Names

HDMI/DVIMappingPORT

PORT-B

The recommended value for this external resistor is 1.0 k ±0.5%. The CRT DAC outputs may bemeasured when the display is completely white. If C RT DAC signal voltage value is between 665mV to 770 mV, then the video level is within VESA s pecification and the reference resistorvalue is optimal for the motherboard design.

Close to PCH and keep 20milaway from other signal.

12

EC1702

SC

D1U

50V3K

X-G

P

DY

EC1702

SC

D1U

50V3K

X-G

P

DY

12

EC1701

SC

D1U

50V3K

X-G

P

DY

EC1701

SC

D1U

50V3K

X-G

P

DY

12345 6 7 8

RN1705SRN150F-1-GP

RN1705SRN150F-1-GP

12

R17021KR2D-1-GP

R17021KR2D-1-GP

12

EC1703

SC

D1U

50V3K

X-G

P

DY

EC1703

SC

D1U

50V3K

X-G

P

DY

12 3

4

RN1701

SRN2K2J-1-GP

RN1701

SRN2K2J-1-GP

12

R17012K37R2F-GPR17012K37R2F-GP 1

2 34

RN1704

SRN0J-6-GP

RN1704

SRN0J-6-GP

123 4

RN1706SRN2K2J-1-GP

RN1706SRN2K2J-1-GP

L_BKLTCTLP45

L_BKLTENJ47

L_CTRL_CLKT45

L_CTRL_DATAP39

L_DDC_CLKT40

L_DDC_DATAK47

L_VDD_ENM45

LVDSA_CLK#AK39

LVDSA_CLKAK40

LVDSA_DATA#0AN48

LVDSA_DATA#1AM47

LVDSA_DATA#2AK47

LVDSA_DATA#3AJ48

LVDSA_DATA0AN47

LVDSA_DATA1AM49

LVDSA_DATA2AK49

LVDSA_DATA3AJ47

LVDSB_CLK#AF40

LVDSB_CLKAF39

LVDSB_DATA#0AH45

LVDSB_DATA#1AH47

LVDSB_DATA#2AF49

LVDSB_DATA#3AF45

LVDSB_DATA0AH43

DDPB_0N AV42

DDPB_1N AV45

LVD_VREFHAE48

LVD_VREFLAE47

DDPD_2N BF42

DDPD_3N BJ42

DDPB_2N AU48

DDPB_3N AV47

DDPC_0N AY47

DDPC_1N AY43

DDPC_2N BA47

DDPC_3N BB47

DDPD_0N BB43

DDPD_1N BF44

DDPB_0P AV40

DDPB_1P AV46

DDPD_2P BE42

DDPD_3P BG42

DDPB_2P AU47

DDPB_3P AV49

LVDSB_DATA1AH49

LVDSB_DATA2AF47

LVDSB_DATA3AF43

LVD_IBGAF37

LVD_VBGAF36

DDPC_1P AY45

DDPC_0P AY49

DDPC_2P BA48

DDPC_3P BB49

DDPD_0P BB45

DDPD_1P BE44

CRT_BLUEN48

CRT_DDC_CLKT39

CRT_DDC_DATAM40

CRT_GREENP49

CRT_HSYNCM47

CRT_IRTNT42

CRT_REDT49

CRT_VSYNCM49

DAC_IREFT43

SDVO_CTRLCLK P38

SDVO_CTRLDATA M39

DDPC_CTRLCLK P46

DDPC_CTRLDATA P42

DDPD_CTRLCLK M43

DDPD_CTRLDATA M36

DDPB_AUXN AT49

DDPC_AUXN AP47

DDPD_AUXN AT45

DDPB_AUXP AT47

DDPC_AUXP AP49

DDPD_AUXP AT43

DDPB_HPD AT40

DDPC_HPD AT38

DDPD_HPD BH41

SDVO_TVCLKINP AP45SDVO_TVCLKINN AP43

SDVO_STALLP AM40SDVO_STALLN AM42

SDVO_INTP AP40SDVO_INTN AP39

LV

DS

Dig

ital D

isp

lay

Inte

rfa

ce

CR

T

4 OF 10PCH1D

PANTHER-GP-NF

LV

DS

Dig

ital D

isp

lay

Inte

rfa

ce

CR

T

4 OF 10PCH1D

PANTHER-GP-NF

12 3

4

RN1702

SRN100KJ-6-GP

RN1702

SRN100KJ-6-GP


A

A

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1

DGPU_HOLD_RST#

INT_PIRQF#INT_PIRQB#

BBS_BIT1

CLK_PCI_LPC_R

INT_PIRQF#

INT_PIRQH#

CLK_PCI_FB_RCLK_PCI_KBC_R

BBS_BIT1

INT_PIRQB#INT_PIRQC#INT_PIRQD#

INT_PIRQA#

DGPU_PWM_SELECT#

PCI_PLTRST#

PCI_GNT3#

PCI_PME#

DGPU_PWR_EN#

USB_OC#8_9USB_OC#6_7

USB_RBIAS

USB_OC#12_13

USB_PP0USB_PN0

USB_OC#10_11USB_OC#0_1PCI_PLTRST#

DGPU_HOLD_RST#

NV_ALE

PCI_GNT3#

USB_OC#4_5

USB_OC#2_3

INT_PIRQG#

LCD_DET#INT_PIRQC#INT_PIRQA#

INT_PIRQD#

INT_PIRQG#

USB_OC#0_1USB_OC#2_3USB_OC#4_5USB_OC#6_7USB_OC#8_9USB_OC#10_11USB_OC#12_13PCH_GPIO14

DGPU_SELECT#

INT_PIRQH#

DGPU_PWR_EN#

PCH_GPIO14

NV_RCOMP

DGPU_PWM_SELECT#

3D3V_S5

3D3V_S5

3D3V_S0

3D3V_S0

3D3V_S0

3D3V_S0

3D3V_S0

USB_PP8 66

USB_PN12 49USB_PP12 49

USB_PP5 82USB_PN5 82



USB_PN8 66


USB_PP10 64USB_PN10 64USB_PP9 82USB_PN9 82


USB3_RX1_N62

USB3_RX1_P62

DGPU_HOLD_RST#83

DGPU_PWR_EN#93

CLK_PCI_LPC65,71CLK_PCI_FB20CLK_PCI_KBC27

PLT_RST#5,27,31,36,65,66,71,80,82,83,97

SATA_ODD_DA#27,56

USB3_TX1_N62

USB3_TX1_P62

USB_OC#0_1 62USB_OC#2_3 61

BBS_BIT0 21

USB_OC#4_5 62


USB3_RX3_N62

USB3_RX3_P62

USB3_TX3_N62

USB3_TX3_P62

USB_OC#8_9 82

LCD_DET#49

Title


Date: Sheet of


LA480 SD

PCH : PCI/USB/NVRAM/RSVDA2


<Core Design>

Title


Date: Sheet of


LA480 SD



<Core Design>

Title


Date: Sheet of


LA480 SD



<Core Design>

Reserved 01

11

BOOT BIOS Strap

GNT1#/GPIO51 BOOT BIOS LocationSATA1GP/GPIO19

0 1 Reserved

SPI(Default)

SSID = PCH

0 0 LPC

A16 swap override Strap/Top-BlockSwap Override jumper

PCI_GNT#3 Low = A16 swapoverride/Top-BlockSwap Override enabledHigh = Default

Utilize Port 9 for USB debug

OC[3:0]# for Device 29 (Ports 0-7)OC[7:4]# for Device 26 (Ports 8-13)

For PPT USB3.0 feature

USB 2.0 Overcurrent Pin Default Usage

OC0# OC1# OC2# OC3#

Pin

Port 0, Port 1 Port 2, Port 3 Port 4, Port 5 Port 6, Port 7

Default Port Mapping

OC4#OC5#OC6#OC7#

Pin

Port 8, Port 9Port 10, Port 11Port 12, Port 13Not Used

Default Port Mapping

Reserve Buffer or not?

Gx8 USB Table

13

12

X

Mini Card1 (WLAN)

USB2.0, ext port4

X

X

USB2.0, ext. port 3

10

0

11

USB3.0, ext port1

Pair

4

5

2

3

1

Device

6

7

8

9

USB3.0, ext port2

CARD READER

Finger Print

CAMERA

Bluetooth

X

3G

USB3.0 ext port 2

USB3.0 ext port 1

USB2.0 ext port 4

Mini Card2 (WWAN)

CARD READER

CAMERA

Mini Card1 (WLAN)

USB2.0 ext port 3

Fingerprint

BLUETOOTH

12345 6

78910

RN1801

SRN8K2J-2-GP-U

RN1801

SRN8K2J-2-GP-U

1 TP1812TP1812

12R1801

4K7R2J-2-GPDY R1801

4K7R2J-2-GPDY

1 2R1819 10KR2J-3-GPR1819 10KR2J-3-GP

12 R1818

8K2R2J-3-GP

DY

R18188K2R2J-3-GP

DY

1 2R181122D6R2F-L1-GPR181122D6R2F-L1-GP

1TP1813TP1813

12

R1816100KR2J-1-GP

DY

R1816100KR2J-1-GP

DY

1 TP1814TP1814

1 TP1819TP1819

1 2R18070R2J-2-GPR18070R2J-2-GP

1 TP1820TP1820

12

R181410KR2F-2-GPDY

R181410KR2F-2-GPDY

RSVD23 AV5

RSVD1 AY7

RSVD2 AV7

RSVD3 AU3

RSVD4 BG4

RSVD5 AT10

RSVD6 BC8

RSVD7 AU2

RSVD8 AT4

RSVD17 BB5

RSVD18 BB3

RSVD19 BB7

RSVD20 BE8

RSVD21 BD4

RSVD22 BF6

RSVD9 AT3

RSVD10 AT1

RSVD11 AY3

RSVD12 AT5

RSVD13 AV3

RSVD14 AV1

RSVD15 BB1

RSVD16 BA3

RSVD25 AT8

RSVD24 AV10

RSVD26 AY5

RSVD27 BA2

RSVD28 AT12

RSVD29 BF3

PIRQA#K40

PIRQB#K38

PIRQC#H38

PIRQD#G38

REQ1#/GPIO50C46

REQ2#/GPIO52C44

REQ3#/GPIO54E40

GNT1#/GPIO51D47

GNT2#/GPIO53E42

GNT3#/GPIO55F46

PIRQE#/GPIO2G42

PIRQF#/GPIO3G40

PIRQG#/GPIO4C42

PIRQH#/GPIO5D44

USBP0N C24

USBP0P A24

USBP1N C25

USBP1P B25

USBP2N C26

USBP2P A26

USBP3N K28

USBP3P H28

USBP4N E28

USBP4P D28

USBP5N C28

USBP5P A28

USBP6N C29

USBP6P B29

USBP7N N28

USBP7P M28

USBP8N L30

USBP8P K30

USBP9N G30

USBP9P E30

USBP10N C30

USBP10P A30

USBP11N L32

USBP11P K32

USBP12N G32

USBP12P E32

USBP13N C32

USBP13P A32

PME#K10

CLKOUT_PCI0H49

CLKOUT_PCI1H43

CLKOUT_PCI2J48

USBRBIAS# C33

USBRBIAS B33

OC0#/GPIO59 A14

OC1#/GPIO40 K20

OC2#/GPIO41 B17

OC3#/GPIO42 C16

OC4#/GPIO43 L16

OC5#/GPIO9 A16

OC6#/GPIO10 D14

OC7#/GPIO14 C14CLKOUT_PCI4H40 CLKOUT_PCI3K42

PLTRST#C6

TP1BG26

TP2BJ26

TP3BH25

TP6AH38

TP7AH37

TP8AK43

TP9AK45

TP16Y13

TP17K24

TP18L24

TP19AB46

TP20AB45

TP21B21

TP22M20

TP23AY16

USB3RN1BE28

USB3RN2BC30

USB3RN3BE32

USB3RN4BJ32

USB3RP1BC28

USB3RP2BE30

USB3RP3BF32

USB3RP4BG32

USB3TN1AV26

USB3TN2BB26

USB3TN3AU28

USB3TN4AY30

USB3TP1AU26

USB3TP2AY26

USB3TP3AV28

USB3TP4AW30

TP4BJ16

TP5BG16

TP15AM5TP14AM4 TP13AH12TP12H3 TP11N30 TP10C18

TP24BG46

RS

VD

PC

I

US

B

5 OF 10PCH1E

PANTHER-GP-NF

RS

VD

PC

I

US

B

5 OF 10PCH1E

PANTHER-GP-NF

12


DY


DY

12

R181510KR2F-2-GPR181510KR2F-2-GP

1 2R1806 22R2J-2-GPR1806 22R2J-2-GP

1 2 R18031KR2J-1-GP

DY R18031KR2J-1-GP

DY

1 2 R18021KR2J-1-GP

DY R18021KR2J-1-GP

DY

1 2R18130R2J-2-GPR18130R2J-2-GP

1 2R1805 22R2J-2-GPR1805 22R2J-2-GP

12 R1817

8K2R2J-3-GP

DY

R18178K2R2J-3-GP

DY

1 2R1804 22R2J-2-GPR1804 22R2J-2-GP

1TP1805TP1805

12345 6

78910

RN1802

SRN8K2J-2-GP-U

RN1802

SRN8K2J-2-GP-U


A

A

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1

BATLOW#

PM_CLKRUN#

PM_PWRBTN#

SUS_PWR_ACK

DSWODVREN

PM_SUS_STAT#

SUS_CLK

DSWODVRENPM_RSMRST#

PCH_DPWROK

PM_RI#

PM_PWRBTN#

RBIAS_CPY

SUSACK#SUS_PWR_ACK

PWROK

DMI_COMP_R

PWROK

SYS_PWROK

MEPWROK

BATLOW#PM_RI#

AC_PRESENT

PM_RSMRST#

PCIE_WAKE#

SYS_RESET#

PM_RSMRST#

3V_5V_POK_#

DMI_RXN0DMI_RXN1DMI_RXN2

DMI_RXP1DMI_RXP2

DMI_RXP0

DMI_TXN1DMI_TXN0

DMI_TXN3DMI_TXN2

DMI_TXP1DMI_TXP0

DMI_TXP3DMI_TXP2

FDI_TXN0FDI_TXN1FDI_TXN2FDI_TXN3FDI_TXN4FDI_TXN5FDI_TXN6

FDI_TXP3

FDI_TXP0

FDI_TXP5FDI_TXP4

FDI_TXP6

FDI_TXP1FDI_TXP2

PM_RSMRST#

DMI_RXN3

DMI_RXP3

FDI_TXP7

FDI_TXN7

PM_SLP_LAN#

PM_SLP_SUS#

PM_SLP_S5#

SUS_PWR_ACK

SYS_RESET#

RTC_AUX_S5

3D3V_S5

3D3V_S0

RTC_AUX_S5

1D05V_VTT

3D3V_AUX_S5

3D3V_S0

H_PM_SYNC 5

PM_CLKRUN# 27

DMI_RXN[3:0]4

DMI_RXP[3:0]4

DMI_TXN[3:0]4

DMI_TXP[3:0]4

XDP_DBRESET#5

SYS_PWROK36

S0_PWR_GOOD27

PM_PWRBTN#27,97

AC_PRESENT27

PM_DRAM_PWRGD37

FDI_TXN[7:0] 4

FDI_TXP[7:0] 4

FDI_INT 4

FDI_FSYNC0 4

FDI_FSYNC1 4

FDI_LSYNC0 4

FDI_LSYNC1 4

PCH_SUSCLK_KBC 27

PM_SLP_S3# 27,36,37,47

PM_SLP_S4# 27,46,97

PCIE_WAKE# 31,65,66

RSMRST#_KBC 27

3V_5V_POK 41

PM_SLP_A# 27,45

MPWROK45

Title


Date: Sheet of


LA480 SD

PCH : DMI/FDI/PMA2


<Core Design>

Title


Date: Sheet of


LA480 SD

PCH : DMI/FDI/PMA2


<Core Design>

Title


Date: Sheet of


LA480 SD

PCH : DMI/FDI/PMA2


<Core Design>

Signal Routing Guideline:DMI_ZCOMP keep W=4 mils androuting length less than 500mils.DMI_IRCOMP keep W=4 mils androuting length less than 500mils.

PCH_WAKE#CRB : 1KCHKLIST: 10K

DSWODVREN - On Die DSW VR Enable

HIGH Enabled (DEFAULT)

LOW Disabled

SSID = PCH

For platforms not supporting Deep S4/S51.VccSUS3_3 and VccDSW3_3 will rise at the same tim e (connected on board)2.DPWROK and RSMRST# will rise at the same time (co nnected on board)3.SLP_SUS# and SUSACK# are left as ‘no connect’4.SUSWARN# used as SUSPWRDNACK/GPIO30

S0_PWR_GOOD after PM_SLP_S3# delay 200 ms

Platforms supporting Deep S4/S5, but not wishing to participate in the handshake during wake and Deep S4/S5 entry may tie SUSACK# to SUSWARN#.

For platforms supporting DEEP S4/S5 state, a low on this signal indicates that PCH is in Deep Sleep state and that EC/platform logic does not need to keep the Suspend Rails ON. If high means EC must keep SUS rails ON. If DEEP S4/S5 is not supported, then this pin can be left unconnected.

This signal is used to control power planes to the IntelR ME sub-system. This signal will be asserted in M-off state. If M3is not supported then SLP_A# will have the same timings as SLP_S3#.

Active Sleep Well(ASW) Power OK

PWROK: it indicates to PCH thatits CORE well power is stable.

SYS_PWROK: the system is ready to start the exit fromreset (de-asserts PLT_RST# to the processor)

SUS_ACK#: For non-DWS platforms, this signal can be left unconnected. Due to the internal pull-up on this signal it will be pulled high in order for the boot sequence to proceed.

SUSPWRDNACK : No longer requires a 10-K pull-up to VccSUS (3.3 V).

1 2R1930 0R2J-2-GPNon-SBAR1930 0R2J-2-GPNon-SBA

1 2R190510KR2J-3-GP

DYR190510KR2J-3-GP

DY

1 2R1923 0R2J-2-GPDYR1923 0R2J-2-GPDY

12R1909 10KR2J-3-GPR1909 10KR2J-3-GP

1 TP1905TP1905

1 2R19211KR2J-1-GPR19211KR2J-1-GP

12R1922 10KR2J-3-GPDY

R1922 10KR2J-3-GPDY

12R1925 100KR2J-1-GPR1925 100KR2J-1-GP

1 TP1901TP1901

12345

678

RN1901

SRN10KJ-6-GP

RN1901

SRN10KJ-6-GP

12R190810KR2J-3-GP

R190810KR2J-3-GP

1 2R190149D9R2F-GPR190149D9R2F-GP

1 2R191110KR2J-3-GP

DYR191110KR2J-3-GP

DY

1 2R1918 330KR2J-L1-GPDYR1918 330KR2J-L1-GPDY

1 2R1904 100KR2J-1-GPR1904 100KR2J-1-GP

1 2R1914 0R0402-PADR1914 0R0402-PAD

1 2R1992 0R0402-PADR1992 0R0402-PAD

1 2R1919 8K2R2J-3-GPR1919 8K2R2J-3-GP

1 2R1916 0R0402-PADR1916 0R0402-PAD

1 2R1931 0R2J-2-GPSBAR1931 0R2J-2-GPSBA

1 2R1926 10KR2J-3-GP

DYR1926 10KR2J-3-GP

DY

1 TP1904TP1904

1 TP1902TP1902

1

2

34

5

6

Q1901

2N7002KDW-GP84.2N702.A3F

2nd = 84.DM601.03F

Q1901

2N7002KDW-GP84.2N702.A3F

2nd = 84.DM601.03F

1 2R1917 330KR2J-L1-GPR1917 330KR2J-L1-GP

1 2R1915 0R2J-2-GP

DYR1915 0R2J-2-GP

DY

12

R192410KR2J-3-GPR192410KR2J-3-GP

1 2R19130R0402-PAD

R19130R0402-PAD

DMI0RXNBC24

DMI1RXNBE20

DMI2RXNBG18

DMI3RXNBG20

DMI0RXPBE24

DMI1RXPBC20

DMI2RXPBJ18

DMI3RXPBJ20

DMI0TXNAW24

DMI1TXNAW20

DMI2TXNBB18

DMI3TXNAV18

DMI0TXPAY24

DMI1TXPAY20

DMI2TXPAY18

DMI3TXPAU18

DMI_ZCOMPBJ24

DMI_IRCOMPBG25

FDI_RXN0 BJ14

FDI_RXN1 AY14

FDI_RXN2 BE14

FDI_RXN3 BH13

FDI_RXN4 BC12

FDI_RXN5 BJ12

FDI_RXN6 BG10

FDI_RXN7 BG9

FDI_RXP0 BG14

FDI_RXP1 BB14

FDI_RXP2 BF14

FDI_RXP3 BG13

FDI_RXP4 BE12

FDI_RXP5 BG12

FDI_RXP6 BJ10

FDI_RXP7 BH9

FDI_FSYNC0 AV12

FDI_FSYNC1 BC10

FDI_LSYNC0 AV14

FDI_LSYNC1 BB10

FDI_INT AW16

PMSYNCH AP14

SLP_SUS# G16

SLP_S3# F4

SLP_S4# H4

SLP_S5#/GPIO63 D10

SYS_RESET#K3

SYS_PWROKP12

PWRBTN#E20

RI#A10

WAKE# B9

SUS_STAT#/GPIO61 G8

SUSCLK/GPIO62 N14

ACPRESENT/GPIO31H20

BATLOW#/GPIO72E10

PWROKL22

CLKRUN#/GPIO32 N3

SUSWARN#/SUSPWRDNACK/GPIO30K16

RSMRST#C21

DRAMPWROKB13

SLP_LAN#/GPIO29 K14

APWROKL10

DPWROK E22

DMI2RBIASBH21

SLP_A# G10

DSWVRMEN A18

SUSACK#C12

DM

I

FD

I

Sys

tem

Po

we

r M

an

ag

em

en

t

3 OF 10PCH1C

PANTHER-GP-NF

DM

I

FD

I

Sys

tem

Po

we

r M

an

ag

em

en

t

3 OF 10PCH1C

PANTHER-GP-NF

1 2 R1902750R2F-GPR1902750R2F-GP


A

A

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1

CLK_BUF_EXP_NCLK_BUF_EXP_P

EC_SWI#

DGPU_PRSNT#

JTAG_TCK

CLK_BUF_DOT96_NCLK_BUF_DOT96_P

XTAL25_IN

PCIE_CLK_RQ6#

CLK_BUF_EXP_NCLK_BUF_EXP_P

SMB_CLK

XTAL25_OUT

CLK_BUF_CKSSCD_P

XTAL25_IN

XTAL25_OUT

CLK_PCI_FB

EC_SWI#

PCH_GPIO74

PCIE_CLK_CR_REQ#

PEG_B_CLKRQ#

PCIE_CLK_RQ4#

PCIE_CLK_RQ0#

PCIE_CLK_CR_REQ#

DRAMRST_CNTRL_PCH

PCIE_CLK_RQ6#

PEG_B_CLKRQ#

CLK_27M_VGA_R

PCIE_CLK_XDP_PPCIE_CLK_XDP_N

CLK_BUF_REF14

SML1_CLK

PEG_CLKREQ#_R

SML1_DATA

PCH_GPIO74

DRAMRST_CNTRL_PCH

SMB_DATA

XCLK_RCOMP

CLK_BUF_REF14

SML0_DATASML0_CLK

CL_CLK

CL_DATA

CL_RST#

SMB_DATA

SML0_CLK

PCIE_TXP4_CPCIE_TXN4_C

SML1_DATASML1_CLK

CLK_BUF_DOT96_PCLK_BUF_DOT96_N

CLK_BUF_CKSSCD_N

SMB_CLK

PEG_CLKREQ#_R

SML0_DATA

CLK_PCIE_NEW_REQ#

SMB_CLK

SMB_DATA

CLK_BUF_CPYCLK_NCLK_BUF_CPYCLK_P

CLK_BUF_CKSSCD_NCLK_BUF_CKSSCD_P

DGPU_PRSNT#

PCIE_CLK_LAN_REQ#

CLK_DP_NCLK_DP_P

PCIE_CLK_RQ4#

PCIE_TXN2_CPCIE_TXP2_C

PCIE_CLK_RQ5#

PCIE_CLK_LAN_REQ#

PCIE_CLK_WLAN_REQ#

PCIE_CLK_RQ0#

CLK_PCH_SRC1_PCLK_PCH_SRC1_N

CLK_PCH_SRC3_PCLK_PCH_SRC3_N

PCIE_CLK_WLAN_REQ#

PCIE_CLK_RQ5#

CLK_PCIE_NEW_REQ#

PCIE_CLK_WLAN_REQ#PCIE_CLK_LAN_REQ#

CLK_PCH_48M_L

3D3V_S0

3D3V_S5

3D3V_S0 3D3V_S0

3D3V_S5

3D3V_S0

3D3V_S5

+VCCDIFFCLKN

PCH_SMBDATA 14,15,65,66

PCH_SMBCLK 14,15,65,66

SML1_DATA 27

SML1_CLK 27

PCIE_TXN265PCIE_TXP265

PCIE_RXN265PCIE_RXP265

DRAMRST_CNTRL_PCH 12,37

CLK_PCIE_VGA# 83CLK_PCIE_VGA 83

CLK_EXP_N 5CLK_EXP_P 5

CLK_PCH_48M 82

SBA_Support# 22

PEG_CLKREQ# 83

CLK_PCI_FB 18

CLK_PCIE_WLAN#65CLK_PCIE_WLAN65

CLK_PCIE_LAN#31CLK_PCIE_LAN31

PCIE_CLK_WLAN_REQ#65

PCIE_CLK_LAN_REQ#31


PCIE_RXN431PCIE_RXP431

SMB_CLK 80

SMB_DATA 80

Title


Date: Sheet of


LA480 SD

PCH : PCIE/SMBUS/CLKA2


<Core Design>

Title


Date: Sheet of


LA480 SD



<Core Design>

Title


Date: Sheet of


LA480 SD



<Core Design>

If PCIE port 1 is disabled, it willcause all PCIE port disabled

LAN CLK

UMA_DISCRETE#UMA: 1 1DIS :0 1SG(PX) : 0 0Optimus(Muxless) : 1 0

SSID = PCH

WLAN CLK

– Prioritize 27/14/24/48/25-MHz FLEX on FLEX1 and F LEX3– Do not configure 27/14/24/48/25-MHz FLEX clock on FLEX0 and FLEX2if more than 2 PCI clocks + PCI loopback are routed .

PCIECLKRQ1# and PCIECLKRQ2# Support S0 power only

Card Reader

WWAN

WLAN

PL 10K FOR Integrated CLOCK GEN mode.

LAN

0511-CHECK

0511-CHECK

serial 0ohm RN?

12

C2008SC15P50V2JN-2-GP


1 2C2016 SCD1U10V2KX-5GPC2016 SCD1U10V2KX-5GP

1 TP2007TP2007

12 3

4RN2012 SRN0J-6-GPRN2012 SRN0J-6-GP

12

R201310KR2J-3-GP

UMA

R201310KR2J-3-GP

UMA

1 TP2004TP2004

41

2 3

X2001

XTAL-25MHZ-155-GP82.30020.D41

2nd = 82.30020.G713rd = 82.30020.G61

X2001

XTAL-25MHZ-155-GP82.30020.D41

2nd = 82.30020.G713rd = 82.30020.G61

PERN1BG34

PERP1BJ34

PERN2BE34

PERP2BF34

PERN3BG36

PERP3BJ36

PERN4BF36

PERP4BE36

PERN5BG37

PERP5BH37

PERN6BJ38

PERP6BG38

PERN7BG40

PERP7BJ40

PERN8BE38

PERP8BC38

PETN1AV32

PETP1AU32

PETN2BB32

PETP2AY32

PETN3AV34

PETP3AU34

PETN4AY34

PETP4BB34

PETN5AY36

PETP5BB36

PETN6AU36

PETP6AV36

PETN7AY40

PETP7BB40

PETN8AW38

PETP8AY38

CLKOUT_PCIE0NY40

CLKOUT_PCIE0PY39

CLKOUT_PCIE1NAB49

CLKOUT_PCIE1PAB47

CLKOUT_PCIE2NAA48

CLKOUT_PCIE2PAA47

CLKOUT_PCIE3NY37

CLKOUT_PCIE3PY36

CLKOUT_PCIE4NY43

CLKOUT_PCIE4PY45

CLKOUT_PCIE5NV45

CLKOUT_PCIE5PV46

CLKIN_GND1_N BJ30

CLKIN_GND1_P BG30

CLKIN_DMI_N BF18

CLKIN_DMI_P BE18

CLKIN_DOT_96N G24

CLKIN_DOT_96P E24

CLKIN_SATA_N AK7

CLKIN_SATA_P AK5

XTAL25_IN V47

XTAL25_OUT V49

REFCLK14IN K45

CLKIN_PCILOOPBACK H45

CLKOUT_PEG_A_N AB37

CLKOUT_PEG_A_P AB38

PEG_A_CLKRQ#/GPIO47 M10

PCIECLKRQ0#/GPIO73J2

PCIECLKRQ1#/GPIO18M1

PCIECLKRQ2#/GPIO20V10

PCIECLKRQ3#/GPIO25A8

PCIECLKRQ4#/GPIO26L12

PCIECLKRQ5#/GPIO44L14

CLKOUTFLEX0/GPIO64 K43

CLKOUTFLEX1/GPIO65 F47

CLKOUTFLEX2/GPIO66 H47

CLKOUTFLEX3/GPIO67 K49

CLKOUT_DMI_N AV22

CLKOUT_DMI_P AU22

PEG_B_CLKRQ#/GPIO56E6

CLKOUT_PEG_B_PAB40 CLKOUT_PEG_B_NAB42

XCLK_RCOMP Y47

CLKOUT_DP_P AM13CLKOUT_DP_N AM12

CLKOUT_PCIE6NV40

CLKOUT_PCIE6PV42

PCIECLKRQ7#/GPIO46K12

CLKOUT_PCIE7NV38

CLKOUT_PCIE7PV37

CLKOUT_ITPXDP_NAK14

CLKOUT_ITPXDP_PAK13

SMBALERT#/GPIO11 E12

SMBCLK H14

SMBDATA C9

SML0ALERT#/GPIO60 A12

SML0CLK C8

SML0DATA G12

SML1ALERT#/PCHHOT#/GPIO74 C13

SML1CLK/GPIO58 E14

SML1DATA/GPIO75 M16

CL_CLK1 M7

CL_DATA1 T11

CL_RST1# P10

PCIECLKRQ6#/GPIO45T13

PC

I-E

*

CLO

CK

S

FL

EX

CL

OC

KS

SM

BU

SC

on

tro

ller

Lin

k

2 OF 10PCH1B

PANTHER-GP-NF

PC

I-E

*

CLO

CK

S

FL

EX

CL

OC

KS

SM

BU

SC

on

tro

ller

Lin

k

2 OF 10PCH1B

PANTHER-GP-NF

12 3

4RN2016 SRN0J-6-GPRN2016 SRN0J-6-GP

1 2R2016 22R2J-2-GP

DY

R2016 22R2J-2-GP

DY


12

R200410KR2J-3-GP

R200410KR2J-3-GP

12

R20061M1R2J-GPR20061M1R2J-GP

1TP2011TP2011

12

R201110KR2J-3-GP

OPS

R201110KR2J-3-GP

OPS

1 2R2007

90D9R2F-1-GPR2007

90D9R2F-1-GP

1

2

34

5

6Q2001

2N7002KDW-GP84.2N702.A3F

2nd = 84.DM601.03F

Q2001

2N7002KDW-GP84.2N702.A3F

2nd = 84.DM601.03F

1 TP2005TP2005


1 TP2002TP2002

1234 5

678

RN2002

SRN10KJ-6-GP

RN2002

SRN10KJ-6-GP

12

R200510KR2J-3-GP DY

R200510KR2J-3-GP DY

12 3

4RN2018

SRN10KJ-5-GP

RN2018

SRN10KJ-5-GP

1TP2010TP2010

12

EC2002

SC

D1U

16V

2KX

-3G

P

DYEC2002

SC

D1U

16V

2KX

-3G

P

DY

12 3

4RN2005SRN2K2J-1-GPRN2005SRN2K2J-1-GP

12 3

4 RN2006SRN10KJ-5-GPRN2006SRN10KJ-5-GP


12

R201010KR2J-3-GP

SBA

R201010KR2J-3-GP

SBA

1 2 R20091KR2J-1-GPR20091KR2J-1-GP

12

R201210KR2J-3-GP

Non-SBA

R201210KR2J-3-GP

Non-SBA

12 3

4RN2019 SRN10KJ-5-GPRN2019 SRN10KJ-5-GP

12

EC2001

SC

D1U

16V

2KX

-3G

P

DYEC2001

SC

D1U

16V

2KX

-3G

P

DY

1 2R2003 0R0402-PADR2003 0R0402-PAD

12 3


1 TP2001TP2001

1 TP2003TP2003

123

4 RN2003SRN2K2J-1-GPRN2003SRN2K2J-1-GP

123

4 RN2004SRN2K2J-1-GPRN2004SRN2K2J-1-GP

12 3

4

RN2008

SRN10KJ-5-GP

RN2008

SRN10KJ-5-GP

12 3


12

C2007SC15P50V2JN-2-GPC2007SC15P50V2JN-2-GP

1 TP2006TP2006

12

EC2003

SC

D1U

16V

2KX

-3G

P

DY

EC2003

SC

D1U

16V

2KX

-3G

P

DY

1 2R200810KR2J-3-GPR200810KR2J-3-GP

1234 5

678

RN2001

SRN10KJ-6-GP

RN2001

SRN10KJ-6-GP

12 3

4

RN2007

SRN2K2J-1-GP

RN2007

SRN2K2J-1-GP


A

A

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1

HDA_SYNC

PCH_SPI_CLK

PCH_SPI_SI

PCH_SPI_CS0#

SPI_CS0#_RHDA_CODEC_BITCLK

HDA_SPKR

PCH_GPIO33

HDA_SDOUT

PCH_JTAG_TMS

HDA_BITCLK

HDA_RST#

HDA_SYNC

PCH_JTAG_TDI

SATA_LED#

SATA_DET#0

LPC_AD0_TPMLPC_AD1_TPMLPC_AD2_TPMLPC_AD3_TPM

PCH_JTAG_TDO

HDA_RST#

HDA_SDOUT

HDA_BITCLK

RBIAS_SATA3

SATA_COMP

HDA_SDOUT

PCH_JTAG_TCK_BUF

RTC_X2

SM_INTRUDER#

RTC_X2

RTC_X1

SRTC_RST#

PCH_INTVRMEN

RTC_X1

RTC_RST#

SATA3_COMP

HDA_CODEC_SDOUT

LPC_AD3

LPC_FRAME#_L

INT_SERIRQ

PCH_JTAG_TCK_BUF

SATA_DET#0

HDA_SYNC

LPC_AD0LPC_AD1LPC_AD2

SATA_LED#

HDA_SYNC

HDA_CODEC_SYNC HDA_CODEC_SYNC_L

APS_LED

PCH_SPI_CLK

PCH_SPI_CS1#

RTC_AUX_S5

RTC_AUX_S5

1D05V_VTT

3D3V_S0

1D05V_VTT

3D3V_S0

+3VS_+1.5VS_HDA_IO

+3VS_+1.5VS_HDA_IO

5V_S0

3D3V_S0LPC_AD[0..3] 27,65,71

HDA_CODEC_SDOUT29

HDA_CODEC_SYNC29

HDA_CODEC_RST#29HDA_CODEC_BITCLK29

HDA_SPKR29

ME_UNLOCK27

SPI_CLK_R27,60

SPI_CS0#_R27,60

HDA_SDIN029

SPI_SO_R27,60

LPC_FRAME# 27,65,71

INT_SERIRQ 27

SATA_TXN0 66SATA_TXP0 66

SATA_RXP0 66SATA_RXN0 66

SATA_LED# 68

BBS_BIT0 18

S_GPIO22

SPI_SI_R27,60





RTCRST_ON27

KBC_RTCRST# 27

APS_LED 68

SPI_CS1#_R60

Title


Date: Sheet of


LA480 SD

PCH : HDA/JTAG/SATAA2


<Core Design>

Title


Date: Sheet of


LA480 SD



<Core Design>

Title


Date: Sheet of


LA480 SD



<Core Design>

HDA_SYNC: This strap is sampled on rising edge of RSMRST# and is used tosample 1.5V VccVRM supply mode. 1K external pull-up resistor is required on thissignal on the board. Signal may have leakage paths via powered off devices (AudioCodec) and hence contend with the external pull-up. A blocking FET isrecommended in such a case to isolate HDA_SYNC from the Audio Codec deviceuntil after the Strap sampling is complete.

PLL ODVR VOLTAGE

HDA_SYNCLow = 1.8V (Default)High = 1.5V

This signal has a weak internal pull down.On Die PLL VR is supplied by 1.5V whensampled high, 1.8 V when sampled low.Needs to be pulled High for Huron River platform.co-operate with R2310

NO REBOOT STRAPNo Reboot Strap

HDA_SPKRLow = DefaultHigh = No Reboot

ODD

HDD1

Notes:ME_UNLOCK (HDA_SDO) connect to EC. Make sure EC drive this pin "low" all the time.

SSID = PCH

INTVRMEN- Integrated SUS1.05V VRM EnableHigh - Enable internal VRsLow - Enable external VRs

HDA_SDOUTLow = DefaultHigh = Enable

Flash Descriptor Security Overide

0511-CHECK ADD BLOCK FET IN CODEC PAGE.

0511-CHECK

CHECK

CHECK

OD

This signal has a weak internal pull-down.On Die PLL VR is supplied by 1.5 V from VccVRM when sampled high, 1.8 V from VccVRM when sampled low.

CHECK 4.7K PD

m-SATA

10K?

Vth?

mSATA, CRV USE PORT2

E-SATA

Check with SW

1 2R2103 1KR2J-1-GPR2103 1KR2J-1-GP

12EC2102

SC

4D7P

50V

2CN

-1G

PDY

EC2102

SC

4D7P

50V

2CN

-1G

PDY

1 2

3

D2130BAS16-6-GP

DY3rd = 83.00016.N112nd = 83.00016.M1183.00016.K11

D2130BAS16-6-GP

DY3rd = 83.00016.N112nd = 83.00016.M1183.00016.K11

1 2R2134 51R2J-2-GPR2134 51R2J-2-GP

1 2R2102 1KR2J-1-GP

DYR2102 1KR2J-1-GP

DY

12

R21300R2J-2-GP

R21300R2J-2-GP

12 3

4

RN2104

SRN20KJ-GP-U

RN2104

SRN20KJ-GP-U

1 2R2118 22R2F-1-GPR2118 22R2F-1-GP

12EC2103

SC

4D7P

50V

2CN

-1G

P

DY

EC2103

SC

4D7P

50V

2CN

-1G

P

DY

12

C2103SC1U6D3V2KX-GPC2103SC1U6D3V2KX-GP

1 2R2108 33R2J-2-GPR2108 33R2J-2-GP

12 R212333R2J-2-GP R212333R2J-2-GP

1 2R2113 49D9R2F-GPR2113 49D9R2F-GP

12R212433R2J-2-GPR212433R2J-2-GP

1234 5

678

RN2103

SRN10KJ-6-GP

RN2103

SRN10KJ-6-GP

12

C2104SC1U6D3V2KX-GP

C2104SC1U6D3V2KX-GP

12

C2101

SC

15P50V

2JN-2-G

P

C2101

SC

15P50V

2JN-2-G

P

1 2R2131 0R2J-2-GP

DYR2131 0R2J-2-GP

DY

1 2

X2101

XTAL-32D768KHZ-15-GP82.30001.C21

X2101

XTAL-32D768KHZ-15-GP82.30001.C21

1 2R2112 37D4R2F-GPR2112 37D4R2F-GP

1 2R2119 22R2F-1-GPR2119 22R2F-1-GP

21

G2101GAP-OPENG2101GAP-OPEN

1TP2102TP2102

12

EC2104

SC

D1U

16V

2KX

-3G

P

DYEC2104

SC

D1U

16V

2KX

-3G

P

DY

1 2R2106 1KR2J-1-GP

DYR2106 1KR2J-1-GP

DY

G

S

D

Q2102

2N7002K-2-GP

84.2N702.J312ND = 84.2N702.031

Q2102

2N7002K-2-GP

84.2N702.J312ND = 84.2N702.031

12R2104 1M1R2J-GPR2104 1M1R2J-GP

1 2R2105 330KR2F-L-GPR2105 330KR2F-L-GP

1TP2105TP2105

12EC2101

SC

4D7P

50V

2CN

-1G

P

DY

EC2101

SC

4D7P

50V

2CN

-1G

P

DY

1 2R2114 750R2F-GPR2114 750R2F-GP

1 2R2121 22R2F-1-GPR2121 22R2F-1-GP

G

S

D

Q2101

2N7002K-2-GP

84.2N702.J312ND = 84.2N702.031

Q2101

2N7002K-2-GP

84.2N702.J312ND = 84.2N702.031

RTCX1A20

RTCX2C20

INTVRMENC17

INTRUDER#K22

HDA_BCLKN34

HDA_SYNCL34

HDA_RST#K34

HDA_SDIN0E34

HDA_SDIN1G34

HDA_SDIN2C34

HDA_SDOA36

SATALED# P3

FWH0/LAD0 C38

FWH1/LAD1 A38

FWH2/LAD2 B37

FWH3/LAD3 C37

LDRQ1#/GPIO23 K36

FWH4/LFRAME# D36

LDRQ0# E36

RTCRST#D20

HDA_SDIN3A34

HDA_DOCK_EN#/GPIO33C36

HDA_DOCK_RST#/GPIO13N32

SRTCRST#G22

SATA0RXN AM3

SATA0RXP AM1

SATA0TXN AP7

SATA0TXP AP5

SATA1RXN AM10

SATA1RXP AM8

SATA1TXN AP11

SATA1TXP AP10

SATA2RXN AD7

SATA2RXP AD5

SATA2TXN AH5

SATA2TXP AH4

SATA3RXN AB8

SATA3RXP AB10

SATA3TXN AF3

SATA3TXP AF1

SATA4RXN Y7

SATA4RXP Y5

SATA4TXN AD3

SATA4TXP AD1

SATA5RXN Y3

SATA5RXP Y1

SATA5TXN AB3

SATA5TXP AB1

SATAICOMPI Y10

SPI_CLKT3

SPI_CS0#Y14

SPI_CS1#T1

SPI_MOSIV4

SPI_MISOU3

SATA0GP/GPIO21 V14

SATA1GP/GPIO19 P1

JTAG_TCKJ3

JTAG_TMSH7

JTAG_TDIK5

JTAG_TDOH1

SERIRQ V5

SPKRT10

SATAICOMPO Y11

SATA3COMPI AB13

SATA3RCOMPO AB12

SATA3RBIAS AH1

RT

CIH

DA

SA

TA

LP

C

SP

IJT

AG

SA

TA

6G

1 OF 10PCH1A

PANTHER-GP-NF

RT

CIH

DA

SA

TA

LP

C

SP

IJT

AG

SA

TA

6G

1 OF 10PCH1A

PANTHER-GP-NF

1 2R2107 1KR2J-1-GPR2107 1KR2J-1-GP

1TP2103TP2103

1TP2104TP2104

1 2R21258K2R2J-3-GPR21258K2R2J-3-GP

12

C2102

SC

15P50V

2JN-2-G

P

C2102

SC

15P50V

2JN-2-G

P

12 R212933R2J-2-GP R212933R2J-2-GP


1 2R2110 33R2J-2-GPR2110 33R2J-2-GP

12

R21271MR2F-GP

R21271MR2F-GP

12 R212633R2J-2-GP R212633R2J-2-GP

12

R212810KR2J-3-GPDY

R212810KR2J-3-GPDY

1 2R2109 0R2J-2-GPR2109 0R2J-2-GP

12 R212233R2J-2-GP DY R212233R2J-2-GP DY

1 2R2111 22R2F-1-GPR2111 22R2F-1-GP

1 2R2120 22R2F-1-GPR2120 22R2F-1-GP

1 2R2101 10MR2J-L-GPR2101 10MR2J-L-GP


A

A

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1

TS_VSS

MFG_MODE

PCH_NCTF_2

PCH_NCTF_4

PCH_NCTF_3

PCH_NCTF_1

PCH_GPIO48

PCH_GPIO15

H_RCIN#

USB3_PWR_ON

H_A20GATE

SATA_ODD_PRSNT#

GPIO0

PCH_GPIO22

EC_SMI#

DGPU_HPD_INTR#EC_SCI#

ICC_EN#

PLL_ODVR_EN

DMI_OVRVLTG

FDI_OVRVLTG

ICC_EN#

SATA_ODD_PRSNT#

PCH_THERMTRIP_R

INIT3_3V#

FDI_OVRVLTG

H_PECI_R

PLL_ODVR_EN

EC_SMI#

DGPU_HPD_INTR#

USB3_PWR_ON

VRAM_SIZE1

PSW_CLR#

VRAM_SIZE2

PCH_TEMP_ALERT#

PCH_GPIO48

EC_SCI#

PCH_TEMP_ALERT#

PCH_GPIO15

FP_DET#

FP_DET#

PCH_GPIO16

DMI_OVRVLTG

NV_CLE

NV_CLE

PCH_GPIO27

PCH_GPIO27

GFX_CRB_DET

VRAM_SIZE1VRAM_SIZE2

GFX_CRB_DET

Gsensor_ID

PCH_GPIO22

PLL_ODVR_EN

FP_DET#

PSW_CLR#MFG_MODE

RTC_DET#

Gsensor_ID

PCH_NCTF_5

PCH_NCTF_6

PCH_NCTF_7

PCH_NCTF_8

PCH_NCTF_9

PCH_NCTF_10

DGPU_PWROK_C

3D3V_S0

3D3V_S0

3D3V_S0

3D3V_S5

3D3V_S0

3D3V_S0

1D8V_S0

3D3V_S0

3D3V_S0

3D3V_S5

H_PECI 5,27

S_GPIO21

SATA_ODD_PRSNT#56

EC_SCI#27

SATA_ODD_PWRGT 56

SBA_Support# 20

H_CPUPWRGD 5,97

H_SNB_IVB# 5

H_A20GATE 27

H_THERMTRIP# 5,36

H_RCIN# 27

RTC_DET#60

DGPU_PWROK92,93

Title


Date: Sheet of


LA480 SD

PCH : GPIO/NTCF/MISCA2


<Core Design>

Title


Date: Sheet of


LA480 SD



<Core Design>

Title


Date: Sheet of


LA480 SD



<Core Design>

TS Signal Disable Guideline:TS_VSS1, TS_VSS2, TS_VSS3 and TS_VSS4should not float on the motherboard. Theyshould be tied to GND directly.

Integrated Clock Enable functionality is achievedvia soft-strap. The default is integrated clockenable.

GPIO27 has a weak[20K] internal pull up.To enable on-die PLL Voltage regurator,should not place external pull down.

Note:For PCH debug with XDP, need to NO STUFF R2218

ICC_EN#

GPIO36(DMI_OVRVLTG)

DMI TERMINATION VOLTAGE OVERRIDE

LOW - Tx, Rx terminated to same voltage(DC Coupling Model DEFAULT)

PLL ON DIE VR ENABLE

NOTE:This signal has a weak internal pull-up 20KENABLED -- HIGH (R2212 UNSTUFFED) DEFAULTDISABLED -- LOW (R2212 STUFFED)

LOW (R2211)- ENABLED

Integrated Clock Chip Enable

HIGH (R2211 DY)- DISABLED [DEFAULT]

Integrated Clock Enable functionality is achievedvia soft-strap. The default is integrated clockenable.

GPIO37(FDI_OVRVLTG)

FDI TERMINATION VOLTAGE OVERRIDE

LOW - Tx, Rx terminated to same voltage(DC Coupling Model DEFAULT)

GPIO8 has a weak[20K] internal pull up.

NV_CLESet to Vss when LOW

DMI & FDI Termination Voltage

Set to Vcc when HIGH

INTERNAL GFX EXTERNAL GFX R2205 DY 10K

R2206 100K DY

PROCPWRGD (PCH) --> UNCOREPOWRGOOD (CPU)Indicates that VccSA, VDDQ, VccA (1.8V) and VccIO power supplies are stable. This signal will be asserted only after PWROK assertion.

R2202HR:200K (64.20035.6DL)CRV:10K (63.10334.1DL)

R2211 BOM CTRLHR:1KCRV:DY

G-Sensor ST KIXNOK R2226 DY 10K

R2221 10K DY

1 2R2202 10KR2J-3-GPR2202 10KR2J-3-GP

12

R223010KR2J-3-GPDY

R223010KR2J-3-GPDY

1 2R2203 0R2J-2-GP

DYR2203 0R2J-2-GP

DY

12 3

4

RN2203

SRN10KJ-5-GP

RN2203

SRN10KJ-5-GP

1 2R2222 10KR2J-3-GPR2222 10KR2J-3-GP

A K

D2201CH751H-40-1-GP

DY

D2201CH751H-40-1-GP

DY

1 2R2229 10KR2J-3-GPR2229 10KR2J-3-GP

1 TP2211TP2211

1TP2206TP2206

1TP2201TP2201

12

R221010KR2J-3-GPR221010KR2J-3-GP

1 TP2213TP2213

1 2R2228 10KR2J-3-GPR2228 10KR2J-3-GP

1TP2207TP2207

12

R220810KR2J-3-GPR220810KR2J-3-GP

1 2R2216 0R2J-2-GPR2216 0R2J-2-GP

1 2R2204390R2J-1-GPR2204390R2J-1-GP

123


1 TP2214TP2214

12

R18082K2R2J-2-GPR18082K2R2J-2-GP

1 TP2210TP2210

1TP2209TP2209

21

G2201

GA

P-O

PE

N

G2201

GA

P-O

PE

N

GPIO27E16

GPIO28P8

GPIO24E8

GPIO57D6

LAN_PHY_PWR_CTRL/GPIO12C4

VSS_NCTF_1#A4A4

VSS_NCTF_2#A44A44

VSS_NCTF_3#A45A45

VSS_NCTF_4#A46A46

VSS_NCTF_5#A5A5

VSS_NCTF_6#A6A6

VSS_NCTF_7#B3B3

VSS_NCTF_8#B47B47

VSS_NCTF_9#BD1BD1

VSS_NCTF_10#BD49BD49

VSS_NCTF_11#BE1BE1

VSS_NCTF_12#BE49BE49

TACH2/GPIO6H36

TACH0/GPIO17D40

TACH3/GPIO7E38

SATA3GP/GPIO37M5

SATA5GP/GPIO49/TEMP_ALERT#V3

SCLOCK/GPIO22T5

SLOAD/GPIO38N2

SDATAOUT0/GPIO39M3

SDATAOUT1/GPIO48V13

PROCPWRGD AY11

RCIN# P5

PECI AU16

THRMTRIP# AY10

GPIO8C10

BMBUSY#/GPIO0T7

GPIO15G2

TACH1/GPIO1A42

SATA2GP/GPIO36V8

INIT3_3V# T14

STP_PCI#/GPIO34K1

GPIO35K4

SATA4GP/GPIO16U2

VSS_NCTF_32#F49 F49

A20GATE P4

TACH4/GPIO68 C40

TACH6/GPIO70 C41

TACH7/GPIO71 A40

TACH5/GPIO69 B41

VSS_NCTF_17#BH3 BH3

VSS_NCTF_18#BH47 BH47

VSS_NCTF_19#BJ4 BJ4

VSS_NCTF_20#BJ44 BJ44



VSS_NCTF_23#BJ5 BJ5

VSS_NCTF_24#BJ6 BJ6

VSS_NCTF_25#C2 C2

VSS_NCTF_26#C48 C48

VSS_NCTF_27#D1 D1

VSS_NCTF_28#D49 D49

VSS_NCTF_29#E1 E1

VSS_NCTF_30#E49 E49

VSS_NCTF_31#F1 F1

TS_VSS4 AK10

TS_VSS3 AH10

TS_VSS2 AK11

TS_VSS1 AH8

NC_1 P37

VSS_NCTF_13#BF1BF1

VSS_NCTF_14#BF49BF49

VSS_NCTF_15#BG2 BG2

VSS_NCTF_16#BG48 BG48

DF_TVS AY1

CP

U/M

ISC

NC

TF

GP

IO

6 OF 10

NC

TF

TE

ST

PIN

:A

4,A

44,A

45,A

46,A

5,A

6,B

3,B

47,

BD

1,B

D49

,BE

1,B

E49

,BF

1,B

F49

,B

G2,

BG

48,B

H3,

BH

47,B

J4,B

J44,

BJ4

5,B

J46,

BJ5

,BJ6

,C2,

C48

,D1,

D49

,E1,

E49

,F1,

F49

PCH1F

PANTHER-GP-NF

CP

U/M

ISC

NC

TF

GP

IO

6 OF 10

NC

TF

TE

ST

PIN

:A

4,A

44,A

45,A

46,A

5,A

6,B

3,B

47,

BD

1,B

D49

,BE

1,B

E49

,BF

1,B

F49

,B

G2,

BG

48,B

H3,

BH

47,B

J4,B

J44,

BJ4

5,B

J46,

BJ5

,BJ6

,C2,

C48

,D1,

D49

,E1,

E49

,F1,

F49

PCH1F

PANTHER-GP-NF

1 2R2215 0R2J-2-GPR2215 0R2J-2-GP

1 2R22190R0402-PADR22190R0402-PAD

1 2R1809 1KR2J-1-GPR1809 1KR2J-1-GP

1 TP2215TP2215

12


1TP2212TP2212

12

R223210KR2J-3-GPDY

R223210KR2J-3-GPDY

1 2R2218 100R2J-2-GPR2218 100R2J-2-GP

1 2R2220 10KR2J-3-GPR2220 10KR2J-3-GP

12

R220710KR2J-3-GPDYR220710KR2J-3-GPDY1

2

R222610KR2J-3-GPDY

R222610KR2J-3-GPDY

12

R2206100KR2J-1-GPR2206100KR2J-1-GP

1 2R2201 1KR2J-1-GPR2201 1KR2J-1-GP

1 2R22121KR2J-1-GP

DYR22121KR2J-1-GP

DY

12


1 2R2234 10KR2J-3-GPDYR2234 10KR2J-3-GPDY

1TP2208TP2208

1 2R22111KR2J-1-GP

DY

R22111KR2J-1-GP

DY

1 2R222510KR2J-3-GPR222510KR2J-3-GP

1234 5

678

RN2201

SRN10KJ-6-GP

RN2201

SRN10KJ-6-GP

1 2R2224 10KR2J-3-GP

DYR2224 10KR2J-3-GP

DY

12

R222310KR2J-3-GPR222310KR2J-3-GP

12

R222110KR2J-3-GPR222110KR2J-3-GP


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

+1.8VS_VCCTX_LVDS

+1.05VS_VCC_DMI_CCI

+1.05VS_VCC_DMI

VCCSPI_3D3V

+VCCA_DAC_1_2

+1.05VS_VCC_DMI

+3VS_VCCA_LVDS

VCCAPLLEXP

VCCFDIPLL

+VC

CA

_DA

C_3

V

1D05V_VTT

1D05V_VTT

1D05V_VTT

1D05V_VTT

3D3V_S0

1D05V_VTT

3D3V_S0

1D8V_S0

3D3V_S5

3D3V_S0

3D3V_S0

1D8V_S0

+VCCAFDI_VRM

1D5V_S0+VCCAFDI_VRM

1D05V_VTT

5V_S0 3D3V_DAC_S0

3D3V_DAC_S0

Title


Date: Sheet of


LA480 SD

PCH : POWER1A3


<Core Design>

Title


Date: Sheet of


LA480 SD

PCH : POWER1A3


<Core Design>

Title


Date: Sheet of


LA480 SD

PCH : POWER1A3


<Core Design>

0.001A

0.266A

0.16A

Refer to NPCE795 shared SPI flash architecture

0.042A

0.02A

VCCVRM(Internal PLL and VRMs):A.1.5V for Mobile B.1.8 V for Desktop

SSID = PCH

6A

2.925A(Total current of VCCIO)

0.266A (Totally VCC3_3 current)

0.159A(Totally current of VCCVRM)

0.042A (Totally current of VCCDMI)

(10uF x1)

(0.1uF x1)

1.3A(Total current of VCCCORE)

(22uF x1)(0.01uF x2)0.06A

(0.1uFx1)

(1uFx1)

0.001A

(1uF x1)

(1uFx1)(10uFx1)

0.02A

0.19A

(0.1uFx1)

Reserve 0ohm for power measurement?

Reserve 0ohm for power measurement?

3.3V CRT LDO

74.09091.J3F GMT OBS REASON:G9091 series is going to EOL and no room for further cost reduction. Pls help to use AME AME8818 , TI TLV702 and GMT G90 90 for replacement.

74.09198.G7F OBS1 2R2309

0R0402-PAD

R2309

0R0402-PAD

VCCCORE1AA23

VCCCORE2AC23

VCCCORE3AD21

VCCCORE4AD23

VCCCORE5AF21

VCCCORE6AF23

VCCCORE7AG21

VCCCORE8AG23

VCCCORE9AG24

VCCCORE10AG26

VCCCORE11AG27

VCCCORE12AG29

VCCCORE13AJ23

VCCCORE14AJ26

VCCCORE15AJ27

VCCDFTERM4 AJ17

VCCDFTERM3 AJ16

VCCIO17AN21

VCCIO18AN26

VCCIO19AN27

VCCIO20AP21

VCCIO23AP26

VCCIO24AT24

VCCIO15AN16

VCCIO16AN17

VCCIO21AP23

VCCIO22AP24

VCCADAC U48

VCCTX_LVDS1 AM37

VCCTX_LVDS2 AM38

VCCALVDS AK36

VCCVRM3 AT16

VCCVRM2AP16

VCCAPLLEXPBJ22

VCCAFDIPLLBG6

VCCIO28AN19VCCTX_LVDS4 AP37

VCCTX_LVDS3 AP36

VSSADAC U47

VSSALVDS AK37

VCCIO27AP17

VCC3_3_6 V33

VCC3_3_7 V34

VCC3_3_3BH29 VCCDFTERM2 AG17

VCCDFTERM1 AG16

VCCDMI1 AT20

VCCIO25AN33

VCCIO26AN34

VCCCORE16AJ29

VCCCORE17AJ31

VCCSPI V1

VCCCLKDMI AB36

VCCDMI2AU20

POWER

VC

C C

OR

E

DM

I

VC

CIO

CR

TL

VD

S

FD

I

DF

T /

SP

IH

VC

MO

S

7 OF 10PCH1G

PANTHER-GP-NF

POWER

VC

C C

OR

E

DM

I

VC

CIO

CR

TL

VD

S

FD

I

DF

T /

SP

IH

VC

MO

S

7 OF 10PCH1G

PANTHER-GP-NF

1 2L2301

BLM18PG181SN1D-GP

L2301

BLM18PG181SN1D-GP

12

C2312

SC

1U6D

3V2K

X-G

P

C2312

SC

1U6D

3V2K

X-G

P

12

C2328

SC

1U6D

3V2K

X-G

P

C2328

SC

1U6D

3V2K

X-G

P

1 2R2307

0R0402-PAD

R2307

0R0402-PAD

12


12

C2326SC

10U6D

3V3M

X-G

P

C2326SC

10U6D

3V3M

X-G

P

12

C2307

SC

D1U

10V2K

X-5G

P

C2307

SC

D1U

10V2K

X-5G

P

12

C2302

SC

1U6D

3V2K

X-G

P

C2302

SC

1U6D

3V2K

X-G

P

1 2R2301 0R2J-2-GP

DY

R2301 0R2J-2-GP

DY

12


12


1 2R2306 0R0402-PADR2306 0R0402-PAD

1TP2302TP2302

12


12

C2313

SC

D01U

50V2K

X-1G

P

C2313

SC

D01U

50V2K

X-1G

P

12

C2306

SC

1U6D

3V2K

X-G

P

C2306

SC

1U6D

3V2K

X-G

P

12

C2315

SC

1U6D

3V2K

X-G

P

C2315

SC

1U6D

3V2K

X-G

P

12


12

C2330

SC

1U6D

3V2K

X-G

P

C2330

SC

1U6D

3V2K

X-G

P

IN1

GND2

EN3 NC#4 4

OUT 5

U2302

AME8818BEEV330Z-GP

DY

74.08818.B3F

U2302

AME8818BEEV330Z-GP

DY

74.08818.B3F

12


12

C2324

SC

1U6D

3V2K

X-G

P

DYC2324

SC

1U6D

3V2K

X-G

P

DY

12


1 2R2302 0R2J-2-GPR2302 0R2J-2-GP

12

C2309

SC

1U6D

3V2K

X-G

P

C2309

SC

1U6D

3V2K

X-G

P

12

C2325

SC

1U10

V2K

X-1

GP

DYC2325

SC

1U10

V2K

X-1

GP

DY

12

C2329

SC

1U6D

3V2K

X-G

P

C2329

SC

1U6D

3V2K

X-G

P

12


1 2R23040R0603-PADR23040R0603-PAD

1TP2301TP2301

1 2R2308

0R0402-PAD

R2308

0R0402-PAD

12

C2304

SC

1U6D

3V2K

X-G

P

C2304

SC

1U6D

3V2K

X-G

P

12

C2311

SC

1U6D

3V2K

X-G

P

C2311

SC

1U6D

3V2K

X-G

P

12

C2327

SC

1U6D

3V2K

X-G

P

C2327

SC

1U6D

3V2K

X-G

P

12

C2308

SC

D1U

10V2K

X-5G

P

C2308

SC

D1U

10V2K

X-5G

P

12

C2303

SC

D1U

10V2K

X-5G

P

C2303

SC

D1U

10V2K

X-5G

P

1 2R23050R0603-PADR23050R0603-PAD

12

C2333

SC

10U6D

3V3M

X-G

P

C2333

SC

10U6D

3V3M

X-G

P1

2

C2314

SC

D1U

10V2K

X-5G

P

C2314

SC

D1U

10V2K

X-5G

P


A

A

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1

+V1.05S_SSCVCC

+VCCSUS1

+V1.05S_VCCAPLL_SATA3

+V3.3S_VCC_CLKF33

+V1.05S_SSCVCC

+V3.3S_VCC_CLKF33

+1.05VS_VCCA_A_DPL

+VCCRTCEXT

DCPSUSBYP

VCCACLK

+VCCSST

+VCCDIFFCLK

+1.05VS_VCCA_B_DPL

+5VA_PCH_VCC5REFSUS

+VCCAPLL_CPY_PCH

+5VS_PCH_VCC5REF

+VCCPDSW

+VCCDIFFCLK

+VCCA_USBSUS

V_PROC_IO_R

+1.05VS_VCCA_A_DPL

+1.05VS_VCCA_B_DPL

DCPSUS

1D05V_VTT

3D3V_S5

3D3V_S5

3D3V_S5

3D3V_S0

3D3V_S5

1D05V_M

1D05V_VTT

3D3V_S0

3D3V_S0

1D05V_VTT

1D05V_VTT

1D05V_M

1D05V_VTT

RTC_AUX_S5

1D05V_VTT

3D3V_S0

+VCCAFDI_VRM1D05V_VTT

1D05V_VTT

+VCCDIFFCLKN

1D05V_VTT

3D3V_S5

1D05V_VTT

5V_S0

5V_S5

+VCCAFDI_VRM

+3VS_+1.5VS_HDA_IO

+3VS_+1.5VS_HDA_IO

3D3V_S5

3D3V_S5

Title


Date: Sheet of


LA480 SD

PCH : POWER2A3


<Core Design>

Title


Date: Sheet of


LA480 SD

PCH : POWER2A3


<Core Design>

Title


Date: Sheet of


LA480 SD

PCH : POWER2A3


<Core Design>

0.08A

0.08A

(220uFx1)

(220uFx1)

(1uFx1)

(1uFx1)

(1uFx1)(10uFx1)

(0.1uFx1)

(10uFx1)

0.002A

SSID = PCH

1.01A (Total current of VCCASW)

0.16A (Totally current of VCCVRM

(0.1uFx1)

0.055A

(0.1uFx1)

0.095A

0.001A

6uA

(0.1uFx2)

(1uFx1)

(1uFx1)

(0.1uFx2)

(1uFx1)

(1uFx1)

(4.7uFx1_0603)

(1uFx1)

(0.1uFx1)

(1uFx1)

(0.1uFx2)

(1uFx1)

0.01A

(1uFx1)

0.001A

0.001A

0.097A (Totally current of VCCSUS3_3)

(1uFx1)

(0.1uFx1)

(0.1uFx1)

(0.1uFx1)

(0.1uFx1)

(1uFx1)

1TP2406TP2406

12

C2406

SC

1U6D

3V2K

X-G

P

C2406

SC

1U6D

3V2K

X-G

P

12

C2408

SC

1U6D

3V2K

X-G

P

C2408

SC

1U6D

3V2K

X-G

P

12R2413

0R0402-PAD

R2413

0R0402-PAD

12


12C2415

SCD1U10V2KX-5GPC2415

SCD1U10V2KX-5GP

1 2L2401

IND-10UH-218-GP68.10050.10Y2nd = 68.1001E.10N

L2401

IND-10UH-218-GP68.10050.10Y2nd = 68.1001E.10N

1 2R24090R0603-PADR24090R0603-PAD

12



1 2L2403

IND-10UH-218-GP68.10050.10Y2nd = 68.1001E.10N

L2403

IND-10UH-218-GP68.10050.10Y2nd = 68.1001E.10N

12

C2413SC1U6D3V2KX-GP

C2413SC1U6D3V2KX-GP

12


12


12R2404

0R0402-PAD

R2404

0R0402-PAD

DCPSUSBYPV12

VCCASW1AA19

VCCASW2AA21

VCCASW3AA24

VCCASW5AA27

VCCASW6AA29

VCCSUSHDA P32

VCCSUS3_3_6 P24

VCCIO34 T26

VCCIO4 AD17

VCCASW7AA31

VCCASW8AC26

VCCASW9AC27

VCCASW10AC29

VCCASW11AC31

VCCASW12AD29

V5REF P34

VCC3_3_4 T34

VCCRTCA22

VCCSUS3_3_10 V24

VCCSUS3_3_9 V23

VCCSUS3_3_8 T24

VCCSUS3_3_7 T23

VCCIO2 AC16

VCCADPLLBBF47

VCCDIFFCLKN1AF33

V5REF_SUS M26

VCCIO3 AC17

DCPSUS1T17

VCCSSCAG33

VCCADPLLABD47

VCCVRM4Y49

VCCACLKAD49

DCPRTCN16

VCCASW4AA26

VCCDIFFCLKN2AF34

VCCIO7AF17

DCPSSTV16

VCCIO5 AF13

VCCASW22 T21

VCCASW23 V21

VCCASW21 T19

VCC3_3_1 AA16

VCC3_3_8 W16

VCCSUS3_3_2 N20

VCCSUS3_3_3 N22

VCCSUS3_3_4 P20

VCCSUS3_3_5 P22

VCCIO29 N26

VCCIO30 P26

VCCIO31 P28

VCCIO32 T27

V_PROC_IOBJ8

VCCIO33 T29

VCCDIFFCLKN3AG34

VCCASW13AD31

VCCASW14W21

VCCASW15W23

VCCASW16W24

VCCASW17W26

VCCASW18W29

VCCASW19W31

VCCASW20W33

VCCIO6 AF14

VCCVRM1 AF11

VCCIO12 AH13

VCCIO13 AH14

VCC3_3_2 AJ2

VCCAPLLSATA AK1

DCPSUS3AL24

VCCIO14AL29

DCPSUS4 AN23

VCCSUS3_3_1 AN24

VCCAPLLDMI2BH23

DCPSUS2V19

VCCDSW3_3T16

VCC3_3_5T38

POWER

SA

TA

US

B

Clo

ck a

nd M

isce

llaneous

HD

A

CP

UR

TC

PC

I/G

PIO

/LP

CM

ISC

10 OF 10PCH1J

PANTHER-GP-NF

POWER

SA

TA

US

B

Clo

ck a

nd M

isce

llaneous

HD

A

CP

UR

TC

PC

I/G

PIO

/LP

CM

ISC

10 OF 10PCH1J

PANTHER-GP-NF

12

C2437

SC

1U6D

3V2K

X-G

P

C2437

SC

1U6D

3V2K

X-G

P

12R2405

0R0402-PAD

R2405

0R0402-PAD

1TP2402TP2402

21

D2401CH751H-40PT-GP83.R0304.A8F2nd = 83.R2004.B8F

D2401CH751H-40PT-GP83.R0304.A8F2nd = 83.R2004.B8F1TP2404TP2404

1 2R240810R2J-2-GPR240810R2J-2-GP

12



12

C2417

SC

1U6D

3V2K

X-G

P

C2417

SC

1U6D

3V2K

X-G

P

1 2R240710R2J-2-GPR240710R2J-2-GP

1TP2405TP2405

12

C2403

SC

10U6D

3V3M

X-G

P

C2403

SC

10U6D

3V3M

X-G

P

1TP2401TP2401

1 2R24030R0603-PADR24030R0603-PAD

12


12

C2401SC10U6D3V5KX-1GPC2401SC10U6D3V5KX-1GP

12



12

C2444SC10U6D3V3MX-GPDYC2444SC10U6D3V3MX-GPDY

12

C2414SC1U6D3V2KX-GP

C2414SC1U6D3V2KX-GP

1 TP2407TP2407

12

C2402SC1U10V2KX-1GPC2402SC1U10V2KX-1GP

12


12

C2432SC1U6D3V2KX-GP

C2432SC1U6D3V2KX-GP

12


12


12


12

C2443SC10U6D3V3MX-GPDYC2443SC10U6D3V3MX-GPDY

1 TP2403TP2403

12



1 2R24060R0603-PADR24060R0603-PAD

12


12


12

C2412SC1U6D3V2KX-GP

C2412SC1U6D3V2KX-GP

12

C2436

SC

1U6D

3V2K

X-G

P

C2436

SC

1U6D

3V2K

X-G

P

12

C2407

SC

1U6D

3V2K

X-G

P

C2407

SC

1U6D

3V2K

X-G

P

12


12


12

C2416SC1U6D3V2KX-GP

C2416SC1U6D3V2KX-GP

1 2L2402

IND-10UH-218-GP68.10050.10Y2nd = 68.1001E.10N

L2402

IND-10UH-218-GP68.10050.10Y2nd = 68.1001E.10N

12

C2428SC1U6D3V2KX-GP

C2428SC1U6D3V2KX-GP

12


21




A

A

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1

Title


Date: Sheet of


LA480 SD

PCH : VSSA3


<Core Design>

Title


Date: Sheet of


LA480 SD

PCH : VSSA3


<Core Design>

Title


Date: Sheet of


LA480 SD

PCH : VSSA3


<Core Design>

SSID = PCHVSS159AY4

VSS160AY42

VSS161AY46

VSS162AY8

VSS163B11

VSS164B15

VSS165B19

VSS166B23

VSS167B27

VSS168B31

VSS169B35

VSS170B39

VSS171B7

VSS173BB12

VSS174BB16

VSS175BB20

VSS176BB22

VSS177BB24

VSS178BB28

VSS179BB30

VSS180BB38

VSS181BB4

VSS182BB46

VSS183BC14

VSS184BC18

VSS185BC2

VSS186BC22

VSS187BC26

VSS188BC32

VSS189BC34

VSS190BC36

VSS191BC40

VSS192BC42

VSS193BC48

VSS194BD46

VSS195BD5

VSS196BE22

VSS197BE26

VSS198BE40

VSS199BF10

VSS200BF12

VSS201BF16

VSS202BF20

VSS203BF22

VSS204BF24

VSS205BF26

VSS206BF28

VSS207BD3

VSS208BF30

VSS209BF38

VSS210BF40

VSS211BF8

VSS212BG17

VSS213BG21

VSS214BG33

VSS215BG44

VSS216BG8

VSS217BH11

VSS218BH15

VSS219BH17

VSS220BH19

VSS222BH27

VSS223BH31

VSS224BH33

VSS225BH35

VSS226BH39

VSS227BH43

VSS228BH7

VSS229D3

VSS230D12

VSS231D16

VSS232D18

VSS233D22

VSS234D24

VSS235D26

VSS236D30

VSS237D32

VSS264 K7

VSS265 L18

VSS266 L2

VSS267 L20

VSS268 L26

VSS269 L28

VSS270 L36

VSS271 L48

VSS272 M12

VSS273 P16

VSS274 M18

VSS275 M22

VSS276 M24

VSS277 M30

VSS278 M32

VSS279 M34

VSS280 M38

VSS281 M4

VSS282 M42

VSS283 M46

VSS284 M8

VSS285 N18

VSS286 P30

VSS288 P11

VSS289 P18

VSS290 T33

VSS291 P40

VSS292 P43

VSS293 P47

VSS294 P7

VSS295 R2

VSS296 R48

VSS297 T12

VSS298 T31

VSS299 T37

VSS300 T4

VSS301 W34

VSS302 T46

VSS303 T47

VSS304 T8

VSS305 V11

VSS306 V17

VSS307 V26

VSS308 V27

VSS309 V29

VSS310 V31

VSS311 V36

VSS312 V39

VSS313 V43

VSS314 V7

VSS315 W17

VSS316 W19

VSS238D34

VSS239D38

VSS240D42

VSS241D8

VSS242E18

VSS243E26

VSS244G18

VSS245G20

VSS246G26

VSS247G28

VSS248G36

VSS249G48

VSS250H12

VSS251H18

VSS317 W2

VSS318 W27

VSS319 W48

VSS320 Y12

VSS321 Y38

VSS322 Y4

VSS323 Y42

VSS324 Y46

VSS325 Y8

VSS328 BG29

VSS329 N24

VSS330 AJ3

VSS287 N47

VSS252H22

VSS253H24

VSS254H26

VSS255H30

VSS256H32

VSS257H34

VSS258F3

VSS262 K39

VSS263 K46

VSS259 H46

VSS260 K18

VSS261 K26

VSS331 AD47

VSS333 B43

VSS334 BE10

VSS335 BG41

VSS337 G14

VSS338 H16

VSS340 T36

VSS342 BG22

VSS343 BG24

VSS344 C22

VSS345 AP13

VSS172F45

VSS221H10

VSS346 M14

VSS347 AP3

VSS348 AP1

VSS349 BE16

VSS350 BC16

VSS351 BG28

VSS352 BJ28

9 OF 10PCH1I

PANTHER-GP-NF

9 OF 10PCH1I

PANTHER-GP-NF

VSS1AA17

VSS2AA2

VSS3AA3

VSS5AA34

VSS6AB11

VSS7AB14

VSS8AB39

VSS9AB4

VSS10AB43

VSS11AB5

VSS12AB7

VSS13AC19

VSS14AC2

VSS15AC21

VSS16AC24

VSS17AC33

VSS18AC34

VSS19AC48

VSS20AD10

VSS21AD11

VSS22AD12

VSS23AD13

VSS24AD19

VSS25AD24

VSS26AD26

VSS27AD27

VSS28AD33

VSS29AD34

VSS30AD36

VSS31AD37

VSS33AD39

VSS34AD4

VSS35AD40

VSS36AD42

VSS37AD43

VSS38AD45

VSS39AD46

VSS43AF10

VSS44AF12

VSS46AD16

VSS47AF16

VSS48AF19

VSS49AF24

VSS50AF26

VSS51AF27

VSS52AF29

VSS53AF31

VSS54AF38

VSS55AF4

VSS56AF42

VSS57AF46

VSS59AF7

VSS60AF8

VSS61AG19

VSS62AG2

VSS63AG31

VSS64AG48

VSS65AH11

VSS66AH3

VSS67AH36

VSS68AH39

VSS69AH40

VSS70AH42

VSS71AH46

VSS72AH7

VSS73AJ19

VSS76AJ33

VSS77AJ34

VSS78AK12

VSS79AK3

VSS80 AK38

VSS81 AK4

VSS82 AK42

VSS83 AK46

VSS84 AK8

VSS85 AL16

VSS86 AL17

VSS87 AL19

VSS88 AL2

VSS89 AL21

VSS90 AL23

VSS91 AL26

VSS92 AL27

VSS93 AL31

VSS96 AL48

VSS97 AM11

VSS98 AM14

VSS99 AM36

VSS100 AM39

VSS102 AM45

VSS103 AM46

VSS104 AM7

VSS105 AN2

VSS106 AN29

VSS107 AN3

VSS108 AN31

VSS109 AP12

VSS110 AP19

VSS111 AP28

VSS112 AP30

VSS113 AP32

VSS114 AP38

VSS116 AP42

VSS117 AP46

VSS118 AP8

VSS119 AR2

VSS120 AR48

VSS121 AT11

VSS122 AT13

VSS123 AT18

VSS124 AT22

VSS125 AT26

VSS126 AT28

VSS127 AT30

VSS128 AT32

VSS131 AT42

VSS132 AT46

VSS133 AT7

VSS134 AU24

VSS135 AU30

VSS136 AV16

VSS137 AV20

VSS138 AV24

VSS139 AV30

VSS140 AV38

VSS141 AV4

VSS142 AV43

VSS143 AV8

VSS144 AW14

VSS145 AW18

VSS146 AW2

VSS147 AW22

VSS148 AW26

VSS149 AW28

VSS150 AW32

VSS151 AW34

VSS152 AW36

VSS153 AW40

VSS154 AW48

VSS155 AV11

VSS156 AY12

VSS157 AY22

VSS158 AY28

VSS40AD8

VSS42AE3

VSS45AD14

VSS115 AP4

VSS0H5

VSS58AF5

VSS32AD38

VSS4AA33

VSS74AJ21

VSS75AJ24

VSS41AE2

VSS129 AT34

VSS130 AT39

VSS101 AM43

VSS95 AL34VSS94 AL33

8 OF 10PCH1H

PANTHER-GP-NF

8 OF 10PCH1H

PANTHER-GP-NF


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


LA480 SD

ReservedA4


<Core Design>

Title


Date: Sheet of


LA480 SD

ReservedA4


<Core Design>

Title


Date: Sheet of


LA480 SD

ReservedA4


<Core Design>

BLANK


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

E51_RxD

SML1_DATA

SML1_CLK

BAT_SDABAT_SCL

ECSCI#_KBC

BLUETOOTH_EN

PURE_HW_SHUTDOWN#

PROCHOT_EC

H_PROCHOT#_EC

BAT_IN#

ECRST#_B

AC_IN_KBC

ECRST#

EC_SPI_DI_C

S5_ENABLE

KBC_NOVO_BTN#

KBC_PWRBTN_EC#

AD_OFF

PM_SLP_A#

MODEL_ID_AD

PCB_VER_AD

SMBC_THERMSMBD_THERM

ECRST#

KCOL0

KCOL10KCOL9

KCOL13KCOL12KCOL11

KCOL1

KCOL16KCOL15KCOL14

KCOL2

KCOL5KCOL4KCOL3

KCOL8KCOL7KCOL6

KCOL17

KROW1KROW0

KROW3KROW2

KROW5KROW4

KROW7KROW6PECI

EC_VTT

ECRST#

VBAT

PLT_RST#_EC

LPC_FRAME#_RLPC_AD3_RLPC_AD2_RLPC_AD1_R

LPC_AD0LPC_AD0_R

ECSCI#_KBC

PROCHOT_EC

EC_SPI_DI_C

EC_SPI_CS#_C

EC_SPI_DO_C

EC_SPI_CLK_C

EC

_AG

ND

KBC_VCORF

NC_EC_ENABLE

AC_IN_KBCKBC_PWRBTN_EC#

MODEL_ID_ADADT_TYPEPCB_VER_AD LPC_AD3

LPC_AD2LPC_AD1

ADT_TYPE

3G_EN

LID_CLOSE#

PCIE_WLAN_WAKE#

SATA_ODD_DA#_R

-MSATA_DET

HDD_DET#

NC_KBC_GPIO51

3D3V_S0

3D3V_S0

3D3V_AUX_KBC

3D3V_S0

3D3V_AUX_S5

3D3V_AUX_KBC

3D3V_AUX_S53D3V_AUX_KBC

3D3V_AUX_S5

3D3V_AUX_KBC

3D3V_AUX_KBC

3D3V_AUX_S5

3D3V_AUX_KBC

1D05V_VTT

3D3V_S0_KBC3D3V_AUX_KBC

RTC_AUX_S5

3D3V_AUX_KBC

3D3V_S0

3D3V_AUX_KBC

3D3V_AUX_S5

3D3V_AUX_S5

SMBC_THERM 28,86

SMBD_THERM 28,86

EC_SCI#22

PURE_HW_SHUTDOWN#28,36,86

H_PROCHOT# 5,42

AC_IN# 40

KBC_PWRBTN#68

KCOL[0..15] 69

KROW[0..7] 69

H_PECI5,22

PM_SLP_S3#19,36,37,47

KBC_BEEP29

STOP_CHG#40

KBC_NOVO_BTN#68

E51_RxD65E51_TxD65

AMP_MUTE#29PCH_SUSCLK_KBC19

AD_DETECT38

ME_UNLOCK21

PM_PWRBTN#19,97

PLT_RST# 5,18,31,36,65,66,71,80,82,83,97CLK_PCI_KBC 18

LPC_FRAME# 21,65,71

INT_SERIRQ 21PM_CLKRUN# 19

LPC_AD[0..3] 21,65,71

PANEL_BLEN 49

H_A20GATE 22H_RCIN# 22

TPDATA 69TPCLK 69

BLON_OUT 49

CHG_USB_OC# 82GSENSE_ON# 79

BAT_SDA 39,40BAT_SCL 39,40

SML1_CLK 20SML1_DATA 20

CHG_ON# 40

LAN_PWR_ON 31

SPI_SO_R21,60

SPI_CS0#_R21,60SPI_CLK_R21,60

SPI_SI_R21,60

USB_PWR_EN_R61,62,82AC_PRESENT19

S0_PWR_GOOD19BLUETOOTH_EN63,65

WIFI_RF_EN65

PM_SLP_S4#19,46,97RSMRST#_KBC19

LID_CLOSE#49,70BAT_IN#39

S5_ENABLE36,97

AD_OFF38

GSENSE_Y79GSENSE_X79

CAMERA_EN49

AD_IA40

CAP_LED68

USB_CHG_EN82

RTCRST_ON 21

KBC_RTCRST#21

CPU_CURRENT42VGA_CURRENT42 NUM_LED68

ADP_LED82

USB_AO_SEL082ADT_TYPE38

ECRST#41

AOAC_EN65PM_SLP_A# 19,45

PCIE_WLAN_WAKE#65

SATA_ODD_DA# 18,56

SPI_CS1#_R21,60

CHARGE_LED68

-MSATA_DET66

HDD_DET#56

PWRLED68

DC_BATFULL68

Title


Date: Sheet of

LA480 SD

<Title>


A1


<Core Design>

Title


Date: Sheet of

LA480 SD

<Title>


A1


<Core Design>

Title


Date: Sheet of

LA480 SD

<Title>


A1


<Core Design>

Reset IC: Prevent BIOS data loss solution

EC GPIO standard PH/PL

EC_GPIO47 High Active

PCB Version A/D (Pin98)

Pull-Low Resistor Pull-High Resistor(3D3V_AUX_S5)

Voltage

SA

SB

SC

-1

Reserved

Reserved

Reserved

100.0K

100.0K

100.0K

100.0K

100.0K

100.0K

100.0K

10.0K

20.0K

33.0K

47.0K

64.9K

76.8K

100.0K

3.0V

1.87V

1.65V

2.75V

2.48V

2.24V

2.0V

71.00885.A0GIC EMB CTRL NPCE885PA0DX LQFP 128P

UMA

OPTIMUS

100.0K

MODEL_ID_AD(Pin100)

Pull Down Pull High Voltage

33.0K 2.481V

100.0K 47.0K 2.245V

WHY

R2720 and C2716Need very close to EC

SSID = KBC

<------ TP

<------ BATTERY / CHARGER<------PCH / eDP

65W: 1.7V90W: 3.3V

Code change to Low Active on 8/19

KBSOUT0/GPOB0/JENK# 53

KBSOUT1/GPIOB1/TCK 52

KBSOUT2/GPIOB2/TMS 51

KBSOUT3/GPIOB3/TDI 50

KBSOUT4/GPOB4/JEN0# 49

KBSOUT5/GPIOB5/TDO 48

KBSOUT6/GPIOB6/RDY# 47

KBSOUT7/GPIOB7 43

KBSOUT8/GPIOC0 42

KBSOUT9/GPOC1/SDP_VIS# 41

KBSOUT10_P80_CLK/GPIOC2 40

KBSOUT11_P80_DAT/GPIOC3 39

KBSOUT12/GPIO64 38

KBSOUT13/GPIO63 37

KBSOUT14/GPIO62 36

KBSOUT15/GPIO61/XOR_OUT 35

GPIO60/KBSOUT16 34

GPIO57/KBSOUT17 33

KBSIN0/GPIOA0/N2TCK 54

KBSIN1/GPIOA1/N2TMS 55

KBSIN2/GPIOA2 56

KBSIN3/GPIOA3 57

KBSIN4/GPIOA4 58

KBSIN5/GPIOA5 59

KBSIN6/GPIOA6 60

KBSIN7/GPIOA7 61

GPIO56/TA131

GPIO14/TB163

GPIO1/TB264

GPIO15/A_PWM32

GPIO21/B_PWM118

GPIO13/C_PWM62

GPIO32/D_PWM65

GPIO66/G_PWM81

GPIO33/H_PWM66

GPIO45/E_PWM22

GPIO40/F_PWM16

VCC_POR#85

GPIO0/EXTCLK77

PECI13

VTT12

GPIO87/CIRRXM/SIN_CR113GPIO46/CIRRXM/TRIST#23

GP/I/O83/SOUT_CR/TRIST#111

GPIO55/CLKOUT/IOX_DIN_DIO30

2 OF 2U2701B

NPCE885GA0DX-GP

2 OF 2U2701B

NPCE885GA0DX-GP

12

R271010KR2J-3-GP

DY

R271010KR2J-3-GP

DY

12

R270510KR2J-3-GPR270510KR2J-3-GP

1 2R2738 0R2J-2-GPR2738 0R2J-2-GP

1TP2703TP2703

12

R2776100KR2J-1-GPR2776100KR2J-1-GP

1 TP2707TP2707

12

R2773100KR2J-1-GPR2773100KR2J-1-GP

12

R2775100KR2J-1-GPR2775100KR2J-1-GP

1 2R2711

0R0402-PAD

R2711

0R0402-PAD

12 RC2701

SC33P50V2JN-3GP

DYRC2701SC33P50V2JN-3GP

DY

12

R270710KR2F-2-GP

R270710KR2F-2-GP

VC

C1

19

VC

C2

46

VC

C3

76

VC

C4

88

VC

C5

115

AV

CC

102

VD

D4

GN

D1

18

GN

D2

45

GN

D3

78

GN

D4

89

GN

D5

116

GN

D6

5

AG

ND

103

GPIO11/CLKRUN# 8

LAD3/GPIOF4 1

LAD2/GPIOF3 128

LAD1/GPIOF2 127

LAD0/GPIOF1 126

LFRAME#/GPIOF6 3LCLK/GPIOF5 2

LRESET#/GPIOF7 7

SERIRQ/GPIOF0 125

GPIO85/GA20 121

KBRST#/GPIO86 122

ECSCI#/GPIO54 29GPIO65/SMI# 9

GPIO10/LPCPD# 124

GPIO67N2TMS123

GPIO17/SCL1/N2TCK 70

GPIO73/SCL2 67

GPIO23/SCL3 119

GPIO22/SDA1/N2TMS 69

GPIO74/SDA2 68

GPIO31/SDA3 120

F_SDI_F_SDIO186

F_SDI_F_SDIO087

F_SCK92F_CS0#90

VREF104

GPIO90/AD097

GPIO91/AD198

GPIO92/AD299

GPIO93/AD3100

GPIO94/DA0101

GPIO95/DA1105

GPIO96/DA2106

GPIO37/PSCLK1 72

GPIO26/PSCLK2 10

GPIO35/PSDAT1 71

GPIO27/PSDAT2 11GPIO246

GPIO42/TCK17

GPIO43/TMS20

GPIO44/TDI21

GPIO34/CIRRXL14

GPIO47/SCL4 24

GPIO50/PSCLK3/TDO 25GPIO52/PSDAT3/RDY# 27

GPIO53/SDA4 28

PSL_IN1_GPI70# 73

PSL_OUT_GPIO71# 74

VS

BY

75

GPIO41/F_WP#80

GPIO7582

GPIO7683

GPIO7784

GPIO81/F_WP#91PSL_IN2_GPI6# 93

GPIO7/AD794GPIO3/AD695GPIO4/AD596

GPIO97/DA3107

GPIO5/AD4108

GPIO30/F_WP#109

GPO82/IOX_LDSH/TEST#110GP/I/O84/IOX_SCLK/XORTR#112

VB

KU

P11

4

VCORF 44

GPIO279

GPIO20/TA2/IOX_DIN_DIO117

GPIO3615

GPIO51/N2TCK26

1 OF 2U2701A

NPCE885GA0DX-GP

1 OF 2U2701A

NPCE885GA0DX-GP

1 2R27020R0603-PADR27020R0603-PAD

12

C2709

SC

1U6D

3V2K

X-G

P

C2709

SC

1U6D

3V2K

X-G

P

12

R2732100KR2J-1-GP

R2732100KR2J-1-GP

GND1

RESET#2VCC 3

U2702

G690L293T73UF-GP74.00690.I7B

DYU2702

G690L293T73UF-GP74.00690.I7B

DY

1TP2704TP2704

12


DY


DY

12

C27

15S

C1U

6D3V

2KX

-GP

DY

C27

15S

C1U

6D3V

2KX

-GP

DY

1 2R2721 43R2J-GPR2721 43R2J-GP

1

2

34

5

6

Q2703

2N7002KDW-GP84.2N702.A3F

2nd = 84.DM601.03F

Q2703

2N7002KDW-GP84.2N702.A3F

2nd = 84.DM601.03F

12

C2704

SC

D1U

10V2K

X-5G

P

C2704

SC

D1U

10V2K

X-5G

P

1 2R270810KR2J-3-GP

DYR270810KR2J-3-GP

DY

1 2R2716 0R2J-2-GP

DYR2716 0R2J-2-GP

DY

12

C2710

SC

D1U

10V2K

X-5G

P

C2710

SC

D1U

10V2K

X-5G

P

12 R272233R2J-2-GP R272233R2J-2-GP

1 2C2711SC220P50V2KX-3GP

DYC2711SC220P50V2KX-3GP

DY

1 2R2733

0R0402-PADR2733

0R0402-PAD

12

R272464K9R2F-1-GPBOM CTRL

R272464K9R2F-1-GPBOM CTRL

1 2R2729 33R2J-2-GPR2729 33R2J-2-GP

12

C2706

SC

D1U

10V2K

X-5G

P

C2706

SC

D1U

10V2K

X-5G

P

12

R2701100KR2F-L1-GP

DY

R2701100KR2F-L1-GP

DY1 2R2730 33R2J-2-GPR2730 33R2J-2-GP

12R2723

10KR2J-3-GPR2723

10KR2J-3-GP

1 2R2741 0R0402-PADR2741 0R0402-PAD

1 2R2720 0R2J-2-GPR2720 0R2J-2-GP

12



12

C2716

SCD1U16V2KX-3GP

C2716

SCD1U16V2KX-3GP

12

R271710KR2J-3-GP

DY

R271710KR2J-3-GP

DY

12

R271410KR2J-3-GPR271410KR2J-3-GP

12

R2728100KR2F-L1-GPR2728100KR2F-L1-GP

12

C2713

SC

D1U

10V2K

X-5G

P

C2713

SC

D1U

10V2K

X-5G

P

12

R270410KR2J-3-GPR270410KR2J-3-GP

123

4

RN48

SRN10KJ-5-GP

RN48

SRN10KJ-5-GP

1 TP2705TP2705

1 2R2712

0R0402-PAD

R2712

0R0402-PAD

1 TP2708TP2708

1233R2J-2-GP R271933R2J-2-GP R2719

1

2

3

D2704

BAS16-6-GP

2ND = 83.00016.F1183.00016.K11

D2704

BAS16-6-GP

2ND = 83.00016.F1183.00016.K11

1 2C2714SCD1U10V2KX-5GP

DYC2714SCD1U10V2KX-5GP

DY1 2R2740 0R0402-PADR2740 0R0402-PAD

12

C2701

SC

2D2U

10V3K

X-1G

P

C2701

SC

2D2U

10V3K

X-1G

P

G

S

D

Q2702

2N7002K-2-GP

2ND = 84.2N702.J3184.2N702.031

Q2702

2N7002K-2-GP

2ND = 84.2N702.J3184.2N702.031

12

C2707

SC

D1U

10V2K

X-5G

P

C2707

SC

D1U

10V2K

X-5G

P

12

R272747KR2F-GP

BOM CTRL

R272747KR2F-GP

BOM CTRL

123

4RN2705

SRN10KJ-5-GP

RN2705

SRN10KJ-5-GP

1 2R2739 0R0402-PADR2739 0R0402-PAD

123

4

RN2701

SRN4K7J-8-GP

RN2701

SRN4K7J-8-GP

12R27701KR2J-1-GPR27701KR2J-1-GP

1 2R27090R0805-PADR27090R0805-PAD

12

RC2702

SC

33P50V

2JN-3G

P

DY

RC2702

SC

33P50V

2JN-3G

P

DY

12 R27370R2J-2-GP R27370R2J-2-GP

1 2R2735 0R0402-PADR2735 0R0402-PAD

1233R2J-2-GP R2744SBA

33R2J-2-GP R2744SBA

12

R2726100KR2F-L1-GPR2726100KR2F-L1-GP

1 2R2742 0R0402-PADR2742 0R0402-PAD

123

4RN2703

SRN100KJ-6-GP

RN2703

SRN100KJ-6-GP

1 2R27250R0805-PADR27250R0805-PAD

12

R2774100KR2J-1-GPR2774100KR2J-1-GP

1233R2J-2-GP R2736Non-SBA

33R2J-2-GP R2736Non-SBA

21

G2701GAP-OPEN

G2701GAP-OPEN

12

C2708

SC

D1U

10V2K

X-5G

P

C2708

SC

D1U

10V2K

X-5G

P

12


12

R2706100KR2J-1-GP

DY

R2706100KR2J-1-GP

DY

12

C2705

SC

D1U

10V2K

X-5G

P

DY

C2705

SC

D1U

10V2K

X-5G

P

DY

C

B

E

Q2701MMBT3906-4-GP

2nd = 84.C3906.A1184.03906.F11

Q2701MMBT3906-4-GP

2nd = 84.C3906.A1184.03906.F11

12R271510KR2J-3-GP

DYR271510KR2J-3-GP

DY

1 2R2743 0R0402-PADR2743 0R0402-PAD

12


DY


DY

12R2703470R2J-2-GPR2703470R2J-2-GP


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

FAN_PWM_C

IMVP_PWRGD_T

FAN_TACH

H_THERMDCH_THERMDA

SHDN_SEL

REMOTE2-

THERM_SCI#THERM_SYS_SHDN# SHDN_SEL

TRIP_SET

FAN_TACH_1

2103_VDD

REMOTE2+

FAN_PWM_CFAN_PWM

2103_5

FAN_TACH

2103_4

H_THERMDC

H_THERMDA

REMOTE2+

REMOTE2-

5V_S0_FAN

FAN_PWM

5V_S0_FAN

THERM_SYS_SHDN#

FAN_TACH

THERM_SCI#

3D3V_AUX_S5

3D3V_S0

3D3V_S0

3D3V_S0

5V_S0

3D3V_S0 3D3V_S0

3D3V_S0

SMBC_THERM27,86SMBD_THERM27,86

PURE_HW_SHUTDOWN#27,36,86

IMVP_PWRGD 36,42

Title


Date: Sheet of


LA480 SD

THERMAL SENSOR SMSC EMC2103A3


<Core Design>

Title


Date: Sheet of


LA480 SD



<Core Design>

Title


Date: Sheet of


LA480 SD



<Core Design>

20100707_EMI

TRIP_SET: 649 ohm => 87 dgree C

SA 0905 change to 390p

T8

CPU TEMP:H_THERMDA and H_THERMDC routing 10mil trace width and spacing. Locate Capacity near Thermal diode.

SHDN --> 2N3904 ON External diode

T8 = 98

between CPU, VGA and DIMM on bottom side

1

CPU backside or inside the socket

Close to SO-DIMM on top side.

2200p close to smsc2103 chip

2200p close to smsc2103 chip

pin6, ALERT# ODpin7, SYS_SHDN# OD

2

3

4 WIRE PWM Fan Control circuit

Thermal sensor SSID = Thermal

CHECK PIN DEFINE

20110718_Carrey:For Vendor suggestion, add 390pF Cap. as closed to pin B/C and E of Q2803

20110718_Carrey:For Vendor suggestion, add 10k pull high to 3D3V_S0

1 TP2803TP2803

12

R281210KR2J-3-GPDY

R281210KR2J-3-GPDY

12

EC2801

SC

1KP

50V2K

X-1G

P

DY

EC2801

SC

1KP

50V2K

X-1G

P

DY1 2

C2806 SCD1U10V2KX-4GPC2806 SCD1U10V2KX-4GP

1

AFTP2807AFTP2807

12

R280310K

R2J-3-G

PR2803

10KR

2J-3-GP

1 2R2806 649R2F-GPR2806 649R2F-GP

12

EC2802

SC

1KP

50V2K

X-1G

P

DY

EC2802

SC

1KP

50V2K

X-1G

P

DY

12

R2808100KR2J-1-GP

R2808100KR2J-1-GP

C

B

E

Q2804MMBT3904WT1G-GPQ2804MMBT3904WT1G-GP

1

234

5

6

FAN1

ACES-CON4-GP-U120.F0714.004

FAN1

ACES-CON4-GP-U120.F0714.004

12

C2808SC390P50V2KX-GPC2808SC390P50V2KX-GP

C

B

E

Q2803

MMBT3904WT1G-GP

Q2803

MMBT3904WT1G-GP

12


DY


DY

1 2R28040R0402-PADR28040R0402-PAD

1 2R28110R0402-PADR28110R0402-PAD

1AFTP2801AFTP2801

12 3

4

RN2801

SRN10KJ-5-GP

RN2801

SRN10KJ-5-GP

12

C2805SC2200P50V2KX-2GPC2805SC2200P50V2KX-2GP

G

S

D

Q2801

2N7002K-2-GP

2ND = 84.2N702.J3184.2N702.031

Q2801

2N7002K-2-GP

2ND = 84.2N702.J3184.2N702.031

12

R28016K8R2J-GPR28016K8R2J-GP

1AFTP2805AFTP2805

12

R280568R2-GPR280568R2-GP

C

B

E

Q2802MMBT3904WT1G-GPQ2802MMBT3904WT1G-GP

1 2

3

D2802BAT54PT-GP

2ND = 83.BAT54.D8183.00054.T81 DY

3rd = 83.BAT54.S81

D2802BAT54PT-GP

2ND = 83.BAT54.D8183.00054.T81 DY

3rd = 83.BAT54.S81

12

R28020R0805-PADR28020R0805-PAD

12

C2803SC390P50V2KX-GPC2803SC390P50V2KX-GP

12

R281010KR2J-3-GP

DY

R281010KR2J-3-GP

DY

12

C2801

SC

4D7U

6D3V

3KX

-GP

C2801

SC

4D7U

6D3V

3KX

-GP

1AFTP2806AFTP2806

12

C2804SC390P50V2KX-GP

DY

C2804SC390P50V2KX-GP

DY

1 TP2802TP2802

21

D2801

CH551H-30PT-GP

2ND = 83.R5003.I8F

83.R5003.C8F1st = 83.R5003.J8F

D2801

CH551H-30PT-GP

2ND = 83.R5003.I8F

83.R5003.C8F1st = 83.R5003.J8F

12

C2802SC2200P50V2KX-2GPC2802SC2200P50V2KX-2GP

12

R280910KR2J-3-GPR280910KR2J-3-GP

VDD3

GND 12SMCLK9

TACH 10

GPIO2 5

ND2/DP315DP2/DN316DN11DP12

ALERT#6SYS_SHDN#7

PWM 11

SHDN_SEL 13TRIP_SET 14

GPIO1 4

SMDATA8 GND 17

U2801

EMC2103-2-AP-GP

U2801

EMC2103-2-AP-GP


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

KBC_BEEP_R

AUD_PVDD

AUD_SENSE_A

AUD_SDATA_OUT

AUD_SDATAIN

AUD_MIC1_VREFO_L

HDA_CODEC_BITCLK_R

HDA_CODEC_RST#

AUD_DMIC_DATA

AUD_JDREF

HDA_CODEC_RST#

AUD_PVDD

AUD_DMIC_CLK_R

AUD_DMIC_CLK

AUD_PORTF_R

AUD_PORTF_L

AUD_PORTB_R

AUD_PORTB_L

AUD_MIC1_COMBO

AUD_COMBOJACK

AU

D_S

DA

TA_O

UT

AUD_LDO_CAP

AUD_PVDD

AU

D_D

VD

DAUD_DVDD

AUD_PC_BEEP

AU

D_C

BP

AU

D_C

BN

AUD_CPVEE

AUD_PORTA_R

AUD_PORTA_L

AMP_MUTE#

AUD_MIC1_COMBO

AUD_COMBOJACK

AUD_MIC1_VREFO_L

AUD_MIC1_COMBO_R

HDA_CODEC_BITCLK_R

AU_GND

5V_S0

AUD_5V

AU_GND

AU_GND

AU_GND

AUD_5V

AU_GND

3D3V_S0

AU_GND

AU_GND

AU_GND

AUD_5V5V_S0

AU_GND

3D3V_S0

AU_GND AU_GND AU_GND

AUD_MIC2 58

HDA_CODEC_SYNC 21

HDA_SDIN0 21

KBC_BEEP 27

AUD_MIC2_VREFO 58

AUD_HPOUT_L 82

HDA_SPKR 21

HPOUT_JD 82

AMP_MUTE#27

HDA_CODEC_BITCLK 21

AUD_DMIC_DATA58

AUD_DMIC_CLK58

AUD_SPK_L+58

AUD_SPK_L-58

AUD_SPK_R-58

AUD_SPK_R+58

HDA_CODEC_RST# 21

AUD_HPOUT_R 82

HDA_CODEC_SDOUT21

AUD_MIC1_COMBO_R 82

Title


Date: Sheet of


LA480 SD

AUDIO CODECA2


<Core Design>

Title


Date: Sheet of


LA480 SD

AUDIO CODECA2


<Core Design>

Title


Date: Sheet of


LA480 SD

AUDIO CODECA2


<Core Design>

1A

Capacitor Working Voltage ALC269 having AVDD=5V ±5%, so the capacitors must have a 10V working voltage. A working voltage of 16V is recommended to provide margin for variations in the application

close to pin27

<<Attention>>Surges of PVDD >7V duration 0.1ms whenclass D amplifier is working may damagethe amplifier, 10uF tantalum capacitorsare required at PVDD1 and PVDD2 tosuppress the surge.

close to pin27

For EMI issue.

Tied at one point only under theALC269 or near the ALC269

20100705_AUD

ANALOG

DIGITAL

ANALOG MIC

EXT MIC

EXT MIC

Close to Codec

Close to Codec

Close to Codec

12

R292522KR2J-GPR292522KR2J-GP

1 2R2913 0R0805-PADR2913 0R0805-PAD

12C2906SC2D2U10V3KX-1GPC2906SC2D2U10V3KX-1GP

12


1 2C2914 SC4D7U6D3V3KX-GPC2914 SC4D7U6D3V3KX-GP

12

C2911SC4D7U6D3V3KX-GP

C2911SC4D7U6D3V3KX-GP

1 2R2905 75R2J-1-GPR2905 75R2J-1-GP

12

C2919

SC

1U6D

3V2K

X-G

P

C2919

SC

1U6D

3V2K

X-G

P

12 C2921

SC100P50V2JN-3GPC2921SC100P50V2JN-3GP

12

R292110KR2J-3-GPR292110KR2J-3-GP

12R2917 22R2J-2-GPR2917 22R2J-2-GP

1 2C2916 SC4D7U6D3V3KX-GPB Series-MICC2916 SC4D7U6D3V3KX-GPB Series-MIC

12

C2905SC10U6D3V3MX-GPC2905SC10U6D3V3MX-GP

12


12 R291610KR2J-3-GP

R291610KR2J-3-GP

1 2R291239K2R2F-L-GPR291239K2R2F-L-GP

12

C2922SC33P50V2JN-3GPDY


12

C2926SC6D8P50V2DN-GPDY


1 2R2903 0R0805-PADR2903 0R0805-PAD

12


12

R29154K7R2J-2-GP

R29154K7R2J-2-GP

1 2R2924

22KR2J-GP

R2924

22KR2J-GP

12



1 2R2906 75R2J-1-GPR2906 75R2J-1-GP

12

C2904

SC

D1U

10V2K

X-5G

P

C2904

SC

D1U

10V2K

X-5G

P

12 R291410KR2J-3-GP

R291410KR2J-3-GP

1 2R2918 0R0402-PADR2918 0R0402-PAD

1 2R2901 0R0402-PADR2901 0R0402-PAD

1 2R290920KR2F-L-GPR290920KR2F-L-GP

12



1 2C2907SC10U6D3V3MX-GPC2907SC10U6D3V3MX-GP

12



12

C2920

SC

D1U

10V2K

X-5G

P

C2920

SC

D1U

10V2K

X-5G

P

1 2R2922 2K2R2J-2-GPR2922 2K2R2J-2-GP

DV

DD

11

GP

IO0/

DM

IC-D

AT

A2

GP

IO1/

DM

IC-C

LK3

PD

#4

SD

AT

A-O

UT

5

BIT

-CLK

6

DV

SS

27

SD

AT

A-I

N8

DV

DD

-IO

9

SY

NC

10

RE

SE

T#

11

PC

BE

EP

12

SENSE_A 13

LINE2-L 14

LINE2-R 15

MIC2-L 16

MIC2-R 17

SENSE_B 18

JDREF 19

MONO-OUT 20

MIC1-L 21

MIC1-R 22

LINE1-L 23

LINE1-R 24

AV

DD

125

AV

SS

126

VR

EF

27

LDO

-CA

P28

MIC

2-V

RE

FO

29

MIC

1-V

RE

FO

-R30

MIC

1-V

RE

FO

-L31

HP

-OU

T-L

32

HP

-OU

T-R

33

CP

VE

E34

CB

N35

CB

P36

AVSS237

AVDD238

PVDD139

SPK-L+40

SPK-L-41

PVSS142

PVSS243

SPK-R-44

SPK-R+45

PVDD246

EAPD/COMBO_JACK47

SPDIFO48

GND49

U2901

ALC269Q-VC-GR-GP

U2901

ALC269Q-VC-GR-GP

12

R29204K7R2J-2-GP

DYR29204K7R2J-2-GP

DY

12

C2927

SC

10U6D

3V3M

X-G

P

DY

C2927

SC

10U6D

3V3M

X-G

P

DY

12R2919 0R0402-PADR2919 0R0402-PAD

12



12

C2928SC10U6D3V3MX-GPC2928SC10U6D3V3MX-GP

12C2918

SCD1U10V2KX-5GPC2918

SCD1U10V2KX-5GP

1 2R2902 0R5J-5-GPR2902 0R5J-5-GP

1 2C2915 SC4D7U6D3V3KX-GPC2915 SC4D7U6D3V3KX-GP

1 2R2923 1KR2J-1-GPR2923 1KR2J-1-GP

12

C2902

SC

10U6D

3V3M

X-G

P

C2902

SC

10U6D

3V3M

X-G

P

12

C2901SC4D7U6D3V3KX-GPC2901SC4D7U6D3V3KX-GP

1 2R2904 0R0805-PADR2904 0R0805-PAD

1 2C2917 SC4D7U6D3V3KX-GPB Series-MICC2917 SC4D7U6D3V3KX-GPB Series-MIC

12



12

C2903

SC

D1U

10V2K

X-5G

P

C2903

SC

D1U

10V2K

X-5G

P


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


LA480 SD

ReservedA4


<Core Design>

Title


Date: Sheet of


LA480 SD

ReservedA4


<Core Design>

Title


Date: Sheet of


LA480 SD

ReservedA4


<Core Design>

BLANK


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

LAN_RSET

LAN

_XTA

L0

1D05V_LAN_EVDD10

LAN

_XTA

L1 GPO

1D05V_LAN_REGOUT

LAN_EEDILAN_EEDOLAN_EECS

RTL_ISOLATE#

LAN_EECS

LAN_EEDI

SMB_LAN_DATA

LAN_XTAL1

LAN_XTAL0

RTL_ISOLATE#

LAN_PWR_ON_T

1D05V_LAN_REGOUT

GPO

LAN_ENSWREG

1D05V_LAN_EVDD10

PCIE_RXP4_C

PCIE_RXN4_C

SMB_LAN_DATA

LAN_CLKREQ#

1D05V_LAN_S5

3D3V_S0

3D3V_LAN_S5 3D3V_LAN_S51D05V_LAN_S5 1D05V_LAN_S5

3D3V_LAN_S5

3D3V_LAN_VDDSREG

1D05V_LAN_S5

3D3V_LAN_S5

3D3V_LAN_VDDSREG

1D05V_LAN_S5

1D05V_LAN_S5

1D05V_LAN_S5

3D3V_LAN_S5

3D3V_LAN_S5

3D3V_S5

3D3V_LAN_S5

3D3V_LAN_S5

1D05V_LAN_S5

MDI2+59MDI2-59

MDI3+59MDI3-59

PLT_RST# 5,18,27,36,65,66,71,80,82,83,97

PCIE_WAKE# 19,65,66

MDI0+59MDI0-59

MDI1+59MDI1-59

LAN_PWR_ON27

LAN_ACT_LED# 59

SPEED_100# 59

CLK_PCIE_LAN20CLK_PCIE_LAN#20

PCIE_RXP420

PCIE_RXN420


PCIE_CLK_LAN_REQ#20

Title


Date: Sheet of


LA480 SD

LAN RTL8111FA2


<Core Design>

Title


Date: Sheet of


LA480 SD

LAN RTL8111FA2


<Core Design>

Title


Date: Sheet of


LA480 SD

LAN RTL8111FA2


<Core Design>

High:Link up

C3104 change to 4.7uF X5Rtype capacitor

Low:Link down

L3102 adopt spec.

main pwr if have no ASF

The SM DATA with 10K ohm pull GND.

R3125 For Enable Switch Regulator.R3124 For Disable Switch Regulator.

Layout Note: Close to U3101 pin C3130 ~ C3134,C3138 ,C3139For VDD10 pins - 3, 6, 9, 13, 29, 41, 45.

Layout Note: C3128&C3149Close to U3101 pin21

Layout Note: C3135, C3140~C3144 Close to U3101 pinFor VDD33 pins - 12, 27, 39, 42, 47, 48.

Make sure PCIE_Wake# & PCIE_CLK_LAN_RQ1#connected t o 10Kresistor pull high close to PCH side

25MHz XTAL

71.08111.N03, IC PCIE CTRL RTL8111F-CGT QFN 48P

71.08111.J03, IC PCI-E RTL8111E-VL-CGT QFN 48P8111F can use GPIO to inform system to do LAN PHY p ower down.

VB480

VB580

C3103 C3148

12pF

12pF12pF

15pF

78.12034.1FL

78.15034.1FL

1 2R31310R0603-PADR31310R0603-PAD

12

C3130

SC

D1U

10V2K

X-4G

P

C3130

SC

D1U

10V2K

X-4G

P

1 2R3126 10KR2J-3-GPR3126 10KR2J-3-GP

12

C3142

SC

D1U

10V2K

X-4G

P

C3142

SC

D1U

10V2K

X-4G

P

1 2R3123 2K49R2F-GPR3123 2K49R2F-GP

12

C3133

SC

D1U

10V2K

X-4G

P

C3133

SC

D1U

10V2K

X-4G

P

12

C3146

SC

4D7U

6D3V

3KX

-GP

C3146

SC

4D7U

6D3V

3KX

-GP

12

C3151

SC

D1U

10V2K

X-4G

P

C3151

SC

D1U

10V2K

X-4G

P

12

C3152

SC

D1U

10V2K

X-4G

P

C3152

SC

D1U

10V2K

X-4G

P

1 2R3128 10KR2J-3-GPR3128 10KR2J-3-GP

12

C3138

SC

D1U

10V2K

X-4G

P

C3138

SC

D1U

10V2K

X-4G

P

12

C3103SC12P50V2JN-3GPBOM CTRL

C3103SC12P50V2JN-3GPBOM CTRL

1 2R3120 1KR2J-1-GPR3120 1KR2J-1-GP



1 2R3135 0R5J-5-GP

DY

R3135 0R5J-5-GP

DY

1 2L3102IND-4D7UH-192-GPL3102IND-4D7UH-192-GP

12

C3131

SC

D1U

10V2K

X-4G

P

C3131

SC

D1U

10V2K

X-4G

P

12R31210R0402-PAD R31210R0402-PAD

12

C3143

SC

D1U

10V2K

X-4G

P

C3143

SC

D1U

10V2K

X-4G

P

12

C3134

SC

D1U

10V2K

X-4G

P

C3134

SC

D1U

10V2K

X-4G

P

1 2R3122 10KR2J-3-GPR3122 10KR2J-3-GP

12

C3139

SC

D1U

10V2K

X-4G

P

C3139

SC

D1U

10V2K

X-4G

P

12

R3133100KR2J-1-GPR3133100KR2J-1-GP

1 2R3130 1M1R2J-GPR3130 1M1R2J-GP

12

R311915KR2F-GPR311915KR2F-GP

12

R31361KR2J-1-GPR31361KR2J-1-GP

12

C3144

SC

D1U

10V2K

X-4G

P

C3144

SC

D1U

10V2K

X-4G

P

12

C3135

SC

D1U

10V2K

X-4G

P

C3135

SC

D1U

10V2K

X-4G

P

12

C3128

SC

1U10V

2KX

-1GP

C3128

SC

1U10V

2KX

-1GP

1 TP3102TP3102

1 2R3125 0R0402-PADR3125 0R0402-PAD

12

C3150

SC

1U10V

2KX

-1GP

C3150

SC

1U10V

2KX

-1GP

12

C3140

SC

D1U

10V2K

X-4G

P

C3140

SC

D1U

10V2K

X-4G

P

DV

DD

1013

GN

D24

HS

IP17

HS

IN18

RE

FC

LK_P

19

RE

FC

LK_N

20

EV

DD

1021

HS

OP

22

HS

ON

23

SM

BC

LK14

SM

BD

AT

A15

CLK

RE

Q#

16

AVDD103

MDIP01

MDIN02

AVDD106

MDIP14

MDIN15

AVDD109

MDIP27

MDIN28

AVDD3312

MDIP310

MDIN311

REGOUT 36

VDDREG 35

VDDREG 34

ENSWREG 33

EEDI/SDA 32

LED3/EEDO 31

EECS/SCL 30

DVDD10 29

DVDD33 27

ISOLATE# 26

PERST# 25

LANWAKE# 28

AV

DD

3348

AV

DD

3347

RS

ET

46

AV

DD

1045

CK

XT

AL2

44

CK

XT

AL1

43

AV

DD

3342

DV

DD

1041

LED

040

DV

DD

339

GP

O/S

MB

ALE

RT

38

LED

1/E

ES

K37

GND49U3101

RTL8111F-CGT-GP

U3101

RTL8111F-CGT-GP

D

G

S

Q3103AO3419L-GP

3rd = 84.03334.0312nd = 84.00048.03184.03419.031

Q3103AO3419L-GP

3rd = 84.03334.0312nd = 84.00048.03184.03419.031

12

R31240R2J-2-GPDYR31240R2J-2-GPDY

12

C3129

SC

D1U

10V2K

X-4G

P

C3129

SC

D1U

10V2K

X-4G

P

12

C3149

SC

D1U

10V2K

X-4G

P

C3149

SC

D1U

10V2K

X-4G

P



12

C3137

SC

4D7U

6D3V

3KX

-GP

C3137

SC

4D7U

6D3V

3KX

-GP

12

C3148SC12P50V2JN-3GPC3148SC12P50V2JN-3GP

12

C3141

SC

D1U

10V2K

X-4G

P

C3141

SC

D1U

10V2K

X-4G

P

G S

D

Q31042N7002K-2-GP

84.2N702.J312ND = 84.2N702.031

Q31042N7002K-2-GP

84.2N702.J312ND = 84.2N702.031

12

C3132

SC

D1U

10V2K

X-4G

P

C3132

SC

D1U

10V2K

X-4G

P

4 1

23

X3101

XTAL-25MHZ-155-GP82.30020.D41

2nd = 82.30020.G713rd = 82.30020.G61

X3101

XTAL-25MHZ-155-GP82.30020.D41

2nd = 82.30020.G713rd = 82.30020.G61

12

C3136

SC

D1U

10V2K

X-4G

P

C3136

SC

D1U

10V2K

X-4G

P

1 2R31340R0603-PADR31340R0603-PAD


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


LA480 SD

R5U220 (CARD READER)A1


<Core Design>

Title


Date: Sheet of


LA480 SD



<Core Design>

Title


Date: Sheet of


LA480 SD



<Core Design>


A

A

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1

Title


Date: Sheet of


LA480 SD

ReservedA4


<Core Design>

Title


Date: Sheet of


LA480 SD

ReservedA4


<Core Design>

Title


Date: Sheet of


LA480 SD

ReservedA4


<Core Design>

BLANK


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


LA480 SD

ReservedA4


<Core Design>

Title


Date: Sheet of


LA480 SD

ReservedA4


<Core Design>

Title


Date: Sheet of


LA480 SD

ReservedA4


<Core Design>

BLANK


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


LA480 SD

USB 3.0 ControllerA4


<Core Design>

Title


Date: Sheet of


LA480 SD



<Core Design>

Title


Date: Sheet of


LA480 SD



<Core Design>

BLANK


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

RU

N_E

NA

BLE

_ALL_G

Z_12V

PM_SLP_S3 PM_SLP_S3#

Z_12V_D4

Z_12V_G3

1D05V_VTT

3D3V_S5

RUN_ENABLE

1D5V_S0 1D5V_S3

3D3V_S0 3D3V_S5

5V_S0 5V_S5

DCBATOUT

3D3V_AUX_S5

PLT_RST#5,18,27,31,65,66,71,80,82,83,97

H_THERMTRIP# 5,22

PURE_HW_SHUTDOWN# 27,28,86

S5_ENABLE 27,97

3V_5V_EN41

PM_SLP_S3#19,27,37,47

PS_S3CNTRL 37,97

PM_SLP_S3#19,27,37,47

IMVP_PWRGD28,42

PM_SLP_S3#19,27,37,47

SYS_PWROK 19

Title


Date: Sheet of


LA480 SD

Power Plane EnableA1


<Core Design>

Title


Date: Sheet of


LA480 SD



<Core Design>

Title


Date: Sheet of


LA480 SD



<Core Design>

R3614CRB : 1K

Power Sequence

Total= 11.39A

1D5V_S0MAX Current 3000 mADesign Current 2100 mA

Run Power

12

R3602200KR2F-L-GP

DY

R3602200KR2F-L-GP

DY

12

C36

02S

CD

1U10

V2K

X-5

GP

C36

02S

CD

1U10

V2K

X-5

GP C

B

E

Q3601MMBT2222A-3-GPQ3601MMBT2222A-3-GP

12

C3612SCD01U50V2KX-1GPDYC3612SCD01U50V2KX-1GPDY

1 2R3603 2KR2F-3-GPR3603 2KR2F-3-GP

12

R3621

330KR

2J-L1-GP

R3621

330KR

2J-L1-GP

1

2

34

5

6

Q3605

2N7002KDW-GP84.2N702.A3F

2nd = 84.DM601.03F

Q3605

2N7002KDW-GP84.2N702.A3F

2nd = 84.DM601.03F

1 2

R3614

1KR2F-3-GP

R3614

1KR2F-3-GP

1 2C3607 SCD1U50V3KX-GP

DYC3607 SCD1U50V3KX-GP

DY

12

R36322K2R2J-2-GPR36322K2R2J-2-GP

1 2R3612 10KR2J-3-GPR3612 10KR2J-3-GP

1234 5

678S

SSG D

DDD

U3601

AO4468-GP84.04468.037

2nd = 84.08882.037

SSSG D

DDD

U3601

AO4468-GP84.04468.037

2nd = 84.08882.037

12

C3606

SC

D22U

25V3K

X-G

P

C3606

SC

D22U

25V3K

X-G

P

1234 5

678S

SSG D

DDD

U3602

AO4468-GP84.04468.037

2nd = 84.08882.037

SSSG D

DDD

U3602

AO4468-GP84.04468.037

2nd = 84.08882.037

G S

D

Q36062N7002K-2-GP

84.2N702.J312ND = 84.2N702.031

Q36062N7002K-2-GP

84.2N702.J312ND = 84.2N702.031

1

2

3D3601BAS16-6-GP

2ND = 83.00016.M1183.00016.K11

3rd = 83.00016.N11

D3601BAS16-6-GP

2ND = 83.00016.M1183.00016.K11

3rd = 83.00016.N11

AK

D3602MMPZ5239BPT-GP83.9R103.D3F

D3602MMPZ5239BPT-GP83.9R103.D3F

1 2R3608 100KR2J-1-GPR3608 100KR2J-1-GP1 2

R36164K7R2J-2-GPR36164K7R2J-2-GP

1234 5

678S

SSG D

DDD

U3606

AO4468-GP84.04468.037

2nd = 84.08882.037

SSSG D

DDD

U3606

AO4468-GP84.04468.037

2nd = 84.08882.037

G

S D

Q3604

NDS0610-NL-GP

2ND = 84.00610.C3184.S0610.B31Q3604

NDS0610-NL-GP

2ND = 84.00610.C3184.S0610.B31

1

2

3

D3603BAS16-6-GP

2ND = 83.00016.M1183.00016.K11

3rd = 83.00016.N11

D3603BAS16-6-GP

2ND = 83.00016.M1183.00016.K11

3rd = 83.00016.N11

1 2R362256R2J-4-GP

DYR362256R2J-4-GP

DY

1 2R3626 0R0402-PADR3626 0R0402-PAD

12

R3617100KR2J-1-GPR3617100KR2J-1-GP

1TP3601TP3601

G

S

D

Q3603

2N7002K-2-GP84.2N702.J31

2nd = 84.2N702.031

Q3603

2N7002K-2-GP84.2N702.J31

2nd = 84.2N702.031

1 2R3618 330KR2J-L1-GPR3618 330KR2J-L1-GP

12

R362010KR2J-3-GPR362010KR2J-3-GP

12



1 2R3619 10KR2J-3-GPR3619 10KR2J-3-GP


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PS_S3CNTRL

Q37

02_D

Q37

01_D

SM_DRAMRST#_D

VDDPWRGOOD_R

VD

DP

WR

GO

OD

_D

PM_DRAM_PWRGD_R

0D75V_EN

0D75V_EN

SM_DRAMRST#_R

1D5V_S00D75V_S0

1D5V_S3

3D3V_S5

1D5V_S0

PS_S3CNTRL36,97

+V_SM_VREF_CNT 9

DDR3_DRAMRST# 14,15

DRAMRST_CNTRL_PCH 12,20

SM_DRAMRST#5

PM_DRAM_PWRGD19

VDDPWRGOOD 5

PS_S3CNTRL36,97

0D75V_EN 46

PS_S3CNTRL36,97

1.05VTT_PWRGD 45,48

PM_SLP_S3#19,27,36,47

PM_SLP_S3# 19,27,36,47

+V_SM_VREF12

Title


Date: Sheet of


LA480 SD

ADAPTERA3


<Core Design>

Title


Date: Sheet of


LA480 SD

ADAPTERA3


<Core Design>

Title


Date: Sheet of


LA480 SD

ADAPTERA3


<Core Design>

Close to CPUS3 Power Reduction Circuit Processor VREF_DQ Implem entation

Close to DIMMS3 Power Reduction Circuit SM_DRAMPWROK

Close to CPUS3 Power Reduction Circuit SM_DRAMPWROK

S3 Power Reduction CircuitSM_DRAMRST#

Close to CPUS3 Power Reduction Circuit SM_DRAMPWROK

OD AND gate required

SM_DRAMPWROK must have a maximum of 15ns rise or fa ll timeover VDDQ * 0.55± 200mV and the edge must be monoto nic

5 S3 Power Reduction

add 0.1uF

FROM M1/M3

DEL R3714R3705 ->100KDY C3701

12

R37200R2J-2-GPDYR37200R2J-2-GPDY

12

R3713200R2F-L-GPR3713200R2F-L-GP

12

C3705SCD1U10V2KX-5GPDYC3705SCD1U10V2KX-5GPDY

G S

DQ3701

2N7002K-2-GP84.2N702.J31

2ND = 84.2N702.031

Q3701

2N7002K-2-GP84.2N702.J31

2ND = 84.2N702.031

1 2R3716 22R2J-2-GP

DYR3716 22R2J-2-GP

DY

12

R3704220R2J-L2-GP DY

R3704220R2J-L2-GP DY

1 2R3709 0R2J-2-GP

DYR3709 0R2J-2-GP

DY

1 2R37110R0402-PADR37110R0402-PAD

1 2R3719130R2F-1-GPR3719130R2F-1-GP

12


DY


DY

12

R3705100KR2J-1-GP

R3705100KR2J-1-GP

12

R37061KR2F-3-GPR37061KR2F-3-GP

G

S

D

Q3704

2N7002K-2-GP84.2N702.J312ND = 84.2N702.031

Q3704

2N7002K-2-GP84.2N702.J312ND = 84.2N702.031

12


DYC3704SCD1U10V2KX-5GP

DY

12

C3702SC100P50V2JN-3GP

DY C3702SC100P50V2JN-3GP

DY

1 2R3707 0R2J-2-GP

DYR3707 0R2J-2-GP

DY

G S

DQ3702

2N7002K-2-GP84.2N702.J31

2ND = 84.2N702.031

DYQ3702

2N7002K-2-GP84.2N702.J31

2ND = 84.2N702.031

DY

12

C3703SCD047U16V2KX-1-GPC3703SCD047U16V2KX-1-GP

12

R370322R2J-2-GP

R370322R2J-2-GP

1 2R37121KR2F-3-GPR37121KR2F-3-GP

12

R37100R0402-PADR37100R0402-PAD

G

S

D

Q3708

2N7002K-2-GP84.2N702.J31

2ND = 84.2N702.031

Q3708

2N7002K-2-GP84.2N702.J31

2ND = 84.2N702.031

G

S

D

Q3707

2N7002K-2-GP

DY

84.2N702.J312ND = 84.2N702.031

Q3707

2N7002K-2-GP

DY

84.2N702.J312ND = 84.2N702.031

12

R3708200R2F-L-GPR3708200R2F-L-GP

G

S

D

Q3703

2N7002K-2-GP84.2N702.J31

2ND = 84.2N702.031

Q3703

2N7002K-2-GP84.2N702.J31

2ND = 84.2N702.031

12

R372239R2J-L-GPDYR372239R2J-L-GPDY

1 2R3715 0R0402-PADR3715 0R0402-PAD IN B1

IN A2

GND3 OUT Y 4

VCC 5U3701

74VHC1G09DFT2G-GP

73.01G09.AAH

3rd = 73.01G09.BAH2nd = 73.01G09.0AB

U3701

74VHC1G09DFT2G-GP

73.01G09.AAH

3rd = 73.01G09.BAH2nd = 73.01G09.0AB

12

R37014K99R2F-L-GP

DY

R37014K99R2F-L-GP

DY


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

AD+_2

ADT_TYPE_R

AD_JK_F

AD_OFF#_1

ADT_TYPE_RAD_JK_F

ADT_TYPE_R1

GND

AD+AD_JK

3D3V_AUX_KBC

AD_OFF27

AD_DETECT 27

ADT_TYPE 27

Title


Date: Sheet of


SD

DCIN_JACK

A3


LA480

<Core Design>

Title


Date: Sheet of


SD

DCIN_JACK

A3


LA480

<Core Design>

Title


Date: Sheet of


SD

DCIN_JACK

A3


LA480

<Core Design>

Adaptor in to generate DCBATOUT

DCIN14 for 14" VB480 & VB485DCIN15 for 15" VB580 & VB585

Id= -10AQg= -22nCRdson=14~22mohm

12

R3801274R2F-GPR3801274R2F-GP

1

2345

6

78910

DCIN14

MLX-CONN10-4-GP21.D0241.205

DCIN14

MLX-CONN10-4-GP21.D0241.205

12

PC3802

SC

1U50V

5ZY

-1-GP

PC3802

SC

1U50V

5ZY

-1-GP

1AFTP3805AFTP3805

12

PR380434K8R2F-1-GPDYPR380434K8R2F-1-GPDY

1 2PR38060R0402-PADPR38060R0402-PAD

1AFTP3802AFTP3802

12

PR3803200KR2F-L-GPDYPR3803200KR2F-L-GPDY

12

PC3806SCD1U50V3KX-GPDY


12

C3802

SC

1KP

50V

2KX

-1G

P

C3802

SC

1KP

50V

2KX

-1G

P

1 23 PD3802

BAV99-8-GP

PD3802

BAV99-8-GP

12

PR3802100KR2J-1-GPPR3802100KR2J-1-GP

1AFTP3801AFTP3801

12

PC3807SCD1U50V3KX-GPPC3807SCD1U50V3KX-GP

1AFTP3804AFTP3804

EB

C

R1

R2PQ3802

PDTA124EU-1-GP84.00124.K1K2ND = 84.00024.01K

R1

R2PQ3802

PDTA124EU-1-GP84.00124.K1K2ND = 84.00024.01K

12

PC3803SCD1U50V3KX-GP DY

PC3803SCD1U50V3KX-GP DY

12

PR3801

200KR

2F-L-G

P

PR3801

200KR

2F-L-G

P

AK PD3801

P6SBMJ27APT-GP83.P6SBM.DAG

3TH = 83.P6SMB.CAG2ND = 83.P6SMB.JAG

PD3801P6SBMJ27APT-GP83.P6SBM.DAG

3TH = 83.P6SMB.CAG2ND = 83.P6SMB.JAG

1AFTP3806AFTP38061AFTP3803AFTP3803

12



1 2F3801

FUSE-7A24V-5-GP

F3801

FUSE-7A24V-5-GP

EB

CR1

R2

PQ3801

PDTC124EU-1-GP84.00124.H1K

2ND = 84.00124.X1K

R1

R2

PQ3801

PDTC124EU-1-GP84.00124.H1K

2ND = 84.00124.X1K

12

PR3805100KR2J-1-GP

DY PR3805100KR2J-1-GP

DY

1234 5

678S

SSG D

DDD

PU3801

AO4407AL-GP84.04407.G37

SSSG D

DDD

PU3801

AO4407AL-GP84.04407.G37

12

C3801

SC

100P

50V

2JN

-3G

P

C3801

SC

100P

50V

2JN

-3G

P


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

BT+

BATA_SCL_1BATA_SDA_1BAT_IN#_1

BA

T_S

CL

BA

T_S

DA

BA

T_IN

#

BATA_SCL_1

BAT_IN#_1

BATA_SDA_1

BT+

3D3V_AUX_KBC

BT+

BAT_IN#27

BAT_SCL27,40BAT_SDA27,40

Title


Date: Sheet of


SD

BATT_CONN


LA480

<Core Design>

Title


Date: Sheet of


SD

BATT_CONN


LA480

<Core Design>

Title


Date: Sheet of


SD

BATT_CONN


LA480

<Core Design>

DY on LAB stage

BATTERY CONNECTOR

Varistor

Swap for V480

ME change P/N at SITOld 20.81529.007Nwq 20.81720.007

1234 5

678

RN3901

SRN33J-7-GP

RN3901

SRN33J-7-GP

12

PC3904

SC

10P50V

2JN-4G

P

PC3904

SC

10P50V

2JN-4G

P

12

PC3905SC470P50V2KX-3GP


1AFTP3908AFTP3908

KA

PD3901MMPZ5232BPT-GP-U

83.5R603.D3F2ND = 83.5R603.Q3F

PD3901MMPZ5232BPT-GP-U

83.5R603.D3F2ND = 83.5R603.Q3F

1AFTP3910AFTP3910

1AFTP3906AFTP3906

1AFTP3903AFTP3903

1AFTP3909AFTP3909

12

PL3903

MLV

S0402M

04-GP

DY

PL3903

MLV

S0402M

04-GP

DY

12

PL3901

MLV

S0402M

04-GP

DY

PL3901

MLV

S0402M

04-GP

DY

BAT_VCC1

BAT_VCC2

I2C_CLK3

I2C_DAT4

TEMP5

GND6

GND7

GND8

GND9

BAT1

ALP-CON7-33-GP20.81720.007

BAT1

ALP-CON7-33-GP20.81720.007

12

PL3902

MLV

S0402M

04-GP

DY

PL3902

MLV

S0402M

04-GP

DY

1 2

3 D3903

BAV99-8-GP

DY D3903

BAV99-8-GP

DY1AFTP3907AFTP3907

1AFTP3902AFTP3902

12

PC3903

SC

10P50V

2JN-4G

P

PC3903

SC

10P50V

2JN-4G

P

1AFTP3904AFTP3904

1 2

3 D3902

BAV99-8-GP

DY D3902

BAV99-8-GP

DY

1AFTP3905AFTP3905

12

PC3901SCD1U50V3KX-GP


1 2

3 D3901

BAV99-8-GP

DY D3901

BAV99-8-GP

DY

12

PC3902SC2200P50V2KX-2GPPC3902SC2200P50V2KX-2GP


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

BQ24737_CMPIN

PWR_CHG_IOUT

BQ24737_REGN_R

BQ24737_CMPOUT

BQ24737_ILIM

BQ24737_HIDRV

BQ24737_PHASE

BQ24737_CMPOUT

BT+_R

BQ24737_CSOP_1

AC_IN#

PW

R_C

HG

_AC

N

PW

R_C

HG

_AC

P

BQ24737_BTSTBQ24737_ACDET

AC_IN

AD+_G_2

PWR_CHG_IOUT

AD

+_G_1

DC

_IN_D

BQ24737_CSON_1

BQ24737_VCC

BQ24737_SRP

BQ24737_SRN

AC_IN#

AC_IN

BAT_SDA

BAT_SCL

BQ24737_LODRV

DCBATOUT_L

DCBATOUT

DCBATOUTAD+_TO_SYS

AD+

CHG_AGND

CHG_AGNDCHG_AGND

CHG_AGND

BT+

AD+

BT+

CHG_AGND

AD_JK

CHG_AGND

3D3V_AUX_S5

CHG_AGND

BQ24737_REGN

3D3V_AUX_S5

3D3V_AUX_S5

3D3V_AUX_S5

3D3V_AUX_S5

CHG_AGND

CHG_AGND

BQ24737_REGN

CHG_AGND

BQ24737_REGN

3D3V_AUX_S5 CHG_AGND

BAT_SDA27,39

BAT_SCL27,39

AD_IA 27

STOP_CHG#27

CHG_ON# 27

AC_IN#27

Title


Date: Sheet of

LA480 SD

<Title>


A2


<Core Design>

Title


Date: Sheet of

LA480 SD

<Title>


A2


<Core Design>

Title


Date: Sheet of

LA480 SD

<Title>


A2


<Core Design>

100K90w

120w

AD+ total power

118k

60.4k

100K

R2R1

12.4K

100K

100K

80w

65w

A8( ANNIE/ASTRO)PR4007,PR4008

41.2k

STOP_CHG#connects to KBC R1

R2

Charger Current=1.4~3.6A

SSID = Charger



64.12425.6DL

64.60425.6DL

12

PC4007SCD01U50V2KX-1GPPC4007SCD01U50V2KX-1GP

12

PR4032100KR2J-1-GPPR4032100KR2J-1-GP

12

PR4008100KR2F-L1-GPPR4008100KR2F-L1-GP

1 2PR4034 3K3R2J-3-GP

DYPR4034 3K3R2J-3-GP

DY

12

PR4030100KR2J-1-GPPR4030100KR2J-1-GP

G

SD

PQ4008

2N7002A-7-GP

2ND = 84.2N702.D3184.2N702.E31

PQ4008

2N7002A-7-GP

2ND = 84.2N702.D3184.2N702.E31

ILIM10

VCC20

GN

D14

SCL9

SDA8

ACDET6

IOUT 7ACOK#5

AC

P2

AC

N1

BTST 17

REGN 16

HIDRV 18

PHASE 19

LODRV 15

CMPIN4

SRN 12

CMPOUT3

SRP 13

GN

D21

BM#11

PU4003

BQ24737RGRR-GP

PU4003

BQ24737RGRR-GP

12

PR4014120KR2F-L-GPPR4014120KR2F-L-GP

1 2PR40180R0402-PADPR40180R0402-PAD

1234 5

678S

SSG D

DDD

PU4002

AO4407AL-GP84.04407.G37

SSSG D

DDD

PU4002

AO4407AL-GP84.04407.G37

12345 6 7 8

SSSGD D D D

PU4004SIS412DN-T1-GE3-GP

SSSGD D D D


12


12


12

PG4001GAP-CLOSE-PWR-3-GP

PG4001GAP-CLOSE-PWR-3-GP

12


12

PC

4001

SC

1U25V

5KX

-1GP

PC

4001

SC

1U25V

5KX

-1GP

12

PC

4024S

C10U

25V5K

X-G

PP

C4024

SC

10U25V

5KX

-GP

1 2

PR402510R2F-L-GP

PR402510R2F-L-GP

G

SD

PQ40052N7002A-7-GPPQ40052N7002A-7-GP

K A

PD4003CH520S-30PT-GP

2nd = 83.1R003.N8F3rd = 83.R2003.B8M

1st = 83.R2003.P8F

PD4003CH520S-30PT-GP

2nd = 83.1R003.N8F3rd = 83.R2003.B8M

1st = 83.R2003.P8F

12

PC

4005S

C10U

25V5K

X-G

PP

C4005

SC

10U25V

5KX

-GP

12

PC4019SC

10U25V

5KX

-GP

PC4019SC

10U25V

5KX

-GP

12

PR4029100KR2J-1-GPPR4029100KR2J-1-GP

12P

G4003

GA

P-C

LOS

E-P

WR

-3-GP

PG

4003G

AP

-CLO

SE

-PW

R-3-G

P

12



1 2PR40247D5R2F-GPPR40247D5R2F-GP

1 2

PL4001

IND-5D6UH-48-GP-U1

PL4001

IND-5D6UH-48-GP-U1

12

PR400110KR2F-2-GP

PR400110KR2F-2-GP

12

PR400712K4R2F-GPBOM CTRL

PR400712K4R2F-GPBOM CTRL

12

PC

4023S

CD

1U25V

2KX

-GP

PC

4023S

CD

1U25V

2KX

-GP

12

PC4020

SC

10U25V

5KX

-GP

PC4020

SC

10U25V

5KX

-GP

12

PR400910KR2F-2-GP

PR400910KR2F-2-GP

12

PG4002GAP-CLOSE-PWR-3-GPPG4002GAP-CLOSE-PWR-3-GP

12

PC4003PC4003

12

PC

4022S

CD

1U50V

3KX

-GP

PC

4022S

CD

1U50V

3KX

-GP

12

PR4002100KR2J-1-GPPR4002100KR2J-1-GP

12

PR400349K9R2F-L-GP

PR400349K9R2F-L-GP

12345

678 S

SSGD

DDD

PU4001

AO4407AL-GP84.04407.G37

SSSGD

DDD

PU4001

AO4407AL-GP84.04407.G37

12

PR402210KR2F-2-GP

DY

PR402210KR2F-2-GP

DY

12

PR4005470KR2J-2-GPPR4005470KR2J-2-GP

12

PR40163D3MR2J-GP

PR40163D3MR2J-GP

1 2

PC4009SC1U10V2KX-1GPPC4009SC1U10V2KX-1GP

12

PR402633KR2F-GPDYPR402633KR2F-GPDY

12

PC4021

SC

10U25V

5KX

-GP

PC4021

SC

10U25V

5KX

-GP

12



12345 6 7 8

SSSGD D D D

PU4005SIS

412DN

-T1-GE

3-GP

SSSGD D D D

PU4005SIS

412DN

-T1-GE

3-GP

12

PR4006316KR3F-2-GPPR4006316KR3F-2-GP

12

PR4011100KR2J-1-GPPR4011100KR2J-1-GP

1 2L4001

BLM18PG330SN1D-GP

68.00143.041L4001

BLM18PG330SN1D-GP

68.00143.041

12


12P

G4004

GA

P-C

LOS

E-P

WR

-3-GP

PG

4004G

AP

-CLO

SE

-PW

R-3-G

P

1 2

PR4017D01R3721F-GP-U


12

PR401049K9R2F-L-GP

PR401049K9R2F-L-GP

G

SD

PQ40072N7002A-7-GPPQ40072N7002A-7-GP

12


12

PR4020100KR2J-1-GPPR4020100KR2J-1-GP

1 2PR4019

0R2J-2-GP

PR4019

0R2J-2-GP

1 2L4002

BLM18PG330SN1D-GP

68.00143.041

L4002

BLM18PG330SN1D-GP

68.00143.041

1

2

3 4

5

6

PQ4001

2N7002KDW-GP

84.2N702.A3F2nd = 84.DM601.03F

PQ4001

2N7002KDW-GP

84.2N702.A3F2nd = 84.DM601.03F

1 2PR4004D01R3721F-GP-U


1 2PR401520R5F-1GPPR401520R5F-1GP

1 2PR4033 3K3R2J-3-GP

DYPR4033 3K3R2J-3-GP

DY

1 2PR40130R0402-PADPR40130R0402-PAD


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PWR_3D3V_FB2

PW

R_5

V3D

3V_V

RE

G3

PWR_5V_FB1

PWR_5V_LL1

PWR_3D3V_VBST2

PW

R_5

V_S

NU

B

PWR_5V_DRVH1

PWR_5V_DRVL1

PWR_3D3V_DRVH2

PWR_5V_VO1

PWR_3D3V_LL2

PWR_5V_VBST1

PWR_5V_FB1_RPWR_3D3V_FB2_R

PWR_3D3V_CS2

PWR_3D3V_VBST2_1

PWR_3D3V_EN2

PWR_5V_EN1

PW

R_3

D3V

_SN

UB

PWR_5V_VBST1_1

PWR_5V_EN1

PWR_5V_CS1

PWR_3D3V_EN2

DCBATOUT_UVP_1

DCBATOUT_UVP_2

PWR_3D3V_DRVL2

3D3V_PWR_2

3D3V_PWR

DCBATOUT_PWR_3D3VDCBATOUT

3D3V_PWR

3D3V_PWR_2

3D3V_S5

DCBATOUT_PWR_5V

5V_PWR_2

3D3V_AUX_S5

5V_PWR 5V_S5

5V_PWR

DCBATOUT_PWR_3D3VDCBATOUT

3D3V_S5

DCBATOUT_PWR_5VDCBATOUT

DCBATOUTDCBATOUT 3D3V_PWR_2

3V_5V_EN 36

3V_5V_POK19

ECRST# 27

Title


Date: Sheet of


SD

TPS51123_5V_3D3V


<Core Design>

Title


Date: Sheet of


SD

TPS51123_5V_3D3V


<Core Design>

Title


Date: Sheet of


SD

TPS51123_5V_3D3V


<Core Design>

Close to VFB Pin (pin5)

Close to VFB Pin (pin2)

D

S G

G

D

S

G

D

D

SG

S

SSID = PWR.Plane.Regulator_5v3p3v

Cyntec. 3.3uH 6.5*6.9*3

DCR=28~30mohm

Idc=6A, Isat=13.5A

Design Current=5.25AOCP>7.8A

Cyntec. 2.2uH 7.3*6.6*3

DCR=18~20mohm

Idc=8A, Isat=14A

Design Current=5.25AOCP>7.8A

Id=12A, Qg=3.8nC,

Rdson=24~30 mohm

Id=12A, Qg=3.8nC,

Rdson=24~30 mohm

Id=12A, Qg=3.8nC,

Rdson=24~30 mohm

Id=16A, Qg=7.3nC,

Rdson=13.5~16.5 mohm

Vz=5.1V

12

PC4110

SC

D1U

50V3K

X-G

P

PC4110

SC

D1U

50V3K

X-G

P

12

PR412540K2R2F-GPDYPR412540K2R2F-GPDY

1 2PC4118SCD1U50V3KX-GP


12

PC4111

SC

10U25V

5KX

-GP

PC4111

SC

10U25V

5KX

-GP

1 2 3 45678

S S S GDDDD

PU4105SIS

412DN

-T1-GE

3-GP

S S S GDDDD

PU4105SIS

412DN

-T1-GE

3-GP

12

PR411515KR2F-GPPR411515KR2F-GP1 2

PG4101

GAP-CLOSE-PWR-3-GP

PG4101

GAP-CLOSE-PWR-3-GP

1 2PL4102

IND-2D2UH-46-GP-U68.2R210.20B

PL4102

IND-2D2UH-46-GP-U68.2R210.20B

1 2PG4108

GAP-CLOSE-PWR

PG4108

GAP-CLOSE-PWR

12


12

PC4119

SC

D1U

10V2K

X-4G

P

PC4119

SC

D1U

10V2K

X-4G

P

12

PG4116

GA

P-C

LOS

E-P

WR

-3-GP

PG4116

GA

P-C

LOS

E-P

WR

-3-GP 1

2

PC4121

SC330P50V3KX-GP

DYPC4121

SC330P50V3KX-GP

DY

1 2PG4109

GAP-CLOSE-PWR

PG4109

GAP-CLOSE-PWR

12

PR41130R2J-2-GPDYPR41130R2J-2-GPDY

12

PC4123SC560P50V-GPDY PC4123SC560P50V-GPDY

1 2PG4103

GAP-CLOSE-PWR

PG4103

GAP-CLOSE-PWR

12PR4121

0R0402-PADPR4121

0R0402-PAD

1 2PG4122

GAP-CLOSE-PWR

PG4122

GAP-CLOSE-PWR

12

PR412010KR2F-2-GPPR412010KR2F-2-GP

1 2PG4115

GAP-CLOSE-PWR

PG4115

GAP-CLOSE-PWR

1 2PL4101

IND-3D3UH-57GP

68.3R310.20A

PL4101

IND-3D3UH-57GP

68.3R310.20A

12

PR4129750KR2F-GPDYPR4129750KR2F-GPDY

1 2PG4114

GAP-CLOSE-PWR

PG4114

GAP-CLOSE-PWR

12PR4127

0R0402-PADPR4127

0R0402-PAD

1 2PG4111

GAP-CLOSE-PWR

PG4111

GAP-CLOSE-PWR

1 2PG4104

GAP-CLOSE-PWR

PG4104

GAP-CLOSE-PWR

12

PC4116

SC

D1U

50V3K

X-G

P

PC4116

SC

D1U

50V3K

X-G

P

12

PR41112D2R5F-2-GPDYPR41112D2R5F-2-GPDY

12


12

PR412210KR2F-2-GPDYPR412210KR2F-2-GPDY

1 2PG4129

GAP-CLOSE-PWR

PG4129

GAP-CLOSE-PWR

12

PC4114

SC

10U25V

5KX

-GP

PC4114

SC

10U25V

5KX

-GP

1 2 3 45678

S S S GDDDD


S S S GDDDD


12

PG4117

GA

P-C

LOS

E-P

WR

-3-GP

PG4117

GA

P-C

LOS

E-P

WR

-3-GP

12PC4117

SCD1U50V3KX-GP

PC4117

SCD1U50V3KX-GP

1 2PG4110

GAP-CLOSE-PWR

PG4110

GAP-CLOSE-PWR

12

PC4127SC1U10V2KX-1GP

PC4127SC1U10V2KX-1GP

12

PC4125SC18P50V2JN-1-GP

DYPC4125SC18P50V2JN-1-GP

DY

12345 6 7 8

SSSGD D D D


SSSGD D D D


12345 6 7 8

SSSGD D D D


SSSGD D D D


12

PR41261KR2F-3-GPDYPR41261KR2F-3-GPDY

12

PR4119100KR2J-1-GP

DYPR4119100KR2J-1-GP

DY

1 2PG4133

GAP-CLOSE-PWR

PG4133

GAP-CLOSE-PWR

12

PC4112

SC

10U25V

5KX

-GP

DY

PC4112

SC

10U25V

5KX

-GP

DY

12

PR411710KR2F-2-GP

PR411710KR2F-2-GP

12

PD4105MMPZ5231BPT-GPDYPD4105MMPZ5231BPT-GPDY

VBST29

DRVH210

SW28

DRVL211

VFB24

EN26

CS25

VR

EG

33

VIN

12

VBST1 17

DRVH1 16

SW1 18

DRVL1 15

VO1 14

VFB1 2

EN1 20

CS1 1

VR

EG

513

GND 21

VCLK 19

PGOOD7

PU4103

TPS51225CRUKR-GP

PU4103

TPS51225CRUKR-GP

1 2PG4121

GAP-CLOSE-PWR

PG4121

GAP-CLOSE-PWR

1 2PG4131

GAP-CLOSE-PWR

PG4131

GAP-CLOSE-PWR

1 2PG4102

GAP-CLOSE-PWR

PG4102

GAP-CLOSE-PWR

1 2PG4120

GAP-CLOSE-PWR

PG4120

GAP-CLOSE-PWR1 2

PR4108

1D5R2F-GP

PR4108

1D5R2F-GP

1

2

34

5

6

PU4106

2N7002DW-7F-GP

DY

PU4106

2N7002DW-7F-GP

DY

1 2PG4132

GAP-CLOSE-PWR

PG4132

GAP-CLOSE-PWR

12

PR41140R2J-2-GP DY

PR41140R2J-2-GP DY

1 2PG4130

GAP-CLOSE-PWR

PG4130

GAP-CLOSE-PWR

12PR41160R0603-PADPR41160R0603-PAD

12

PC4115

SC

10U25V

5KX

-GP

PC4115

SC

10U25V

5KX

-GP

1 2PG4112

GAP-CLOSE-PWR

PG4112

GAP-CLOSE-PWR

12

PC4124SC18P50V2JN-1-GPDYPC4124SC18P50V2JN-1-GPDY

1 2PG4128

GAP-CLOSE-PWR

PG4128

GAP-CLOSE-PWR

1 2PR4109

1D5R2F-GP

PR4109

1D5R2F-GP

12

PC4109

SC

10U25V

5KX

-GP

PC4109

SC

10U25V

5KX

-GP

12


12

PT4101

SE

330U6D

3VM

-15-GP

PT4101

SE

330U6D

3VM

-15-GP

1 2PG4119

GAP-CLOSE-PWR

PG4119

GAP-CLOSE-PWR

12

PT4102

SE

220U6D

3VM

-30-GP

PT4102

SE

220U6D

3VM

-30-GP

12

PR41126K65R2F-GP

PR41126K65R2F-GP

12

PC4113

SC

D01U

50V2K

X-1G

P

PC4113

SC

D01U

50V2K

X-1G

P

1 2PG4113

GAP-CLOSE-PWR

PG4113

GAP-CLOSE-PWR

12

PR41102D2R5F-2-GP

DYPR41102D2R5F-2-GP

DY

12


12


12

PC4120

SC

D1U

10V2K

X-4G

P

PC4120

SC

D1U

10V2K

X-4G

P


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PW

R_C

PU

_CO

RE

_CC

OM

P

PWR_CPU_CORE_SLEWAPWR_CPU_CORE_GF-IMAXP

WR

_CP

U_C

OR

E_G

IMO

N

PW

R_C

PU

_CO

RE

_GT

HE

RM

PWR_CPU_CORE_VREF

PW

R_C

PU

_CO

RE

_GO

CP

-I

PWR_CPU_CORE_VREF

PWR_CPU_CORE_VREF

PW

R_C

PU

_CO

RE

_GC

OM

P

H_CPU_SVIDDAT

H_CPU_SVIDCLK

PWR_CPU_CORE_VREF

PW

R_C

PU

_CO

RE

_CT

HE

RM

PWR_CPU_CORE_VREF

PWR_CPU_CORE_CSKIP#

PW

R_C

PU

_CO

RE

_CIM

ON

PW

R_C

PU

_CO

RE

_CO

CP

-I

PWR_CPU_CORE_VREF

PWR_GFX_PWRGDN221068268

PWR_CPU_CORE_VREF

PWR_CPU_CORE_GF-IMAX

PWR_CPU_CORE_VCLK

PWR_CPU_CORE_VRON

PWR_CPU_CORE_ALERT#

PWR_CPU_CORE_VR_HOT#PWR_CPU_CORE_SLEWA

PWR_CPU_CORE_VDIO

PWR_CPU_CORE_CF-IMAX

3D3V_S0

DCBATOUT_VCC_CORE

3D3V_S5

VCORE_AGND

VCORE_AGND VCORE_AGND

5V_S5

VCORE_AGND

VCORE_AGND

1D05V_VTT

VCORE_AGND

3D3V

_S5

VCORE_AGND

VCORE_AGND

VCORE_AGND

VCORE_AGND

5V_S5

PWR_GFX_GSKIP# 44

PWR_CPU_CORE_CBST2 43

IMVP_PWRGD28,36

VSS_AXG_SENSE9

PWR_GFX_CORE_GSCN44

PWR_GFX_GPWM 44

VCC_AXG_SENSE9

PWR_CPU_CORE_CDL1 43

PWR_CPU_CORE_CDL2 43H_CPU_SVIDDAT8VR_SVID_ALERT#8

H_PROCHOT#5,27

D85V_PWRGD48

H_CPU_SVIDCLK8

PWR_CPU_CORE_CCSP2 43

VSSSENSE8

VCCSENSE8

PWR_CPU_CORE_CCSN2 43



PWR_CPU_CORE_CBST1 43

PWR_GFX_CORE_GSCP44

PWR_CPU_CORE_CDH1 43

PWR_CPU_CORE_CSW2 43

PWR_CPU_CORE_CDH2 43

PWR_CPU_CORE_CSW1 43

VGA_CURRENT 27

CPU_CURRENT 27

Title


Date: Sheet of


SD

TPS51640_CPU_CORE(1/3)


<Doc>

<Core Design>

Title


Date: Sheet of


SD



<Doc>

<Core Design>

Title


Date: Sheet of


SD



<Doc>

<Core Design>

Close to PWR ICOpen

1 2PR42300R0402-PADPR42300R0402-PAD

1 2PC4209 SC33P50V2JN-3GPPC4209 SC33P50V2JN-3GP

1 2PR4229 75KR2F-GPPR4229 75KR2F-GP

1 2PR4208

24KR2F-GP

PR4208

24KR2F-GP

12

PC4208

SC

4D7U

10V3K

X-G

P

PC4208

SC

4D7U

10V3K

X-G

P

1 2PR4202130R2F-1-GP

PR4202130R2F-1-GP

1 2PR4226 15K8R2F-GPPR4226 15K8R2F-GP

1 2PR4206

NTC-100K-1-GP

PR4206

NTC-100K-1-GP

12


1 2PR4204

121KR2F-L-GP

PR4204

121KR2F-L-GP

12PR4232 0R0402-PADPR4232 0R0402-PAD

1 2PC4211 SCD1U10V2KX-4GP

DYPC4211 SCD1U10V2KX-4GP

DY


12

PR421010R2F-L-GPPR421010R2F-L-GP

12PR4233 0R0402-PADPR4233 0R0402-PAD

12

PC4205SC1U6D3V2KX-GP


1 2PC4201

SCD22U10V2KX-1GP

PC4201

SCD22U10V2KX-1GP

1 2PR4217100KR2F-L1-GPDYPR4217100KR2F-L1-GPDY

1 2

PC4204

SCD1U10V2KX-4GP

DY

PC4204

SCD1U10V2KX-4GP

DY

1 2PR4227 NTC-100K-1-GPPR4227 NTC-100K-1-GP

12PR4234 0R0402-PADPR4234 0R0402-PAD

1 2PR4223 20KR2F-L-GP

DYPR4223 20KR2F-L-GP

DY

12PR4213 0R0402-PADPR4213 0R0402-PAD

1 2PC4210

SCD22U10V2KX-1GP

PC4210

SCD22U10V2KX-1GP

12PR4231 0R0402-PADPR4231 0R0402-PAD

12

PR422430KR2F-GPPR422430KR2F-GP

1 2PR4209

90K9R2F-GP

PR4209

90K9R2F-GP

1 2PR42390R0402-PADPR42390R0402-PAD

CT

HE

RM

1C

OC

P_I

2C

IMO

N3

CC

SP

14

CC

SN

15

CC

SN

26

CC

SP

27

CC

SP

38

CC

SN

39

CC

OM

P10

CV

FB

11C

GF

B12

V5 48

CDH1 47

CBST1 46

CSW1 45

CDL1 44

V5DRV 43

PGND 42

CDL2 41

CSW2 40

CBST2 39

CDH2 38

VBAT 37

GND 49

CP

WM

336

CS

KIP

#35

GP

WM

34G

SK

IP#

33G

TH

ER

M32

GO

CP

_I31

GIM

ON

30G

CS

P29

GC

SN

28G

CO

MP

27G

VF

B26

GG

FB

25

CF_IMAX13

VREF14

V3R315

VR_ON16

CPGOOD17

VCLK18

ALERT#19

VDIO20

VR_HOT#21

SLEWA22

GPGOOD23

GF_IMAX24

PU4201

TPS51640ARSLR-GP

PU4201

TPS51640ARSLR-GP

12

PC4207SC2D2U10V3KX-1GPPC4207SC2D2U10V3KX-1GP


1 2

PR4228

309KR2F-GP

PR4228

309KR2F-GP

1 2

PR4216 10KR2F-2-GPPR4216 10KR2F-2-GP

12

PR4221169KR2F-1-GPPR4221169KR2F-1-GP

12

PR421110KR2J-3-GPPR421110KR2J-3-GP

1 2PR4222 100KR2F-L1-GPDYPR4222 100KR2F-L1-GPDY

1 2PR4218 5K76R2F-2-GPPR4218 5K76R2F-2-GP

1 2PR4203

54D9R2F-L1-GP

PR4203

54D9R2F-L1-GP

1 2

PC4202

SCD22U10V2KX-1GP

DYPC4202

SCD22U10V2KX-1GP

DY

1 2PR4207

15K8R2F-GP

PR4207

15K8R2F-GP

12


1 2PR4205

10K7R2F-GP

PR4205

10K7R2F-GP

1 2PC4206SCD33U6D3V2KX-1-GP

PC4206SCD33U6D3V2KX-1-GP

1 2PC4203

SC33P50V2JN-3GP

PC4203

SC33P50V2JN-3GP


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PWR_CPU_CORE_CBST1_1

PWR_CPU_CORE_CBST2_1

VCC_CORE

VCC_CORE

DCBATOUT_VCC_CORE

DCBATOUT_VCC_CORE

DCBATOUT DCBATOUT_VCC_CORE

PWR_CPU_CORE_CDH142

PWR_CPU_CORE_CDL142

PWR_CPU_CORE_CBST142

PWR_CPU_CORE_CSW142





PWR_CPU_CORE_CDH242

PWR_CPU_CORE_CDL242

PWR_CPU_CORE_CBST242

PWR_CPU_CORE_CSW242

Title


Date: Sheet of


SD



<Doc>

<Core Design>

Title


Date: Sheet of


SD



<Doc>

<Core Design>

Title


Date: Sheet of


SD



<Doc>

<Core Design>

Design current: 42.4A

PU4301

PU4302

PU4303

PU4304

Main source 2nd source

BOM control

84.03606.037FDMS3606S-GP-U

84.03606.037FDMS3606S-GP-U

84.03606.037FDMS3606S-GP-U

84.03606.037FDMS3606S-GP-U

1 2PL4302

L-D36UH-1-GP

PL4302

L-D36UH-1-GP

12

PT4306SE100U25VM-10GPPT4306SE100U25VM-10GP

12

PT4301

ST

330U

2VD

M-4

-GP

PT4301

ST

330U

2VD

M-4

-GP

1 2PR4310

28KR2F-GP

PR4310

28KR2F-GP

1 2PG4307

GAP-CLOSE-PWR

PG4307

GAP-CLOSE-PWR

12


12

PT4302

ST

330U

2VD

M-4

-GP

PT4302

ST

330U

2VD

M-4

-GP

1 2PG4308

GAP-CLOSE-PWR

PG4308

GAP-CLOSE-PWR

1 2

PR4309

121KR2F-L-GP

PR4309

121KR2F-L-GP

12


1 2PR43010R3J-0-U-GPPR43010R3J-0-U-GP

1 2PG4304

GAP-CLOSE-PWR

PG4304

GAP-CLOSE-PWR

1 2PR4237

28KR2F-GP

PR4237

28KR2F-GP

12

PC

4307S

C10U

25V5K

X-G

PP

C4307

SC

10U25V

5KX

-GP

1

234

567

8

910

PU4302

FDMS3600-02-RJK0215-COLAY-GP84.03606.037

PU4302

FDMS3600-02-RJK0215-COLAY-GP84.03606.037

12

PT4305

ST

330U

2VD

M-4

-GP

PT4305

ST

330U

2VD

M-4

-GP

1 2

PR4238

121KR2F-L-GP

PR4238

121KR2F-L-GP

12


1 2PG4306

GAP-CLOSE-PWR

PG4306

GAP-CLOSE-PWR

1 2PR4235

NTC-100K-1-GP1st = 69.60011.071

PR4235

NTC-100K-1-GP1st = 69.60011.071

1 2PG4309

GAP-CLOSE-PWR

PG4309

GAP-CLOSE-PWR

1 2PR43020R3J-0-U-GPPR43020R3J-0-U-GP

1

234

567

8

910

PU4303

FDMS3600-02-RJK0215-COLAY-GPDY

PU4303


12

PC

4310S

C10U

25V5K

X-G

PP

C4310

SC

10U25V

5KX

-GP

12

PC

4302S

C10U

25V5K

X-G

PP

C4302

SC

10U25V

5KX

-GP

1

234

567

8

910

PU4304

FDMS3600-02-RJK0215-COLAY-GP84.03606.037

PU4304

FDMS3600-02-RJK0215-COLAY-GP84.03606.037

12

PC

4306

SC

10U25V

5KX

-GP

PC

4306

SC

10U25V

5KX

-GP

12


1

234

567

8

910

PU4301


PU4301


12


12

PT4303

ST

330U

2VD

M-4

-GP

PT4303

ST

330U

2VD

M-4

-GP

12

PC

4312S

C10U

25V5K

X-G

PP

C4312

SC

10U25V

5KX

-GP

1 2

PR4303NTC-100K-1-GP

1st = 69.60011.071PR4303NTC-100K-1-GP

1st = 69.60011.071

12

PC

4303S

C10U

25V5K

X-G

PP

C4303

SC

10U25V

5KX

-GP

1 2PL4301

L-D36UH-1-GP

PL4301

L-D36UH-1-GP

12

PC

4304S

C10U

25V5K

X-G

P

DY

PC

4304S

C10U

25V5K

X-G

P

DY

1 2PC4301

SCD1U50V3KX-GP

PC4301

SCD1U50V3KX-GP

12

PT4304

ST

330U

2VD

M-4

-GP

PT4304

ST

330U

2VD

M-4

-GP

1 2PG4305

GAP-CLOSE-PWR

PG4305

GAP-CLOSE-PWR

12


1 2PC4314 SCD027U25V2KX-GPPC4314 SCD027U25V2KX-GP

12

PC

4305S

C10U

25V5K

X-G

P

DY

PC

4305S

C10U

25V5K

X-G

P

DY

1 2PC4308

SCD1U50V3KX-GP

PC4308

SCD1U50V3KX-GP



5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PWR_GFX_CORE_DRVL

PWR_GFX_CORE_BST

PWR_GFX_CORE_SW

PWR_GFX_CORE_DRVH

PWR_GFX_CBST1_1

PWR_GFX_CORE_DRVL

PWR_GFX_CORE_BST

PWR_GFX_CORE_SWPWR_GFX_CORE_DRVH

VCC_GFXCORE

DCBATOUT_VCC_GFXCORE

5V_S5

DCBATOUT DCBATOUT_VCC_GFXCORE

PWR_GFX_CORE_GSCP 42

PWR_GFX_CORE_GSCN 42

PWR_GFX_GSKIP#42PWR_GFX_GPWM42

Title


Date: Sheet of


SD



<Doc>

<Core Design>

Title


Date: Sheet of


SD



<Doc>

<Core Design>

Title


Date: Sheet of


SD



<Doc>

<Core Design>

Design current: 22A

2nd source

PU4402

PU4403

Main source

84.07608.037FDMS7608S-GP

84.07608.037FDMS7608S-GP

BOM control

12

PT4402

ST

330U

2VD

M-4

-GP

PT4402

ST

330U

2VD

M-4

-GP

1 2PG4401

GAP-CLOSE-PWR

PG4401

GAP-CLOSE-PWR

12

PC

4402S

C10U

25V5K

X-G

PP

C4402

SC

10U25V

5KX

-GP

1

234

567

8

910

PU4403

FDMS3600-02-RJK0215-COLAY-GP84.07608.037

PU4403

FDMS3600-02-RJK0215-COLAY-GP84.07608.037

1 2PG4404

GAP-CLOSE-PWR

PG4404

GAP-CLOSE-PWR

1 2PG4403

GAP-CLOSE-PWR

PG4403

GAP-CLOSE-PWR

12

PT4403

ST

330U

2VD

M-4

-GP

PT4403

ST

330U

2VD

M-4

-GP

1 2

PR4409NTC-100K-1-GP

1st = 69.60011.071PR4409NTC-100K-1-GP

1st = 69.60011.071

12


1 2

PL4401

L-D36UH-1-GP

PL4401

L-D36UH-1-GP

12

PT4401

ST

330U

2VD

M-4

-GP

PT4401

ST

330U

2VD

M-4

-GP

1 2PR4405

28KR2F-GP

PR4405

28KR2F-GP

12

PC

4409S

C10U

25V5K

X-G

PP

C4409

SC

10U25V

5KX

-GP

12

PC

4403S

C10U

25V5K

X-G

PP

C4403

SC

10U25V

5KX

-GP

1

234

567

8

910

PU4402

FDMS3600-02-RJK0215-COLAY-GP84.07608.037

PU4402

FDMS3600-02-RJK0215-COLAY-GP84.07608.0371 2

PC4401 SC1U25V3KX-1-GPPC4401 SC1U25V3KX-1-GP

12

PC4407SC2D2U10V3KX-1GPPC4407SC2D2U10V3KX-1GP

12


1 2PR4407

121KR2F-L-GP

PR4407

121KR2F-L-GP


1 2PG4402

GAP-CLOSE-PWR

PG4402

GAP-CLOSE-PWR

12


BST1

SKIP#2

PWM3

GND4

DRVL 5VDD 6SW 7

DRVH 8GND 9

PU4401

TPS51601DRBR-GP

PU4401

TPS51601DRBR-GP

12

PC

4404S

C10U

25V5K

X-G

PP

C4404

SC

10U25V

5KX

-GP

1 2PR4401 0R3J-0-U-GPPR4401 0R3J-0-U-GP


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

H_SNB_IVB#_PWRCTRL

PW

R_V

CC

P_T

RIP

PWR_VCCP_COMP

PW

R_V

CC

P_M

OD

E

PWR_VCCP_VREF

TPS51219_GSNS_M

PWR_VCCP_DRVL

PWR_VCCP_LL_1PWR_VCCP_VBST

PWR_VCCP_SWPWR_VCCP_DRVH

PWR_VCCP_V5FILT

PWR_VCCP_EN

PWR_VCCP_VSNS

PWR_1D05V_SVIN

PWR_1D05V_EN

PWR_1D05V_PHASE

PWR_1D05V_PVDD

1D05V_FB_GAP

PWR_1D05V_FB

3D3V_S0

3D3V_S5

PWR_DCBATOUT_VCCP

1D05V_PWR 1D05V_VTT

1D05V_PWR

5V_S5

PWR_DCBATOUT_VCCPDCBATOUT

1D05V_M1D05V_PWR_M

3D3V_S5

3D3V_S5

1D05V_VTT

RUNPWROK46,47

VCCIO_SENSE 8VSSIO_SENSE 8

1.05VTT_PWRGD37,48

PM_SLP_A#19,27MPWROK19

Title


Date: Sheet of


SD

TPS51211_1D05V


<Core Design>

Title


Date: Sheet of


SD

TPS51211_1D05V


<Core Design>

Title


Date: Sheet of


SD

TPS51211_1D05V


<Core Design>

L

Vout

1V

REFIN

1.05VH

D

SG

Parallel

77.C3371.051330uF, 2.5V, ESR=9mΩ, Iripple=3.726A

Differential Sense feedbackResistor need close to controller

G S

D

TPS51219 for 1D05V

Design Current = 11.69A OCP> 17.9A

0.68uH 7.3*6.6*3

DCR=5~5.5mohm

Idc=15.5A, Isat=25A

Id=20A, Qg=9.8~15nC,

Rdson=10.3~12.4 mohm

Id=40A, Qg=16.8~25.5nC,

Rdson=4.9~6.1 mohm

R1

R2

Vo=0.6*(1+(R1/R2))

EC_SC_1003

1 2


1 2PG4541

GAP-CLOSE-PWR

PG4541

GAP-CLOSE-PWR

1 2PR4505

1KR2F-3-GP

PR4505

1KR2F-3-GP1

2

PC4521SC

10U6D

3V3M

X-G

P

SBAPC4521S

C10U

6D3V

3MX

-GP

SBA

1 2PG4526

GAP-CLOSE-PWR-3-GP

PG4526

GAP-CLOSE-PWR-3-GP

12

PT4501SE

330U2D

5VD

M-1G

P

PT4501SE

330U2D

5VD

M-1G

P

12345 6 7 8

SSSGD D D D

PU4502SIR

172DP

-T1-GE

3-GP

84.00172.037

SSSGD D D D

PU4502SIR

172DP

-T1-GE

3-GP

84.00172.037

1 2PG4540

GAP-CLOSE-PWR

PG4540

GAP-CLOSE-PWR

1 2PG4528

GAP-CLOSE-PWR-3-GP

PG4528

GAP-CLOSE-PWR-3-GP

12

PC4524SC22P50V2GN-GPDY PC4524SC22P50V2GN-GPDY

1 2PG4519

GAP-CLOSE-PWR

PG4519

GAP-CLOSE-PWR

12

PR45188K25R2F-1-GPDYPR45188K25R2F-1-GPDY

12


DYPC4514SC1U6D3V2KX-GP

DY

1 2PR45242D2R2J-GPSBA

PR45242D2R2J-GPSBA

12

PC4518SC2D2U6D3V2MX-GP

PC4518SC2D2U6D3V2MX-GP

1 2PG4544

GAP-CLOSE-PWR

PG4544

GAP-CLOSE-PWR

12

PR45150R0402-PAD

PR45150R0402-PAD

1 2PR4509 10KR2J-3-GPPR4509 10KR2J-3-GP

1 2PG4527

GAP-CLOSE-PWR-3-GP

PG4527

GAP-CLOSE-PWR-3-GP

12


1 2PC4513

SCD1U50V3KX-GP

PC4513

SCD1U50V3KX-GP

1 2

PL4501

COIL-D68UH-5-GP

PL4501

COIL-D68UH-5-GP

1 2PG4531

GAP-CLOSE-PWR-3-GP

PG4531

GAP-CLOSE-PWR-3-GP

1 2PG4518

GAP-CLOSE-PWR

PG4518

GAP-CLOSE-PWR

1 2R4501 0R5J-5-GPNon-SBAR4501 0R5J-5-GPNon-SBA

PVIN10

PGOOD4

SVIN8

FB 6

NC#7 7

LX#1 1

EN5

PVIN9

GND 11

LX#2 2

LX#3 3

PU4504

RT8068AZQWID-GP-USBA

PU4504

RT8068AZQWID-GP-USBA

12

PC4527

SC

10U6D

3V3M

X-G

P

SBAPC4527

SC

10U6D

3V3M

X-G

P

SBA

1 2PR4508 2D2R3J-2-GPPR4508 2D2R3J-2-GP

1 2PG4520

GAP-CLOSE-PWR-3-GP

PG4520

GAP-CLOSE-PWR-3-GP1 2

PG4516

GAP-CLOSE-PWR

PG4516

GAP-CLOSE-PWR

VREF1

REFIN2

GSNS3

VSNS4C

OM

P5

TR

IP6

GN

D7

PG

ND

8

V5 9DL 10DH 11SW 12

BS

T13

EN

14M

OD

E15

PG

OO

D16

GN

D17

PU4501

TPS51219RTER-GP

PU4501

TPS51219RTER-GP

12

PC4525SC

100P50V

2JN-L-G

P

SBA

PC4525SC

100P50V

2JN-L-G

P

SBA

12

PR45143D3R2F-GPPR45143D3R2F-GP

1 2PG4532

GAP-CLOSE-PWR-3-GP

PG4532

GAP-CLOSE-PWR-3-GP

12

PR4521

10K

R2F

-2-G

PDYPR4521

10K

R2F

-2-G

PDY

12

PT4502SE

330U2D

5VD

M-1G

P

PT4502SE

330U2D

5VD

M-1G

P

1 2PR4523 0R0402-PADPR4523 0R0402-PAD

1 2PR45100R0402-PADPR45100R0402-PAD

1 2PG4523

GAP-CLOSE-PWR-3-GP

PG4523

GAP-CLOSE-PWR-3-GP

12


SBAPC4523SC1U6D3V2KX-GP

SBA

1 2

PL4502

IND-2D2UH-161-GP-USBA

PL4502

IND-2D2UH-161-GP-USBA

12

PC4510

SC

2200P50V

2KX

-2GP

PC4510

SC

2200P50V

2KX

-2GP

1 2PG4517

GAP-CLOSE-PWR

PG4517

GAP-CLOSE-PWR

1 2PG4533

GAP-CLOSE-PWR-3-GP

PG4533

GAP-CLOSE-PWR-3-GP

1 2PG4530

GAP-CLOSE-PWR-3-GP

PG4530

GAP-CLOSE-PWR-3-GP

12

PC4526SC

10U6D

3V3M

X-G

P

SBA

PC4526SC

10U6D

3V3M

X-G

P

SBA

12

PR452064K9R2F-1-GPPR452064K9R2F-1-GP

1 2PR4522 0R0402-PADPR4522 0R0402-PAD

12

PR4511100KR2F-L1-GPPR4511100KR2F-L1-GP

1 2PG4543

GAP-CLOSE-PWR

PG4543

GAP-CLOSE-PWR

12

PR452615KR2F-GPSBA

PR452615KR2F-GPSBA

1 2PG4529

GAP-CLOSE-PWR-3-GP

PG4529

GAP-CLOSE-PWR-3-GP

12

PC4515SCD1U10V2KX-4GP

PC4515SCD1U10V2KX-4GP

1 2PG4522

GAP-CLOSE-PWR-3-GP

PG4522

GAP-CLOSE-PWR-3-GP

12345 6 7 8

SSSD D D D

G

PU4503

SIR

460DP

-T1-GE

3-GP

84.00460.037

SSSD D D D

G

PU4503

SIR

460DP

-T1-GE

3-GP

84.00460.037

12

PC4516

SC

10U25V

5KX

-GP

PC4516

SC

10U25V

5KX

-GP

12

PG

4547G

AP

-CLO

SE

-PW

R-3-G

PP

G4547

GA

P-C

LOS

E-P

WR

-3-GP

1 2PR4502 0R0402-PADPR4502 0R0402-PAD

12

PR452720KR2F-L-GPSBA

PR452720KR2F-L-GPSBA

12

PC4522SC

10U6D

3V3M

X-G

P

DY

PC4522SC

10U6D

3V3M

X-G

P

DY

12

PC4517

SC

10U25V

5KX

-GP

PC4517

SC

10U25V

5KX

-GP

12

PC4519SC

1KP

50V2K

X-1G

P

DYPC4519S

C1K

P50V

2KX

-1GP

DY

1 2PG4525

GAP-CLOSE-PWR-3-GP

PG4525

GAP-CLOSE-PWR-3-GP

1 2PR4519 0R0402-PADPR4519 0R0402-PAD

12

PR4525

100KR

2F-L1-GP

SBAPR4525

100KR

2F-L1-GP

SBA

1 2PG4524

GAP-CLOSE-PWR-3-GP

PG4524

GAP-CLOSE-PWR-3-GP

1 2PG4534

GAP-CLOSE-PWR-3-GP

PG4534

GAP-CLOSE-PWR-3-GP

12

PC4520

SC

D1U

50V3K

X-G

P

PC4520

SC

D1U

50V3K

X-G

P

1 2PG4521

GAP-CLOSE-PWR-3-GP

PG4521

GAP-CLOSE-PWR-3-GP


A

A

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1

PWR_1D5V_TON

PWR_1D5V_VCC5

PWR_1D5V_VDDQ

PWR_1D5V_FB

PWR_1D5V_PHASE

PWR_1D5V_UGATE

PWR_1D5V_VBST PWR_1D5V_VBST_1

PWR_1D5V_EN

PWR_1D5V_EN

PWR_1D5V_CS

PWR_1D5V_PVCC5

PW

R_

1D

5V

_V

TT

RE

F

PWR_1D5V_SW_1

PWR_1D5V_LGATE

DCBATOUT_1D5V

1D5V_PWR

5V_S5

5V_S5

DDR_VREF_S3

+0D75V_DDR_P

3D3V_S0

1D5V_PWR

DCBATOUT_1D5V

DCBATOUT_1D5VDCBATOUT 1D5V_S31D5V_PWR

+0D75V_DDR_P0D75V_S0

0D75V_EN37

RUNPWROK45,47

PM_SLP_S4#19,27,97

Title


Date: Sheet of


SD

RT8207M_1D5V_0D75V


<Doc>

<Core Design>

Title


Date: Sheet of


SD

RT8207M_1D5V_0D75V


<Doc>

<Core Design>

Title


Date: Sheet of


SD

RT8207M_1D5V_0D75V


<Doc>

<Core Design>

Design Current = 11.69A OCP>19.92A

SSID = PWR.Plane.Regulator_1p5v0p75v

SG

D

SG

D

R1

R2

Vout=0.75*(1+R1/R2)

Cyntec. 1.0uH 7.3*6.6*3DCR=9~10mohmIdc=11A, Isat=22A

Id=20A, Qg=9.8~15nC,Rdson=10.3~12.4 mohm

Id=40A, Qg=16.8~25.5nC,Rdson=4.9~6.1 mohm

12

PT4602SE

33

0U

2D

5V

DM

-1G

PPT4602S

E3

30

U2

D5

VD

M-1

GP

12


12

PC4616SC18P50V2JN-1-GP

DY PC4616SC18P50V2JN-1-GP

DY

12 P

G4

62

6G

AP

-CL

OS

E-P

WR

-3-G

PP

G4

62

6G

AP

-CL

OS

E-P

WR

-3-G

P1 2PG4620

GAP-CLOSE-PWR-3-GP

PG4620

GAP-CLOSE-PWR-3-GP

1 2PG4617

GAP-CLOSE-PWR-3-GP

PG4617

GAP-CLOSE-PWR-3-GP

1 2PR46030R0603-PADPR46030R0603-PAD

12

PR460410KR2F-2-GPDY

PR460410KR2F-2-GPDY

1 2PG4601

GAP-CLOSE-PWR-3-GP

PG4601

GAP-CLOSE-PWR-3-GP

1 2PG4616

GAP-CLOSE-PWR-3-GP

PG4616

GAP-CLOSE-PWR-3-GP

1 2PG4603

GAP-CLOSE-PWR-3-GP

PG4603

GAP-CLOSE-PWR-3-GP

1 2PG4608

GAP-CLOSE-PWR-3-GP

PG4608

GAP-CLOSE-PWR-3-GP

12

PC4601

SC

1K

P5

0V

2K

X-1

GP

PC4601

SC

1K

P5

0V

2K

X-1

GP

12 PR4602

9K

76

R2

F-1

-GP

PR4602

9K

76

R2

F-1

-GP

12

PR460830K9R2F-GPPR460830K9R2F-GP

1 2PG4611

GAP-CLOSE-PWR-3-GP

PG4611

GAP-CLOSE-PWR-3-GP

12

PR46072D2R5F-2-GPDY PR46072D2R5F-2-GPDY

12

PC4621

SC

D1

U1

0V

2K

X-4

GP

PC4621

SC

D1

U1

0V

2K

X-4

GP

12


12345 6 7 8

SSSGD D D D

PU4602

SIR

17

2D

P-T

1-G

E3

-GP

84.00172.037

SSSGD D D D

PU4602

SIR

17

2D

P-T

1-G

E3

-GP

84.00172.037

12


12

PC4617SC

10

U6

D3

V3

MX

-GP

DYPC4617S

C1

0U

6D

3V

3M

X-G

P

DY

12

PC

46

12

SC

10

U2

5V

5K

X-G

PP

C4

61

2S

C1

0U

25

V5

KX

-GP

12

PC

46

11

SC

10

U2

5V

5K

X-G

PP

C4

61

1S

C1

0U

25

V5

KX

-GP

1 2PG4625

GAP-CLOSE-PWR-3-GP

PG4625

GAP-CLOSE-PWR-3-GP

12 E

C4

60

1S

CD

1U

50

V3

KX

-GP

DY

EC

46

01

SC

D1

U5

0V

3K

X-G

P

DY

12

PC4610SC10U6D3V3MX-GP

PC4610SC10U6D3V3MX-GP

1 2PR46100R0402-PADPR46100R0402-PAD

1 2PG4615

GAP-CLOSE-PWR-3-GP

PG4615

GAP-CLOSE-PWR-3-GP

12

PC4623SC

10

U6

D3

V3

MX

-GP

PC4623SC

10

U6

D3

V3

MX

-GP

1 2PC4608

SCD1U50V3KX-GP

PC4608

SCD1U50V3KX-GP

1 2PG4606

GAP-CLOSE-PWR-3-GP

PG4606

GAP-CLOSE-PWR-3-GP

12

PC4618SC

10

U6

D3

V3

MX

-GP

PC4618SC

10

U6

D3

V3

MX

-GP

1 2PG4602

GAP-CLOSE-PWR-3-GP

PG4602

GAP-CLOSE-PWR-3-GP

VTT20

VT

TR

EF

4

FB 6

VTTSNS2

VD

DP

12VLDOIN19

PHASE 16

UGATE 17

CS

13

S58

VTTGND1

PGOOD10

VDDQ 5

BOOT 18

LGATE 15

GN

D3

PGND 14

S37

VD

D11

TON9G

ND

21

PU4601

RT8207MZQW-GP-U

PU4601

RT8207MZQW-GP-U

1 2PG4613

GAP-CLOSE-PWR-3-GP

PG4613

GAP-CLOSE-PWR-3-GP

1 2PG4618

GAP-CLOSE-PWR-3-GP

PG4618

GAP-CLOSE-PWR-3-GP

12

PC

46

13

SC

D1

U5

0V

3K

X-G

PP

C4

61

3S

CD

1U

50

V3

KX

-GP

1 2PG4604

GAP-CLOSE-PWR-3-GP

PG4604

GAP-CLOSE-PWR-3-GP

1 2PG4612

GAP-CLOSE-PWR-3-GP

PG4612

GAP-CLOSE-PWR-3-GP

12


DY PC4615SC330P50V2KX-3GP

DY

12


1 2PG4614

GAP-CLOSE-PWR-3-GP

PG4614

GAP-CLOSE-PWR-3-GP

1 2PG4610

GAP-CLOSE-PWR-3-GP

PG4610

GAP-CLOSE-PWR-3-GP

12345 6 7 8

SSSD D D D

G

PU4603

SIR

46

0D

P-T

1-G

E3

-GP

84.00460.037

SSSD D D D

G

PU4603

SIR

46

0D

P-T

1-G

E3

-GP

84.00460.037

12

PC4622SCD1U10V2KX-5GPDYPC4622SCD1U10V2KX-5GPDY

12

PC4620

SC

4D

7U

6D

3V

3K

X-G

P

PC4620

SC

4D

7U

6D

3V

3K

X-G

P

1 2PG4624

GAP-CLOSE-PWR-3-GP

PG4624

GAP-CLOSE-PWR-3-GP

1 2PR4606

620KR3J-GP

PR4606

620KR3J-GP

1 2PG4619

GAP-CLOSE-PWR-3-GP

PG4619

GAP-CLOSE-PWR-3-GP

12PR4601

5D1R2F-GP

PR4601

5D1R2F-GP

1 2PR4605 2D2R3J-2-GPPR4605 2D2R3J-2-GP

1 2PR46110R0402-PADPR46110R0402-PAD

1 2PG4609

GAP-CLOSE-PWR-3-GP

PG4609

GAP-CLOSE-PWR-3-GP

1 2

PL4601

COIL-1UH-34-GP-U

PL4601

COIL-1UH-34-GP-U

1 2PG4605

GAP-CLOSE-PWR-3-GP

PG4605

GAP-CLOSE-PWR-3-GP


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PWR_1D8V_EN

PWR_1D8V_PHASE

PWR_1D8V_PVDD

1D8V_FB_GAP

PWR_1D8V_FB

PWR_1D8V_SVIN

1D8V_S01D8V_PWR

3D3V_S5

3D3V_S0

PM_SLP_S3#19,27,36,37RUNPWROK45,46

Title


Date: Sheet of


SD

PWM_1D8V_RT8015B


<Core Design>

Title


Date: Sheet of


SD

PWM_1D8V_RT8015B


<Core Design>

Title


Date: Sheet of


SD

PWM_1D8V_RT8015B


<Core Design>

R1

R2

SSID = PWR.Plane.Regulator_1p8v

RT8068A for 1D8V_S0

Vo=0.6*(1+(R1/R2))

Design Current=1.1A

12

PR470610KR2F-2-GP

PR470610KR2F-2-GP

PVIN10

PGOOD4

SVIN8

FB 6

NC#7 7

LX#1 1

EN5

PVIN9

GND 11

LX#2 2

LX#3 3

PU4701

RT8068AZQWID-GP-U

PU4701

RT8068AZQWID-GP-U

1 2PG4713

GAP-CLOSE-PWR

PG4713

GAP-CLOSE-PWR

12


12

PC4702SC

10U6D

3V3M

X-G

P

DY

PC4702SC

10U6D

3V3M

X-G

P

DY

1 2PG4704

GAP-CLOSE-PWR

PG4704

GAP-CLOSE-PWR

1 2PL4702

IND-2D2UH-46-GP-U

PL4702

IND-2D2UH-46-GP-U

1 2PR4702 0R0402-PADPR4702 0R0402-PAD

1 2PG4701

GAP-CLOSE-PWR

PG4701

GAP-CLOSE-PWR

12

PC4708SC

10U6D

3V3M

X-G

P

PC4708SC

10U6D

3V3M

X-G

P

1 2PG4703

GAP-CLOSE-PWR

PG4703

GAP-CLOSE-PWR

12

PC4705SC

100P50V

2JN-3G

P

PC4705SC

100P50V

2JN-3G

P

12

PC4704SC22P50V2GN-GPDY PC4704SC22P50V2GN-GPDY

1 2PG4711

GAP-CLOSE-PWR

PG4711

GAP-CLOSE-PWR

12

PR4705100KR2J-1-GPPR4705100KR2J-1-GP

12

PC4706SC

10U6D

3V3M

X-G

P

PC4706SC

10U6D

3V3M

X-G

P

1 2PG4712

GAP-CLOSE-PWR

PG4712

GAP-CLOSE-PWR

1 2PR47032D2R2J-GPPR47032D2R2J-GP

12

PC4709SC

D1U

50V3K

X-G

P

PC4709SC

D1U

50V3K

X-G

P

12

PC4707SC

10U6D

3V3M

X-G

P

PC4707SC

10U6D

3V3M

X-G

P

12

PC4703SC1U6D3V2KX-GPPC4703SC1U6D3V2KX-GP

1 2PG4705

GAP-CLOSE-PWR

PG4705

GAP-CLOSE-PWR

12

PG

4714G

AP

-CLO

SE

-PW

R-3-G

PP

G4714

GA

P-C

LOS

E-P

WR

-3-GP


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PWR_VCCSA_SLEW

PWR_VCCSA_BST_R

PW

R_V

CC

SA

_SN

UB

PWR_VCCSA_BST

PWR_VCCSA_V5DRV

PWR_VCCSA_EN

PWR_VCCSA_VOUT

PWR_VCCSA_SW

PW

R_V

CC

SA

_CO

MP

_1

PWR_VCCSA_VIN

PW

R_V

CC

SA

_CO

MP

PWR_VCCSA_VID0

PW

R_V

CC

SA

_PG

OO

D

PWR_VCCSA_VID1

PW

R_V

CC

SA

_VR

EF

PWR_VCCSA_VIN0D85V_S0

5V_S5 3D3V_S0

VCCSA

0D85V_S0

5V_S5 PWR_VCCSA_VIND85V_PWRGD 42

1.05VTT_PWRGD 37,45

VCCSA_SENSE 9

VCCSA_SELECT1 9

VCCSA_SELECT0 9

Title


Date: Sheet of


SD

VCCSA_TPS51461


<Doc>

<Core Design>

Title


Date: Sheet of


SD

VCCSA_TPS51461


<Doc>

<Core Design>

Title


Date: Sheet of


SD

VCCSA_TPS51461


<Doc>

<Core Design>

Design Current = 4.2A OCP> 8.4A

TPS51461 for VCCSA

VCCSAVID0

L

L 0.725V

0.675V

L 0.8V

H

VID1

H

H

L

H

0.9V

20101130 X02:Follow the standard schematics.



TDK. 0.35uH 5*5*3DCR=3.9mohmIdc=11A, Isat=14.9A

1 2PL4801

IND-D35UH-GP

68.R3510.101

PL4801

IND-D35UH-GP

68.R3510.101

12

PR48032D2R5F-2-GPDYPR48032D2R5F-2-GPDY

12

PC4814SC

1U10V

2KX

-1GP

PC4814SC

1U10V

2KX

-1GP

1 2PR48070R2J-2-GPPR48070R2J-2-GP

1 2PR4811100R2F-L1-GP-U

PR4811100R2F-L1-GP-U

12

PC

4810

SC

22U6D

3V5M

X-2G

P

PC

4810

SC

22U6D

3V5M

X-2G

P

GN

D1

VR

EF

2

CO

MP

3

SLE

W4

VO

UT

5

MO

DE

6

SW#7 7SW#8 8SW#9 9

SW#10 10SW#11 11

BST 12

EN

13V

ID0

14V

ID1

15P

GO

OD

16V

5FIL

T17

V5D

RV

18

PGND19

PGND20

PGND21

VIN22

VIN23

VIN24

GND25

PU4801TPS51461RGER-GP

74.51461.043

PU4801TPS51461RGER-GP

74.51461.043

1 2PG4804

GAP-CLOSE-PWR

PG4804

GAP-CLOSE-PWR

1 2PG4807

GAP-CLOSE-PWR

PG4807

GAP-CLOSE-PWR1

2

PR48061R2F-GPPR48061R2F-GP

12

PC

4801

SC

22U6D

3V5M

X-2G

P

PC

4801

SC

22U6D

3V5M

X-2G

P

12


1 2PR4805 0R0402-PADPR4805 0R0402-PAD

12

PC4818SC560P50V-GPDYPC4818SC560P50V-GPDY

12


DYPC4804

SC1U6D3V2KX-GP

DY

1 2PG4805

GAP-CLOSE-PWR

PG4805

GAP-CLOSE-PWR

1 2PG4802

GAP-CLOSE-PWR

PG4802

GAP-CLOSE-PWR

12

PC4803

SC

D1U

50V3K

X-G

P

PC4803

SC

D1U

50V3K

X-G

P

1 2PG4801

GAP-CLOSE-PWR

PG4801

GAP-CLOSE-PWR

12

PR48024K99R2F-L-GPPR48024K99R2F-L-GP

12

PC

4809

SC

22U6D

3V5M

X-2G

P

DYP

C4809

SC

22U6D

3V5M

X-2G

P

DY

12


12

PC

4812

SC

D1U

50V3K

X-G

P

DY

PC

4812

SC

D1U

50V3K

X-G

P

DY

1 2PG4803

GAP-CLOSE-PWR

PG4803

GAP-CLOSE-PWR

1 2PG4808

GAP-CLOSE-PWR

PG4808

GAP-CLOSE-PWR

1 2PR4804 0R0402-PADPR4804 0R0402-PAD

1 2PG4806

GAP-CLOSE-PWR

PG4806

GAP-CLOSE-PWR

1 2PR4812 1KR2F-3-GP

DYPR4812 1KR2F-3-GP

DY

1 2PR48100R0402-PADPR48100R0402-PAD

12


1 2


12

PC4815

SC

4D7U

25V5K

X-G

P

PC4815

SC

4D7U

25V5K

X-G

P

12

PC4813

SC

4D7U

25V5K

X-G

P

PC4813

SC

4D7U

25V5K

X-G

P

1 2PR48010R0402-PADPR48010R0402-PAD

12

PC

4807

SC

22U6D

3V5M

X-2G

P

PC

4807

SC

22U6D

3V5M

X-2G

P

1 2PG4809

GAP-CLOSE-PWR

PG4809

GAP-CLOSE-PWR

12

PC4816SC

2D2U

10V3K

X-1G

P

PC4816SC

2D2U

10V3K

X-1G

P

1 2PR48080R0402-PADPR48080R0402-PAD

12

PR48094K7R2J-2-GPPR48094K7R2J-2-GP

12

PC

4811

SC

22U6D

3V5M

X-2G

P

PC

4811

SC

22U6D

3V5M

X-2G

P


L_BKLT_CTRLLVDS_VDD_EN

LVDSA_CLK

LCD_BRIGHTNESS

LVDSA_CLK#

3D3V_DDC_S0

LVDS_DDC_CLK_R

BLON_OUT_C

LCD_PRESENCE#

LVDS_DDC_DATA_R

BLON_OUT_C

LCD_BRIGHTNESSL_BKLT_CTRL

USB_CAMERA#USB_CAMERA

LCDVDD_R

LID_CLOSE#

3D3V_S0_CAMERA_IN

LVDS_VDD_EN

LCDVDD_DISCHARGE

LVDS_VDD_EN

LVDS_VDD_EN#

LID_CLOSE#

DCBATOUT_LCD DCBATOUT

LCDVDD 3D3V_S0

3D3V_S03D3V_S0_CAMERA

3D3V_S0

3D3V_S0

DCBATOUT_LCD

3D3V_S0_CAMERA

LCDVDD

3D3V_AUX_S5

LCDVDD

3D3V_AUX_S5

PANEL_BLEN 27L_BKLT_EN17

LVDS_VDD_EN17L_BKLT_CTRL17

CAMERA_EN 27

LVDSA_CLK17LVDSA_CLK#17

LVDSA_DATA217LVDSA_DATA2#17



LVDS_DDC_CLK_R17LVDS_DDC_DATA_R17

BLON_OUT27

LID_CLOSE#27,70

USB_PN1218USB_PP1218

LCD_DET#18

Title


Date: Sheet of


LA480 SD

LCD ConnectorA2


<Core Design>

Title


Date: Sheet of


LA480 SD

LCD ConnectorA2


<Core Design>

Title


Date: Sheet of


LA480 SD

LCD ConnectorA2


<Core Design>

Panel BL brightness/Power En/BL En

LCD POWER

LVDS connectorSSID = VIDEO

For EMI requestClose to LVDS connector

Main:69.50007.A41Second:69.50007.A31

Layout 40 mil

CAMERA POWER

Layout 40 mil

1.2A

LCD / Inverter Connector

74.05285.07F OBScheck 2nd source=74.05285.07F

Pin11 is CAMERA GND

Pin15 is CAMERA shielding GND

Pin20 is Hall Sensor GND

74.06288.07F SY6288CAAC74.02171.07F AP2171WG-7 High Active

High ActiveHigh Active

High ActiveSILERGYDIODESUPIGMT

74.07534.A7F OBS74.05240.A7F OBS

LCDVDD Discharge

12

EC4905

SC

5D6P

50V2C

N-1G

P

DYEC4905

SC

5D6P

50V2C

N-1G

P

DY

12

C4902

SC

1U25

V3K

X-1

-GP

C4902

SC

1U25

V3K

X-1

-GP

12

C4916SCD01U50V2KX-L-GPC4916SCD01U50V2KX-L-GP

123 4

RN4902SRN2K2J-1-GPRN4902SRN2K2J-1-GP

OUT1

GND2

OC#3 EN/EN# 4

IN 5

U4901

SY6288CAAC-GP

U4901

SY6288CAAC-GP

OUT1

GND2

OC#3 EN/EN# 4

IN 5

U4902

SY6288CAAC-GP74.06288.07F

U4902

SY6288CAAC-GP74.06288.07F

12R49260R0402-PAD R49260R0402-PAD

12

C4922SC1U6D3V2KX-GP

C4922SC1U6D3V2KX-GP

12

C4908

SC

4D7U

6D3V

3KX

-GP

C4908

SC

4D7U

6D3V

3KX

-GP

1

23456789

10111213141516171819202122232425262728293031323334353637383940

41

42

LVDS1

JAE-CON40-4-GP20.K0568.040

LVDS1

JAE-CON40-4-GP20.K0568.040

12R49250R0402-PAD R49250R0402-PAD

12

C4904

SC

1KP

50V2K

X-1G

P

C4904

SC

1KP

50V2K

X-1G

P

12


12

C4901SC100P50V2JN-3GPC4901SC100P50V2JN-3GP

12


1 2R4905 0R0402-PADR4905 0R0402-PAD

1

2

34

5

6

Q4901

2N7002KDW-GP84.2N702.A3F

2nd = 84.DM601.03F

Q4901

2N7002KDW-GP84.2N702.A3F

2nd = 84.DM601.03F

12

R4930100R2J-2-GPR4930100R2J-2-GP

12

EC4904

SC

5D6P

50V2C

N-1G

P

DYEC4904

SC

5D6P

50V2C

N-1G

P

DY

1 2F4902 FUSE-3A32V-12-GPF4902 FUSE-3A32V-12-GP

1 2R4922 0R0805-PADR4922 0R0805-PAD

12

C4909

SC

D1U

16V2K

X-3G

P

DY

C4909

SC

D1U

16V2K

X-3G

P

DY

12

C4905

SC

D1U

50V3K

X-G

P

C4905

SC

D1U

50V3K

X-G

P

12

C4906

SC

D1U

50V3K

X-G

P

C4906

SC

D1U

50V3K

X-G

P

12

R4929100KR2J-1-GPR4929100KR2J-1-GP

1 2F4903 FUSE-D5A32V-14-GPF4903 FUSE-D5A32V-14-GP

12

R4911

100KR

2J-1-GP

R4911

100KR

2J-1-GP

12

C4907

SC

4D7U

6D3V

3KX

-GP

C4907

SC

4D7U

6D3V

3KX

-GP

1AFTP4901AFTP4901

12R49240R0402-PAD R49240R0402-PAD

1 2R4903

1KR2J-1-GP

R4903

1KR2J-1-GP

1 2R4928 33R2J-2-GPR4928 33R2J-2-GP

12

EC4902SC

33P50V

2JN-3G

P

DY

EC4902SC

33P50V

2JN-3G

P

DY

12

F4901POLYSW-1D1A24V-GP-U2nd = 69.50007.A41

F4901POLYSW-1D1A24V-GP-U2nd = 69.50007.A41

12


12

C4910

SC

100P50V

2JN-3G

P

C4910

SC

100P50V

2JN-3G

P


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

CRT_RCRT_GCRT_B

CRT_DDCDATA_CONCRT_DDCCLK_CON

CRT_VSYNC_CONCRT_HSYNC_CON 3D3V_S0_DDC

CRT_R

CRT_G

CRT_B

3D3V_S0_DDC

CRT_DDCCLK_CON

CRT_DDCDATA_CON

CRT_DDCCLK_CONCRT_VSYNC_CON

CRT_DDCDATA_CONCRT_HSYNC_CON

5V_CRT_DDC

CRT_BLUE

CRT_RED

CRT_GREEN

CRT_VSYNC1_2 CRT_VSYNC_CONCRT_HSYNC1_2 CRT_HSYNC_CON

CRT_HSYNC_CON

CRT_DDCDATA_CON

CRT_DDCCLK_CON

CRT_VSYNC_CON

5V_CRT_S0CRT_DDCDATA_CONCRT_DDCCLK_CONCRT_RCRT_GCRT_BCRT_VSYNC_CONCRT_HSYNC_CON

5V_CRT_S0

3D3V_S0

5V_S05V_CRT_S0

5V_S0

5V_CRT_S0

3D3V_S0

5V_CRT_S0

CRT_RED17

CRT_GREEN17

CRT_BLUE17

CRT_DDC_CLK17

CRT_DDC_DATA17

CRT_VSYNC 17CRT_HSYNC 17

Title


Date: Sheet of


LA480 SD

CRT ConnectorA2


<Core Design>

Title


Date: Sheet of


LA480 SD

CRT ConnectorA2


<Core Design>

Title


Date: Sheet of


LA480 SD

CRT ConnectorA2


<Core Design>

CRT Hsync & Vsync level shift

CRT RGB

Pull High 5V Design on CRT BoardCRT DDCDATA & DDCCLK level shift

500mA

CRT connector

1

2

3

D5003

CH221GP-GP-U

DY

D5003

CH221GP-GP-U

DY

12

C5011

SC

100P50V

2JN-3G

P

DY

C5011

SC

100P50V

2JN-3G

P

DY

1AFTP5006AFTP5006

1AFTP5001AFTP5001

123 4

RN5003SRN10KJ-5-GP

RN5003SRN10KJ-5-GP

123 4


1AFTP5008AFTP5008

12

C5004

SC

10P50V

2JN-4G

P

C5004

SC

10P50V

2JN-4G

P

12

C5003

SC

8P250V

2CC

-GP

DY

C5003

SC

8P250V

2CC

-GP

DY

1

2

3

D5007

CH221GP-GP-U

DY

D5007

CH221GP-GP-U

DY

12

C5005

SC

10P50V

2JN-4G

P

C5005

SC

10P50V

2JN-4G

P

12

C5002

SC

8P250V

2CC

-GP

DY

C5002

SC

8P250V

2CC

-GP

DY

G1#1 A1 2

Y2 3GND4

A2 5

Y1 6

G2#7

VCC 8

U5001

TC7WT125FU-GP

2nd = 73.2G125.A0B73.7W125.007

U5001

TC7WT125FU-GP

2nd = 73.2G125.A0B73.7W125.007

1

2

3

D5004

CH221GP-GP-U

DY

D5004

CH221GP-GP-U

DY

12

C5001

SC

8P250V

2CC

-GP

DY

C5001

SC

8P250V

2CC

-GP

DY

1 2R5001 10R2J-2-GPR5001 10R2J-2-GP

1AFTP5003AFTP5003

12


21

D5001CH551H-30PT-GP

2ND = 83.5R003.08F3rd = 83.R5003.G8F

83.R5003.C8F

D5001CH551H-30PT-GP

2ND = 83.5R003.08F3rd = 83.R5003.G8F

83.R5003.C8F

1

2

3

D5006

CH221GP-GP-U

DY

D5006

CH221GP-GP-U

DY

1AFTP5005AFTP5005

1

2

34

5

6

Q5001

2N7002KDW-GP

2nd = 84.2N702.A3F84.DM601.03F

Q5001

2N7002KDW-GP

2nd = 84.2N702.A3F84.DM601.03F

12

F5001FUSE-1D1A6V-4GP-U

69.50007.6912nd = 69.50007.771

F5001FUSE-1D1A6V-4GP-U

69.50007.6912nd = 69.50007.771

1AFTP5007AFTP5007

1 2R5003 10KR2J-3-GPR5003 10KR2J-3-GP

12

C5010

SC

18P50V

2JN-1-G

P

DY

C5010

SC

18P50V

2JN-1-G

P

DY

12


CRT_RED1

CRT_GREEN2

CRT_BLUE3

NC#4 4VCC_CRT9

NC#11 11

DDCDATA_ID112

DDCCLK_ID315

VSYNC14

HSYNC13

GND 5

GND 6

GND 7

GND 8

GND 10

GND 16

GND 17

CRT1

D-SUB-15-136-GP20.20961.015

CRT1

D-SUB-15-136-GP20.20961.015

1

2

3

D5002

CH221GP-GP-U

DY

D5002

CH221GP-GP-U

DY

1 2 3 45678

RN5001

SRN150F-1-GP

RN5001

SRN150F-1-GP

1 AFTP5009AFTP5009

12

C5009

SC

18P50V

2JN-1-G

P

DY

C5009

SC

18P50V

2JN-1-G

P

DY

1

2

3

D5008

CH221GP-GP-U

DY

D5008

CH221GP-GP-U

DY

12

C5008

SC

100P50V

2JN-3G

P

DY

C5008

SC

100P50V

2JN-3G

P

DY

1 2L5003

FCM1608CF-220T05-GP68.00245.0112nd = 68.00230.021

L5003

FCM1608CF-220T05-GP68.00245.0112nd = 68.00230.021

1 2L5002

FCM1608CF-220T05-GP68.00245.0112nd = 68.00230.021

L5002

FCM1608CF-220T05-GP68.00245.0112nd = 68.00230.021

1

2

3

D5005

CH221GP-GP-U

DY

D5005

CH221GP-GP-U

DY

1 2L5001

FCM1608CF-220T05-GP68.00245.0112nd = 68.00230.021

L5001

FCM1608CF-220T05-GP68.00245.0112nd = 68.00230.021

1AFTP5002AFTP5002

12

C5006

SC

10P50V

2JN-4G

P

C5006

SC

10P50V

2JN-4G

P

1AFTP5004AFTP5004

1 2R5002 10R2J-2-GPR5002 10R2J-2-GP


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

HDMI_DATA0_R_C1

HDMI_CLK_R_C1

HDMI_DATA1_R_C1#

HDMI_CLK_R_C1#

HDMI_DATA1_R_C1

HDMI_DATA2_R_C1#HDMI_DATA2_R_C1

HDMI_DATA1_R_C

HPD_HDMI_CON

5V_HDMI

HDMI_DATA2_R_C

HDMI_DATA0_R_C

DDC_DATA_HDMIDDC_CLK_HDMI

HPD_HDMI_CON

HDMI_CLK_R_C#

HDMI_DATA1_R_C#

HDMI_DATA2_R_C#

HDMI_DATA0_R_C#HDMI_CLK_R_C

HDMI_DATA0_R_C1#

HDMI_PLL_GND

HDMI_CLK_R_C1#

HDMI_CLK_R_C1 HDMI_CLK_R_C

HDMI_CLK_R_C#

HDMI_DATA0_R_C1#

HDMI_DATA0_R_C1 HDMI_DATA0_R_C

HDMI_DATA0_R_C#

HDMI_DATA1_R_C1#


HDMI_DATA1_R_C#

HDMI_DATA2_R_C1#


HDMI_DATA2_R_C#

5V_H

DM

I_S0_1

DDC_CLK_HDMI

DDC_DATA_HDMI

5V_H

DM

I_S0_2

5V_HDMI_S0

HPD_HDMI_CON

DDC_CLK_HDMI

DDC_DATA_HDMI

HDMI_CLK_R_C

HDMI_DATA0_R_C#

HDMI_DATA2_R_C

HDMI_DATA1_R_C#

HDMI_DATA0_R_C

HDMI_CLK_R_C#

HDMI_DATA2_R_C#

HDMI_DATA1_R_C

HDMI_PIN13

HDMI_PIN13

3D3V_S0

3D3V_S0

3D3V_S0

5V_S0

5V_S0

HDMI_CLK_R#17HDMI_CLK_R17

HDMI_DATA0_R#17HDMI_DATA0_R17



HDMI_PCH_DET17

PCH_HDMI_CLK17

PCH_HDMI_DATA17

Title


Date: Sheet of


LA480 SD

HDMI Level Shifter/ConnectorA2


<Core Design>

Title


Date: Sheet of


LA480 SD



<Core Design>

Title


Date: Sheet of


LA480 SD



<Core Design>

HDMI DDC Passive Level Shifter

HDMI Passive Level Shifter

SSID = VIDEO

Close to HDMI Connector HDMI CONNECTOR

Close to HDMI Connector

DG: 20K PD

EMI's request

DG: 2.2K PU

ESD Request


1

2

3 4

5

6

Q5104

2N7002KDW-GP

84.2N702.A3F2nd = 84.DM601.03F

Q5104

2N7002KDW-GP

84.2N702.A3F2nd = 84.DM601.03F


12

C5102

SC

D1U

10V2K

X-5G

P

C5102

SC

D1U

10V2K

X-5G

P

1 2

R51200R2J-2-GPR51200R2J-2-GP

1 2

R51180R2J-2-GPR51180R2J-2-GP

2 1

D5101

CH551H-30PT-GP2ND = 83.5R003.08F3rd = 83.R5003.G8F83.R5003.C8F

D5101

CH551H-30PT-GP2ND = 83.5R003.08F3rd = 83.R5003.G8F83.R5003.C8F

12

R51011MR2F-GPR51011MR2F-GP


G S

DQ51032N7002K-2-GP

2ND = 84.2N702.J3184.2N702.J31

Q51032N7002K-2-GP

2ND = 84.2N702.J3184.2N702.J31

G

S

D

Q5102

2N7002K-2-GP84.2N702.J312ND = 84.2N702.031

Q5102

2N7002K-2-GP84.2N702.J312ND = 84.2N702.031


1 2R5110 180R2F-1-GPDYR5110 180R2F-1-GPDY

12

R5104100KR2J-1-GP

DY

R5104100KR2J-1-GP

DY

12F5101

FUSE-1D1A6V-4GP-U69.50007.691

2nd = 69.50007.771

F5101

FUSE-1D1A6V-4GP-U69.50007.691

2nd = 69.50007.771

1 2R5108 180R2F-1-GPDYR5108 180R2F-1-GPDY


1 2

R51210R2J-2-GPR51210R2J-2-GP

12

D5105

PE

SD

5V0U

1BL-G

P-U

1

D5105

PE

SD

5V0U

1BL-G

P-U

1

1 2 3 45678

RN5101SRN680-U-GP

RN5101SRN680-U-GP


1 2

R51150R2J-2-GPR51150R2J-2-GP

12

R5106100KR2J-1-GPR5106100KR2J-1-GP

12

D5108

PE

SD

5V0U

1BL-G

P-U

1

D5108

PE

SD

5V0U

1BL-G

P-U

1

1 2

R51140R2J-2-GPR51140R2J-2-GP

12345 6 7 8

RN5102SRN680-U-GP

RN5102SRN680-U-GP

1 2

R51190R2J-2-GPR51190R2J-2-GP

1 2

R51170R2J-2-GPR51170R2J-2-GP

1

2

3

D5102BAW56-5-GP

83.00056.Q112nd = 83.00056.K11

D5102BAW56-5-GP

83.00056.Q112nd = 83.00056.K11

1 AFTP5121AFTP5121

1 2

R51160R2J-2-GPR51160R2J-2-GP


1 2R5109 180R2F-1-GPDYR5109 180R2F-1-GPDY

1 2R5113 0R2J-2-GP

DYR5113 0R2J-2-GP

DY

1 2C5104 SCD1U10V2KX-5GPC5104 SCD1U10V2KX-5GP1

23456789

111213141516171819

20

21

10

CHASSIS

CHASSIS

HDMI1

SKT-HDMI21-1-GP-U22.10296.571

CHASSIS

CHASSIS

HDMI1

SKT-HDMI21-1-GP-U22.10296.571

1 2R5107 180R2F-1-GPDYR5107 180R2F-1-GPDY

12

D5106

PE

SD

5V0U

1BL-G

P-U

1

D5106

PE

SD

5V0U

1BL-G

P-U

1

1 234


12

D5107

PE

SD

5V0U

1BL-G

P-U

1

D5107

PE

SD

5V0U

1BL-G

P-U

1


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


LA480 SD

eDPA4


<Core Design>

Title


Date: Sheet of


LA480 SD

eDPA4


<Core Design>

Title


Date: Sheet of


LA480 SD

eDPA4


<Core Design>

BLANK


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


LA480 SD

S-VIDEOA4


<Core Design>

Title


Date: Sheet of


LA480 SD

S-VIDEOA4


<Core Design>

Title


Date: Sheet of


LA480 SD

S-VIDEOA4


<Core Design>

BLANK


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


LA480 SD

ReservedA4


<Core Design>

Title


Date: Sheet of


LA480 SD

ReservedA4


<Core Design>

Title


Date: Sheet of


LA480 SD

ReservedA4


<Core Design>

BLANK


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


LA480 SD

ITPA4


<Core Design>

Title


Date: Sheet of


LA480 SD

ITPA4


<Core Design>

Title


Date: Sheet of


LA480 SD

ITPA4


<Core Design>

ITP ConnectorCPU

TCK(PIN AC5)

FBO(PIN 11)

TCK(PIN 5)

ITP ConnectorH_CPURST# use pull-up Resistor closeITP connector 500 mil ( max ),others place near CPU side.

SSID = User.Interfacehttp://laptopblue.vnhttp://laptopblue.vn

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A ASATA_ODD_PWRGT

SATA_ODD_DA#_C

ODD_PWR_5V

SATA_ODD_PWRGT SATA_ODD_DA#

OD

D_P

WR

GT

#

SATA_ODD_DA#_C

SATA_RXP4_CSATA_RXN4_C

SATA_TXN4_CSATA_TXP4_C

SATA_ODD_PRSNT#SATA_ODD_DA#_C

SATA_TXN4_C


SATA_TXP4_C

ODD_PWR_5V_IN

5V_S0_HDD

3D3V_S0_HDD

FFS_INT2

SATA_RXN1_C


SATA_RXP1_C

FFS_INT2

SATA_ODD_DA#

3D3V_S0

5V_S0

5V_S0

ODD_PWR_5V

ODD_PWR_5V

3D3V_S0

5V_S0

SATA_ODD_PWRGT22

SATA_ODD_PRSNT# 22

SATA_RXN421SATA_RXP421

SATA_TXN421SATA_TXP421

SATA_RXN121

SATA_TXN121SATA_TXP121

SATA_RXP121

SATA_ODD_DA# 18,27

HDD_DET#27

Title


Date: Sheet of


LA480 SD

HDD/ODDA3


<Core Design>

Title


Date: Sheet of


LA480 SD

HDD/ODDA3


<Core Design>

Title


Date: Sheet of


LA480 SD

HDD/ODDA3


<Core Design>

SUPPORT ZERO SATA ODD

SATA HDD Connector

ODD Connector

SATA Zero Power ODDCurrent limit

Active High

typ =>2A

100 milWhen the drive is powered on, the FET to the MD/DA pin drive is OFF.When the drive is powered off, the FET to the MD/DA pin is ON

SATA_RX- and SATA_RX+ TraceLength match within 20 mil

Mars:Exchange ODD and ESATA differential pair each other.

74.02069.079 TI TPS2069DGNR MSOP 8P74.07534.D79 UPI UP7534PRA8-15 MSOP 8P74.00547.C79 GMT G547F1P81U MSOP 8P (OBS)74.07534.A79 UPI UP7534ARA8-15 MSOP8P

74.02069.079 TPS2069DGNRAP2171WG-7 High Active

High Active

High ActiveTIDIODESUPI 74.07534.A7F OBS

GND S1

A+S2A-S3 GND S4

B-S5

B+S6

GND S7

DP P1+5VP2

+5VP3MD P4

GND P5

GND P6

GND 14

GND 15

NP1NP1

NP2NP2

ODD1

SKT-SATA7P-6P-59-GP-U22.10300.B91

ODD1

SKT-SATA7P-6P-59-GP-U22.10300.B91

12

R560410KR2J-3-GP

DY

R560410KR2J-3-GP

DY

1 2R56070R0805-PADR56070R0805-PAD

12

C5605

SC

10U10V

5KX

-2GP

C5605

SC

10U10V

5KX

-2GP

12

C5601

SC

D1U

10V2K

X-5G

P

DY

C5601

SC

D1U

10V2K

X-5G

P

DY

12 C5607SCD01U50V2KX-1GP C5607SCD01U50V2KX-1GP

12

C5606

SC

D1U

10V2K

X-5G

P

C5606

SC

D1U

10V2K

X-5G

P


1 2R56060R0805-PADR56060R0805-PAD

GND1IN2EN1#3EN2#4

OC1# 8OUT1 7OUT2 6OC2# 5

GND 9

U5601TPS2064DGNR-GP-UU5601TPS2064DGNR-GP-U

12

C5604

SC

10U6D

3V5K

X-1G

P

DY

C5604

SC

10U6D

3V5K

X-1G

P

DY

1TP5607TP5607

12R56020R2J-2-GP

DYR56020R2J-2-GP

DY

1 2 3456

Q56012N7002KDW-GP84.2N702.A3F2nd = 84.DM601.03F

Q56012N7002KDW-GP84.2N702.A3F2nd = 84.DM601.03F

1 2R5609 10KR2J-3-GPDYR5609 10KR2J-3-GPDY




12

C5609SC10U6D3V5KX-1GP

C5609SC10U6D3V5KX-1GP


1 2 C5615SCD01U50V2KX-1GP C5615SCD01U50V2KX-1GP

12

C5610SC

10U6D

3V5K

X-1G

P

C5610SC

10U6D

3V5K

X-1G

P

1 2 C5616SCD01U50V2KX-1GP C5616SCD01U50V2KX-1GP

NP1

NP2

23

24

1

23456789

101112131415

16171819202122

HDD1

SKT-SATA22P-27-GP-U162.10065.471

HDD1

SKT-SATA22P-27-GP-U162.10065.471

12

R5605100KR2J-1-GPR5605100KR2J-1-GP

1 2R56030R0805-PADR56030R0805-PAD

1 2R5608 10KR2J-3-GPR5608 10KR2J-3-GP


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


LA480 SD

E-SATA+USBA4


<Core Design>

Title


Date: Sheet of


LA480 SD

E-SATA+USBA4


<Core Design>

Title


Date: Sheet of


LA480 SD

E-SATA+USBA4


<Core Design>

BLANK


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

AUD_SPK_L+

AUD_SPK_R+AUD_SPK_L-

AUD_SPK_R-

AUD_DMIC_CLK_L

AUD_DMIC_CLK_L

AUD_DMIC_DATA_L

AUD_DMIC_CLK_L

AUD_DMIC_DATA_L

3D3V_S0GND

AUD_DMIC_DATA_L

AUD_DMIC_CLK_LAUD_DMIC_DATA_L

AU_GND

AU_GND AU_GND

3D3V_S0

AUD_SPK_L+29

AUD_SPK_L-29AUD_MIC2_VREFO29

AUD_MIC229

AUD_DMIC_CLK29AUD_DMIC_DATA29

AUD_SPK_R+29

AUD_SPK_R-29

Title


Date: Sheet of


LA480 SD

Audio JackA2


<Core Design>

Title


Date: Sheet of


LA480 SD

Audio JackA2


<Core Design>

Title


Date: Sheet of


LA480 SD

Audio JackA2


<Core Design>

Place these EMI componentsclose to speaker connector.

Only needed if speakerconnector is physically far fromaudio codec. When in doubt, it'salways a good idea to havepopulation option.

INTERNAL STEREO SPEAKERS

83.RSB56.BAF

83.ESD5B.0AF

ROHM

Description Lenovo P/N Wistron P/N

Table 58.1 - Bi-direction ESD multi-source

N/A

N/A

ESD5B5.0ST1G

RSB5.6SMT2R

Supplier

83.0005V.0AFNXP N/APESD5V0S1BB

ON SEMI

CHECK PIN DEFINE, RIGHT? LEFT?

CHECK PIN DEFINE

Int. Mono Analog MIC for B series

Int. Digital MIC for V series

ME change P/N at SITOld 20.F1639.004New 20.F1621.004

1 2R5808 1KR2J-1-GPB Series-MICR5808 1KR2J-1-GPB Series-MIC

1AFTP5804AFTP5804

1AFTP5805AFTP5805

12

EC5801SC47P50V2JN-3GP



1AFTP5807AFTP5807

1AFTP5808AFTP5808

1 2L5802

SBY100505T-601Y-N-GPV Series-MIC

L5802SBY100505T-601Y-N-GPV Series-MIC

12

C5804

SC

1KP

50V2K

X-1G

P

V Series-MIC

C5804

SC

1KP

50V2K

X-1G

P

V Series-MIC

12



12C5807

SC100P50V2JN-3GPB Series-MIC

C5807SC100P50V2JN-3GPB Series-MIC

4

1

2

3SPK2

ACES-CON2-17-GP20.F1621.002

SPK2

ACES-CON2-17-GP20.F1621.002

12

C5805

MLV

G0402220N

V09B

P-G

P

DYC5805

MLV

G0402220N

V09B

P-G

P

DY

1 2R5811 2K2R2J-2-GPB Series-MICR5811 2K2R2J-2-GPB Series-MIC

1AFTP5809AFTP5809

1 2R5812 0R2J-2-GPB Series-MICR5812 0R2J-2-GPB Series-MIC

12

C5806

MLV

G0402220N

V09B

P-G

P

DYC5806

MLV

G0402220N

V09B

P-G

P

DY

1AFTP5810AFTP5810

1

234

5

6MIC1

ACES-CON4-17-GP-U120.F1621.004

MIC1

ACES-CON4-17-GP-U120.F1621.004

1 2R5813 0R2J-2-GPDYR5813 0R2J-2-GPDY

12



12

D5801

MLV

G04

0222

0NV

05B

P-G

P-U

DYD5801

MLV

G04

0222

0NV

05B

P-G

P-U

DY

1 2

L5801SBY100505T-601Y-N-GP

V Series-MIC

L5801SBY100505T-601Y-N-GP

V Series-MIC

1AFTP5806AFTP5806

1AFTP5803AFTP5803

12



4

1

2

3SPK1

ACES-CON2-17-GP20.F1621.002

SPK1

ACES-CON2-17-GP20.F1621.002


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

RJ45_7

RJ45_4

MCT3

MC

T_R

MCT1MCT4

RJ45_1

MCT3

MCT2XRF_TDC

RJ45_5

MCT2

MCT4

RJ45_3

RJ45_6

MCT1

RJ45_8

RJ45_2

RJ45_1

RJ45_2

RJ45_8

RJ45_7

LAN_ACT_LED#_1

RJ45_2

RJ45_8

RJ45_5RJ45_6

RJ45_4RJ45_3

RJ45_7

SPEED_100#_1RJ45_1

RJ45_6

RJ45_4

RJ45_5

RJ45_3

3D3V_LAN_S5

MDI3+31

MDI3-31

MDI2-31

MDI1+31

MDI1-31

MDI0+31

MDI0-31

MDI2+31

LAN_ACT_LED#31

SPEED_100#31

Title


Date: Sheet of


LA480 SD

RJ45 / TransformerA3


<Core Design>

Title


Date: Sheet of


LA480 SD



<Core Design>

Title


Date: Sheet of


LA480 SD



<Core Design>

C5901 value modify to 0.01uF ~0.4uF capacitor

FOR CO-LAYGIGA Lan Transformer

LAN Connector

1st 68.IH601.301(Taimag) for 100068.HH035.301(Taimag) for 10/1002nd68.2413S.30A(Lankom) for 100068.H6441.301(Lankom) for 10/100

TVS83.00005.BAEDIODE ARR SRV05-4.TCT SOT-23-6

83.09904.AAEDIODE ESD AZC099-04S SOT23-6L

Swap for V480

close to RJ45

1

2

3

4

5

6

7

8

9

11

12 13

14

15

16

17

18

19

20

21

22

23

24

10

1CT:1CT

1CT:1CT

1CT:1CT

1CT:1CT

XF5901

XFORM-24P-19-GP68.IH601.3012ND = 68.89240.30D

1CT:1CT

1CT:1CT

1CT:1CT

1CT:1CT

XF5901

XFORM-24P-19-GP68.IH601.3012ND = 68.89240.30D

12

EC5901SCD1U50V3KX-GP

EC5901SCD1U50V3KX-GP

12


1 2R5903 330R2J-3-GPR5903 330R2J-3-GP

1 2330R2J-3-GPR5904 330R2J-3-GPR5904

12C5904

SC1KP2KV6KX-GPC5904

SC1KP2KV6KX-GP

1 2 3 45678

RN5902SRN75J-1-GPRN5902SRN75J-1-GP

1

2

34

5

6

D5902

SRV05-4-2-GP

DYD5902

SRV05-4-2-GP

DY

1

910

2345678

1112

1314

1516

CHASSISCHASSIS

CHASSISCHASSIS

GREEN

YELLOW

RJ45

RJ45-8P-91-GP22.10277.U11

CHASSISCHASSIS

CHASSISCHASSIS

GREEN

YELLOW

RJ45

RJ45-8P-91-GP22.10277.U11

1

2

34

5

6

D5901

SRV05-4-2-GP

DYD5901

SRV05-4-2-GP

DY


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

RTC_PWR

+RTC_VCC

+RTC_VCC

GND

SPI_SOSPI_WP#

SPI_SI_R_1

SPI_HOLD_0#SPI_CLK_R_1

SPI_SO1

SPI_SI_R_2SPI_CLK_R_2

SPI_WP# SPI_HOLD_0#

RTC_PWR

3D3V_SPI 3D3V_S5

RTC_AUX_S5 3D3V_AUX_S5 +RTC_VCC

3D3V_SPI 3D3V_SPI

3D3V_SPI

3D3V_SPI

3D3V_SPI

SPI_SO_R21,27SPI_CS0#_R21,27

SPI_SO_R21,27SPI_CS1#_R21

SPI_CLK_R 21,27SPI_SI_R 21,27

SPI_CLK_R 21,27SPI_SI_R 21,27

RTC_DET# 20

Title


Date: Sheet of


LA480 SD

Flash/RTCA3


<Core Design>

Title


Date: Sheet of


LA480 SD

Flash/RTCA3


<Core Design>

Title


Date: Sheet of


LA480 SD

Flash/RTCA3


<Core Design>

SSID = Flash.ROM

SSID = RBATT

SPI FLASH ROM (8M byte) for PCH

the same page 23 VCCSPI power

Width=20mils

MX25L12835EZNI-10G

72.25Q64.D01

72.25320.C01

72.25Q32.A01

72.25032.H01

Marcronix

SO8 Winbond

4MB

MX25L3206EM2I-12G

72.25128.X01

72.25128.Y01

W25Q032BVSSIG

Numonyx N25Q032A13ESE40

Marcronix

SO8 Winbond

8MB

W25Q064CVSSIG

Numonyx N25Q064A13ESE40

72.25128.B03

72.25128.I01

MX25L6406EM2I-12G 72.25640.D01

72.25Q64.B01

Marcronix

WSON

Winbond

16MB

W25Q128BVEIG

Numonyx N25Q128A13EF840

MX25L12836EZNI-10G

123 4


1 2R6002 1KR2J-1-GPR6002 1KR2J-1-GP

12

EC6001SC4D7P50V2CN-1GP

DY EC6001SC4D7P50V2CN-1GP

DY

1 2R60100R0402-PADR60100R0402-PAD

12


DY EC6006SC4D7P50V2CN-1GP

DY

12

C6001

SC

10U6D

3V5K

X-1G

P

DY

C6001

SC

10U6D

3V5K

X-1G

P

DY

12

C6002

SC

D1U

10V2K

X-5G

P

C6002

SC

D1U

10V2K

X-5G

P

12

R60044K7R2J-2-GP

R60044K7R2J-2-GP

12


DYEC6003SC4D7P50V2CN-1GP

DY

12



DY

1AFTP6002AFTP6002

12



DY

2

1

3

Q6001

CH715FPT-GP

2nd = 83.00040.E8183.R0304.B81

Q6001

CH715FPT-GP

2nd = 83.00040.E8183.R0304.B811

2

C6003SC1U6D3V2KX-GP

C6003SC1U6D3V2KX-GP

1 2R6006 33R2J-2-GPR6006 33R2J-2-GP

1 2R6001

33R2J-2-GPR6001

33R2J-2-GP

S#1

DQ12

W#/VPP3

VSS4

DQ0 5C 6

HOLD# 7VCC 8GND 9

U6002

LILY-BIOS-COLAY-GP-USBA

U6002

LILY-BIOS-COLAY-GP-USBA

1 2

R60120R2J-2-GP

DY

R60120R2J-2-GP

DY

1 2R6007 33R2J-2-GPR6007 33R2J-2-GP

1AFTP6001AFTP6001

1 2R6008 33R2J-2-GP

SBA

R6008 33R2J-2-GP

SBA

4

1

2

3RTC14

ACES-CON2-11-GP20.F0772.002

RTC14

ACES-CON2-11-GP20.F0772.002

G

S

D

Q6002

2N7002K-2-GP

Q6002

2N7002K-2-GP


12

R60054K7R2J-2-GP SBA

R60054K7R2J-2-GP SBA

1 2R6003

33R2J-2-GPSBA

R600333R2J-2-GPSBA

12

R601110MR2J-L-GP

R601110MR2J-L-GP

S#1

DQ12

W#/VPP3

VSS4

DQ0 5C 6

HOLD# 7VCC 8GND 9

U6001

LILY-BIOS-COLAY-GP-U

U6001

LILY-BIOS-COLAY-GP-U

12



DY


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

5V_USB4_S35V_S5

USB_OC#2_3 18USB_PWR_EN_R27,62,82

Title


Date: Sheet of


LA480 SD

USB ConnectorA3


<Core Design>

Title


Date: Sheet of


LA480 SD

USB ConnectorA3


<Core Design>

Title


Date: Sheet of


LA480 SD

USB ConnectorA3


<Core Design>

USB Board CONN.

at least 80 milat least 80 mil

Support 2A

Place U6102 close to USBCN1

OUT 1

GND 2

OC# 3EN/EN#4

IN5

U6102

SY6288CAAC-GP74.06288.07F

U6102

SY6288CAAC-GP74.06288.07F

12

C6103SC

D1U

10V2K

X-5G

P

DYC6103SC

D1U

10V2K

X-5G

P

DY


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

USB3_RX3_P_R

USB3_TX3_N_R

USB3_TX3_P_R

USB3_RX3_N_R

USB_PN1_R

USB_PP3_R

USB_PN3_R

USB_PP3_R USB_PN3_R

USB_PP1_R

USB_PN1_R

USB3_RX1_P USB3_RX1_P_R

USB3_TX1_N_C USB3_TX1_N_R

USB3_TX1_P_R

USB3_RX1_N USB3_RX1_N_R

USB3_TX1_P_C

USB3_TX3_N_C

USB3_TX3_P_C

USB_PP1_R

USB3_RX1_P_RUSB3_RX1_N_R

USB3_TX1_P_RUSB3_TX1_N_R

USB_PP1_RUSB_PN1_R



USB_PP3_RUSB_PN3_R

USB3_TX3_N_RUSB3_TX3_P_R

USB3_RX3_N_RUSB3_RX3_P_R



USB3_TX1_N_RUSB3_TX1_P_R

USB3_RX1_N_RUSB3_RX1_P_R



5V_USB1_S3

5V_USB2_S35V_USB1_S3

5V_USB2_S3

5V_USB1_S35V_USB2_S3

5V_S5

USB3_RX3_P18

USB3_RX3_N18

USB_PN318

USB_PP318

USB_PN118

USB_PP118

USB3_RX1_P18

USB3_RX1_N18

USB3_TX1_P18

USB3_TX1_N18 USB3_TX3_N18

USB3_TX3_P18

USB_PWR_EN_R27,61,82

USB_OC#4_5 18

USB_OC#0_1 18

Title


Date: Sheet of


LA480 SD

USB 3.0 Port*2A2


<Core Design>

Title


Date: Sheet of


LA480 SD

USB 3.0 Port*2A2


<Core Design>

Title


Date: Sheet of


LA480 SD

USB 3.0 Port*2A2


<Core Design>

TC6201 place near the USB1 connector

TC6202 place near the USB2 connector

USB3.0 Port4USB3.0 Port32A

at least 80 mil

USB3.0 Port1 USB3.0 Port2

1 2

R6201

0R0402-PAD

R6201

0R0402-PAD

1

2 3

4

D6202PRTR5V0U2X-GP

DY

D6202PRTR5V0U2X-GP

DY

1 2

R6209

0R0402-PAD

R6209

0R0402-PAD


GND 4

STDA_SSRX+ 6

STDA_SSTX- 8

STDA_SSTX+ 9

GND_DRAIN 7

STDA_SSRX- 5

D+3D-2

VBUS1

1010

1111

1212

1313

USB2

SKT-USB13-77-GP22.10339.K61

USB2

SKT-USB13-77-GP22.10339.K61


1 2

R6211

0R0402-PAD

R6211

0R0402-PAD

12

TC6201SE

220U6D

3VM

-30-GP

TC6201SE

220U6D

3VM

-30-GP


1 2

R6202

0R0402-PAD

R6202

0R0402-PAD

1 2

R6204

0R0402-PAD

R6204

0R0402-PAD

L1#11

L2#22

GNDG1

L3#33

L4#44 L4#5 5L3#6 6

L2#7 7L1#8 8

GND G2

D6201

RCLAMP0524P-GP

1st = 83.3V3U4.0A0

D6201

RCLAMP0524P-GP

1st = 83.3V3U4.0A0

1 2

R6206

0R0402-PAD

R6206

0R0402-PAD

L1#11

L2#22

GNDG1

L3#33

L4#44 L4#5 5L3#6 6

L2#7 7L1#8 8

GND G2

D6204

RCLAMP0524P-GP

1st = 83.3V3U4.0A0

D6204

RCLAMP0524P-GP

1st = 83.3V3U4.0A0

1 2

R6208

0R0402-PAD

R6208

0R0402-PAD

1 2

R6210

0R0402-PAD

R6210

0R0402-PAD

GND 4

STDA_SSRX+ 6

STDA_SSTX- 8

STDA_SSTX+ 9

GND_DRAIN 7

STDA_SSRX- 5

D+3D-2

VBUS1

1010

1111

1212

1313

USB1

SKT-USB13-77-GP22.10339.K61

USB1

SKT-USB13-77-GP22.10339.K61

1 2

R6212

0R0402-PAD

R6212

0R0402-PAD


12

C6205

SC

D1U

10V2K

X-5G

P

C6205

SC

D1U

10V2K

X-5G

P

GND1

IN2

EN1#3

EN2#4

OC1# 8

OUT1 7

OUT2 6

OC2# 5

GND 9

U6201

TPS2064DGNR-GP-U

U6201

TPS2064DGNR-GP-U

1 2

R6203

0R0402-PAD

R6203

0R0402-PAD

1

2 3

4

D6203PRTR5V0U2X-GP

DY

D6203PRTR5V0U2X-GP

DY

1 2

R6205

0R0402-PAD

R6205

0R0402-PAD

1 2

R6207

0R0402-PAD

R6207

0R0402-PAD

12

TC6202SE

220U6D

3VM

-30-GP

TC6202SE

220U6D

3VM

-30-GP


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

3D3V_BT_S0USB_PP4USB_PN4

3D3V_BT_IN

BT_LEDGND

3D3V_BT_S0

BT_LED

3D3V_S03D3V_BT_S0

BLUETOOTH_EN 27,65


Title


Date: Sheet of


LA480 SD

BluetoothA4


<Core Design>

Title


Date: Sheet of


LA480 SD

BluetoothA4


<Core Design>

Title


Date: Sheet of


LA480 SD

BluetoothA4


<Core Design>

SSID = User.Interface

Bluetooth conn.

BT Module pin definition is same as LA470

74.06288.07F SY6288CAAC74.02171.07F AP2171WG-7 High Active

High ActiveHigh Active

High ActiveSILERGYDIODESUPIGMT

74.07534.A7F OBS74.05240.A7F OBS

1

23456

7

8

BT1

ACES-CON6-42-GP20.F1705.006DY

BT1

ACES-CON6-42-GP20.F1705.006DY


1 2R63010R0805-PADR63010R0805-PAD1

2

EC6302SCD1U16V2KX-3GP DY

EC6302SCD1U16V2KX-3GP DY

1AFTP6306AFTP6306

12

C6302SC4D7U6D3V3KX-GPDY

C6302SC4D7U6D3V3KX-GPDY

1AFTP6305AFTP6305

OUT1

GND2

OC#3 EN/EN# 4

IN 5

U6301

SY6288CAAC-GP74.06288.07FDY

U6301

SY6288CAAC-GP74.06288.07FDY

1AFTP6302AFTP6302


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Biometric_USBPNBiometric_USBPP

3V_FP_S0

Biometric_USBPPBiometric_USBPN3V_FP_S0

3D3V_S0

USB_PP1018USB_PN1018

Title


Date: Sheet of


LA480 SD

Finger Printer ConnectorA4


<Core Design>

Title


Date: Sheet of


LA480 SD



<Core Design>

Title


Date: Sheet of


LA480 SD



<Core Design>

Finger Printer Connector

1

23456

7

8

FPCN1

ACES-CON6-13-GP20.K0320.006

FPCN1

ACES-CON6-13-GP20.K0320.006

12


1 2R64030R0805-PADR64030R0805-PAD

1 2R6402 0R0402-PADR6402 0R0402-PAD

1 2R6401 0R0402-PADR6401 0R0402-PAD

1AFTP6401AFTP6401

1AFTP6404AFTP6404



5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PCIE_WAKE#_1

CLK_PCI_LPC_CWLAN_LED#

E51_RXD_R

PLT_RST#_WLANE51_TXD_R

+3V_MINI_WLAN

LPC_FRAME#_C

LPC_AD2_C

LPC_AD0_C

LPC_AD3_C

LPC_AD1_C

LPC_FRAME#_C

CLK_PCI_LPC_C

LPC_AD2_C

LPC_AD0_C

LPC_AD3_C

LPC_AD1_C

+3V_MINI_WLAN

+1D5V_MINI_WLAN

BT_ENABLE

AOAC_EN_2

AOAC_EN_1

BLUETOOTH_EN

+5V_MINI_DEBUG

1D5V_S0 3D3V_S0

5V_S5

+3V_MINI_WLAN

5V_S5

+3V_MINI_WLAN

+1D5V_MINI_WLAN

+3V_MINI_WLAN+1D5V_MINI_WLAN

+3V_MINI_WLAN

3D3V_S5 +3V_MINI_WLAN

3D3V_S5

CLK_PCIE_WLAN#20CLK_PCIE_WLAN20


WIFI_RF_EN 27

PCIE_CLK_WLAN_REQ#20

E51_RXD27E51_TXD27



PCIE_RXP220PCIE_RXN220

PLT_RST# 5,18,27,31,36,66,71,80,82,83,97

PCIE_WAKE#19,31,66

LPC_AD2 21,27,71

LPC_AD0 21,27,71

LPC_AD3 21,27,71

LPC_AD1 21,27,71

LPC_FRAME# 21,27,71

CLK_PCI_LPC 18,71


BLUETOOTH_EN27,63

AOAC_EN27

PCIE_WLAN_WAKE#27

Title


Date: Sheet of


LA480 SD

MINICARD(WLAN)/ITP CONNA3


<Core Design>

Title


Date: Sheet of


LA480 SD



<Core Design>

Title


Date: Sheet of


LA480 SD



<Core Design>

SSID = Wireless

Mini Card Connector(802.11a/b/g/n)

G6506~G6511placememt close close WLAN1in bottom side

Place near MINI Card CONN

Reserve for AOAC

EB

CR1

R2

Q6502

PDTC115EE-1-GP

AOAC

84.00115.C1K2nd = 84.09115.0113rd = 84.00015.01H

R1

R2

Q6502

PDTC115EE-1-GP

AOAC

84.00115.C1K2nd = 84.09115.0113rd = 84.00015.01H

12

C6508

SC

D1U

10V

2KX

-5G

P

AOAC

C6508

SC

D1U

10V

2KX

-5G

P

AOAC

21G6502GAP-OPEN

G6502GAP-OPEN

21G6505GAP-OPEN

G6505GAP-OPEN

1 2R6510 0R0402-PADR6510 0R0402-PAD

1 2R6502 0R0402-PADR6502 0R0402-PAD

12

R6515

100K

R2J

-1-G

P

AOAC

R6515

100K

R2J

-1-G

P

AOAC

12


12


21G6504GAP-OPEN

G6504GAP-OPEN

12

R65120R5J-5-GP

AOAC-DY

R65120R5J-5-GP

AOAC-DY

12

R651710KR2J-3-GP

DY

R651710KR2J-3-GP

DY

12


1 2R6520 0R2J-2-GPR6520 0R2J-2-GP

21G6503GAP-OPEN

G6503GAP-OPEN

12


12

R652110KR2J-3-GPR652110KR2J-3-GP

12


1 2R6501 0R0402-PADR6501 0R0402-PAD

12

R651810KR2J-3-GP

AOAC

R651810KR2J-3-GP

AOAC

1 2R6511 0R2J-2-GPDYR6511 0R2J-2-GPDY

21G6511GAP-OPEN

G6511GAP-OPEN

1 TP6501TP6501

654 3 2 1

7 8

U6501TPCF8105-GP

AOACU6501TPCF8105-GP

AOAC

1 2R6513 0R2J-2-GPR6513 0R2J-2-GP

1

3579

111315

171921232527293133353739414345474951

2

46810121416

182022242628303234363840424446485052

53

54

NP1

NP2

WLAN1

TYCO-CONN52A-2-GP20.F1743.052

WLAN1


12

R65160R0805-PADR65160R0805-PAD

12


21G6501GAP-OPEN

G6501GAP-OPEN

12


1 2R6503 0R3J-0-U-GP

DY

R6503 0R3J-0-U-GP

DY

1 2R6519 0R2J-2-GPR6519 0R2J-2-GP


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PCH_SMBCLKPCH_SMBDATA

USB_P8-USB_P8+

PLT_RST#_WAN

3G_LED#+3V_MINI_WWAN



+3V_MINI_WWAN

+1D5V_MINI_WWAN

+1D5V_MINI_WWAN

+3V_MINI_WWAN+1D5V_MINI_WWAN

1D5V_S0 3D3V_S0

+3V_MINI_WWAN

+3V_MINI_WWAN+3V_MINI_WWAN+1D5V_MINI_WWAN

+3V_MINI_WWAN

PLT_RST# 5,18,27,31,36,65,71,80,82,83,97



PCIE_WAKE#19,31,65

SATA_RXP021

SATA_TXN021

SATA_RXN021

SATA_TXP021PCH_SMBDATA 14,15,20,65

-MSATA_DET27

Title


Date: Sheet of


LA480 SD

WWAN ConnectorA3


<Core Design>

Title


Date: Sheet of


LA480 SD

WWAN ConnectorA3


<Core Design>

Title


Date: Sheet of


LA480 SD

WWAN ConnectorA3


<Core Design>

Place near MINI Card CONN

Place near Pin 24

SSID = Wireless

Mini Card Connector(Full Card)

mSATA for V Series Only

12

C6608

SC

D1U

16V2K

X-3G

P

C6608

SC

D1U

16V2K

X-3G

P

12

R66060R0805-PADR66060R0805-PAD

12

C6619

SC

4D7U

6D3V

3KX

-GP

C6619

SC

4D7U

6D3V

3KX

-GP

12

C6609

SC

D047U

16V2K

X-1-G

P

C6609

SC

D047U

16V2K

X-1-G

P


12

C6606

SC

D047U

16V2K

X-1-G

P

C6606

SC

D047U

16V2K

X-1-G

P

12

R66070R0805-PADR66070R0805-PAD

1 2R66080R0402-PADR66080R0402-PAD

1

3579

111315

171921232527293133353739414345474951

2

46810121416

182022242628303234363840424446485052

53

54

NP1

NP2

WLAN2


WLAN2



12

C6603

SC

33P50V

2JN-3G

P

C6603

SC

33P50V

2JN-3G

P


1 TP6602TP6602

12

C6601

SC

D047U

16V2K

X-1-G

P

C6601

SC

D047U

16V2K

X-1-G

P

1 2R6604 0R2J-2-GP

DYR6604 0R2J-2-GP

DY

1 2R6603 0R3J-0-U-GPDYR6603 0R3J-0-U-GPDY

12

C6604

SC

33P50V

2JN-3G

P

DY

C6604

SC

33P50V

2JN-3G

P

DY

12

C6607

SC

33P50V

2JN-3G

P

C6607

SC

33P50V

2JN-3G

P

12

C6618

SC

4D7U

6D3V

3KX

-GP

C6618

SC

4D7U

6D3V

3KX

-GP

1 2R66050R0402-PADR66050R0402-PAD1 2C6612 SCD01U50V2KX-1GPC6612 SCD01U50V2KX-1GP

12

C6610

SC

33P50V

2JN-3G

P

C6610

SC

33P50V

2JN-3G

P

1 2R6601 0R3J-0-U-GPDYR6601 0R3J-0-U-GPDY

12

C6602

SC

D047U

16V2K

X-1-G

P

C6602

SC

D047U

16V2K

X-1-G

P


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


LA480 SD

ReservedA4


<Core Design>

Title


Date: Sheet of


LA480 SD

ReservedA4


<Core Design>

Title


Date: Sheet of


LA480 SD

ReservedA4


<Core Design>

BLANK


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

CAP_LED_Q

NUM_LED_Q

KBC_PWRBTN#_R

PWRLEDKBC_NOVO_BTN#_R

NUM_LED_RCAP_LED_RSATA_LED#_RAPS_LED#_R

SATA_LED#_Q

3D3V_S0

NUM_LED_R

APS_LED#_RSATA_LED#_RCAP_LED_R

3D3V_S5PWRLEDKBC_NOVO_BTN#_RKBC_PWRBTN#_R

APS_LED#_QSATA_LED#_Q

NUM_LED_QCAP_LED_Q

APS_LED#_Q

CHARGE_LED#_Q

DC_BATFULL#_Q

DC_BATFULL#_Q

CHARGE_LED#_Q

CHARGE_LED#_R

3D3V_S5

3D3V_S0

3D3V_S5

CAP_LED 27NUM_LED27

PWRLED27KBC_NOVO_BTN#27

KBC_PWRBTN#27

SATA_LED#21

APS_LED21

DC_BATFULL27 CHARGE_LED 27

Title


Date: Sheet of


LA480 SD

LED Bard/Power ButtonA3


<Core Design>

Title


Date: Sheet of


LA480 SD



<Core Design>

Title


Date: Sheet of


LA480 SD



<Core Design>

SSID = User.Interface

CHARGER LED

Yellow

GREEN

1

2

34

5

6

Q6802

2N7002KDW-GP

Q6802

2N7002KDW-GP

1 2R6818 470R2J-2-GPV Series-APSR6818 470R2J-2-GPV Series-APS

1 2R6807 100R2J-2-GPR6807 100R2J-2-GP

1AFTP6808AFTP6808

1AFTP6806AFTP6806

1AFTP6805AFTP6805

12

EC6809

SC

1KP

50V2K

X-1G

P

V Series-APSEC6809

SC

1KP

50V2K

X-1G

P

V Series-APS

1AFTP6804AFTP6804

1AFTP6803AFTP6803

1

2

34

5

6

Q6804

2N7002KDW-GP

Q6804

2N7002KDW-GP

1AFTP6801AFTP6801

12

EC6806

SC

1KP

50V2K

X-1G

P

EC6806

SC

1KP

50V2K

X-1G

P

21

G6801

GAP-OPEN

G6801

GAP-OPEN

1 2R6813 470R2J-2-GPR6813 470R2J-2-GP

1

23456

7

8

BTNCN1

ACES-CON6-22-GP-U20.K0487.006

BTNCN1

ACES-CON6-22-GP-U20.K0487.006

1 2R6824

0R2J-2-GP

DYR6824

0R2J-2-GP

DY

12

EC6811

SC

1KP

50V2K

X-1G

P

EC6811

SC

1KP

50V2K

X-1G

P

21

3R1

R2

Q6801

LTC043ZUB-FS8-GP

84.00043.011

R1

R2

Q6801

LTC043ZUB-FS8-GP

84.00043.011

12

EC6802

SC

1KP

50V2K

X-1G

P

EC6802

SC

1KP

50V2K

X-1G

P

1 2R6810 100R2J-2-GPR6810 100R2J-2-GP

1 2R6812 470R2J-2-GPR6812 470R2J-2-GP

EB

C

R1

R2Q6810

PDTA143ET-GP84.00143.M112nd = 84.02143.011

R1

R2Q6810

PDTA143ET-GP84.00143.M112nd = 84.02143.011

1AFTP6809AFTP6809

12

EC6804

SC

1KP

50V2K

X-1G

P

EC6804

SC

1KP

50V2K

X-1G

P

1AFTP6810AFTP6810 1AFTP6811AFTP6811

12

EC6808

SC1KP50V2KX-1GP

EC6808

SC1KP50V2KX-1GP

1AFTP6814AFTP6814

1 2R6809 100R2J-2-GPR6809 100R2J-2-GP

1AFTP6812AFTP6812

12

EC6805

SC

1KP

50V2K

X-1G

P

EC6805

SC

1KP

50V2K

X-1G

P

12

EC6801

SC

1KP

50V2K

X-1G

P

EC6801

SC

1KP

50V2K

X-1G

P

1AFTP6813AFTP6813

1

32

LED2

LED-GY-8-GP-U

83.00326.070

LED2

LED-GY-8-GP-U

83.00326.070

1 2R6802 100R2J-2-GPR6802 100R2J-2-GP

12

C6813

SC

D1U

16V2K

X-3G

P

DYC6813

SC

D1U

16V2K

X-3G

P

DY

1

2345678

9

10

LEDCN1

ACES-CON8-15-GP20.K0315.008

LEDCN1

ACES-CON8-15-GP20.K0315.008

12

EC6807

SC

1KP

50V2K

X-1G

P

EC6807

SC

1KP

50V2K

X-1G

P


A

A

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1

TP_PIN6

TP_DATA

TP_CLK

TPCLKTPDATA

TP_CLKTP_DATA

TP_SW_L TP_SW_R

TP_PIN5

TP_PIN1TP_PIN2

TP_PIN4

KCOL15

KCOL15

KCOL10

KCOL10

KCOL11

KCOL11KCOL14

KCOL14

KCOL13

KCOL13

KCOL12

KCOL12

KCOL3

KCOL3

KCOL6

KCOL6

KCOL8

KCOL8

KCOL7

KCOL7

KCOL4

KCOL4

KCOL2

KCOL2

KROW0

KROW0

KCOL5KCOL1

KCOL1KCOL5

KCOL0

KCOL9

KROW5

KROW2

KROW6

KROW1

KROW3

KROW7

KROW4

KCOL0

KCOL9

KROW5

KROW2

KROW6

KROW1KROW7

KROW3

KROW4

GND

TP_PIN3

TP_SW_LTP_SW_R

TP_PIN1

TP_PIN6

TP_PIN2TP_PIN3TP_PIN4TP_PIN5

TP_SW_RTP_SW_L

TP_PIN5TP_PIN4

TP_PIN3TP_PIN6

TP_PIN1TP_PIN2TP_CLK

TP_PIN1TP_PIN2TP_CLK

TP_DATATP_PIN4TP_PIN3

TP_DATA

5V_S0

5V_S0

3D3V_S0

KROW[0..7] 27

KCOL[0..15] 27

TPDATA27TPCLK27



Title


Date: Sheet of


LA480 SD

TOUCH PAD CONNECTORA2


<Core Design>

Title


Date: Sheet of


LA480 SD



<Core Design>

Title


Date: Sheet of


LA480 SD



<Core Design>

SB 1015 Swap data and clk

SSID = Touch.Pad

Internal KeyBoard Connector

SSID = KBC ClickPad for V Series 3.3V

Normal Pad for B Series 5V

KB14 for 14" VB480 & VB485KB15 for 15" VB580 & VB585

1 AFTP6920AFTP6920

123

4RN6904

SRN0J-6-GPB Series-TP

RN6904


1 AFTP6909AFTP6909

1 AFTP6907AFTP6907

1AFTP6931AFTP6931

1 AFTP6911AFTP69111 AFTP6912AFTP6912

1 AFTP6919AFTP6919

1 AFTP6908AFTP6908

1 AFTP6914AFTP6914

1 234

RN6901

SRN10KJ-5-GP

RN6901

SRN10KJ-5-GP

1AFTP6941AFTP6941

1 AFTP6916AFTP6916

1 AFTP6923AFTP6923

1AFTP6902AFTP6902

1 AFTP6905AFTP6905

12C6903

SC

100P50V

2JN-3G

P

DYC6903

SC

100P50V

2JN-3G

P

DY

1 AFTP6913AFTP6913

1 AFTP6922AFTP6922

1AFTP6942AFTP6942

123

4RN6903


RN6903


1AFTP6930AFTP6930

123

4RN6905


RN6905


1 AFTP6910AFTP6910

1AFTP6940AFTP6940

123

4RN6906

SRN0J-6-GPV Series-TP

RN6906


1 AFTP6928AFTP6928

12 3

4RN6902

SRN33J-5-GP-U

RN6902

SRN33J-5-GP-U

1AFTP6901AFTP6901

12C6904

SC

100P50V

2JN-3G

P

DYC6904

SC

100P50V

2JN-3G

P

DY

1 2

43

56

TPSW2SW-TACT4-14-GP62.40009.D71

B Series-TP


B Series-TP

1

23456789101112131415161718192021222324

25

26

KB14

ACES-CON24-7-GP20.K0320.024

2nd = 20.K0391.024

KB14

ACES-CON24-7-GP20.K0320.024

2nd = 20.K0391.024

1 2

43

56


B Series-TP


B Series-TP

1 AFTP6926AFTP6926

1AFTP6939AFTP6939

12

C6901

SC

D1U

10V2K

X-4G

P

B Series-TPC6901

SC

D1U

10V2K

X-4G

P

B Series-TP

1 AFTP6924AFTP69241 AFTP6925AFTP6925

1 AFTP6906AFTP6906

1 AFTP6927AFTP6927

1 AFTP6904AFTP6904

1AFTP6929AFTP6929

1 AFTP6917AFTP6917

1

23456

7

8

TPAD1

ACES-CON6-13-GP20.K0320.006

TPAD1

ACES-CON6-13-GP20.K0320.006

12

R69010R2J-2-GPDY

R69010R2J-2-GPDY

1 AFTP6921AFTP6921

1AFTP6903AFTP6903

12

C6902

SC

D1U

10V2K

X-4G

P

V Series-TPC6902

SC

D1U

10V2K

X-4G

P

V Series-TP

1 AFTP6918AFTP6918

1AFTP6932AFTP6932

123

4RN6907


RN6907


1 AFTP6915AFTP6915


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


LA480 SD

Hall SensorA4


<Core Design>

Title


Date: Sheet of


LA480 SD

Hall SensorA4


<Core Design>

Title


Date: Sheet of


LA480 SD

Hall SensorA4


<Core Design>


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

3D3V_S0

PLT_RST#5,18,27,31,36,65,66,80,82,83,97

CLK_PCI_LPC18,65

LPC_FRAME#21,27,65

LPC_AD021,27,65LPC_AD121,27,65LPC_AD221,27,65LPC_AD321,27,65

Title


Date: Sheet of


LA480 SD

Dubug connectorA4


<Core Design>

Title


Date: Sheet of


LA480 SD

Dubug connectorA4


<Core Design>

Title


Date: Sheet of


LA480 SD

Dubug connectorA4


<Core Design>

20.D0183.110

123456789

101112

DB1

MLX-CON10-7-GP

DY

DB1

MLX-CON10-7-GP

DY


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


LA480 SD

ReservedA4


<Core Design>

Title


Date: Sheet of


LA480 SD

ReservedA4


<Core Design>

Title


Date: Sheet of


LA480 SD

ReservedA4


<Core Design>

BLANK


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


LA480 SD

CARD Reader CONNA2


<Core Design>

Title


Date: Sheet of


LA480 SD

CARD Reader CONNA2


<Core Design>

Title


Date: Sheet of


LA480 SD

CARD Reader CONNA2


<Core Design>


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


LA480 SD

New CardA4


<Core Design>

Title


Date: Sheet of


LA480 SD

New CardA4


<Core Design>

Title


Date: Sheet of


LA480 SD

New CardA4


<Core Design>

BLANK


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


LA480 SD

ReservedA4


<Core Design>

Title


Date: Sheet of


LA480 SD

ReservedA4


<Core Design>

Title


Date: Sheet of


LA480 SD

ReservedA4


<Core Design>

BLANK


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


LA480 SD

ReservedA4


<Core Design>

Title


Date: Sheet of


LA480 SD

ReservedA4


<Core Design>

Title


Date: Sheet of


LA480 SD

ReservedA4


<Core Design>


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


LA480 SD

ReservedA4


<Core Design>

Title


Date: Sheet of


LA480 SD

ReservedA4


<Core Design>

Title


Date: Sheet of


LA480 SD

ReservedA4


<Core Design>

BLANK


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

GSENSE_Y_R

VCC3M_Q34

GSENSE_Z

VCC3_ACC

GSENSE_TST

GSENSE_X_R

ANALOG_AGND

ANALOG_AGND

3D3V_S5

ANALOG_AGND

ANALOG_AGND

GSENSE_ON#27

GSENSE_Y 27

GSENSE_X 27

Title


Date: Sheet of


LA480 SD

G-SensorA4


<Core Design>

Title


Date: Sheet of


LA480 SD

G-SensorA4


<Core Design>

Title


Date: Sheet of


LA480 SD

G-SensorA4


<Core Design>

Layout Comment :

(1) Place C483, C484, Q46, R528, R530,C479, C476, R509, R508 close to U55.

(2) Avoid routing under DCDC switching area.

74.KXTC8.0BZROHM-KIONIX

KXTC8-2850-GP

G-SensorV Series Only

12

C7901

SC

10U6D

3V5K

X-1G

P

C7901

SC

10U6D

3V5K

X-1G

P

12



12



1 2R7907 56KR2J-L1-GPR7907 56KR2J-L1-GP

12

R7903100KR2J-1-GP

R7903100KR2J-1-GP

1TP7902TP7902

12



1 2R7901

10R2J-2-GPR7901

10R2J-2-GP

1 TP7901TP7901

ST2

GND3

GND5

GND6

GND7

NC#11

NC#44

NC#99 NC#16 16

NC#13 13

RE

S15

VD

D14

VOUTZ 8

VOUTY 10

VOUTX 12

NC#11 11

U7901

LIS34ALTR-GP2nd = 74.KXTC8.0BZ

U7901

LIS34ALTR-GP2nd = 74.KXTC8.0BZ

12

C7902

SC

D1U

10V2K

X-4G

P

C7902

SC

D1U

10V2K

X-4G

P

12



12

R7902100KR2J-1-GP

DY

R7902100KR2J-1-GP

DY

12

R79040R0402-PADR79040R0402-PAD

1 2R7906 56KR2J-L1-GPR7906 56KR2J-L1-GP

EB

C

R1

R2

Q7901PDTA114EE-3-GP-U

2nd = 84.09114.A113rd = 84.00014.01H

84.00114.H1KR1

R2

Q7901PDTA114EE-3-GP-U

2nd = 84.09114.A113rd = 84.00014.01H

84.00114.H1K


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PROT_EEPROM

3D3V_S5

3D3V_S5

3D3V_S0

PLT_RST# 5,18,27,31,36,65,66,71,82,83,97

SMB_CLK 20SMB_DATA 20

Title


Date: Sheet of


LA480 SD

RF IDA4


<Core Design>

Title


Date: Sheet of


LA480 SD

RF IDA4


<Core Design>

Title


Date: Sheet of


LA480 SD

RF IDA4


<Core Design>

RFID

LTC015TEB

N/A

N/A

72.BUL08.A0Q

72.24S08.A0Q

ROHM

NXP

SANYO


Table 80.1- Transistor multi-source

84.00115.E1KNXP

ROHM


N/A

84.09115.A11

PDTC115TE

DRC9115T0L

84.00015.B1H

Supplier

Panasonic

Table 80.2- EEPROM multi-source

N/A

N/A

N/A

PCA24S08ADP

BUL08-1FVJ-WGE2

LE26CAP08TT-TLM-H 72.26C08.00R

Supplier

12


EB

CR1

Q8001

PDTC115TE-GP

3rd = 84.00015.B1H2nd = 84.09115.A1184.00115.E1K

R1

Q8001

PDTC115TE-GP

3rd = 84.00015.B1H2nd = 84.09115.A1184.00115.E1K

NC#11

NC#22

PROT#3

GND4 SDA 5SCL 6WP 7

VCC 8

U8001

BUL08-1FVJ-WGE2-GP

3rd = 72.26C08.00R2nd = 72.24S08.A0Q72.BUL08.A0Q

U8001

BUL08-1FVJ-WGE2-GP

3rd = 72.26C08.00R2nd = 72.24S08.A0Q72.BUL08.A0Q

12

R80014K7R2J-2-GPR80014K7R2J-2-GP


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


LA480 SD

ReservedA4


<Core Design>

Title


Date: Sheet of


LA480 SD

ReservedA4


<Core Design>

Title


Date: Sheet of


LA480 SD

ReservedA4


<Core Design>

BLANK


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

5V_USB4_S3

USB_PWR_OC#

USB_PP5_RUSB_PN5_R

USB_PN9_RUSB_PP9_R

3D3V_AUX_S5

USB_PN2_RUSB_PP2_R

ADP_LED

AUD_HPOUT_RAUD_HPOUT_L

AUD_MIC1_COMBO_R

HPOUT_JD

AU_GND

USB_AO_SEL0

USB_PWR_OC#

USB_PP5_RUSB_PN5_RUSB_PP9_RUSB_PN9_RCLK_PCH_48MPLT_RST#3D3V_S0_CARD

USB_PWR_EN

USB_PWR_EN

USB_PWR_OC#USB_PWR_EN

USB_PWR_ENUSB_PWR_OC#

USB_PN2_RUSB_PP2_R

CLK_PCH_48M

USB_PN2_R

USB_PP2_R

USB_PP9_R

USB_PN9_R

USB_PN5_R

USB_PP5_R

5V_S5

GND

AU_GND

5V_S5

3D3V_S0_CARD

3D3V_S0_CARD3D3V_S0

5V_USB4_S3

3D3V_AUX_S5

CLK_PCH_48M 20

AUD_HPOUT_L 29AUD_HPOUT_R 29

PLT_RST# 5,18,27,31,36,65,66,71,80,83,97

AUD_MIC1_COMBO_R 29HPOUT_JD 29

USB_PWR_EN_R27,61,62

USB_CHG_EN27CHG_USB_OC#27

USB_PN918

USB_PP918

USB_OC#8_918

USB_AO_SEL0 27

USB_PN218

USB_PP218

ADP_LED27

USB_PN518

USB_PP518

Title


Date: Sheet of


LA480 SD

IO Board ConnectorA3


<Core Design>

Title


Date: Sheet of


LA480 SD



<Core Design>

Title


Date: Sheet of


LA480 SD



<Core Design>

Cardreader

USB Port3

R8201 and R8203 Dual layout with TR8201

1AFTP8224AFTP8224

12 3

4RN8202

SRN0J-6-GPB Series-USB PWR

RN8202

SRN0J-6-GPB Series-USB PWR

1AFTP8223AFTP8223

1 2 R82070R0402-PAD R82070R0402-PAD

1AFTP8209AFTP8209

1AFTP8208AFTP8208

1

34

2

TR8201FILTER-130-GP

1st = 68.11900.20A

TR8201FILTER-130-GP

1st = 68.11900.20A

31

32

1

23456789101112131415161718192021222324252627282930

CDRCN1

ACES-CON30-9-GP-U20.K0510.030

CDRCN1

ACES-CON30-9-GP-U20.K0510.030


1AFTP8222AFTP8222

1 2 R82060R0402-PAD R82060R0402-PAD

1

34

2

TR8202FILTER-130-GP

1st = 68.11900.20A

TR8202FILTER-130-GP

1st = 68.11900.20A

12

EC8202SCD1U16V2KX-3GPEC8202SCD1U16V2KX-3GP

1AFTP8225AFTP8225

12

EC8201S

CD

1U16

V2K

X-3

GP

EC8201S

CD

1U16

V2K

X-3

GP

1AFTP8219AFTP8219

1AFTP8221AFTP8221

1AFTP8217AFTP8217

1AFTP8207AFTP8207

1

23456789

10

11

12

USBCN1

ACES-CON10-19-GP20.K0420.010

USBCN1

ACES-CON10-19-GP20.K0420.010

1AFTP8203AFTP8203

1AFTP8205AFTP8205

1AFTP8215AFTP8215

1AFTP8211AFTP8211

1AFTP8214AFTP8214

1 2R82020R0805-PADR82020R0805-PAD

1AFTP8206AFTP8206

1AFTP8216AFTP8216

12


DY EC8203SC22P50V2JN-4GP

DY

12 3

4RN8201

SRN0J-6-GPV Series-USB PWR

RN8201

SRN0J-6-GPV Series-USB PWR 1AFTP8212AFTP8212

1AFTP8201AFTP8201

1AFTP8204AFTP8204

1AFTP8202AFTP8202

1AFTP8220AFTP8220

1AFTP8218AFTP8218


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

VGA_RST#

VGA_PEG_CLKREQ#

TESTMODE

PEX_TERMP

VCC1R05VIDEO_PEX_PLLVDD

VGA_RST#

PLT_RST#

PEG_RXN4

PEG_RXN5PEG_RXP5

PEG_RXN6

PEG_RXN7PEG_RXP7

PEG_RXP6

PEG_RXP4

PEG_C_RXP5PEG_C_RXN5




PEG_RXN12

PEG_RXN13PEG_RXP13

PEG_RXN14

PEG_RXN15PEG_RXP15

PEG_RXP14

PEG_RXP12

PEG_RXN8

PEG_RXN9PEG_RXP9

PEG_RXN10

PEG_RXN11PEG_RXP11

PEG_RXP10

PEG_RXP8

PEG_RXN2

PEG_RXP3

PEG_C_RXP13

PEG_C_RXN15

PEG_RXN1PEG_RXP1





PEG_RXN3

PEG_RXP2

PEG_C_RXN13

PEG_C_RXP15






PEG_TXP1PEG_TXN1

PEG_TXP13PEG_TXN13

PEG_TXP15PEG_TXN15

PEG_TXN14

PEG_TXP12PEG_TXN12

PEG_TXP14

PEG_TXN0

PEG_TXP11

PEG_TXN8

PEG_TXP0

PEG_TXP5PEG_TXN5

PEG_TXP7PEG_TXN7

PEG_TXP6PEG_TXN6

PEG_TXP4PEG_TXN4

PEG_TXP9PEG_TXN9

PEG_TXN11

PEG_TXP10PEG_TXN10

PEG_TXP8

PEG_TXP3PEG_TXN3

PEG_TXP2PEG_TXN2

PEG_RXN0PEG_RXP0 PEG_C_RXP0

PEG_C_RXN0

PEX_TSTCLK_OUTPEX_TSTCLK_OUT#

VGA_RST#

3D3V_VGA_S0

3D3V_VGA_S0

1D05V_VGA_S0

VGA_CORE

3D3V_VGA_S0

3D3V_S0

3D3V_VGA_S0

1D05V_VGA_S0

PEG_TXN[0..15]4

PEG_TXP[0..15]4

PEG_RXN[0..15] 4

PEG_RXP[0..15] 4

PEG_CLKREQ#20

NVGND_SENSE 92

NVVDD_SENSE 92

CLK_PCIE_VGA20CLK_PCIE_VGA#20

PLT_RST#5,18,27,31,36,65,66,71,80,82,97

DGPU_HOLD_RST#18

Title



N13P_GPU (1/5): PEG


A2


<Core Design>

Title



N13P_GPU (1/5): PEG


A2


<Core Design>

Title



N13P_GPU (1/5): PEG


A2


<Core Design>

dGPU reset

SPEC. (DG-05587-001_v03_p.70)For PCI ECPRESS connection, please use 0.22uF,20%,0402,X5R or better AC couplimg capacitors.

1.05V ±30mV 3300mA total

3.3V ±10% 210mA total


1.0uF4.7uF10uF22uF

X6S (+/-22% 、-55~105 )X5R (+/-15% 、-55~85 )

X6SX6SX5RX5R

0402060308050805

4244

Under GPUNear GPUMidway Between GPU and Power SupplyMidway Between GPU and Power Supply

Footprint PopulationCapacitor Type Location

PCI Express PEX_IOVVD/Q Combined (DG-05587-001_v03_ p.72_Table 10)

Under GPU

1uF(X5R)K0402 ×4

Midway Between GPU and Power Supply

0.1uF4.7uF

X5R (+/-15% 、-55~85 )

X5RX5R

04020603

12

Near GPUNear GPU


PCI Express PEX_SVDD/PLL_HVDD Connected to NV3V3 (D G-05587-001_v03_p.72_Table 12)

Near GPU

100nF1.0uF4.7uF

X6SX5RX5R

PopulationFootprint

Under GPUNear GPUNear GPU

111

040206030805

PCI Express PEX_PLLVDD (DG-05587-001_v03_p.72_Table 11)

LocationCapacitor Type

X6S (+/-22% 、-55~105 )X5R (+/-15% 、-55~85 )

Under GPU Near GPU

SPEC. (DG-05587-001_v03_p.214)By default, pull-down the TESTMODE pin to GND with a 10k Ω resistor.For XOR tree testing, TESTMODE should be pulled up to 3v3 with a 10 k Ω resistor.

4.7uF(X5R)K0603 ×2

10uF(X5R)M0805 ×4

22uF(X5R)M0805 ×4

4.7uF(X5R)K0603 ×2

0.1uF(X5R)K0402 ×1

0.22uF(X5R)K0402

SPEC. (DG-05587-001_v03_p.70)PEX_TSTCLK_OUT should be terminated with a 200 Ω resistor.

100nF(X7R)K0402 ×1

1.0nF(X5R)K0402 ×1

4.7nF(X5R)K0603 ×1

SPEC. (DG-05587-001_v03_p.70)PEX_CLK_REQ_N is an open-drain bi-directional signa l; by default it should have a 10 k Ω pull-up to 3.3V.This signal is an active low signal.

(DG-05587-001_v03_p.71_Table 9)

(DG-05587-001_v03_p.71_Table 9)

(DG-05587-001_v03_p.71_Table 9)

Near GPU

SPEC. (DG-05587-001_v03_p.70)PEX_TERMP is used for internal calibration; pull-down this signal with 2.49 k Ω,1% resistor.

Stuff 0 ohm(63.00000.00L) for N13P-GS/N13M-GS,Stuff bead(68.00082.001) for N13P-GL/N13M-GE

12

C8351

SC

1U6D

3V2K

X-G

P

OPSC8351

SC

1U6D

3V2K

X-G

P

OPS

1 2 C8304SCD22U10V2KX-1GP OPS C8304SCD22U10V2KX-1GP OPS


12R8306 200R2F-L-GPOPS

R8306 200R2F-L-GPOPS

12

C8343SC10U6D3V3MX-GP

OPSC8343SC10U6D3V3MX-GP

OPS



12

C8340

SC

1U6D

3V2K

X-G

P

OPS

C8340

SC

1U6D

3V2K

X-G

P

OPS


B1

A2

GND3Y 4

VCC 5

U8301

74LVC1G08GW-1-GP73.01G08.L04OPS

3rd = 73.01G08.FHG

1st = 73.01G08.DHG2nd = 73.7SZ08.DAH

U8301

74LVC1G08GW-1-GP73.01G08.L04OPS

3rd = 73.01G08.FHG

1st = 73.01G08.DHG2nd = 73.7SZ08.DAH

12

C8342

SC

4D7U

6D3V

3KX

-GP

OPS

C8342

SC

4D7U

6D3V

3KX

-GP

OPS


12

R831910KR2J-3-GPOPSR831910KR2J-3-GPOPS

G

S

D

Q8301

2N7002K-2-GP

84.2N702.J312ND = 84.2N702.031

OPSQ8301

2N7002K-2-GP

84.2N702.J312ND = 84.2N702.031

OPS

1 2R8309 2K49R2F-GP

OPS

R8309 2K49R2F-GP

OPS




12

C8350

SC

D1U

10V2K

X-5G

P

OPSC8350

SC

D1U

10V2K

X-5G

P

OPS




12

C8349

SC

4D7U

6D3V

3KX

-GP

OPS

C8349

SC

4D7U

6D3V

3KX

-GP

OPS


12

C8347

SC

D1U

10V

2KX

-4G

P

OPS

C8347

SC

D1U

10V

2KX

-4G

P

OPS


1 2R8310 0R2J-2-GP

DYR8310 0R2J-2-GP

DY





12

C8346

SC

22U

6D3V

5MX

-2G

P

OPS

C8346

SC

22U

6D3V

5MX

-2G

P

OPS

1 2R8304 0R2J-2-GP

DYR8304 0R2J-2-GP

DY

12

R83050R2J-2-GP

DY

R83050R2J-2-GP

DY

12

C8352

SC

4D7U

6D3V

3KX

-GP

OPSC8352

SC

4D7U

6D3V

3KX

-GP

OPS

12

C8341

SC

1U6D

3V2K

X-G

P

OPS

C8341

SC

1U6D

3V2K

X-G

P

OPS



12

C8334

SC

1U6D

3V2K

X-G

P

OPS

C8334

SC

1U6D

3V2K

X-G

P

OPS


PEX_RX15#AM27 PEX_RX15AN27

PEX_TX15#AK25 PEX_TX15AL25

PEX_RX14#AP27PEX_RX14AP26

PEX_TX14#AJ24PEX_TX14AK24


PEX_TX13#AG23 PEX_TX13AH23



PEX_RX11#AP24PEX_RX11AP23



PEX_TX10#AJ21 PEX_TX10AK21

PEX_RX9#AM21PEX_RX9AN21

PEX_TX9#AG20PEX_TX9AH20

PEX_RX8#AP21 PEX_RX8AP20



PEX_TX7#AK19PEX_TX7AL19















PEX_REFCLK#AK13PEX_REFCLKAL13

PEX_CLKREQ#AK12

PEX_RST#AJ12

PEX_WAKE#AJ11

PEX_TERMP AP29

TESTMODE AK11

PEX_PLLVDD AG26

PEX_TSTCLK_OUT# AK26PEX_TSTCLK_OUT AJ26

NC_3V3AUX P8

GND_SENSE L5

VDD_SENSE L4

PEX_SVDD_3V3 AG12

PEX_PLL_HVDD AH12

PEX_IOVDDQ_14 AN28PEX_IOVDDQ_13 AM28PEX_IOVDDQ_12 AL27PEX_IOVDDQ_11 AK27PEX_IOVDDQ_10 AJ27PEX_IOVDDQ_9 AH27PEX_IOVDDQ_8 AH26PEX_IOVDDQ_7 AH18PEX_IOVDDQ_6 AH15PEX_IOVDDQ_5 AG25PEX_IOVDDQ_4 AG18PEX_IOVDDQ_3 AG16PEX_IOVDDQ_2 AG15PEX_IOVDDQ_1 AG13

PEX_IOVDD_6 AH25PEX_IOVDD_5 AH21PEX_IOVDD_4 AG24PEX_IOVDD_3 AG22PEX_IOVDD_2 AG21PEX_IOVDD_1 AG19

1/17 PCI_EXPRESS

1 OF 17VGA1A

N13P-GS-A1-GPOPS-BOM CTRL

1/17 PCI_EXPRESS

1 OF 17VGA1A




12

R8303

10K

R2J

-3-G

P

DYR8303

10K

R2J

-3-G

P

DY

12

C8348

SC

4D7U

6D3V

3KX

-GP

OPS

C8348

SC

4D7U

6D3V

3KX

-GP

OPS

12

R8302

10K

R2J

-3-G

P OPS

R8302

10K

R2J

-3-G

P OPS




12

C8339

SC

22U

6D3V

5MX

-2G

P

OPS

C8339

SC

22U

6D3V

5MX

-2G

P

OPS

1 2R8307 10KR2J-3-GP

OPS

R8307 10KR2J-3-GP

OPS



12

C8345

SC

22U

6D3V

5MX

-2G

P

OPS

C8345

SC

22U

6D3V

5MX

-2G

P

OPS

12


OPSC8336SC10U6D3V3MX-GP

OPS12

C8335

SC

4D7U

6D3V

3KX

-GP

OPS

C8335

SC

4D7U

6D3V

3KX

-GP

OPS12

C8333

SC

1U6D

3V2K

X-G

P

OPS

C8333

SC

1U6D

3V2K

X-G

P

OPS

12

R8311

0R3J-0-U-GP

OPS-BOM CTRLR8311

0R3J-0-U-GP

OPS-BOM CTRL

1 2R8308 10KR2J-3-GP

DYR8308 10KR2J-3-GP

DY






A

A

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1

IFPAB_RSET

IFPAB_PLLVDD

IFPAB_IOVDD

IFPC_IOVDD

IFPC_PLLVDD

IFPC_RSET

IFPD_IOVDD

IFPD_RSET

IFPD_PLLVDD

IFPEF_IOVDD

IFPF_REST

IFPEF_PLLVDD

Title


Date: Sheet of


LA48 SD

N13P_GPU (2/5): DIGITALOUT

A2


<Core Design>

Title


Date: Sheet of


LA48 SD


A2


<Core Design>

Title


Date: Sheet of


LA48 SD


A2


<Core Design>

LVDS Interface

HDMI Interface

SPEC. (DG-05587-001_v03_p.160)Pull down IFPxy IOVDD with 10k Ω resistor.Pull down IFPxy PLLVDD with 10k Ω resistor.The other IO pins can be NC, this includes unused d ata lines.

1TP8404TP8404

12

R840210KR2J-3-GPOPS

R840210KR2J-3-GPOPS

1TP8401TP8401

IFPF_IOVDDAC8

IFPE_IOVDDAC7

IFPEF_RSETAD6

IFPEF_PLLVDDAB8

GPIO19 P3

IFPF_L0 AE3IFPF_L0# AE4

IFPF_L1 AF4IFPF_L1# AF5

IFPF_L2 AD4IFPF_L2# AD5

IFPF_L3 AG1IFPF_L3# AF1

IFPF_AUX_I2CZ_SCL AF3IFPF_AUX_I2CZ_SDA# AF2

GPIO18 R1

IFPE_L0 AD2IFPE_L0# AD3

IFPE_L1 AD1IFPE_L1# AC1

IFPE_L2 AC2IFPE_L2# AC3

IFPE_L3 AC4IFPE_L3# AC5

IFPE_AUX_I2CY_SCL AB3IFPE_AUX_I2CY_SDA# AB4

ALL PINS NC FOR GF117

IFPF

IFPE

TXD5TXD5

TXD4TXD4

TXD3TXD3

HPD_E

TXD1TXD1

TXCTXC

TXD0TXD0

TXD2TXD2

I2CY_SDAI2CY_SCL I2CY_SCL

I2CY_SDA

TXD2

TXD1TXD1

TXD0TXD0

TXCTXC

HPD_E

HPD_F

TXCTXC

I2CZ_SDAI2CZ_SCL

TXD1

TXD0TXD0

TXD1

TXD2TXD2

TXD2

DVI-DL DVI-SL/HDMI DP

8/17 IFPEF

13 OF 17VGA1M



IFPF

IFPE

TXD5TXD5

TXD4TXD4

TXD3TXD3

HPD_E

TXD1TXD1

TXCTXC

TXD0TXD0

TXD2TXD2

I2CY_SDAI2CY_SCL I2CY_SCL

I2CY_SDA

TXD2

TXD1TXD1

TXD0TXD0

TXCTXC

HPD_E

HPD_F

TXCTXC

I2CZ_SDAI2CZ_SCL

TXD1

TXD0TXD0

TXD1

TXD2TXD2

TXD2

DVI-DL DVI-SL/HDMI DP

8/17 IFPEF

13 OF 17VGA1M


12

R840510KR2J-3-GPOPS

R840510KR2J-3-GPOPS

1TP8403TP8403

12

R840810KR2J-3-GP

OPS

R840810KR2J-3-GP

OPS

IFPB_IOVDDAG9

IFPA_IOVDDAG8

IFPAB_PLLVDDAH8

IFPAB_RSETAJ8

GPIO14 N4

IFPB_TXD7 AK8IFPB_TXD7# AL8

IFPB_TXD6 AN8IFPB_TXD6# AM8

IFPB_TXD5 AM7IFPB_TXD5# AL7

IFPB_TXD4 AP6IFPB_TXD4# AP5

IFPB_TXC AJ9IFPB_TXC# AH9

IFPA_TXD3 AJ6IFPA_TXD3# AH6

IFPA_TXD2 AL6IFPA_TXD2# AK6

IFPA_TXD1 AN5IFPA_TXD1# AM5

IFPA_TXD0 AP3IFPA_TXD0# AN3

IFPA_TXC AM6IFPA_TXC# AN6

IFPAB


5/17 IFPAB

10 OF 17VGA1J


IFPAB


5/17 IFPAB

10 OF 17VGA1J


12

R840110KR2J-3-GPOPS

R840110KR2J-3-GPOPS

IFPC_IOVDDAF6

IFPC_PLLVDDAF7

IFPC_RSETAF8

GPIO15 P2

IFPC_L0 AK1IFPC_L0# AJ1

IFPC_L1 AJ3IFPC_L1# AJ2

IFPC_L2 AH3IFPC_L2# AH4

IFPC_L3 AG5IFPC_L3# AG4

IFPC_AUX_I2CW_SCL AG3IFPC_AUX_I2CW_SDA# AG2


IFPC

TXD2TXD2

TXD1TXD1

TXD0TXD0

TXCTXC

I2CW_SDAI2CW_SCL

DVI/HDMI DP

6/17 IFPC

11 OF 17VGA1K



IFPC

TXD2TXD2

TXD1TXD1

TXD0TXD0

TXCTXC

I2CW_SDAI2CW_SCL

DVI/HDMI DP

6/17 IFPC

11 OF 17VGA1K


IFPD_IOVDDAG6

IFPD_PLLVDDAG7

IFPD_RSETAN2

GPIO17 M6

IFPD_L0 AM1IFPD_L0# AM2

IFPD_L1 AM3IFPD_L1# AM4

IFPD_L2 AL3IFPD_L2# AL4

IFPD_L3 AK4IFPD_L3# AK5

IFPD_AUX_I2CX_SCL AK3IFPD_AUX_I2CX_SDA# AK2


IFPD

DP

TXD0TXD0

TXD1TXD1

TXD2TXD2

DVI/HDMI

TXCTXC

I2CX_SDAI2CX_SCL

7/17 IFPD

12 OF 17VGA1L



IFPD

DP

TXD0TXD0

TXD1TXD1

TXD2TXD2

DVI/HDMI

TXCTXC

I2CX_SDAI2CX_SCL

7/17 IFPD

12 OF 17VGA1L


12

R840610KR2J-3-GPOPS

R840610KR2J-3-GPOPS

1TP8402TP8402

12

R840310KR2J-3-GP

OPS

R840310KR2J-3-GP

OPS

12

R840710KR2J-3-GP

OPS

R840710KR2J-3-GP

OPS

12

R840410KR2J-3-GP

OPS

R840410KR2J-3-GP

OPS


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

FBA_D35

FBA_D38FBA_D37FBA_D36

FBA_D39

FBA_D0

FBA_D40

FBA_D42FBA_D41

FBA_D44FBA_D43



FBA_D51


FBA_D1

FBA_D56FBA_D55

FBA_D58FBA_D57

FBA_D59

FBA_D3FBA_D2

FBA_D5

FBA_D60

FBA_D4

FBA_D6

FBA_D61

FBA_D8FBA_D7

FBA_D62

FBA_D9

FBA_D63



FBA_D17FBA_D16



FBA_D25FBA_D24



FBA_D33FBA_D32

FBA_D34

FBB_D17

FBB_D23FBB_D22

FBB_D20FBB_D21

FBB_D16

FBB_D18

FBB_D29

FBB_D25

FBB_D27FBB_D26

FBB_D24

FBB_D31FBB_D30

FBB_D28

FBB_D19

FBB_D1

FBB_D5FBB_D4

FBB_D6FBB_D7

FBB_D0

FBB_D33

FBB_D39FBB_D38

FBB_D36FBB_D37

FBB_D32

FBB_D34

FBB_D45

FBB_D41

FBB_D43FBB_D42

FBB_D40

FBB_D47FBB_D46

FBB_D44

FBB_D35

FBB_D2

FBB_D9

FBB_D13FBB_D12

FBB_D14FBB_D15

FBB_D8

FBB_D10FBB_D11

FBB_D49

FBB_D55FBB_D54

FBB_D52FBB_D53

FBB_D48

FBB_D50

FBB_D61

FBB_D57

FBB_D59FBB_D58

FBB_D56

FBB_D63FBB_D62

FBB_D60

FBB_D51

FBB_D3

FBA_CLK0

FBA_CLK0#

FBA_CLK1

FBA_CLK1#

FBB_CLK0

FBB_CLK0#FBB_CLK1#

FBB_CLK1

FBB_ODT0FBA_ODT0FBB_RST

FBA_ODT1

FBA_CKE0FBB_CKE1FBA_CKE1FBB_CKE0

FBB_ODT1

FBA_RST

FB_CAL_PD_VDDQ

FB_CAL_PU_GND

FB_CAL_TERM_GND

FB_VREF FB_PLLVDD

FB_PLLVDD

FB_PLLVDD

PS_FB_CLAMP

1D5V_VGA_S01D5V_VGA_S0

1D5V_VGA_S0

1D5V_VGA_S0

1D05V_VGA_S0

FBA_CS0# 88

FBA_CLK1 89FBA_CLK1# 89

FBA_CLK0 88FBA_CLK0# 88

FBA_DQM088FBA_DQM188FBA_DQM288FBA_DQM388FBA_DQM489FBA_DQM589FBA_DQM689FBA_DQM789

FBB_CLK0# 90FBB_CLK0 90

FBB_CLK1 91FBB_CLK1# 91

FBB_DQM090FBB_DQM190FBB_DQM290FBB_DQM390FBB_DQM491FBB_DQM591FBB_DQM691FBB_DQM791

FBA_D[63..0]88,89

FBB_D[63..0]90,91

FBA_DQS_WP088FBA_DQS_WP188FBA_DQS_WP288FBA_DQS_WP388FBA_DQS_WP489FBA_DQS_WP589FBA_DQS_WP689FBA_DQS_WP789

FBA_DQS_RN388FBA_DQS_RN489FBA_DQS_RN589FBA_DQS_RN689

FBA_DQS_RN088

FBA_DQS_RN789

FBA_DQS_RN188FBA_DQS_RN288

FBB_DQS_WP390FBB_DQS_WP491

FBB_DQS_RN390FBB_DQS_RN491FBB_DQS_RN591FBB_DQS_RN691

FBB_DQS_RN090

FBB_DQS_RN791

FBB_DQS_RN190FBB_DQS_RN290


FBB_DQS_WP090

FBB_DQS_WP791


FBA_ODT0 88FBA_CKE0 88

FBA_A7 88,89FBA_A2 88,89FBA_A0 88,89

FBA_A9 88,89FBA_RST 88,89

FBA_BA0 88,89FBA_WE# 88,89FBA_A15 88,89

FBA_A1 88,89FBA_A4 88,89

FBA_A6 88,89FBA_A11 88,89FBA_A5 88,89

FBA_A8 88,89FBA_A13 88,89

FBA_BA1 88,89FBA_A12 88,89FBA_A10 88,89

FBA_BA2 88,89FBA_A3 88,89

FBA_CAS# 88,89

FBA_RAS# 88,89

FBB_A7 90,91FBB_A2 90,91FBB_A0 90,91

FBB_A9 90,91FBB_RST 90,91

FBB_RAS# 90,91

FBB_ODT0 90

FBB_BA0 90,91FBB_WE# 90,91FBB_A15 90,91

FBB_A1 90,91FBB_A4 90,91

FBB_CKE0 90

FBB_A6 90,91FBB_A11 90,91FBB_A5 90,91

FBB_A8 90,91FBB_A13 90,91

FBB_BA1 90,91FBB_A12 90,91FBB_A10 90,91

FBB_BA2 90,91FBB_A3 90,91

FBB_CAS# 90,91

FBB_CS0# 90

FBA_CS1# 89

FBA_ODT1 89FBA_CKE1 89

FBB_CS1# 91

FBB_ODT1 91FBB_CKE1 91

Title



N13P_GPU (3/5): VRAM I/F


A2


<Core Design>

Title





A2


<Core Design>

Title





A2


<Core Design>

FBCLK Termination placed at each VRAM

N13x DDR3 mode D

Data Bits [31:0]

Data Bits [63:32]

FBx_CMD0FBx_CMD1FBx_CMD2FBx_CMD3FBx_CMD4FBx_CMD5FBx_CMD6FBx_CMD7FBx_CMD8FBx_CMD9FBx_CMD10FBx_CMD11FBx_CMD12FBx_CMD13FBx_CMD14FBx_CMD15FBx_CMD16FBx_CMD17FBx_CMD18FBx_CMD19FBx_CMD20FBx_CMD21FBx_CMD22FBx_CMD23FBx_CMD24FBx_CMD25FBx_CMD26FBx_CMD27FBx_CMD28FBx_CMD29FBx_CMD30FBx_CMD31

CS0# ODTCKEA14RSTA9A7A2A0A4A1BA0WE#A15CAS# A13A8A6A11A5A3BA2BA1A12A10RAS#

A14RSTA9A7A2A0A4A1BA0WE#A15CAS#CS0# ODTCKEA13A8A6A11A5A3BA2BA1A12A10RAS#

0.1uF1uF4.7uF10uF

X7RX7RX6SX5R

0402060306030805

8224

Under GPUUnder GPUUnder GPUNear GPU

Capacitor Type Footprint Population Location

8224

Under GPU

Near GPU

GPU FBVDDQ Decoupling (DG-05587-001_v03_p.86_Table 22)

X7R (+/-15% 、-55~125 )X6S (+/-22% 、-55~105 )X5R (+/-15% 、-55~85 )

X7R (+/-15% 、-55~125 )X5R (+/-15% 、-55~85 )

X7RX5R

04020805

Under GPUNear GPU


FBx_PLL_AVDD, FB_DLL_AVDD and PLLVDD combined(DG-05587-001_v03_p.88_Table 26)

100nF22uF

Bead Type

1 per pin1

30Ω @100MHz(ESR=0.01 Ω) 0603 1 Near GPU

Under GPU

66mA

Mode D Command Mapping (DG-05587-001_v03_p.78_Table 16)

FB CMD mappingMode D-N13x


Memory/PKG FBVDDQ FBCAL_PU_GND FBCAL_PU_VDDQ

Default GPU Drive Calibration for DDR3 (DG-05587-00 1_v03_p.82_Table 17)

FBCAL_TERM_GND

DDR3 42.2 Ω 40.2 Ω 51.1 Ω1.5V

*Use only 1% resistors for driver calibration.

0.1uF(X7R)K0402 ×8

1uF(X7R)K0603 ×4

4.7uF(X5R)K0603 ×2

10uF(X5R)M0805 ×2


35mA(DG-05587-001_v03_p.88_Table 25)

(DG-05587-001_v03_p.88_Table 25)

(DG-05587-001_v03_p.88_Table 25)

100nF(X7R)K0402 ×3

66mA

(DG-05587-001_v03_p.83_Table 19)

(DG-05587-001_v03_p.84_Table 20)Memory ODTx, CKEx and RST Termination

E1 (DA-05691-001_v03_p.4_Table 2)N13P-GL NCN13M_GE1 NCN13M-GS Pull down FB_CLAMP with a 10k Ω

N13P-GS Pull down FB_CLAMP with a 10k Ω

Stuff 0 ohm(63.00000.00L) for N13P-GS/N13M-GS,Stuff bead(68.00084.H41) for N13P-GL/N13M-GE

12

R8512

10K

R2J

-3-G

P OPS

R8512

10K

R2J

-3-G

P OPS

12

R8509

10K

R2J

-3-G

P OPS

R8509

10K

R2J

-3-G

P OPS

1 2

R85230R3J-0-U-GP

OPS-BOM CTRLR85230R3J-0-U-GP

OPS-BOM CTRL

FBVDDQ_44Y27FBVDDQ_43W33 FBVDDQ_42W30 FBVDDQ_41W27FBVDDQ_40V27 FBVDDQ_39T33FBVDDQ_38T30 FBVDDQ_37T27 FBVDDQ_36R27FBVDDQ_35P27 FBVDDQ_34N27FBVDDQ_33M27 FBVDDQ_32L27 FBVDDQ_31H9FBVDDQ_30H8 FBVDDQ_29H24FBVDDQ_28H23 FBVDDQ_27H22 FBVDDQ_26H21FBVDDQ_25H20 FBVDDQ_24H19FBVDDQ_23H18 FBVDDQ_22H16 FBVDDQ_21H15FBVDDQ_20H14 FBVDDQ_19H13FBVDDQ_18H12 FBVDDQ_17H11 FBVDDQ_16H10FBVDDQ_15E19 FBVDDQ_14E16FBVDDQ_13E13 FBVDDQ_12B19 FBVDDQ_11B16FBVDDQ_10B13 FBVDDQ_9AG27FBVDDQ_8AF27 FBVDDQ_7AE27 FBVDDQ_6AD27FBVDDQ_5AC27 FBVDDQ_4AB33FBVDDQ_3AB27 FBVDDQ_2AA30 FBVDDQ_1AA27

FB_CAL_TERM_GND H25

FB_CAL_PU_GND H27

FB_CAL_PD_VDDQ J27

FB_GND_SENSE F2

FB_VDDQ_SENSE F1

14/17 FBVDDQ

4 OF 17VGA1D


14/17 FBVDDQ

4 OF 17VGA1D


12

C8518

SC

D1U

10V

2KX

-5G

P

OPS

C8518

SC

D1U

10V

2KX

-5G

P

OPS

12

C8511

SC

4D7U

6D3V

3KX

-GP

OPS

C8511

SC

4D7U

6D3V

3KX

-GP

OPS

FB_VREFH26

FBA_DQS_RN7AF32 FBA_DQS_RN6AM34FBA_DQS_RN5AK31 FBA_DQS_RN4AF30 FBA_DQS_RN3M34FBA_DQS_RN2E34 FBA_DQS_RN1H30FBA_DQS_RN0M30

FBA_DQS_WP7AF33 FBA_DQS_WP6AN33FBA_DQS_WP5AK30 FBA_DQS_WP4AE31 FBA_DQS_WP3M33FBA_DQS_WP2E33 FBA_DQS_WP1G31FBA_DQS_WP0M31

FBA_DQM7AF34 FBA_DQM6AM32FBA_DQM5AL29 FBA_DQM4AD31 FBA_DQM3M32FBA_DQM2F34 FBA_DQM1F31FBA_DQM0P30

FBA_D63AG33 FBA_D62AG32FBA_D61AG34 FBA_D60AF31 FBA_D59AD33FBA_D58AC30 FBA_D57AD32FBA_D56AD34 FBA_D55AK32 FBA_D54AK33FBA_D53AL31 FBA_D52AM33FBA_D51AP32 FBA_D50AP30 FBA_D49AN32FBA_D48AN31 FBA_D47AM30FBA_D46AN29 FBA_D45AM31 FBA_D44AM29FBA_D43AK28 FBA_D42AJ30FBA_D41AK29 FBA_D40AJ29 FBA_D39AD28FBA_D38AC29 FBA_D37AD29FBA_D36AD30 FBA_D35AF28 FBA_D34AG29FBA_D33AF29 FBA_D32AG28FBA_D31L33 FBA_D30L32 FBA_D29L34FBA_D28L31 FBA_D27P33FBA_D26P31 FBA_D25P32 FBA_D24P34FBA_D23H32 FBA_D22H33FBA_D21F32 FBA_D20F33 FBA_D19C33FBA_D18B33 FBA_D17D32FBA_D16C34 FBA_D15F30 FBA_D14E32FBA_D13E31 FBA_D12G29FBA_D11H28 FBA_D10J29 FBA_D9H29FBA_D8J28 FBA_D7P28FBA_D6R29 FBA_D5P29 FBA_D4N31FBA_D3M28 FBA_D2L29FBA_D1M29 FBA_D0L28

FBA_PLL_AVDD U27

FBA_WCKB67# AJ33FBA_WCKB67 AJ32FBA_WCKB45# AJ31FBA_WCKB45 AH31

FBA_WCKB23# J33FBA_WCKB23 J32FBA_WCKB1# J31FBA_WCKB1 J30

FBA_WCK67# AK34FBA_WCK67 AJ34FBA_WCK45# AG31FBA_WCK45 AG30FBA_WCK23# J34FBA_WCK23 H34FBA_WCK1# L30FBA_WCK1 K31

FBA_CLK1# AC31FBA_CLK1 AB31FBA_CLK0# R31FBA_CLK0 R30

FBA_DEBUG1 AC28FBA_DEBUG0 R28

FBA_CMD_RFU1 AC32FBA_CMD_RFU0 R32

FBA_CMD31 V31FBA_CMD30 Y33FBA_CMD29 Y34FBA_CMD28 Y31FBA_CMD27 AA34FBA_CMD26 Y30FBA_CMD25 W31FBA_CMD24 Y29FBA_CMD23 Y28FBA_CMD22 AA33FBA_CMD21 AA32FBA_CMD20 AC33FBA_CMD19 AC34FBA_CMD18 AA28FBA_CMD17 AA29FBA_CMD16 AA31FBA_CMD15 Y32FBA_CMD14 V33FBA_CMD13 V34FBA_CMD12 U31FBA_CMD11 U34FBA_CMD10 V30FBA_CMD9 V29FBA_CMD8 V28FBA_CMD7 U28FBA_CMD6 U33FBA_CMD5 U32FBA_CMD4 R33FBA_CMD3 R34FBA_CMD2 U29FBA_CMD1 T31FBA_CMD0 U30

FB_DLL_AVDD K27

FB_CLAMP E1

AND FOR GF117

ONLY ON GK107PINS ARE USEDTHE FBA_WCKBxx

FOR GF108THEY ARE NC

2/17 FBA

2 OF 17VGA1B


AND FOR GF117

ONLY ON GK107PINS ARE USEDTHE FBA_WCKBxx


2/17 FBA

2 OF 17VGA1B


12

C8508

SC

D1U

10V

2KX

-5G

P

OPS

C8508

SC

D1U

10V

2KX

-5G

P

OPS

12

C8514

SC

4D7U

6D3V

3KX

-GP

OPS

C8514

SC

4D7U

6D3V

3KX

-GP

OPS

FBB_DQS_RN7B23 FBB_DQS_RN6A30FBB_DQS_RN5D28 FBB_DQS_RN4D22 FBB_DQS_RN3A9FBB_DQS_RN2B2 FBB_DQS_RN1E4FBB_DQS_RN0D9

FBB_DQS_WP7A23 FBB_DQS_WP6B30FBB_DQS_WP5E28 FBB_DQS_WP4E23 FBB_DQS_WP3B9FBB_DQS_WP2C3 FBB_DQS_WP1D5FBB_DQS_WP0D10

FBB_DQM7A24 FBB_DQM6C30FBB_DQM5F27 FBB_DQM4F23 FBB_DQM3C9FBB_DQM2A3 FBB_DQM1E3FBB_DQM0E11

FBB_D63C26 FBB_D62B26FBB_D61C24 FBB_D60B24 FBB_D59C21FBB_D58A21 FBB_D57C23FBB_D56B21 FBB_D55B29 FBB_D54C29FBB_D53A29 FBB_D52D29FBB_D51B32 FBB_D50C32 FBB_D49C31FBB_D48A32 FBB_D47D30FBB_D46E30 FBB_D45F29 FBB_D44E29FBB_D43E27 FBB_D42G26FBB_D41D27 FBB_D40G27 FBB_D39F21FBB_D38G21 FBB_D37E21FBB_D36D21 FBB_D35G24 FBB_D34E24FBB_D33G23 FBB_D32F24FBB_D31B8 FBB_D30C8 FBB_D29A8FBB_D28D8 FBB_D27B11FBB_D26D11 FBB_D25C11 FBB_D24A11FBB_D23C5 FBB_D22B5FBB_D21C4 FBB_D20B3 FBB_D19C1FBB_D18D3 FBB_D17D4FBB_D16C2 FBB_D15F3 FBB_D14E2FBB_D13G4 FBB_D12F4FBB_D11F6 FBB_D10E6 FBB_D9F5FBB_D8G6 FBB_D7G12FBB_D6F12 FBB_D5G11 FBB_D4F11FBB_D3F9 FBB_D2G8FBB_D1E9 FBB_D0G9

FBB_PLL_AVDD H17

FBB_WCKB67# A27FBB_WCKB67 A26FBB_WCKB45# E26FBB_WCKB45 F26

FBB_WCKB23# B6FBB_WCKB23 C6FBB_WCKB1# D7FBB_WCKB1 D6

FBB_WCK67# C27FBB_WCK67 B27FBB_WCK45# D25FBB_WCK45 D24FBB_WCK23# A6FBB_WCK23 A5FBB_WCK1# E8FBB_WCK1 F8

FBB_CLK1# F20FBB_CLK1 E20FBB_CLK0# E12FBB_CLK0 D12

FBB_DEBUG1 G20FBB_DEBUG0 G14

FBB_CMD_RFU1 C20FBB_CMD_RFU0 C12

FBB_CMD31 E17FBB_CMD30 B17FBB_CMD29 A17FBB_CMD28 D17FBB_CMD27 A18FBB_CMD26 D16FBB_CMD25 F17FBB_CMD24 G17FBB_CMD23 G18FBB_CMD22 B18FBB_CMD21 C18FBB_CMD20 B20FBB_CMD19 A20FBB_CMD18 F18FBB_CMD17 E18FBB_CMD16 D18FBB_CMD15 C17FBB_CMD14 B15FBB_CMD13 A15FBB_CMD12 D14FBB_CMD11 A14FBB_CMD10 D15FBB_CMD9 E15FBB_CMD8 F15FBB_CMD7 G15FBB_CMD6 B14FBB_CMD5 C14FBB_CMD4 B12FBB_CMD3 A12FBB_CMD2 F14FBB_CMD1 E14FBB_CMD0 D13

THE FBB_WCKBxx

AND FOR GF117

ONLY ON GK107PINS ARE USED


3/17 FBB

3 OF 17VGA1C


THE FBB_WCKBxx

AND FOR GF117

ONLY ON GK107PINS ARE USED


3/17 FBB

3 OF 17VGA1C


12

C8515

SC

10U6D

3V3M

X-G

P

OPSC8515

SC

10U6D

3V3M

X-G

P

OPS

12

R8507160R2F-GPOPS

R8507160R2F-GPOPS

12

R8515

10K

R2J

-3-G

P OPS

R8515

10K

R2J

-3-G

P OPS

12

C8502

SC

D1U

10V

2KX

-5G

P

OPS

C8502

SC

D1U

10V

2KX

-5G

P

OPS

12

R8502

51D

1R2F

-GP

OPS

R8502

51D

1R2F

-GP

OPS

12

R8508

10K

R2J

-3-G

P OPS

R8508

10K

R2J

-3-G

P OPS

12

C8516

SC

10U6D

3V3M

X-G

P

OPSC8516

SC

10U6D

3V3M

X-G

P

OPS12

C8513

SC

4D7U

6D3V

3KX

-GP

OPS

C8513

SC

4D7U

6D3V

3KX

-GP

OPS

12

R8517

10K

R2J

-3-G

P OPS

R8517

10K

R2J

-3-G

P OPS

12

R8516

10K

R2J

-3-G

P OPS

R8516

10K

R2J

-3-G

P OPS

1 2R8522 10KR2F-2-GPDYR8522 10KR2F-2-GPDY

12

R8503

42D

2R2F

-GP

OPS

R8503

42D

2R2F

-GP

OPS

12

R8504160R2F-GPOPS

R8504160R2F-GPOPS

12

R8513

10K

R2J

-3-G

P OPS

R8513

10K

R2J

-3-G

P OPS

12

R8511

10K

R2J

-3-G

P OPS

R8511

10K

R2J

-3-G

P OPS

12

C8501

SC

D1U

10V

2KX

-5G

P

OPS

C8501

SC

D1U

10V

2KX

-5G

P

OPS

12

R8506160R2F-GPOPS

R8506160R2F-GPOPS

12

R8510

10K

R2J

-3-G

P OPS

R8510

10K

R2J

-3-G

P OPS

12

C8503

SC

D1U

10V

2KX

-5G

P

OPS

C8503

SC

D1U

10V

2KX

-5G

P

OPS

1 2R8520 60D4R2F-GPDYR8520 60D4R2F-GPDY

12

C8509

SC

1U6D

3V3K

X-2

GP

OPS

C8509

SC

1U6D

3V3K

X-2

GP

OPS

12

C8504

SC

D1U

10V

2KX

-5G

P

OPS

C8504

SC

D1U

10V

2KX

-5G

P

OPS

1 2R8521 10KR2J-3-GP

DYR8521 10KR2J-3-GP

DY

12

R8514

10K

R2J

-3-G

P OPS

R8514

10K

R2J

-3-G

P OPS

1 2R8518 60D4R2F-GPDYR8518 60D4R2F-GPDY

12

C8505

SC

D1U

10V

2KX

-5G

P

OPS

C8505

SC

D1U

10V

2KX

-5G

P

OPS

12

C8512

SC

4D7U

6D3V

3KX

-GP

OPS

C8512

SC

4D7U

6D3V

3KX

-GP

OPS

12

R8505160R2F-GPOPS

R8505160R2F-GPOPS

12

C8519

SC

D1U

10V

2KX

-5G

P

OPS

C8519

SC

D1U

10V

2KX

-5G

P

OPS

12

C8510

SC

1U6D

3V3K

X-2

GP

OPS

C8510

SC

1U6D

3V3K

X-2

GP

OPS

12

C8506

SC

D1U

10V

2KX

-5G

P

OPS

C8506

SC

D1U

10V

2KX

-5G

P

OPS

1 2R8501 40D2R2F-GP

OPS

R8501 40D2R2F-GP

OPS

1TP8507TP8507

12

C8507

SC

D1U

10V

2KX

-5G

P

OPS

C8507

SC

D1U

10V

2KX

-5G

P

OPS

1 2R8519 10KR2J-3-GP

DYR8519 10KR2J-3-GP

DY

12

C8517

SC

D1U

10V

2KX

-5G

P

OPS

C8517

SC

D1U

10V

2KX

-5G

P

OPS


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

STRAP3STRAP4

MULTI_STRAP_REF2_GND

SMBD_Therm_NVSMBC_Therm_NV

STRAP3STRAP4

I2CB_SDA_G2I2CB_SCL_G3

GPU_LVDS_DATA

N13P_TCK

N13P_TDIN13P_TDO

N13P_TMS

N13P_TRST

STRAP0STRAP1STRAP2

CEC_L3

VGA_LBKLT_CTLVGA_LCDVDD_EN

-VIDEO_THERM_ALERT-VIDEO_THERM_OVERT

3V_VGA_S0_R

-VIDEO_THERM_OVERT

SMBC_Therm_NV

SMBD_Therm_NV

DACA_VREF

DACA_RSET

DACA_VDD

VGA_CRT_GREENVGA_CRT_RED

VGA_CRT_BLUE

VGA_CRT_HSYNCVGA_CRT_VSYNC

VGA_CRT_GREEN

VGA_CRT_BLUE

VGA_CRT_RED

VGA_CRT_DDCDATAVGA_CRT_DDCCLK

N12P_XTAL_OUTBUFF

PLLVDD_PWR

27MHZ_IN

VIDEO_CLK_XTAL_SS

27MHZ_OUT_R

ROM_SI_H5

GPU_LVDS_CLK

STRAP0

STRAP2STRAP1

ROM_SO_H7

PLLVDD

N13P_GPIO12_H7

VGA_BLEN

ROM_SLK_H4

X8601_GND

X8601_GND

3D3V_VGA_S0

3D3V_VGA_S0

3D3V_VGA_S0

3D3V_VGA_S0

3D3V_VGA_S0

3D3V_VGA_S0

3D3V_VGA_S0

3D3V_VGA_S0

1D05V_VGA_S0

3D3V_VGA_S0

3D3V_VGA_S0

SMBD_Therm 27,28

SMBC_Therm 27,28

PURE_HW_SHUTDOWN# 27,28,36

NV_VID4 92NV_VID3 92

NV_VID0 92

NV_VID1 92NV_VID2 92

NV_VID5 92

Title



N13P_GPU (4/5): GPIO/STRAP


A1


<Core Design>

Title





A1


<Core Design>

Title





A1


<Core Design>

20100702_NV

I2CA=>CRT, I2CC=>LVDS.

20PF 5% 50V +/-0.25PF 0402

1-0073561-007156

72.42164.D0U72.52G63.A0U

1-007157

64.15025.6DL

1-007155

64.20025.6DL

HYNIX64Mx160010

Samsung64Mx16 0011

34.8Kohm 15Kohm 20Kohm64.34825.6DL

TABLE VIDEO MEMORY

ROM_SIPDR8627

SAMSUNG128Mx160111

HYNIX128Mx160110

45.3Kohm64.45325.6DL

72.51G63.H0U900MHz 72.41164.Q0U

DY

DY DY

15Kohm45Kohm

R8632

30Kohm

64.30025.6DL

R8633

64.15025.6DL

N12M-GEDEV ID:0xA7A1010

64.45325.6DLSTRAP2

35Kohm

64.34825.6DL

R8635

TABLENVIDIA

N12P-GEDEV ID:0xDF50101

N12P-GVDEV ID:0x0DF7(ES)

35Kohm

35Kohm

STRAP1

64.34825.6DL

64.34825.6DL

R8634

DY

DYDY

29 x 29 PACKAGEV: N13P-GS/GL (25~30W)B: N13M-GS/GE (15~20W)

GPIO pinName

GPIO0GPIO1GPIO2GPIO3GPIO4GPIO5GPIO6GPIO7GPIO8GPIO9GPIO10GPIO11GPIO12GPIO13GPIO14GPIO15GPIO16GPIO17GPIO18GPIO19GPIO20GPIO21

NormalFunction

GPU_VID4GPU_VID3LCD_BL_PWMLCD_VCCLCD_BLENGPU_VID1GPU_VID23D VisionOVERTALERTMEM_VREF_CTLGPU_VID0PWR_LEVELGPU_VID5HPD_ABHPD_CMEM_VDD_CTLHPD_DHPD_EHPD_FReservedReserved

I/OFunctionDescription

OOOOOOOOI/OI/OOOIOIIOIII

GPU Core VDD VID4GPU Core VDD VID3Panel Backlught PWM Brightness ControlPanel Power Enablepanel Backlight EnaleGPU Core VDD VID1GPU Core VDD VID23D Vision Left/Right signalActive Low Thermal Catastrophic Over TemperatureActive Low Thermal AlertMemory VREF ControlGPU Core VDD VID0AC Power Detect Input. High = AC, Low = BatteryGPU Core VDD VID5Hot Plog Detect for IFPABHot Plog Detect for IFPCMemory VDD VIDHot Plog Detect for IFPDHot Plog Detect for IFPEHot Plog Detect for IFPF

(DG-05587-001_v03_p.177_Table 95)

(DG-05587-001_v03_p.177_Table 95)1.05V ±30mV 90mA total

1.05V ±30mV 60mA

100nF(X7R)K0402 ×1

22uF(X5R)M0805 ×1

Under GPUNear GPU

100nF(X7R)K0402 ×2

22uF(X5R)M0805 ×1

4.7uF(X5R)K0603 ×1

SPEC. (DG-05587-001_v03_p.176)XTALOUTBUFF signal should be pull down using a 10k Ω resistor.XTALSSIN signal should be pull down using a 10k Ω resistor.REmember to place components as close ti the GPU as possible.

SPEC. (DG-05587-001_v03_p.162)Adding a pull down to the DACA_VDD with a 10k Ω resistor to GND.All other DAC I/O pins (including DACA_VREF, DACA_R EST)can be left floating.

N13M-GE1N13M-GSN13P-GLN13P-GS

Phase Count Target

Single phaseTwo phaseTwo phaseTwo phase

Recommended NVVDD Voltage Regulator Phase Coount

GPU SKU

The GB4-128 package is available in a 29 mm × 29mm footprint.128-bit memory interfaces respectively.

SPEC. (DG-05587-001_v03_p.191_Table 102)Multi_Strap_Ref0_GND 40.2k Ω 1% to GND

128Mx16:

hynix - H5TQ2G63BFR-11CSamsung - K4W2G1646C-HC11

64Mx16:

Hynix - H5TQ1G63DFR-11CSamsung - K4W1G1646G-BC11

L3 (DA-05691-001_v04_p.3_Table 2)N13P-GL 10k Ω pull-up to 3.3VN13M_GE1 NCN13M-GS NCN13P-GS NC

GPIO Description (DG-05587-001_v03_p.82_Tale 98)

X7R (+/-15% 、-55~125 )

X7RX7R

04020805

Under GPUNear GPU


PLL Power Rail Filter-PLL_VDD(DG-05587-001_v03_p.177_Table 96)

1

Bead Type

30Ω(ESR=0.05) 0402 Near GPU

100nF22uF

11

X7R (+/-15% 、-55~125 )

X7RX7RX7R

040204020805



PLL Power Rail Filter-SP_PLLVDD and VIDPLLVDD Combi ned(DG-05587-001_v03_p.178_Table 97)

1

Bead Type

180Ω(ESR=0.2) 0603 Near GPU

100nF4.7uF22uF

211

R8636 is reserved for Metal Xtal

12

C8604

SC

4D7U

6D3V

3KX

-GP

OPS

C8604

SC

4D7U

6D3V

3KX

-GP

OPS

1 2L8602BLM18PG181SN1D-GPOPS

L8602BLM18PG181SN1D-GPOPS

1 2R8623 10KR2J-3-GP

DYR8623 10KR2J-3-GP

DY

12

R863445K3R2F-L-GPOPS-BOM CTRL

R863445K3R2F-L-GPOPS-BOM CTRL

12

R862910KR2J-3-GPOPS

R862910KR2J-3-GPOPS

12

C8607SC12P50V2JN-3GPOPS

C8607SC12P50V2JN-3GPOPS

12

R862715KR2F-GPOPS-BOM CTRL


1 TP8612TP8612

XTAL_SSINH1

VID_PLLVDDAD7

SP_PLLVDDAE8PLLVDDAD8

XTAL_OUT H2

XTAL_OUTBUFF J4

XTAL_INH3

NC

GF108/GKx GF117

11/17 XTAL_PLL

15 OF 17VGA1O


NC

GF108/GKx GF117

11/17 XTAL_PLL

15 OF 17VGA1O


12

R860210KR2J-3-GP

OPS

R860210KR2J-3-GP

OPS

1TP8603TP8603

1 2R8611 10KR2J-3-GP

OPSR8611 10KR2J-3-GP

OPS

1TP8605TP8605

123 4

RN8605SRN4K7J-8-GPOPS

RN8605SRN4K7J-8-GPOPS

1234 5

678

RN8602

SRN75J-1-GPOPS

RN8602

SRN75J-1-GPOPS

1 TP8611TP8611DACA_RSETAP8

DACA_VREFAP9

DACA_VDDAG10

DACA_BLUE AL9

DACA_GREEN AL10

DACA_RED AK9

DACA_VSYNC AN9DACA_HSYNC AM9

I2CA_SDA R5I2CA_SCL R4

GF108/GKxGF117

NC

NC

NC

NC

NC

NCNCNC

GF108/GKx GF117

NC

TSEN_VREF

4/17 DACA

14 OF 17VGA1N

N13P-GS-A1-GP

OPS-BOM CTRL

GF108/GKxGF117

NC

NC

NC

NC

NC

NCNCNC

GF108/GKx GF117

NC

TSEN_VREF

4/17 DACA

14 OF 17VGA1N

N13P-GS-A1-GP

OPS-BOM CTRL

12



12



1 TP8614TP8614

1TP8620TP8620

12

R862510KR2F-2-GPDY

R862510KR2F-2-GPDY

1 2R8628

10KR2F-2-GPOPS-BOM CTRL

R8628

10KR2F-2-GPOPS-BOM CTRL

12 3

4RN8603

SRN10KJ-5-GP

OPSRN8603

SRN10KJ-5-GP

OPS

12

R863234K8R2F-1-GPDY

R863234K8R2F-1-GPDY

1 2R2813 0R0402-PADR2813 0R0402-PAD

1 2R862010KR2J-3-GP

OPSR862010KR2J-3-GP

OPS

12

R83155K1R2F-2-GPOPS-BOM CTRL


12

R831634K8R2F-1-GPDY

R831634K8R2F-1-GPDY

12

R863045K3R2F-L-GPOPS

R863045K3R2F-L-GPOPS

1

2

3 4

5

6Q8601

2N7002KDW-GP

84.2N702.A3F2nd = 84.DM601.03F

OPSQ8601

2N7002KDW-GP

84.2N702.A3F2nd = 84.DM601.03F

OPS

1TP8621TP8621

12

R86242KR2F-3-GPDY

R86242KR2F-3-GPDY

12

R86312KR2F-3-GPDY

R86312KR2F-3-GPDY

4

1 2

3

X8601XTAL-27MHZ-46-GP

82.30034.351OPS

X8601XTAL-27MHZ-46-GP

82.30034.351OPS

12



12

R861730KR2F-GP

OPS-BOM CTRL

R861730KR2F-GP

OPS-BOM CTRL

1 2R8619

10KR2J-3-GPDY

R8619

10KR2J-3-GPDY

12

R831720KR2F-L-GPOPS-BOM CTRL

R831720KR2F-L-GPOPS-BOM CTRL

21 ( (

L8601BLM18KG300TN1D-GPOPS

( (

L8601BLM18KG300TN1D-GPOPS

12

R86360R2J-2-GP

DY

R86360R2J-2-GP

DY

1TP8604TP8604

1 2R8603 1MR2F-GP

DYR8603 1MR2F-GP

DY

12 3

4RN8607

SRN10KJ-5-GP

OPSRN8607

SRN10KJ-5-GP

OPS

G

S

D

Q8602

2N7002K-2-GP

2ND = 84.2N702.J31OPS

1st = 84.2N702.031

Q8602

2N7002K-2-GP

2ND = 84.2N702.J31OPS

1st = 84.2N702.031

12

R860110KR2J-3-GPOPS

R860110KR2J-3-GPOPS

1 TP8613TP8613

MULTI_STRAP_REF0_GNDJ1

STRAP4J3STRAP3J5STRAP2J6STRAP1J7STRAP0J2

CEC L3

BUFRST# L2

ROM_SCLK H4ROM_SO H7ROM_SI H5

ROM_CS# H6

12/17 MISC2

16 OF 17VGA1P

N13P-GS-A1-GP

OPS-BOM CTRL

12/17 MISC2

16 OF 17VGA1P

N13P-GS-A1-GP

OPS-BOM CTRL

JTAG_TRST#AN11JTAG_TDOAP12JTAG_TDIAM11JTAG_TMSAP11JTAG_TCKAM10

THERMDPK3

THERMDNK4

GPIO21 P1GPIO20 P4GPIO16 R8GPIO13 M4GPIO12 N3GPIO11 M5GPIO10 L1

GPIO9 M2GPIO8 M1GPIO7 N8GPIO6 M7GPIO5 L7GPIO4 P7GPIO3 P5GPIO2 L6GPIO1 M3GPIO0 P6

I2CB_SDA R6I2CB_SCL R7

I2CC_SDA R3I2CC_SCL R2

I2CS_SDA T3I2CS_SCL T4

10/19 MISC1

17 OF 17VGA1Q


10/19 MISC1

17 OF 17VGA1Q


12

C8606

SC

D1U

10V

2KX

-5G

P

OPS

C8606

SC

D1U

10V

2KX

-5G

P

OPS

12

R863530KR2F-GPDY

R863530KR2F-GPDY

12

R831445K3R2F-L-GPDY

R831445K3R2F-L-GPDY

123 4

RN8604SRN2K2J-1-GP

OPS

RN8604SRN2K2J-1-GP

OPS

12

C8605

SC

D1U

10V

2KX

-5G

P

OPS

C8605

SC

D1U

10V

2KX

-5G

P

OPS

123 4

RN8606SRN2K2J-1-GP

OPS

RN8606SRN2K2J-1-GP

OPS

12

C8602

SC

D1U

10V

2KX

-5G

P

OPS

C8602

SC

D1U

10V

2KX

-5G

P

OPS

12


OPS


OPS

12

C8601

SC

4D7U

6D3V

3KX

-GP

OPSC8601

SC

4D7U

6D3V

3KX

-GP

OPS

12

R831340K2R2F-GP

OPSR831340K2R2F-GP

OPS

12

R86040R2J-2-GP

OPS

R86040R2J-2-GP

OPS

123 4

RN8601SRN2K2J-1-GP

OPS

RN8601SRN2K2J-1-GP

OPS


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

VGA_CORE

3D3V_VGA_S0

Title



N13P_GPU (5/5): PWR/GND


A3


<Core Design>

Title





A3


<Core Design>

Title





A3


<Core Design>

4.7uF0.1uF47uF22uF4.7uF

158115

X7R (+/-15% 、-55~125 )X6S (+/-22% 、-55~105 )X5R (+/-15% 、-55~85 )

X6SX7RX5RX5RX5R

06030402080508050805

104115

Under GPUUnder GPUNear GPUNear GPUNear GPU

Footprint Population Location

NVVDD Decoupling Requirement(DG-05587-001_v03_p.56_Table 7)

Capacitor Type

Under GPU

0.1uF1uF4.7uF

321

X7R (+/-15% 、-55~125 )X5R (+/-15% 、-55~85 )

X7RX5RX5R

040204020603



VDD33 Decoupling (DG-05587-001_v03_p.57_Table 8)

321

Near GPUUnder GPU

4.7uF(X5R)K0603 ×15

0.1uF(X7R)K0402 ×8

22uF(X5R)M0805 ×1

47uF(X5R)M0805 ×1

4.7uF(X5R)K0805 ×5

0.1uF(X7R)K0402 ×3

1uF(X5R)K0402 ×2

4.uF(X5R)K0603 ×2

GND_FAG11

GND_169T22GND_168T20GND_167T2GND_166T18GND_165T17GND_164T15GND_163T13GND_162R23GND_161R21GND_160R19GND_159R16GND_158R14GND_157R12GND_156P22GND_155P20GND_154P18GND_153P17GND_152P15GND_151P13GND_150N7GND_149N5GND_148N33GND_147N32GND_146N30GND_145N28GND_144N23GND_143N21GND_142N2GND_141N19

GND_OPT_2 W32GND_OPT_1 C16

GND_H AH11

GND_198 Y23GND_197 Y21GND_196 Y19GND_195 Y16GND_194 Y14GND_193 Y12GND_192 W28GND_191 W22GND_190 W20GND_189 W18GND_188 W17GND_187 W15GND_186 W13GND_185 V23GND_184 V21GND_183 V19GND_182 V16GND_181 V14GND_180 V12GND_179 U23GND_178 U21GND_177 U19GND_176 U16GND_175 U14GND_174 U12GND_173 T7GND_172 T5GND_171 T32GND_170 T28

Optional CMD GNDs (2)

NC for 4-Lyr cards

16/17 GND_2/2

8 OF 17VGA1H


Optional CMD GNDs (2)

NC for 4-Lyr cards

16/17 GND_2/2

8 OF 17VGA1H


12

C8731

SC

D1U

10V

2KX

-5G

P

OPS

C8731

SC

D1U

10V

2KX

-5G

P

OPS

12

C8718

SC

D1U

10V

2KX

-5G

P

OPS

C8718

SC

D1U

10V

2KX

-5G

P

OPS

12

C8733

SC

D1U

10V

2KX

-5G

P

OPS

C8733

SC

D1U

10V

2KX

-5G

P

OPS

12

C8714

SC

4D7U

6D3V

3KX

-GP

OPS

C8714

SC

4D7U

6D3V

3KX

-GP

OPS

12

C8706

SC

4D7U

6D3V

3KX

-GP

DYC8706

SC

4D7U

6D3V

3KX

-GP

DY

12

C8723

SC

D1U

10V

2KX

-5G

P

DYC8723

SC

D1U

10V

2KX

-5G

P

DY

NC#V32V32NC#T8T8NC#H31H31NC#D26D26NC#D23D23NC#D20D20NC#D19D19NC#C15C15NC#AL11AL11NC#AJ5AJ5NC#AJ4AJ4NC#AJ28AJ28NC#AC6AC6

VDD33_4 M8VDD33_3 L8VDD33_2 K8VDD33_1 J8

17/17 NC/VDD33

7 OF 17VGA1G

N13P-GS-A1-GP

OPS-BOM CTRL

17/17 NC/VDD33

7 OF 17VGA1G

N13P-GS-A1-GP

OPS-BOM CTRL

12

C8734S

C1U

6D3V

2KX

-GP

OPS

C8734S

C1U

6D3V

2KX

-GP

OPS

12

C8724

SC

22U

6D3V

5MX

-2G

P

OPS

C8724

SC

22U

6D3V

5MX

-2G

P

OPS1

2

C8721

SC

D1U

10V

2KX

-5G

P

DYC8721

SC

D1U

10V

2KX

-5G

P

DY12

C8717

SC

D1U

10V

2KX

-5G

P

DYC8717

SC

D1U

10V

2KX

-5G

P

DY

XVDD_38 AA8XVDD_37 AA7XVDD_36 AA6XVDD_35 AA5XVDD_34 AA4XVDD_33 AA3XVDD_32 AA2XVDD_31 AA1

XVDD_30 Y8XVDD_29 Y7XVDD_28 Y6XVDD_27 Y5XVDD_26 Y4XVDD_25 Y3XVDD_24 Y2XVDD_23 Y1

XVDD_22 W8XVDD_21 W7XVDD_20 W5XVDD_19 W4XVDD_18 W3XVDD_17 W2

XVDD_16 V8XVDD_15 V7XVDD_14 V6XVDD_13 V5XVDD_12 V4XVDD_11 V3XVDD_10 V2XVDD_9 V1

XVDD_8 U8XVDD_7 U7XVDD_6 U6XVDD_5 U5XVDD_4 U4XVDD_3 U3XVDD_2 U2XVDD_1 U1

CHANNELSPOWERCONFIGURABLE

9/17 XVDD

5 OF 17VGA1E


CHANNELSPOWERCONFIGURABLE

9/17 XVDD

5 OF 17VGA1E


12

C8702

SC

4D7U

6D3V

3KX

-GP

DYC8702

SC

4D7U

6D3V

3KX

-GP

DY

12

C8735

SC

1U6D

3V2K

X-G

P

OPS

C8735

SC

1U6D

3V2K

X-G

P

OPS

12

C8703

SC

4D7U

6D3V

3KX

-GP

OPS

C8703

SC

4D7U

6D3V

3KX

-GP

OPS

12

C8713

SC

4D7U

6D3V

3KX

-GP

OPS

C8713

SC

4D7U

6D3V

3KX

-GP

OPS

12

C8704

SC

4D7U

6D3V

3KX

-GP

DYC8704

SC

4D7U

6D3V

3KX

-GP

DY

12

C8719S

CD

1U10

V2K

X-5

GP

DYC8719

SC

D1U

10V

2KX

-5G

P

DY

12

C8707

SC

4D7U

6D3V

3KX

-GP

OPS

C8707

SC

4D7U

6D3V

3KX

-GP

OPS

12

C8736

SC

4D7U

6D3V

3KX

-GP

OPS

C8736

SC

4D7U

6D3V

3KX

-GP

OPS

12

C8720

SC

D1U

10V

2KX

-5G

P

OPS

C8720

SC

D1U

10V

2KX

-5G

P

OPS12

C8716

SC

D1U

10V

2KX

-5G

P

OPS

C8716

SC

D1U

10V

2KX

-5G

P

OPS 12

C8722

SC

D1U

10V

2KX

-5G

P

OPS

C8722

SC

D1U

10V

2KX

-5G

P

OPS

12

C8710

SC

4D7U

6D3V

3KX

-GP

DYC8710

SC

4D7U

6D3V

3KX

-GP

DY

12

C8705

SC

4D7U

6D3V

3KX

-GP

OPS

C8705

SC

4D7U

6D3V

3KX

-GP

OPS

12

C8711

SC

4D7U

6D3V

3KX

-GP

OPS

C8711

SC

4D7U

6D3V

3KX

-GP

OPS

VDD_72Y22VDD_71Y20VDD_70Y18VDD_69Y17VDD_68Y15VDD_67Y13VDD_66W23VDD_65W21VDD_64W19VDD_63W16VDD_62W14VDD_61W12VDD_60V22VDD_59V20VDD_58V18VDD_57V17VDD_56V15VDD_55V13VDD_54U22VDD_53U20VDD_52U18VDD_51U17VDD_50U15VDD_49U13VDD_48T23VDD_47T21VDD_46T19VDD_45T16VDD_44T14VDD_43T12VDD_42R22VDD_41R20VDD_40R18VDD_39R17VDD_38R15VDD_37R13VDD_36P23VDD_35P21VDD_34P19VDD_33P16VDD_32P14VDD_31P12VDD_30N22VDD_29N20VDD_28N18VDD_27N17VDD_26N15VDD_25N13VDD_24M23VDD_23M21VDD_22M19VDD_21M16VDD_20M14VDD_19M12VDD_18AC23VDD_17AC21VDD_16AC19VDD_15AC16VDD_14AC14VDD_13AC12VDD_12AB22VDD_11AB20VDD_10AB18VDD_9AB17VDD_8AB15VDD_7AB13VDD_6AA23VDD_5AA21VDD_4AA19VDD_3AA16VDD_2AA14VDD_1AA12

13/17 NVVDD

6 OF 17VGA1F


13/17 NVVDD

6 OF 17VGA1F


12

C8732

SC

D1U

10V

2KX

-5G

P

OPS

C8732

SC

D1U

10V

2KX

-5G

P

OPS

GND_70AM22GND_69AM19GND_68AM16GND_67AM13GND_66AL5GND_65AL33GND_64AL32GND_63AL30GND_62AL28GND_61AL26GND_60AL24GND_59AL23GND_58AL21GND_57AL20GND_56AL2GND_55AL18GND_54AL17GND_53AL15GND_52AL14GND_51AL12GND_50AK7GND_49AK10GND_48AJ7GND_47AH7GND_46AH5GND_45AH33GND_44AH32GND_43AH30GND_42AH29GND_41AH28GND_40AH24GND_39AH22GND_38AH2GND_37AH19GND_36AH16GND_35AH13GND_4AA15GND_34AH10GND_33AE7GND_32AE5GND_31AE33GND_30AE32GND_29AE30GND_28AE28GND_27AE2GND_26AC22GND_25AC20GND_3AA13GND_24AC18GND_23AC17GND_22AC15GND_21AC13GND_20AB7GND_19AB5GND_18AB32GND_17AB30GND_16AB28GND_15AB23GND_2A33GND_14AB21GND_13AB2GND_12AB19GND_11AB16GND_10AB14GND_9AB12GND_8AA22GND_7AA20GND_6AA18GND_5AA17GND_1A2

GND_140 N16GND_139 N14GND_138 N12GND_137 M22GND_136 M20GND_135 M18GND_134 M17GND_133 M15GND_132 M13GND_131 K7GND_130 K5GND_129 K33GND_128 K32GND_127 K30GND_126 K28GND_125 K2GND_124 G7GND_123 G5GND_122 G33GND_121 G32GND_120 G30GND_119 G3GND_118 G28GND_117 G25GND_116 G22GND_115 G2GND_114 G19GND_113 G16GND_112 G13GND_111 G10GND_110 F7GND_109 F28GND_108 E7GND_107 E5GND_106 E25GND_105 E22GND_104 E10GND_103 D33GND_102 D31GND_101 D2GND_100 C7GND_99 C28GND_98 C25GND_97 C22GND_96 C19GND_95 C13GND_94 C10GND_93 B7GND_92 B4GND_91 B34GND_90 B31GND_89 B28GND_88 B25GND_87 B22GND_86 B10GND_85 B1GND_84 AP33GND_83 AP2GND_82 AN7GND_81 AN4GND_80 AN34GND_79 AN30GND_78 AN25GND_77 AN22GND_76 AN19GND_75 AN16GND_74 AN13GND_73 AN10GND_72 AN1GND_71 AM25

15/17 GND_1/2

9 OF 17VGA1I


15/17 GND_1/2

9 OF 17VGA1I


12

C8708

SC

4D7U

6D3V

3KX

-GP

OPS

C8708

SC

4D7U

6D3V

3KX

-GP

OPS

12

C8715

SC

4D7U

6D3V

3KX

-GP

OPS

C8715

SC

4D7U

6D3V

3KX

-GP

OPS12

C8709

SC

4D7U

6D3V

3KX

-GP

OPS

C8709

SC

4D7U

6D3V

3KX

-GP

OPS 12

C8712

SC

4D7U

6D3V

3KX

-GP

DYC8712

SC

4D7U

6D3V

3KX

-GP

DY1

2

C8701

SC

4D7U

6D3V

3KX

-GP

OPS

C8701

SC

4D7U

6D3V

3KX

-GP

OPS


A

A

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1

FBA_D23

FBA_D19FBA_D18FBA_D17FBA_D16FBA_D20FBA_D21FBA_D22

VRAM_CH_A_ZQ_2

FBA_D29FBA_D28FBA_D31FBA_D25FBA_D26




VRAM_CH_A_ZQ_1

FBA_D3


FBA_VREF_0FBA_VREF_0

FBA_VREF_0


1D5V_VGA_S0

1D5V_VGA_S0

FBA_CLK0#85FBA_CLK085

FBA_DQS_WP2 85

FBA_DQS_WP3 85

FBA_DQM385FBA_DQM285

FBA_DQS_RN3 85

FBA_DQS_RN2 85FBA_DQS_WP1 85

FBA_DQS_WP0 85



FBA_DQS_RN0 85

FBA_DQS_RN1 85

FBA_D[63..0] 85,89 FBA_D[63..0] 85,89

FBA_A285,89

FBA_CKE085

FBA_A385,89FBA_A485,89

FBA_A785,89FBA_A885,89FBA_A985,89

FBA_A585,89FBA_A685,89

FBA_A1285,89FBA_A1385,89FBA_A1585,89

FBA_A1085,89FBA_A1185,89

FBA_A085,89

FBA_BA085,89FBA_BA185,89FBA_BA285,89

FBA_WE#85,89FBA_CAS#85,89FBA_RAS#85,89

FBA_A185,89FBA_A285,89

FBA_CKE085

FBA_A385,89FBA_A485,89

FBA_A785,89FBA_A885,89FBA_A985,89

FBA_A585,89FBA_A685,89

FBA_A1285,89FBA_A1385,89FBA_A1585,89

FBA_A1085,89FBA_A1185,89

FBA_A085,89



FBA_A185,89

FBA_ODT0 85

FBA_CS0# 85FBA_RST 85,89

FBA_ODT0 85


Title


Date: Sheet of


LA48 SD

CHANNEL-A_VRAM1,2 (1/4) A3


<Core Design>

Title


Date: Sheet of


LA48 SD



<Core Design>

Title


Date: Sheet of


LA48 SD



<Core Design>

VIDEO FRAME BUFFER PORT A

128 X 1672.52G63.A0U 72.42164.D0U IC VRAM K4W2G1646C-HC11 FBGA96

64 X 1672.51G63.H0U IC VRAM H5TQ1G63DFR-11C FBGA 96BALLS72.41646.Q0U IC VRAM K4W1G1646G-BC11 FBGA 96BALLS

Close to VRAM(For VRAM1 & VRAM2)



128Mx16:

hynix - H5TQ2G63BFR-11CSamsung - K4W2G1646C-HC11

64Mx16:

Hynix - H5TQ1G63DFR-11CSamsung - K4W1G1646G-BC11

0.1uF(X7R)K0402 ×4

1.0uF(X7R)K0603 ×8

0.1uF1uF

X7R (+/-15% 、-55~125 )*Per clamshell pair

X7RX7R

04020603

Close to VRAMClose to VRAM


Combined Memory FBVDD/Q Decoupling DDR3×16 with Cla mshell Layout(DG-05587-001_v03_p.87_Table 23)

48

12

R8801

243R

2F-2

-GP

OPS

R8801

243R

2F-2

-GP

OPS

12

R88031K

33R

2F-G

P

OPS

R88031K

33R

2F-G

P

OPS

12

R8804

1K33

R2F

-GP

OPS

R8804

1K33

R2F

-GP

OPS12

C8809

SC

1U6D

3V3K

X-2

GP

OPS

C8809

SC

1U6D

3V3K

X-2

GP

OPS 12

C8810

SC

1U6D

3V3K

X-2

GP

OPS

C8810

SC

1U6D

3V3K

X-2

GP

OPS12

C8807

SC

1U6D

3V3K

X-2

GP

OPS

C8807

SC

1U6D

3V3K

X-2

GP

OPS 12

C8812

SC

1U6D

3V3K

X-2

GP

OPS

C8812

SC

1U6D

3V3K

X-2

GP

OPS

12

C8804

SC

D1U

10V

2KX

-5G

P

OPS

C8804

SC

D1U

10V

2KX

-5G

P

OPS

VDDQA1

DQU5 A2

DQU7 A3

DQU4 A7

VDDQA8

VSS A9

VSSQ B1

VDDB2

VSS B3

DQSU# B7

DQU6 B8

VSSQ B9

VDDQC1 DQU3 C2

DQU1 C3

DQSU C7

DQU2 C8

VDDQC9

VSSQ D1

VDDQD2

DMUD3

DQU0 D7

VSSQ D8

VDDD9

VSS E1

VSSQ E2

DQL0 E3

DMLE7VSSQ E8

VDDQE9

VDDQF1

DQL2 F2

DQSL F3

DQL1 F7

DQL3 F8

VSSQ F9VSSQ G1

DQL6 G2

DQSL# G3

VDDG7

VSS G8

VSSQ G9

VREFDQH1

VDDQH2

DQL4 H3

DQL7 H7

DQL5 H8

VDDQH9

NC#J1 J1

VSS J2

RAS#J3

CKJ7

VSS J8

NC#J9 J9

ODT K1

VDDK2

CAS#K3

CK#K7

VDDK8

CKEK9

NC#L1 L1

CS# L2

WE#L3

A10/APL7

ZQL8

NC#L9 L9

VSS M1

BA0M2

BA2M3

A15M7

VREFCAM8

VSS M9

VDDN1

A3N2

A0N3

A12/BC#N7

BA1N8

VDDN9

VSS P1

A5P2

A2P3A1P7

A4P8

VSS P9

VDDR1

A7R2

A9R3

A11R7

A6R8

VDDR9

VSS T1

RESET# T2

A13T3

NC#T7 T7

A8T8

VSS T9

VRAM1

H5TQ1G63BFR-12C-GPBOM CTRL

VRAM1


12

C8806

SC

1U6D

3V3K

X-2

GP

OPS

C8806

SC

1U6D

3V3K

X-2

GP

OPS

12

R8802

243R

2F-2

-GP

OPS

R8802

243R

2F-2

-GP

OPS

12

C8808

SC

1U6D

3V3K

X-2

GP

OPS

C8808

SC

1U6D

3V3K

X-2

GP

OPS12

C8805

SC

1U6D

3V3K

X-2

GP

OPS

C8805

SC

1U6D

3V3K

X-2

GP

OPS 12

C8813

SC

D01

U50

V2K

X-1

GP

OPS

C8813

SC

D01

U50

V2K

X-1

GP

OPS

VDDQA1

DQU5 A2

DQU7 A3

DQU4 A7

VDDQA8

VSS A9

VSSQ B1

VDDB2

VSS B3

DQSU# B7

DQU6 B8

VSSQ B9

VDDQC1 DQU3 C2

DQU1 C3

DQSU C7

DQU2 C8

VDDQC9

VSSQ D1

VDDQD2

DMUD3

DQU0 D7

VSSQ D8

VDDD9

VSS E1

VSSQ E2

DQL0 E3

DMLE7VSSQ E8

VDDQE9

VDDQF1

DQL2 F2

DQSL F3

DQL1 F7

DQL3 F8

VSSQ F9VSSQ G1

DQL6 G2

DQSL# G3

VDDG7

VSS G8

VSSQ G9

VREFDQH1

VDDQH2

DQL4 H3

DQL7 H7

DQL5 H8

VDDQH9

NC#J1 J1

VSS J2

RAS#J3

CKJ7

VSS J8

NC#J9 J9

ODT K1

VDDK2

CAS#K3

CK#K7

VDDK8

CKEK9

NC#L1 L1

CS# L2

WE#L3

A10/APL7

ZQL8

NC#L9 L9

VSS M1

BA0M2

BA2M3

A15M7

VREFCAM8

VSS M9

VDDN1

A3N2

A0N3

A12/BC#N7

BA1N8

VDDN9

VSS P1

A5P2

A2P3A1P7

A4P8

VSS P9

VDDR1

A7R2

A9R3

A11R7

A6R8

VDDR9

VSS T1

RESET# T2

A13T3

NC#T7 T7

A8T8

VSS T9

VRAM2


VRAM2


12

C8801

SC

D1U

10V

2KX

-5G

P

OPS

C8801

SC

D1U

10V

2KX

-5G

P

OPS 12

C8803

SC

D1U

10V

2KX

-5G

P

OPS

C8803

SC

D1U

10V

2KX

-5G

P

OPS

12

C8811

SC

1U6D

3V3K

X-2

GP

OPS

C8811

SC

1U6D

3V3K

X-2

GP

OPS

12

C8802

SC

D1U

10V

2KX

-5G

P

OPS

C8802

SC

D1U

10V

2KX

-5G

P

OPS


A

A

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1

VRAM_CH_A_ZQ_4




FBA_D52

VRAM_CH_A_ZQ_3





FBA_VREF_1 FBA_VREF_1

FBA_VREF_1


1D5V_VGA_S0

1D5V_VGA_S0



FBA_DQS_RN5 85

FBA_DQS_WP6 85

FBA_CLK185FBA_CLK1#85

FBA_DQS_WP7 85

FBA_DQS_RN4 85FBA_DQS_WP5 85FBA_DQS_WP4 85

FBA_DQS_RN7 85


FBA_DQS_RN6 85

FBA_D[63..0] 85,88 FBA_D[63..0] 85,88

FBA_A085,88FBA_A185,88FBA_A285,88FBA_A385,88FBA_A485,88

FBA_A785,88FBA_A885,88FBA_A985,88

FBA_A585,88FBA_A685,88

FBA_A1285,88FBA_A1385,88FBA_A1585,88

FBA_A1085,88FBA_A1185,88


FBA_CKE185


FBA_ODT1 85


FBA_A285,88

FBA_CKE185

FBA_A385,88FBA_A485,88

FBA_A785,88FBA_A885,88FBA_A985,88

FBA_A585,88FBA_A685,88

FBA_A1285,88FBA_A1385,88FBA_A1585,88

FBA_A1085,88FBA_A1185,88

FBA_A085,88



FBA_A185,88

FBA_ODT1 85


Title


Date: Sheet of


LA48 SD

CHANNEL-A_VRAM3,4 (2/4)A3


<Core Design>

Title


Date: Sheet of


LA48 SD



<Core Design>

Title


Date: Sheet of


LA48 SD



<Core Design>

VIDEO FRAME BUFFER PORT A




1.0uF(X7R)K0603 ×8

0.1uF(X7R)K0402 ×4

0.1uF1uF


X7RX7R

04020603




48

12

C8905

SC

1U6D

3V3K

X-2

GP

OPS

C8905

SC

1U6D

3V3K

X-2

GP

OPS

VDDQA1

DQU5 A2

DQU7 A3

DQU4 A7

VDDQA8

VSS A9

VSSQ B1

VDDB2

VSS B3

DQSU# B7

DQU6 B8

VSSQ B9

VDDQC1 DQU3 C2

DQU1 C3

DQSU C7

DQU2 C8

VDDQC9

VSSQ D1

VDDQD2

DMUD3

DQU0 D7

VSSQ D8

VDDD9

VSS E1

VSSQ E2

DQL0 E3

DMLE7VSSQ E8

VDDQE9

VDDQF1

DQL2 F2

DQSL F3

DQL1 F7

DQL3 F8

VSSQ F9VSSQ G1

DQL6 G2

DQSL# G3

VDDG7

VSS G8

VSSQ G9

VREFDQH1

VDDQH2

DQL4 H3

DQL7 H7

DQL5 H8

VDDQH9

NC#J1 J1

VSS J2

RAS#J3

CKJ7

VSS J8

NC#J9 J9

ODT K1

VDDK2

CAS#K3

CK#K7

VDDK8

CKEK9

NC#L1 L1

CS# L2

WE#L3

A10/APL7

ZQL8

NC#L9 L9

VSS M1

BA0M2

BA2M3

A15M7

VREFCAM8

VSS M9

VDDN1

A3N2

A0N3

A12/BC#N7

BA1N8

VDDN9

VSS P1

A5P2

A2P3A1P7

A4P8

VSS P9

VDDR1

A7R2

A9R3

A11R7

A6R8

VDDR9

VSS T1

RESET# T2

A13T3

NC#T7 T7

A8T8

VSS T9

VRAM4


VRAM4


12

C8911

SC

1U6D

3V3K

X-2

GP

OPS

C8911

SC

1U6D

3V3K

X-2

GP

OPS12

C8910

SC

1U6D

3V3K

X-2

GP

OPS

C8910

SC

1U6D

3V3K

X-2

GP

OPS 12

C8912

SC

1U6D

3V3K

X-2

GP

OPS

C8912

SC

1U6D

3V3K

X-2

GP

OPS

12

C8902

SC

D1U

10V

2KX

-5G

P

OPS

C8902

SC

D1U

10V

2KX

-5G

P

OPS

12

C8907

SC

1U6D

3V3K

X-2

GP

OPS

C8907

SC

1U6D

3V3K

X-2

GP

OPS

12

R89031K

33R

2F-G

P

OPS

R89031K

33R

2F-G

P

OPS

12

C8906

SC

1U6D

3V3K

X-2

GP

OPS

C8906

SC

1U6D

3V3K

X-2

GP

OPS

12

R8901

243R

2F-2

-GP

OPS

R8901

243R

2F-2

-GP

OPS

12

C8901

SC

D1U

10V

2KX

-5G

P

OPS

C8901

SC

D1U

10V

2KX

-5G

P

OPS

12

C8909

SC

1U6D

3V3K

X-2

GP

OPS

C8909

SC

1U6D

3V3K

X-2

GP

OPS

12

C8904

SC

D1U

10V

2KX

-5G

P

OPS

C8904

SC

D1U

10V

2KX

-5G

P

OPS

12

C8908

SC

1U6D

3V3K

X-2

GP

OPS

C8908

SC

1U6D

3V3K

X-2

GP

OPS

12

R8904

1K33

R2F

-GP

OPS

R8904

1K33

R2F

-GP

OPS

12

R8902

243R

2F-2

-GP

OPS

R8902

243R

2F-2

-GP

OPS

VDDQA1

DQU5 A2

DQU7 A3

DQU4 A7

VDDQA8

VSS A9

VSSQ B1

VDDB2

VSS B3

DQSU# B7

DQU6 B8

VSSQ B9

VDDQC1 DQU3 C2

DQU1 C3

DQSU C7

DQU2 C8

VDDQC9

VSSQ D1

VDDQD2

DMUD3

DQU0 D7

VSSQ D8

VDDD9

VSS E1

VSSQ E2

DQL0 E3

DMLE7VSSQ E8

VDDQE9

VDDQF1

DQL2 F2

DQSL F3

DQL1 F7

DQL3 F8

VSSQ F9VSSQ G1

DQL6 G2

DQSL# G3

VDDG7

VSS G8

VSSQ G9

VREFDQH1

VDDQH2

DQL4 H3

DQL7 H7

DQL5 H8

VDDQH9

NC#J1 J1

VSS J2

RAS#J3

CKJ7

VSS J8

NC#J9 J9

ODT K1

VDDK2

CAS#K3

CK#K7

VDDK8

CKEK9

NC#L1 L1

CS# L2

WE#L3

A10/APL7

ZQL8

NC#L9 L9

VSS M1

BA0M2

BA2M3

A15M7

VREFCAM8

VSS M9

VDDN1

A3N2

A0N3

A12/BC#N7

BA1N8

VDDN9

VSS P1

A5P2

A2P3A1P7

A4P8

VSS P9

VDDR1

A7R2

A9R3

A11R7

A6R8

VDDR9

VSS T1

RESET# T2

A13T3

NC#T7 T7

A8T8

VSS T9

VRAM3


VRAM3


12

C8903

SC

D1U

10V

2KX

-5G

P

OPS

C8903

SC

D1U

10V

2KX

-5G

P

OPS

12

C8913

SC

D01

U50

V2K

X-1

GP

OPS

C8913

SC

D01

U50

V2K

X-1

GP

OPS


A

A

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1

VRAM_CH_C_ZQ_2

FBB_D5

FBB_D7

FBB_D13FBB_D11FBB_D14FBB_D10FBB_D12FBB_D8FBB_D15FBB_D9

VRAM_CH_C_ZQ_1

FBB_VREF_0FBB_VREF_0

FBB_VREF_0

FBB_D1

FBB_D2FBB_D0

FBB_D6

FBB_D4

FBB_D3FBB_D31

FBB_D25

FBB_D28

FBB_D29

FBB_D27FBB_D30

FBB_D26

FBB_D24

FBB_D17

FBB_D16

FBB_D20

FBB_D19

FBB_D23FBB_D18

FBB_D22

FBB_D21


1D5V_VGA_S0

1D5V_VGA_S0

FBB_CLK085FBB_CLK0#85FBB_CLK085

FBB_CLK0#85

FBB_DQM185

FBB_DQS_WP1 85FBB_DQS_RN1 85

FBB_DQS_RN0 85FBB_DQS_WP0 85

FBB_DQM085

FBB_D[63..0] 85,91FBB_D[63..0] 85,91

FBB_ODT0 85

FBB_CS0# 85FBB_RST 85,91

FBB_A285,91

FBB_CKE085

FBB_A385,91FBB_A485,91

FBB_A785,91FBB_A885,91FBB_A985,91

FBB_A585,91FBB_A685,91

FBB_A1285,91FBB_A1385,91FBB_A1585,91

FBB_A1085,91FBB_A1185,91

FBB_A085,91

FBB_BA085,91FBB_BA185,91FBB_BA285,91

FBB_WE#85,91FBB_CAS#85,91FBB_RAS#85,91

FBB_A185,91 FBB_A285,91

FBB_CKE085

FBB_A385,91FBB_A485,91

FBB_A785,91FBB_A885,91FBB_A985,91

FBB_A585,91FBB_A685,91

FBB_A1285,91FBB_A1385,91FBB_A1585,91

FBB_A1085,91FBB_A1185,91

FBB_A085,91



FBB_A185,91

FBB_ODT0 85




FBB_DQM285FBB_DQM385

Title


Date: Sheet of


LA48 SD

CHANNEL-C_VRAM5,6 (3/4)

A3


<Core Design>

Title


Date: Sheet of


LA48 SD


A3


<Core Design>

Title


Date: Sheet of


LA48 SD


A3


<Core Design>

VIDEO FRAME BUFFER PORT C




1.0uF(X7R)K0603 ×8

0.1uF(X7R)K0402 ×4

0.1uF1uF


X7RX7R

04020603




48

VDDQA1

DQU5 A2

DQU7 A3

DQU4 A7

VDDQA8

VSS A9

VSSQ B1

VDDB2

VSS B3

DQSU# B7

DQU6 B8

VSSQ B9

VDDQC1 DQU3 C2

DQU1 C3

DQSU C7

DQU2 C8

VDDQC9

VSSQ D1

VDDQD2

DMUD3

DQU0 D7

VSSQ D8

VDDD9

VSS E1

VSSQ E2

DQL0 E3

DMLE7VSSQ E8

VDDQE9

VDDQF1

DQL2 F2

DQSL F3

DQL1 F7

DQL3 F8

VSSQ F9VSSQ G1

DQL6 G2

DQSL# G3

VDDG7

VSS G8

VSSQ G9

VREFDQH1

VDDQH2

DQL4 H3

DQL7 H7

DQL5 H8

VDDQH9

NC#J1 J1

VSS J2

RAS#J3

CKJ7

VSS J8

NC#J9 J9

ODT K1

VDDK2

CAS#K3

CK#K7

VDDK8

CKEK9

NC#L1 L1

CS# L2

WE#L3

A10/APL7

ZQL8

NC#L9 L9

VSS M1

BA0M2

BA2M3

A15M7

VREFCAM8

VSS M9

VDDN1

A3N2

A0N3

A12/BC#N7

BA1N8

VDDN9

VSS P1

A5P2

A2P3A1P7

A4P8

VSS P9

VDDR1

A7R2

A9R3

A11R7

A6R8

VDDR9

VSS T1

RESET# T2

A13T3

NC#T7 T7

A8T8

VSS T9

VRAM6


VRAM6


12

C9003

SC

D1U

10V

2KX

-5G

P

OPS

C9003

SC

D1U

10V

2KX

-5G

P

OPS

12

C9005

SC

1U6D

3V3K

X-2

GP

OPS

C9005

SC

1U6D

3V3K

X-2

GP

OPS

12

R9002

243R

2F-2

-GP

OPS

R9002

243R

2F-2

-GP

OPS

12

C9011

SC

1U6D

3V3K

X-2

GP

OPS

C9011

SC

1U6D

3V3K

X-2

GP

OPS12

C9006

SC

1U6D

3V3K

X-2

GP

OPS

C9006

SC

1U6D

3V3K

X-2

GP

OPS

12

R90031K

33R

2F-G

P

OPS

R90031K

33R

2F-G

P

OPS

12

C9002

SC

D1U

10V

2KX

-5G

P

OPS

C9002

SC

D1U

10V

2KX

-5G

P

OPS

12

C9009

SC

1U6D

3V3K

X-2

GP

OPS

C9009

SC

1U6D

3V3K

X-2

GP

OPS12

C9007

SC

1U6D

3V3K

X-2

GP

OPS

C9007

SC

1U6D

3V3K

X-2

GP

OPS

12

R9004

1K33

R2F

-GP

OPS

R9004

1K33

R2F

-GP

OPS

12

C9001

SC

D1U

10V

2KX

-5G

P

OPS

C9001

SC

D1U

10V

2KX

-5G

P

OPS

12

C9012

SC

1U6D

3V3K

X-2

GP

OPS

C9012

SC

1U6D

3V3K

X-2

GP

OPS

12

R9001

243R

2F-2

-GP

OPS

R9001

243R

2F-2

-GP

OPS

12

C9010

SC

1U6D

3V3K

X-2

GP

OPS

C9010

SC

1U6D

3V3K

X-2

GP

OPS

VDDQA1

DQU5 A2

DQU7 A3

DQU4 A7

VDDQA8

VSS A9

VSSQ B1

VDDB2

VSS B3

DQSU# B7

DQU6 B8

VSSQ B9

VDDQC1 DQU3 C2

DQU1 C3

DQSU C7

DQU2 C8

VDDQC9

VSSQ D1

VDDQD2

DMUD3

DQU0 D7

VSSQ D8

VDDD9

VSS E1

VSSQ E2

DQL0 E3

DMLE7VSSQ E8

VDDQE9

VDDQF1

DQL2 F2

DQSL F3

DQL1 F7

DQL3 F8

VSSQ F9VSSQ G1

DQL6 G2

DQSL# G3

VDDG7

VSS G8

VSSQ G9

VREFDQH1

VDDQH2

DQL4 H3

DQL7 H7

DQL5 H8

VDDQH9

NC#J1 J1

VSS J2

RAS#J3

CKJ7

VSS J8

NC#J9 J9

ODT K1

VDDK2

CAS#K3

CK#K7

VDDK8

CKEK9

NC#L1 L1

CS# L2

WE#L3

A10/APL7

ZQL8

NC#L9 L9

VSS M1

BA0M2

BA2M3

A15M7

VREFCAM8

VSS M9

VDDN1

A3N2

A0N3

A12/BC#N7

BA1N8

VDDN9

VSS P1

A5P2

A2P3A1P7

A4P8

VSS P9

VDDR1

A7R2

A9R3

A11R7

A6R8

VDDR9

VSS T1

RESET# T2

A13T3

NC#T7 T7

A8T8

VSS T9

VRAM5


VRAM5


12

C9013

SC

D01

U50

V2K

X-1

GP

OPS

C9013

SC

D01

U50

V2K

X-1

GP

OPS

12

C9004

SC

D1U

10V

2KX

-5G

P

OPS

C9004

SC

D1U

10V

2KX

-5G

P

OPS

12

C9008

SC

1U6D

3V3K

X-2

GP

OPS

C9008

SC

1U6D

3V3K

X-2

GP

OPS


A

A

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1

FBB_D63

FBB_D61

FBB_D60FBB_D58FBB_D62FBB_D57

FBB_D40

FBB_D41

FBB_D42FBB_D46FBB_D43

VRAM_CH_C_ZQ_4

FBB_D36FBB_D38

FBB_D35FBB_D37

FBB_D39

FBB_D51FBB_D53FBB_D48FBB_D54FBB_D49FBB_D55FBB_D50FBB_D52

VRAM_CH_C_ZQ_3

FBB_VREF_1FBB_VREF_1

FBB_VREF_1

FBB_D34

FBB_D32

FBB_D33

FBB_D44

FBB_D47

FBB_D45

FBB_D56

FBB_D59


1D5V_VGA_S0

1D5V_VGA_S0

FBB_CLK185FBB_CLK1#85

FBB_DQM585


FBB_CLK185FBB_CLK1#85

FBB_DQM485


FBB_DQM785


FBB_DQM685


FBB_D[63..0] 85,90FBB_D[63..0] 85,90

FBB_ODT1 85


FBB_ODT1 85

FBB_CS1# 85FBB_RST 85,90 FBB_A285,90

FBB_CKE185

FBB_A385,90FBB_A485,90

FBB_A785,90FBB_A885,90FBB_A985,90

FBB_A585,90FBB_A685,90

FBB_A1285,90FBB_A1385,90FBB_A1585,90

FBB_A1085,90FBB_A1185,90

FBB_A085,90



FBB_A185,90FBB_A285,90

FBB_CKE185

FBB_A385,90FBB_A485,90

FBB_A785,90FBB_A885,90FBB_A985,90

FBB_A585,90FBB_A685,90

FBB_A1285,90FBB_A1385,90FBB_A1585,90

FBB_A1085,90FBB_A1185,90

FBB_A085,90



FBB_A185,90

Title


Date: Sheet of


LA48 SD


A3


<Core Design>

Title


Date: Sheet of


LA48 SD


A3


<Core Design>

Title


Date: Sheet of


LA48 SD


A3


<Core Design>

VIDEO FRAME BUFFER PORT C

0.1uF1uF


X7RX7R

04020603




48




1.0uF(X7R)K0603 ×8

0.1uF(X7R)K0402 ×4

12

C9107

SC

1U6D

3V3K

X-2

GP

OPS

C9107

SC

1U6D

3V3K

X-2

GP

OPS

12

C9104

SC

D1U

10V

2KX

-5G

P

OPS

C9104

SC

D1U

10V

2KX

-5G

P

OPS

12

R9102

243R

2F-2

-GP

OPS

R9102

243R

2F-2

-GP

OPS

12

R9104

1K33

R2F

-GP

OPS

R9104

1K33

R2F

-GP

OPS12

C9111

SC

1U6D

3V3K

X-2

GP

OPS

C9111

SC

1U6D

3V3K

X-2

GP

OPS

VDDQA1

DQU5 A2

DQU7 A3

DQU4 A7

VDDQA8

VSS A9

VSSQ B1

VDDB2

VSS B3

DQSU# B7

DQU6 B8

VSSQ B9

VDDQC1 DQU3 C2

DQU1 C3

DQSU C7

DQU2 C8

VDDQC9

VSSQ D1

VDDQD2

DMUD3

DQU0 D7

VSSQ D8

VDDD9

VSS E1

VSSQ E2

DQL0 E3

DMLE7VSSQ E8

VDDQE9

VDDQF1

DQL2 F2

DQSL F3

DQL1 F7

DQL3 F8

VSSQ F9VSSQ G1

DQL6 G2

DQSL# G3

VDDG7

VSS G8

VSSQ G9

VREFDQH1

VDDQH2

DQL4 H3

DQL7 H7

DQL5 H8

VDDQH9

NC#J1 J1

VSS J2

RAS#J3

CKJ7

VSS J8

NC#J9 J9

ODT K1

VDDK2

CAS#K3

CK#K7

VDDK8

CKEK9

NC#L1 L1

CS# L2

WE#L3

A10/APL7

ZQL8

NC#L9 L9

VSS M1

BA0M2

BA2M3

A15M7

VREFCAM8

VSS M9

VDDN1

A3N2

A0N3

A12/BC#N7

BA1N8

VDDN9

VSS P1

A5P2

A2P3A1P7

A4P8

VSS P9

VDDR1

A7R2

A9R3

A11R7

A6R8

VDDR9

VSS T1

RESET# T2

A13T3

NC#T7 T7

A8T8

VSS T9

VRAM7


VRAM7


12

C9109

SC

1U6D

3V3K

X-2

GP

OPS

C9109

SC

1U6D

3V3K

X-2

GP

OPS

VDDQA1

DQU5 A2

DQU7 A3

DQU4 A7

VDDQA8

VSS A9

VSSQ B1

VDDB2

VSS B3

DQSU# B7

DQU6 B8

VSSQ B9

VDDQC1 DQU3 C2

DQU1 C3

DQSU C7

DQU2 C8

VDDQC9

VSSQ D1

VDDQD2

DMUD3

DQU0 D7

VSSQ D8

VDDD9

VSS E1

VSSQ E2

DQL0 E3

DMLE7VSSQ E8

VDDQE9

VDDQF1

DQL2 F2

DQSL F3

DQL1 F7

DQL3 F8

VSSQ F9VSSQ G1

DQL6 G2

DQSL# G3

VDDG7

VSS G8

VSSQ G9

VREFDQH1

VDDQH2

DQL4 H3

DQL7 H7

DQL5 H8

VDDQH9

NC#J1 J1

VSS J2

RAS#J3

CKJ7

VSS J8

NC#J9 J9

ODT K1

VDDK2

CAS#K3

CK#K7

VDDK8

CKEK9

NC#L1 L1

CS# L2

WE#L3

A10/APL7

ZQL8

NC#L9 L9

VSS M1

BA0M2

BA2M3

A15M7

VREFCAM8

VSS M9

VDDN1

A3N2

A0N3

A12/BC#N7

BA1N8

VDDN9

VSS P1

A5P2

A2P3A1P7

A4P8

VSS P9

VDDR1

A7R2

A9R3

A11R7

A6R8

VDDR9

VSS T1

RESET# T2

A13T3

NC#T7 T7

A8T8

VSS T9

VRAM8


VRAM8


12

C9110

SC

1U6D

3V3K

X-2

GP

OPS

C9110

SC

1U6D

3V3K

X-2

GP

OPS

12

C9101

SC

D1U

10V

2KX

-5G

P

OPS

C9101

SC

D1U

10V

2KX

-5G

P

OPS

12

C9108

SC

1U6D

3V3K

X-2

GP

OPS

C9108

SC

1U6D

3V3K

X-2

GP

OPS

12

C9102

SC

D1U

10V

2KX

-5G

P

OPS

C9102

SC

D1U

10V

2KX

-5G

P

OPS

12

C9106

SC

1U6D

3V3K

X-2

GP

OPS

C9106

SC

1U6D

3V3K

X-2

GP

OPS

12

R9101

243R

2F-2

-GP

OPS

R9101

243R

2F-2

-GP

OPS

12

C9105

SC

1U6D

3V3K

X-2

GP

OPS

C9105

SC

1U6D

3V3K

X-2

GP

OPS 12

C9112

SC

1U6D

3V3K

X-2

GP

OPS

C9112

SC

1U6D

3V3K

X-2

GP

OPS

12

R91031K

33R

2F-G

P

OPS

R91031K

33R

2F-G

P

OPS

12

C9113

SC

D01

U50

V2K

X-1

GP

OPS

C9113

SC

D01

U50

V2K

X-1

GP

OPS

12

C9103

SC

D1U

10V

2KX

-5G

P

OPS

C9103

SC

D1U

10V

2KX

-5G

P

OPS


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PWR_VGA_CORE_LGATE1

PWR_VGA_CORE_LGATE2

VGA_CSP1_R

PWR_VGA_CORE_THRM

PWR_VGA_CORE_IMON

VGA_CSN2_R

PWR_VGA_CORE_PN2

VGA_CSP2_R

VGA_CSP2_R PWR_VGA_CORE_CSP2

PWR_VGA_CORE_SLEW

PWR_VGA_CORE_IMON

PW

R_V

GA

_CO

RE

_PC

NT

VGA_CSN2_R

PWR_VGA_CORE_VBST2

PWR_VGA_CORE_OSRSEL

PWR_VGA_CORE_CSP1

PW

R_V

GA

_CO

RE

_CS

N1

PWR_VGA_CORE_VID1

VGA_VREF_L

PWR_VGA_CORE_PN1

PWR_VGA_CORE_VREF

PWR_VGA_CORE_VR_ON

PWR_VGA_CORE_VID2

PWR_VGA_CORE_VID6

PW

R_V

GA

_CO

RE

_CS

P1

PWR_VGA_CORE_VID3

PWR_VGA_CORE_VID5PWR_VGA_CORE_VID4

PWR_VGA_CORE_VID0

PWR_VGA_CORE_VBST1

PWR_VGA_CORE_SLP

PWR_VGA_CORE_VREF

PWR_VGA_CORE_CSN2

PW

R_V

GA

_CO

RE

_CS

P2

VGA_CSN1_R

PWR_VGA_CORE_THRM_R

PWR_VGA_CORE_LL1

PW

R_V

GA

_CO

RE

_VB

ST1

PWR_VGA_CORE_V5FILT

VGA_VBST1_R

VGA_VBST2_R

PWR_VGA_CORE_TRIPSEL

PWR_VGA_CORE_CSN1

PWR_VGA_CORE_DROOP

PW

R_V

GA

_CO

RE

_VR

EF

PWR_VGA_CORE_V5FILT

PWR_VGA_CORE_GFBPWR_VGA_CORE_VFB

VGA_CSP1_R

PW

R_V

GA

_CO

RE

_CS

N2

VGA_CSN1_R

PWR_VGA_CORE_VREFPWR_VGA_CORE_V5FILT

PWR_VGA_CORE_VBST2

PWR_VGA_CORE_UGATE1

PWR_VGA_CORE_UGATE2

DGPU_PWROK

PWR_VGA_CORE_LL2

PWR_VGA_CORE_THAL#

PWR_VGA_CORE_TER1

PWR_VGA_CORE_TER2

PWR_VGA_CORE_AGND

PWR_VGA_CORE_AGND

PWR_VGA_CORE_AGND

PWR_VGA_CORE_AGND

PWR_VGA_CORE_AGND

PWR_DCBATOUT_VGA_CORE

PWR_VGA_CORE_AGND

5V_S0

PWR_VGA_CORE_AGND

PWR_VGA_CORE_AGND

DCBATOUT PWR_DCBATOUT_VGA_CORE

PWR_DCBATOUT_VGA_CORE

VGA_CORE

VGA_CORE

3D3V_VGA_S0

3D3V_VGA_S0

3D3V_VGA_S0

3D3V_VGA_S0

3D3V_VGA_S0

NVGND_SENSE83

DGPU_PWROK 22,93

NVVDD_SENSE83

NV_VID586NV_VID486

NV_VID186NV_VID286NV_VID386

NV_VID086

Title


Date: Sheet of


SD

TPS51728_VGA_CORE


<Doc>

<Core Design>

Title


Date: Sheet of


SD

TPS51728_VGA_CORE


<Doc>

<Core Design>

Title


Date: Sheet of


SD

TPS51728_VGA_CORE


<Doc>

<Core Design>

SSID = PWR.Plane.Regulator_GFX

Q1: Id=11A, Qg=10~14nC,

Rdson=7.5~9.8 mohm

Q2: Id=23A, Qg=27~38nC,

Rdson=1.7~2.1 mohm

Panasonic. 0.36uH 10*11.5*4

DCR=1.1mohm

Idc=17A, Isat=24A

2nd source

PU9202

PU9206

Main source

84.03606.037FDMS3606S-GP-U

84.03606.037FDMS3606S-GP-U

BOM control

DY DY63.10334.1DL DY

63.10334.1DL

63.10334.1DL

N13P-GS71.0N13P.00U

63.10334.1DL

63.10334.1DL

0.875VVID[6:0]0110010

63.10334.1DL

DY

DY

0.9VVID[6:0]=0110000

0.975VVID[6:0]=0101010

63.10334.1DL

DY

63.10334.1DL

DY

DY

N13M-GS71.0N13M.E0U

N13P-GL71.0N13P.B0U

0.9VVID[6:0]=0110000

DY

63.10334.1DL

DY

DY

63.10334.1DL

DY

63.10334.1DL

63.10334.1DL

N13M-GE171.0N13M.C0U

PR9215

PR9230

PR9217

PR9232

PR9218

PR9233

NVVDDBoot Voltage

NV_VID1

NV_VID3

NV_VID4

1 2PR9237 0R0402-PADPR9237 0R0402-PAD

12

PG

9211

GA

P-C

LOS

E-P

WR

-3-GP

PG

9211

GA

P-C

LOS

E-P

WR

-3-GP

12

PC9211

SC

10U25V

5KX

-GP

OPSPC9211

SC

10U25V

5KX

-GP

OPS

1 2PG9203

GAP-CLOSE-PWR-3-GP

PG9203

GAP-CLOSE-PWR-3-GP

12

PC9202

SC

D01U

50V2K

X-1G

P

OPSPC9202

SC

D01U

50V2K

X-1G

P

OPS

12

PT9201

ST330U

2VD

M-4-G

P

OPSPT9201

ST330U

2VD

M-4-G

P

OPS

12

PC9212

SC

10U25V

5KX

-GP

OPSPC9212

SC

10U25V

5KX

-GP

OPS

1 2PG9201

GAP-CLOSE-PWR-3-GP

PG9201

GAP-CLOSE-PWR-3-GP

12

PR92540R0402-PADPR92540R0402-PAD

1 2PR9222 0R0402-PADPR9222 0R0402-PAD

12

PC9201

SC

D01

2U25

V2K

X-G

P

OPS

PC9201

SC

D01

2U25

V2K

X-G

P

OPS

12P

C92

21S

C33

0P50

V2K

X-3

GP

DY

PC

9221

SC

330P

50V

2KX

-3G

P

DY

12

PR

9215

10K

R2J

-3-G

P

OPS

PR

9215

10K

R2J

-3-G

P

OPS

12

PC9210

SC

D01U

50V2K

X-1G

P

OPSPC9210

SC

D01U

50V2K

X-1G

P

OPS

12

PR

9235

10K

R2J

-3-G

P

OPS

PR

9235

10K

R2J

-3-G

P

OPS

1 2PR9243 11K8R2F-GPOPSPR9243 11K8R2F-GPOPS

1 2

PC9206SCD1U50V3KX-GPOPS


12

PR92489K09R2F-GP

OPS

PR92489K09R2F-GP

OPS

12

PC9218

SC

D01

2U25

V2K

X-G

P

OPS

PC9218

SC

D01

2U25

V2K

X-G

P

OPS

12

PR

9234

10K

R2J

-3-G

P

DY

PR

9234

10K

R2J

-3-G

P

DY

1

234

567

8

910

PU9206

FDMS3600-02-RJK0215-COLAY-GP84.03606.037

PU9206

FDMS3600-02-RJK0215-COLAY-GP84.03606.037

12


12


OPS


OPS

1 2

PL9201

COIL-D36UH-5-GP

OPSPL9201

COIL-D36UH-5-GP

OPS

12

PR922810KR2J-3-GPPR922810KR2J-3-GP

12

PR

9219

10K

R2J

-3-G

P

OPS

PR

9219

10K

R2J

-3-G

P

OPS

12


DY


DY

12

PR9204NTC-150K-GP

OPSPR9204NTC-150K-GP

OPS

12

PR

9229

10K

R2J

-3-G

P

OPS

PR

9229

10K

R2J

-3-G

P

OPS

12

PR

9232

10K

R2J

-3-G

P

OPS-BOM CTRL

PR

9232

10K

R2J

-3-G

P

OPS-BOM CTRL

12

PR

9247

42K

2R2F

-L-G

P

OPS

PR

9247

42K

2R2F

-L-G

P

OPS

1 2PR9236 0R0402-PADPR9236 0R0402-PAD

12P

C92

24S

C33

0P50

V2K

X-3

GP

DY

PC

9224

SC

330P

50V

2KX

-3G

P

DY

12

PR92422D2R3J-2-GP

DY

PR92422D2R3J-2-GP

DY

12

PC9219

SC

220P50V

2KX

-3GP

OPSPC9219

SC

220P50V

2KX

-3GP

OPS

1 2PR9226 0R0402-PADPR9226 0R0402-PAD

12

PR92122D2R3J-2-GP

DY

PR92122D2R3J-2-GP

DY

1 2

PR925030K9R2F-GP

OPS

PR925030K9R2F-GP

OPS

12

PR

9240

NTC

-150

K-G

P

OPS

PR

9240

NTC

-150

K-G

P

OPS

1 2PG9205

GAP-CLOSE-PWR-3-GP

PG9205

GAP-CLOSE-PWR-3-GP

PU 1

GND 2

GFB7

VFB8

THRM 9

THAL# 10

IMON 11

SLP12

PCNT13

VID614 VID515VID416 VID317VID218 VID119 VID020

VBST229

LL2 28

V5IN26

PGND 25

LL1 23

VBST122

VREF40

V5FILT38

SLEW37

TONSEL 36

EN35

PG# 34PGD 33OSRSEL 32

TRIPSEL 31

GND 41

DROOP 39

DRVH1 21

DRVH2 30

DRVL1 24

DRVL2 27

CSP16

CSN15

CSP23

CSN24

PU9201

TPS51728RHAR-GPOPS

PU9201

TPS51728RHAR-GPOPS

12


OPSPC9220SC3300P50V2KX-1GP

OPS

12

PR92110R0402-PADPR92110R0402-PAD

1 2PC9217 SC3300P50V2KX-1GPOPSPC9217 SC3300P50V2KX-1GPOPS

1 2PR9223 0R0402-PADPR9223 0R0402-PAD

1 2PR9227 0R0402-PADPR9227 0R0402-PAD

12


DY


DY

12

PR

9217

10K

R2J

-3-G

P

OPS-BOM CTRL

PR

9217

10K

R2J

-3-G

P

OPS-BOM CTRL

1 2PC9214 SCD22U10V2KX-1GP

OPS

PC9214 SCD22U10V2KX-1GP

OPS

1 2PG9202

GAP-CLOSE-PWR-3-GP

PG9202

GAP-CLOSE-PWR-3-GP

12

PR

9214

10K

R2J

-3-G

P

DY

PR

9214

10K

R2J

-3-G

P

DY

12

PC9204

SC

10U25V

5KX

-GP

OPSPC9204

SC

10U25V

5KX

-GP

OPS

12

PR

9238

NTC

-150

K-G

P

OPS

PR

9238

NTC

-150

K-G

P

OPS

1 2

PL9202

COIL-D36UH-5-GP

OPSPL9202

COIL-D36UH-5-GP

OPS

12

PR

9208

0R2J

-2-G

P

DY

PR

9208

0R2J

-2-G

P

DY

1 2PR92490R0402-PADPR92490R0402-PAD

1 2PR9244

2KR2F-3-GP

OPSPR9244

2KR2F-3-GP

OPS

1 2

PR920130K9R2F-GP

OPS

PR920130K9R2F-GP

OPS

12

PT9202

ST330U

2VD

M-4-G

P

OPSPT9202

ST330U

2VD

M-4-G

P

OPS

1 2PR9221 0R0402-PADPR9221 0R0402-PAD

12

PR920376K8R2F-GP

OPS

PR920376K8R2F-GP

OPS

12

PR

9246

76K

8R2F

-GP

OPS

PR

9246

76K

8R2F

-GP

OPS

1 2PR9256 10KR2J-3-GP

OPS

PR9256 10KR2J-3-GP

OPS

1 2PR9225

2D2R2J-GPOPS

PR9225

2D2R2J-GPOPS

1 2PG9204

GAP-CLOSE-PWR-3-GP

PG9204

GAP-CLOSE-PWR-3-GP

1 2PR9239 0R0402-PADPR9239 0R0402-PAD

1 2PR9258 0R0402-PADPR9258 0R0402-PAD

12

PR921356R2J-4-GPOPS

PR921356R2J-4-GPOPS

1

234

567

8

910

PU9202

FDMS3600-02-RJK0215-COLAY-GP84.03606.037

PU9202

FDMS3600-02-RJK0215-COLAY-GP84.03606.037

12


12


12

PR

9218

10K

R2J

-3-G

P

OPS-BOM CTRL

PR

9218

10K

R2J

-3-G

P

OPS-BOM CTRL

1 2PR9241 0R0402-PADPR9241 0R0402-PAD

12

PR

9233

10K

R2J

-3-G

P

OPS-BOM CTRL

PR

9233

10K

R2J

-3-G

P

OPS-BOM CTRL

12

PR

9216

10K

R2J

-3-G

P

DY

PR

9216

10K

R2J

-3-G

P

DY

1 2

PR92092D2R2J-GP

OPS

PR92092D2R2J-GP

OPS

1 2PR9257 0R0402-PADPR9257 0R0402-PAD

12

PR

9220

10K

R2J

-3-G

P

DY

PR

9220

10K

R2J

-3-G

P

DY

12

PR92070R0402-PAD

PR92070R0402-PAD

1 2PC9209 SC2D2U10V3KX-1GP

OPS

PC9209 SC2D2U10V3KX-1GP

OPS

1 2PG9206

GAP-CLOSE-PWR-3-GP

PG9206

GAP-CLOSE-PWR-3-GP

12

PR

9210

0R2J

-2-G

P

DY

PR

9210

0R2J

-2-G

P

DY

1 2



12

PR9253124KR2F-GP

OPS

PR9253124KR2F-GP

OPS

12

PR

9230

10K

R2J

-3-G

P

DY

PR

9230

10K

R2J

-3-G

P

DY

12

PR920242K2R2F-L-GP

OPSPR9202

42K2R2F-L-GP

OPS

12

PR

9231

10K

R2J

-3-G

P

OPS

PR

9231

10K

R2J

-3-G

P

OPS

1 2PR9224 0R0402-PADPR9224 0R0402-PAD

12P

C92

23S

C33

0P50

V2K

X-3

GP

DY

PC

9223

SC

330P

50V

2KX

-3G

P

DY

12

PC9203

SC

10U25V

5KX

-GP

OPSPC9203

SC

10U25V

5KX

-GP

OPS

12P

C92

22S

C33

0P50

V2K

X-3

GP

DY

PC

9222

SC

330P

50V

2KX

-3G

P

DY

1 2PC9208 SC2D2U10V3KX-1GPOPS

PC9208 SC2D2U10V3KX-1GPOPS

12PR9255

0R0402-PADPR9255

0R0402-PAD

12

PT9203

ST330U

2VD

M-4-G

P

OPSPT9203

ST330U

2VD

M-4-G

P

OPS


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

3.3V_RUN_VGA_1

DG

PU

_PW

R_E

N

3.3V_ALW_1RUNON_R_1

RUNON_R

DIS_EN_1D5_RUN_R

DGPU_PWROK_R

DG

PU

_PW

RO

K#

DG

PU

_PW

RO

K#

DIS

_FB

VD

D_L

DIS

_1D

05V

_NV

_L

DIS_EN_1D5_RUN

RUNON_R_2RUNON_R

DCBATOUT_RUN

DGPU_PWROK# DGPU_PWROK_R

RUN_ENABLE_1

3D3V_S0

3D3V_VGA_S0

1D5V_S3 1D5V_VGA_S0

3D3V_S0

1D05V_VTT 1D05V_VGA_S0

1D5V_VGA_S0

1D05V_VGA_S0

DCBATOUT

RUN_ENABLE

3D3V_VGA_S0

3D3V_S0

DGPU_PWR_EN#18

DGPU_PWROK22,92

Title


Date: Sheet of


SD

DISCRETE VGA POWER

A3


LA480

<Core Design>

Title


Date: Sheet of


SD

DISCRETE VGA POWER

A3


LA480

<Core Design>

Title


Date: Sheet of


SD

DISCRETE VGA POWER

A3


LA480

<Core Design>

+3VS to 3.3V_DELAY Transfer

AO4468, SO-8Id=11.6A, Qg=9~12nCRdson=17.4~22m ohm

1D5V_VGA_S0

3.6A

check layout

1.05V to 1.05V_VGA_S0 Transfer

12

R93075K1R2F-2-GP

OPS

R93075K1R2F-2-GP

OPS

12

TC9301SE330U2D5VDM-1GPOPS

TC9301SE330U2D5VDM-1GPOPS

1 2

R9317

10KR2J-3-GPOPS

R9317

10KR2J-3-GPOPS

12345

678 S

SSGD

DDD

U9301

AO4494L-GP84.04494.037

OPS2nd = 84.04168.037

SSSGD

DDD

U9301

AO4494L-GP84.04494.037

OPS2nd = 84.04168.037

1 2R9301 0R5J-5-GP

DY

R9301 0R5J-5-GP

DY

1 2R93150R2J-2-GPOPS

R93150R2J-2-GPOPS

12

R931275R2F-2-GP

OPS

R931275R2F-2-GP

OPS

12345

678 S

SSGD

DDD

U9302

AO4468-GP84.04468.037

2nd = 84.08882.037OPS

SSSGD

DDD

U9302

AO4468-GP84.04468.037

2nd = 84.08882.037OPS

12

C9308SCD1U16V2KX-3GPOPS


1 2PR9315

10KR2J-3-GP

DY

PR9315

10KR2J-3-GP

DY

G

S DQ9303NDS0610-NL-GP

2ND = 84.00610.C3184.S0610.B31

OPS

Q9303NDS0610-NL-GP

2ND = 84.00610.C3184.S0610.B31

OPS

12

R9304100R2J-2-GP

OPS

R9304100R2J-2-GP

OPS

12


DYC9309

SCD1U16V2KX-3GP

DY1

2R9302100KR2J-1-GPOPS

R9302100KR2J-1-GPOPS

12

R9306100KR2J-1-GP

OPS

R9306100KR2J-1-GP

OPS1 2

R930830KR2F-GPOPS

R930830KR2F-GPOPS

1 2R93100R2J-2-GPOPS

R93100R2J-2-GPOPS 1

2


DY


DY

1 2 3456

Q93082N7002KDW-GP

OPS

Q93082N7002KDW-GP

OPS

G

S

D

Q9305

2N7002K-2-GP

2ND = 84.2N702.J31OPS

84.2N702.J31

Q9305

2N7002K-2-GP

2ND = 84.2N702.J31OPS

84.2N702.J31

1 2R931430KR2F-GPOPS

R931430KR2F-GPOPS

1 2R93130R2J-2-GP

DYR93130R2J-2-GP

DY

1 2R9305330KR2J-L1-GPOPS

R9305330KR2J-L1-GPOPS A

K

D9301MMPZ5239BPT-GP83.9R103.D3FOPS

D9301MMPZ5239BPT-GP83.9R103.D3FOPS

D

G

S

Q9302AO3419L-GP84.03419.031

3rd = 84.03334.0312nd = 84.00048.031

OPS

Q9302AO3419L-GP84.03419.031

3rd = 84.03334.0312nd = 84.00048.031

OPS

1 2R93160R2J-2-GPDY

R93160R2J-2-GPDY

12

R931175R2F-2-GP

OPS

R931175R2F-2-GP

OPS

12



1 2 3456

Q93012N7002KDW-GP

2nd = 84.2N702.A3FOPS

84.2N702.A3F

Q93012N7002KDW-GP

2nd = 84.2N702.A3FOPS

84.2N702.A3F

G S

DQ93042N7002K-2-GP

2ND = 84.2N702.J31

OPS

84.2N702.J31

Q93042N7002K-2-GP

2ND = 84.2N702.J31

OPS

84.2N702.J31

12

C9310SCD1U50V3KX-GPOPS


12

R931810KR2J-3-GPOPS

R931810KR2J-3-GPOPS

1 2R93035K1R2F-2-GPOPS

R93035K1R2F-2-GPOPS

12


OPS


OPS

1

2

34

5

6

Q9309

2N7002KDW-GP

OPS

Q9309

2N7002KDW-GP

OPS

12




5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of

LA480 SD

<Title>


A4


<Core Design>

Title


Date: Sheet of

LA480 SD

<Title>


A4


<Core Design>

Title


Date: Sheet of

LA480 SD

<Title>


A4


<Core Design>

BLANK


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


LA480 SD

ReservedA4


<Core Design>

Title


Date: Sheet of


LA480 SD

ReservedA4


<Core Design>

Title


Date: Sheet of


LA480 SD

ReservedA4


<Core Design>

BLANK


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


LA480 SD

TOUCH PANELA4


<Core Design>

Title


Date: Sheet of


LA480 SD

TOUCH PANELA4


<Core Design>

Title


Date: Sheet of


LA480 SD

TOUCH PANELA4


<Core Design>

BLANK


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PS_S3CNTRL

CO

RE

_RU

NP

WR

PS_S3CNTRL

GF

X_R

UN

PW

R

PS_S3CNTRL

1D8V

_RU

NP

WR

PS_S3CNTRL

VT

T_R

UN

PW

R

PS_S3CNTRL

3D3V

_RU

NP

WR

PS_S3CNTRL

5V_R

UN

PW

R

PS_S3CNTRL

1D05

V_R

UN

PW

R

1D5V

_RU

NP

WR

PM_SLP_S4

AD+

VCC_CORE

1D05V_VTT

1D8V_S0VCC_GFXCORE

3D3V_S0 5V_S0

VCCSA 1D5V_S33D3V_S5

3D3V_AUX_KBC ODD_PWR_5V 5V_S53D3V_AUX_S5 3D3V_VGA_S0 VCC_CORE3D3V_S0_CAMERADCBATOUT

5V_USB2_S3 5V_USB1_S3

DCBATOUT VCCSA

PM_SLP_S4#19,27,46

PS_S3CNTRL36,37

XDP_DBRESET# 5,19H_CPUPWRGD 5,22PLT_RST# 5,18,27,31,36,65,66,71,80,82,83

Title


Date: Sheet of


LA480 SD

UNUSED PARTS/EMI CapacitorsA3


<Core Design>

Title


Date: Sheet of


LA480 SD



<Core Design>

Title


Date: Sheet of


LA480 SD



<Core Design>

CPU Plate VGA Std-Off

14" Structure boss

For Discharge

MINI PCIE

12

R9709100R2J-2-GP

DY

R9709100R2J-2-GP

DY

12

EC9725

SC

D1U

25V2K

X-G

P

EC9725

SC

D1U

25V2K

X-G

P

12

EC9717

SC

D1U

25V2K

X-G

P

DYEC9717

SC

D1U

25V2K

X-G

P

DY

12

EC9711

SC

D1U

25V2K

X-G

P

EC9711

SC

D1U

25V2K

X-G

P

1

H16HOLET157B276R134-GPZZ.SCREW.091


12

EC9712

SC

D1U

25V2K

X-G

P

DYEC9712

SC

D1U

25V2K

X-G

P

DY

1

H21STF237R128H42-1-GP

34.4GD01.001

H21STF237R128H42-1-GP

34.4GD01.001

G

SDQ9710

2N7002A-7-GP

DY

Q97102N7002A-7-GP

DY

12

EC9733

SC

D1U

25V2K

X-G

P

DYEC9733

SC

D1U

25V2K

X-G

P

DY

12

R9710100KR2J-1-GP

DY

R9710100KR2J-1-GP

DY

12

EC9715

SC

D1U

25V2K

X-G

P

DYEC9715

SC

D1U

25V2K

X-G

P

DY

12

R9711100R2J-2-GP

DY

R9711100R2J-2-GP

DY

12

EC9721

SC

D1U

25V2K

X-G

P

DYEC9721

SC

D1U

25V2K

X-G

P

DY

1



12

EC9732

SC

D1U

25V2K

X-G

P

DYEC9732

SC

D1U

25V2K

X-G

P

DY

12

EC9713

SC

D1U

25V2K

X-G

P

EC9713

SC

D1U

25V2K

X-G

P

12

EC9705

SC

D1U

25V2K

X-G

P

EC9705

SC

D1U

25V2K

X-G

P

1

H7HOLE355X355R111-S1-GPZZ.00PAD.571


12

R9702100R2J-2-GP

DY

R9702100R2J-2-GP

DY

12

EC9720

SC

D1U

25V2K

X-G

P

DYEC9720

SC

D1U

25V2K

X-G

P

DY

12

EC9708

SC

D1U

25V2K

X-G

P

DYEC9708

SC

D1U

25V2K

X-G

P

DY

G

SDQ9707

2N7002A-7-GP

DY

Q97072N7002A-7-GP

DY

12

R9706100R2J-2-GP

DY

R9706100R2J-2-GP

DY

12

EC9707

SC

D1U

25V2K

X-G

P

EC9707

SC

D1U

25V2K

X-G

P

12

EC9706

SC

D1U

25V2K

X-G

P

DYEC9706

SC

D1U

25V2K

X-G

P

DY G

SDQ9705

2N7002A-7-GP

DY

Q97052N7002A-7-GP

DY12

EC9722

SC

D1U

25V2K

X-G

P

DYEC9722

SC

D1U

25V2K

X-G

P

DY

12

EC9729

SC

D1U

25V2K

X-G

P

EC9729

SC

D1U

25V2K

X-G

P

G

SDQ9706

2N7002A-7-GP

DY

Q97062N7002A-7-GP

DY

12

EC9703

SC

D1U

25V2K

X-G

P

EC9703

SC

D1U

25V2K

X-G

P

12

EC9723

SC

D1U

25V2K

X-G

P

DYEC9723

SC

D1U

25V2K

X-G

P

DY

12

EC9730

SC

1KP

50V2K

X-1G

P

EC9730

SC

1KP

50V2K

X-1G

P

1

H18STF256R89H178-GP34.4B417.001

H18STF256R89H178-GP34.4B417.001

G

SDQ9704

2N7002A-7-GP

DY

Q97042N7002A-7-GP

DY

12

EC9704

SC

D1U

25V2K

X-G

P

DY

EC9704

SC

D1U

25V2K

X-G

P

DY

12

EC9731

SC

D1U

25V2K

X-G

P

DYEC9731

SC

D1U

25V2K

X-G

P

DY

1

H8HOLE335R115-GPZZ.00PAD.D01


1



12

EC9709

SC

D1U

25V2K

X-G

P

DYEC9709

SC

D1U

25V2K

X-G

P

DY

12

R9704100R2J-2-GP

DY

R9704100R2J-2-GP

DY

1H5HOLE315X315R91-S1-GPZZ.00PAD.581


G

SDQ9709

2N7002A-7-GP

DY

Q97092N7002A-7-GP

DY

1



12

EC9719

SC

D1U

25V2K

X-G

P

DYEC9719

SC

D1U

25V2K

X-G

P

DY

1

H19HOLE315R95-GPZZ.00PAD.911


1



12

EC9714

SC

D1U

25V2K

X-G

P

DYEC9714

SC

D1U

25V2K

X-G

P

DY

12

EC9728

SC

D1U

25V2K

X-G

P

EC9728

SC

D1U

25V2K

X-G

P1

H2STF237R128H42-1-GP

34.4GD01.001


34.4GD01.001

12

R9707100R2J-2-GP

DY

R9707100R2J-2-GP

DY

12

EC9718

SC

D1U

25V2K

X-G

P

DYEC9718

SC

D1U

25V2K

X-G

P

DY

1


34.4GD01.001


34.4GD01.001

12

EC9724

SC

D1U

25V2K

X-G

P

DYEC9724

SC

D1U

25V2K

X-G

P

DY

G

SDQ9711

2N7002A-7-GP

DY

Q97112N7002A-7-GP

DY

1



12

EC9727

SC

D1U

25V2K

X-G

P

EC9727

SC

D1U

25V2K

X-G

P

12

EC9702S

CD

1U25V

2KX

-GP

EC9702S

CD

1U25V

2KX

-GP

1



1



12

EC9726

SC

D1U

25V2K

X-G

P

EC9726

SC

D1U

25V2K

X-G

P

1



12

R9705100R2J-2-GP

DY

R9705100R2J-2-GP

DY

G

SDQ9701

2N7002A-7-GP

DY

Q97012N7002A-7-GP

DY

12

EC9716

SC

D1U

25V2K

X-G

P

DYEC9716

SC

D1U

25V2K

X-G

P

DY

12

EC9710

SC

D1U

25V2K

X-G

P

EC9710

SC

D1U

25V2K

X-G

P

G

SDQ9702

2N7002A-7-GP

DY

Q97022N7002A-7-GP

DY

1



12

R9701100R2J-2-GP

DY

R9701100R2J-2-GP

DY


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


LA480 SD

Change HistoryA4


<Core Design>

Title


Date: Sheet of


LA480 SD

Change HistoryA4


<Core Design>

Title


Date: Sheet of


LA480 SD

Change HistoryA4


<Core Design>

(Blanking)


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


LA480 SD

Change HistoryA2


<Core Design>

Title


Date: Sheet of


LA480 SD

Change HistoryA2


<Core Design>

Title


Date: Sheet of


LA480 SD

Change HistoryA2


<Core Design>

SLP_A#SLP_A#

Wake Event

SLP_S5#(TEST POINT)

PM_SLP_S5#SLP_S5#

PM_SLP_S4#SLP_S4#

Vcc_WLAN +3V_MINI_WLAN

PWROK/APWROK S0_PWR_GOOD

SLP_LAN#

CL_ RST# CL_ RST#

Minimum duration of PWRBTN# assertion = 16mS

SLP_A#

S0

1D5V_S0VDDQ

PM_DRAM_PWRGD

VccCore

IMVP7_PWRGD

VCC_GFXCOREVccAXG

3D3V_AUX_S5

S5

(S5-to-S0-to-S5)Intel-Power Sequence

PM_PWRBTN#

S5

PM_PWRBTN#PWRBTN#

Intel PCHPin Name

Main board PCHPin Name

3D3V_AUX_S5VccSUS (5V/3V )

SLP_LAN# SLP_LAN#

SLP_S4#

SLP_S3#

T09 >30us ( SLP_S5# t0 SLP_S4# )

T10 >30us ( SLP_S4# t0 SLP_S3# )

VccASW/VccSPI

VccASW/VccSPI

PM_SLP_S3#SLP_S3#

IMVP_PWRGD

T29 >0s ( VccSUS to VccASW )

VccASW/VccSPI

+3V_MINI_WLAN

S0_PWR_GOOD T11 >1ms ( VccASW to APWROK )

CL_ RST#(TEST POINT) T12 >500Us ( APWROK to CL_RST# )

1D8V_S0

VCCPLL 1D8V_S0

1D5V_S0

VCCSA

T13 >5ms<650ms ( VCCPLL to UNCOREPWRGOOD )

T17 >2ms<650ms ( VDDQ to DRAMPWROK )

T17 >2ms<650ms ( VCCSA to DRAMPWROK )

SYS_PWROK

IMVP_PWRGD

VCC_CORE

D85V_PWRGD

S0_PWR_GOOD

VCCSA VCCSA

D85V_PWRGDIMVP7_VR_EN

VCC_CORE

VCC_GFXCORE

SYS_PWROK SYS_PWROK

PWROK S0_PWR_GOOD

PM_DRAM_PWRGDDRAMPWROK

VR_VDDQPWRGOOD VDDPWRGOOD

VDDPWRGOOD

H_CPUPWRGD

H_CPUPWRGDUNCOREPWRGOOD

PLT_RST#

PLT_RST#PLTRST#

T25 >1ms<100ms ( UNCOREPOWERGOOD to PLTRST# )

T12 >100ms ( APWROK to PLTRST# )

T17 >2ms<650ms ( VCCPLL to DRAMPWROK )

T20 >100ms ( PWROK to UNCOREPWRGOOD)

Tn >30us(PLTRST# to UNCOREPOWERGOOD )

Ta >30us ( SLP_S4# t0 SLP_S5# )

Tb >30us ( SLP_S3# t0 SLP_S4# )

Tc >40ns (APWROK# to VCCASW/VCCSPI)

Te >0s ( SLP_A# to APWROK )

Tf <500ms (SLP_3# to VCCCORE/VCCAWG)

Tk >100ns (DRAMPWROK to SLP_S4# )

Wake Event

SLP_S5#(TEST POINT)

SLP_LAN#

SLP_A#

S0

PM_DRAM_PWRGD

3D3V_AUX_S5

(S3-to-S0-to-S3)

PM_PWRBTN#

S3

SLP_S4#

SLP_S3#

VccASW/VccSPI

+3V_MINI_WLAN

S0_PWR_GOOD

CL_ RST#(TEST POINT)

1D8V_S0

1D5V_S0

VCCSA

SYS_PWROK

IMVP_PWRGD

VCC_CORE

D85V_PWRGD

S0_PWR_GOOD

VCC_GFXCORE

VDDPWRGOOD

H_CPUPWRGD

PLT_RST#

S3

T11 >1ms ( VccASW to APWROK )

T12 >500Us ( APWROK to CL_RST# )

T25 >1ms<100ms ( UNCOREPOWERGOOD to PLTRST# )

T20 >100ms ( PWROK to UNCOREPWRGOOD)

T12 >100ms ( APWROK to PLTRST# )

T13 >5ms<650ms ( VCCPLL to UNCOREPWRGOOD )

Tc >40ns (APWROK# to VCCASW/VCCSPI)

Te >0s ( SLP_A# to APWROK )

Tf <500ms (SLP_3# to VCCCORE/VCCAWG)

Tn >30us(PLTRST# to UNCOREPOWERGOOD )


A

A

B

B

C

C

D

D

E

E

4 4

3 3

2 2

1 1

Title


Date: Sheet of


LA480 SD

Power Block DiagramA3


<Core Design>

Title


Date: Sheet of


LA480 SD



<Core Design>

Title


Date: Sheet of


LA480 SD



<Core Design>

42,43,44

4Charger

BQ24707ARGRR

Adapter

Battery

TPS51225RUKR

PU4201TPS51640RSLR

VCC_CORE

PU4501TPS51219

DCBATOUT

PU4601RT8207MZQW

0D75V_S0DDR_VREF_S3

AO4407A

+PBATT

VCC_GFXCORE 1D5V_S31D05V_VTT

5V_S5 3D3V_S53D3V_AUX_S5 5V_AUX_S5

U3602AO4468-GP

3D3V_S03D3V_AUX_KBC

R2707

5V_USB4_S3

U6102UP7534BRA8

1D8V_VGA_S0

PU4701RT8068AZQW

Q9302DMP2130L

3D3V_VGA_S0

PU9201TPS51728RHAR

VGA_CORE

G5285T11U

LCDVDD

93

0

2 2 3

39

473641

-4

U3601AO4468-GP

5V_S0

49

-3

46

41

61

40

-2

-2 -1

6

38

45

36

1

HDMI

CRT

HDD

ODD

FAN

TouchPad Audio_Codec

R5607

withuot

F5101

R2802

R6903

R5606

R2903

R5603

R2913R2904

56

Camera

LCD

Fingerprint

Bluetooth

Cardreader

WLAN

LAN

R4922

F4902

R6403

R6301

R6512

R8202

R6516

F4901

F4903

D85V_PWRGD RUNPWROK PM_SLP_S4# 0D75V_EN3D3V_VGA_S0

DGPU_PWROK

Q3103AO3419L

3D3V_LAN_S5

LAN_PWR_ON

RUNPWROK

PM_SLP_S3#

U4901SY6288CAAC

IMVP_PWRGD PWR_GFX_PWRGD1.05VTT_PWRGD

5

U9302AO4494L(MOS)

1D05V_VGA_S0

U9301AO4494L(MOS)

1D5V_VGA_S0

93

PU4801TPS51461RGER

0D85V_S0

1.05VTT_PWRGD

VCCSA

D85V_PWRGD

4892

R6010

60

3D3V_SPI

RUNPWROK

-1

-1


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


LA480 SD

SMBUS Block DiagramA2


<Core Design>

Title


Date: Sheet of


LA480 SD



<Core Design>

Title


Date: Sheet of


LA480 SD



<Core Design>

SML0CLK

SML0DATA

SML0_CLK

SML0_DATA

BQ24707SCL

SDA

CRT_DDC_DATA

CRT_DDC_CLK

LVDS_DDC_CLK_R

LVDS_DDC_DATA_R

SRN10KJ-5-GP

SRN4K7J-8-GP

TPDATA

TPCLK

5V_S0

‧

‧‧

TouchPad Conn.TPDATA

TPCLKGPIO37/PSCLK1

GPIO35/PSDAT1

GPU

LCD CONN

PCH SMBus Block Diagram

PCH

SMBCLK

SMBDATA

KBC

I2C_CLK

Thermal ICSMCLK

SMDATA

3D3V_S0

‧

SRN2K2J-1-GP

3D3V_S5

‧

‧‧

SRN2K2J-1-GP

3D3V_S0

2N7002KDW

‧

‧‧

I2C_DAT

SML1_CLK

SML1_DATASML1DATA

SML1CLK

BAT_SCL

BAT_SDA

PCH_SMBCLK

PCH_SMBDATA

TPDATA

TPCLK

CRT_DDC_CLK

CRT_DDC_DATA

MinicardWLANSMB_DATA

SMB_CLK

GPIO17/SCL1/N2TCK

GPIO22/SDA1/N2TMS

SMBus Address:A0

SMBus Address:A4

DIMM 1SCL

SDA

3D3V_AUX_KBC

‧

DIMM 2SCL

SDA

SMB_CLK

SMB_DATA

PCH_SMBCLK

PCH_SMBDATA

BATA_SCL_1

BATA_SDA_1

KBC SMBus Block Diagram

Battery Conn.

PCH_SMBDATA

PCH_SMBCLK

‧‧

‧

3D3V_S0

SRN2K2J-1-GP

NPCE855

SRN33J-3-GP

L_DDC_DATA

L_DDC_CLK CLK

DATA

MinicardW-WANSMB_DATA

SMB_CLK

PCH_SMBDATA

PCH_SMBCLK

3D3V_S5

‧

SRN2K2J-1-GP

‧‧

GPIO74/SDA2

GPIO73/SCL2

2N7002KDW

‧

SMBC_THERM

SMBD_THERM

3D3V_S5

‧

SRN10K2J-1-GP

‧‧

3D3V_S0

‧‧

‧‧

2N7002DW-1-GP

‧

‧

3D3V_S0

SRN2K2J-1-GP

CRT_DDCCLK_CON

CRT_DDCDATA_CON CRT CONN

5V_S0

‧

SRN10KJ-6-GP

3D3V_S0

2N7002DW-1-GP

‧

‧

3D3V_S0

SRN2K2J-1-GP

CRT_DDCCLK_CON

CRT_DDCDATA_CON HDMI CONN

5V_S0

‧

SRN10KJ-6-GP

3D3V_S0

SDVO_CTRLCLK

SDVO_CTRLDATA PCH_HDMI_DATA

PCH_HDMI_CLK ‧‧

‧‧

‧‧

SRN2K2J-8-GP

3D3V_S5

‧

CPU

PEG_RXP0~15PEG_RXN0~15PEG_TXP0~15PEG_TXN0~15

PEG_RX0~15PEG_RX#0~15

PEG_RT#0~15PEG_TX0~15

PEG_RX0~15PEG_RX#0~15

PEG_RT#0~15PEG_TX0~15

I2CS_SDA

I2CS_SCL

2N7002DW-1-GP

3D3V_VGA_S0

SMBC_Therm_NV

SMBD_Therm_NV

SRN4K7J-8-GP

‧‧

‧

‧

‧‧

SRN33J-5-GP


A

A

B

B

C

C

D

D

E

E

1 1

2 2

3 3

4 4

Title


Date: Sheet of


LA480 SD

Thermal/Audio Block DiagramCustom


<Core Design>

Title


Date: Sheet of


LA480 SD



<Core Design>

Title


Date: Sheet of


LA480 SD



<Core Design>

OTZ2N7002

THERM_SYS_SHDN#S

D

GIMVP_PWRGD

PURE_HW_SHUTDOWN#

VR

3V/5VENPGOD

OTZ

T8

PH

FAN CONTROL

PAGE28

VIN

VSET

FA

N1_

DA

C

GPIO94

5V

VOUT

FAN VIN

TACH

GPIO56

FA

N_T

AC

H1

P2793

DigitalMIC

Put under CPU(T8 HW shutdown)

P2800_DXP

P2800_DXN

DMIC_CLK/GPIO1

DMIC0/GPIO2

THRMDC

THRMDA

VGA

MMBT3904-3-GP

Place near CPUPWM CORE

Audio Block Diagram

Codec

92HD79B1HP

OUT

MIC

IN

SPEAKER

HP0_PORT_A_L

HP0_PORT_A_R

VREFOUT_A_OR_F

MMBT3904-3-GP

TDR

TDLKBCNPCE795P

GPIO5

GPIO92

SYS_THRM

CPU_THRM

GPIO4 TDRVGA_THRM

PAGE28

PAGE28

PAGE27

Place near GPU(DISCRETE only).

HP1_PORT_B_L

HP1_PORT_B_R

AnalogMIC

PORTC_L

PORTC_R

VREFOUT_C

SPKR_PORT_D_L-

SPKR_PORT_D_R+

Thermal Block Diagram

UMAThermalP2800

DXP

DXN

MMBT3904-3-GP

VGAThermal P2800

DXP

DXN

P2800_VGA_DXP

P2800_VGA_DXN

SC2200P50V2KX-2GPSC2200P50V2KX-2GP

SC2200P50V2KX-2GP


5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title


Date: Sheet of


LA480 SD

Change HistoryA4


<Core Design>

Title


Date: Sheet of


LA480 SD

Change HistoryA4


<Core Design>

Title


Date: Sheet of


LA480 SD

Change HistoryA4


<Core Design>

(Blanking)


Intel PCH(Panther Point) UMA & Optimus Schematics ...

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Transcript of Intel PCH(Panther Point) UMA & Optimus Schematics ...