Flip Chip Interconnection using Anisotropic Conductive Adhesives for RF and High Frequency Applications

Myung-Jin Ym, In ho Jung, Hyung-Kyu Choi, Kijoong Kim, Jim-Sang Hwang and Jin-Yong Ahn ACAE Dept., Telephus, Inc.

25-1 I, Jang-dong, Yusong-gu,, Taejon 305-701, Korea Tel.: +82-42-866-1461, Fax: +82-42-866-1308, E-mail: mjyim@telephus.com

Woonseong Kwon and Kyung Wook Paik Dept. of Materials Science & Engineering, KAIST

373-1, Kusong-dong, Yusong-gu, Taejon 305-701, Korea Tel.: +82-42-869-3335, Fax: +82-42-869-33 10, E-mail: wskwon@kaist.ac.kr

Abstract Anisotropic conductive adhesives have been considered

and evaluated as promising interconnect materials for flip chip assembly in the applications for low cost, high-density and high speed interconnection packages.

In this paper, we have evaluated and compared several flip chip interconnects using anisotropic conductive adhesives at RF and high frequency range. The performances of high- speed circuits are limited by package interconnect discontinuity doe to large inductance and resistance in the high frequency range. This discontinuity is determined by the interconnection geomehy and materials used. For bumps on the IC, Au stud, Au electroplated and electroless Ni/Au were used, and for the interconnection adhesives, two kinds of ACFs with different dielectric constant were used.

The high kequency measnrements were performed on the test flip chip vehicles using different bonding materials to evaluate high frequency model parameters based upon ACF flip chip model and network analysis.

We applied these ACFs flip chip technologies to the assemblies of passive device using RF IPD (Integrated Passive Device) and active device using RF active MMIC device on RF module to demonstrate real applications of ACF interconnection at RF and high frequency range, and compared the results with those of flip chip assembles using conventional methods such as solder ball interconnection.

The reliability of ACF flip chip interconnects was also investigated by various environmental tests, such as thermal cycling test (-55 OC/+125 "C, 1000 cycle), high temperature humidity test (85 'C/85%RH, 1000 hours) and high temperature storage test (150 OC, dry condition) to evaluate the effect of environmental attacks on the electrical stability of ACF flip chip assemblies.

1. Introduction Recently, demands for wireless communications and radar

systems with !%lly-integrated RF devices in broadband operation range are increasing in the electronics indushy. The performance of high speed device and system are limited by discontinuity of package interconnect influenced by geometry, material and joint mechanism of package interconnects. For the 1" level package technology between chip and substrate, three bonding technologies are mostly available; wire-

bonding, Tape automated bonding (TAB) and flip chip hondmg technologies.

Flip chip technology has been well known as one of solutions to meet today's packaging needs of semiconductor and high speed device to be miniaturization of package size as well as reduction in interconnection distances resulting in a high performance at RF and high frequency applications. There are many altematives in the process, materials, and interconnection methods for making flip chip assemblies such as solder, gold and conductive adhesive. Although flip chip assembly using solder balls is in the main stream of flip chip technology, flip chip assembly using conductive adhesives such as isotropic conductive adhesives (ICAs) and anisotropic conductive adhesives (ACAS) has been gaining much attention and thought as solder altematives for their advantages compared with soldered bumps [l] - 131. Some advantages of ACA flip chip assembly are ( I ) lower processing temperature (epoxy curing less than 150 "C compared with 240 "C solder reflowing temperature). (2) finer pitch interconnect (less than 50 pitch possible), (3) lower cost due to less processing steps, and (4) green process (no lead, fluxes, and cleaning solvents).

Especially, flip-chip assemblies using Anisotropic conductive film (ACFs) are already successfully implemented in the mass production of reliable assemblies such as Chip- On-Glass (COG), ChipOn-Film (COF) for displays and Chip-On-Board (COB) for low cost manufacturing.

This trend are expected to continne also in the area of high frequency application where low cost, high reliable and line- pitch flip chip interconnection methods are required such as RF IC's, RF U0 Tags, RF Integrated Passive Devices (IPD), Fast memories, and etc in a type of FCP (Flip Chip in Package) and DCA (Direct Chip Attach).

In this paper, we investigated the high frequency characteristics of flip chip interconnect using ACF in terms of bump metallurgy and ACF material property, and evaluated the electrical performance of ACF flip chip package in RF and high frequency range by demonstration of flip chip assemblies using real ICs of RF MMIC and RF IPD module. 2. Experiments

2. I ACF Marerials The required material properties of ACFs for reliable flip

chip assembly in high frequency application are low CTE

0-7803-7991 -5/03/$17.00 02003 IEEE. 1398 2003 Electronic Components and Technology Conference

(Coeffecient of Thermal Expansion), high modulus, low dielectric constant, etc [4]. We formulated and prepared two ACF materials with silica filler contents of 0 wt?? and 30 wi%. The ACFs were manufactured by mixing process for solution of fillers, liquid epoxy resin, and a hardener. and coating process and slitting process.

The cured ACF samples were prepared by placing the adhesive mixture in a convection oven at 150 "C for 30 min and cutting with 0.6 mm thick dimension for the thenno- mechanical characterization such as dynamic mechanical analysis (DMA) and thermo-mechanical analysis (TMA) test. The dielectric properties of ACF samples was also measured in high frequency range of IO MHz to 1.8 GHz. The samples for measurement of AC dielectric properties were disc shaped and both electrodes of the samples were prepared using Au evaporation method.

2.2 Bump formaiion It is necessary to form bumps on the WOs of the test chip

to be interconnected on the substrate using ACF materials. At fust, the gold stud bumps with 60 pm height were

formed on each WO pad of test chips using a modified wire bonding machine. The bump has an acute tail, as shown in the figure 1 (a), to provide good metal to metal contact during thermal compression. As another bump, NdAu bumps with 20 pm height were formed on each U0 of the chip by electroless plating method as shown in the figure 1 (b).

Fig. 1. Scanning electron microscopy of (a) Au stud bumps and (b) electroless NdAu bumps formed on AI pads of test chip.

2-3. Flip Chip Assembly using ACF There are three process steps for the flip chip assembly

using ACF materials as shown in the figure 2. First, the bumps on the chip and the WO pads on the test substrates were aligned. And then the ACF was attached on the substrate and the release film was removed. Finally, bonding pressure of 100 MPa and temperature of 180 "C for 20 seconds was applied to bond the chip on the substrate. Thus the chip is electrically connected to the substrate via conductive particles or duect contact of bumps on substrate pad.

ACF Lan6natwn on Flip chip Bondiug colnpm substrate

Fig. 2. Schematic of flip chip bonding process using ACF.

2-4. High Frequency Measurement of Flip Chip Interconnect using ACF

To measure high fiequency characteristics of ACF flip- chip interconnect, we extracted the impedance parameters of interconnects by test method based on previous studies [5], [6]. The test chip with 20-pm width microstrip and 3.3 mmx 3.3 mm chip area was fabricated using a I-poly and 3- metal 0.6 p Si process. The microstrip structures were fabricated with Inverted Embedded Microstrip (EM) structure for miniiizimg parasitic due to orientation and ground impedance.

Two kmds of ACF with different dielectric constant were used as an interconnection material and test chips with two different bumps of Au stud and electroless NUAu bump were used in preparation of test vehicle to investigate the effect of dielectric property of ACF and hump metallurgy on impedance parameters of ACF flip chip interconnects.

The measurement of S-parameters and impedance parameter extraction of the ACF flip chip interconnects were performed using HP8510 network analyzer and cascade prohe system in the frequency range of 200 M H z - 20 GHz.

2-5. ACF Flip Chip Assemblies by Functional IC 2-5-1. IC Assembly for RF IPD (Integrated Pawive Device)

An RF IPD is assembled using electroless NdAu hump and the ACF flip chip method on organic substrate for one of real functional ICs in RF and high frequency range. For the RF If'Ds, we used Telephus' 900 M H z and 1800 M H z lumped low pass filters of 0.9 mmX0.9 mm fabricated on thick oxide wafers using IO p Cu plating process [7], and evaluated their RF performances. For the comparison of RF performances, flip chip interconnects of same low pass filters using eutectic solder bump were also evaluated and compared. Figure 3(a) and (b) show the photograph of used low pass filter and its flip chip configuration.

2-5-2. IC Assembly for RFMMIC An RF MMIC is also assembled using Au stud hump and

the ACF flip chip method on glass substrate to demonstrate high performance and simple fabrication process of RF MMIC package. For an RF MMIC, Low Noise Amplifier (LNA) chip for PCS CDMA application fabricated using a 0.5 micron low noise E D GaAs MESFET process. Noise and gain properties were measured in the range of 1.7 - 2.1 GHz with test module configuration on glass as shown in the figure 3(c) and (d).

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(C) (d)

Fig. 3 Photographs of (a) RF IPDs, (b) RF IPD packaged by ACF flip chip method, (c) RF MMIC flip chip on glass substrate using ACF, and (d) RF MMIC module on glass.

2-5. Reliability Test

To investigate the reliability of ACF flip chip on an organic substrate, contact resistance of a single interconnect is the most important characteristic. The initial contact resistance was measured using a 4-point probe method and after each time interval, daisy chain resistance was measured during the completion of reliability tests. For the reliability test conditions, 85 "C/85%RH high humidity and temperatnre condition for 1000 hours, 150 Wdry high temperature/+ condition for 1000 hours, and -55 OC to 125 "C thermal cycling for 1000 cycles condition were adapted.

3-1. Material Characterization 3-1-1 CTE Measurement ofACFs

CTEs of ACF samples With different filler contents were measured using TMA (TA Instrument). Figure 4 shows that CTEs of the ACFs composite below the Tg (dcficction point of TMA curves), defmed as al, and the CTE above the Tg , defined as a2, decreased by addition of non-conductive filler. This decrease is preferred because the low CTE of ACFs is important parameters in improving the reliability of the ACF flip chip assembly.

3-1-2. Modulus Measurement ofACEs The figure 5 shows the variation of the storage (E? of two

ACFs with different filler content as a function of the temperatnre. The modulus of the ACF materials, particularly the storage modulus, increased as the content of silica increased at room temperature and decreased as the

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7

3. Results and Discussion

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Fig. 5. DMA curves of ACFs samples with different content fillers

temperaure increased. For undefiill materials of solder ball flip chip assembly, high modulus is needed to effectively redistribute the solder joints stress to the chip and substrate through the assembly warpage [SI. Similarily, since ACF materials assembled on an organic substrate must function as both underfill and electrical conductor, high modulus of ACF by adding high content of fillers is needed.

3-1-3. Dielectric Proper@ Measurement ofACFs Figure 6 shows the behavior of dielectric constant of

ACFs with different content of silica filler as a function of frequency. The dielectric constant decreases from 4.2 to 3.5 at 10 MHz, from 3.4 to 2.8 at 1.8 GHz with increasing Si02 concentration,from 0 to 40 wt%, equivalent to 25.6 vol.%. It is anticipated result that dielectric constant of ACF decreases based on composite theory [9]. For low dielectric constant is prefered as a interconnection material in high speed flip chip packages, the addition of non-conductive filler of low dielectric constant is needed in ACF formulation.

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1 I

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3-2. H i h Frequency Characteristics of ACF Flip Chip Interconnects 3-2-1. Effect ofACF's dielectricproperty

Effect of low dielectric filler addition on high frequency behavior of ACF was investigated. The extracted impedance model parameters of a 100 p x 100 pm bonding pad were presented in figure 7 for conventional ACF with conductive ball only, and ACF with conductive ball and Si02filler.

In ACF flip chip interconnect at high frequency, interconnection capacitance formed between CPW of PCB and the test chip pad is relatively high due to the high dielectric constant of the ACF resin and the large area, small gap of the parallel metal plate structure, compared with the solder hall flip chip structure. Therefore, the resonance frequency of the ACF flip chip interconnect is lower than that of the solder hall flip chip interconnect.

Both ACF have resonance frequencies, around 13 GHz for conventional ACF and 15 GHz for SO2 added ACF. This resonance phenomenon is dominantly affected by the inductance of conductive particle and capacitance of polymer matrix. In particular, capacitance of polymer matrix is induced hy the proximity effect of chip and substrate. Interestingly, ACF with Si02 has resonance frequency slightly higher than conventional ACF. ACF including SiOt filler exhibited the resonance phenomena around 15 GHz. This difference is originated from dielectric constant change of polymer matrix. By adding Si02 filler into ACF formulation, dielectric constant of polymer matrix in ACF was lowered according to the result of ACF's dielectric property and resulted ACF resonance shifted to higher frequency.

3-2-2. Effect of bump metullurgy Effect of bump metallurgy on high frequency behaviors of

ACF interconnects was investigated. Figure 8 shows the impedance parameters of Au stud bumped chip packaged by ACF method, and compared with NdAu bumped chip. As shown in the figure 8, Au stud bumped chip did not exhibit

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Fig. 7. Impedance parameters, resistance (R) of flip chip interconnect using electroless NUAu humped chip and two different ACFs in high kequency range

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5 10 15 a0 [GHzI

Fig. 8. Impedance parameters, resistance (R) of flip chip interconnect using ACF without silica and two different chips, electroless NdAu humped and Au stud bumped chip in high frequency range

resonant phenomena up to 20 GHz. This means that Au stud bumps maintain the constant impedance in high frequency range up to 20 GHz. Capacitive coupling of the Au-stud bump interconnect between chip and substrate is relatively low due to the large gap of epoxy resin and the small area in the parallel pad structure, compared to the ACF flip chip using NdAu bumped chip.

Consequently. the resonance frequency of the Au stud bump interconnects using ACF is higher than that of ACF flip chip interconnect using electroless NUAu hump, and was not ohserved up to 20 GHz.

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3-3. High Frequency Characteristics of ACF Flip Chip using functional ICs 3-3-1. IC Assembly for RF IPD (Integrated Passive Device)

Wafer scale CSP package, with solder ball flip chip is mostly used for RF IPD to he reduced form factor [lo]. Figure 9 shows the RF performances of 900 MHz and 1800 MHz lumped low pass filters of flip chip packaged by ACF and solder ball. In the figure 9(a) for 900 M H z low pass filter, insertion loss of the filter was ahout 0.517 dB by ACF flip chip and 0.658 dB by solder ball flip chip, respectively. This result shows that high frequency performance of RF IPD by both package method are almost similar and there is no degredation in high frequency characteristics of the RF IPD packaged by ACF. The similar performances in high frequency for 1800 MHz low pass filter are shown in Figure 9(b).

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(b) Fig. 9. RF performance of low pass filters; (a) 900 MHz filters and (b) 1800 M H z filters packaged by ACF (S2,l) and solder bump ball (S4,3).

3-3-2. IC Assembly for RF MMIC Figure 10 shows the RF performances of MMIC packaged

by ACF flip chip method in the view of gain and noise figure of LNA function for PCS downconverter. The solid circle and line corresponds to the measured gains, and solid square

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Fig. 10. The measured noise figure and gain of the RF MMIC packaged by ACF flip chip method.

and line correspond to the measured noise figure, respectively. The measured noise figure exhibits 2 - 2.5 dB from 1.8 - 2.0 GHz. The measured gain shows above 3 dB within same frequency range. This LNA chip was originally designed and fabricated to exhibit 1.5 dB for noise figure and 15 dB gain for 1.8 - 2.0 GHz in a form of MLF plastic package where wire bonding on lead fkune was used for electrical interconnection and plastic molding for protection. Although above LNA module for PCS application by ACF flip chip was not finally tuned for designed performance, this result shows that there was no functional degradation in the interconnection replaced by simple ACF flip chip method. Therefore, high frequency performance of ACF flip chip interconnect was successhlly demonstrated by the functional RF MMIC module.

3-4. Reliability Results We measured the electrical resistance change of all ACF

flip chip assemblies during each reliability test. Test chip is 9 mm X 16 mm and substrate is FR-4 with thickness of 1 mm. The measured electrical resistance is the sum of each VO's interconnect of the test assembly including all bump, circuit of test chip, and circuit of substrate.

Figure 11 show the electrical resistance behaviors during each reliability test. From the result of high temperature storage test at 150 OC, electrical resistance increased slightly, but withim acceptable range of 10% (Fig. ll(a)). We considered this increasing was caused by dimensional unstability above glass transition temperature of cured ACF, typically around 130 "C. But ACF flip chip assembly shows stable contact resistance behaviors that indicate sufficient durability under high temperaturehumidity condition (Fig. 11 (b)) and thermal cycle envirotment condition (Fig. 11 (c)). These result c o n f i i that electrical integrity of ACF flip chip assembly between chip, ACF and substrate is stable when exposed to moisture attack due to 85 OC/85%RH condition and thermal stress due to repeated expansion and shrinkage.

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The high Gequency characteristics of ACF flip chip interconnects were investigated by measurement of high frequency model parameters based upon ACF flip chip model and network analysis with the test vehicles using different bonding materials and bump metallurgies.

For the real application of ACF interconnection at RF and high frequency range, passive device using RF IPD and active device using RF active MMIC device on RF module were employed, and they showed good RF performances. The reliability of ACF flip chip interconnects showed stable durability of electrical resistance under various environmental tests.

We suggest ACF flip chip assembly as a simple and cost effective method for high frequency devices.

References 1. A. Tom, M. Takizawa, K. Sasahara “ Development of

Flip Chip Bonding Technology using Anisotropic Conductive Film”, in Proc. 9Ih International Microelectronics Conference, pp. 324 - 327, 1996

2. D. J. Williams et al., “Anisotropic Conductive Adhesives for Electronic Interconnection”, Soldering & Surface Mount Technologv, pp. 4 - 8,1993

3. J. Liu, A. Tolvgar4 J. Malmodm, and Z. Lai, “ A Reliable and Environmentally Friendly Packaging Technology-Flip Chip Joining Using Anisotropically Conductive Adhesive”, IEEE Trans. Camp. Packag., Manufact. Technol. Vol. 22,

4. M. J. Yim and K. W. Paik, “Effect of non-conducting filler additions on ACA properties and the reliability of ACA flip-chip on organic substrates”, IEEE Trans. Comp. Packag., Manufact. Technol. Vol. 24, No.1, pp. 24-32, 2001

5. R. Sihlbom, et al., “Conductive adhesives for high frequency applications”, IEEE Trans. Comp. Packag. Manufact. Technol., Vol. 21, No. 3, pp.469477, 1998

6. M. J.Yim, W.H.Ryu,Y.D. Jeon, J. H.Lee,S.Y.Ahn, J. H. Kim and K. W. Paik, “Microwave model of anisotropic conductive film flipchip interconnection for high frequency applications”, IEEE T r m . Camp. Packag., Manufact. Technol. Vol. 22, No. 4, pp.575-581, 1999

7. I. H. Jeong, et al., “High Quality RF Passive Integration using 35 mm Thick Oxide Manufacturing Technology”, in Proc. of 52nd Electronic Components and Technology Conference, San Diego, CA, May, 2002, pp. 1007 - 101 1

8. B. Jauregui-beloqui, J. C. Femandez-Garcia, A.C. Orgiles-

no. 2, pp.is6-190,1999

. . Fig. 11. Reliability results of ACF flip chip assembly from (a) 150 “C storage test for 1,300 hrs, 8SoC/85%RH test for 1,200 hrs, and (c)-55 “C - 125 ‘C for 1,000 cycles

Barcelo, M. M. Pastor-Blas and J.M. Martin-Martinez, ‘‘ Thermoplastic polyurethane-fumed silica composites: influence of the specific surface area of fumed silica on the viscoelastic and adhesion properties”, J Adhesion Sci. Technol., Vol. 13, No. 6, pp: 695 - 711, 1999

9. N. Jayasundere and B. V. Smith, “Permittivity for binary piezoelectric 0-3 composites,” J Appl. Phys., Vol. 73, No. 5 , pp.2462-2466,1993

The Electronics Industry Report 2002, pp. 148 - 149, F’rismark partners LLC

5. Conclusions In this paper, we have investigated high frequency

performances of several flip chip interconnects using anisotropic conductive adhesives at RF and high frequency range. First, we developed ACF materials having low dielectric constant, low CTE and high modulus suitable for

10.

high frequency flip chip application.

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