A LinuxONE III Story The IBM z15 Chip is Awesome - VM ...

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A LinuxONE III StoryMonte Bauman

LinuxONE Technical Support Specialist

IBM Columbus

[email protected]

June 2021

The IBM z15 Chip is Awesome

IBM LinuxONE

mailto:[email protected]

© 2021 IBM Corporation3

LinuxONE

INTRODUCTIONLet’s Get Started…


LinuxONE

AbstractThe z15 chips is awesome. What follows are 9.1 Billion reasons why.

Moore’s Law used to be awesome…. and sort-of still is.

§ “Atoms ain’t getting smaller” … and “the speed of light ain’t getting faster”• And hence Moore’s Law is “underperforming”

§ But the demand for ever bigger and faster computing systems remains• Consumers know what they want … they just don’t know what they are asking for

§ Computer scientists and engineers must meet design challenges in new ways• Bigger problems requires bigger thinking

§ The IBM Z chip and the platforms it powers ( IBM Z and LinuxONE ) have been “stepping up” to the challenge and this presentation will illustrate strides made in hardware and software to make the platform excel

The numbers, they do tell a tale. This talk will examine the evolution of CMOS microprocessor technology on the mainframe platform. We will examine the intriguing relationship between MIPS and MHz, and between transistors, chips, and cores. We will observe the past and current effects of “Moore’s Law”, and we will look at equations (yes, equations!) suggesting how to combat computer science physics. Microprocessor engineers have quite a challenge ahead, what will they think of next?


LinuxONE

Monte Bauman … [email protected]

IBM Technical Support Specialist - helping clients build risk mitigated operationally excellent economic server solutions.

• Monte Bauman helps client's design and deploy risk mitigated operationally excellent super-hyperconverged server solutions using IBM LinuxONE technologies provided by IBM and by the LinuxONE partner ecosystem.

• Monte Bauman, Certified IT Specialist and z Systems Technical Support Professional, began a career in IT in 1983 hiring into the IBM Glendale Lab where he assisted a development team to build and test mid-range mainframe servers (4300s, 9370s, 9221s). Monte was given a Division Award for work on STX/370, a diagnostic operating system. Monte Bauman became a Large Systems Systems Engineer (SE) in January of 1991 in Columbus Ohio working with enterprise clients specializing in 9021 systems support, enterprise printing support (3800/3900), and MVS support. In the mid 90's Monte Bauman became a mainframe seller for a time, before returning in late 90's to the role of a regionally designated specialist large systems SE. Monte Bauman became a "new workloads" specialist at the turn of the century, technically supporting customers as they embarked upon emerging technologies on the mainframe, such as Java and Business Intelligence and Linux. The past several years Monte Bauman has been focused on LinuxONE and Fit for Purpose analysis, helping customers understand the fit of z Systems Linux solutions as well as the processes appropriate to repeatedly and effectively map software to hardware meeting IT optimization criteria for requirements and cost.



LinuxONE

THE Z15 CORELet’s Get to the Core of this …


LinuxONE

z15Core


LinuxONE

z15Core

Pipeline5.2GHz

Instruction Pointer

Registers


LinuxONE

z15Core

De-code De-Order Re-Order

Instruction Pointer

PipelineDispatch

Registers

Out of Order

Instruction Execution


LinuxONE

z15Core


Instruction Pointer

PipelineDispatch

27Execution

Units

Registers

27 Execution

Units

Super-Scalar


LinuxONE

z15Core


Instruction Pointer

PipelineDispatch

27Execution

Units

Registers

L1256KB

Big & Smart Cache


LinuxONE

z15Core


Instruction Pointer

PipelineDispatch

27Execution

Units

Registers

L1256KB

L28MB

Big & Smart Cache

Big: Instruction

CacheBig: Data

Cache

Smart:Sophisticated

“cache associativity”

Smart:Software can provide tips to

the caches


LinuxONE

z15Core


Instruction Pointer

PipelineDispatch

27Execution

Units

Registers

L1256KB

L28MB

TLB

Multi-Threaded

TLBAddress

Translation Lookaside

Buffer

Caching Addresses


LinuxONE

z15Core

Load/Store UnitDe-code De-Order Re-Order

Instruction Pointer

Load/Store Unit

PipelineDispatch

27Execution

Units

Registers

L1256KB

L28MB

TLB

Super-Scalar

Instructions can be categorized

by function performed, and hardware can be optimized


LinuxONE

z15Core


Instruction Pointer

Fixed Point UnitFixed Point Unit

Load/Store Unit


PipelineDispatch

27Execution

Units

Registers

L1256KB

L28MB

TLBSuper-Scalar

Optimize hardware for

the most common

instructions


LinuxONE

z15Core

Branch Unit


Instruction Pointer


Branch Unit

Load/Store Unit


PipelineDispatch

27Execution

Units

Registers

L1256KB

L28MB

TLB

Super-Scalar

Branches kill pipelines …

Unless!


LinuxONE

z15Core

Branch Unit


Instruction Pointer

Fixed Point UnitFixed Point Unit Branch

HistoryTable

Branch Unit

Load/Store Unit


PipelineDispatch

27Execution

Units

Registers

L1256KB

L28MB

TLB

Branch Prediction

Cache Branch targets

Smartly influence caching

decisions


LinuxONE

z15Core

Branch Unit


Instruction Pointer


HistoryTable

Compression, Encryption (CPACF) & Sort

Branch Unit

Load/Store Unit


PipelineDispatch

27Execution

Units

Modulo Arithmetic Modulo Arithmetic

Registers

L1256KB

L28MB

TLB

Workload Accelerators

Encryption

Compression

Put tough software

problems in hardware

Sorting


LinuxONE

z15Core

Branch Unit


Instruction Pointer


HistoryTable


Branch Unit

Load/Store Unit


PipelineDispatch

SIMDUnit2X8

1

8

2

16


SIMD

Registers

L1256KB

L28MB

TLB

Single Instruction Multiple Data(aka Vector Processing)


LinuxONE

z15Core

Branch Unit


Instruction Pointer


HistoryTable


Branch Unit

Load/Store Unit


PipelineDispatch

Instruction Pointer

SIMDUnit2X8

1

8

2

16


Registers Registers

L1256KB

L28MB

TLB

Simultaneous Multi-Threading with 1 Thread

SMT1


LinuxONE

z15Core

Branch Unit


Instruction Pointer


HistoryTable


Branch Unit

Load/Store Unit


PipelineDispatch

Instruction Pointer

SIMDUnit2X8

1

8

2

16


Registers Registers

L1256KB

L28MB

TLB

Simultaneous Multi-Threading with 2 Threads

SMT2


LinuxONE

z15Core

Branch Unit


Instruction Pointer


HistoryTable


Branch Unit

Load/Store Unit


PipelineDispatch

Instruction Pointer

SIMDUnit2X8

BFUDFUDFxFPdVXxVXsVXpVXm



Registers Registers

IBM z Architecture

alive and well … hundreds of

new instructions

L1256KB

L28MB

New Instructions:20% more

throughput for general Java

workloads just from new instructions in

the z15 chip architecture TLB


LinuxONE

z15Core

Branch Unit


Retry

Instruction Pointer


HistoryTable


Branch Unit

Load/Store Unit


PipelineDispatch

Instruction Pointer

SIMDUnit2X8




Error detection

and instruction

retry

Dynamic core

sparing

Phone Home

100 years

++ MTBF

Registers Registers

L1256KB

L28MB

First failure data

capture

TLB


LinuxONE5.2GHz

Out of

Order

Super-Scalar

27 Execution

Units

Big & Smart Cache

Branch Prediction

SIMD

Workload Accelerators

SMT2

Multi-Threaded

TLB

2,250***MIPS*

z15Core

General Purpose Registers

Branch Unit


Retry

General Purpose Registers

Floating Point Registers

Control Registers

Processor Status Word

Instruction Pointer

L1 InstructionCache 128KB

L1 DataCache 128KB

L2 Instruction Cache 4MB Translation

LookasideBuffer


HistoryTable


L2 DataCache 4MB

Branch Unit

Load/Store Unit


Pipeline

DAT

DAT DAT

DAT

Dispatch

General Purpose RegistersGeneral Purpose Registers

Floating Point Registers

Control Registers

Processor Status Word

Instruction Pointer

SIMDUnit2X8




50 years ++

MTBF


LinuxONE

THE Z15 CHIP

Cores to Chips9 Billion Things to Like…


LinuxONE

z15Chip

9.1BTransistors


LinuxONE

z15ChipCore

12 Cores

Core

Core

Core

Core

Core

Core

Core

Core

Core

Core

Core


LinuxONE

z15Chip

L3128MB

L3128MB

L1/L2/L3Total

259MBcache

ECC-protected

cache arrays

More (much more) big & smart cache

Core

Core

Core

Core

Core

Core

Core

Core

Core

Core

Core

Core


LinuxONE

z15Chip

L3128MB

L3128MB

Open Standard

Compression Co-Processor

Core

Core

Core

Core

Core

Core

Core

Core

Core

Core

Core

CorezEDC Compressionand Asynch Data Mover


LinuxONE

L1/L2/L3Total

259MBcache

9.1BTransistors

12 Cores

ECC-protected

cache arrays

More (much more) big & smart cache

Compression Co-Processor

z15Chip

L3Chip

Cache128MB

L3Chip

Cache128MB

zEDC Compressionand Asynch Data Mover


LinuxONE

THE LINUXONE III DRAWERChips to Drawers


LinuxONE

ProcessorDrawer

Motherboard


LinuxONE

ProcessorDrawer

Chip Chip ChipChip

Up to 4 Chips(Sockets)

Per Drawer


LinuxONE

ProcessorDrawer

SCL4

960MBChip Chip ChipChip

SC / L49.7B

Transistors

More (lots more)Big Smart

Cache

StorageControl

Chip


LinuxONE

The 5th

DIMM is “RAIM”

backup for the other 4

ProcessorDrawer

SCL4

960MB

Memory DIMMs (5 of ‘em)


Chip Chip ChipChip

Up to 8TBUseable

RAIM RAM

RAIM: Redundant

Array of Independent

Memory

Failure-tolerant memory

subsystem

This is engineering!

(you don’t get to 50++ year MTBF without this


LinuxONE

PCIe Gen4

ProcessorDrawer

SCL4

960MB

PCIe Fanouts (Connectors) to other drawers



Chip Chip Chip Chip

FanoutsTo Sysplex Couplers

FanoutsTo Other

Processor or I/ODrawers


LinuxONE

Processor Drawer4 Chips

Per Drawer

SC / L49.7B

Transistors

FanoutsTo Sysplex Couplers

FanoutsTo Other

Processor and I/ODrawers

Motherboard

Up to 8TBUseable

RAIM RAM

More (lots more)Big Smart

Cache

ProcessorDrawer

StorageControl (SC)

and L4 Cache960MB

PCIeGen4

Fanout

PCIeGen4

Fanout

PCIeGen4

Fanout

PCIeGen4

Fanout

PCIeGen4

Fanout

SMPFabricA-Bus

SMPFabricA-Bus

SMPFabricA-Bus

SMPFabricA-Bus

Memory DIMMs

Memory DIMMs

Memory DIMMs

Memory DIMMs

z15 ChipL3ChipCache128MB

L3ChipCache128MB

zEDC Compression


L3ChipCache128MB

zEDC Compression


L3ChipCache128MB

zEDC Compression


L3ChipCache128MB

zEDC Compression

PCIeGen4

Fanout

PCIeGen4

Fanout

PCIeGen4

Fanout

PCIeGen4

Fanout

PCIeGen4

Fanout

PCIeGen4

Fanout

PCIeGen4

Fanout

Memory DIMMs

Memory DIMMs

Memory DIMMs

Memory DIMMs

Memory DIMMs

Memory DIMMs


LinuxONE

THE LINUXONE III CEC

Drawers to CECCEC: Central Electronics ComplexThe Processor Nest


LinuxONE

THE LINUXONE III LT1CEC

The Big Guy


LinuxONE

Processor Drawer

LT1 Model Drawers Cores Memory

(RAIM)Max34 1 1 to 34 Up to 8TB

Start at512GB RAIM


LinuxONE


(RAIM)

Max71 2 1 to 71 Up to 16TB Processor Drawer

Processor Drawer

Fully Interconnected

SMP Fabric


LinuxONE


(RAIM)

Max108 3 1 to 108 Up to 24TB

Processor Drawer

Processor Drawer

Processor Drawer


LinuxONE


(RAIM)

Max145 4 1 to 145 Up to 32TB

Processor Drawer

Processor Drawer

Processor Drawer

Processor Drawer


LinuxONE


(RAIM)

Max190 5 1 to 190 Up to 40TB

Processor Drawer

Processor Drawer

Processor Drawer

Processor Drawer

Processor Drawer

Scale to200,000

MIPS


LinuxONE

CEC: LinuxONE III LT1


(RAIM)

Max34 1 1 to 34 Up to 8TB


Max108 3 1 to 108 Up to 24TB

Max145 4 1 to 145 Up to 32TB

Max190 5 1 to 190 Up to 40TB

1 to 190 Cores 512GB

to 40TBRAIM


SMP Fabric

Scale to200,000

MIPS


LinuxONE

THE LINUXONE III LT2CEC

The Little Guy


LinuxONE

CEC: LinuxONE III LT2LT2

Model Drawers Cores Memory (RAIM)






1 to 65 Cores 256GB

to 16TBRAIM


SMP Fabric

Max04 Max13 Max21 Max31

Max65


LinuxONE

THE LINUXONE III RACK(S)Rack’em and Stack’em


LinuxONE

Following…

§ Following LinuxONE III LT1 server rack-buildout scenarios• and several LinuxONE III LT2 rack scenarios

§ They are examples§ They illustrate key concepts§ There are many more


LinuxONE

LinuxONE III LT1 Racks: Scenario 2 – iPDU Powered CPU Heavy

19” Rack A


LinuxONE


19” Rack A

Processor Drawer 1

Reserved

Reserved

To Assure Processing

Scale-ability, Reserve 1 or 2

Spaces for Future

Processor Drawers

Radiator Radiator


LinuxONE


19” Rack A

Processor Drawer 1

I/O Drawer1

Reserved

Reserved

Everything that happens next CAN BE non-disruptiveRadiator Radiator


LinuxONE


19” Rack A

Processor Drawer 1

I/O Drawer1

19” Rack Z

Reserved

Reserved

Radiator Radiator


LinuxONE


19” Rack A

Processor Drawer 1

I/O Drawer1

19” Rack Z

I/O Drawer2

Reserved

Reserved

Radiator Radiator


LinuxONE


19” Rack A

Processor Drawer 1

I/O Drawer1

19” Rack Z

I/O Drawer3

I/O Drawer2

Reserved

Reserved

Radiator Radiator


LinuxONE


19” Rack A

Processor Drawer 1

Processor Drawer 2

I/O Drawer1

19” Rack Z

I/O Drawer3

I/O Drawer2

Reserved

Radiator Radiator


LinuxONE


19” Rack A

Processor Drawer 1

Processor Drawer 2

I/O Drawer1

19” Rack Z

I/O Drawer6

I/O Drawer5

I/O Drawer4

I/O Drawer3

I/O Drawer2

Reserved

Radiator Radiator


LinuxONE


19” Rack A

Processor Drawer 1

Processor Drawer 2

I/O Drawer1

19” Rack Z

I/O Drawer6

I/O Drawer5

I/O Drawer4

I/O Drawer3

I/O Drawer2

19” Rack C

Reserved

Radiator Radiator


LinuxONE


19” Rack A

Processor Drawer 1

Processor Drawer 2

I/O Drawer1

19” Rack Z

I/O Drawer6

I/O Drawer5

I/O Drawer4

I/O Drawer3

I/O Drawer2

19” Rack C

I/O Drawer7

Reserved

Radiator Radiator


LinuxONE


19” Rack A

Processor Drawer 1

Processor Drawer 2

Processor Drawer 3

I/O Drawer1

19” Rack Z

I/O Drawer6

I/O Drawer5

I/O Drawer4

I/O Drawer3

I/O Drawer2

19” Rack C

I/O Drawer7 Radiator Radiator


LinuxONE


19” Rack A

Processor Drawer 1

Processor Drawer 2

Processor Drawer 3

I/O Drawer1

19” Rack Z

I/O Drawer6

I/O Drawer5

I/O Drawer4

I/O Drawer3

I/O Drawer2

19” Rack C

I/O Drawer11

I/O Drawer10

I/O Drawer9

I/O Drawer8

I/O Drawer7

Max’dOut

Config

Radiator Radiator


LinuxONE

THE SPECIAL SAUCEI’ll Have Fries with That!


LinuxONE

Computer Science Core Performance

Programming Instructions

Memory Instructions Cycles Seconds

CycleInstructionsWorkloadWorkload+ **

CPU Time (Seconds)

Workload= Fastest

Thread

Superscalar

Clock SpeedBig Smart Cache

Modern Powerful

Instruction Set


LinuxONE

Computer Science Workload Performance




CPU Time (Seconds)

Workload=

Synchronous I/O Wait in Seconds

Workload

Dispatch-able Wait Time in

Seconds

Workload+

Total Time (Seconds)

Workload=

CPU Time in Seconds

Workload+

Fastest Thread

Fastest Server

Fast I/O

Smart Software

Execution Threads


LinuxONE

Computer Science Core Performance




CPU Time (Seconds)

Workload=

SIMD

Mega-Cache

Up to 12 Instructions Per Cycle

5.2GHz High

Frequency

Fastest Thread

Transactional Memory

LZ Compression

Smart Cache

BranchPredict

Pause-less GC Hiperdispatch

Packed Decimal

Out of Order Execution

Huffman Compression

New Compiler

Instructions

Quad TLLB

Superscalar

CPACF

zLibCompression Co-Processor

Modulo Arithmetic

Asynchronous Data Mover

SORT Accelerator


LinuxONE

Computer Science Workload Performance




CPU Time (Seconds)

Workload=

Synchronous I/O Wait in Seconds

Workload

Dispatch-able Wait Time in

Seconds

Workload+

Total Time (Seconds)

Workload=

CPU Time in Seconds

Workload+

SMT2

SIMD Instructions

Mega-Cache

Up to 12 Instructions Per Cycle

5.2GHz High

Frequency

Fastest Thread

16GbpsFICON

Mega Memory

Transactional Memory

Fastest Server

WLM

LZ Compression

Smart Cache

BranchPredict

Pause-less GC

Compression

SMC-D SMC-R

zHyperlink 25GbpsOSA

Large SMPs

Hiperdispatch

Packed Decimal

Out of Order Execution

Huffman Compression

FlashExpress

Hyperswap

CF Duplexing

New Compiler

Instructions

Quad TLLB

Superscalar

CPACFEncryption

32GbpsFCP

IFLs

CPs

zIIPs

SAPs

IFP

SORTL

zLibCompression


LinuxONE

MIPS

§ Millions of Instructions Per Second

§ Mileage In-between Processing Systems

§ Meaningless Information Per Second

§ Meaningless Information Propagated by Sales-reps


LinuxONE

LSPR to the Rescue

§ https://www-01.ibm.com/servers/resourcelink/lib03060.nsf/pages/lsprindex?OpenDocument

§ Large Systems Performance Reference

• The IBM Large System Performance Reference (LSPR) ratios represent IBM's assessment

of relative processor capacity in an unconstrained environment for the specific benchmark

workloads and system control programs specified in the tables. Ratios are based on

measurements and analysis.

§ A Capacity Planning Resource

§ A Real(ish) set of Benchmarks for Mainframes

• Almost certainly the best set of benchmarks in the industry

§ zPCR – z Processor Capacity Reference – an Open Tool Full of LSPR Data & More

• https://www-03.ibm.com/support/techdocs/atsmastr.nsf/WebIndex/PRS1381

https://www-01.ibm.com/servers/resourcelink/lib03060.nsf/pages/lsprindex?OpenDocument

https://www-03.ibm.com/support/techdocs/atsmastr.nsf/WebIndex/PRS1381


LinuxONE

CMOS MIPSTORY


LinuxONE

9 CMOS Generations of IBM ZCORES and CHIPS and Drawers

Core: 278 > 443 > 600 > 990 > 1280 > 1650 > 1906 > 2020 > 2232Chip: 278 > 876 > 2317 > 3701 > 4833 > 9097 > 13627 > 17783 > 23414Server: 3804 > 11,391 > 23,716 > 43,426 > 68,410 > 103,699 > 154,904 > 195,496 > 240,718


LinuxONE

IBM Z Chip Capacity Metrics

Look how much more work we can do!

Look how much more work we do per cycle!!!


LinuxONE

IBM Z Chip Technology Metrics

Look how much more energy

efficient we are!


LinuxONE

Moore’s Law

§ https://en.wikipedia.org/wiki/Moore%27s_law

§ Moore's law is the observation that the number of transistors in a dense integrated circuitdoubles about every two years. The observation is named after Gordon Moore, the co-founder of Fairchild Semiconductor and CEO of Intel, whose 1965 paper described a doubling every year in the number of components per integrated circuit[2] and projected this rate of growth would continue for at least another decade.[3] In 1975,[4] looking forward to the next decade,[5] he revised the forecast to doubling every two years.[6][7][8

https://en.wikipedia.org/wiki/Moore%27s_law

https://en.wikipedia.org/wiki/Transistor

https://en.wikipedia.org/wiki/Integrated_circuit

https://en.wikipedia.org/wiki/Gordon_Moore

https://en.wikipedia.org/wiki/Fairchild_Semiconductor

https://en.wikipedia.org/wiki/Intel

https://en.wikipedia.org/wiki/Exponential_growth









LinuxONE

MOoRE ON MOORE’S LAW for MORE

§ n April 2005, Gordon Moore stated in an interview that the projection cannot be sustained indefinitely: "It can't continue forever. The nature of exponentials is that you push them out and eventually disaster happens." He also noted that transistors eventually would reach the limits of miniaturization at atomic levels:

§ In terms of size [of transistors] you can see that we're approaching the size of atoms which is a fundamental barrier, but it'll be two or three generations before we get that far—but that's as far out as we've ever been able to see. We have another 10 to 20 years before we reach a fundamental limit. By then they'll be able to make bigger chips and have transistor budgets in the billions.[100]

https://en.wikipedia.org/wiki/Gordon_Moore

https://en.wikipedia.org/wiki/Transistor

https://en.wikipedia.org/wiki/Atom



LinuxONE

IBM Z Chip Chip MIPS vs. Moore’s Law


LinuxONE

IBM Z Chip Powered Platform MIPS vs. Moore’s Law


LinuxONE

THE END IS INEVITABLEThe End is Near


LinuxONE

Scale Out• Execute up to 1 trillion secure web transactions per

day on a LinuxONE III server • Scale-out to 2.4 million Docker containers in a

LinuxONE III• Consolidate 100 x86 running https to 1 LinuxONE III • 20% TCO reduction over 5 years

IBM z15 Chip and LinuxONE III Holistic Performance

Competitive Results• Up to 2.3x more throughput running pgBench 9.6.1

read-only benchmark on PostgreSQL 11.1 vs. compared x86

• Up to 2.1x more throughput running YCSB 0.15 (write-heavy) benchmark on MongoDB 4.0.6 vs. compared x86

• Up to 2.8x more throughput running Cassandra-stress benchmark on ScyllaDB 2.3.1 vs. compared x86 platform

• Up to 2.6x more throughput running DayTrader 7 benchmark on WAS Liberty vs. compared x86

Data Compression• Compress up to 275 GB web data per second on a

LinuxONE III server • Up to 2.7x lower latency and up to 1.8x less CPU at 2.6x

less network bandwidth running NGINX web server on LinuxONE III using Integrated zEDC to compress before encryption (up to 30x lower latency and up to 28x less CPU when compared to software compression)

• Up to 27x faster Db2 LUW database backup using 30x less CPU time using Integrated zEDC vs. compared x86 with software compression. (up to 20x faster using 23x less CPU time vs. LinuxONE Emperor II)

• Up to 6.5x faster MongoDB database dump using 5.5x less CPU time using Integrated zEDC vs. compared x86 with software compression. (up to 5.4x faster using 5.4x less CPU time vs. LinuxONE Emperor II)

• 3.2x faster MongoDB Dump on encrypted btrfs on LinuxONE III using Integrated Accelerator for zEDCcompression versus compared x86 with software compression

Instant Recovery• Start 100 KVM guests, in parallel, 2.1x faster

on LinuxONE III LPAR versus using a compared x86

IBM Private Cloud and SSC• Run 2.4x more AcmeAir containers per core

deployed on ICP on LinuxONE III vs. compared x86• Scale-up AcmeAir on SSC4ICP to 12 IFLs with 79%

scaling efficiency on a LinuxONE III LPAR

Note: Client results will varyPlease see approved claims for details and disclaimers


LinuxONE

FavorableEconomicOutcomes

Risk Mitigation

Operational Excellence

Fewer Cores – More Capacity

Flexibility

Resilience Built-In

Security without Compromise

Investment ProtectionFewer Cores – Cheaper Software

Performance

Throughput Scalability

The z15 Chip is Awesome – and so are LinuxONE III Servers!


LinuxONE

The Last Page

Questions?Comments?Requests?

THANK YOU for your Time

[email protected]


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