Micromirrors for multiobject spectroscopy: optical and cryogenic characterization

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Micromirrors for multiobject spectroscopy: optical andcryogenic characterization

Severin Waldisa, Frederic Zamkotsianb, Patrick Lanzonib, Wilfried Noella, Nico de Rooija

aIMT, University of Neuchatel, Jaquet Droz 1, CH-2007 Neuchatel, SwitzerlandbLaboratoire d’Astrophysique de Marseille, 2 place Leverrier, F-13248 Marseille Cedex 4,

France

ABSTRACT

We are developing micromirror arrays (MMA) for future generation infrared multiobject spectroscopy (MOS)requiring cryogenic environment. So far we successfully realized small arrays of 5 × 5 single-crystalline siliconmicromirrors. The 100µm × 200µm micromirrors show excellent surface quality and can be tilted by electrostaticactuation yielding 20◦ mechanical tilt-angle. An electromechanical locking mechanism has been demonstratedthat provides uniform tilt-angle within one arc minute precision over the whole array. Infrared MOS requirescryogenic environment and coated mirrors, silicon being transparent in the infrared. We report on the influenceof the reflective coating on the mirror quality and on the characterization of the MMA in cryogenic environment.A Veeco/Wyko optical profiler was used to measure the flatness of uncoated and coated mirrors. The uncoatedand unactuated micromirrors showed a peak-to-valley deformation (PTV) of below 10nm. An evaporated 10nmchrome/50nm gold coating on the mirror increased the PTV to 35nm; by depositing the same layers on bothsides of the mirrors the PTV was reduced down to 17nm. Cryogenic characterization was carried out on acustom built interferometric characterization bench onto which a cryogenic chamber was mounted. The chamberpressure was at 10e-6 mbar and the temperature measured right next to the micromirror device was 86K. Themicromirrors could be actuated before, during and after cryogenic testing. The PTV of the chrome/gold coatedmirrors increased from 35nm to 50nm, still remaining in the requirements of < lambda/20 for lambda=1µm.

Keywords: micromirror, multiobject spectroscopy, MOEMS, mirror array, DRIE

1. INTRODUCTION

Multiobject spectrographs (MOS), installed in major telescopes around the world, help increasing the scientificefficiency of astronomical observations by recording simultaneously the spectra of hundreds of objects. MOSrequire a slit mask in the focal plane of the telescope for object selection. For observing remote source-spectrathe spectrographs have to work in the infra-red wavelengths, and, in order to avoid the emission of the “warm”elements at these wavelengths, the instrument must be able to work at cryogenic temperature inside cryostats forground-based instruments or in the space environment for space telescopes. In the framework of the studies onthe future European Extremely Large Telescope (E-ELT) we are developing a micromirror array (MMA) basedreflective slit-mask for object selection in cryogenic environment. Another MEMS solution, a micro-shutter basedslit mask, is being developed for the James Webb Space Telescope by Moseley et al. at NASA.1

By placing the programmable slit mask in the focal plane of the telescope, the light from selected objects isdirected toward the spectrograph (ON state), while the light from others objects and from the sky backgroundis sent back to space (OFF state). Using a MMA, any required slit configuration might be obtained with thecapability to match point sources or extended objects. The MMA enables the use of the so called “long slit”mode, which Astronomers use often with the classical slit mask. In long slit mode a longer slit than the actualsize of the studied objects is generated. This is used for the simultaneous recording of the spectrum of the objectand the nearby spectrum of the background; by subtracting the background spectrum , the pure spectrum of theobject is finally obtained.

Further author information:S.W.: E-mail: severin.waldis@unine.ch, Telephone: +41 32 720 55 71F.Z.: E-mail: frederic.zamkotsian@oamp.fr, Telephone: + 33 4 95 04 41 51

MOEMS and Miniaturized Systems VII, edited by David L. Dickensheets, Harald SchenkProc. of SPIE Vol. 6887, 68870B, (2008) · 0277-786X/08/$18 · doi: 10.1117/12.764381

Proc. of SPIE Vol. 6887 68870B-12008 SPIE Digital Library -- Subscriber Archive Copy

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AccV Spot Magn Det WD Eap I I 100 pm100 kV 6.0 199x SE 101 1 IMT-UNINE SAMLAB

Figure 1. Micromirrors for multiobject spectroscopy. (a) Concept of the micromirror device. (b-d) A system of multiplestopper beams have been introduced that provides uniform tilt-angle over the whole micromirror array. (e) Single mi-cromirror exhibiting the suspension and the stopper beams on the backside of the mirror. (f) Tilt-angle versus voltagemeasurement demonstrating the functionality of the stopper beams. In the case of the mirror with the stopper beams thetilt-angle remains stable within a large range of voltage, providing uniform tilt-angle. (g) Optical side of a 5 × 5 array ofmicromirrors. One micromirror is 100µm × 200µm in size. The fill factor along the direction of the frame is 98%.

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Stress in the thin-film [MPa]

Figure 2. Deformation of the micromirror in function of the stress in the 60nm-thick reflective coating.

Based on our simulations and measurements,2 we have fixed several parameters: In a first approach we setone micromirror per astronomical object, which corresponds to the baseline for NIRSpec. It is essential for thisinstrument to achieve a high optical contrast of at least 3000:1. The tilted micromirror is used for the ON positionand the rest position is considered as OFF. Hence the amount of parasitic light can be drastically minimizedthat comes from reflections and scattering of the frame surrounding the micromirrors and of the underneathelectrodes. A usable mechanical tilting angle must exceed 20◦. The mirror surface must remain flat in operationthroughout a large temperature range. The fill factor of more than 90% is essential, at least along the long slit.One micromirror element has to be at least 100µm × 200µm, in order to correspond with the plate scale of8m-class telescopes as well as future extremely large telescopes (ELT’s). The micromirror array has to work atcryogenic temperatures.

We developed and fabricated 5 × 5 micromirror arrays which fulfill above key requirements. Large arrays of200 × 100 micromirrors, which is considered as an usable arrays size for the use in a real system, are still underdevelopment. The results of the fabricated micromirror devices is summarized in Fig. 1 and presented earlier.3

The micromirrors are actuated electrostatically by an electrode located on a second chip, which is fabricatedseparately and assembled subsequently (Fig. 1). The micromirrors are made of single-crystalline silicon, assuringoptical flat surfaces. Silicon being transparent in the infrared range, a gold thin-film coating is deposited onthe topside of the mirrors. The cantilever-type suspension is made of a deposited poly-crystalline silicon layerdeposited on the back of the mirror. This hidden (or stacked) suspension enables high fill-factor and reducesstray light originating from the cantilevers that are bent in operation. A system of multiple stopper beamslocated on the mirror and on the frame provides precise and uniform tilt-angle. The tilt-angle is uniform withinone arcminute over a range of 15V of actuation voltage and over the whole array.

In this paper we focus on the optical quality of the mirrors, the effect of the optical coating and cryogenicenvironment required for infrared operation. We present the modeling as well as the measurement of the mirrordeformation at room temperature and in cryogenic environment.

2. MODELING OF MIRROR QUALITY

Due to its location at the focal plane of the spectrograph, the surface quality of each micro-mirror must be veryhigh, i. e. better than λ/20. In the ON position, any surface aberration will result in an image quality degradation

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Figure 3. Simulated thermal stress in the thin-film coating. The reference temperature is 300K. The inset shows the linearcoefficients of thermal expansion of gold4 and silicon5 in function of the absolute temperature.

on the detector of the spectrograph. The surface quality or flatness is characterized by the (local) roughness andthe topography (or deformation) of the surface. In this section we focus uniquely on the surface deformation,i.e. the peak-to-valley deformation δ∗. The maximum allowable peak-to-valley deformation is δ ≤ λ/20 withλ ≥ 1µm, thus we have an allowable “deformation budget” of 50nm. Intrinsically a mono-crystalline and polishedsilicon surface is supposed to be flat. There are a variety of factors that degrade the flatness of the micromirrorsurface and contribute to the deformation budget:

1. Initial non-uniformities of the silicon substrate due to polishing errors

2. Partial plastic deformation during fabrication

3. Stress at the interface between single-crystalline micromirror and poly-cristalline suspension

4. External stress coupled into the micromirror via the suspension

5. Intrinsic stress of the reflective layer on top of the mirror

6. Thermal stress due to the mismatch of the coefficient of thermal expansion (CTE) between silicon andreflective layer in cryogenic environment

7. Stress induced in the ON state of the micromirror by the stopper beams

The first factor depends on the choice of the substrate, factors two through four are process dependent andfactor seven depends on the design of the actuator and the operation condition. Measurements on the uncoatedfirst generation micromirrors for MOS showed a peak-to-valley deformation δ between 4nm and 8nm in operation.As this is a relative small amount of the total budget we focus hereafter uniquely on points 5 and 6, the influenceof the reflective coating.

∗The local roughness of a polished silicon wafer is around 1nm RMS and thus sufficiently smooth. During fabricationof the micromirrors, the surface of the mirror remains protected by the buried oxide of the silicon-on-insulator (SOI) waferand thus no defects are created.3

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The deformation of the substrate due to stressed thin film can be expressed to a good approximation byStoney’s formula:6

R ≈ 16σf

Esd2s

(1− υs)df(1)

where R is the resulting radius of curvature of the substrate, σf the stress in the thin film, Es Young’s modulusof the substrate, υs Poisson’s ratio of the substrate, ds the thickness of the substrate and df the thickness of thethin film. Eq. 1 is valid for ds >> df . The peak-to-valley deformation δ is obtained from the radius of curvatureR by a simple geometric relation:

δ = R(1− cos(ml

2R)) (2)

where ml is the length of the mirror. For infrared operation the reflective coating is an evaporated 60nm thinfilm consisting of a 10nm chrome adhesion layer and 50nm gold layer. Three different substrate thicknesses areconsidered: 5µm, 10µm and 15µm; Fig. 2 shows the plots of the peak-to-valley deformation versus the stress ina 60nm thin film for the different substrate thicknesses.

The intrinsic stress for an evaporated gold film is reported to be around 260 MPa and for very thin chromelayer 1.6 GPa (both from [6] and at room temperature). These values of the intrinsic stress depend stronglyon the thin film deposition system and the deposition parameters and consequently vary strongly in functionof the literature source. Therefore they are used here for estimation purpose only. We approach the yieldingintrinsic stress of the Cr/Au bilayer by taking the weighted average of the individual contributions of the twolayers: σi = (σCr + 5σAu)/6 ≈ 480MPa. Using Eqs. 1 and 2 gives a peak-to-valley deformation of about 33nmfor the 10µm substrate and about 15nm for the 15µm substrate, both at room temperature. The 5µm substratewould be deformed way beyond the maximum allowable peak-to-valley deformation of 50nm. Even though thechrome adhesion layer is very thin it adds a considerable amount of stress; chrome was chosen as adhesion layeras it is supposed to sustain the final HF vapor phase release step in the current fabrication process. However ina modified process, where the coating is applied as very last fabrication step, a titanium adhesion layer could beused instead. The intrinsic stress of very thin titanium films is reported to be near zero.6 The total intrinsic filmstress of a 10nm Ti/50nm Au bilayer would be then about 220MPa and the resulting deformation on the 10µmsubstrate 15nm at room temperature.

For predicting the mirror deformation at cryogenic temperatures the thermal stress in the thin film has to betaking in account. The thermal stress originates from the different shrinkage behavior of the thin film and thesubstrate when cooling down, i.e. from their CTE mismatch. Ansys FEM simulation has been used to studythis effect. The mirror has been modeled by a thick substrate (mirror) and a thin layer on top of the substrate(coating). The linear coefficients for thermal expansion for silicon in function of the temperature is found in[5] and the CTE(T) for gold in [4]. The values are plotted in the inset of Fig. 3. For simplicity the thin-filmis assumed to consist of gold only. As the CTE of chrome lies between gold and silicon, this assumption leadspotentially to a slightly higher thermal film stress than in reality. The reference temperature is set to 300Kand thus the thermal stress set to zero at this temperature. The thermal stress induced by the deposition atT>300K is incorporated in the above values of the intrinsic stress. The simulated values of thermal film stressfor temperatures between 40K and 300K is plotted in Fig. 3. Note that the the thermal film stress goes almostlinearly with the temperature - this due to the fact that the difference between the two individual CTEs is almostconstant with the temperature.

The total film stress is assumed to be the sum of the intrinsic stress (at 300K) and the thermal stress. Theyielding peak-to-valley deformation of the micromirror is given by Eqs. 1 and 2 (graph in Fig. 2). Table 1summarizes the peak-to-valley deformation for different substrate/coating combinations and temperatures. Asstated in the beginning of the section, the contribution of the coating-induced effects (points five and six) tothe total mirror deformation is almost an order of magnitude larger than all the other effects. For the choiceof the mirror thickness, it is clear that the 15µm substrate leaves more margin in the deformation budget thanthe 10µm substrate. Nevertheless the 10µm substrate was chosen - this for technological reasons. The presentfabrication process relies on refilling the gaps at a certain step. This refilling process is the easier the smallerthe gaps are and the minimum gap size that can be etched depends on the substrate thickness. The substratethickness defines also the minimum geometrical gap-size required that the micromirrors do not touch each other

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Table 1. Mirror deformation due to a stressed thin-film reflective coating at different temperatures.

300K 100K 40K10nm Cr / 50nm Au / 10µm Si 33nm 52nm 56nm10nm Ti / 50nm Au / 10µm Si 15nm 34nm 36nm10nm Cr / 50nm Au / 15µm Si 15nm 23nm 25nm10nm Ti / 50nm Au / 15µm Si 8nm 15nm 17nm

Figure 4. Surface quality of the micromirrors. Topographic images obtained from a phase shift interferometric setup (a) ofa 100µm x 200µm micromirror in the OFF position (b) in the ON position and (c) of a large 250µm x 500µm micromirrorin the ON state. The surface quality is not degraded when the mirror is actuated. The peak-to-valley deformation of thesmaller mirrors is 8nm and 15nm in the case of the larger mirrors. The RMS roughness is around 1nm in both cases.

in operation. Thus the thinner the substrate the higher is the maximum possible fill-factor. According to thevalues from Table 1 the peak-to-valley deformation of the 10µm thick mirror is still within the specs at 40Kusing a titan/gold bilayer as reflective coating. Using the chrome/gold coating the mirror deformation is still inthe specs down to 100K.

3. OPTICAL CHARACTERIZATION

A dedicated characterization bench has been developed for the complete analysis of MOEMS devices, actua-tors or micro-mirrors as well as full arrays. This modular Twyman-Green interferometer allows high in-planeresolution (3µm) or large field of view (40mm). Out-of-plane measurements are performed with phase-shiftinginterferometry showing very high resolution (standard deviation < 1nm). Features such as optical quality orelectro-mechanical behavior are extracted from these high precision three-dimensional component maps. Rangeis increased without loosing accuracy by using two-wavelength phase-shifting interferometry authorizing largesteps measurements.7 All measurements have been confirmed with a Veeco/Wyko NT1100 DMEMS opticalprofiler.

The surface quality of uncoated mirrors was measured in the OFF and the ON state: Fig. 4. The 100µm× 200µmsized mirrors showed a peak-to-valley deformation of 7nm, in OFF position as well in ON position - the mirrorsremain flat when operated. Larger mirrors of 250µm × 500µm, which may be used for larger telescopes, showeda PTV of 15nm, still satisfying the requirement on optical flatness. The local roughness is comparable to apolished silicon wafer, which is around 1nm RMS - using the backside of the device layer as mirror topside yieldsthis almost flawless surface, as the device layer backside remains protected by the buried oxide layer throughoutthe whole fabrication process and is exposed only in the very last step.

Using a reflective layer increases the mirror deformation. A 50nm gold layer, with a 10nm chrome adhesionlayer, is deposited on the micromirrors for good reflectivity in the near and mid-infrared range. The peak-to-valley deformation increases to about 35nm when coating only the topside of the mirror. This value is in goodagreement with the predicted values in the previous section. From Table 1 we have a calculated peak-to-valleydeformation of 33nm. Additionally coating the backside of the mirror with the identical layers decreases thepeak-to-valley deformation to 17nm (Fig. 5). Note that the curvature of the mirror changed from concave toconvex. In theory, a perfectly balanced sandwich coating would yield the initial deformation of the uncoatedmirror; however in our case the backside of the mirror is partially shadowed by the suspension beams leading toa geometric asymmetry between the front- and backside coating and thus inducing this residual deformation.

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Figure 5. Topographic images and cross-sections obtained from a Veeco/Wyko NT1100 showing the influence of thereflective coating on the surface quality of 100µm x 200µm micromirrors. All micromirrors in the OFF position. Areflective coating on the optical side of the mirror increases the peak-to-valley deformation from below 10nm (uncoated(a)) to about 35nm (b); adding the same coating on the backside of the mirror decreases the peak-to-valley deformationto below 20nm (c). Note that this backside coating also changed the sign of the curvature of the mirror. The reflectivecoating consists of a 10nm chrome adhesion layer and a 50nm gold reflective layer.

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Figure 6. Cryogenic setup and functional characterization. (a) Cryogenic chamber installed on an interferometric setup.On the picture the chamber cover is removed, showing the packaged micromirror array mounted on a dedicated printedcircuit board in the chamber. (b-c) Functional testing of the micromirror array. One line of micromirrors, initially in theoff-state (b) is switched into the ON state (c).

Figure 7. Interferometric measurement of the mirror quality on the cryogenic testbench. At room temperature the gold-coated micromirror show a peak-to-valley deformation of 36nm (a) and at below 100K a peak-to-valley deformation of50nm (b).

4. CRYOGENIC CHARACTERIZATION

The cryogenic compatibility is crucial for the application in an infrared (IR) MOS. The operating temperaturemust be below 100K for near and mid IR and below 40K for far IR. Our MMA is conceived such that all structuralelements have a matched coefficient of thermal expansion (CTE) in order to avoid deformation or even flakingwithin the device when cooling down to the operating temperature. The mirrors themselves must be coveredwith a gold layer for IR operation, gold having a different CTE than silicon. However we estimate that theinduced deformation is small, as the silicon mirror is 10µm thick and the coating 60nm thin.

Cryogenic characterization was carried out in a custom built cryogenic chamber installed on an interferometricsetup (see Fig. 6. The PGA84 housing containing the sample chip is mounted via a spring loaded grid zipconnector on a specially conceived printed circuit board (PCB). Large copper surfaces on the PCB facilitatecooling down the system; renouncing the solder-stop layer eases outgassing of the PCB FR4 base material duringevacuation of the chamber. The PCB itself is mounted via a fix-point-plane-plane attachment system to a solidaluminum block, the latter being interconnected to the cryo-generator. Thick copper wires between the PCB

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and the aluminum block further enhance thermal transport between the sample chip and the cryostat. Teflon-isolated electrical wires allow to interconnect up to 27 electrical connections through a Dutch connector to theoutside environment. On the outside environment the wires are connected to a custom built control electronics.Temperature sensors are connected to the aluminum block and to the grid zip connector adjacent to the samplechip. The chamber has a glass window that allows observing and measuring the sample chip during cryogenictesting. The micromirror device is illuminated and imagined by a CCD camera on the outside; the micromirrordevice is rotated such that the light of the tilted mirrors (ON state) is sent to the CCD camera.

The cryogenic chamber was cooled down until thermal equilibrium was reached. This yielded a temperatureof 64K measured at the aluminum block and 86K measured adjacent to the sample chip. From experience theactual temperature on the chip was estimated to be about 10K higher than on the temperature sensor adjacent.The pressure in the chamber was at 10−6mbar. The chip could successfully be actuated before, during and aftercryogenic testing. Single mirrors were actuated, as well lines of micromirrors, implementing the so-called longslit mode. Fig. 6 (b-c) shows the transition from OFF to the ON state of a line of micromirros in cryogenicenvironment. This proves that the micromirror device remains functional below 100K. The actuation voltage forthe mirror to snap from the OFF to the ON position was identical before and after cryogenic testing, indicatingthat there is no mechanical degradation of the different material interfaces. This result was confirmed by staticobservation in a Philips ESEM at 120K; no degradation of the critical parts of the device could be seen, thelatter being: interface between electrode and mirror chip, polysilicon - single-crystalline-silicon interface and goldcoating - silicon interface.

Figure 7 shows the surface quality measured of one gold-coated micromirror in the cryogenic setup. Thesurface quality was measured after mounting the micromirror device on the PCB in the cryogenic chamber, atroom temperature and before closing the chamber (Fig. 7 (a)). The peak-to-valley deformation here was 36nm,which corresponds to the measurements made before outside the cryogenic chamber (see previous section). Fig. 7(b) shows the measurement made after closing the chamber and cooling down below 100K. The deformation shapeof the mirror remains identical compared to room temperature. As expected, due the CTE mismatch betweenthe silicon substrate and the gold-coating, the peak-to-valley deformation increases to 50nm. The lower signal-to-noise ratio in this measurement has been induced by the presence of the window at the entrance of thecryogenic chamber.8 Note that the lower signal-to-noise ratio does not degrade the measurement accuracy ofthe mirror curvature. The measured value of the peak-to-valley deformation at 100K is in good agreement withthe estimated value in Section 2, where a value of 52nm was found. This deformation of 50nm is within therequirement of λ/20 at λ = 1µm. For lower temperatures however, according Section 2, a thicker substrate or atitanium (instead of chromium) adhesion layer for the gold coating has to be used.

5. CONCLUSION

Optical and cryogenic characterization showed that the realized micromirrors are suited for the application infuture infrared Multiobject Spectrographs. Infrared MOS requires cryogenic environment and coated mirrors.Both issues have been investigated in terms of simulation and characterization. Gold-coated micromirrors showedto be operational at below 100K and have a surface deformation as low as 50nm peak-to-valley. The feasibilityof large arrays, which is a requirement for the application in a MOS, is still to be demonstrated. Currently, largearrays of 200 × 100 micromirrors are being fabricated.

Acknowledgment

We gratefully acknowledge the COMLAB staff and the Service for Micro- and Nanoscopy at IMT and the ServiceEssais staff at LAM for their valuable support during device fabrication and cryogenic characterization.

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2. F. Zamkotsian, J. Gautier, and P. Lanzoni, “Characterization of MOEMS devices for the instrumentation ofnext generation space telescope,” in Proceedings of the SPIE conference on MOEMS 2003, Proc. SPIE 4980,(San Jose, USA), 2003.

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4. E. Savitskii, Handbook of Precious Metals, Hemisphere Publishing Corporation, 1989.5. EMIS Datareviews Series No. 4, Properties of Silicon, INSPEC, 1988.6. M. Ohring, The Material Science of Thin Films, Academic Press, Inc, 1992.7. A. Liotard, S. Muratet, F. Zamkotsian, and J. Fourniols, “Static and dynamic MOEMS characterization by

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