Operational Amplifiers

27
071 The list of dierent opera- tional amplifiers is endless. And yet it is possible to classify them in a limited number of important cate- gories. Examples are sym- metrical opamps and folded cascodes. They are being reused and redesigned con- tinuously. They are the kings of the list of important amplifiers. Many other opamps can be included in this list because they highlight some cleverness in design or because they excel in performance. In this Chapter, a review is given on many important opamp circuits. In many cases the design compromises are discussed, together with their limits in terms of speed or noise or some other specifications. 072 In this Chapter the trade os between standard CMOS and BiCMOS are also discussed. This is why some known schematics are also included. Most of the discussion is on the symmetrical OTA and the folded cascode OTA as they are so often used. Finally, a list of published opamps are discussed to show that the design prin- ciples are applicable to most of them. We recall the simplest dierential voltage amplifier that we have observed. 211

Transcript of Operational Amplifiers

071The list of different opera-tional amplifiers is endless.And yet it is possible toclassify them in a limitednumber of important cate-gories. Examples are sym-metrical opamps and foldedcascodes. They are beingreused and redesigned con-tinuously. They are thekings of the list of importantamplifiers.

Many other opamps canbe included in this listbecause they highlight somecleverness in design or

because they excel in performance.In this Chapter, a review is given on many important opamp circuits. In many cases the design

compromises are discussed, together with their limits in terms of speed or noise or some otherspecifications.

072In this Chapter the tradeoffs between standardCMOS and BiCMOS arealso discussed. This is whysome known schematics arealso included.

Most of the discussion ison the symmetrical OTAand the folded cascode OTAas they are so often used.

Finally, a list of publishedopamps are discussed toshow that the design prin-ciples are applicable to mostof them.

We recall the simplestdifferential voltage amplifierthat we have observed.

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073This single-stage CMOSOTA is well known.

Because it has a simpleconfiguration means that itcan be used up to really highfrequencies. Its only possiblesecond pole is negligiblebecause of two reasons. itoccurs at values related to fTand secondly because thisnode is on the other side ofthe output. For a single-ended amplifier this meansthat this second pole is fol-lowed by a zero at twice thefrequency. As a result, it isnegligible.

074Even if we connected a largeexternal capacitance at node2, we would still find halfof the circular current,generated by M1 and M2,through the output load.

Whatever the size of thecapacitor is, we alwaysretain half of the currentthrough the output load.This factor of two can onlybe explained by a pole-zerodoublet with spreading two.Its effect on the phasemargin is therefore margin-ally small.

Each time we have a single-ended amplifier, the capacitances on the other side than the output,will therefore be negligible for the Phase Margin.

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075The gain of such a voltageamplifier is rather limited asthe gain per transistor canbe quite small for nanome-ter MOST devices.

This is why cascodes arebetter added. Four cascodeMOSTs are added M5–8 inseries with the input devicesand current mirror, asshown in this slide. Notethat cascode M7 is includedin the feedback loop aroundtransistor M3, which allowsa larger output swing.

This is called the tele-scopic CMOS OTA. The impedance at the output node increases considerably, but not theGBW, as shown next.

Obviously the power consumption does not increase.

076Without cascodes, the gainis moderate. With cascodeshowever, the gain is in-creased, but only at lowfrequencies.

Cascode transistors arenow mainly used for moregain at low frequencies, forexample for lower distortionat low frequencies.

Another ‘‘hat’’ can be puton top of this characteristicby application of gainboosting to the cascodetransistors M6 and M8.

For deep submicron ornanometer CMOS this has always become a necessity, as the gain per transistor has becomeless than 10.

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077A two-stage amplifier suchas the CMOS Miller OTAneeds more power to reachsimilar values of GBW,compared to a single-stageamplifier.

BiCMOS can now beconsidered to save power.

The design plans havebeen previously discussed.They will be applied.

078A Miller OTA in CMOStechnologies has been dis-cussed in great detail. Thetwo governing expressionsare listed for the last time.They are dealing with theGBW and with the non-dominant pole.

In each design plan, it isalways better to start withthe highest frequencies first,which here is the non-domi-nant pole.

Decisions about gm6 andCc are always first, asexplained before.

079Can BiCMOS provide additional advantages?

A typical BiCMOS realization of a Miller OTA is shown in this slide.The second stage uses a bipolar transistor as its gm is the same as for a MOST but with 4

times less DC current. Since the current in the second stage is by far the larger one, big savingsin power consumption are achieved.

The input resistance of a bipolar transistor is too small, however. It reduces the resistance atnode 1 considerably, such that there is little gain left (if any) in the first stage.

Important opamp configurations 215

This is why we need anEmitter follower betweenthe first stage and the inputtransistor of the secondstage. It is realized withtransistor M9. The inputresistance is now beta timeshigher and hopefully com-parable to the output resis-tance of the first stage.

This Emitter followerraises the DC voltage atnode 1 by one more VBE . Asa result, node 1 is about 2VBE’s or 1.3 V higher thanVSS .

In order to establish the

same DC voltage at the other node 2, we use the three-transistor bipolar current mirror, explainedin Chapter 2. Now both nodes 1 and 2 present similar DC voltages to the input pair, improvingmatching.

0710One of the most used OTA’sis the symmetrical OTA. Itis more symmetrical thanthe Miller OTA. As a result,matching is improved whichprovides better offset andCMRR specifications (seeChapter 15).

0711A symmetrical OTA consists of one differential pair and three current mirrors. The inputdifferential pair is loaded with two equal current mirrors, which provide a current gain B. It issometimes called a load-compensated OTA as both loads are now the same.

In the case of a single-ended output we need another current mirror with gain 1 to reach this

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output. In the case of twooutputs (in the nextChapter), we do not needthis current mirror anymore. This analysis is car-ried out for a single-endedoutput.

It is clear that this OTAis symmetrical. The inputdevices see exactly the sameDC voltage and load imped-ance. This is about the bestthat can be achieved withrespect to matching.

Moreover, there is someextra gain, by current factorB. How far can we go withB?

0712The gain at low frequenciesis easily calculated. Indeed,the circular current, gener-ated by the input devices, isamplified by B and flows inthe output load.

The output resistance Rn4at node 4 is quite high.Actually it is the only highresistance in the circuit. Allother nodes are at the 1/gmlevel. As a result, this is asingle-stage amplifier: thereis only one high-resistancenode, one single node wherethe gain is large, where the

swing is large, and ultimately where the dominant pole is formed.The voltage gain at low frequencies is now easily obtained.The bandwidth is created at the same output node. The GBW is the product. It is the same

as for a single-transistor amplifier but multiplied by current factor B.Increasing B increases the GBW.How far can we go with B?

0713However, all other nodes create non-dominant poles. Since we find three other nodes 1, 2 and5, do we have three non-dominant poles?

Important opamp configurations 217

The answer is negative.We will see that only onenon-dominant pole is play-ing a role. It is the one atnodes 1 and 2.

How can the non-domi-nant pole at node 1 be thesame as at node 2? Actually,for a differential output volt-age, it is fairly easy to showthat these nodes togetherform just one pole (see nextslide).

As a result, the non-domi-nant pole is determined bythe resistance 1/gm4 and allcapacitances connected to

that node. They are listed in this slide. As a very crude approximation, we take them all to bethe same, except for the current mirror. At node 1, transistor M6 offers an input capacitancewhich is B times larger than for transistor M4.

Finally, the non-dominant pole frequency can be rewritten in terms of fT and current factorB. The larger B, the lower the non-dominant pole. This expression therefore provides the limiton B.

0714For a differential output,two transistors to groundprovide only a first-ordercharacteristic – there is onlyone single pole.

This is obvious for the cir-cuit on the left. Since thereis only one capacitance, onlyone pole can emerge.

However, this circuit caneasily be converted to thecircuit on the right. We taketwo capacitances in serieswith double the value andthen ground the nodebetween both capacitances.

This is how the circuit on the right is derived from the first one. For AC they are exactly thesame. They have the same pole!

To make it slightly more intriguing, we could wonder what happens if there is some asymmetry.For example, if one capacitance is slightly larger than the other one, how can it create a polewith the same value?

In this case, we find two poles, but we also find a zero inbetween, to ensure a first-order roll-off.

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The net result is that for a differential output, these two nodes establish one single poleonly!

0715How about the pole atnode 5?

Remember that this is anode at the other side of asingle-ended amplifier. Eachtime we have a single-endedamplifier, the capacitanceson the other side than theoutput, will be negligible forthe Phase Margin.

Indeed, a pole-zerodoublet is created by thecapacitances at this node 5.Its spreading is only 2. As aresult, the effect on thePhase Margin is nownegligible.

Despite the fact that we have three nodes at the 1/gm level, we only have one single non-dominant pole!

0716As an example, let us designa CMOS symmetrical OTAfor a GBW of 200 MHz and2 pF load capacitance.

The expressions of theGBW and fnd are repeated.

Obviously, for wide-bandperformance, we have totake a high-speed transistorfor M4 and M6. This meansthat this current amplifier(or mirror) devices haveto be designed for largeVGS−VT and small L.

Some values have beenselected, depending on the

CMOS process available. The resulting fT is about 5 GHz.The maximum value of B is found by equating fnd to 3×GBW. The value of B is therefore 5.

Many designers use between 3 and 5.The input transconductance is now easily obtained from the GBW. It is gm1=0.5 mS, which

requires about 50 mA. The total current consumption is now 0.6 mA.The FOM of this amplifier is 670 MHzpF/mA, which is quite good, indeed!

Important opamp configurations 219

0717Can BiCMOS provide sim-ilar power savings as for aMiller OTA?

The answer is negative.The current sources are

the only candidates to beimplemented in bipolar. Theinput devices are betterMOSTs. They provide lessinput biasing current andhigher Slew Rate.

There are two considera-tions:

1. The npn transistors cer-tainly have a higher gmbut this advantage is not

really exploited in a current mirror. They also have a higher fT , at least within a particularBiCMOS process. They may not have a higher fT however, than the nMOSTs in a moreadvanced standard CMOS process, offered at the same time.

2. Bipolar transistors have a relatively large collector-substrate capacitance CCS . As a result, theparasitic capacitance at nodes 1 and 2 are probably a lot larger than those given by fT .

As a conclusion, a BiCMOS symmetrical OTA is probably not faster than a CMOS equivalent.For the same GBW it probably does not draw less current than the CMOS.

0718The previous symmetricalOTA’s all had too little gain.Cascodes are now added toincrease the gain. Gainboosting could even beapplied to the output cas-codes M10 and M12 toboost the gain even more.

Note that cascodes areadded on both sides, topreserve symmetry. Alsonote that a current mirroris taken (with M7–M10)which allows a large outputswing. Indeed the outputvoltage can swing to within

0.4 V of the supply voltage, without transistors M8/M10 or M6/M12 entering the linear region.The insertion of cascodes increases the gain but not the GBW. The cascodes only increase the

gain at low frequencies, as previously shown. Moreover, the gain at low frequencies can beincreased even more by application of gain boosting to the cascodes M10 and M12. This is a

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general practice for nanometer CMOS where the gain per transistor has become quite small, i.e.less than 10.

0719A two-stage Miller opera-tional amplifier is easilybuilt by means of a symmet-rical OTA as a first stage, asshown in this slide.

Its GBW also includes Ccand B.

The compensation cap-acitance Cc is obviously notconnected directly fromDrain to Gate, but takes apath through cascode tran-sistor M10 to avoid the pos-itive zero.

As a result, the currentthrough the output stageM11/M12 can be takensmaller, saving power.

0720An earlier realization ofsuch a symmetrical OTA isshown in this slide. It is abipolar realization.

The current mirrors arequite elaborate, to obtainprecise current mirroringand good matching.

The specifications obvi-ously depend on the actualDC currents flowing.Actually, this circuit blockcan be tuned to any value ofGBW by modifying the cur-rent through Q3. The non-dominant pole tracks theGBW.

0721Another way to increase the gain is by current starving.

This is actually a fully-differential symmetrical OTA. As no cascodes are used, the voltage gainis very modest.

Important opamp configurations 221

However, the addition oftwo DC current sourceswith values KI1 increasesthe gain considerably. Atypical value for k is 0.8.

In this case, 80% of theDC current provided by theinput transistors M1 istaken away by the DC cur-rent sources. Only 20% ofthe DC current, togetherwith the signal current isinjected into the transistorsM2 of the current mirrors.

Because the DC currentsin the output transistors M3are also lower, the output

resistances are higher and so is the voltage gain.This technique cannot be pushed too far as mismatch will occur. Moreover, the resistance at

the inner node of the current mirrors determines the non-dominant pole. It cannot be increasedtoo much.

0722The other ‘‘most used’’ oper-ational transconductanceamplifier is the folded cas-code OTA.

Many designers limitthemselves to folded cas-code OTA’s only. It is there-fore important to figure outwhat exactly the advantagesand disadvantages are. Also,which design plan deliversthe best performance interms of power consump-tion, noise, etc.

0723A folded cascode OTA consists of an input differential pair, two cascodes and one current mirror.The latter current mirror will not be necessary when we have two outputs, as explained in thenext Chapter.

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It is a high-swing currentmirror again.

This circuit is as symmet-rical as the symmetricalOTA as both input devicessee exactly the same DCvoltage and impedance, atnodes 1 and 2.

The output is again theonly point at high resis-tance. Indeed all othernodes are at 1/gm level. It isagain a single-stage ampli-fier, despite its complexity.

0724Let us first examine howthe DC operation actuallyworks.

The input devices arebiased by a current source(with M9) at for example100 mA. Both input devicescarry 50 mA.

At node 2, transistor M11draws 100 mA. The differ-ence between this currentand what is coming fromM1, is then pulled from cas-code transistor M4.

This current flowsthrough both cascode tran-

sistors. The current source on top mirrors this current. There is no way that DC current couldflow out, even if the output node would be connected to ground.

Normally, all currents in the input and cascode devices are the same, i.e. 50 mA. This is not anecessity but is certainly the best way to avoid all kinds of artifacts, such as asymmetrical swing,Slew-Rate, etc.

0725The small-signal operation is easily understood.

The input transistors create a circular current, which flows through the cascode transistors tothe high-impedance node. The output resistance at node 4 is again Rn4 .

Important opamp configurations 223

The voltage gain at lowfrequencies is now easilyobtained. Note that thisgain is high because cas-codes are used. Gain boost-ing could be applied to thecascodes M4 and M8 toincrease the gain evenfurther.

The bandwidth is createdat the same output node.The GBW is the product. Itis exactly the same as fora single-transistor amplifier.Of course, the input trans-concuctance is smaller here,as only half of the currentflows in the input stage.

What is the advantage of this folded OTA? It consumes twice the current of a telescopiccascode stage!

0726In order to find the advan-tages of a folded cascodeOTA, we have to verify thehigh-frequencyperformance.

The non-dominant pole iscreated at the nodes 1 and2. They form together onesingle non-dominant pole.The resistance at node 1 is1/gm3 and the capacitance atthis node is Cn1 . It is a sumof three small capacitances,which are all similar in size.

The non-dominant poleoccurs at about one third of

fT . This is a very high frequency indeed. The GBW can therefore be quite high.This is the first advantage of a folded OTA.Finally, note that the current mirror with transistors M5-M8 can also be used. Remember,

however, that this current source requires more than 1 V to keep all transistors in saturation.This is the loss in output swing at each supply line. The previous current mirror is a lot betterfor low-voltage applications.

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0727The capacitances at the topnodes 5, 6 and 7 also causenon-dominant poles. Theyare followed by zeros how-ever, at double the fre-quency. Indeed, each timewe have a single-endedamplifier, the capacitanceson the other side than theoutput, will be negligible forthe Phase Margin.

As a conclusion, this OTAhas only one single non-dominant pole. It is fairlyeasy to design. It also hasthe advantage that it isvery fast.

0728Would a BiCMOS foldedOTA be even faster?

The only good positionfor bipolar transistors to beplugged in, is as cascodedevices. Indeed, this is wherewe need the highest-speeddevices. The non-dominantpole at nodes 1 and 2 arelinked to the fT of the cas-codes. This is higher thanthe fT of the nMOST fTwithin a particular

BiCMOS technology.Remember that this is notnecessarily higher than for

nMOSTs in a more recent standard CMOS technology.Never use bipolar devices for the transistors M10 and M11 in the DC current sources. Their

collector-substrate capacitances would reduce the non-dominant pole at nodes 1 and 2 too much!

0729The second important advantage of a folded cascode OTA is that the input transistors canoperate with their Gates beyond the supply lines. The common-mode input voltage range caninclude one of the supply rails!

In the circuit in this slide, the pMOST devices at the input still operate when the Gates areconnected to ground, or even below ground. The VGS values of the input transistors are easily

Important opamp configurations 225

0.9 V (for VT=0.7 V), whichis more than sufficient toaccommodate the VDS1 andVDS10 .

If VDS1 is about 0.2 V andVDS10=0.5 V, then the inputtransistors can still operatewith their gates at 0.2 Vbelow ground!

A folded cascode opampinclude the ground rail. Thisis why they have been oftenused for single-supply sys-tems such as automotiveapplications before, but nowalso for all mixed-signalapplications, in which the

processors use only one single supply line.Moreover, connecting two folded cascodes in parallel, one with pMOSTs at the input and

another one with nMOSTs at the input, allows coverage of the full rail-to-rail range. This ishow rail-to-rail input opamps are put together! These are discussed in Chapter 11.

0730The folded cascode OTA isalso an excellent first stagefor a two-stage MillerCMOS OTA. As usual thesecond stage is just onesingle transistor with activeload.

As a result, the GBW isset by gm1 and Cc . Nowthere are two nondominantpoles, however. The lower-frequency one is normally atthe output. The other, atnodes 1 and 2 are usually atthe highest frequency.

Because of the secondstage, the output swing can be rail-to-rail. Indeed, even when the output voltage is very close tothe positive supply voltage, and the output transistor M12 enters the linear region, and loses itsgain, there is still sufficient gain remaining in the first stage to suppress the distortion.

226 Chapter #7

0731For sake of comparison, theconventional folded cascodeOTA is repeated.

The top current mirrorM5-M8 can also be real-ized in a different way, asshown next.

0732In this alternative foldedcascode OTA, the currentmirroring is carried outaround the cascodesthemselves.

Indeed, transistors M3/M4 are also the cascodesin the differential currentamplifier formed by M3/M4 and M10/M11. Suchan amplifier provides thedifference between the inputcurrents, as explained inChapter 2. These input cur-rents are the same in ampli-tude but opposite in

phase, as they come directly from the input pair.The output current in the load capacitance is simply gm1vind .Let us try to discover what the differences are with the previous conventional folded cascode

OTA.Clearly, the gain and output impedance are the same. The number of biasing lines is one less

as M5–6 and M9 can share the same Gate line.The main difference however, is in the impedance seen by the input transistors. In the

conventional folded cascode, the input devices see exactly the same impedance. In the alternativeconfiguration, transistor M1 sees 1/gm4 but transistor M2 sees 1/gm3 divided by the gain oftransistor M3 or gm3ro3 . This is much smaller!

The alternative folded cascode OTA is therefore a bit less symmetrical. This will be visible inthe higher-order poles and zeros, which are of less concern to us!

Important opamp configurations 227

0733For sake of comparison, ashort table is given listingthe main advantages anddisadvantages.

The four-transistor single-stage voltage differentialamplifier is the first on thelist. It is followed by a sym-metrical CMOS OTA. Thenwe have two cascode CMOSOTA’s. Finally, a two-stageMiller CMOS OTA isadded.

It is clear that the MillerCMOS OTA takes the high-est power consumption. The

best one is a telescopic cascode.For high output swing, the telescopic cascode OTA is the worst one. The best are the Miller

CMOS OTA and the symmetrical one, at least if no cascodes are used!The symmetrical OTA is the worst for noise, however.This shows that even for as few as three specifications, not one single amplifier can be called

the best. Many designers prefer a folded cascode OTA, which is certainly a good compromise.

0734Many more opamp config-urations can be added. Theyare all included in

this list because they havesome peculiarity which isworth investigating. We willalways try to recognize thedesign principles which wehave studied before. We willtry to find out whether onesingle or two stages areused. We want to knowwhich trick has been used toabolish the positive zero.Also, we want to recognizethe structure of a symmetri-cal or folded cascode, etc.

Some of these are fully-differential. This means that they have two outputs and requirecommon-mode feedback. This will be explained in the next Chapter, however. We focus here ontheir circuit configuration, without being affected by their differential nature.

228 Chapter #7

0735The first one in the list is anOTA which works on amere 1 V supply voltage.

Moreover, this OTA canbe switched in and out. Toverify the operation, wemust close all four (blue)switches.

Clearly, a two-stageMiller CMOS OTA emerges,with a folded-cascode as afirst stage. Because of thelow supply voltage, transis-tor M8 does not have a cas-code. The gain will there-fore not be that high. A

second stage provides a good remedy, however.Obviously, the compensation capacitance CC does not connect Drain to Gate directly around

output transistor M10. It takes a path through cascode device M6, in order to avoid a positivezero.

Finally, note that the common-mode input voltage range is just about zero. Indeed the sumof VDS1 and VGS3 is about 1 V. The Gates of the input devices can only operate around zero.

On the other hand, the average output voltage will be 0.5 V to maximize the output swing.As a consequence, the output can never be directly connected to the input, to make a buffer forexample. A level shifter over 0.5 V will have to be inserted between output and input.

0736A very conventional two-stage Miller opamp withbipolar transistors is shownin this slide. It can be usedfor supply voltages downto ±1.5 V.

Each high-impedancepoint is indicated by meansof a red dot. It is clearly atwo-stage amplifier with aclass AB output stage.

The GBW is obviouslydetermined by the inputtransconductance and the30 pF compensation capaci-tance. Bipolar transistors

have sufficient transconductance not to have problems with positive zeros.With bipolar transistors, an emitter follower is required between input and second stage. This

Important opamp configurations 229

transistor is T5. A level shifter T6 then follows to reduce the voltage to about 0.7 V, the VBE oftransistor T8. This level shifter is also required to reach this low supply voltage.

In the input stage, series resistors of 10 kV are used to increase the Slew-Rate.The output stage consists of two emitter followers. As a consequence twice a VBE of about

0.7 V is lost in the output swing. For such large supply voltages, we do not mind so much. Forsmaller supply voltages or larger output swings we must use two Collector-to-collector outputdevices, as we have previously seen in most opamps.

Diodes T13/T14 are used to set the quiescent current in the output devices.

0737An attempt to raise thetransconductance of MOSTsto higher values is shownhere.

It starts with inserting aseries resistor. This is obvi-ously going to decrease thetransconductance.

It can increase thetransconsuctance, providedwe can make the resistornegative. For example, if wecan make gmRS=0.8, thengmR will be 5 times gm .

It is too difficult, however,to match a gm to a resistorRS to obtain an accuratevalue of, for example, 0.8.

0738This matching is quite feasi-ble provided we take twonMOST devices, the bottomof which is connected as adiode. Since both carryequal DC currents, the gmratio is now the square rootof the W/L ratio, or theVGS−VT ratio, and this canbe made quite accurate.

Moreover, a negativeresistance is easily realizedin differential form, asshown in this slide.

If we can make a layoutwith a W/L ratio of 0.5, for

230 Chapter #7

example, then the gm ratio is 0.71 and the transconductance goes up by a factor of about 3. Wecould push this a bit more of course!

A full OTA realization is shown next.

0739This is clearly a symmet-rical CMOS OTA, with aB factor of three. Theinput devices have negativeseries resistances to increasethe input transconductance.Two more transistors M5and M6 are added to avoidlatch-up of the input stage.After all, negative resistorsare used in oscillators, incomparators, in flip-flops,etc., because they are regen-erative. They may causelatch-up when overdriven.Transistors M5 and M6have to prevent this.

Such an Operational Transconductor Amplifier is also called Transconductor, because it allowslarger input voltages with low distortion.

0740Another transconductorwith high-speed capability isshown in this slide.

It is little more than adifferential single-stage volt-age amplifier with cascodes.

However, the input tran-sistors operate in the linearregion. This is achieved onpurpose to avoid distortion,when driven with largeinput signal levels.

Indeed, in the linearregion the current is propor-tional to VGS , not to VGS2.As a result, the transcon-

ductance is constant provided VDS can be kept constant.This is achieved by fixing the voltage across resistor RD by means of a constant current ID .Obviously, the transconductance in the linear region is smaller than in saturation. Lower

Important opamp configurations 231

distortion always goes together with lower gain though! Feedback does this too, exchanginggain for low distortion.

In order to boost the high-frequency performance, two small capacitances are added by meansof transistors M5 and M6. They are added to compensate the input capacitances CGS of theinput transistors. They are connected to nodes at opposite polarity. For a size of about onethird, compensation can be achieved. This is why they are drawn smaller!

0741This is the first fully rail-to-rail amplifier that we willdiscuss, is shown in thisslide. It provides rail-to-railcapability at both the inputand the output. It can beconnected in unity gain as abuffer. It has a class ABoutput stage to be able toprovide large output cur-rents indeed.

At the input two foldedcascode stages are con-nected in parallel. Thecommon-mode input rangethus includes both supplylines.

Their outputs are applied to two differential current amplifiers, ending up at the Gates of thetwo large output devices. These devices are the output stage.

We have a two-stage Miller opamp. The compensation capacitances are clearly distinguished.However, they connect directly Drain to Gate. Perhaps it is better to find a path through oneof the cascodes. For example Cc2 may be better connected to the source of M14!

The Gates of the output transistors are at very high impedance. It may not appear like thatbecause these nodes are also connected to two Sources of transistors MA3 and MA4. Sourcessuggest impedance levels of 1/gm . This is not the case here however, as these two transistors arebootstrapped out. This is explained later.

The rail-to-rail input stage can cause large variations in GBW, however. This is examined first.

0742Indeed, for common-mode or average input signals in the middle, both input stages are inoperation. The total transconductance is now the sum of the transconductances of the nMOSTsand pMOSTs at the input.

For higher common-mode input signals however, the pMOSTs are shut off. The transconduct-ance is now only half. The same is true for low common-mode input signals. The total transcon-ductance has a bell shape versus the input common-mode input voltage, as shown in this slide,and so does the GBW.

This gives a lot of distortion.

232 Chapter #7

Some circuitry has to beadded to equalize the trans-conductance over the fullcommon-mode input range.In other words, for lowcommon-mode input volt-ages, we need to doublethe transconductance of thepMOSTs; for high voltages,we need to double thetransconductances of thenMOSTs.

Various circuits can bedevised to carry out such atask. One of these isexplained next. The othersare discussed in Chapter 11.

0743The input stage of the rail-to-rail opamp is repeated inthis slide.

The current which flowsin a branch is indicated bythe thickness of line. Theinput circuit is repeatedtwice, once for a common-mode input voltage halfwaythe supply voltages. Theother is the situation whenthe inputs are connected tothe positive supply.

When the inputs are half-way the supply voltage, theDC currents through all

input devices are equal (and about 5 mA). However the DC current source for the pMOSTdifferential pair carries a current of 20 mA. Indeed, half of this current flows through a cascodeMN3 to a current mirror which serves the nMOST differential pair.

When the input voltage goes up, towards the positive supply voltage, then the VGS of thiscascode transistor MN3 is increased, such that it takes the full 20 mA. As a result, the nMOSTdifferential pair receives the full 20 mA. On the other hand, the pMOST differential pair is leftwithout DC current.

As a consequence, the current in the nMOST pair is multiplied by 2. This is not sufficient ifthe input devices work in saturation. This is sufficient if the input devices work in the weakinversion region. Doubling the current then doubles the transconductance.

The sizes of the input devices are so large that the input devices are more likely going to workin weak inversion. After all, the GBW is only 14 MHz, which is quite feasible in weak inversion.

Important opamp configurations 233

0744For high gain, the outputimpedance of the first stageor the Gates of the outputtransistors have to be atvery high impedance. It maynot appear like that becausethese nodes are connected totwo Sources, of transistorsMA3 and MA4. Sourcessuggest impedance levels of1/gm . This is not the casehere however, as shownnext.

The output stage isrepeated three times. Thefirst one is simply copied

from the overall circuit diagram. In the second one, the output resistance of the first stage isrepresented by Rin . In the third one, the two transistors in parallel are substituted by animpedance called Z.

It is now easy to calculate the gain of this amplifier. The input stage provides a conversion ofgm1 . The total gain also includes the transconductance of the output devices gmA1 . Impedance Zis not part of it. The reason is that the impedance Z is bootstrapped out.

We see on the third diagram, that the currents coming from the input stage have the samephase and therefore drive the output transistors with the same phase as well. This is typical fora class-AB stage. Both transistors have to be driven in phase to turn one output transistor andthe other one off.

As a result, the voltages at the Gates of the output devices are nearly the same in amplitude.No AC voltage appears across the impedance Z. It does not carry any AC current. It looks likean infinite impedance and it is bootstrapped out.

0745What is the purpose then ofthese two transistors MA3and MA4 when they do notplay a role for the gain?

They are there to set thequiescent current in theoutput transistors.

The output transistorMA2 forms with transistorMA4 a translinear loop withtransistors MA9 and MA10.The sum of their VGS’s arethe same as spelled out inthis slide.

The DC currents in threeof these four devices are con-

234 Chapter #7

stant and set by DC current sources to be 4 –5 mA. As a result, the DC current through theforth one (MA2) is also set to be constant.

All four transistors have the same VT and K∞p . The ratio of the DC current through outputtransistor MA2 is now about 100 times the current in MA4.

This is an easy way of controling the DC current in a class-AB stage, as will be explained inmore detail in Chapter 12.

0746An even more symmetricalfolded cascode OTA thanthe folded cascode OTA isshown in this slide.

The Drain of each inputtransistor sees exactly thesame impedance, even at thehighest frequencies.

At each Drain the circularcurrent i is split up in twoequal parts i/2. One partgoes directly to the output,whereas the other is mir-rored first.

Because of this perfectmatching at high frequen-

cies, this amplifier has a perfect cancellation of higher order poles and zeros. As a result, it hasa much higher CMRR. Moreover, the Slew Rate is perfectly symmetrical.

It is therefore an ideal building block for higher frequencies.

0747Another bipolar opamp isalso capable of taking inputvoltages below ground.Remember that this is anadvantage of a foldedcascode.

This input differentialpair is preceded by twoEmitter followers. As aresult the inputs can gobelow ground. For VBE’s of0.6 V, and VCE’s of 0.1 V, wesee that the inputs can go0.5 V below ground.

This is an opamp whichis suited very well for single-

supply applications such as most of the automotive applications, etc.

Important opamp configurations 235

Moreover, this opamp takes very little power. As a consequence, the GBW is fairly low.The noise is very high, however. The reasons are that the currents are small but especially

that emitter followers are used at the input. They do not give voltage gain. As a result, all sixtransistors of the input stage contribute to the equivalent input noise.

0748A two-stage bipolar opampwith JFETs at the input isshown in this slide.

JFETs behave as MOSTsbut with larger input cur-rents. Actually, their inputcurrents are leakage cur-rents, because of the reversebiased input pn junctions.They are much smallerthan for bipolar transistorsthough. Also, their thresh-old voltages are negative.They are depletion devicesrather than enhancementdevices such as MOSTs.

They conduct at zero VGS . Also, their threshold voltage, called pinch-off voltage VP , is usuallyseveral Volts.

These p-channel JFETs substitute the pnp transistors which were originally in this circuit.After all, this is just a two-stage operational amplifier with Miller compensation. With bipolartransistors at the input however, the Slew Rate is too small. JFETs have been used instead toincrease the Slew Rate.

They also give very little 1/f noise, which is an additional advantage for low-frequency circuitssuch as high-performance audio amplifiers.

0749This is a two-stage opampwhich has been the work-horse for all discrete analogelectronics over decades ofyears.

The only difference withany two-stage Miller com-pensated opamp is theinput stage.

Lateral pnp transistorshave a low beta and cannotbe used as input transistors.On the other hand, we defi-nitely want to use high-speed npn transistors in thesecond stage to shift the

236 Chapter #7

non-dominant pole to high frequencies. As a result, the current mirror in the input stage mustbe realized by means of npn devices as well.

This is why non transistors are used at the input. They give small input base currents. Theseinput npn’s are now put in series with lateral pnp’s, to be able to drive the npn current mirror.

Since all input transistors carry the same current, they all have the same transconductance.The input transconductance is now reduced by two to gm1/2. This is only a small loss.

The pnp transistors in the input stage are biased by a common-mode feedback loop. Indeed,this loop is closed over the input devices and the current mirror Q8/Q9. This loop desensitizesthe DC currents of the input devices from the pnp beta’s.

However, the performance of this bipolar opamp is rather moderate.

0750A high performance bipolaropamp is shown in this slide.

It is again a two-stageopamp as suggested by thered dots. Its GBW is moder-ate but its gain is very high.Its offset is trimmed to verylow values.

This is achieved by usingresistive loads in the firststage. These resistors canbe trimmed by laser orother techniques, to verysmall values, improving theCommon-mode RejectionRatio considerably (seeChapter 15).

The resistors in the input stage are not as good as active loads, however. They lead to lowergain. This is why a second stage is used with very high gain.

This second stage consists of a differential voltage amplifier, to which an emitter follower hasbeen added, as explained next.

0751The second stage of this amplifier is taken separately. It consists indeed of a differential voltageamplifier, to which an Emitter follower has been added, as shown in this slide.

This Emitter follower M3 bootstraps out the output resistor ro2 of transistor M2. As a result,only the output resistance of the input pnp plays a role for the gain. They are lateral devices inwhich the output resistance can be made as large as needed.

Moreover, the output impedance Rout will also be smaller.

Important opamp configurations 237

An accurate analysisshows that the gain is actu-ally multiplied by the betab3 of transistor M3.

This is an attractive tech-nique to boost the gain.Since the gain becomessmaller for smaller channellengths, all possible gain-boosting techniques willbecome necessary. Boot-strapping resistances to highvalues is certainly amongthem.

0752In this Chapter, a wide vari-ety of possible operationalamplifiers have been

discussed. Most designeffort has gone to the sym-metrical amplifier and thefolded cascode.

However, most of themhave a single-ended output.They cannot be used in amixed-signal environment.For this purpose, they mustbe fully differential. Theymust have two outputs, asintroduced in the nextChapter.