GD880_SVC ENG_100323.indd

Service Manual

Model : G

D880

Internal Use Only

Service ManualGD880

Date: March, 2010 / Issue 1.0

- � -Copyright © 2010 LG Electronics. Inc. All right reserved.Only for training and service purposes

LGE Internal Use Only

Table Of Contents

1. INTRODUCTION ................................................. 51.1 Purpose ............................................................................................... 5

1.2 Regulatory Information ............................................................... 5

1.� Abbreviations ................................................................................... 7

2. PERFORMANCE .................................................. 92.1 Product Name .................................................................................. 9

2.2 Supporting Standard .................................................................... 9

2.� Main Parts : GSM Solution ........................................................... 9

2.4HW Features .....................................................................................10

2.5SW Features .....................................................................................12

2.6 HW SPEC. ..........................................................................................14

2.7 GD880 Figures ...............................................................................20

3. TECHNICAL BRIEF ............................................21�.1 Digital Baseband(DBB/MSM7227) .........................................21

�.2 Hardware Architecture ..............................................................22

�.� Sub system(MSM7227)...............................................................25

�.4 Power Block.....................................................................................�4

�.5 External memory interface .......................................................�9

�.6 H/W Sub system ............................................................................41

�.7 Audio and sound ..........................................................................52

�.8 Camera / LCD ..................................................................................58

�.9 Proximity Sensor ...........................................................................65

�.10 Luminance Sensor .....................................................................66

�.11 Motion Sensor .............................................................................67

�.12 Vibrators .........................................................................................68

�.1� GSM MODE ...................................................................................70

�.14 UMTS MODE .................................................................................72

�.15 GPS RECEIVER ..............................................................................75

�.16 LO GENERATION and DISTRIBUTION CIRCUIT ................75

�.17 OFF-CHIP RF COMPONENTS ..................................................76

�.18 LG GD880 Main Features.........................................................80

�.19 GD880 Main Component .......................................................81

4. TROUBLE SHOOTING ......................................864.1 RF Component...............................................................................86

4.2 Signal Path .......................................................................................88

4.� Checking TCXO Block ..................................................................92

4.4 Checking FEM Block ....................................................................9�

4.5 Checking WCDMA Block ............................................................96

4.6 Checking GSM Block ................................................................ 106

4.7 GPS/WIFI/BT/FM Radio RF components .......................... 11�

4.8 GPS/WIFI/BT/FM Radio SIGNAL PATH ................................ 115

4.9 GPS/WIFI/BT/FM Radio TROUBLE SHOOTING ................ 116

4.10 Power ON Troubleshooting ................................................ 122

4.11 Charger Troubleshooting .................................................... 126

4.12 USB trouble................................................................................ 1�0

4.1� Audio trouble ........................................................................... 1��

4. 14 5M Camera trouble ............................................................... 145

4. 15 VGA Camera trouble ............................................................. 148

4. 16 Main LCD trouble ................................................................... 150

4.17 SIM Detect Troubleshooting .............................................. 15�

4.18 Side Key Troubleshooting.................................................... 155

4.19 LINEAR MOTOR ........................................................................ 157

4.20 Proximity Sensor on/off trouble ....................................... 158

4.21 Luminance Sensor on/off trouble .................................... 160

4.22 Motion Sensor on/off trouble ............................................ 162

5. DOWNLOAD ...................................................164

6. BLOCK DIAGRAM ...........................................177

7. CIRCUIT DIAGRAM ........................................185

8. BGA PIN MAP .................................................195

9. PCB LAYOUT ...................................................201

10. RF CALIBRATION .........................................20510.1 Introduction .............................................................................. 206

10.2 Terminology .............................................................................. 206

10.� Tachyon Main UI ...................................................................... 206

11. EXPLODED VIEW & REPLACEMENT PART LIST ....................................................215

11.1 EXPLODED VIEW ...................................................................... 215

11.2 Replacement Parts.................................................................. 219

11.� Accessory ................................................................................... 244

- 5 -Copyright © 2010 LG Electronics. Inc. All right reserved.Only for training and service purposes


1. INTRODUCTION

1. INTRODUCTION

4/140

1.1 PurposeThis manual provides the information necessary to repair, calibration, description and download the features of this model.

1.2 Regulatory InformationA. Security

Toll fraud, the unauthorized use of telecommunications system by an unauthorized part (for example, persons other than your company’s employees, agents, subcontractors, or person working on your company’s behalf) can result in substantial additional charges for your telecommunications services. System users are responsible for the security of own system. There are may be risks of toll fraud associated with your telecommunications system. System users are responsible for programming and configuring the equipment to prevent unauthorized use. The manufacturer does not warrant that this product is immune from the above case but will prevent unauthorized use of common-carrier telecommunication service of facilities accessed through or connected to it.

The manufacturer will not be responsible for any charges that result from such unauthorized use.

B. Incidence of Harm

If a telephone company determines that the equipment provided to customer is faulty and possibly causing harm or interruption in service to the telephone network, it should disconnect telephone service until repair can be done. A telephone company may temporarily disconnect service as long as repair is not done.

C. Changes in Service

A local telephone company may make changes in its communications facilities or procedure. If these changes could reasonably be expected to affect the use of the this phone or compatibility with the network, the telephone company is required to give advanced written notice to the user, allowing the user to take appropriate steps to maintain telephone service.

D. Maintenance Limitations

Maintenance limitations on this model must be performed only by the manufacturer or its authorized agent. The user may not make any changes and/or repairs expect as specifically noted in this manual. Therefore, note that unauthorized alternations or repair may affect the regulatory status of the system and may void any remaining warranty.

1. INTRODUCTION

1. INTRODUCTION


1. INTRODUCTION

5/140

E. Notice of Radiated Emissions

This model complies with rules regarding radiation and radio frequency emission as defined by local regulatory agencies. In accordance with these agencies, you may be required to provide information such as the following to the end user.

F. Pictures

The pictures in this manual are for illustrative purposes only; your actual hardware may look slightly different.

G. Interference and Attenuation

Phone may interfere with sensitive laboratory equipment, medical equipment, etc.Interference from unsuppressed engines or electric motors may cause problems.

H. Electrostatic Sensitive Devices

ATTENTION

Boards, which contain Electrostatic Sensitive Device (ESD), are indicated

by the sign. Following information is ESD handling:

• Service personnel should ground themselves by using a wrist strap when exchange system boards.

• When repairs are made to a system board, they should spread the floor with anti-static mat

which is also grounded.

• Use a suitable, grounded soldering iron.

• Keep sensitive parts in these protective packages until these are used.

• When returning system boards or parts like EEPROM to the factory, use the protective

package as described.

2. INTRODUCTION



1. INTRODUCTION

6/140

1.3 AbbreviationsFor the purposes of this manual, following abbreviations apply:

Offset Phase Locked LoopOPLL

Light Emitting DiodeLED

Low Drop OutputLDO

Liquid Crystal DisplayLCD

Intermediate FrequencyIF

International Portable User IdentityIPUI

Global System for Mobile CommunicationsGSM

General Purpose Interface BusGPIB

Gaussian Minimum Shift KeyingGMSK

Flexible Printed Circuit BoardFPCB

Electrostatic DischargeESD

Electrical Erasable Programmable Read-Only MemoryEEPROM

Digital Signal ProcessingDSP

dB relative to 1 milli wattdBm

Digital Communication SystemDCS

Digital to Analog ConverterDAC

Constant Current – Constant VoltageCC-CV

Bit Error RatioBER

BasebandBB

Automatic Power ControlAPC

1. INTRODUCTION


1. INTRODUCTION

7/140

Wireless Application ProtocolWAP

Voltage Control Temperature Compensated Crystal OscillatorVCTCXO

Voltage Controlled OscillatorVCO

Universal Asynchronous Receiver/TransmitterUART

Time Division Multiple AccessTDMA

Time Division DuplexTDD

Travel AdapterTA

Side Tone Masking RatingSTMR

Pseudo SRAMPSRAM

Static Random Access MemorySRAM

Sending Loudness RatingSLR

Subscriber Identity ModuleSIM

Surface Acoustic WaveSAW

Real Time ClockRTC

Root Mean SquareRMS

Receiving Loudness RatingRLR

Radio FrequencyRF

Public Switched Telephone NetworkPSTN

Phase Locked LoopPLL

Programmable Gain AmplifierPGA

Printed Circuit BoardPCB

Power Amplifier ModulePAM

1. INTRODUCTION



2. PERFORMANCE

2. PERFORMANCEGD880 Product SPEC

3

2.1 Product Name

GD880 : WCDMA900/2100+EGSM/GSM850/DCS/PCS

(HSDPA 7.2Mbps / GPRS Class 12 / EDGE Class 12)

2.2 Supporting Standard

Item Feature Comment Supporting Standard WCDMA(FDD1,8)/EGSM/GSM850/DCS1800/PCS1900

with seamless handover Phase 2+(include AMR) SIM Toolkit: Class 1, 2, 3, C-E

Frequency Range WCDMA(FDD1) TX : 1920 – 1980 MHzWCDMA(FDD1) RX : 2110 – 2170 MHz WCDMA(FDD8) TX : 880 – 915 MHz WCDMA(FDD8) RX : 925 – 960 MHz EGSM TX: 880 – 915 MHz EGSM RX: 925 – 960 MHz GSM850 TX: 824 – 849 MHz GSM850 RX: 869 – 894 MHz DCS1800 TX : 1710 – 1785 MHz DCS1800 RX: 1805 – 1880 MHz PCS1900 TX: 1850 – 1910 MHz PCS1900 RX: 1930 – 1990 MHz

Application Standard WAP 2.0, JAVA 2.0

2.3 Main Parts : GSM Solution

Item Part Name Comment Digital Baseband MSM7227 : QualcommAnalog Baseband PM7540 : QualcommRF Chip RTR6285 : Qualcomm


2. PERFORMANCE

GD880 Product SPEC

4

2.4HW Features

Item Feature Comment Form Factor Bar type Battery 1) Capacity

Standard : Li-Ion, 900mAh

2) Packing Type : Soft PackSize Standard :

102 x 47.6 x 10.6 mm Weight 99g With Battery Volume TBD PCB All Layer (10) , 0.75tStand by time 2G Up to 340 hrs

3G Up to 300 hrs @ Paging Period 5 (2G) @ DRX 7 (3G)

Charging time 3 hrs @ Power Off / 900mAh Talk time 2G Up to 190mins

3G Up to 250 mins @ Power Level 5 (2G) @ Tx = 12dBm (3G)

RX sensitivity WCDMA(FDD1) : -106.7 dBmWCDMA(FDD8) : -103.7 dBm EGSM : -105 dBm GSM850 : -105 dBm DCS 1800 : -105 dBm PCS 1900 : -105 dBm

TX output power

WCDMA/ GSM/ GPRS

WCDMA : 24dBm/3.84MHz,+1/-3dBmEGSM : 33dBm GSM850 : 33 dBm DCS 1800 : 30 dBm PCS 1900 : 30 dBm

Class3(WCDMA) Class4 (EGSM) Class4 (GSM850) Class1 (PCS) Class1 (DCS)

EDGE GSM 900 : 27 dBmDCS 1800 : 26 dBm PCS 1900 : 26 dBm

E2 (GSM900) E2 (PCS) E2 (DCS)

GPRS compatibility GPRS Class 12EDGE compatibility EDGE Class 12SIM card type Plug-In SIM

3V /1.8V Display Main LCD

TFT Main LCD(3.2’, 480 x 854)

Built-in Camera 5M CMOS Camera 1.3M CMOS Camera (VGA)

Status Indicator Yes Keypad Function Key : 2

Side Key : 2 Function Key: CAM, Power Side Key : Volume up/down

1.�M VGA CMOS Camera

�20 hrs

180 mins225 mins

No

No



2. PERFORMANCE

GD880 Product SPEC

5

ANT Main : Internal Fixed TypeSystem connector 5 Pin Ear Phone Jack 3.5Phi, 4 Pole, StereoPC synchronization Yes Memory NAND Flash : 4Gbit

SDRAM : 4Gbit Speech coding FR, EFR, HR,AMRData & Fax Built in Data & Fax supportVibrator Built in VibratorBlue Tooth V2.1+ EDR MIDI(for Buzzer

Function) SW Decoded 72Poly

Music Player MP3/AAC/AAC+Video Player MPEG4, H.263,

Camcorder MPEG4, H.263,

Voice Recording Yes Speaker Phone modeSupport

Yes

Travel Adapter Yes CDROM Yes Stereo Headset Yes Data Cable Yes T-Flash (External Memory)

Yes


2. PERFORMANCE

GD880 Product SPEC

6

2.5SW Features

Item Feature Comment RSSI 0 ~ 7 LevelsBattery Charging 0 ~ 3 LevelsKey Volume 0 ~ 7 Level Audio Volume 1 ~ 20 LevelTime / Date Display Yes Multi-Language Yes English/Spanish/Portuguese/K

orean Quick Access Mode Dialing / Call Log / Contact / Menu /

Message / Camera / Favorite PC Sync Schedule / Phonebook / MEMO / SMS /

Download (Photo, file) Speed Dial Yes (1~9) Voice mail center -> 1 key Profile Yes CLIP / CLIR Yes Phone Book Name + 5 Numbers + 1 Memo + 2 e-mail

+ 3 Group Select + Picture + Ringtone + Anniversary day

Total 1000 Member

Last Dial Number Yes Total Call DB Max 100 LDN (SIM) N/A

Last Received Number

Yes Total Call DB Max 100 LDN (SIM) N/A

Last Missed Number Yes Total Call DB Max 100 LDN (SIM) N/A

Search by Number / Name

Name and Number

Group 30 Fixed Dial Number Yes Service Dial Number Yes Own Number Yes Voice Memo Yes Call Reminder Yes Network Selection Automatic

Mute Yes Call Divert Yes Call Barring Yes Call Charge (AoC) Yes Call Duration Yes SMS (EMS) 1000 (10) EMS : Release4

(Except Text align) SMS Over GPRS Yes EMS Melody / PictureSend / Receive / Save

Yes Receive only

MMS MPEG4 Send / Receive / Save

Yes Yes

- 1� -Copyright © 2010 LG Electronics. Inc. All right reserved.Only for training and service purposes


2. PERFORMANCE

GD880 Product SPEC

7

Long Message MAX 1000 Characters SMS 7pages

Cell Broadcast Yes Download Over the WAPGame Yes Calendar Yes Memo 50 World Clock Yes Unit Convert Currency/Surface/Length/Volume/Weig

ht/Temperature/Velocity Stop Watch Yes Wall Paper Yes WAP Browser Over WAP 2.0 ObigoDownload Melody / Wallpaper

Yes Over WAP

SIM Lock Yes Operator Dependent SIM Toolkit Class 1, 2, 3, C-EMMS Yes Obigo +LG MMS Client EONS Yes CPHS Yes V4.2ENS No Camera Yes 5M AF /

Digital Zoom : x16 JAVA Yes CLDC V1.1 / MIDP V2.0

Download Over WAP Voice Dial No IrDa No Bluetooth Yes V2.0

HSP, HFP, OPP, FTP(server), BPP, A2DP, AVRCP

FM radio Yes

GPRS Yes Class 12EDGE Yes Class 12Hold / Retrieve Yes Conference Call Yes Max. 6DTMF Yes Memo pad Yes TTY No AMR Yes SyncML Yes IM No Email Yes


2. PERFORMANCE

GD880 Product SPEC

8

2.6 HW SPEC. 1) GSM transceiver specification

Item Specification

Phase Error Rms : 5° Peak : 20 °

Frequency Error GSM : 0.1 ppm DCS/PCS : 0.1 ppm

EMC(Radiated Spurious Emission Disturbance)

GSM/DCS : < -28dBm

Transmitter Output power and Burst Timing

GSM : 5dBm – 33dBm ± 3dB DCS/PCS : 0dBm – 30dBm ± 3dB

Burst Timing <3.69usSpectrum due to modulation out to less than 1800kHz offset

200kHz : -36dBm 600kHz : -51dBm/-56dBm

Spectrum due to modulation out to larger than 1800kHz offset to the edge of the transmit band

GSM : 1800-3000kHz :< -63dBc(-46dBm) 3000kHz-6000kHz : <-65dBc(-46dBm) 6000kHz < : < -71dBc(-46dBm) DCS : 1800-3000kHz :< -65dBc(-51dBm) 6000kHz < : < -73dBc(-51dBm)

Spectrum due to switching transient 400kHz : -19dBm/-22dBm(5/0), -23dBm 600kHz : -21dBm/-24dBm(5/0), -26dBm

Reference Sensitivity – TCH/FS Class II(RBER) : -105dBm(2.439%)Usable receiver input level range 0.012(-15 - -40dBm)Intermodulation rejection – Speech channels

± 800kHz, ± 1600kHz : -98dBm/-96dBm (2.439%)

AM Suppression - GSM : -31dBm - DCS : -29dBm

-98dBm/-96dBm (2.439%)

Timing Advance ± 0.5T



2. PERFORMANCE

GD880 Product SPEC

9

2) WCDMA transmitter specification

Item Specification

Transmit Frequency Band1 : 1920 MHz ~ 1980 MHzBand8 : 880MHz~915MHz

Maximum Output Power +24 dBm / 3.84 MHz, +1 / -3 dB

Frequency Error within ±0.1 PPMOpen Loop Power Control Normal Conditions : within ±9 dB,

Extreme Conditions : within ±12 dB Minimum Transmit Power < -50 dBm /3.84 MHz

Occupied Bandwidth < 5 MHz at 3.84 Mcps (99% of power)Adjacent Channel Leakage Power Ratio (ACLR)

> 33 dB @ ±5 MHz,> 43 dB @ ±10 MHz

Spurious Emissions |f-fc| > 12.5 MHz

< -36 dBm / 1 kHz RW @ 9 kHz ≤ f < 150 kHz < -36 dBm / 10 kHz RW @ 150 KHz ≤ f < 30 MHz < -36 dBm / 100 kHz RW @ 30 MHz ≤ f < 1 GHz < -30 dBm / 1 MHz RW @ 1 GHz ≤ f < 12.75 GHz < -60 dBm / 3.84 MHz RW @ 869 MHz ≤ f ≤ 894 MHz < -60 dBm / 3.84 MHz RW @ 1930 MHz ≤ f ≤ 1900 MHz < -60 dBm / 3.84 MHz RW @ 2110 MHz ≤ f ≤ 2155 MHz < -67 dBm / 100 kHz RW @ 925 MHz ≤ f ≤ 935 MHz < -79 dBm / 100 kHz RW @ 935 MHz < f ≤ 960 GHz < -71 dBm / 100 kHz RW @ 1805 MHz ≤ f ≤ 1880 MHz < -41 dBm / 300 kHz RW @ 1884.5 MHz < f < 1919.6 MHz

Transmit Intermodulation < -31 dBc @ 5 MHz & < -41 dBc @ 10 MHz

when Interference CW Signal Level = -40 dBc Error Vector Magnitude < 17.5 %, when Pout ≥ -20 dBmPeak Code Domain Error < -15 dB at Pout -20 dBm


2. PERFORMANCE

GD880 Product SPEC

10

3) WCDMA receiver specification

Item SpecificationReceive Frequency Band1 : 2110 ~ 2170 MHz

Band8 : 925~960MHz Reference Sensitivity Level Band1 : BER < 0.001 when Îor = -106.7 dBm / 3.84 MHz

Band8 : BER < 0.001 when Îor = -103.7 dBm / 3.84 MHz Maximum Input Level BER < 0.001 when Îor = -25 dBm / 3.84 MHz Adjacent Channel Selectivity (ACS)

ACS > 33 dB where BER < 0.001 when Îor = -92.7 dBm / 3.84 MHz & Ioac = –52 dBm / 3.84 MHz @ ±5 MHz

Blocking Characteristic BER < 0.001 when Îor = -103.7 dBm / 3.84 MHz & Iblocking = -56 dBm / 3.84 MHz @ Fuw(offset) = ±10 MHz or Iblocking = -44 dBm / 3.84 MHz @ Fuw(offset) = ±15 MHz

Spurious Response BER < 0.001 when Îor = -103.7 dBm / 3.84 MHz & Iblocking = -44 dBm

Intermodulation BER < 0.001 when Îor= -103.7 dBm / 3.84 MHz & Iouw1 = -46 dBm @ Fuw1(offset) = ±10 MHz & Iouw2 = -46 dBm / 3.84 MHz @ Fuw2(offset) = ±20 MHz

Spurious Emissions < -57 dBm / 100 kHz BW @ 9 kHz ≤ f < 1 GHz< -47 dBm / 1 MHz BW @ 1 GHz ≤ f ≤ 12.75 GHz

Inner Loop Power Control In Uplink

Adjust output(TPC command)cmd 1dB 2dB 3dB +1 +0.5/1.5 +1/3 +1.5/4

0 -0.5/+0.5 -0.5/+0.5 -0.5/+0.5 -1 -0.5/-1.5 -1/-3 -1.5/-4 group(10equal command group) +1 +8/+12 +16/+24



2. PERFORMANCE

GD880 Product SPEC

11

4) HSDPA transmitter specification

Item Specification

Transmit Frequency Band1 : 1920 MHz ~ 1980 MHzBand8 : 880MHz~915 MHz

Maximum Output Power Sub-Test1=1/15, 2=12/15 21~25dBm / 3.84 MHz 3=13/15 4=15/8 20~25dBm / 3.84 MHz 5=15/7 6=15/0 19~25dBm / 3.84 MHz

HS-DPCCH

Sub-test in table C.10.1.4

Power step

Power step slot boundary

Power step size,

P [dB]

Transmitter power step tolerance [dB]

5

1 Start of Ack/Nack

6 +/- 2.3

2 Start of CQI 1 +/- 0.6 3 Middle of CQI 0 +/- 0.6 4 End of CQI 5 +/- 2.3

Spectrum Emission Mask

Sub-Test : 1=1/15, 2=12/15, 3=13/15, 4=15/8, 5=15/7, 6=15/0

Frequency offset from carrier △f

Minimum requirement Measurement Bandwidth

2.5 ~ 3.5 MHz -35-15×(△f-2.5)dBc 30 kHz 3.5 ~ 7.5 MHz -35-1×(△f-3.5)dBc 1 MHz 7.5 ~ 8.5 MHz -35-10×(△f-7.5)dBc 1 MHz

8.5 ~ 12.5 MHz -49dBc 1 MHz

Adjacent Channel Leakage Power Ratio (ACLR)

Sub-Test : 1=1/15, 2=12/15, 3=13/15, 4=15/8, 5=15/7, 6=15/0

> 33 dB @ ±5 MHz > 43 dB @ ±10 MHz

Error Vector Magnitude < 17.5 %, when Pout ≥ -20 dBm

5) HSDPA receiver specification

Item SpecificationReceive Frequency

Band1 : 2110 ~ 2170 MHzBand8 : 925 ~ 960Hz

Maximum Input Level(BLER or R), 16QAM Only

Sub-Test : 1=1/15, 2=12/15, 3=13/15, 4=15/8, 5=15/7, 6=15/0

BLER < 10% or R >= 700kbps


2. PERFORMANCE

GD880 Product SPEC

12

6) WLAN 802.11b transceiver specification

Item Specification

Transmit Frequency 2400 MHz ~ 2483.5 MHz ( CH1~CH13 )

Tx Power Level ≤ 20dBm under (Europe), ≤ 30dBm under (USA)

Frequency Tolerance within ±25 PPMChip clock FrequencyTolerance

within ±25 PPM

Spectrum Mask ≤ -30 @ fc-22MHz< f <fc-11MHz and fc+11MHz< f <fc+22MHz ≤ -50 @ f < fc-22MHz and f > fc+22MHz

Power ramp on/off time ≤ 2us

Carrier Suppression ≤ -15dBModulation Accuracy(Peak EVM)

≤ 35%

Spurious Emissions < -36 dBm @ 30MHz ~ 1GHz < -30 dBm above @ 1GHz ~ 12.75GHz < -47 dBm @ 1.8GHz ~ 1.9GHz < -47 dBm @ 5.15GHz ~ 5.3GHz

Rx Min input Sensitivity ≤ -76dBm(1Mbps,2Mbps,5.5Mbps,11Mbps) @ FER ≤ 8%

Rx Max input Sensitivity ≥ -10dBm(1Mbps,2Mbps,5.5Mbps,11Mbps) @ FER ≤ 8% Rx Adjacent ChannelRejection

≥ 35dB @FER ≤ 8%,interference input signal -70dBm@fc±25MHz(11Mbps)

GD880 Product SPEC

11

4) HSDPA transmitter specification

Item Specification

Transmit Frequency Band1 : 1920 MHz ~ 1980 MHzBand8 : 880MHz~915 MHz

Maximum Output Power Sub-Test1=1/15, 2=12/15 21~25dBm / 3.84 MHz 3=13/15 4=15/8 20~25dBm / 3.84 MHz 5=15/7 6=15/0 19~25dBm / 3.84 MHz

HS-DPCCH

Sub-test in table C.10.1.4

Power step

Power step slot boundary

Power step size,

P [dB]

Transmitter power step tolerance [dB]

5

1 Start of Ack/Nack

6 +/- 2.3

2 Start of CQI 1 +/- 0.6 3 Middle of CQI 0 +/- 0.6 4 End of CQI 5 +/- 2.3

Spectrum Emission Mask

Sub-Test : 1=1/15, 2=12/15, 3=13/15, 4=15/8, 5=15/7, 6=15/0

Frequency offset from carrier △f

Minimum requirement Measurement Bandwidth

2.5 ~ 3.5 MHz -35-15×(△f-2.5)dBc 30 kHz 3.5 ~ 7.5 MHz -35-1×(△f-3.5)dBc 1 MHz 7.5 ~ 8.5 MHz -35-10×(△f-7.5)dBc 1 MHz

8.5 ~ 12.5 MHz -49dBc 1 MHz

Adjacent Channel Leakage Power Ratio (ACLR)

Sub-Test : 1=1/15, 2=12/15, 3=13/15, 4=15/8, 5=15/7, 6=15/0

> 33 dB @ ±5 MHz > 43 dB @ ±10 MHz

Error Vector Magnitude < 17.5 %, when Pout ≥ -20 dBm

5) HSDPA receiver specification

Item SpecificationReceive Frequency

Band1 : 2110 ~ 2170 MHzBand8 : 925 ~ 960Hz

Maximum Input Level(BLER or R), 16QAM Only

Sub-Test : 1=1/15, 2=12/15, 3=13/15, 4=15/8, 5=15/7, 6=15/0

BLER < 10% or R >= 700kbps



2. PERFORMANCE

GD880 Product SPEC

13

7) WLAN 802.11g transceiver specification

Item Specification

Transmit Frequency 2400 MHz ~ 2483.5 MHz ( CH1~CH13 )

Tx Power Level ≤ 20dBm under (Europe), ≤ 30dBm under (USA)

Frequency Tolerance within ±25 PPMChip clock FrequencyTolerance

within ±25 PPM

Spectrum Mask ≤ -20 @ ±11MHz offset (9Mhz ~ 11MHz)≤ -28 @ ±20MHz offset (11MHz ~ 20Mhz) ≤ -40 @ ±30MHz offset (20MHz ~ 30Mhz)

Transmitter constellation error (rms EVM)

≤ -5dB

Spurious Emissions < -36 dBm @ 30MHz ~ 1GHz< -30 dBm above @ 1GHz ~ 12.75GHz < -47 dBm @ 1.8GHz ~ 1.9GHz < -47 dBm @ 5.15GHz ~ 5.3GHz

Rx Min input Sensitivity PER ≤ 10%-82dBm@6Mbps, -81dBm@9Mbps, -79dBm@12Mbps -77dBm@18Mbps, -74dBm@24Mbps, -70dBm@36Mbps -66dBm@48Mbps, -65dBm@54Mbps

Rx Max input Sensitivity ≥ -20dBm(6,9,12,18,24,36,48,54Mbps) @ PER ≤ 10% Rx Adjacent ChannelRejection

PER ≤ 10%,

ACR ≥ 16dB@6Mbps, ACR ≥ 15dB@9Mbps, ACR ≥ 13dB@12Mbps, ACR ≥ 11dB@18Mbps, ACR ≥ 8dB@24Mbps, ACR ≥ 4dB@36Mbps ACR ≥ 0dB@48Mbps, ACR ≥ -1dB@54Mbps

※ACR shall be measured by setting the desired signal's strength 3 dB above the rate-dependent sensitivity specified in min input sensitivity

8) GPS receiver specification

Item Specification Receive Frequency 1574.42 MHz ~ 1576.42 MHzMinimum Sensitivity 1 satellite ≥-142dBm, 7 satellites ≥ -147dBm at coarse time aiding


2. PERFORMANCE

GD880 Product SPEC

14

2.7 GD880 Figures



3. TECHNICAL BRIEF

3. Technical Brief

3. Technical Description

3.1 Digital Baseband(DBB/MSM7227)

3.1.1 General Description

A. Features(MSM7227)

WCDMA Rel ‘99 plus HSDPA and HSUPAGSM/GPRS/EDGEHigh-performance ARM1136JF-S™ application processor at up to 600 MHz; QDSP5000™ at 320 MHzHigh-performance ARM926EJ-S™ modem processor at up to 400 MHz; QDSP4000™ at 122.88 MHzJava® hardware acceleration for faster Java-based games and other appletsSupport for Bluetooth® 2.1 EDR via an external Bluetooth System-on-Chip (SoC)High-speed, serial mobile display digital interface (MDDI) that optimizes the interconnectioncost between the MSM device and the LCD panelReceive diversity support for WCDMA mode, thereby providing improved capacity and data throughputUSB 2.0 compliant high-speed USB core with limited OTG capabilitiesIntegrated high-speed USB PHYIntegrated wideband stereo codec for digital audio applicationsDirect interface to digital camera module with video front-end (VFE) image processingGPS position location capabilitiesVocoder support (GSM-HR, FR, EFR, AMR, and AMR-WB/+)Advanced 12 × 12 ×1.05 mm, 0.4 mm pitch, 560 NSPHigh-performance ARM1136JF-S 600 MHz application processorIndustry standard ARM926EJ-S 400 MHz embedded microprocessor subsystemQDSP5000 320 MHz application digital signal processing (ADSP)QDSP4000 122.88 MHz modem digital signal processing (MDSP)256 kB internal memory (IMEM) for graphics, internal functions, DSP, etc.Dual-memory buses separating the high-speed memory subsystem (EBI1) from low-speedperipherals (EBI2) such as LCD panelsEnhanced EBI1 memory support: 200 MHz bus clock for DDR SDRAMEBI2 supportAll modes and data rates for WCDMA frequency division duplex (FDD), with the following restrictionsFull SF range support from 4 to 256SMS (CS and PS)PS data rate – 384 kb/s DL/384 kb/s ULCS data rate – 64 kb/s DL/64 kb/s ULAMR (all rates)

3. TECHNICAL BRIEF


3. TECHNICAL BRIEF

3.2 Hardware Architecture

3. Technical Brief

Figure. Simplified Block Diagram of System

MINI Block Diagram

5Mega AFParallel Interface [0:9]

LBEH19UNBC

PCM I2CGSM FEMUART1/

DM

WCDMAGSM

VGA Camera

5Mega AFCamera

Camera I/F[0:9]

I2C

I2CGPS

GPS BT Wi-Fi

SDIO1

FMFM Audio R/L

Parallel Interface [2:9]

I2C

MSM7227

CAM I/F

MCP

RX

SBI

GSM8509001800

RX ADC

SSBI

EBI2 DATA

GSM FEMRTR6285

DM Camera I/F[0:9]

NANDFlash

3.2” FWVGA LCDMDDIGPS GPS ADC

RGBInterface

RGB 24bit

EDGEPAM

I2C

EBI2 ADDR

TXWCDMA9002100

1900

TX DACEBI1 DATAEBI1 ADDR

Duplexer

WCDMA PAM

DDRSDRAM2Gbit

Flash4Gbit

Charge Pump BD6084

8CH

LCD_PWM

SDIO2

Ambient LightSensor

RF Block8CH

(ALC)SDIO2

Speaker

Line O P/NHPH_R/L

EAR1OP/N Receiver Micro SD UART3/

UIM2

UART2/DM I2C

TouchSensor

ProximitySensor

Speaker AMP

E h R/L

TCXO_RTR_19.2MHz

3.5EarphonePM_SSBI USB I/F

MIC1P

UART2/UIM

I2C

Sensor

3-AxisSensor

Li

PWM

Headset AMPMIC2PEarphone R/L

Audio SubsystemLine L/R_IP FM Audio R/L

Earphone R/L

TRK_LO_ADJGPSD F/F

X-Tal(19.2MHz)

PM7540

SSBI

cro

US

Bne

ctor

USB 2.0 HS

USB

VBUS

OVP

LinearMotor

VCHG_VBUSTCXO_PM_19.2MHz

USIM

USIM Translator

UART1/DM : BT URRT2/DM : UART2(DP)UART2/UIM : USIMUART3/UIM2 : N.A

5pin

Mi

Con

n

MUICUART

D+ / D-

UART3/UIM2

3.2 Hardware Architecture

3. Technical Brief




3. TECHNICAL BRIEF

3. Technical Brief


<POWER Block1>POWER Block

MSM7227PM7540

Charging IC(NUS5530MN)

VCHG_VBUSTA (5PIN)

5.1V,700mA

+VPWR

VREG_MSMC1_1.35V (500m A)

VREG_MSME_1.8V (500m A)

VREG_MSMA_2.6V (300m A)

VDD

PM7540

VSW_MSME

VREG_MSMA

VSW_MSMC1

VSW_MSMC2 VREG_MSMC2_1.25V (500m A)

VDD_VCORE1 ( 1.2V , 203mA )


VDD_P1/P2/P8 /MDDI ( 1.8V ,MAX 10mA )

VDD_A / PLL ( 2,6V , MAX 65mA )CHG_CTL_NBATT FET N

Battery900mAh

VBATT

VREG_MSMP_2.6V (300m A) VREG_MSMP

VREG_GP5VREG_AUX2_2.9V (150m A)

VDD_P3/P4 (2.6V , MAX 25mA )

VDD_QFUSE (2.9V , MAX 10mA )

VDD_USBPHYE (3.3V , MAX 10mA )USBLDO(3.3V)

BATT_FET_N

+VPWR

MCPSDRAM ( 1.8V , MAX 180mA )

NAND ( 1.8V , MAX 30mA )

RTR6285

GSM PAM

WCDMA PAM

VDDA ( 2.7V , MAX 93mA )

VDDM ( 2.6V , MAX 10mA )


VREG_RF_2.7V (150mA)

VREG_SMPS_2.1V (300mA)

VREG_RFRX1

VSW_PA

VREG_GP2GPS LNA

VREG_LCD_2.8V (150mA)LCD moduleVIO (1.8V )

WCDMA PAM

VREG_SYNT

VREG_MSME2

VREG_GP1

Motion Sensor ( 2.7V, MAX ?mA)

VREG_GP6 VREG_SENSOR_2.6V (300mA) Proximity sensor( 2.7V, 20mA)

VREG_SYNTH_2.75VVREG_LCD_1.8V (150mA)

VREG_RGBC_1.5V (150mA)

FEMWVGA LCD Controller

CORE,DRAM,PLL,MD15 (1.5V )

MD18 PIO HIO (1 8V )

VDD (2.8V )

VREG_RFTX

VREG_GP3

VREG_MMC_3.0V (150mA)VREG_MMC MICRO SD slot (3.0V , , MAX mA )

VREG_TCXO_2.85V (50mA)VREG_TCXO TCXO (2.85V , , MAX 20mA )

GPS D FLIP-FLOP

VREG_RGBC_2.6V (150mA)MD18,PIO,HIO (1.8V )

DRAM,OSC (2.6V )

VREG_RFRX2

USIM SLOT (3.0V , , 1mA )VREG_RUIM_3.0V (150mA)VREG_RUIM1

VREG_MOTOR_3.0V (300mA) Linear Motor Driver ( 3.0V, mA ) VREG_WLAN

VREG_GP4

BACKUP BatteryVBACK_UP VCOIN


3. TECHNICAL BRIEF 3. Technical Brief


<Power Block2>

BD6084GUL

POWER Block

VREG_MSMP_2.6V

BD6084GUL

CAM_VDD_2.8V

CAM_VDD_1.8V

LDO2 (150mA)

LDO1 (150mA)

LDO3 (150mA)

5M CAMERA VIO

CAM_AF_2.8V

+V_PWR

LDO4 (150mA)

VBATVGA CAMERA

Touch ICTOUCH_VDD_3.3V

MLED ( 7ea )MLEDOUT ( 450mA )LCD_BACKLIGHT_4.8V

WIFI/BT/FM MODULEVBAT

VDDIO/VDDIO_SDVREG_MSMP_2.6V

LDO(2.8V) 26MHz TCXO for WIFI/BT/FM

MUIC

Audio Sub System



3. TECHNICAL BRIEF

3.3 Subsystem(MSM7227)

3.3.1 Architecture and baseband processing features

High-performance ARM1136JF-S 600 MHz application processor:- ARM® architecture v6- 32 kB instruction and 32 kB data cache- 256 kB ARM11™ L2 cache- 4 kB level-one tightly-coupled memory (TCM)- 8-stage pipeline, branch prediction with return stack- Supports the ARM and Thumb instruction sets, and Jazelle™ technology to enable direct- execution of Java byte-codes- Low-interrupt latencyIndustry standard ARM926EJ-S 400 MHz embedded microprocessor subsystem

- 16 kB instruction and 16 kB data cache- ARM version 5TEJ instructions- Higher-performance five-stage pipeline, Harvard cached architecture- Higher internal CPU clock rate with on-chip cache- Internal watchdog and sleep timers

QDSP5000 320 MHz application digital signal processing (ADSP)- 512 kB L2 cache

QDSP4000 122.88 MHz modem digital signal processing (MDSP)

3.3.2 Memory support features

256 kB internal memory (IMEM) for graphics, internal functions, DSP, etc.Dual-memory buses separating the high-speed memory subsystem (EBI1) from low-speed peripherals (EBI2) such as LCD panelsEnhanced EBI1 memory support: 200 MHz bus clock for DDR SDRAMEBI2 support:

- 1.8 or 2.6 V memory interface support- NAND/OneNAND™ flash memory interface- Boot from NAND/OneNAND- LCD and Universal Broadcast Modem™ (UBM™) support

3. Technical Brief


3. TECHNICAL BRIEF

3.3.3 Air interface features

3.3.3.1 WCDMA R99The MSM7227 device supports release 99, June 2004 of the WCDMA FDD standard, including the following features.All modes and data rates for WCDMA frequency division duplex (FDD), with the following restrictions:

- The downlink supports the following specifications.: Up to four physical channels, including the broadcast channel (BCH), if present: Up to three dedicated physical channels (DPCHs): Spreading factor (SF) range support from 4 to 256: Support for the following transmit diversity modes:

=> Space-time transmit diversity (STTD)=> Time-switched transmit diversity (TSTD)=> Closed-loop feedback transmit diversity (CLTD)

- The uplink supports the following specifications.: The uplink provides the following UE support.

=> One physical channel, eight TrCH, and 16 TrBks starting at any frame boundary=> A maximum data rate of 384 kb/s

Full SF range support from 4 to 256SMS (CS and PS)PS data rate – 384 kb/s DL/384 kb/s ULCS data rate – 64 kb/s DL/64 kb/s ULAMR (all rates)



3. TECHNICAL BRIEF

3.3.3.2 HSDPAThe MSM7227 device supports the release 5, December 2004 standard for HSDPA, including thefollowing features.The HSDPA enables PS data speeds up to 7.2 Mb/s on the downlink.HS-DSCH (HS-SCCH, HS-PDSCH, and HS-DPCCH) and the R99 transport channels, as defined in the 3GPP specificationsA maximum of four simultaneous HS-SCCH channels, as defined in the 3GPP specificationsA maximum of 10 HS-PDSCH channels, both QPSK and 16 QAM modulation and UE category 6 in software release 2.0, and category 8 in software release 3.0CQI and ACK/NACK on the HS-DPCCH channel, as defined in the 3GPP specificationsAll incremental redundancy versions for HARQ, as defined in the 3GPP specificationsCan switch between HS-PDSCH and DPCH channel resources as directed by the networkCan be configured to support any of the two power classes 3 or 4, as defined in the 3GPP R5 specifications (25.101)Network activation of compressed mode by SF/2 or HLS on the DPCH for conducting inter-frequency or inter-RAT measurements when the HS-DSCH is activeSTTD on both associated DPCH and HS-DSCH simultaneouslyCLTD mode 1 on the DPCH when the HS-PDSCH is activeSTTD on HS-SCCH when either STTD or CLTD mode 1 is configured on the associated DPCHTFC selection limitation on the UL factoring in transmissions on the HS-DPCCH, as required in TS 25.133

3.3.3.3 HSUPAThe MSM7227 device supports the release 6, March 2006 standard for HSUPA, including the following features.E-DCH data rates of up to 5.76 Mb/s for 2 ms TTI (UE category 6) uplinkN E-AGCH, E-RGCH and E-HICH channels for downlink, as defined in the 3GPP specifications. E-RGCH and E-HICH supports serving and non-serving radio links, with up to four radio links in the E-DCH active set.STTD on all HSUPA downlink channelsCLTD mode 1 on HS-PDSCH and DPCH along with HSUPA channelsAll incremental redundancy versions for HARQ and maximum number of HARQ retransmissions, as defined in 3GPP specificationsE-DCH channel on the uplink, as defined in the 3GPP specifications, with support for up to four E-DPDCH channelsHSUPA channels simultaneously with R99 and HSDPA channels, as defined in the 3GPP specificationsSwitch between HSUPA channels and DPCH channel resources as directed by the networkHandover using compressed mode with simultaneous E-DCH and HS-DSCH interactive/background and streaming QoS classes

3. Technical Brief


3. TECHNICAL BRIEF

3.3.3.4 GSM R99The following GSM modes and data rates are supported by the MSM7227 hardware. Support modes conform to release ‘99 specification of subfeatures.Voice features

- FR, EFR, AMR, HR, A5/1 and A5/2 cipheringCircuit-switched data features

- 9.6 k, 14.4 k, Fax- Transparent and non-transparent modes for CS data and fax- No subrates are supported.

3.3.3.5 GPRSPacket-switched data (GPRS)DTM (simple class A) operationMultislot class 12 data servicesCS schemes — CS1, CS2, CS3, and CS4GEA1, GEA2, and GEA3 cipheringMaximum of four Rx timeslots per frame

3.3.3.6 EDGEEDGE E2 power class for 8 PSKDTM (simple class A), multislot class 12Downlink coding schemes — CS 1-4, MCS 1-9Uplink coding schemes — CS 1-4, MCS 1-9BEP reportingSRB loopback and test mode B8-bit and 11-bit RACHPBCCH supportOne-phase/two-phase access proceduresLink adaptation and IRNACC, extended UL TBF

3. Technical Brief



3. TECHNICAL BRIEF

3.3.3.7 GPS position locationNext-generation gpsOne® solution with an enhanced GPS engineEnhanced filtering software optimizes GPS accuracy and availability.Full integration with Windows Mobile®, Java, and BREW®-based development environmentsMS-assisted, MS-based, MS-assisted/hybrid, and standalone GPS modesgpsOneXTRA Assistance™ for enhanced standalone GPS performanceSupport for UMTS control plane, GSM control plane, and OMA SUPL 1.0 user plane assisted-GPS protocols

3.3.4 Supported multimedia features

3.3.4.1 General multimediaAdditional general-purpose MIPS

- QDSP5000 aDSP at 320 MHz- Dedicated hardware accelerators and compression engines

Improved Java, BREW, and game performance

3.3.4.2 Camera interfaceHigh-quality digital camera processing, supporting CCD or CMOS image sensors up to 8-megapixelsUp to 12-bit data width with timing synchronization via discrete or embedded signalsYUV (4:2:2) or Bayer data typesA multitude of image signal processing capabilities

- Black level correction, bad pixel correction, and color correction- Radial-based LROC, zoom, FOV crop, and frame drop- Statistical techniques such as pre-zoom statistic gathering, AE/AWB, and histogram- Gain adjustments including 4-channel and white balance- Chroma subsampling, high-quality downscaler, and Bayer noise filter

3. Technical Brief

- �0 -LGE Internal Use Only Copyright © 2010 LG Electronics. Inc. All right reserved.Only for training and service purposes

3. TECHNICAL BRIEF

3.3.4.3 VideoDedicated support for market-leading codecs such as MPEG-4, H.263, H.264, and Windows Media®

- Integrated stereo wideband codec for music/digital clips- CMX® – 128 polyphonic MIDI wavetable synthesizer- Audio codecs: MP3, AMR-WB/+, AAC, AAC+™, EAAC+, and Windows Media

3.3.4.4 Graphics support3D graphics core - Up to WVGA (800 × 480) display support256 kB internal memory3D support: OpenGL ES 1.1, 2.0, JSR 297, D3DM2D support: OpenVG, SVG, JSR226, GDI, DdrawPerformance:

- 27 megapixel triangles/s (peak 3D triangle rate)- 166 megapixel/s peak 3D pixel draw rate

- 1660 megapixel/s effective 3D pixel rate- 532 megapixel/s peak 3D pixel reject rate- 207 megapixel four-component-vector instructions/s- 166 megapixel/s 2D/OVG pixel draw rate

3.3.4.5 Audio processingIntegrated wideband stereo codec

- 16-bit DAC with typical 88 dB dynamic range- Sampling rates up to 48 kHz on the speaker path and 48 kHz on the microphone path- Supports summing of an external device’s stereo single-ended analog signal- Supports summing of an I2S digital audio signal- Supports headset switch press detection

Enhanced acoustic echo cancellation for full-duplex callsPureVoice Audio AGC™Internal vocoder supporting 13 kb/s PureVoice®

3.3.4.6 LCD controllerParallel LCD supportRGB888 interface

3. Technical Brief

- �1 -Copyright © 2010 LG Electronics. Inc. All right reserved.Only for training and service purposes


3. TECHNICAL BRIEF

3.3.5 Supported connectivity features

High-speed USB port with integrated PHYFour universal asynchronous receiver transmitter (UART) serial ports

- Two high-speed (DM via UART, 4 Mb/s)- Emergency software download on UART2

Two UIM ports (shared with UART2 and UART3)- 1.8 V and 3.0 V support; IS-820-C compliant

Four SDIO ports (SD 2.0)- SD card, mini SD card, micro SD card, and MMC up to 52 MHz- Boot from SD

Display support- High-speed serial MDDI port that optimizes the interconnection cost between the MSM

device and LCD panel- MDDI V1.0 interface that supports up to 384 Mb/s link rate- Dual displays

: Primary => LCD controller (LCDC) or MDDI; FWVGA resolution; 16-bit, 18-bit, and 24-bit true color depth; on-screen buffer support

: Secondary => EBI2 interface; up to WQVGA resolution; 16-bit, 18-bit, and 24-bit true color depth

- Mobile display processor: MDP v.3Touchscreen supportAUX_PCM for Bluetooth, SDAC, and SADC supportInter-integrated circuit (I2C) interface for peripheral devicesBluetooth 2.1 + EDR (external BTS4025™ IC)Transport stream interface (TSIF) and the ability to support broadcast technologies, including the Qualcomm MediaFLO™ technology, DVB-H, ISDB-T, T-DMB, and S-DMB

3. Technical Brief


3. TECHNICAL BRIEF

3.3.6 Configurable GPIO features

133 general-purpose I/O pinsInput configurations: pull-up, pull-down, keeper, or no-pullOutput configurations: programmable drive currentTwo groupings: non-ETM (group 1) and ETM (group 2)

- Group 2 GPIO functions are emulated by off-chip field-programmable gate arrays (FPGAs) in ETM mode, without software knowledge.

Top-level mode multiplexer (TLMM) provides a convenient way to program groups of GPIOs.

3.3.7 Features of internal functions

SecureMSM™ platform secures OMA DRM v2.0 services and e-commerce transactions.- Robust protection of subsidy locks and phone identifiers such as the IMEI, ESN, and SIMLock- Enables compliance with CMLA and OMTP TR0 specifications

SecureMSM platform features include:- Secure boot – protects against reflashing attacks

: Ensure device starts with known and trusted software: Data integrity and authenticity of code is verified every time phone starts

- Secure execution environment: Maintains integrity of device at run time: Memory separation keeps secret application data secret and protects applications from attacks.

- Secure file system (SFS): Provides confidentiality for secret data through AES encryption and a 128-bit fused hardware key: Operations using hardware key are run in on-chip RAM, making observation extremely difficult: Provides integrity protection for non-secret (public) key and certificates

PLLs and clock generation and distribution- Multiple internal clock regimes- General-purpose clock, M/N counter, and PDM outputs- Internal watchdog and sleep timers

Modes and resetsPower optimizationJTAG/ETM

3. Technical Brief

- �� -Copyright © 2010 LG Electronics. Inc. All right reserved.Only for training and service purposes


3. TECHNICAL BRIEF

3.3.8 RF and PM interface features

Tx output chain controls- Multiple UMTS PA on/off and range controls- GSM PA power control- 14-bit generic RF controller (GRFC) interface

RTR6285 status and control- Tx enable and gain control

Rx/Tx analog baseband interfaces- Dual Rx analog baseband interfaces support UMTS diversity Rx plus S-GPS.- Tx analog baseband supports all phone transmission modes.

PM7540 status and control- SSBI- Interrupt port and other dedicated clock and control signals

TCXO enable and VCTCXO frequency control via PDM waveformThree housekeeping ADC inputs for monitoring analog sensors

- Selectable reference- 12-bit resolution, 10-bit accuracy, sampled at TCXO/8 (2.4 MHz)

3.3.9 Package features

560-pin nano-scale package (560 NSP)12 × 12 × 1.05 mm outline0.4 mm pitchMany ground pins for improved electrical grounding, mechanical strength, and thermal continuity

3. Technical Brief


3. TECHNICAL BRIEF

3.4 Power Block

3.4.1 General

MSM7227, included RF, is fully covered by PM7540(Qualcomm PMIC). PM7540 cover thepower of MSM7227, MSM memory, RF block, Bluetooth, USIM and TCXO.Major power components are :

PM7540(U400) : Phone main pmic BD6083GUL(Sub-pcb, U101) : LCD Backlight charge pump, Cam LDO, Touch LDONUS5530(U403) : main power path switch( battery charging circuit) MAX14528(U404) : OVP( Over voltage protection) IC

3.4.2 PM7540

The PM7540 device (Figure) integrates all wireless handset power management. The power management portion accepts power from all the most common sources – battery, external charger, adapter, coin cell back-up – and generates all the regulated voltages needed to power the appropriate handset electronics. It monitors and controls the power sources, detecting which sources are applied, verifying that they are within acceptable operational limits, and coordinates battery and coin cell recharging while maintaining The handset electronics supply voltages. Eight programmable output voltages are generated usinglow dropout voltage regulators, all derived from a common trimmed voltage reference.A dedicated controller manages the TCXO warm-up and signal buffering, and key parameters (under-voltage lockout and crystal oscillator signal presence) are monitored to protect against detrimental conditions.MSM device controls and statuses the PM7540 IC using Single Serial Bus Interface (SSBI) supplemented by an Interrupt Manager for time-critical information. Another dedicated IC Interface circuit monitors multiple trigger events and controls the power-on sequence.

3. Technical Brief



3. TECHNICAL BRIEF

Figure. PM7540 Functional Block Diagram

3. Technical Brief


3. TECHNICAL BRIEF

3.4.3 Charging control

A programmable charging block in PM7540 is used for battery charging. It is possible to set limits for the charging current. The external supply typically connects directly to pin (VCHG). The voltage on this pin (VCHG) is monitored by detection circuitry to ascertain whether a valid external supply is applied or not. For additional accuracy or to capture variations over time, this voltage is routed internally to the housekeeping ADC via the analog multiplexer. PM7540 circuits monitor voltages at VCHARGER and ICHARGE pins to determine which supply should be used and when to switch between the two supplies. These pins are connected to the Source (or emitter) and Drain (or collector) contacts of the pass transistor respectively.

3. Technical Brief

U8210 Charging Control block

PM7540Input PowerManagement

NUS5530

PM7540 only include charging controller.

So it is necessary external charging path TR.

This is NUS5530.

This part also include battery side power path.NUS5530



3. TECHNICAL BRIEF

Trickle Charging

Trickle Charging of the main battery, enabled through SBI control and powered from VDD, is provided by the PM7540 IC, The trickle charger is on-chip programmable current source that supplies current from VDD to pin (VBAT). Trickle charging can be used for lithium-ion and nickel-based batteries, with its performance specified below (3.2V). The charging current is set to 80mA.

Parameter Min Typ Max Unit

Trickle Current 60 80 100 mA

3. Technical Brief

PM7540Input PowerManagement


3. TECHNICAL BRIEF

Constant Current Charging

The PM7540 IC supports constant current charging of the main battery by controlling the charger pass transistor and the battery transistor. The constant current charging continues until the battery reaches its target voltage, 4.2V.

Constant Voltage Charging

Constant voltage charging begins when the battery voltage reaches a target voltage, 4.2V.The end of constant voltage charging is commonly detected 10% of the full charging current.

• Charging Method : CC & CV (Constant Current & Constant Voltage)

• Maximum Charging Voltage : 4.2V

• Maximum Charging Current : 660mA

• Nominal Battery Capacity : 900mAh

• Charging time : Max. 3h 30m

• Full charge indication current (icon stop current) : 50mA

• Cut-off voltage : 3.30V

3. Technical Brief

Indication Standby

Bar3 3.75 0.05V

Bar 3 → 2 3.75 0.05V

Bar 2 → 1 3.67 0.05V

Bar 1 → Blink 3.6 0.05V

Low Voltage,Warning message+ Blinking

3.6 0.05V (Stand-by) / 3.6 0.05V (Talk)

[Interval : 3min(Stand-by) / 1min(Talk)]

Power Off 3.3 0.05V

Battery icon display

≥



3. TECHNICAL BRIEF

3.5 External memory interface

A. MSM7227

The MSM7227 device was designed to provide two distinct memory interfaces. EBI1 was targeted for supporting DDR synchronous memory devices. EBI2 was targeted towards supporting slower asynchronous devices such as LCD, NAND flash, SRAM, NOR flash etc. To support the high-bandwidth, high-density, and low-latency requirements of the advanced on-chip applications, the MSM7227 IChas two high-speed, high-performance memory slave interfaces: the external bus interface 1 (EBI1)and the stack memory interface (SMI). To achieve higher bandwidth and better use of the memorydevice interface, the SMI accepts multiple commands for the external memory device. The SMIinterface acts as a slave device to all of the bus masters within the MSM device. The masters arbitrateto gain access to the SMI, and upon obtaining the access, they issue commands to the SMI. The busmasters are connected to the SMI through an advanced extensible interface (AXI) bus bridge (orglobal interconnect block) and communicate over a 64-bit, non-blocking AXI bus protocol. The AXIbus bridge provides the arbitration logic for all of the bus masters.

EBI1 Features- Support for only low-power memories at 1.8-V I/O power supply voltage- AXI bus frequencies up to 133 MHz- A 16-bit/32-bit static and dynamic memory interfaceDDR SDRAM interface features include:

- Supports both 32-bit DDR SDRAM devices, up to 133-MHz bus speed- Supports auto precharge and manual precharge- Supports partial refresh- Separate CKE pin per chip-select to support partial operation mode- Idle power down to save idling power consumption

EBI2 Features- Support for asynchronous FLASH and SRAM(16bit & 8bit). - Interface support for byte addressable 16bit devices(UB_N & LB_N signals).- 2Mbytes of memory per chip select.- Support for 8 bit/16bit wide NAND flash. - Support for parallel LCD interfaces, port mapped of memory mapped(8 or 16 bit)

Multi Chip Package : DDR SDRAM and NAND Flash merged 1 package 2Gbit Mobile DDR SDRAM(64Mb x32) / 4Gbit NAND Flash

3. Technical Brief

Table#1. External memory interface for GD880

1.8V

1.8V45ns / 400MHzHynix

NAND

Interface Spec

Product GrPart Name MakerOperation Voltage(Flash / DRAM)

Speed (Flash / DRAM)

H8BCS0UN0MCR-4EM SDRAM

4G (LB/256Mx16) NAND+4G (DDR400/16Mx4x�2*2_2CS_2CKE) SDRAM

H8B ES0UU0MCR-4EM


3. TECHNICAL BRIEF

3. Technical Brief

Figure. Simplified Block Diagram of Memory Interface

MSM7227

DDR

SDRAM

2Gbit

NAND

4Gbit

SDRAM_D[31:0]

SDRAM_ADDR[13:0]

nSDRAM_WEnSDRAM_CS

SDRAM_DCLK[1:0]SDRAM_CKEnSDRAM_RASnSDRAM_CAS

nNAND_FLASH_CS

nOE2

nWE2

nUB2

nLB2

nRESETOUT1

NAND_FLASH_READY

EBI2_DATA[15:0]

EBI1 EBI2

External Memory

(MICRO SD card)

MMC_DATA[3:0]

MMC_CMDMMC_CLK

SDRAM_DQM[3:0]

SDRAM_DQS[3:0]

4

MICROSD_DATA[�:0]

MICROSD_CM

MICROSD_CLK



3. TECHNICAL BRIEF

3.6 H/W Sub System

3.6.1 RF Interface

A. RTR6285 (WCDMA_Tx, GSM_Tx/Rx)

MSM7227 controls RF part(RTR6285) using these signals.SSBDT : SSBI I/F signals for control Sub-chipsetTX_ON : Power AMP on RF partRX0_I/Q_M/P,TX_I/Q_M/P : I/Q for T/Rx of RFTX_AGC_ADJ : control the gain of the Tx signal prior to the power amplifierDAC_REF : Reference input to the MSM Tx data DACs

B. the othersTRK_LO_ADJ: TCXO(19.2M) ControlPA_ON0/PA_RANGE0 : WCDMA(1900) TX Power Amp EnableANT_SEL[0-2]: Ant Switch Module Mode Selection(WCDMA,GSM Tx/Rx,DCS-PCS Tx/Rx)GSM_PA_BAND: GSM/DCS-PCS Band Selection of Power Amp GSM_PA_RAMP: Power Amp Gain Control of APC_IC GSM_PA_EN: Power Amp Gain Control Enable of APC_IC

C. ALM2412 (A-GPS LNA)* GPS_LNA_EN: GPS LNA Enable Signal (GPS LNA Shutdown)

3. Technical Brief

PA_ON0/PA_RANGE0/GPIB22 : WCDMA(2100, 900) TX Power Amp EnableANT_SEL[0-�], GPIO 72 ~75: Ant Switch Module Mode Selection(WCDMA,GSM Tx/Rx,DCS-PCS Tx/Rx)


3. TECHNICAL BRIEF

3. Common* REG_ON: If low the internal regulators will be disabled.* SLEEP_CLK: LPO clock (32.768kHz) input. Used for low-power mode timing.* CLK_IN: Crystal amplifier input or frequency reference input.* CLK_REQ: Crystal Circuit / Reference Clock Enable (active-high)

3. Technical Brief

D. LBEH19UNBC (BT / WiFi module )

1. WiFi* WLAN_CMD: WLAN SDIO Command Line.* WLAN_CLK: WLAN SDIO Clock Input.* WLAN_SDIO[3:0]: WLAN SDIO Data Line.* WLAN_RESET_N: Low asserting reset for WLAN core.* WLAN_HOST_WAKEUP: WL_HOST_WAKE signal output.

2. BT* BT_UART_RXD: Bluetooth UART Serial Input. * BT_UART_RTS: Bluetooth UART Request to Send. Active-low request.* BT_UART_CTS: Bluetooth UART Clear to Send. Active-low clear.* BT_UART_TXD: Bluetooth UART Serial Output.* BT_PCM_CLK: BT PCM clock, can be PCM-master (output) or PCM-slave (input).* BT_PCM_DIN: BT PCM data input.* BT_PCM_SYNC: BT PCM sync signal, can be PCM-master (output) or PCM-slave (input).* BT_PCM_DOUT : BT PCM data output.* BT_WAKEUP: BT Wakeup Input.* BT_HOST_WAKEUP: BT Host Wakeup Output* BT_RESET_N: Low asserting reset for BT core.



3. TECHNICAL BRIEF

3. Technical Brief

E. FM Radio interfaceFM_ANT : FM RF input.SLEEP CLK : External reference oscillator input. (32.768KHz)FM_AUDIO_R : Right audio line output – digital input data.FM_AUDIO_L : Left audio line output – digital frame synchronization.

Figure. Block Diagram of WiFi Interface

Figure. Block Diagram of BT Interface


3. TECHNICAL BRIEF

ANT_SEL[0:3]Main Antenna GPIO72~75

GSM PAMASM

GSM_PA_RAMPGSM_PA_EN

GSM_PA_BAND

RTR_TX_ONDCS PCS TX

DCS_PCS_OUT

GSM_OUT

PA_PWR_CTL

GPIO80

GPIO79

TX ONRF ON

DCS_PCS_OUT

GSM_OUT

VAPC

TX_EN

BS

ANT PCN_PCS_OUT

GSM_OUT

RF

ASM RTR_DAC_REF

4

DCS_PCS_TX

GSM_TX

4 GSM Band Rx

4

RTR_TX_I/Q

_

DAC_REF

I/Q_RTR_P/M

_

DAC_IREF

TX_I/Q P/N

LB_RF_OUT1

HB_RF_OUT1DCS_PCS_IN

GSM_INWCDMA_2100

MSM7227

transceiver

WCDMA PAM

DPX

4

4

4

W900_TX_OUT

RFOUT_LOW

4

PDET IN

RX_WCDMA_900RX_WCDMA_2100

GPS_IN

RTR_RX_I/Q

RTR_DRX_I/Q

I/Q_IP/M_CH0

I/Q_IP/M_CH1

PRX_I/Q P/N

DRX_I/Q P/NGPS_IN

WPRXSE2WPRXLBLB_RF_OUT2

GSM_INRFin_Low

RFOUT_LOW

WCDMA_850

MSM7227DPXW900

4RTR_SSBI

W2100_TX_OUTW2100_PA_ONW900_PA_ON

W_PA_R0

PDET_IN

RX_WCDMA_900

GPIO59

PA_ON0

GPIO_22

PA_RANGE0

SBDTTCXO

PDET_IN

VmodeVen_Low

Ven_HighRFin_High

RFOUT_HIGH

VCTCXODf/f

TRK_LO

PMIC_TCXO

RTR_TRK_LODPX

W2100RFOUT_HIGH

TCXO_PM_19.2MHz

TCXO_RTR_19.2MHz

RX_WCDMA_2100

TRK_LO_ADJ

PMICPM7540

_

GSM_PA_DAC_REFPMIC_SSBI

GPS AntennaGPS_IN

TCXO

GSM_BG_REF

GPIO106SBDT_SSBI

MPP_8

TCXO_OUTTXCO_IN

GPSLNA GPS_EN

3. Technical Brief

Figure. Block Diagram of RF Interface



3. TECHNICAL BRIEF

3. Technical Brief



3. TECHNICAL BRIEF

3.6.2 MSM Sub System

3.6.2.1 USIM InterfaceSIM interface scheme is shown in Figure.And, there control signals are followed

USIM_CLK: USIM Clock USIM_Reset: USIM ResetUSIM_Data: USIM Data T/Rx

3.6.2.2 UART InterfaceUART signals are connected to MSM GPIO through IO connector with 115200 bps speed.

3. Technical Brief

GPIO_Map Name Note

GPIO_86 UART3_RX Data_Rx

GPIO_87 UART3_TX Data_Tx

Table. UART Interface

Figure. SIM Interface

MSM7227 PM7540 USIMUSIM CLK

USIM Reset

USIM Data USIM Data

USIM Reset

USIM CLK

VREG_UIM 3.0V



3. TECHNICAL BRIEF

3.6.2.3 HS-USB

The universal serial bus (USB) is an interconnection standard widely supported by the electronic industry. The USB2.0 spec defines data rates as low-speed (1.5 Mbps), full-speed (12Mbps) and hi-speed (480 Mbps). When two devices are connected via a USB interface, one of the devices must act as a host, and the other device must act as a peripheral. The host is responsible for initiating and controlling traffic on the bus. The USB specification requires personal computers (PCs) to act as hosts, and other devices such as printers, keyboards, mice, etc. to act as peripherals. The OTG supplement creates a new class of devices called OTG devices. OTG devices can act as either hosts or peripherals, depending upon how they are connected and/or used.The MSM7227 device contains a new USB high-speed function that is based on a embedded UTMI+ core with a UTMI+ low pin interface (ULPI) compatible port. The MSM device’s ULPI interface connects to an external ULPI PHY chip to complete the design. The ULPI core embedded in the MSM along with the PM7540 IC and a USB high-speed PHY IC provide support for the high-speed interface.

3. Technical Brief

Name Note

USBH_CLK Input clock from TCXO

Table. HSUSB Signal Interface

Figure. USB block(MSM7227 Side & MAX14526 Side)

MSM7227

USBH_CLK

USBH_DMu-USB

Connector.

3.3V LDO

USBH_CS

USBH_DP MAX14526

DM

DP

TCXO.


3. TECHNICAL BRIEF

3.6.3 Side Key

There are 4 main key buttons that are controlled by MSM7227. Refer to the Side Key circuit. ‘Power Button’Key is connected to PMIC(PM7540:KPD_PWR_N).

3. Technical Brief

Table. Key Matrix Mapping Table

Figure. Power ON / OFF & Suspend Button Key circuit

KEY_COL[0] KEY_COL[1]

KEY_ROW[0] FOCUS VOL_DOWN

KEY_ROW[1] SHUTTER VOL_UP

470

R306

D302

KB300

PM_ON_SW

POWER ON



3. TECHNICAL BRIEF

3. Technical Brief

Figure. Camera Key Circuit

Figure. Volume Key Circuit

KB301 KB302

KEY_ROW[0]

KEY_ROW[1]

KEY_COL[1]

VOL.UPVOL.down

SW300

CC_

BB_

DAKEY_ROW[0]

KEY_ROW[1]

KEY_COL[0]

AFcapture


3. TECHNICAL BRIEF

3.6.4 Touch InterfaceIn GD880 touch screen sensor is an optically clear, solid state, high resolution capacitive touch solutionthat enables precise and advanced finger-based input for portable electronic devices.

Touch screen module is a glass ClearPad sensor with an attached flexible PCB with control electroniccomponents.There is a cover lens to protect the sensor assembly. The communication protocol to host is RMI over I2C.

3. Technical Brief

Figure. Touch Sensor Schematic

U200

LCD connector(CN100)

M5

Y18

AC19

AF18

Y17

U16

AC18

AF17

W16

AE17

AC17

Y16

AB17

W5

W3

V5

V6

AB9

V9

V8

Y9

W8

AB8

V3

V2

U2

U8

6M

8M

9M

8EA

7FA

8CA

6FA

7CA

6EA

11R

81B

A

81W

11

Y

71C

71B

61H

81H

71M

62G

01

Y

11T

01

W

61E

A7

01

_OIP

G6

01

_OI

PG

501

_O

IP

G401_

OI

PG

301

_O

IPG

201_

OI

PG

101

_OI

PG

00

1_OIP

G99

_OIPG

89

_OIP

G79

_OI

PG

69_

OI

PG

59_

OI

PG

49

_OI

PG

39_OI

PG

29_OIP

G1

9_OIP

G09

_OIPG

98

_OIP

G88_

OI

PG

78

_O

IPG

68_

OI

PG

58

_OI

PG

GPIO_57GPIO_58GPIO_59GPIO_60GPIO_61GPIO_62GPIO_63GPIO_64GPIO_65GPIO_66GPIO_67GPIO_68GPIO_69GPIO_70GPIO_71

GPIO_72_GRFC_9GPIO_73_GRFC_8GPIO_74_GRFC_7GPIO_75_GRFC_6GPIO_76_GRFC_5GPIO_77_GRFC_4GPIO_78_GRFC_3GPIO_79_GRFC_2GPIO_80_GRFC_1GPIO_81_GRFC_0

GPIO_82GPIO_83GPIO_84

0 12P T

K001

612R

N_TE

SE

R_TB

N_

TES

ER_

NAL

W

BT_HOST_WAKEUP

BT_PCM_DOUTBT_PCM_DINBT_PCM_SYNCBT_PCM_CLK

BT_WAKEUP

PU

EK

AW_T

SO

H_N

ALW

ANT_SEL3

GSM_PA_BANDGSM_PA_EN

ANT_SEL2ANT_SEL1

1R_

AP_

W

RTR_SSBI

AD

S_

C2I_

OI

DUA

NE_

OX

CTI

BS

S_CI

MP LCS_

C2I

_OID

UA

NE _

SAI

B_CI

M _S

H

N_TE

SE

R_TV

C_D

CL

MICROSD_DATA[0]MICROSD_DATA[1]MICROSD_DATA[2]MICROSD_DATA[3]

MICROSD_CMDMICROSD_CLK

LIN_MOTOR_EN

TOUCH_I2C_SCLTOUCH_I2C_SDA

N_

TESE

R_

DCL

TN

I_WS

_C

IUM

DI

_RE

KA

M_D

CL

CNY

SV_T

VC

_DC

L

ANT_SEL0

3.6.4 Touch InterfaceIn GD880 touch screen sensor is an optically clear, solid state, high resolution capacitive touch solutionthat enables precise and advanced finger-based input for portable electronic devices.

Touch screen module is a glass ClearPad sensor with an attached flexible PCB with control electroniccomponents.There is a cover lens to protect the sensor assembly. The communication protocol to host is RMI over I2C.

3. Technical Brief

Figure. Touch Sensor Schematic

U200

LCD connector(CN100)CN100

31 30

32 29

33 28

34 27

35 26

36 25

37 24

38 23

39 22

40 21

41 20

42 19

43 18

44 17

45 16

46 15

47 14

48 13

49 12

50 11

51 10

52 9

53 8

54 7

55 6

56 5

57 4

58 3

59 2

60 1

G1G2

G3G4

VREG_LCD_1.8VVREG_LCD_2.8V

0.1u

C1120.1u

C113

TOUCH_VDD_2.8V

0.1u

C114

VREG_MSMP_2.6V

1211R

DNI311R

TOUCH_I2C_SDA

TOUCH_I2C_SCL

TOUCH_ACK

LCD_RESET_NLCD_MAKER_ID

MLED_OUTMLED1

MLED3

MLED5

LCD_PWM

MLED2

MLED4

MLED6

FLT_LCD_R[7]

FLT_LCD_R[6]

FLT_LCD_R[4]FLT_LCD_R[3]FLT_LCD_R[2]FLT_LCD_R[1]FLT_LCD_R[0]FLT_LCD_G[7]FLT_LCD_G[6]

FLT_LCD_G[2]

FLT_LCD_G[0]FLT_LCD_B[7]FLT_LCD_B[6]FLT_LCD_B[5]FLT_LCD_B[4]FLT_LCD_B[3]FLT_LCD_B[2]FLT_LCD_B[1]FLT_LCD_B[0]

FLT_LCD_SCLFLT_LCD_SDO

FLT_LCD_HSYNCFLT_LCD_VSYNC

FLT_LCD_SDI

FLT_LCD_DEN

FLT_LCD_G[1]

FLT_LCD_R[5]

FLT_LCD_G[4]FLT_LCD_G[3]

FLT_LCD_G[5]

FLT_LCD_CS_N

MLED7

FLT_LCD_DCLK

U200

LCD connector(CN100)



3. TECHNICAL BRIEF

Figure. Touch Sensor Block Diagram

MSM7227(U200)

GPIO2 : TOUCH_IC2_SCLGPIO3 : TOUCH_IC2_SDA

GPIO84 : TOUCH_ACK

T1021(TOUCH IC)

VREG_TOUCH 3.0V

TOUCH PAD

SENSORX/Y Channels

LCD MODULE


3. TECHNICAL BRIEF

3.7.1 Overview of Audio & Sound & BT path

3. Technical Brief

3.7 Audio and sound

Figure. Block diagram of Audio & Sound path

PCM

AUDIO_I2C_SDA

Receiver

Head Set

MSM7200A

(CPU)

BT_PCM_OUT

XTALP

ANT

LBEH19NUBC(WLAN+BT+FM)

AudioSubsystem

MAX9877

SDASCL

BT_PCM_IN

BT_PCM_SYNCBT_PCM_CLK

AUDIO_I2C_SCL

HPH_L

HPH_R

MIC 1

3.5 PiEARJACK

Speaker

80pinMain & sub

I/F connector

MIC 2

LINE_OP

LINE_ON

Analogswitch

SPK_N

SPK_P

RCV_NRCV_P

RCV_NRCV_N

MIC_PMIC_P

MIC_1P

MIC_2P

FM_AUDIO_L

FM_AUDIO_R

EAR_MICP

EAR_LEAR_R

3.7.1 Overview of Audio & Sound & BT path

3. Technical Brief

3.7 Audio and sound

Figure. Block diagram of Audio & Sound path

PCM

AUDIO_I2C_SDA

Receiver

Head Set

MSM7200A

(CPU)

BT_PCM_OUT

XTALP

ANT

LBEH19NUBC(WLAN+BT+FM)

AudioSubsystem

MAX9877

SDASCL

BT_PCM_IN

BT_PCM_SYNCBT_PCM_CLK

AUDIO_I2C_SCL

HPH_L

HPH_R

MIC 1

3.5 PiEARJACK

Speaker

80pinMain & sub

I/F connector

MIC 2

LINE_OP

LINE_ON

Analogswitch

SPK_N

SPK_P

RCV_NRCV_P

RCV_NRCV_N

MIC_PMIC_P

MIC_1P

MIC_2P

FM_AUDIO_L

FM_AUDIO_R

EAR_MICP

EAR_LEAR_R



3. TECHNICAL BRIEF

The MSM7227 audio front end comprises the stereo wideband codec, PCM interface,and additional DSP audio processing.The stereo wideband codec allows the MSM7227 device to support stereo music/ringermelody applications in addition to the 8 kHz voice band applications on the forward link.In the audio transmit path, the device operates as 13-bit linear converter with software,selectable 8 kHz and 16 kHz sampling rate. In the audio receive path, the device operatesas a software-selectable 13-bit or 16-bit linear converter with software selectable 8 kHz,16 kHz, 22.05 kHz, 24 kHz, 32 kHz, 44.1 kHz, or 48 kHz sampling rate. Through software,the Rx path can be configured as either a mono or stereo output.New to the MSM7227 device is a transmit (Tx) ADC path that now supports stereowideband sampling.The integrated codec contains all of the required conversion and amplification stages forthe audio front end. The codec operates as a 13-bit linear codec with the transmit (Tx) and receive (Rx) filters designed to meet ITU-T G.712 requirements. The codec includesa programmable side tone path for summing a portion of the Tx audio into the Rx path.

An on-chip voltage/current reference is provided to generate the precise voltages and currents required by the codec. This circuit requires a single capacitor of 0.1 μF to beconnected between the CCOMP and GND pins. The on-chip voltage reference also provides a microphone bias voltage required for electret condenser microphones typically used in handset applications. The MICBIAS output pin is designed to provide 1.8 V DC while delivering as much as 1 mA of current. Audio decoder summing and headset switchdetection are included.The codec interface includes the amplification stages for both the microphone andearphone. On the transmit (Tx) path, the interface supports two differential microphoneinputs, a differential auxiliary input, and a stereo line input. On the receive (Rx) path theinterface supports one differential earphone output, a stereo single-ended headphoneoutput, one differential auxiliary output, and stereo single-ended line outputs.The codec is configured by the codec SBI registers. The codec interface is shown inFigure.Also part of the audio front end is the PCM interface. The PCM interface allows for an

external codec to be used instead of the internal codec. This interface can be used in I2Smode which will allows for an external stereo DAC to be used.Finally, the audio front end includes additional DSP audio processing that does gains,filtering and other audio processing.The DSP audio processing is configured through the QDSP5000 command types and is

not directly controlled by the microprocessor.

3. Technical Brief

3.7.2 Audio signal processing & interface

3.7.2.1 MSM7227 audio interface


3. TECHNICAL BRIEF

3. Technical Brief

Figure. Detailed diagram of MSM7227 audio interface

3. Technical Brief

3.7.2.2 MAX9877 audio interface

The MAX9877 combines a high-efficiency Class D audio power amplifier with a stereo Class AB capacitorless DirectDrive® headphone amplifier. Maxim’s 3rdgeneration, filterless Class D amplifier with active emissions limiting technology provides Class AB performance with Class D efficiency.The MAX9877 delivers up to 725mW from a 3.7V supply into an 8Ω load with 87% efficiency to extend battery life. The filterless modulation scheme combined with activeemissions limiting circuitry and spread-spectrum modulation greatly reduces EMI while eliminating the need for output filtering used in traditional Class D devices.The stereo Class AB headphone amplifier in the MAX9877 uses Maxim’s patented DirectDrive architecture, that produces a ground-referenced output from a single supply, eliminating the need for large DC-blocking capacitors, saving cost, space, and component height.The device utilizes a user-defined input architecture, three preamplifier gain settings, an input mixer, volume control, comprehensive click-and-pop suppression, and I2C control. A bypass mode feature disables the integrated Class D amplifier and utilizes an internal DPST switch to allow an external amplifier to drive the speaker that is connected at the outputs of the MAX9877.The MAX9877 is available in a thermally efficient, space-saving 20-bump WLP package.

3. Technical Brief

Figure Detailed diagram of MSM7227 audio interfaceFigure. Detailed diagram of MSM7227 audio interface



3. TECHNICAL BRIEF

Figure. Detailed diagram of MAX9877 audio interface


3. TECHNICAL BRIEF

3. Technical Brief

MSM7227 Block Handset main MIC Block

8H

6F

5F

01

J

01

H

9H

01

C

01

B

9C

9B

8F

8E

7F

7E

7C

7B

6C

5C

6B

5B

PI

_R

_E

NI

LN

I_R

_E

NIL

PI_

L_

ENI

LN

I_

L_

ENI

LP

1CIM

N1

CI

MP

2C

IM

N2

CI

MP

IX

UA

NI

XU

A

PO_

EN

IL

NO

_E

NI

LP

O_1

RA

EN

O_

1RA

ET

UO

XU

AR

_H

PH

L_

HP

H

PMO

CC

SAI

B_

CIM

FE

RV

_H

PH

MIC_BIAS

C201

47p

u1202

C

u1.03 02

C

u1 .040 2

C

502C

u1.0

u1 .060 2

C

u1.0702

C

u18 02

C

C210

0.1u

C21122u

33p

C7

39p

C223

MIC_VGND|GND

DNG

V_C

IM

R_O I

DU

A_MF

L_O I

DU

A_MF

NO_

ENI L

PO_

ENIL

P_V

CR

N_V

CR

L_H

PH

R_H

PH

PCI

M_R

AE

P_CI

M

nip

5E

ot eso

lC

+VPWR

DNI

C1

0.1u

C400

10u

604C

15p

704C

47p

804C

MIC400

4

3

2

1P

G1

G2

O

U400

94

63

52

71

8101B0 1A

1B1 S1

2B0 2A

2B1 S2

GND VCC

MIC401

4

3

2

1P

G1

G2

O

MIC_BIASMIC_BIAS

MIC_SEL

MIC_PMIC_1P

MIC_1P

MIC_2P

MIC_2PMIC1_VGNDMIC1_VGND

MIC2_VGND

MIC2_VGND

MIC2_VGND

MIC_VGNDSUMY0010609SMD, TOP

SMD, TOP

SUMY0010609

+VPWR

DNI

C1

0.1u

C400

10u

604C

15p

704C

47p

804C

MIC400

4

3

2

1P

G1

G2

O

U400

94

63

52

71

8101B0 1A

1B1 S1

2B0 2A

2B1 S2

GND VCC

MIC401

4

3

2

1P

G1

G2

O

MIC_BIASMIC_BIAS

MIC_SEL

MIC_PMIC_1P

MIC_1P

MIC_2P


MIC2_VGND

MIC2_VGND

MIC2_VGND


SMD, TOP

SUMY0010609

+VPWR

DNI

C1

0.1u

C400

10u

604C

15p

704C

47p

804C

MIC400

4

3

2

1P

G1

G2

O

U400

94

63

52

71

8101B0 1A

1B1 S1

2B0 2A

2B1 S2

GND VCC

MIC401

4

3

2

1P

G1

G2

O

MIC_BIASMIC_BIAS

MIC_SEL

MIC_PMIC_1P

MIC_1P

MIC_2P


MIC2_VGND

MIC2_VGND

MIC2_VGND


SMD, TOP

SUMY0010609



3. TECHNICAL BRIEF

3. Technical Brief

Audio Subsystem(MAX9877) Block

3.5pi Ear/mic Set Jack Block

1R

2.2K

D505

U500

5

3 24 1

VOUTVDDGNDCE D

NG

P

1800FB503

1M705R

VREG_MSMP_2.6V

1800FB504

10K105R

2.2u

405

C

VREG_MSMP_2.6V

22p

C514D501

1800

FB502

J500

C8

100p

2R

1K

47

R508

D502100n

L500

47p

C517

47p

C518 D503

4.7u

C503

FM_ANT

EAR_SENSE

HOOK_ADC

HOOK_ADC|EAR_MICP

EAR_MICP

HS_MIC_BIAS_EN

EAR_REAR_L

Close

EAR_SENSE

OpenHIGH (detect)

LOW

S/W

1u

125C

4.7K505R

4.7K005R

VREG_MSMP_2.6V

C505

1u

10u

C5061u

205C

22nC509

22nC510

220nC508

220nC507

+VPWR

IC500

4C

3D

B4

D4

C3

B3

B5B2

D5C2

C1

D2

D1

A2

A1A5

A4

5C

1B

3A

SS

V

DD

V

DD

VPC1N

C1P HPR

HPL

INA2

INA1

INB2

INB1 OUT+

BIAS OUT-

SDA

SCL

RXIN+

RXIN- DN

G

DN

GP

1u

105C

AUDIO_I2C_SDA

LINE_ONLINE_OP

HPH_LHPH_R

AUDIO_I2C_SCL

SPK_N

EAR_R

EAR_L

SPK_P


3. TECHNICAL BRIEF

GD880 has two cameras : 5M Pixel CMOS Camera and VGA camera.Below figures shows the 5M camera I/F

3.8.1 5 Mega Camera Interface

3. Technical Brief

3.8 Camera / LCD

Figure. Schematic of 5 Mega Camera I/F

10u

C200

33p

C201

CN201

17

16

15

14

13

12

11

10

9

8

7

6

5

314

323

332

341

30

29

28

27

26

25

24

23

22

21

20

19

18

CAM_VDD_1.8V

0.1u

C207

CAM_AF_2.8V

CAM_VDD_2.8V

120

FB200

0.1u

C208

0.1u

C206

CAM_PCLK

CAM_VSYNCCAM_HSYNC

CAM_MCLK

MCAM_RESET

CAM_I2C_SCLCAM_I2C_SDA

S_CAM_DATA[0]S_CAM_DATA[1]S_CAM_DATA[2]S_CAM_DATA[3]S_CAM_DATA[4]S_CAM_DATA[5]S_CAM_DATA[6]S_CAM_DATA[7]S_CAM_DATA[8]S_CAM_DATA[9] MCAM_PWDN

5M CAMERA CON.

7.5pF

FL200

01

5

64

73

82

91INOUT_A1 INOUT_B1

INOUT_A2 INOUT_B2

INOUT_A3 INOUT_B3

INOUT_A4 INOUT_B4

1G

2G

7.5pF

FL201

01

5

64

73

82

91INOUT_A1 INOUT_B1

INOUT_A2 INOUT_B2

INOUT_A3 INOUT_B3

INOUT_A4 INOUT_B4

1G

2G

7.5pF

FL202

01

5

64

73

82

91INOUT_A1 INOUT_B1

INOUT_A2 INOUT_B2

INOUT_A3 INOUT_B3

INOUT_A4 INOUT_B4

1G

2G

CAM_PCLKCAM_HSYNC

CAM_DATA[7]CAM_DATA[6]CAM_DATA[5]CAM_DATA[4]

CAM_DATA[3]CAM_DATA[2]CAM_DATA[1]CAM_DATA[0]S_CAM_DATA[0]

S_CAM_DATA[1]S_CAM_DATA[2]|S_VGA_CAM_DATA[0]S_CAM_DATA[2]

S_CAM_DATA[3]|S_VGA_CAM_DATA[1] S_CAM_DATA[3]

S_CAM_DATA[4]|S_VGA_CAM_DATA[2] S_CAM_DATA[4]S_CAM_DATA[5]|S_VGA_CAM_DATA[3] S_CAM_DATA[5]S_CAM_DATA[6]|S_VGA_CAM_DATA[4] S_CAM_DATA[6]S_CAM_DATA[7]|S_VGA_CAM_DATA[5] S_CAM_DATA[7]

S_CAM_DATA[8]|S_VGA_CAM_DATA[6] S_CAM_DATA[8]S_CAM_DATA[9]|S_VGA_CAM_DATA[7] S_CAM_DATA[9]

CAM_DATA[8]CAM_DATA[9]FLT_CAM_HSYNCFLT_CAM_PCLK

1608

1608

EMI FILTER



3. TECHNICAL BRIEF

Table. Interface between 5M Camera Module and MAIN Board

3. Technical Brief

NO NAME TYPE Description

1 S_CAM_MCLK Input Master clock input

2 GND Ground Ground

3 S_CAM_PCLK Output CAMERA clock output

4 GND Ground Ground

5~14 DATA[0]~[9] NC NC

15 NC NC NC

16 NC Output Data line

17 GND Ground Ground


19 CAM_VDD_AF_2.8V Power AF Motor power (2.8V)


21 S_MCAM_PWDN Input Camera Power Down (Active “H”)


23 S_CAM_HSYNC Input SYNC

24 S_CAM_VSYNC Input SYNC


26 S_CAM_I2C_SCL Input I2C Clock

27 S_CAM_I2C_SDA Input/Output I2C Data


29 S_MCAM_RESET_N Input Camera reset (Active “L”)


31 CAM_VDD_2.8V Power Digital Power (2.8V)

32 CAM_VDD_1.8V Power Digital Power (1.8V)


34 CAM_VDD_2.8V Input Digital Power (2.8V)

The camera port supply 64MHz master clock to camera module and receive serial data from camera module. And MSM7227 supply converted 8bits data, 48MHz pixel clock(max.15fps@ full resolution), vertical sync signal, horizontal sync signal, reset signal to MSM7227 again. The camera module is controlled by I2C port from MSM7227.

6MHz master clock60MHz pixel clock


3. TECHNICAL BRIEF

3.8.2 VGA Camera Interface

3. Technical Brief

Figure. Schematic of VGA Camera Module and I/F

The VGA Camera module is mounted to SPK FPCB. Its interface is dedicated camera interface port in MSM7227. The camera port supply 24MHz master clock to camera module and receive 19.2MHz pixel clock (max.30fps@VGA), vertical sync signal, horizontal sync signal, reset signal and 8bits data from camera module. The camera module is controlled by I2C port from MSM7227.

100p

C210

CN200

4140

4239

4338

4437

4536

4635

4734

4833

4932

5031

5130

5229

5328

5427

5526

5625

5724

5823

5922

6021

6120

6219

6318

6417

6516

6615

6714

6813

6912

7011

7110

729

738

747

756

765

774

783

792

801

100

R205

DNI

C2047.5p

C203

1

R201

470

R211

7.5p

C214

4.7K902R

4.7K012R

470

R212

470

R213

RW

PV+

V8.1_D

CL_G

ER

V

V5.1_B

GR_

GE

RV

V6 .2_B

GR_

GE

RV

V8.2_D

CL_G

ER

V

V0.3_C

MM_

GE

RV

V0.3_R

OTO

M_G

ER

V

470

R214

V6.2_P

MS

M_G

ER

V

56K512R

56K612R

CAM_VDD_2.8V

VREG_MSMP_2.6V

V6.2_R

OS

NE

S_G

ER

V

RCV_P

RCV_N

VBACK_UP

MIC_BIAS

LCD_CVT_INT

LCD_CVT_RESET_N

TOUCH_I2C_SDA

TOUCH_I2C_SCL

KEY_ROW[0]

KEY_ROW[1]

KEY_COL[0]

KEY_COL[1]

MOTION_INT

LCD_SUBPM_RESET_N

LCD_SUBPM_I2C_SCL

LCD_SUBPM_I2C_SDA

MOTION_I2C_SCL

MOTION_I2C_SDA

PROXI_I2C_SCL

PROXI_I2C_SDA

PROXI_OUT

LIN_MOTOR_EN

LIN_MOTOR_PWM

MICROSD_CLK

MICROSD_CMD

SPK_P

SPK_NMIC_SEL

MIC_P

MICROSD_DET_N

MICROSD_DATA[3]

MICROSD_DATA[2]

MICROSD_DATA[1]

MICROSD_DATA[0]

TOUCH_ACK

LCD_RESET_N

LCD_CVT_VSYNC

MDDI_P_DATA_P

MDDI_P_STB_P

LCD_MAKER_ID

MDDI_P_STB_M

MDDI_P_DATA_M

CAM_VSYNC

CAM_DATA[7]

CAM_DATA[6]

CAM_DATA[5]

CAM_DATA[4]

CAM_DATA[3]

CAM_DATA[2]

CAM_DATA[1]

CAM_DATA[0]

CAM_MCLK

VGA_CAM_PWDN

VGA_CAM_RESET_N

MCAM_RESET

CAM_I2C_SCL

CAM_I2C_SDA

CAM_DATA[8]

CAM_DATA[9]

MCAM_PWDN

PM_ON_SW

MIC_VGND

FLT_CAM_HSYNC

FLT_CAM_PCLK

MAIN & SUB I/F CONNECTOR

0.1u

C211

0.1u

C212

60FB201

U200

1F

E3E4

E2A5

C4

A4

D4D6

C3C5

C2D3

C1C6

B4B5

B2

B1

B3

D2E5

D1B6

A3A2IOVDD DCLK

DVDD HSYNC

AVDD VSYNC

DATA0

DATA1

DATA2

EXTCLK DATA3

PWRDWN DATA4

RESET DATA5

SDA DATA6

SCL DATA7

GND1

GND2

VDD15_1 GND3

VDD15_2 GND4DN

GP

0.1u

C209

CAM_VDD_2.8VCAM_VDD_1.8V

D200

CAM_PCLK

CAM_VSYNCCAM_HSYNC

CAM_MCLKVGA_CAM_PWDN

VGA_CAM_RESET_N


S_VGA_CAM_DATA[0]S_VGA_CAM_DATA[1]S_VGA_CAM_DATA[2]S_VGA_CAM_DATA[3]S_VGA_CAM_DATA[4]S_VGA_CAM_DATA[5]S_VGA_CAM_DATA[6]S_VGA_CAM_DATA[7]

SUB FPCB12MHz



3. TECHNICAL BRIEF

3. Technical Brief

3.8.3 LCD module

Figure. LCD I/F Block Diagram

LCD_BL_EN

I2C

MDDI_P_DATA_PMDDI_P_DATA_M

MDDI_P_STB_MMDDI_P_STB_P

LCD_CVT_RESETLCD_CVT_INT

LCD_CVT_VSYNC

LCD_RESET_N

3.2’ TFT LCD

LCD backlight control

LCD module

BD6084GULLCD Backlight Driver2

MSM7227

7

PM7540

VREG_RGB_1.5VVREG_RGB_2.6VVREG_LCD_1.8VVREG_LCD_2.8V

S1D13775B00B60LRGB converter

24

4

WLED1:7

WLED_PWR

LCD_R[7:0]/B[7:0]/G[7:0]

LCD_SYNC

LCD_CS_N

LCD_SDI

LCD_SCL

LCD_RESET_N

I/O Vcc(1.8V)Vcc(2.8V)


3. TECHNICAL BRIEF

3.8.4 Display

Figure. Schematic of LCD connector (in Sub PCB)

3. Technical Brief

LCD module is connected to Main PCB with 60-pin connector(AXT660124). The LCD is controlled by RGB Interface in S1D13775B00B60L that is converter MDDI to RGB.

CN100

31 30

32 29

33 28

34 27

35 26

36 25

37 24

38 23

39 22

40 21

41 20

42 19

43 18

44 17

45 16

46 15

47 14

48 13

49 12

50 11

51 10

52 9

53 8

54 7

55 6

56 5

57 4

58 3

59 2

60 1

G1G2

G3G4


0.1u

C1120.1u

C113

TOUCH_VDD_2.8V

0.1u

C114

VREG_MSMP_2.6V

1211R

DNI311R

TOUCH_I2C_SDA

TOUCH_I2C_SCL

TOUCH_ACK


MLED_OUTMLED1

MLED3

MLED5

LCD_PWM

MLED2

MLED4

MLED6

FLT_LCD_R[7]

FLT_LCD_R[6]


FLT_LCD_G[2]




FLT_LCD_SDI

FLT_LCD_DEN

FLT_LCD_G[1]

FLT_LCD_R[5]


FLT_LCD_G[5]

FLT_LCD_CS_N

MLED7

FLT_LCD_DCLK

MINI_3.2"_LCD

3.8.4 Display

Figure. Schematic of LCD connector (in Sub PCB)

3. Technical Brief

LCD module is connected to Main PCB with 60-pin connector(AXT660124). The LCD is controlled by RGB Interface in S1D13775B00B60L that is converter MDDI to RGB.



3. TECHNICAL BRIEF

Table. Interface between 5M Camera Module and SUB Board

3. Technical Brief

3.8.5 Pin DescriptionInput Signal and Power: Pin Description (60Pin, AXT660124


3. TECHNICAL BRIEF

Table. Interface between LCD Module and MAIN Board

3. Technical Brief



3. TECHNICAL BRIEF

When call connected, the object is moved nearer to the proximity sensor.LCD backlight and Touch screen is disable operation automatically.

U102 : GP2AP002S00F is Optical proximity sensor.

3. Technical Brief

3.9 Proximity Sensor

Figure. Proximity Sensor Schematic

Figure. Proximity Sensor Block Diagram

PMIC(U400)VREG_GP3

(2.7V)

GPIO124 : PROXI_OUT

MSM7227(U300)

GPIO123 : PROXI_SDA GPIO122 : PRGXI_SCL

0.1u

C301

2.2u

C302

4.7K

R308

4.7K

R309

VREG_SENSOR_2.6V

VREG_SENSOR_2.6V

R310

4.7

10u

C304

U300

54

63

72

81

AD

ELL

CS

CD

ELA

DS

CC

VOI

V

TU

OV

DN

G

10

R311VREG_SENSOR_2.6V

VREG_SENSOR_2.6V

1u

C305PROXI_I2C_SCL

PROXI_I2C_SDA

PROXI_OUT

When call connected, the object is moved nearer to the proximity sensor.LCD backlight and Touch screen is disable operation automatically.

U102 : GP2AP002S00F is Optical proximity sensor.

3. Technical Brief

3.9 Proximity Sensor

Figure. Proximity Sensor Schematic

Figure. Proximity Sensor Block Diagram

PMIC(U400)VREG_GP3

(2.7V)

GPIO124 : PROXI_OUT

MSM7227(U300)

GPIO123 : PROXI_SDA GPIO122 : PRGXI_SCL

U�00

MSM7227(U200)


3. TECHNICAL BRIEF

U101D2D1

6F1A

1F6A

E3F2

E5D3F5E2E6E1

F3C1

A4

C2E4B3D4A3B4B1D5B2A2

LED1LED2

VIO LED3RESETB LED4SCL LED5SDA LED6

WPWMIN

LEDGNDSBIAS

SSENS LDO1OSGND LDO2OGC2 LDO3OGC1 LDO4O

2T 4T 1T 3T

LED7LED8

TP101

GAIN1GAIN2

LCD_SUBPM_RESET_N

SBIAS

SENS

LCD_PWM

10K

213

R1u

C306

U301

6

43

2

51VCC IOUT

GND1

GC1 GC22D

NG

GAIN1 GAIN2

SBIAS SENS

Ambient Light Sensor

When ALC sensor turn on, automatically controls brightness of the display backlight.U801 : Backlight driver IC (BD6083) used I2C interface to MSM7227 [Main PCB ]U101 : Luminance Sensor [SPK_FPCB]

3. Technical Brief

3.10 Luminance Sensor

Luminance Sensor Schematic

MSM7227

(BD6083GUL)

Luminance Sensor Block Diagram

U301

U100

(BD6084GUL)

U101 : Backlight driver IC (BD6084GUL) used I2C interface to SM7227 [Main PCB ]

U�01 : Luminance Sensor [FPCB]

When ALC sensor turn on, automatically controls brightness of the display backlight.U801 : Backlight driver IC (BD6083) used I2C interface to MSM7227 [Main PCB ]U101 : Luminance Sensor [SPK_FPCB]

3. Technical Brief

3.10 Luminance Sensor

Luminance Sensor Schematic

MSM7227

(BD6083GUL)


U301

U100

(BD6084GUL)

U101

ALS(BH1621FVC)

U200



3. TECHNICAL BRIEF

According to tilt the cell phone, the screen is had rotated automatically.U200 : MMA7660FC IC used I2C interface to MSM7227

3. Technical Brief

3.11 Motion Sensor

Main Board


U200MSM7227

U200MSM7227

U303BMA150

U303BMA150GPIO38 : Motion_I2C_SDA

GPIO37 : Motion_I2C_SCL

GPIO 18 : Motion_INT

VREG_MSMP_2.6V

Sub-PCB

Motion Sensor Schematic

U303

21

11

65

74

83

92

101NC1 NC2

VDD VDDIO

GND SDI

INT SDO

CSB SCK

1TO

N

2TO

N 0.1u

C300

VREG_MSMP_2.6V

TP300

1u

C309

4.7K513R

4.7K613R

VREG_MSMP_2.6V

MOTION_INT

MOTION_I2C_SCL

MOTION_I2C_SDA

U�0� : BMA150 IC used I2C interface to MSM7227


3. TECHNICAL BRIEF

(LIN_MOTOR_PWM for linear motor).

There is a linear motor.Depending on user scenario, one of these motors operates or two motors operate at the same time. The strength of vibration is determined by the duty cycle of PWM (DC_PWM_MAG for DC motor, LIN_PWM for linear motor).

U302 : SM100 is Linear motor driver IC.

3. Technical Brief

3.12 Vibrators

Linear Motor Schematic

VB300

2

1

100nL300

100n

L301

VREG_MOTOR_3.0V

1u

C3073.9n

C308313R

510K

10K41 3R U302

9

54

63

72

81EN V1

SIN VSS

TYPE VCC

OCT V2DN

GP

LIN_MOTOR_EN

LIN_MOTOR_PWM

Linear Motor PAD

1%

EUSY0200803

U�02 : SM100 is Linear motor driver IC.

(LIN_MOTOR_PWM for linear motor).



3. TECHNICAL BRIEF

3. Technical Brief

Vibrator Block Diagram

U302MSM7227

U302MSM7227

Main Board

GPIO 28 : LIN_PWM

GPIO 58 : LIN_MOTOR_EN

U302Linear motor

Circuitry

U302Linear motor

Circuitry

Linearmotor

connector

U200

GPIO 28 : LIN_MOTOR_PWM

GPIO 26 : LIN_MOTOR_EN


3. TECHNICAL BRIEF

3. Technical Brief

3.13 GSM MODE3.13.1 GSM RECEIVER

The GSM-850, GSM-900, GSM-1800, and GSM-1900 receiver inputs of RTR6285 are connected

directly to the transceiver front-end Module. GSM-850, GSM-900, GSM-1800, and GSM-1900

receiver inputs use differential configurations to improve common-mode rejection and second-order

non-linearity performance. For example Figure 1-2 shows receiver input topologies for DCS and PCS

(GSM-850/900 have the same receiver input topologies). The balance between the complementary

signals is critical and must be maintained from the RF filter outputs all the way into the IC pins.

[Figure 1-2] DCS and PCS Receiver Inputs Topologies



3. TECHNICAL BRIEF

3. Technical Brief

The amplifier outputs drive the RF ports of the quadrature RF-to-baseband downconverters. The downconverted baseband outputs are multiplexed and routed to lowpass filters (one I and one Q) having passband and stopband characteristics suitable for GMSK or 8-PSK processing. These filter circuits include DC offset corrections. The filter outputs are buffered and passed on to the MSM7227 IC for further processing as shown in Figure 1-4.

3.13.2 GSM TRANSMITTER The RTR6285 transmitter outputs(HB_RF_OUT1 and LB_RF_OUT1) include on-chip output matching inductors. 50ohm output impedance is achieved by adding a series capacitor at the output pins. The capacitor value may be optimized for specific applications and PCB characteristics based on pass-band symmetry about the band center frequency as shown in Figure 1-3.

The RTR6285 IC is able to support GSM 850/900 and GSM 1800/1900 mode transmitting. This design guideline shows a tri-band GSM application. Both high-band and low band outputs are followed by resistive pads to ensure that the load presented to the outputs remains close to 50ohm.

[Figure 1-3] GSM Transmitter Outputs Topologies

Since GSM-850, GSM-900, GSM-1800, and GSM-1900 signals are time-division duplex (the handset can only receive or transmit at one time), switches are used to separate Rx and Tx signals in place of frequency duplexers – this is accomplished in the switch module. The GSM-850, GSM-900, GSM-1800, and GSM-1900 receive signals are routed to the RTR6285 through band selection filters and matching networks that transform single-ended 50-Ωsources to differential impedances optimized for gain and noise figure. The RTR input uses a differential configuration to improve second-order inter-modulation and common mode rejection performance. The RTR6285 input stages include MSM-controlled gain adjustments that maximize receiver dynamic range.


3. TECHNICAL BRIEF

3. Technical Brief

3.14 UMTS MODE

3.14.1 UMTS RECEIVER

The UMTS duplexer receiver output is routed to LNA circuits within the RTR6285 device as shown in

Figure 1-4. The UMTS Rx input is provided with an on-chip LNA that amplifies the signal before a second

stage filter that provides differential downconverter as shown in Figure 1-5. This second stage input is

configured differentially to optimize second-order intermodulation and common mode rejection

performance. The gain of the UMTS frontend amplifier and the UMTS second stage differential amplifier

are adjustable, under MSM control, to extend the dynamic range of the receivers. The second stage UMTS

Rx amplifiers drive the RF ports of the quadrature RF-to-baseband downconverters. The downconverted

UMTS Rx baseband outputs are routed to lowpass filters having passband and stopband characteristics

suitable for UMTS Rx processing. These filter circuits allow DC offset corrections, and their differential

outputs are buffered to interface shared with GSM Rx to the MSM IC. The UMTS baseband outputs are

turned off when the RTR6285 is downconverting GSM signals and on when the UMTS is operating.

[Figure 1-4] UMTS Receiver Inputs Topologies



3. TECHNICAL BRIEF

3. Technical Brief

The RTR6285 UMTS output is routed to its power amplifier through a bandpass filter, and delivers fairly high-level signals that are filtered and applied to the PA. Transmit power is delivered from the duplexer to the antenna through the switch module. The transceiver LO synthesizer is contained within the RTR6285 IC with the exception of the off-chip loop filter components and the VC-TCXO. This provides a simplified design for multimode applications. The PLL circuits include a reference divider, phase detector, charge pump, feedback divider, and digital logic generator. UMTS Tx. Using only PLL1, the LO generation and distribution circuits create the necessary LO signals for nine different frequency converters. The UMTS transmitter also employs the ZIF architecture to translate the signal directly from baseband to RF. This requires FLO to equal FRF, and the RTR6285 IC design achieves this without allowing FVCO to equal FRF. The RTR6285 IC is able to support UMTS 2100/1900/1800/1700 and 850 mode transmitting. This design guideline shows only UMTS 2100 applications.

3.14.2 UMTS TRANSMITTER

The UMTS Tx path begins with differential baseband signals (I and Q) from the MSM device. These analog input signals are amplified, filtered, and applied to the quadrature up-converter mixers. The up-converter output is amplified by multiple variable gain stages that provide transmit AGC control. The AGC output is filtered and applied to the driver amplifier; this output stage includes an integrated matching inductor that simplifies the external matching network to a single series capacitor to achieve the desired 50-Ω interface.


3. TECHNICAL BRIEF

3. Technical Brief

[Figure 1.5] RTR6285 IC Functional Block Diagram

3. Technical Brief

[Figure 1.5] RTR6285 IC Functional Block Diagram



3. TECHNICAL BRIEF

3. Technical Brief

3.15 GPS RECEIVER

The GPS receiver input employs a single-ended connection realized by this pin. The GPS input is routed from the GPS antenna switch, through a band pass filter and then an impedance transformer circuit that optimally matches the impedance looking into the GPS LNA. The impedance transformer circuit topology is shown in Figure 1-6.

[Figure 1.6] GPS Input Network Topology

3.16 LO GENERATION and DISTRIBUTION CIRCUIT

The integrated LO generation and distribution circuits are driven by internal VCOs to support various modes to yield highly flexible quadrature LO outputs that drive all GSM/EDGE, UMTS band and GPS up-converters and down-converters; with the help of these LO generation and distribution circuits, true zero-IF architecture is employed in all GSM and UMTS band receivers and transmitters to translate the signal directly from RF-to-baseband and from baseband-to-RF. Two fully functional fraction-N synthesizers, including VCOs and loop filters, are integrated within the RTR6285 IC. In addition, the RTR6285 has a third synthesizer used for GPS operation. The first synthesizer (PLL1) in the RTR6285 creates the transceiver Los that support the UMTS transmitter, and all four GSM band receivers and transmitters including: GSM850, GSM900, GSM1800, and GSM1900. The second synthesizer (PLL2) in the RTR6285 IC provides the LO for the UMTS primary receiver. For the RTR6285 IC only, the second synthesizer also provides the LO for the secondary UMTS receiver. The third synthesizer (PLL3), only in the RTR6285 IC, provides the LO for the GPS receiver. An external TCXO input signal is required to provide the synthesizer frequency reference to which the PLL is phase and frequency locked. The RTR6285 ICs integrate most of the PLL loop filter components on-chip except for three off-chip loop filter-series capacitors, which significantly reduces off-chip component requirement. With the integrated fractional-N PLL synthesizers, the RTR6285 ICs have the advantage of more flexible loop bandwidth control, fast lock time, and low-integrated phase error.


3. TECHNICAL BRIEF

3. Technical Brief

3.17 OFF-CHIP RF COMPONENTS

3.17.1 UMTS PAM (U1002, ACPM-5281)

The ACPM-5281 is a dual-band PAM (Power Amplifier Module) designed for UMTS Band1 and Band8. The ACPM-5281 meets stringent UMTS linearity requirements. The 4mmx5mm form factor 14-pin surface mount package is self contained, incorporating 50ohm input and output matching networks The ACPM-5281 features 5th generation of CoolPAM circuit technology which supports 3 modes –bypass, mid and high power modes. The CoolPAM is stage bypass technology which enables power amplifier to lower power consumption. Active bypass feature is added to 5th generation to enhance power added efficiency at low output range and this technology extends talk time of mobiles more by further saving power amplifier’s current consumption. The power amplifier is manufactured on anadvanced InGaP HBT (hetero-junction Bipolar Transistor) MMIC (microwave monolithic integrated circuit) technology offering state-of-the-art reliability, temperature stability and ruggedness The Module is housed in a cost effective, small and thin 4x5mm package.



3. TECHNICAL BRIEF

3.17.2 19.2MHz VCTCXO (X200, TG-5010LH_19_2M_75A)

The Voltage Controlled Temperature Compensated Crystal Oscillator (VCTCXO) provides the reference frequency for all RFIC synthesizers as well as clock generation functions within the MSM6285 IC. The oscillator frequency is controlled by the MSM6285 ICs. TRK_LO_ADJ pulse density modulated signal in the same manner as the transmit gain control TX_AGC_ADJ. A two-pole RC lowpass filter is recommended on this control line. The PM7540 IC controls the handset power-up sequence, including a special VCTCXO warm-up interval before other circuits are turned on. This warm-up interval (as well as other TCXO controller functions) is enabled by the MSM TCXO_EN line . The PM7540 IC VREG_TCXO regulated output voltage is used to power the VCTCXO and is enabled before most other regulated outputs. Any GSM mode power control circuits within the MSM7227 IC require a reference voltage for proper operation and sufficient accuracy. Connecting the PM7540 IC REF_OUT directly to the MSM7227 IC GSM_PA_PWR_CTL_REF provides this reference. This sensitive analog signal needs a 0.1 μF low frequency filter near to MSM side, and isolate from digital logic and clock traces with ground on both sides, plus ground above and below if routed on internal layers.


3. TECHNICAL BRIEF

3. Technical Brief

3.17.3 ASM (FL1007, D5017)

This equipment uses a single antenna to support all handset operating modes, with an antenna switch module select the operating frequency and band. UMTS operation requires simultaneous reception and transmission, so the UMTS Rx/Tx connection is routed to a duplexer that separates receive and transmit signals. The active connection is MSM-selected by three control lines (GPIO[72], GPIO[73], GPIO[74] and GPIO[75]). These GPIOs are programmed to be ANT_SEL3, ANT_SEL2, ANT_SEL1 and ANT_SEL0 respectively.



3. TECHNICAL BRIEF

3.17.4 GSM PAM (U1004, SKY77336)

SKY77336 Power Amplifier Module (PAM) is designed in a compact form factor for quad-band cellular handsets comprising GSM850/900, DCS1800 and PCS1900, supporting Gaussian Minimum-Shift Keying (GMSK) and Polar Enhanced Data for GSM Evolution (EDGE) modulation. Class 12 General Packet Radio Service (GPRS) multi-slot operation is also supported. The module consists of GSM850/900 PA and DCS1800/PCS1900 PA blocks, impedance matching circuitry for 50 Ω input and output impedances, and

a Power Amplifier Control (PAC) block.

The custom CMOS integrated circuit provides the internal PAC function and interface circuitry. Fabricated in InGaP/GaAs, the Heterojunction Bipolar Transistor (HBT) PA blocks support the GSM850/900 bands and DCS1800/PCS1900 bands. Both PA blocks share common power supply pads to distributecurrent. The InGaP/GaAs die, Silicon (Si) controller die, and passive components are mounted on a multi-layer laminate substrate and the entire assembly is encapsulated with plastic overmold. RF input and output ports of the SKY77336 are internally matched to a 50 Ω load to reduce the number of external components for a quad-band design. Extremely low leakage current (10 μA, typical) of the PAM module maximizes handset standby time. The SKY77336 also contains band-select switching circuitry to select GSM (logic 0) or DCS/PCS (logic 1) as determined from the Band Select (BS) signal. See Figure shown below.


3. TECHNICAL BRIEF

3. Technical Brief

3.17.5 GPS LNA (U1001, ALM-2412)

The ALM-2412 is an LNA module, with integrated filter, designed for GPS band applications at 1.575GHz. The LNA uses AVAGO Technologies’ proprietary GaAs Enhancement-mode pHEMT process to achieve high gain with very low noise figure and high linearity. Noise figure distribution is very tightly controlled. A CMOS-compatible shutdown pin is included either for turning the LNA on/off, or for current adjustment. The integrated filter utilizes an Avago Technologies’ leading edge FBAR filter for exceptional rejection at Cell/PCS Band frequencies. The ALM-2412 is useable down to 1V operation. It achieves low noise figure, high gain and linearity even at 1V, making it suitable for use in critical low-power GPS applications or during low-battery situations. The Module is housed in a cost effective, small and thin package (3.3X2.1X1.1mm3). This part is MSL Class 3 and HBM ESD Level Class 1A.

3.18 LG GD880 Main Features

- Bar Type Simple & Stylish design- UMTS 2100 + UMTS 900+

GSM 900 + DCS 1800 + PCS 1900 + GSM850 based GSM/GPRS/EDGE/UMTS- HSDPA 7.2Mbps- TFT Main LCD(3.2’, 480 x 854)- Touch Sensitive User Interface- 5M AF Camera - 3.5Phi Stereo Headset & Speaker phone- 64 Poly Sound- MP3/AAC/AMR/MIDI/3GP/SMAF decoder and play- MPEG4 encoder/decoder and play/save- JPEG en/decoder- Supports Bluetooth and HS-USB- Supports WLAN - 900 mAh (Li-Ion Polymer)

1. Main Features



3. TECHNICAL BRIEF

3.19 GD880 Main Component

2. Main Components

Main board, Top Main board, Bottom

Sub board, Top Sub board, Bottom

Logic

USIM

SD Socket

5M Camera Connector

Connector

RF

GPS Logic & AudioWiFi+BT+FM BB/PMIC/MEM

Proximitor Sensor

VGA Camera LCD Connector


3. TECHNICAL BRIEF

RF

2. Main Components

Reference Description Reference Description

FL1002 WCDMA (VIII) Duplexer FL1003 WCDMA (I) Duplexer

FL1006 WCDMA (VIII) TX SAW Filter FL1007 FEM

FL1005 WCDMA (I) TX SAW Filter U1004 GSM PAM

U1002 WCDMA Dual (1&8)PAM U1003 RTR6285(Transceiver)

FL1004 WCDMA (I) RX SAW Filter SW1002 RF Antenna connector

FL1001 GPS SAW Filter U1001 GPS LNA

U1003

U1002

FL1006

FL1005

FL1003

U1004

FL1002

FL1007

FL1004

SW1002

FL1001

U1001



3. TECHNICAL BRIEF

Logic

2. Main Components


U402 MUIC for 5Pin Micro USB J1 SIM Connector

U403 Power MOSFET for Changing ANT600 WiFi/BT Antenna

U404 Over-voltage Protection IC500 AUDIO_SUB_SYSTEM

U401 LDO for USB

U402

J1

ANT600

U403

U404

IC500

U401


3. TECHNICAL BRIEF

BB / MEM / WiFi + BT

2. Main Components

Ref. Description Ref. Description

U200 MSM7227 U301 Memory, MCP

CN401 Battery Connector CN500 Main to Sub Connector

U400 PMIC, PM7540 J500 3.5phi Ear-Jack

CN400 Micro USB 5Pin Con. U600 Wi-Fi &BT Module

X200 TCXO (19.2MHz) X600 TCXO (26MHz)

U200

U301

CN401CN500

U400

J500

U600

X600

X200



3. TECHNICAL BRIEF

Logic

2. Main Components

Ref. Description Ref. Description

S300 Micro-SD Socket CN201 5M Camera Connector

MIC400 MIC for Speaker Phone U101 LCD Charge-pump

U303 Motion sensor CN100 LCD Connector

U100 RGB Converter U300 Proximitor Sensor

U200 VGA Camera CN200 Sub to Main connector

MIC401 MIC

S300

CN201

MIC400

U101

U303

U100

CN100

U300U200

CN200

MIC401


5.Trouble Shooting (RF)

4.1 RF Component

FL1001

FL1004

U1001

U1003FL1005 FL1006

U1002

FL1002FL1003

FL1007 U1004

SW1002

SW1002

86P

4. TROUBLE SHOOTING

4. TROUBLE SHOOTING



4. TROUBLE SHOOTING


RF component (WCDMA / GSM)


U1001 GPS LNA FL1005 WCDMA (1) Tx SAW Filter

U1002 WCDMA Dual(1 & 8) PAM FL1006 WCDMA (8) Tx SAW Filter

U1003 RTR6285 FL1007 Front End Module

U1004 GSM PAM X200 VCTCXO (19.2 MHz)

FL1001 GPS SAW Filter U600 Wifi/BT/FM Combo Module

FL1002 WCDMA (8) Duplexer ANT600 Wifi/BT Antenna

FL1003 WCDMA (1) Duplexer SW1001 RF Antenna Connector

FL1004 WCDMA (1) Rx Saw Filter SW1002 RF Mobile Switch

U600

ANT600

X200

87P


4. TROUBLE SHOOTING


GSM850/GSM900/DCS/PCS’s RX/TX Signal PATHA. GSM850/GSM900/DCS1800/PCS1900 RX PATHB. GSM850/GSM900/DCS1800/PCS1900 TX PATH

C. COMMON TX/RX PATH

4.2 Signal Path

88P



4. TROUBLE SHOOTING


WCDMA BAND I and VIII RX Signal PATHD1. WCDMA 2100 RX PATH

E1. W900 RX PATHF1. COMMON TX/RX PATH

89P


4. TROUBLE SHOOTING


WCDMA BAND I and VIII TX Signal PATHD1. WCDMA 2100 TX PATH

E1. W900 TX PATHF1. COMMON TX/RX PATH

90P



4. TROUBLE SHOOTING


GPS Signal PATHF. GPS Rx PATH

91P


4. TROUBLE SHOOTING


4.3 Checking TCXO BlockThe output frequency (19.2MHz) of TCXO (X200) is used as the reference one of RTR6285 and PM7540 internal VCO

Schematic of the Crystal Part (19.2MHz)

100

R207

100p

C20933

R210

1nC212

TG-5010LH_19_2M_75AX200

19.2MHz

32

41VCONT VCC

GND OUT10n

C213

1n

C214

VREG_TCXO_2.85V

VREG_MSMA_2.6V

C215 100p

0.1u

C216

100K

R213

0.1u

C219

NC7SV00P5X_NL

U202

3

2

4

15

VCC

GND

TCXO_RTR_19.2MHZ

TCXO_PM_19.2MHZ

RTR_TRK_LO_ADJ

TCXO_EN

USBH_SYSCLK

1.0T

TCXO Circuit

Clesed to TCXO

TP2

TP�

TP1


4.3 Checking TCXO Block

The output frequency (19.2MHz) of TCXO (X200) is used as the reference one of RTR6285 and PM7540 internal VCO

Schematic of the Crystal Part (19.2MHz)

TP3

TP2

TP1

TP2

92P



4. TROUBLE SHOOTING


4.4 Checking FEM Block

ANT_SEL0 ANT_SEL1 ANT_SEL2ANT_SEL3

VREG_SYNTH_2.75V

93P


4. TROUBLE SHOOTING


Schematic of the Antenna Switch Block

1KR1024

1KR1022

R1025 1K

100pC4

C3DNIDNI

C2

SW1001

G1

G2

ANTG3

15n

L1002

1KR1023

C1019

0.1u

C1043

33p

VREG_SYNTH_2.75V

FL1007

850,1900,2100MHz

65437

11

9

22

21

20

1324

1223

10

158

141

17

162

19

18PCS_RX1

PCS_RX2

ANT PCN_RX1

PCN_RX2

GND1 EGSM_RX1

GND2 EGSM_RX2

GND3

GND4 GSM850_RX1

GND5 GSM850_RX2

WCDMA_2100

WCDMA_850

WCDMA_1900

PCN_PCS_TX

GSM850_EGSM_TX

DD

V

1LRT

C

2LRT

C

3LRT

C

4LRT

C

SW1002

G4G3INOUT G1G2

68pC1080

ANT_SEL3ANT_SEL2ANT_SEL1ANT_SEL0

TP1



4. TROUBLE SHOOTING


Checking Switch Block Power Source


4. TROUBLE SHOOTING


4.5 Checking WCDMA Block

1. Check TCXO 19.2 MHz

START

2. Check FEM BlockRefer to 4.4

3. Check RF Tx Level

4. Check PAM BlockRefer to 4. 5. 4

5. Check RF Level

6. Re-download SW & Cal.

Refer to 4. 5. 3

96P



4. TROUBLE SHOOTING


4.5.1 Checking TCXO Blockrefer to 4.3

4.5.2 Checking FEM Blockrefer to 4.4

4.5.3 Checking RF TX Level

Test Point (TX Level)

TP2

TP4

TP3

TP1

97P


4. TROUBLE SHOOTING

C1022

0.5p

27p

8601C

C1057 100p

DNI

C1003

0501C 33p

3.9nL1020

C1038

0.5p C1104 DNI

C10141n

12n

L1021C10211n

3.9nL1017

0.75p

C1009

U1002

5 1

8 7

9 6

10 5

11 4

12 3

13 2

14 1RFIN_LOWRFOUT_LOW

VMODEGND3

VBPVCC2

VCC1GND2

VEN_LOWRFOUT_HI

VEN_HIGND1

RFIN_HICPL DN

GP

4.7n

L1024

0.5p

C1063

C1056 68p

C103522p

FL1002

897.5 MHz,942.5 MHz

95

8

4 72

3

61

RX1ANT

TXGND1

GND4GND2

RX2

GND3 GND6

L1022

12n

0101R

91

C1046100p

FL1003

1950MHz,2140MHz

75

84

92

3

16ANT RX

TX

GND1 GND6GND2 GND5GND3 GND4

C1039 4.7p

100pC1066

6101R

91

1.2n

L1003

18n

L1019

2.7nL1023

FL1005

1950MHz

5 3 2

4 1INOUT G1G2G3

5201L 1.2n

82

R1020

L1014

10n

+VPWR

FL1006

897.5MHz

5 3 2

4 1INOUT G1G2G3

68pC1028

C1101

4.7u

1 901C 3.3p

22p

C1112

GND

590 1C 3.3p

1.5nL1018

W_PA_R0

W_2100_PA_ON

W_PA_R1

W_900_PA_ON

WCDMA_900_TX_OUT

RX_WCDMA_2100

RX_WCDMA_900_M

PDET_IN

RX_WCDMA_900_P

WCDMA_2100_TX_OUT

SFSY0035101

W900 RX(925 - 960 MHz)

BAND1(2520):SAYP1G95AA0B00

SDMY0002801

Band 1

W900 TX(880 - 915 MHz)

BAND5 : B9425 ( SFSY0036501)

BAND 5/8

BAND2 : B9640 (SFSY0036601)

BAND8(2520) : B7953 (SDMY0002801)

SFSY0036501

BAND8 : B9442 (SFSY0037601)

BAND1 : B9414 (SFSY0035101)

SDMY0001901

BAND2(2520) : ACMD-7407

Band 8

BAND 1/2

W2100 TX(1920 - 1980 MHz)


For testing, Max power output is needed.

1KR1024

1KR1022

R1025 1K

100pC4

C3DNIDNI

C2

SW1001

G1

G2

ANTG3

15n

L1002

1KR1023

C1019

0.1u

C1043

33p

VREG_SYNTH_2.75V

FL1007

850,1900,2100MHz

65437

11

9

22

21

20

1324

1223

10

158

141

17

162

19

18PCS_RX1

PCS_RX2

ANT PCN_RX1

PCN_RX2

GND1 EGSM_RX1

GND2 EGSM_RX2

GND3

GND4 GSM850_RX1

GND5 GSM850_RX2

WCDMA_2100

WCDMA_850

WCDMA_1900

PCN_PCS_TX

GSM850_EGSM_TX

DD

V

1LRT

C

2LRT

C

3LRT

C

4LRT

C

SW1002

G4G3INOUT G1G2

68pC1080


TP1

TP2

TP�

TP4



4. TROUBLE SHOOTING


Check TP 1Over 21 dBm ?

No


No


No


No

Check ANT_SEL 0, 1, 2, 3

Check PAM BlockRefer to 4.5.4

Yes RF Tx Level is OK

Yes Check TX Module

Yes Check Duplexer

Yes Check RTR 6285

RTR 6285 Maximum output Power = 7 dBmRTR 6285 minimum output Power = -80 dBmPAM (ACPM 5281) = Maximum input Power = 8 dBm(High Power Mode ), 5 dBm( Low Power Mode )

WCDMA Band I : Low, High, Low, HighWCDMA Band VIII : Low, Low, High, High

99P


4. TROUBLE SHOOTING


4.5.4 Checking PAM Block

PAM control signalW2100_PA_ON, W900_PA_ON : PAM EnableW_PA_RO : PAM Gain ControlW_PA_R1 must be LOW (under 2.6V) : Use 2 stage gainPAM Enable must be HIGH (over 2.6V)

PAM IN/OUT Signal :When PAM is under the operation of high power mode (W_PA_R0 :Low),PAM OUT power must be over 21 dBmPAM IN power must be under 8 dBm

TP2

TP3

TP1

100P



4. TROUBLE SHOOTING


Check TP3Over 21 dBm ?

No

Check TP2W_PA_R0 ? 2.6 V

No

Check TP1Over 8 dBm?

No

Set the phone Tx is ON andPDM is 210

Yes RF Tx Level is OK

Yes Check MSM7227

Yes Check RTR6285

Change the board

C1022

0.5p

C1057 100p

DNI

C1003

C10141n

12n

L1021C10211n

0.75p

C1009

U1002

5 1

8 7

9 6

10 5

11 4

12 3

13 2


VMODEGND3

VBPVCC2

VCC1GND2

VEN_LOWRFOUT_HI

VEN_HIGND1

RFIN_HICPL DN

GP

4.7n

L1024

C1056 68p

C103522p

L1022

12n

0101R

91

C1046100p

C1039 4.7p

100pC1066

6101R

91

2.7nL1023

FL1005

1950MHz

5 3 2

4 1INOUT G1G2G3

5201L 1.2n

82

R1020

+VPWR

FL1006

897.5MHz

5 3 2

4 1INOUT G1G2G3

68pC1028

C1101

4.7u

22p

C1112

GND

W_PA_R0

W_2100_PA_ON

W_PA_R1

W_900_PA_ON

WCDMA_900_TX_OUT

PDET_IN

WCDMA_2100_TX_OUT

SFSY0035101

BAND5 : B9425 ( SFSY0036501)

BAND 5/8

BAND2 : B9640 (SFSY0036601)

SFSY0036501

BAND8 : B9442 (SFSY0037601)

BAND1 : B9414 (SFSY0035101)

TP�

TP2

TP1


4. TROUBLE SHOOTING


4.5.5 Checking RF Rx Level

Test Point (RF Rx Level)

TP2

TP4

TP3

TP1

Bias

102P



4. TROUBLE SHOOTING

1KR1024

1KR1022

R1025 1K

100pC4

C3DNIDNI

C2

SW1001

G1

G2

ANTG3

15n

L1002

1KR1023

C1019

0.1u

C1043

33p

VREG_SYNTH_2.75V

FL1007

850,1900,2100MHz

65437

11

9

22

21

20

1324

1223

10

158

141

17

162

19

18PCS_RX1

PCS_RX2

ANT PCN_RX1

PCN_RX2

GND1 EGSM_RX1

GND2 EGSM_RX2

GND3

GND4 GSM850_RX1

GND5 GSM850_RX2

WCDMA_2100

WCDMA_850

WCDMA_1900

PCN_PCS_TX

GSM850_EGSM_TX

DD

V

1LRT

C

2LRT

C

3LRT

C

4LRT

C

SW1002

G4G3INOUT G1G2

68pC1080


TP1


4. TROUBLE SHOOTING

27p

8601C

0501C 33p

3.9nL1020

C1038

0.5p C1104 DNI

3.9nL1017

0.5p

C1063

FL1002

897.5 MHz,942.5 MHz

95

8

4 72

3

61

RX1ANT

TXGND1

GND4GND2

RX2

GND3 GND6

FL1003

1950MHz,2140MHz

75

84

92

3

16ANT RX

TX


1.2n

L1003

18n

L1019

L1014

10n

1901C 3.3p

5901C 3.3p

1.5nL1018

RX_WCDMA_2100

RX_WCDMA_900_M

RX_WCDMA_900_P

W900 RX(925 - 960 MHz)


SDMY0002801

Band 1

W900 TX(880 - 915 MHz)

BAND8(2520) : B7953 (SDMY0002801)

SDMY0001901

BAND2(2520) : ACMD-7407

Band 8

BAND 1/2

W2100 TX(1920 - 1980 MHz)

TP2

1.8pC1010

VREG_SMPS_2.1V

L10062.2n

L1004 1.2n

1K

R1009C1048100p

L10073.6n

C10640.1u

2140MHz

FL1004

52

4

31IN OUT

_OUTG1 G3

1.8pC1086

C1111DNI

RX_WCDMA_2100_LNA_OUT

WB2100_MIX_INP

WB2100_MIX_INM

W2100 RX(2110 - 2170 MHz)

W2100 RX(2110 - 2170 MHz)BAND1: SFSY0035001

WCDMA RX 2100 LNA Circuit

BAND1 : B9411 (SFSY0035001)BAND2 : B9419 (SFSY0034901)

TP�

Bias

TP4



4. TROUBLE SHOOTING


Check bias block soldering

Set the Phone Rx is ON

Check BIAS over2.1 V ?

Change the board

No

Check TP 1Signal exist ?

Check RF Switch (M /S)


Check FEM ModuleRefer 4.4

Check TP 3Signal exist ? Check Duplexer

Yes

Yes

Yes

No

No

No


Check RTR 6285 andRx SAW filter

Yes

No

Yes

105P


4. TROUBLE SHOOTING


4.6 Checking GSM Block

1. Check TCXO Block

2. Check FEM

3. Check RF TRX Level


Start


4.6 Checking GSM Block

1. Check TCXO Block

2. Check FEM

3. Check RF TRX Level


Start



4. TROUBLE SHOOTING


4.6.1 Checking TCXO Blockrefer to 4.3

4.6.2 Checking FEM Blockrefer to 4.4

4.6.3.1 Checking RF TX Level

TP2

TP3TP1

107P


4. TROUBLE SHOOTING

1KR1024

1KR1022

R1025 1K

100pC4

C3DNIDNI

C2

2.2n

L1012

3.9p

C1055

3.9pC1029

SW1001

G1

G2

ANTG3

3001R

180

15n

L1002

1KR1023

C101139p

C1012 2.7p

C1019

0.1u

3.6n

L1009

7001R

120

2.7pC1037

51pC1041

DNI

C1042

C1043

33p

R1011

51

C1044DNI

U1004

23 22

24 21

25 20

26 19

27 18

28 17

9 8

10 7

11 6

12 5

13 4

14 3

15 2

16 1DCS_PCS_INDCS_PCS_OUT

BSGND6

TX_ENGND5

VBATTVCC_OUT

VAPCGND4

NCGND3

GND1GND2

GSM_INGSM_OUT

PGND1PGND12

PGND2PGND11

PGND3PGND10

PGND4PGND9

PGND5PGND8

PGND6PGND7

2.2n

L1013

15pC1100

2.2pC1051

VREG_SYNTH_2.75V

L1026

15n

L1011

15n

C106210u

5101R

120

7101R

180

R1018

2.2K

L1008

15n

2.7n

L1010

+VPWR

C1093 4.7p

2.2pC1094

30

R1021

12n

L1015

FL1007

850,1900,2100MHz

65437

11

9

22

21

20

1324

1223

10

158

141

17

162

19

18PCS_RX1

PCS_RX2

ANT PCN_RX1

PCN_RX2

GND1 EGSM_RX1

GND2 EGSM_RX2

GND3

GND4 GSM850_RX1

GND5 GSM850_RX2

WCDMA_2100

WCDMA_850

WCDMA_1900

PCN_PCS_TX

GSM850_EGSM_TX

DD

V

1LRT

C

2LRT

C

3LRT

C

4LRT

C

SW1002

G4G3INOUT G1G2

68pC1080

ANT_SEL3

GSM_PA_RAMP


ANT_SEL2ANT_SEL1

RX_PCS_P

RX_PCS_M

RX_DCS_P

RX_DCS_M

RX_GSM_900_P

RX_GSM_900_M

RX_GSM_850_P

RX_GSM_850_M

DCS_PCS_TX

GSM_TX

ANT_SEL0

PCS1900(1850-1910 MHz)LOW

2mm

HIGH

HIGH

LOW HIGH

HIGH

LOWLOW

LOW

LOW

HIGH

LOW

GSM(925-960 MHz)

HIGH5dB

LOW

LOW

HIGH

LOW

LOW

LOW

LOW

LOW LOW

LOW

ANTENNA SWITCH MODULE LOGIC

DCS/PCS TX

HIGH

GSM900(880-915 MHz)

LOW

ANT_SEL0 ANT_SEL2

PCS(1930-1990 MHz)

LOW

WCDMA 2100 (UMTS2)

LOW

GSM850/EGSM TX HIGH

DCS1800 RX

WCDMA 900 (UMTS1)

GSM850 RX

HIGH

HIGH

GSM850(824-849 MHz)

DCS1800(1710-1785 MHz)

LOW

LOW

ANT_SEL3

GSM(869-894 MHz)

ANT_SEL1

DCS(1805-1880 MHz)

EGSM RX

PCS1900 RX

SMPY0019101

8dB

TP1

TP�


Schematic of GSM850/GSM900/DCS/PCS TX Block

TP2



4. TROUBLE SHOOTING


Check TP 1If EGSM /GSM 850 over 31 dBm ?

If DCS /PCS over 28 dBm ?

Check soldering andcomponents

Start

Check TCXO BlockRefer to 4.3

No

Check TP 2, 3If EGSM /GSM 850(TP 2) under 6

dBm ?If DCS /PCS (TP 3) under 6 dBm ?

No

Change the board

Yes

EGSM /DCS /PCS /GSM 850Tx is OK

Check other part

Check FEM Block(EDGE PAM )

Refer to 4.4Yes

Check RTR & PAD

No Problem

No

Still exist Problem

For testing , Max power output is needed

109P


4. TROUBLE SHOOTING


4.6.3.2 Checking RF RX Level

TP2

TP1

110P



4. TROUBLE SHOOTING


Schematic of GSM850/GSM900/DCS/PCS RX Block

1KR1024

1KR1022

R1025 1K

2.2n

L1012

3.9p

C1055

3.9pC1029

15n

L1002

1KR1023

C1012 2.7p

C1019

0.1u

3.6n

L1009

2.7pC1037

C1043

33p

2.2n

L1013

2.2pC1051

L1011

15n

L1008

15n

2.7n

L1010

2.2pC1094

FL1007

850,1900,2100MHz

65437

11

9

22

21

20

1324

1223

10

158

141

17

162

19

18PCS_RX1

PCS_RX2

ANT PCN_RX1

PCN_RX2

GND1 EGSM_RX1

GND2 EGSM_RX2

GND3

GND4 GSM850_RX1

GND5 GSM850_RX2

WCDMA_2100

WCDMA_850

WCDMA_1900

PCN_PCS_TX

GSM850_EGSM_TX

DD

V

1LRT

C

2LRT

C

3LRT

C

4LRT

C

SW1002

G4G3INOUT G1G2

68pC1080

RX_PCS_P

RX_PCS_M

RX_DCS_P

RX_DCS_M

RX_GSM_900_P

RX_GSM_900_M

RX_GSM_850_P

RX_GSM_850_M

GSM(925-960 MHz)

PCS(1930-1990 MHz)

GSM(869-894 MHz)

DCS(1805-1880 MHz)

TP1

TP2


4. TROUBLE SHOOTING


Set the Phone Rx is ON


Check RF Switch ( Mobile Switch)

Yes

No


Check FEM BlockRefer 4.4

No

Yes

Change the Board

112P



4. TROUBLE SHOOTING


4.7 GPS/WIFI/BT/FM Radio RF components

RF component (GPS)

Reference Description

ANT1001 ANTENNA PAD

ANT1002 GND PAD

FL1001 GPS SAW FILTER

U1001 GPS LNA

FL1001

U1001

ANT1001

ANT1002

113P


4.7 GPS/WIFI/BT/FM Radio RF components

RF component (GPS)


ANT1001 ANTENNA PAD

ANT1002 GND PAD

FL1001 GPS SAW FILTER

U1001 GPS LNA


4. TROUBLE SHOOTING


RF component (WiFi / BT /FM Radio)


ANT600 ANTENNA(chip Antenna)

U600 Wifi/BT/FM Combo Chip

U600

ANT600

114P



4. TROUBLE SHOOTING


4.8 GPS/WIFI/BT/FM Radio SIGNAL PATH

RF component (GPS)

WIFI/BT SIGNAL PATH FM Radio SIGNAL PATH


4. TROUBLE SHOOTING


4.9 GPS/WIFI/BT/FM Radio TROUBLE SHOOTING

4.9.1 A-GPS Block

Schematic of A-GPS Block

TP2

TP1

116P

ANT1001

ANTPAD_GD880

FEED

3.9n

L1005

C1015DNI

U1001

3

2

5

4

1NI

_FR

FIL_OUT

VDD

S_D

GND

6.8nL1001

C1004

DNI

33pC1034

FL1001

1575.42MHz

5 3 2

4 1OUTIN G1G2G3

10KR1014

VREG_RF_2.7V

100pC1103

C1106DNI

DNI

C1108

C1109 3.9p

12

R1026

ANT1002

ANTPAD_GD880

FEED

GPS_LNA_EN GPS_IN

SMZY0016501

TP2

TP1



4. TROUBLE SHOOTING


Set the Phone GPS is ON

Change the board

Check TP1About 2.7V ?

Check power LRC filter soldering

Check TP2About 2.6V ?

Check SW and NV item

Yes

Yes

No

No


4. TROUBLE SHOOTING


4.9.2 WIFI/BT/FM Radio Block



4. TROUBLE SHOOTING


4.9.2.1 WIFI/BT/FM Radio Module Part

Schematic of WIFI/BT Module

U600

0 392827 262524 23222120 291817161

31

3215

14

33

3413

3512

3611

3710

389

398

407

6

415

4

42

433

442

45

1

647484940515253 54 51

DN

G

2D

NG

3D

NG

4D

NG

B_E

KA

W_TS

OH_L

W

DXT_T

RA

U_TB

N_ST

C_TR

AU_T

B

N_ST

R_TR

AU_T

B

DX

R_TR

AU_T

B

ANT

BT_PCM_CLK

GND5 BT_PCM_OUT

VDD_WL_PA BT_PCM_SYNC

BT_PCM_IN

SDIO_CMD

SDIO_CLK VDD_BT_PA

SDIO_D3

SDIO_D2 S_CLK_IN

SDIO_D1 GND6

SDIO_D0 FM_ANT

WL_RST_N BT_GPIO_0

WL_WAKE_B BT_GPIO_1

REG_ON BT_GPIO_3

VBAT_IN BT_GPIO_4

BT_GPIO_7

SR_VLX1

SR_VLX1BB F_CLK_IN

F_CLK_OUT

BB2

XLV_

RS

BBT

UO

V_R

S

OID

DV

UP_L

ATX

DS _

OID

DV

TU

O_2P 1_

GID

TU

O_2P1_

GLN

A

ODL

V2P1_

NIV

TU

O_2O

DLNL

AD

S_ TB

LC

S_TB

1OI

DU

A

2OI

DU

A

N_TS

R_TB

7D

NG

L6014.7n

p5.1

426C

C604

0.5p

ANT600

SDBTPTR3015

2

31

4DUMMY3

FEED DUMMY2

DUMMY1

600

FB600

1u

C621C6208p

VREG_MSMP_2.6V

C606 820p

DNI

C603

C605 100p

1nC622

1u

C601

VDD_TCXO

2.2uFC619

+VPWR

C600

1u

VDD_TCXO

R605

100K

26MHz

X600TG-5010LH-87N

4 2

3 1NCOUT

GNDVCC

U601

5

3 24 1

VOUTVDDGNDCE D

NG

P

706C

u1 u18 06

C

u1906

C

016C

FU1.0

F u7.41 16

C

F u2.2206

C

C6120.1UF

C6130.1UF

4.7uL600

4.7uFC615 3.3uL610

C6160.1UF

C6174.7uF

0

R600

0.1u

C625C618

10uF

10u

C614

TP602

+VPWR

VREG_MSMP_2.6V

VREG_MSMP_2.6V

N_TE

SE

R_TB

WLAN_RESET_NBT_HOST_WAKEUP

WLAN_CMDWLAN_CLK

WLAN_SDIO[1]WLAN_SDIO[2]WLAN_SDIO[3]

WLAN_SDIO[0]

BT_PCM_DOUT

BT_PCM_DINBT_PCM_SYNC

BT_PCM_CLK

BT_UART1_CTS

SLEEP_CLK

BT_WAKEUP

R_O

IDU

A_M

F

WLAN_HOST_WAKEUP

FM_ANT

L_OI

DUA

_M

F

BT_UART1_TXD

BT_UART1_RXD

QE

R_KL

C

CLK_REQ

ANT_WLAN_BT

ANT_WLAN_BT

REG_ON

CLK_IN

CLK_IN

BT_UART1_RTS

LDO for TCXO26MHz TCXO

close to 3

close to 17


4.9.2.1 WIFI/BT/FM Radio Module Part

Schematic of WIFI/BT Module


4. TROUBLE SHOOTING


Test Point DescQription

Test Point Net Name Description

TP1 +VPWR Power for BT/Wifi BB core and Wifi Power Amp.

TP2 VREG_MSMP_2.6V Power for BT Power Amp (2.6V)

TP3 VREG_MSMP_2.6V Power for host interface (2.6V)

Yes

Yes

TP2TP3

TP1

120P



4. TROUBLE SHOOTING


4.9.2.2 WIFI/BT/FM Radio Main Clock Part

Test Point Description

Test Point Net Name Description

TP1 CLK_REGOn/Off Control external clock source0 : TCXO off1 : TCXO on

TP2 CLK_IN TCXO output clock : 26 MHz

TP2

TP1

121P

1nC622

1u

C601

VDD_TCXO

2.2uFC619

+VPWR

C600

1u

VDD_TCXO

R605

100K

26MHz

X600TG-5010LH-87N

4 2

3 1NCOUT

GNDVCC

U601

5

3 24 1

VOUTVDDGNDCE D

NG

P

CLK_REQ CLK_IN


TP1 TP2


4. TROUBLE SHOOTING

4.10 Power ON Troubleshooting

4. Troubleshooting (BB)

Start

Power On sequence of GD880 is : Power key press PM_ON_SW(D302) go to low PM7540 Power Up VMSMC1_1.35V(C408), VMSMC2_1.25V(C420), VMSME_1.8V(C416), VMSMP_2.6V(C410), VMSMA_2.6V(C405), VTCXO_2.85V(C214) power ON Phone booting and PS_HOLD(D400) go to High

Battery voltage. higher than 3.70V(OCV)?

TP1 or TP6 high to low

Change or charging the

Battery

1. Check correctly connectingSub PCB(CN200) connector and

NO

YES

NO

TP1 or TP6 high to lowwhen key press?

TP2, TP3, TP4, TP7, TP8, TP10power up?

Sub_PCB(CN200) connector and main B/d connector(CN500)2. Check correctly working power key

Change the Main board

YES

NO

Is clock ok?TP9 : 19.2MTP5 : 32.768Khz


YES

YES

NO

NOYES

LCD is turn on? 1. Check correctly connectingSub B/d CN100 and LCD module

NOYES

Change LCD moduleRedownload sw image

*OCV( open circuit voltage)



4. TROUBLE SHOOTING


TP1: go to low

470

R306

D302

KB300

PM_ON_SW


4. TROUBLE SHOOTING


TP10 TP2 TP3 TP4 TP9

TP8

TP5 TP6 TP7

4.7uL403

4.7uL402

L401 4.7u

u2.2644

C

VREG_LCD_1.8V

C445

1u

VREG_RGB_1.5V

L400 4.7u

2.2uC442

10u

C441

CM315_12_5PF

X40032.768KHz 2

1

0.1uC440

VREG_MSME_1.8V

C4382.2u

VREG_SYNTH_2.75V

VREG_RF_2.7V

E10

F10

C12

M12

K7

N13

M13

G10

D9

H12

C13

A13

A12

G12

G1

M1

D13

E12

N11

A3

A10

A8

H13

G13

A11

K13

E13

B13

A9

N12

J13

A2

M4

N4

M9

N10

M6

N6

M8

N8

J1

K1VSW_5V

VREG_5V

VSW_MSMC1

VREG_MSMC1

VSW_MSMC2

VREG_MSMC2

VSW_MSME

VREG_MSME

VSW_PA

VREG_PA

VREG_GP1

VREG_GP2

VREG_GP3

VREG_GP4

VREF_GP5

VREG_GP6

VREG_MMC

VREG_MSMA

VREG_MSME2

VREG_MSMP

VREG_RFRX1

VREG_RFRX2

VREG_RFTX

VREG_RUIM1

VREG_SYNT

VREG_TCXO

VREG_USB

VREG_WLAN

MIC_BIAS

REF_ISET

REG_GND

REF_BYP

TCXO_IN

TCXO_EN

TCXO_OUT

XTAL_IN

XTAL_OUT

SLEEP_CLK

AMUX_OUT

KPD_PWR_N

PON_RESET_N

PS_HOLD

R409 121K

KDS114E

D400

22pC435

VREG_TCXO_2.85V

51R406

C431

1n

2.2uC430

22pC429

2.2uC428

1n

C427

2.2uC425

VREG_MSMC1_1.35V

VREG_MMC_3.0V

200K

R404

C424

1n

VREG_RUIM_3.0V

C420

4.7u

C4192.2u2.2u

C418

VREG_MSMA_2.6V

10u

C416

C4152.2u

VREG_MSMC2_1.25V

VREG_SMPS_2.1V

C412

1n

C411

1u

VREG_MSMP_2.6V

4.7uC410

4.7u

C408

2.2uC407

VREG_MOTOR_3.0V

C4054.7u

C402

33p

VREG_AUX2_2.9V

VREG_RGB_2.6VVREG_LCD_2.8V

TP403

TP

2.2uC460

VREG_SENSOR_2.6V

SLEEP_CLK

JTAG_PS_HOLD

TCXO_PM_19.2MHZ

PS_HOLD

AMUX_OUT

PMIC_TCXO

nPON_RST

TCXO_EN

VSNS_MSMC2_1.25V

VSNS_MSME_1.8V

VSNS_MSMC1_1.25V

PM_ON_SW

0.3mm

Place crystal and load caps close to PM7540

1%

Local Ground PlanPlace in PM7540 room at shield edge

0.5mm

0.5mm

These CAPs close to inductors

0.5mm

Route together

TP7

100

R207

100p

C20933

R210

1nC212

TG-5010LH_19_2M_75AX200

19.2MHz

32

41VCONT VCC

GND OUT10n

C213

1n

C214

VREG_TCXO_2.85V

VREG_MSMA_2.6V

C215 100p

0.1u

C216

100K

R213

0.1u

C219

NC7SV00P5X_NL

U202

3

2

4

15

VCC

GND

TCXO_RTR_19.2MHZ

TCXO_PM_19.2MHZ

RTR_TRK_LO_ADJ

TCXO_EN

USBH_SYSCLK

1.0T

TCXO Circuit

Clesed to TCXO

TP2TP�

TP10

TP4

TP6

TP5

TP8

TP9



4. TROUBLE SHOOTING


PM7540 Power sequence


4. TROUBLE SHOOTING

4.11 Charger Troubleshooting

Charging Procedure- Connect TA or u-USB Cable- Control the charging current by PM7540 IC- Charging current flows into the battery

Check Point- Connection of TA or USB Cable- Charging current path(NUS5530)- Battery

Troubleshooting Setup- Connect TA and battery to the phone

Troubleshooting Procedure- Check the charger (TA or USB Cable) connector- Check the OVP Circuit- Check the charging current Path- Check the battery


Charging Current Flow

Main Battery

TA(5.1V)

U404

MAX14528

9 6

5 3

4

8 2

7 1IN1OUT1

IN2OUT2

IC1

OVLOIC2

DN

G

DN

GP

VCHG_VBUS

1uF

NFM21PC105B1A3FL400

4 3

2 1INOUT

G1G2

D401

22p

C444

HSMU-5SB-24DR2

CN400

15

13

11

9

7

5

4

3

2

1

14

12

10

8

6

C457

1u

MAX_DPMAX_DM

USB_ID

uUSB 5pin

Close by uUSB CONN

Close by uUSB CONN

OVPchange circuit at REV B

2mm

2mm

U403 NUS5530MN

5

64

73

82

91

10DRAIN_B

NC1 COLLECTOR_B

COLLECTOR EMITTER

SOURCE BASE

DRAIN NC2

GATE

VCHG_VBUS

VBATT+VPWR

234R

smho

m001

C455

39p 33uFC448

ISNS_M

+VPWRCHG_CTL_N

BATT_FET_N

ISNS_P

Route together from both end of resistor 0.1ohm.

2mm1%

2mm(to the Batt. Conn.)2mm(to the GSM PAM)

TA (5.1V)

MainBattery



4. TROUBLE SHOOTING


Check the pin and batteryConnect terminals of I/O

Start

connector

Connection OK? Change I/O connectorNO

Is TP1 voltage 4.8V (or 5.0V)?

Change TA (or u-USB Cable)

Yes

NO

Is it charging properlyAfter turning on TP5

END

Yes

Yes

NO

Check TP1 SMT status by X-ray Exchange TP1 or Change the Main boardAnd Retest

Charger Troubleshooting Flow


4. TROUBLE SHOOTING

U401RP103K331D

5

3 24 1

VOUTVDDGNDCE D

NG

P USB_3.3V

1u

C447

+VPWR

4.7uL403

4.7uL402

L401 4.7u

424R

K051

VREG_MSMP_2.6V

u2.2644

C

VREG_MSME_1.8V

R423

1K

VREG_LCD_1.8V

C445

1u

VREG_RGB_1.5V

L400 4.7u

2.2uC442

10u

C441

K 1

834R

1u

C461

+VPWR

CM315_12_5PF

X40032.768KHz 2

1

0.1uC440

VREG_MSME_1.8V

4.7uC439

C4382.2u

VREG_SYNTH_2.75V

VREG_RF_2.7V

M_SN

SI

PM7540U400

9J

8J

7J

6J

5J

9H

8H

7H

6H

5H

9G

8G

7G

6G

5G

9F

8F

7F

6F

5F

9E

8E

7E

6E

5E

H1

E10F1

F10E1

C12N2

B1

M12B2

K7

A5

N13A4

M13B5

B4

G10A7

D9A6

H12B7

B6

C13

A13D10

A12K10

H10

G12J10

G1

M1K4

D13J4

E12H4

N11M2

A3L2

A10H2

A8

H13K2

G13J2

A11G4

K13F4

E13D5

B13B3

A9M5

N12N3

J13N1

A2M3

K6

M4K5

N4K9

M9K8

N10M11

M6L12

N6A1

M8D4

N8B12

J1D8

K1N5

M7

2G

21

D

7D

8B

01

M

6D

9B

21

J

31

F

21

F

21

K

7N

9N

01

B

31

L

11

B

2F

4E

2C

1C

1D

1L

2D

2E

GH

CV

N_L TC _

GH

C

SU

BV_

BS

U

N_LTC_

BS

U

P_S

NSI

M_S

NSI

N_TEF_T

AB

TA

BV

N IO

CV

PU

KC

AB _

V

AN

A_D

DV

E_1C_

DD

V

AP _2

C _D

DV

2P

G_D

DV

6P

G_D

DV

2E

MS

M_D

DV

PM

SM_

DD

V

1FR_

DD

V

2FR_

DD

V

MIU

R _D

DV

RK

PS_L_

DD

V

RK

PS_

R _D

DV

OX

CT_D

DV

NAL

W_D

DV

MPP_1

MPP_2 VSW_5V

MPP_3 VREG_5V

MPP_4 VSW_MSMC1

MPP_5 VREG_MSMC1

MPP_6 VSW_MSMC2

MPP_7 VREG_MSMC2

MPP_8 VSW_MSME

MPP_9 VREG_MSME

MPP_10 VSW_PA

MPP_11 VREG_PA

MPP_12

MPP_13 VREG_GP1

MPP_14 VREG_GP2

MPP_15 VREG_GP3

MPP_16 VREG_GP4

MPP_17 VREF_GP5

MPP_18 VREG_GP6

MPP_19 VREG_MMC

MPP_20 VREG_MSMA

MPP_21 VREG_MSME2

MPP_22 VREG_MSMP

VREG_RFRX1

USB_ID VREG_RFRX2

USB_D_P VREG_RFTX

USB_D_M VREG_RUIM1

USB_OE_N VREG_SYNT

USB_DAT VREG_TCXO

USB_SE0 VREG_USB

VREG_WLAN

SBST MIC_BIAS

SBCK

SBDT_SSBI REF_ISET

MSM_INT_N REG_GND

REF_BYP

SPKR_IN_L_M

SPKR_IN_L_P TCXO_IN

SPKR_OUT_L_M TCXO_EN

SPKR_OUT_L_P TCXO_OUT

SPKR_IN_R_P

SPKR_IN_R_M XTAL_IN

SPKR_OUT_R_P XTAL_OUT

SPKR_OUT_R_M

SLEEP_CLK

VIDEO_IN AMUX_OUT

VIDEO_OUT

VIB_DRV_N KPD_PWR_N

KPD_DRV_N PON_RESET_N

LCD_DRV_N PS_HOLD

FLSH_DRV_N

1D

NG

2D

NG

3D

NG

4D

NG

5D

NG

6D

NG

7D

NG

8D

NG

9D

NG

01D

NG

11D

NG

21D

NG

3 1D

NG

41D

NG

51D

NG

61D

NG

7 1D

NG

81D

NG

91D

NG

02D

NG

1 2D

NG

22D

NG

32D

NG

42D

NG

52D

NG

R409 121K

KDS114E

D400

C437 0.1u

1nC436

22pC435

VREG_TCXO_2.85V

0.1uC434

C433 0.1u

10K

R407

0.1u

C432

51R406

C431

1n

2.2uC430

22pC429

2.2uC428

1n

C427

C426

33p

2.2uC425

VBATT

VREG_MSMC1_1.35V

VREG_MMC_3.0V

VCHG_VBUS

200K

R404

C424

1n

VREG_MSMP_2.6V

1nC423

C422 0.1u

VREG_RUIM_3.0V

C4212.2u

C420

4.7u

C4192.2u2.2u

C418

C417 0.1u

VREG_MSMA_2.6V

10u

C416

C4152.2u

VREG_MSMC2_1.25V

VREG_SMPS_2.1V

C414 0.1u

C413 0.1u

C412

1n

C411

1u

VREG_MSMP_2.6V

4.7uC410

0.1uC409

R403

4.7

4.7u

C408

2.2uC407

VREG_MOTOR_3.0V

TP400

C406 0.1u

C4054.7u

C404 0.1u

C403 0.1u

C402

33p

4.7uC401

C400 0.1u

VREG_AUX2_2.9V


47K

R437

934R

K01

TP403

TP

2.2uC460

VREG_SENSOR_2.6V

TP404

K0 03

524R

RW

PV+

SLEEP_CLK

REMOTE_PWR_ON

JTAG_PS_HOLD

TCXO_PM_19.2MHZ

MSM_USIM_DATA

MSM_USIM_RST

MSM_USIM_CLK

PS_HOLD

PM_INT_N

GSM_PA_DAC_REF

AMUX_OUT

PMIC_TCXO

nPON_RST

TCXO_EN

PMIC_SSBI

VSNS_MSMC2_1.25V

VSNS_MSME_1.8V

VSNS_MSMC1_1.25V

PU_

KC

AB

V

USIM_DATA

USIM_RST

USIM_CLK

PM_ON_SW

USB_LDO_EN

USB_LDO_EN

PCB_REVISION

PCB_REVISION

N_LTC_

GH

C

N_TEF_TT

AB

P _S

NSI

VBAT_TEMP

VBAT_SENSE

1.30V

C432 close to MSM

USB 3.3V LDO

150K

150K

150K

ADC

150K

TEST&E

150K

0.3mm

R2

2.13V

10K

68K

47K

150K

150K


REV

1.93V

C&H

B&G

1%

Local Ground Plan

PM7540

Place in PM7540 room at shield edge

A&F

Rev.1.1

150K

150K

PCB Revision Check ADC

Route together

0.16V

Rev.1.0

D&I

0.5mm

Rev.1.2 680K

0.81V

0.5mm

These CAPs close to inductors100K

1.73V

0.62V

300K

R1

0.5mm

1.04V

430K

Route together

Place close to PM7540 pins

U403 NUS5530MN

5

64

73

82

91

10DRAIN_B

NC1 COLLECTOR_B

COLLECTOR EMITTER

SOURCE BASE

DRAIN NC2

GATE

VCHG_VBUS

VBATT+VPWR

234R

smho

m001

C455

39p 33uFC448

ISNS_M

+VPWRCHG_CTL_N

BATT_FET_N

ISNS_P


2mm1%


U404

MAX14528

9 6

5 3

4

8 2

7 1IN1OUT1

IN2OUT2

IC1

OVLOIC2

DN

G

DN

GP

VCHG_VBUS

1uF

NFM21PC105B1A3FL400

4 3

2 1INOUT

G1G2

D401

22p

C444

HSMU-5SB-24DR2

CN400

15

13

11

9

7

5

4

3

2

1

14

12

10

8

6

C457

1u

MAX_DPMAX_DM

USB_ID

uUSB 5pin

Close by uUSB CONN

Close by uUSB CONN


2mm

2mm

TP�

TP2

TP1



4. TROUBLE SHOOTING


TP2

TP3

TP1

- 1�0 -LGE Internal Use Only Copyright © 2010 LG Electronics. Inc. All right reserved.Only for training and service purposes

4. TROUBLE SHOOTING

4. Trouble Shooting (BB)

USB Initial sequence of GD880 is : USB connected to GD880 VCHG_VBUS(FL400) go to 5V

VERG_MSME_1.8V is about 1.8V USB_CLK is OK(R210)->USB work

4.12 USB trouble

Start

VCHG_VBUS is aboutto 5V?

TP4 CLK is OK?


Check TP2

Check TP3

NO

YES

YES

NO

Cable is insert?

YES

Cable insertNO

YES

NOTP5,TP6 signal is out? Check TP1

130 P

- 1�1 -Copyright © 2010 LG Electronics. Inc. All right reserved.Only for training and service purposes


4. TROUBLE SHOOTING

U404

MAX14528

9 6

5 3

4

8 2

7 1IN1OUT1

IN2OUT2

IC1

OVLOIC2

DN

G

DN

GP

VCHG_VBUS

1uF

NFM21PC105B1A3FL400

4 3

2 1INOUT

G1G2

D401

22p

C444

HSMU-5SB-24DR2

CN400

15

13

11

9

7

5

4

3

2

1

14

12

10

8

6

C457

1u

MAX_DPMAX_DM

USB_ID

uUSB 5pin

Close by uUSB CONN

Close by uUSB CONN


2mm

2mmTP2

100

R207

100p

C20933

R210

1nC212

TG-5010LH_19_2M_75AX200

19.2MHz

32

41VCONT VCC

GND OUT10n

C213

1n

C214

VREG_TCXO_2.85V

VREG_MSMA_2.6V

C215 100p

0.1u

C216

100K

R213

0.1u

C219

NC7SV00P5X_NL

U202

3

2

4

15

VCC

GND

TCXO_RTR_19.2MHZ

TCXO_PM_19.2MHZ

RTR_TRK_LO_ADJ

TCXO_EN

USBH_SYSCLK

1.0T

TCXO Circuit

Clesed to TCXO

K7.4

924R

VREG_MSMP_2.6V

824R

K01

C451

1u

0.1u

C450

K7.4

724R

0.1u

C449

VCHG_VBUS

2.2K

R426

+VPWR

U402MAX14526EEWP+TCC6

2B

1C

2C

C3 A2

C4

D3

D1 D4

A1

B1

A3

B4 B3

B5 A5

C5 A4

D5 D2BATVB

DN1COMN1

DP2COMP2

U1UID

U2

RES

MIC

AUD1CAP

AUD2

GND

ISETIC

LC

S

AD

S

TNI

DNI

C459

USBH_DM

USBH_DP

MAX_MUIC_I2C_SCLMAX_MUIC_I2C_SDA

MUIC_SW_INT

UART2_RXDUART2_TXD

MAX_DPMAX_DM

USB_ID

C459 Close to MSM

MAX14526

TP� TP4

TP1TP5

TP6


4. TROUBLE SHOOTING


TP1

TP2

TP3

TP4

TP5 TP6

132 P

- 1�� -Copyright © 2010 LG Electronics. Inc. All right reserved.Only for training and service purposes


4. TROUBLE SHOOTING

Voice Receiver path as below:MSM7227 RCV_N / RCV_P 80PIN CONN RCV pad

Start

Change the Main boardNO

Connect the phone to networkEquipment and setup call

Setup 1KHz tone out

YES

Can you hear the tone?

YES

END

YESChange the Receiver

Hear the tone to the receiver?

NO

END


4.13 Audio trouble

4.13.1 Receiver path

The sine wave appear atTP1

The sine wave appearat TP2?

Check the 80pin Conn.Or Sub PCB.

NO

133 P

Voice Receiver path as below:MSM7227 RCV_N / RCV_P 80PIN CONN RCV pad

Start



Setup 1KHz tone out

YES

Can you hear the tone?

YES

END

YESChange the Receiver

Hear the tone to the receiver?

NO

END


4.13 Audio trouble

4.13.1 Receiver path

The sine wave appear atTP1

The sine wave appearat TP2?

Check the 80pin Conn.Or Sub PCB.

NO

133 P

CN200

729

738

747

756

765

774

783

792

801

RCV_P

RCV_N

MIC_BIAS

SPK_P

SPK_N

MIC_P

MIC_VGND

22p

C402

CN400

2

1

22p

C411

RCV_P

RCV_N

TP1

TP2


4. TROUBLE SHOOTING


TP2

TP1

134 P



4. TROUBLE SHOOTING

Voice path for Head_Set as below:MSM7227 HPH_R,HPH_L C507,C508 IC500(Audio Subsystem) FB502,FB503 3.5pi Ear-jack


4.13.2 Headset path (Voice & Multimedia play)

Start

The sine wave

appear at TP1?Change the Main board

NO


Setup 1KHz tone outAnd insert head_Set

YES

Can you hear the toneor sound?

NO

YESEND

YES

Check the TP5or change SUB PCB

The sine wave appear at TP2,TP3?

Check the TP4NO

YES

Or Play Multimedia ContentsAnd insert head_set

(Or Some Sound Signal)

135 P

1u

125C

22nC509

22nC510

220nC508

220nC507

IC500

D4

C3

B3

B2

C2

C1

D2

D1

A5

A4

5C

1B

3A

SS

V

DD

V

DD

VPC1N

C1P

INA2

INA1

INB2

INB1

BIAS

SDA

SCL

1u

105C

LINE_ONLINE_OP

HPH_LHPH_R

D505

1800FB503

1800FB504

10K105R

22p

C514D501

1800

FB502

J500

C8

100p

47

R508

D502100n

L500

47p

C517

47p

C518 D503

FM_ANT

EAR_SENSEEAR_MICP

EAR_REAR_L

TP1TP4

TP2

TP�

TP5

Audio Subsystem


4. TROUBLE SHOOTING


TP1

TP2 TP3

TP4

TP5

136 P



4. TROUBLE SHOOTING

Loud speaker path as below:

MSM7227 LINE_OP,ON C509,C510 IC500(Audio Subsystem) 80pin Conn Speaker PAD

Start

The sine wave appear at TP2?


Connect the phone to networkEquipment and setup callSetup 1KHz tone outSet phone with speaker phone modeor Play the multimedia contents

YES

Check TP1, 80pin Con.Or Change SUB PCB

NO

YES

Can you hear the tone? Change the Speaker ModuleNO

YES

END

The sine wave appear at pads of speaker?


4.13.3 Loud speaker path (voice speaker phone, Multimedia play)

137 P

1u

125C

22nC509

22nC510

220nC508

220nC507

IC500

D4

C3

B3

B2

C2

C1

D2

D1

A5

A4

5C

1B

3A

SS

V

DD

V

DD

VPC1N

C1P

INA2

INA1

INB2

INB1

BIAS

SDA

SCL

1u

105C

LINE_ONLINE_OP

HPH_LHPH_R

TP2

TP1

22p

C40922p

C410

CN401

2

1SPK_P

SPK_N

Audio Subsystem


4. TROUBLE SHOOTING


TP2

TP1

138P



4. TROUBLE SHOOTING

Can you scoping some sound signal at TP3

Change the TP4NO

YES

YES

make some sound or voice to MIC

Work well? ENDYES

Start

TP1 is 1.8V? Change the Main B’dNO

Make a call


4.13.4 Microphone for main MIC

Can you scoping some sound signal at TP2?

Check 80pin Conn.Or Change the SUB PCB

NO

YES

4.13.4.1 Normal Mode

Main Microphone path as below:MIC1 U400(Analog S/W) 80pin Conn -> C207 MSM7227

139P

TP�

DNI

C1MIC401

4

3

2

1P

G1

G2

O

MIC_BIAS

MIC_1PMIC1_VGND

SMD, TOP

SUMY0010609

+VPWR

0.1u

C400

U400

94

63

52

71

8101B0 1A

1B1 S1

2B0 2A

2B1 S2

GND VCC

MIC_SEL

MIC_PMIC_1P

MIC_2P

MIC1_VGND

MIC2_VGND

MIC_VGND

8H

6F

5F

01

J

01

H

9H

01

C

01

B

9C

9B

8F

8E

7F

7E

7C

7B

6C

5C

6B

5B

PI_

R_

EN

IL

NI

_R

_E

NIL

PI_

L_

EN

IL

NI_

L_

ENI

LP

1CI

MN

1CI

MP

2C

IM

N2

CI

MP

IX

UA

NI

XU

A

PO_

EN

IL

NO

_E

NI

LP

O_1

RA

EN

O_

1RA

ET

UO

XU

AR

_H

PH

L_

HP

H

PMO

CC

SAI

B_

CIM

FE

RV

_H

PH

MIC_BIAS

C201

47p

u1202

C

u1.03 02

C

u1 .040 2

C

502C

u1.0

u1 .060 2

C

u1.0702

C

u18 02

C

C210

0.1u

C21122u

33p

C7

39p

C223

MIC_VGND|GND

DNG

V_C

IM

R_O I

DU

A_MF

L_O I

DU

A_MF

NO_

ENI L

PO_

ENIL

P_V

CR

N_V

CR

L_H

PH

R_H

PH

PCI

M_R

AE

P_CI

M

nip

5E

ot

eso

lC

TP4

TP�

TP1

TP2


4. TROUBLE SHOOTING


TP2

TP1

TP3

TP4

140P



4. TROUBLE SHOOTING

Can you scoping some sound signal at TP3

Change the TP4NO

YES

YES


Work well? ENDYES

Start

TP1 is 1.8V? Change the Main B’dNO

Make a call



Check 80pin Conn.Or Change the SUB PCB

NO

YES

4.13.4.2 Speaker phone Mode

Main Microphone path as below:MIC2 U400(Analog S/W) 80pin Conn -> C207 MSM7227

141P

TP�10u

604C

15p

704C

47p

804C

MIC400

4

3

2

1P

G1

G2

O

MIC_BIAS

MIC_2PMIC2_VGND

MIC2_VGND

SUMY0010609SMD, TOP

+VPWR

0.1u

C400

U400

94

63

52

71

8101B0 1A

1B1 S1

2B0 2A

2B1 S2

GND VCC

MIC_SEL

MIC_PMIC_1P

MIC_2P

MIC1_VGND

MIC2_VGND

MIC_VGND

8H

6F

5F

01

J

01

H

9H

01

C

01

B

9C

9B

8F

8E

7F

7E

7C

7B

6C

5C

6B

5B

PI_

R_

EN

IL

NI

_R

_E

NIL

PI_

L_

EN

IL

NI_

L_

ENI

LP

1CI

MN

1CI

MP

2C

IM

N2

CI

MP

IX

UA

NI

XU

A

PO_

EN

IL

NO

_E

NI

LP

O_1

RA

EN

O_

1RA

ET

UO

XU

AR

_H

PH

L_

HP

H

PMO

CC

SAI

B_

CIM

FE

RV

_H

PH

MIC_BIAS

C201

47p

u1202

C

u1.03 02

C

u1 .040 2

C

502C

u1.0

u1 .060 2

C

u1.0702

C

u18 02

C

C210

0.1u

C21122u

33p

C7

39p

C223

MIC_VGND|GND

DNG

V_C

IM

R_O I

DU

A_MF

L_O I

DU

A_MF

NO_

ENI L

PO_

ENIL

P_V

CR

N_V

CR

L_H

PH

R_H

PH

PCI

M_R

AE

P_CI

M

nip

5E

ot

eso

lC

TP4

TP�

TP1

TP2


4. TROUBLE SHOOTING


TP4

TP2

TP1

TP3

142P



4. TROUBLE SHOOTING

MIC for Head_Set path as below:Insert Headset Interrupt which are the signal of Headset detecting arise in EAR_SENSE

MIC BIAS LDO U500’s R506(RES) :1.6V~1.8V(MIC BIAS) MIC signal FB504 C204->MSM7227

Insert Headset& Make a call

Check the TP2 orChange the Main b’d

TP1 is 1.6~1.8V ?YES NO


4.13.5 Microphone for headset


Check the 3.5pi Ear-jackOr Change Ear/mic SET

YES

YES


Work well? ENDYES


Check TP3 Or Change the Main b’d

NO

NO

YES

Start

143P

1R

2.2K

U500

5

3 24 1

VOUTVDDGNDCE D

NG

P

1800FB504

2.2u

405

C

VREG_MSMP_2.6V

2R

1K

4.7u

C503

EAR_SENSE

HOOK_ADC

HOOK_ADC|EAR_MICP

EAR_MICP

HS_MIC_BIAS_EN

8F

8E

7F

7E

7C

7B

6C

5C

6B

5B

PI_

R_E

NI

LN

I_

R_

EN

IL

PI_L_E

NIL

NI_L_

EN

IL

P1C

IM

N1C

IM

P2C

IM

N2

CI

MPIX

UA

NI

XUA

u1202

C

u1.03 02

C

u1 .040 2

C

502C

u1.0

u1.0702

C

u18 02

C

33p

C7

39p

C223

MIC_VGND|GND

DNG

V_C

IM

R_O I

DU

A_MF

L_O I

DU

A_MF

PCI

M_R

AE

P_CI

M

TP�

TP1

TP2

TP4


4. TROUBLE SHOOTING


TP1

TP2

TP3

TP4

144P



4. TROUBLE SHOOTING

5M camera control signals are generated by MSM7227.


TP1,TP2,TP4 Check

Camera is OK?

Check the camera conn. andreconnect the camera

Camera is OK

Change the camera

Yes

NO

NO

Yes

Change the Sub board

EndYes

End

NO

START

4.14 5M Camera trouble

MSM7227 output signal checkTP3

Yes

NO

Check master clock and pixel clock

Yes

Check the TP5

Yes

No

Change the Filter (FL200,201,202)

NO

145P


4. TROUBLE SHOOTING

10u

C200

33p

C201

CN201

17

16

15

14

13

12

11

10

9

8

7

6

5

314

323

332

341

30

29

28

27

26

25

24

23

22

21

20

19

18

CAM_VDD_1.8V

0.1u

C207

CAM_AF_2.8V

CAM_VDD_2.8V

120

FB200

0.1u

C208

0.1u

C206

CAM_PCLK

CAM_VSYNCCAM_HSYNC

CAM_MCLK

MCAM_RESET


S_CAM_DATA[0]S_CAM_DATA[1]S_CAM_DATA[2]S_CAM_DATA[3]S_CAM_DATA[4]S_CAM_DATA[5]S_CAM_DATA[6]S_CAM_DATA[7]S_CAM_DATA[8]S_CAM_DATA[9] MCAM_PWDN

5M CAMERA CON.

7.5pF

FL200

01

5

64

73

82

91INOUT_A1 INOUT_B1

INOUT_A2 INOUT_B2

INOUT_A3 INOUT_B3

INOUT_A4 INOUT_B4

1G

2G

7.5pF

FL201

01

5

64

73

82

91INOUT_A1 INOUT_B1

INOUT_A2 INOUT_B2

INOUT_A3 INOUT_B3

INOUT_A4 INOUT_B4

1G

2G

7.5pF

FL202

01

5

64

73

82

91INOUT_A1 INOUT_B1

INOUT_A2 INOUT_B2

INOUT_A3 INOUT_B3

INOUT_A4 INOUT_B4

1G

2G

CAM_PCLKCAM_HSYNC

CAM_DATA[7]CAM_DATA[6]CAM_DATA[5]CAM_DATA[4]

CAM_DATA[3]CAM_DATA[2]CAM_DATA[1]CAM_DATA[0]S_CAM_DATA[0]

S_CAM_DATA[1]S_CAM_DATA[2]|S_VGA_CAM_DATA[0]S_CAM_DATA[2]

S_CAM_DATA[3]|S_VGA_CAM_DATA[1] S_CAM_DATA[3]

S_CAM_DATA[4]|S_VGA_CAM_DATA[2] S_CAM_DATA[4]S_CAM_DATA[5]|S_VGA_CAM_DATA[3] S_CAM_DATA[5]S_CAM_DATA[6]|S_VGA_CAM_DATA[4] S_CAM_DATA[6]S_CAM_DATA[7]|S_VGA_CAM_DATA[5] S_CAM_DATA[7]

S_CAM_DATA[8]|S_VGA_CAM_DATA[6] S_CAM_DATA[8]S_CAM_DATA[9]|S_VGA_CAM_DATA[7] S_CAM_DATA[9]

CAM_DATA[8]CAM_DATA[9]FLT_CAM_HSYNCFLT_CAM_PCLK

1608

1608

EMI FILTER

TP1TP2

TP�

TP4

TP5



4. TROUBLE SHOOTING


TP1

TP2

TP3

TP4

TP5

147P


4. TROUBLE SHOOTING

VGA camera control signals are generated by MSM7227.


TP2, TP3 Check

Camera is OK?

Camera is OK

Change the camera

Yes

NO

NO

Yes

Change the Sub PCB

EndYes

End

NO

START

4.15 VGA Camera trouble

MSM7227 output signal checkTP1

Yes

NO

Check master clock and pixel clock

Yes

NO



4. TROUBLE SHOOTING


TP1

TP2

TP3

149P

0.1u

C211

0.1u

C212

60FB201

U200

1F

E3E4

E2A5

C4

A4

D4D6

C3C5

C2D3

C1C6

B4B5

B2

B1

B3

D2E5

D1B6

A3A2IOVDD DCLK

DVDD HSYNC

AVDD VSYNC

DATA0

DATA1

DATA2

EXTCLK DATA3

PWRDWN DATA4

RESET DATA5

SDA DATA6

SCL DATA7

GND1

GND2

VDD15_1 GND3

VDD15_2 GND4DN

GP

0.1u

C209


D200

CAM_PCLK

CAM_VSYNCCAM_HSYNC

CAM_MCLKVGA_CAM_PWDN

VGA_CAM_RESET_N


S_VGA_CAM_DATA[0]S_VGA_CAM_DATA[1]S_VGA_CAM_DATA[2]S_VGA_CAM_DATA[3]S_VGA_CAM_DATA[4]S_VGA_CAM_DATA[5]S_VGA_CAM_DATA[6]S_VGA_CAM_DATA[7]

TP1

TP2

TP�


4. TROUBLE SHOOTING

Main LCD control signals are generated by MSM7227. Those signal’s path are :MSM7227 80-pin Main to SUB connector RGB converter 60-pin LCD connector LCD Module


4.16 Main LCD trouble

The LCD works

START

Press END keyto turn the power on

Is the circuit powered? Follow the Power ONtrouble shooting

LCD display OK?

Check TP1,TP2,TP3

No

Yes

Yes

No

Disconnect and reconnect80-pin & 60-pin B to B

connector

Change the SUB BD

No

End

Yes

Display OK?Yes

NoNoChange the LCD module

NoChange the Main BDYes

Display OK?Yes

150P



4. TROUBLE SHOOTING


TP1

TP2

TP3

TP4

151P

100p

C128

0

R100

100201R

100p

C126

15p

C102

VREG_RGB_2.6V

VREG_LCD_1.8V

10nC103

100p

C127

U100

9B

9D

1F

1E

11L

6J

9F

3F

8C

11A

1A

L1B11

K2C10

K1A8

K3

H2E9

L2A9

B10

G10

H10E2

H11E3

G11B8

G3

H3C9

G2

H1D10

J4D11

K4F10

L4F11

J5

L3C2

J1D2

J2C1

K5A7

L5

K6A2

L6A3

J7B2

J8D1

L7C3

K7A4

K9B3

K8B4

L8B5

L9A5

K10C5

L10B6

J10A6

J9C6

J11C7

K11B1

11

C

01

A

01

E

11

E

1G

2F

3J

9H

3D

7B

9G

4C

1D

DV

ER

OC

2D

DV

ER

OC

1D

DV

OIH

2D

DV

OIH

1D

DV

OIP

2D

DV

OIP

DD

VM

AR

D

CC

VM

AR

D

DD

V 81D

M

DD

V51D

M

DD

V LLP

DD

VC

SO

GPIOH0 FPDAT0

GPIOH1 FPDAT1

GPIOH2 FPDAT2

GPIOH3 FPDAT3

GPIOH4 FPDAT4

GPIOH5 FPDAT5

GPIOH6 FPDAT6

GPIOH7 FPDAT7

GPIOH8 FPDAT8

GPIOH9 FPDAT9

GPIOH10 FPDAT10

GPIOH11 FPDAT11

GPIOH12 FPDAT12

GPIOH13 FPDAT13

GPIOH14 FPDAT14

GPIOH15 FPDAT15

FPDAT16

GPIOH16_ADS FPDAT17

GPIOH17_RD_ GPIOP0_FPDAT18

GPIOH18_WR_ GPIOP1_FPDAT19

GPIOH19_CS GPIOP2_FPDAT20

GPIOP3_FPDAT21

MDATA0P GPIOP4_FPDAT22

MDATA0M GPIOP5_FPDAT23

MSTBP GPIOP12

MSTBM GPIOP13

GPIOP14

INT GPIOP15

RESET_

TE FPFRAME

CNF FPLINE

TESTEN FPSHIFT

FPDRDY

PLP

PLPAV FPCS_1

MDREF FPCS_2

FPSCK

CLKI FPAO

OSCI FPSO

OSCO NC

1S

SV

2S

SV

3S

SV

4S

SV

5S

SV

6S

SV

7S

SV

1S

SV

MA

RD

2S

SV

MA

RD

SS

VD

M

SS

VLLP

3.3K

R103

100401R

2.2u

C105

2.2u

C1062.2u

C107

2.2u

C108

2.2u

C109

U102

43

52

61VCC1 VCC

A NC

GND Y

VREG_RGB_1.5V

4.7nC111

8208 01R

27MHz

X100FA-238_27MHz_9PF

2 1

3 4

5.6p

C1175.6p

C118

1M

R111


LCD_CVT_INTLCD_CVT_RESET_N

LCD_CVT_VSYNC

MDDI_P_DATA_P

MDDI_P_STB_P

LCD_SCL

LCD_SDI

LCD_CS_N

LCD_SDO

LCD_VSYNC

LCD_R[6]

LCD_R[3]LCD_R[2]

LCD_DEN

LCD_HSYNC

LCD_B[0]LCD_B[1]LCD_G[0]LCD_G[1]LCD_R[0]LCD_R[1]

LCD_R[4]LCD_B[5]LCD_B[6]LCD_B[7]LCD_G[5]LCD_G[6]LCD_G[7]LCD_R[5]

LCD_B[2]LCD_B[3]LCD_B[4]LCD_G[2]LCD_G[3]LCD_G[4]

LCD_R[7]

MDDI_P_STB_M

MDDI_P_DATA_M

LCD_CVT_VSYNC_LS

LCD_CVT_VSYNC_LS

LCD_DCLK

sa esolC s

A

EUSY0366801

TP1TP�

TP2

TP4


4. TROUBLE SHOOTING


TP1

TP3

TP2

TP4

TP5

152P

CN100

31 30

32 29

33 28

34 27

35 26

36 25

37 24

38 23

39 22

40 21

41 20

42 19

43 18

44 17

45 16

46 15

47 14

48 13

49 12

50 11

51 10

52 9

53 8

54 7

55 6

56 5

57 4

58 3

59 2

60 1

G1G2

G3G4


0.1u

C1120.1u

C113

TOUCH_VDD_2.8V

0.1u

C114

VREG_MSMP_2.6V

1211R

DNI311R

TOUCH_I2C_SDA

TOUCH_I2C_SCL

TOUCH_ACK


MLED_OUTMLED1

MLED3

MLED5

LCD_PWM

MLED2

MLED4

MLED6

FLT_LCD_R[7]

FLT_LCD_R[6]


FLT_LCD_G[2]




FLT_LCD_SDI

FLT_LCD_DEN

FLT_LCD_G[1]

FLT_LCD_R[5]


FLT_LCD_G[5]

FLT_LCD_CS_N

MLED7

FLT_LCD_DCLK

MINI_3.2"_LCD

100p

C210

LCD_RESET_N

TP5TP�TP2TP1

TP4



4. TROUBLE SHOOTING

4.17 SIM Detect Troubleshooting

Start

Work well?

TP1, TP2, TP3,TP4 is run?

Change the Sub board

End

Check J1

Yes

No

YES

NO

Re-insert the SIM card

Change SIM card

Work well? EndYes

No


USIM Initial sequence of GD880 is : SIM_CLK,SIM_RST,SIM_IO triggered VRUIM_3.0V go to 2.8V SIM IF work

153P


4. TROUBLE SHOOTING


TP1

TP2

TP3

TP4

154P

D504

43

52

61

J1

9 8

10 7

6 3

5 2

4 1VCCGND1

RSTVPP

CLKIO

GND2GND5

GND3GND4

10p

C522

15K20 5R

1u

C500

VREG_RUIM_3.0V

VREG_RUIM_3.0V

22p

C520

22p

C519

USIM_DATA

USIM_DATAUSIM_RST

USIM_RST

USIM_CLK

USIM_CLK

TP4

TP�TP2TP1



4. TROUBLE SHOOTING

4.18 Side Key Troubleshooting

There are 2 main Key, Volume and Camera Key, which is connected to Sub-PCB.

Volume Key consists of Volume up and Volume down. Also, Camera Key is composed of Focus and Shutter.

Start

Check Sub-PCB NO

Yes

Key press

Check R211 and R212NO

TP1 or TP2 is High?


TP3 or TP4 is High?

Yes

Check an U200 or Change the Main boardAnd Retest

155P

24

23

22

21

20

19

18

17

16

15

14

13

470

R211

470

R212

470

R213

470

R214

56K512R

56K612R

VREG_MSMP_2.6VLCD_CVT_INT

LCD_CVT_RESET_N

KEY_ROW[0]

KEY_ROW[1]

KEY_COL[0]

KEY_COL[1] LIN_MOTOR_EN

LCD_CVT_VSYNC

MDDI_P_STB_M

PM_ON_SWTP4 TP�

TP2TP1


4. TROUBLE SHOOTING


TP1

TP2

TP3

TP4

156P



4. TROUBLE SHOOTING


4.19 LINEAR MOTOR

Linear Motor trouble shooting can be processed as below :

U302 uses the PWM pulse.VB300_LMOTOR_P and VB300_LMOTOR_N : output of U302.

Start

Work well?

TP3 is 3V?TP4 is high?

TP5 is working?

End

Check an U302 SMT status by X-ray,

Exchange it

YES

No

NO

YES

Reboot

Check SW

TP1, TP2 is OK? Check motor & FPCB connection

YES

No

TP1

TP2

TP3

TP4

TP5

157P

VB300

2

1

100nL300

100n

L301

VREG_MOTOR_3.0V

1u

C3073.9n

C308313R

510K

10K41 3R U302

9

54

63

72

81EN V1

SIN VSS

TYPE VCC

OCT V2DN

GP

LIN_MOTOR_EN

LIN_MOTOR_PWM

Linear Motor PAD

1%

LINEAR MOTOR DRIVER

EUSY0200803

TP1TP2TP�

TP4

TP5


4. TROUBLE SHOOTING


Proximity Sensor is worked as below : Send Key click Phone number click Call connected Object moved at the sensor

Control the screen’s on/off operation automatically

Send Key click & call connected

Object moved at the Proximity Sensor

LCD on/off?

No

Start

End

Yes

NOChange the Main Board

4.20 Proximity Sensor on/off trouble

YES

Work well?

TP1 output checkNO

Change the sensor (U300)

TP2, TP3, TP4 checkNO

Change the Main Board

YES

YES

158P

Change the Sub Board



4. TROUBLE SHOOTING


1) Measurement : U300-. VCC : VREG_SENSOR_2.6V (C304,R310)-. PROXI_OUT :(U300)-. PROXI_SDA / SCL : data / CLK pulse (R308, R309)

TP1

TP2

TP3

TP4

159P

0.1u

C301

2.2u

C302

4.7K

R308

4.7K

R309

VREG_SENSOR_2.6V

VREG_SENSOR_2.6V

R310

4.7

10u

C304

U300

54

63

72

81

AD

ELL

CS

CD

ELA

DS

CC

VOI

V

TU

OV

DN

G

10


VREG_SENSOR_2.6V

1u

C305PROXI_I2C_SCL

PROXI_I2C_SDA

PROXI_OUT

TP1TP2

TP4

TP�


4. TROUBLE SHOOTING


Luminance Sensor is worked as below : Sensor ALC function On Object moved at the Luminance sensor

automatically controls brightness of the display backlight. (Very slowly)

4.21 Luminance Sensor on/off trouble

Sensor ALC function On

Object moved at the Luminance sensor

LCD backlight change (slowly)?

No

Start

End

Yes

NOChange the Sub Board

YES

Work well?

TP5,TP6,TP7,TP8 checkNO Change the Luminance sensor

U301

TP1, TP2, TP3, TP4 checkNO

Change the Main Board

YES

YES

160P



4. TROUBLE SHOOTING


1) Measurement : Main U801 SPK FPCB U101-. +VPWR : 4V (C125) -. VREG_MSMP_2.6V : 2.6V (C124)-. U101 (GC1 / GC2) : data pulse -. U301 (SENS)-. LCD_SUBPM_I2C_SDA / SCL : data / CLK pulse (R107, R110)

TP1 TP2 TP3 TP4

TP5 TP6

TP7

TP8

161P

U101D2D1

6F1A

1F6A

E3F2

E5D3F5E2E6E1

F3C1

A4


F4D6B6

5A

6C

5B

5C

4C

N1C

P1C

N2C

P 2C

DN

GP

C

VBATCP VOUTVBAT

LED1LED2


WPWMIN

LEDGNDSBIAS

SSENS LDO1OSGND LDO2OGC2 LDO3OGC1 LDO4O

2T 4T 1T 3T

LED7LED8

2.2u

C115

CAM_AF_2.8V

2.2u

C116

TOUCH_VDD_2.8V

4.7K701R

4.7K011R

VREG_MSMP_2.6V

TP101

1u

C1191u

C120

+VPWR

1u

121

C

CAM_VDD_1.8V CAM_VDD_2.8V

2.2u

C1222.2u

C123

1u

C124

VREG_MSMP_2.6V

10u

521

C

GAIN1GAIN2

LCD_SUBPM_RESET_N

SBIAS

LCD_SUBPM_I2C_SCLLCD_SUBPM_I2C_SDA

SENS

MLED_OUT

MLED1

MLED3

MLED5

LCD_PWM

MLED2

MLED4

MLED6MLED7

LCD Charge-pump (with ALC)

TP2

10K

213

R1u

C306

U301

6

43

2

51VCC IOUT

GND1

GC1 GC22D

NG

GAIN1 GAIN2

SBIAS SENS


TP1

TP�

TP4

TP5TP6 TP7

TP8


4. TROUBLE SHOOTING


Motion Sensor is worked as below : Accelerometer Sensor function On Tilt the phone (90˚) The screen is had rotated automatically.

4.22 Motion Sensor on/off trouble

Accelerometer Sensor function On

Tilt the phone

The screen is rotated

No

Start

End

Yes

NOChange the Sub Board

YES

Work well?

TP1,TP2 checkNO Change the Motion sensor

U303

TP3 checkNO

Change the Sub Board

YES

YES

162P

Change The Main Board



4. TROUBLE SHOOTING

4.Trouble Shooting (BB)

1) Measurement : Sub board-. VREG_MSMP_2.6V : 2.6V (C309)-. MOTION_INT : High enable (TP300)-. MOTION_I2C_SDA / SCL : data / CLK pulse (R315, R316)

TP1 TP2 TP3

163P

U303

21

11

65

74

83

92

101NC1 NC2

VDD VDDIO

GND SDI

INT SDO

CSB SCK

1TO

N

2TO

N 0.1u

C300

VREG_MSMP_2.6V

TP300

1u

C309

4.7K513R

4.7K613R

VREG_MSMP_2.6V

MOTION_INT

MOTION_I2C_SCL

MOTION_I2C_SDA

Motion Sensor

TP�TP2

TP1

4.Trouble Shooting (BB)

1) Measurement : Sub board-. VREG_MSMP_2.6V : 2.6V (C309)-. MOTION_INT : High enable (TP300)-. MOTION_I2C_SDA / SCL : data / CLK pulse (R315, R316)

TP1 TP2 TP3

163P


5. DOWNLOAD

5. DOWNLOAD



5. DOWNLOAD



6. BLOCK DIAGRAM

6. BLOCK DIAGRAM

MINI Block Diagram

5Mega AFParallel Interface [0:9]

LBEH19UNBC

PCM I2CGSM FEMUART1/

DM

WCDMAGSM

VGA Camera

5Mega AFCamera

Camera I/F[0:9]

I2C

I2CGPS

GPS BT Wi-Fi

SDIO1

FMFM Audio R/L

Parallel Interface [2:9]

I2C

MSM7227

CAM I/F

MCP

RX

SBI

GSM8509001800

RX ADC

SSBI

EBI2 DATA

GSM FEMRTR6285

DM Camera I/F[0:9]

NANDFlash

3.2” FWVGA LCDMDDIGPS GPS ADC

RGBInterface

RGB 24bit

EDGEPAM

I2C

EBI2 ADDR

TXWCDMA9002100

1900

TX DACEBI1 DATAEBI1 ADDR

Duplexer

WCDMA PAM

DDRSDRAM2Gbit

Flash4Gbit

Charge Pump BD6084

8CH

LCD_PWM

SDIO2

Ambient LightSensor

RF Block8CH

(ALC)SDIO2

Speaker

Line O P/NHPH_R/L

EAR1OP/N Receiver Micro SD UART3/

UIM2

UART2/DM I2C

TouchSensor

ProximitySensor

Speaker AMP

E h R/L

TCXO_RTR_19.2MHz

3.5EarphonePM_SSBI USB I/F

MIC1P

UART2/UIM

I2C

Sensor

3-AxisSensor

Li

PWM

Headset AMPMIC2PEarphone R/L

Audio SubsystemLine L/R_IP FM Audio R/L

Earphone R/L

TRK_LO_ADJGPSD F/F

X-Tal(19.2MHz)

PM7540

SSBI

cro

US

Bne

ctor

USB 2.0 HS

USB

VBUS

OVP

LinearMotor

VCHG_VBUSTCXO_PM_19.2MHz

USIM

USIM Translator

UART1/DM : BT URRT2/DM : UART2(DP)UART2/UIM : USIMUART3/UIM2 : N.A

5pin

Mi

Con

nMUIC

UARTD+ / D-

UART3/UIM2


6. BLOCK DIAGRAM

POWER Block

MSM7227PM7540

Charging IC(NUS5530MN)

VCHG_VBUSTA (5PIN)

5.1V,700mA

+VPWR

VREG_MSMC1_1.35V (500m A)

VREG_MSME_1.8V (500m A)

VREG_MSMA_2.6V (300m A)

VDD

PM7540

VSW_MSME

VREG_MSMA

VSW_MSMC1

VSW_MSMC2 VREG_MSMC2_1.25V (500m A)



VDD_P1/P2/P8 /MDDI ( 1.8V ,MAX 10mA )

VDD_A / PLL ( 2,6V , MAX 65mA )CHG_CTL_NBATT FET N

Battery900mAh

VBATT

VREG_MSMP_2.6V (300m A) VREG_MSMP

VREG_GP5VREG_AUX2_2.9V (150m A)

VDD_P3/P4 (2.6V , MAX 25mA )

VDD_QFUSE (2.9V , MAX 10mA )

VDD_USBPHYE (3.3V , MAX 10mA )USBLDO(3.3V)

BATT_FET_N

+VPWR

MCPSDRAM ( 1.8V , MAX 180mA )

NAND ( 1.8V , MAX 30mA )

RTR6285

GSM PAM

WCDMA PAM


VDDM ( 2.6V , MAX 10mA )


VREG_RF_2.7V (150mA)

VREG_SMPS_2.1V (300mA)

VREG_RFRX1

VSW_PA

VREG_GP2GPS LNA

VREG_LCD_2.8V (150mA)LCD moduleVIO (1.8V )

WCDMA PAM

VREG_SYNT

VREG_MSME2

VREG_GP1

Motion Sensor ( 2.7V, MAX ?mA)

VREG_GP6 VREG_SENSOR_2.6V (300mA) Proximity sensor( 2.7V, 20mA)

VREG_SYNTH_2.75VVREG_LCD_1.8V (150mA)

VREG_RGBC_1.5V (150mA)

FEMWVGA LCD Controller

CORE,DRAM,PLL,MD15 (1.5V )

MD18 PIO HIO (1 8V )

VDD (2.8V )

VREG_RFTX

VREG_GP3

VREG_MMC_3.0V (150mA)VREG_MMC MICRO SD slot (3.0V , , MAX mA )

VREG_TCXO_2.85V (50mA)VREG_TCXO TCXO (2.85V , , MAX 20mA )

GPS D FLIP-FLOP

VREG_RGBC_2.6V (150mA)MD18,PIO,HIO (1.8V )

DRAM,OSC (2.6V )

VREG_RFRX2

USIM SLOT (3.0V , , 1mA )VREG_RUIM_3.0V (150mA)VREG_RUIM1

VREG_MOTOR_3.0V (300mA) Linear Motor Driver ( 3.0V, mA ) VREG_WLAN

VREG_GP4

BACKUP BatteryVBACK_UP VCOIN



6. BLOCK DIAGRAM

BD6084GUL

POWER Block

VREG_MSMP_2.6V

BD6084GUL

CAM_VDD_2.8V

CAM_VDD_1.8V

LDO2 (150mA)

LDO1 (150mA)

LDO3 (150mA)

5M CAMERA VIO

CAM_AF_2.8V

+V_PWR

LDO4 (150mA)

VBATVGA CAMERA

Touch ICTOUCH_VDD_3.3V

MLED ( 7ea )MLEDOUT ( 450mA )LCD_BACKLIGHT_4.8V

WIFI/BT/FM MODULEVBAT

VDDIO/VDDIO_SDVREG_MSMP_2.6V

LDO(2.8V) 26MHz TCXO for WIFI/BT/FM

MUIC

Audio Sub System


3. Technical Brief




6. BLOCK DIAGRAM



6. BLOCK DIAGRAM

3. Technical Brief





ANT_SEL[0:3]Main Antenna GPIO72~75

GSM PAMASM

GSM_PA_RAMPGSM_PA_EN

GSM_PA_BAND

RTR_TX_ONDCS PCS TX

DCS_PCS_OUT

GSM_OUT

PA_PWR_CTL

GPIO80

GPIO79

TX ONRF ON

DCS_PCS_OUT

GSM_OUT

VAPC

TX_EN

BS

ANT PCN_PCS_OUT

GSM_OUT

RF

ASM RTR_DAC_REF

4

DCS_PCS_TX

GSM_TX

4 GSM Band Rx

4

RTR_TX_I/Q

_

DAC_REF

I/Q_RTR_P/M

_

DAC_IREF

TX_I/Q P/N

LB_RF_OUT1

HB_RF_OUT1DCS_PCS_IN

GSM_INWCDMA_2100

MSM7227

transceiver

WCDMA PAM

DPX

4

4

4

W900_TX_OUT

RFOUT_LOW

4

PDET IN

RX_WCDMA_900RX_WCDMA_2100

GPS_IN

RTR_RX_I/Q

RTR_DRX_I/Q

I/Q_IP/M_CH0

I/Q_IP/M_CH1

PRX_I/Q P/N

DRX_I/Q P/NGPS_IN

WPRXSE2WPRXLBLB_RF_OUT2

GSM_INRFin_Low

RFOUT_LOW

WCDMA_850

MSM7227DPXW900

4RTR_SSBI

W2100_TX_OUTW2100_PA_ONW900_PA_ON

W_PA_R0

PDET_IN

RX_WCDMA_900

GPIO59

PA_ON0

GPIO_22

PA_RANGE0

SBDTTCXO

PDET_IN

VmodeVen_Low

Ven_HighRFin_High

RFOUT_HIGH

VCTCXODf/f

TRK_LO

PMIC_TCXO

RTR_TRK_LODPX

W2100RFOUT_HIGH

TCXO_PM_19.2MHz

TCXO_RTR_19.2MHz

RX_WCDMA_2100

TRK_LO_ADJ

PMICPM7540

_

GSM_PA_DAC_REFPMIC_SSBI

GPS AntennaGPS_IN

TCXO

GSM_BG_REF

GPIO106SBDT_SSBI

MPP_8

TCXO_OUTTXCO_IN

GPSLNA GPS_EN

6. BLOCK DIAGRAM



6. BLOCK DIAGRAM

3. Technical Brief


- 185 -

7. CIRCUIT DIAGRAM

LGE Internal Use OnlyCopyright © 2010 LG Electronics. Inc. All right reserved.Only for training and service purposes

C1022

0.5p

1KR1024

1KR1022

R1025 1K

ANT1001

ANTPAD_GD880

FEED

3.9n

L1005

C1015DNI

100pC4

C3DNIDNI

C2

2.2n

L1012

27p

8601C

3.9p

C1055

3.9pC1029

C1057 100p

SW1001

G1

G2

ANTG3

L

K

J

I

H

G

F

E

D

C

B

A

12 11 10 9 8 7 6 5 4 3 2 1


L

K

J

I

H

G

F

E

D

C

B

A

12 11 10 9 8 7 6 5 4 3 2 1

U1001

3

2

5

4

1NI

_FR

FIL_OUT

VDD

S_D

GND

C10020.1u

DNI

C1003

6.8nL1001

0

R1001

C1004

DNI

VREG_RF_2.7V

DNI

R1002

3001R

180

15n

L1002

0501C 33p

C1087 10n

1KR1023

4.7u

C1026

C1049

68p

22pC1007

3.9nL1020

C1038

0.5p

1.8pC1010

C101139p

C1012 2.7p

C1104 DNI

C1077

68p

VREG_SMPS_2.1V

C10141n

2.2R1005

33pC6

L10062.2n

L1004 1.2n

DNIC1017

C10180.1u

R1006

5.1

C1019

0.1u

12n

L1021C10211n

3.9nL1017

C1023 22p

4201

Cu1

.0C1025 22p

0.75p

C1009

100pC1027

U1002

51

8 7

9 6

10 5

11 4

12 3

13 2


VMODEGND3

VBPVCC2

VCC1GND2

VEN_LOWRFOUT_HI

VEN_HIGND1

RFIN_HICPL DN

GP

3.6n

L1009

4.7n

L1024

C10310.1u

0.5p

C1063

C1056 68p

7001R

120

33pC1034

C103522p

FL1001

1575.42MHz

5 3 2

4 1OUTIN G1G2G3

5.1

R1008

22p

C1036

VREG_SMPS_2.1V

2.7pC1037

FL1002

897.5 MHz,942.5 MHz

95

8

4 72

3

61

RX1ANT

TXGND1

GND4GND2

RX2

GND3 GND6

L1022

12n

1K

R1009

33pC1040

U1003

32

92

82

53

43

96

62

61

60

54

4336

3738

2768

2552

2142

8

745

144

5347

2246

10

649

448

3

51

6750

1939

40

18

1741

16

1533

32

1331

1430

12

1159

58

956

24

557

55

65

6620

632

6426RF_ON TX_IP

TCXO TX_INSBDT TX_QP

TX_QNLB_RF_OUT1

LB_RF_OUT2 VTUNE1

VTUNE2HB_RF_OUT1 VTUNE_GPS

HB_RF_OUT2

HB_RF_OUT3 PRX_QP

PRX_QN

WPRXLBP PRX_IPWPRXLBN PRX_IN

WPRXHBP

WPRXHBN DRX_QP

DRX_QN

WDRXLB DRX_IP

DRX_IN

WDRXHB1

WDRXHB2 NC

GCELL_INP DAC_IREF

GCELL_INNVDDA1_1

EGSM_INP VDDA1_2

EGSM_INN VDDA1_3

VDDA1_4

DCS_INP VDDA1_5

DCS_INN VDDA1_6

GPCS_INP VDDA2_1

GPCS_INN VDDA2_2

VDDA2_3GPS_IN VDDA2_4

PDET_IN VDDA2_5TX_RBIAS VDDA2_6

WPRXSE1 VDDA2_7

WPRXSE2 VDDA2_8VDDA2_9

VDDA2_10

VDDA2_11

VDDA2_12DN

GP

TU

O_2E

SX

RP

W

TU

O_1E

SX

RP

W

PNI_

XM_

BW

MNI_

XM_

BW

MD

DV

51pC1041

0101R

91

DNI

C1042

C1043

33p

R1011

51

C1044DNI

0.1u

C1045

C1046100p

U1004

23 22

24 21

25 20

26 19

27 18

28 17

9 8

10 7

11 6

12 5

13 4

14 3

15 2

16 1DCS_PCS_INDCS_PCS_OUT

BSGND6

TX_ENGND5

VBATTVCC_OUT

VAPCGND4

NCGND3

GND1GND2

GSM_INGSM_OUT

PGND1PGND12

PGND2PGND11

PGND3PGND10

PGND4PGND9

PGND5PGND8

PGND6PGND7

2.2n

L1013

C1048100p

15pC1100

2.2pC1051

10nC1052

10R1012

1nC1053

L10073.6n

4.7u

C1069

VREG_SYNTH_2.75V

100pC5

L1026

15n

C1060 22p

L1011

15n

R1013

12K

22p

C1061

10KR1014

FL1003

1950MHz,2140MHz

75

84

92

3

16ANT RX

TX


C106210u

5101R

120

C1039 4.7p

C10640.1u

100pC1066

7601

Cp0

01

6101R

91

1.2n

L1003

18n

L1019

0701

Cu1

.0

1701

Cu1

.0

7101R

180

C107310u

VREG_RF_2.7V

R1018

2.2K

L1008

15n

100pC1075

C1076

0.1u

2.7nL1023

2.7n

L1010

2140MHz

FL1004

52

4

31IN OUT

_OUTG1 G3

FL1005

1950MHz

5 3 2

4 1INOUT G1G2G3

C10810.1u

100pC1082

5201L 1.2n

82

R1020

C1084 39p

+VPWR

5801

Cu1

.0

1.8pC1086

C1090100p

L1014

10n

C1092

0.1u

+VPWR

C1093 4.7p

2.2pC1094

30

R1021

0.1u

C1096

C1008

4.7u

C10970.1u

1n

C1098

FL1006

897.5MHz

5 3 2

4 1INOUT G1G2G3

68pC1028

C1101

4.7u

C11020.1u

VREG_MSMP_2.6V

100pC1103

12n

L1015

1901C 3.3p

C1106DNI

DNI

C1108

C1109 3.9p

DNIC1110

2.7nL1016

C1111DNI

FL1007

850,1900,2100MHz

65437

11

9

22

21

20

1324

1223

10

158

141

17

162

19

18PCS_RX1

PCS_RX2

ANT PCN_RX1

PCN_RX2

GND1 EGSM_RX1

GND2 EGSM_RX2

GND3

GND4 GSM850_RX1

GND5 GSM850_RX2

WCDMA_2100

WCDMA_850

WCDMA_1900

PCN_PCS_TX

GSM850_EGSM_TX

DD

V

1LRT

C

2LRT

C

3LRT

C

4LRT

C

22p

C1112

GND

SW1002

G4G3INOUT G1G2

2.2nC1113VREG_MSMA_2.6V

22pC111468pC1080

12

R1026

ANT1002

ANTPAD_GD880

FEED

5901C 3.3p

1.5nL1018

GPS_LNA_EN

RTR_DRXQPRTR_DRXQM

RTR_DRXIMRTR_DRXIP

RTR_RXQPRTR_RXQM

RTR_RXIMRTR_RXIP RTR_TXQM

RTR_TXQPRTR_TXIM

RTR_TXIP

RTR_DAC_REF

TCXO_RTR_19.2MHZ

ANT_SEL3

GSM_PA_RAMP


ANT_SEL2ANT_SEL1

W_PA_R0

RTR_TX_ON

W_2100_PA_ON

W_PA_R1

RTR_SSBI

W_900_PA_ON



WB2100_MIX_INP

WB2100_MIX_INP

WB2100_MIX_INM

WB2100_MIX_INM

RX_PCS_P

RX_PCS_P

RX_PCS_M

RX_PCS_M

RX_DCS_P

RX_DCS_P

RX_DCS_M

RX_DCS_M

RX_GSM_900_P

RX_GSM_900_P

RX_GSM_900_M

RX_GSM_900_MRX_GSM_850_P

RX_GSM_850_P

RX_GSM_850_M

RX_GSM_850_M

WCDMA_900_TX_OUT

WCDMA_900_TX_OUT

RX_WCDMA_2100

RX_WCDMA_2100

RX_WCDMA_900_M

RX_WCDMA_900_M

PDET_IN

PDET_IN

GPS_IN

GPS_IN

RX_WCDMA_900_P

RX_WCDMA_900_P

DCS_PCS_TX

DCS_PCS_TX

GSM_TX

GSM_TX

ANT_SEL0

WCDMA_2100_TX_OUT

WCDMA_2100_TX_OUT

PCS1900(1850-1910 MHz)

W2100 RX(2110 - 2170 MHz)

LOW

SFSY0035101

VDDA1 : Pin 3,4,6,10,22,53 = +2.7V VDC

W900 RX(925 - 960 MHz)

2mm

HIGH

HIGH

LOW

LNA for the GPS

HIGH

HIGH


LOW

SDMY0002801

LOW

W2100 RX(2110 - 2170 MHz)

LOW

LOW

HIGH

LOW

GSM(925-960 MHz)

SMZY0016501

HIGH5dB

LOW

LOW

HIGH

BAND1: SFSY0035001

Near to RTR6285

LOW

(WCDMA_1900)

LOW

Band 1

W900 TX(880 - 915 MHz)

LOW

LOW

LOW LOW

LOW

ANTENNA SWITCH MODULE LOGIC

DCS/PCS TX

HIGH

BAND5 : B9425 ( SFSY0036501)

GSM900(880-915 MHz)

LOW

BAND 5/8

BAND2 : B9640 (SFSY0036601)

ANT_SEL0 ANT_SEL2

(WCDMA_1900)

WCDMA RX 2100 LNA Circuit

PCS(1930-1990 MHz)

BAND8(2520) : B7953 (SDMY0002801)

LOW

SFSY0036501

WCDMA 2100 (UMTS2)

LOW

GSM850/EGSM TX HIGH

DCS1800 RX

WCDMA 900 (UMTS1)

GSM850 RX

HIGH

BAND8 : B9442 (SFSY0037601)

BAND1 : B9414 (SFSY0035101)

HIGH

GSM850(824-849 MHz)

1%

SDMY0001901

WCDMA

DCS1800(1710-1785 MHz)

+2.1V

GSM

LOW

LOW

ANT_SEL3

BAND1 : B9411 (SFSY0035001)BAND2 : B9419 (SFSY0034901)

GSM(869-894 MHz)

ANT_SEL1

BAND2(2520) : ACMD-7407

DCS(1805-1880 MHz)

EGSM RX

PCS1900 RX

SMPY0019101

Band 8

1004430Y

SU

E

BAND 1/2

+2.7V

W2100 TX(1920 - 1980 MHz)

Route togetherVDDA2 : Pin 1,7,8,21,25,27,37,43,54,60,61,62 = +2.1V VDC

8dB

7. CIRCUIT DIAGRAM


D200

CN200

AXT610124

65

74

83

92

101

G1 G2

G3 G4

302R

IN

D

100R204

U200

MSM7227_DATA

M5

Y18

AC19

AF18

Y17

U16

AC18

AF17

W16

AE17

AC17

Y16

AB17

W5

W3

V5

V6

AB9

V9

V8

Y9

W8

AB8

V3

V2

U2

U8

U9

AF4

AE2

AB7

AE4

AE3

AD3

L2

L8

L3

L9

AD2

AC6

AC3

AC2

U15

W15

AC16

AB16

AF15

Y15

AC15

AB15

W14

AE14

AC14

Y14

AC13

U13

Y13

AB13

W13

W12

AB12

Y12

AC12

AC11

AF10

W9

AE10

U12

AF9

AC20

AF20

AB21

AE20

AF21

AF22

AC23

AE23

AC21

AF23

AE21

AB22

AC22

AE24

AE25

AF24

6M

8M

9M

8E

A

7F

A

8C

A

6F

A

7C

A

6E

A

11

R

81

BA

81

W

11

Y

71

C

71

B

61

H

81

H

71

M

62

G

01

Y

11

T

01

W

61

EA

8F

A

61

FA

5F

A

31

F

21

C

21

B

11

H

11

J

21

H

21

J

11

E

21

F

11

F

21

E

91

EA

91

FA

02

BA

51

C

61

F

31

H

41

H

41

J

31

J

11

C

41

L

3F

2F

3E

2E

2D

52

G

61

L

91

C

91

B

91

H

62

F

02

H

81

J

71

J

32

H

22

F

32

F

61

J

71

E

51

J

71

F

61

B

61

C

51

H

81

B

52

B

12

F

02

B

02

F

71

H

02

E

02

C

81

C

81

F

B21

B22

C21

E21

C22

C24

E26

B24

F25

C26

D26

C23

B23

C25

D25

E23

W20

AD26

N17

T20

J25

M20

N25

V26

H26

L25

P20

U26

V19

AC25

U19

U20

AB23

W25

W26

R19

T19

W22

AC26

V23

AB26

AB25

AA23

AA25

Y26

Y23

T17

Y22

W23

AA26

V20

J26

K20

J20

J23

J22

K19

K26

L22

L19

L23

L20

M19

L26

M26

M22

M23

N26

N19

N20

P26

R26

P19

R25

T26

R22

R23

R20

T23

T22

U25

U23

U22

4C

6G

5G

6N

3N

2N

2W

6W

3M

8T

2K

3K

2J

3J

2H

3H

2G

3G

6R

2P

3P

2R

3R

11B

41

FA

31

FA

21

FA

11FA

5BA

3BA

2B

A

3A

A

2A

A

2Y

6AA

2M

3U

11

W

9E

A

9C

A

6B

A

3Y

71

W

91

BA

51E

41

C

31

C

51B

41B

31

B

8H

6F

5F

01J

01H

9H

01

C

01

B

9C

9B

8F

8E

7F

7E

7C

7B

6C

5C

6B

5B

PI_

R_

ENIL

NI_

R_

EN

IL

PI_L

_E

NI

LN

I_L

_E

NI

LP1CIM

N1CI

MP2C

IM

N2CI

MPI

XUA

NI

XUA

PO_E

NI

LNO_E

NI

LPO_1

RA

ENO_

1RAE

TUO

XUA

R_

HPH

L_

HPH

PMOC

CS

AIB

_C

IM

FERV

_HPH

KLC

SYS

_Y

HPBSU

PD_

YHP

BS

UND

_YH

PB

SU

DI_

YH

PBS

US

UBV

_Y

HP

BSU

TXE

R_YHP

BS

U

N_NI

SE

RN_

TU

OS

ER

NE_G

ODW

0_ED

OM

1_ED

OM

2_EDO

M3_ED

OM

OXCT

JDA

_O

L_

KRT

KLC_

PEE

LS

IDTSMTN_TS

RT

ODTKCTKCT

R

P_AT

AD

_I

DDM

N_AT

AD_I

DDM

P_BTS

_ID

DM

N_BT

S_ID

DM

KLC

P_C

DCL

P_

TUO

_I

N_TU

O_I

P_TU

O_Q

N_TUO

_Q

FER_C

AD

0HC

_PI

_I

0H

C_

MI

_I

0H

C_P

I_

Q0

HC_

MI_

Q1

HC_

PI

_I

1HC_

MI

_I

1HC_P

I_Q

1HC_

MI

_Q

NO_X

TJ

DA

_C

GA

_XT

0NO_

AP

0EGN

AR

_A

PLTC_

RWP_

AP

M_L

TC_

RWP

_AP

FER

_GB

_MS

G

0NI

AK

H1

NIA

KH

2NIA

KH

EBI1_DQ_0EBI1_DQ_1EBI1_DQ_2EBI1_DQ_3EBI1_DQ_4EBI1_DQ_5EBI1_DQ_6EBI1_DQ_7EBI1_DQ_8EBI1_DQ_9EBI1_DQ_10EBI1_DQ_11EBI1_DQ_12EBI1_DQ_13EBI1_DQ_14EBI1_DQ_15EBI1_DQ_16EBI1_DQ_17EBI1_DQ_18EBI1_DQ_19EBI1_DQ_20EBI1_DQ_21EBI1_DQ_22EBI1_DQ_23EBI1_DQ_24EBI1_DQ_25EBI1_DQ_26EBI1_DQ_27EBI1_DQ_28EBI1_DQ_29EBI1_DQ_30EBI1_DQ_31

EBI1_ADR_0EBI1_ADR_1EBI1_ADR_2EBI1_ADR_3EBI1_ADR_4EBI1_ADR_5EBI1_ADR_6EBI1_ADR_7EBI1_ADR_8EBI1_ADR_9EBI1_ADR_10EBI1_ADR_11EBI1_ADR_12EBI1_ADR_13

EBI1_CKE0EBI1_CKE1EBI1_DCLKEBI1_DCLKBEBI1_WE_NEBI1_CS0_NEBI1_CS1_NEBI1_BA_0EBI1_BA_1EBI1_DQS_0EBI1_DQS_1EBI1_DQS_2EBI1_DQS_3EBI1_DM_0EBI1_DM_1EBI1_DM_2EBI1_DM_3EBI1_RAS_NEBI1_CAS_NEBI1_RESOUT_NEBI1_CAL

EBI2_DATA_0EBI2_DATA_1EBI2_DATA_2EBI2_DATA_3EBI2_DATA_4EBI2_DATA_5EBI2_DATA_6EBI2_DATA_7EBI2_DATA_8EBI2_DATA_9EBI2_DATA_10EBI2_DATA_11EBI2_DATA_12EBI2_DATA_13EBI2_DATA_14EBI2_DATA_150

_RD

A_

2IBE

1_RD

A_

2IBE

2_

RDA_

2IBE

3_

RDA_

2IBE

4_

RDA_

2IBE

5_

RDA_

2IBE

6_

RDA_

2IBE

7_

RDA_

2IBE

8_

RDA_

2IBE

9_

RDA_

2IBE

01_

RDA_

2IBE

11_

RDA_

2IBE

21_

RDA_

2IBE

31_

RDA_

2IBE

41_

RDA_

2IBE

51_

RDA_

2IBE

61_

RDA_

2IBE

N_

0SC_

2IBE

N_

1SC_

2IBE

N_

4SC_

2IBE

N_

5SC_

2IBE

N_

6SC_

2IBE

N_

7SC_

2IBE

KLC_

2IBE

N_

EW_

2IBE

N_

EO_

2IBE

N_

BU_

2IBE

N_

BL_

2IBE

N_0Y

SUB_

2IBE

RE

PIW

RL

_ST

LL

_ST

RU

_ST

LU

_ST

231_

OIPG

131_

OIPG

031_

OIPG

921_

OIPG

821_

OIPG

721_

OIPG

621_

OIPG

521_

OIPG

421_

OIPG

321_

OIPG

221_

OIPG

121_

OIPG

021_

OIPG

911_

OIPG

811_

OIPG

711_

OIPG

611_

OIPG

511_

OIPG

411_

OIPG

311_

OIPG

211_

OIPG

111_

OIPG

011_

OIPG

901_

OIPG

801_

OIPG

701_

OIPG

601_

OIPG

501_

OIPG

401_

OIPG

301_

OIPG

201_

OIPG

101_

OIPG

001_

OIPG

99_

OIPG

89_

OIPG

79_

OIPG

69_

OIPG

59_

OIPG

49_

OIPG

39_

OIPG

29_

OIPG

19_

OIPG

09_

OIPG

98_

OIPG

88_

OIPG

78_

OIPG

68_

OIPG

58_

OIPG

GPIO_0GPIO_1GPIO_2GPIO_3GPIO_4GPIO_5GPIO_6GPIO_7GPIO_8GPIO_9GPIO_10GPIO_11GPIO_12GPIO_13GPIO_14GPIO_15GPIO_16GPIO_17GPIO_18GPIO_19GPIO_20GPIO_21GPIO_22GPIO_23GPIO_24GPIO_25GPIO_26GPIO_27GPIO_28GPIO_29GPIO_30GPIO_31GPIO_32GPIO_33GPIO_34GPIO_35GPIO_36GPIO_37GPIO_38GPIO_39GPIO_40GPIO_41GPIO_42GPIO_43GPIO_44GPIO_45GPIO_46GPIO_47GPIO_48GPIO_49GPIO_50GPIO_51GPIO_52GPIO_53GPIO_54GPIO_55GPIO_56GPIO_57GPIO_58GPIO_59GPIO_60GPIO_61GPIO_62GPIO_63GPIO_64GPIO_65GPIO_66GPIO_67GPIO_68GPIO_69GPIO_70GPIO_71

GPIO_72_GRFC_9GPIO_73_GRFC_8GPIO_74_GRFC_7GPIO_75_GRFC_6GPIO_76_GRFC_5GPIO_77_GRFC_4GPIO_78_GRFC_3GPIO_79_GRFC_2GPIO_80_GRFC_1GPIO_81_GRFC_0

GPIO_82GPIO_83GPIO_84

IN

D502

R

MIC_BIAS

C201

47p

u1202

C

u1.03 02

C

u1 .040 2

C

502C

u1.0

u1.0602

C

R206

100

L

K

J

I

H

G

F

E

D

C

B

A

12 11 10 9 8 7 6 5 4 3 2 1


L

K

J

I

H

G

F

E

D

C

B

A

12 11 10 9 8 7 6 5 4 3 2 1

u1.0702

C

u1802

C

100

R207

TP200

TP201

TP202

TP203

TP204

100p

C209

C210

0.1u

802R

K1

C21122u

VCHG_VBUS

0406

902R

TP205

VREG_MSMP_2.6V

33

R210

49.9

R211

K01

212R

V6.2_P

MS

M_G

ER

V

1nC212

V6.2_P

MS

M_G

ER

VK74812

R TG-5010LH_19_2M_75AX200

19.2MHz

32

41VCONT VCC

GND OUT10n

C213

TP206

1n

C214

VREG_TCXO_2.85V

TP207

TP

TP

TP208

TP209

TP

VREG_MSMA_2.6V

C215 100p

0.1u

C216

0.1u

C217

100K

R213

C218

33p

0.1u

C219

R214

2K

VREG_TCXO_2.85V

C220

33n

NC7SZ74L8X U201

5 4

6 3

7 2

8 1_PRVCC

_CLRCK

QD

GND_Q

012PT

33p

C7

102R

K051K003

002R

47p

C221

VREG_MSMP_2.6V

47pC222

NC7SV00P5X_NL

U202

3

2

4

15

VCC

GND

C200

15p

100

R202

K001

612R

712R

K01

VCHG_VBUS

UAT200

UART_TP

12

11

10

9

8

7

6

5

4

3

2

1GND

RX

TX

NC1

ON_SW

VBAT

NC2

NC3

NC4

DSR

RTS

CTS

GND

RX

TX

VCHAR

ON_SW

VBAT

PWR

URXD

UTXD

3G2.5G

VBATT

39p

C223

MIC_VGND|GND

DNG

V_C

IM

N_TE

SE

R_TB

N_

TES

ER

_NA

LW

BT_HOST_WAKEUP

WLAN_CMDWLAN_CLK


WLAN_SDIO[0]

BT_PCM_DOUTBT_PCM_DINBT_PCM_SYNCBT_PCM_CLK

BT_UART1_CTS

KLC_

PE

ELS

BT_WAKEUP

R_OI

DU

A_MF

PU

EK

AW_T

SO

H_N

ALW

L_OI

DU

A_MF

BT_UART1_TXDBT_UART1_RXD

REG_ON

BT_UART1_RTS

GPS_LNA_EN

PQ

XR

D_RT

RM

QX

RD_

RTR

MIX

RD_

RTR

PIX

RD_

RTR

PQ

XR_

RTR

MQ

XR_

RTR

MIX

R_RT

RPI

XR_

RTR

MQ

XT_RT

RP

QXT_

RTR

MIXT_

RTR

PIXT_

RTR

FE

R_C

AD_

RTR

TCXO_RTR_19.2MHZ

ANT_SEL3

PM

AR_

AP_

MS

G


ANT_SEL2ANT_SEL1

0R_

AP_

W

NO_

XT_RT

R

NO_

AP_0012_

W

1R_

AP_

W

RTR_SSBI

W_900_PA_ON

REMOTE_PWR_ON

REMOTE_PWR_ON

JTAG_PS_HOLD

SDRAM_ADDR[13]

TCXO_PM_19.2MHZ

RTR_TRK_LO_ADJ

RTR_TRK_LO_ADJ

EAR_SENSE

nSDRAM_CAS

SDRAM_BA1SDRAM_BA0

AD

S_C

2I_

OIDUA

MSM_USIM_DATA

MSM_USIM_RSTMSM_USIM_CLK

PS_HOLDPM_INT_N

NO_

ENIL

PO_

ENIL

P_V

CR

N_V

CR

FE

R_C

AD_

AP_

MS

G

TU

O_X

UM

A

OL_K

RT

TRK_LO

OX

CT_CI

MP

PMIC_TCXO

TUO

SE

R_GA

TJn

|T

SR_

NO

Pn

TS

R_N

OPn

nJTAG_RESOUT

TU

OS

ER_

GATJn

MSM_RTCK

KCT

R_M

SM

MSM_TRSTN

NTS

RT_M

SM

KCT_

MS

M

MSM_TCK

SMT_

MS

M

MSM_TMSMSM_TDI

IDT_

MS

M

ODT_

MS

M

MSM_TDON

E_O

XCT

TCXO_EN

IB

SS_

CIM

P

EBI2_DATA[8]EBI2_DATA[9]

EBI2_DATA[10]EBI2_DATA[11]EBI2_DATA[12]EBI2_DATA[13]EBI2_DATA[14]EBI2_DATA[15]

EBI2_DATA[0]EBI2_DATA[1]EBI2_DATA[2]EBI2_DATA[3]EBI2_DATA[4]EBI2_DATA[5]EBI2_DATA[6]EBI2_DATA[7]

SC_

HS

ALF_D

NA

Nn

SDRAM_ADDR[6]

SDRAM_ADDR[0]SDRAM_ADDR[1]SDRAM_ADDR[2]SDRAM_ADDR[3]SDRAM_ADDR[4]SDRAM_ADDR[5]

SDRAM_ADDR[7]SDRAM_ADDR[8]SDRAM_ADDR[9]

SDRAM_ADDR[10]SDRAM_ADDR[11]SDRAM_ADDR[12]

nSDRAM_WE

nSDRAM_RAS

SDRAM_CKE

SDRAM_DCLK1SDRAM_DCLK0

SDRAM_DQS0SDRAM_DQS1SDRAM_DQS2SDRAM_DQS3SDRAM_DQM0SDRAM_DQM1SDRAM_DQM2SDRAM_DQM3

MD_

HB

SU

PD_

HB

SU

L_H

PH

R_H

PH

CD

A_K

OO

H

PCI

M_R

AE

LCS

_C

2I_O

IDUA

YD

AE

R_H

SALF_

DN

AN

NE_

SAI

B_CI

M_S

H

KLC

SY

S_H

BS

U

USBH_SYSCLK

MAX_MUIC_I2C_SCL


MAX_MUIC_I2C_SDA

KEY_ROW[0]KEY_ROW[1]

KEY_COL[0]KEY_COL[1]

BL_D

NA

NnB

U_D

NA

Nn

SDRAM_DATA[31]SDRAM_DATA[30]SDRAM_DATA[29]SDRAM_DATA[28]SDRAM_DATA[27]SDRAM_DATA[26]SDRAM_DATA[25]SDRAM_DATA[24]SDRAM_DATA[23]SDRAM_DATA[22]SDRAM_DATA[21]SDRAM_DATA[20]SDRAM_DATA[19]SDRAM_DATA[18]SDRAM_DATA[17]

SDRAM_DATA[15]SDRAM_DATA[14]SDRAM_DATA[13]SDRAM_DATA[12]SDRAM_DATA[11]SDRAM_DATA[10]

SDRAM_DATA[9]SDRAM_DATA[8]SDRAM_DATA[7]SDRAM_DATA[6]SDRAM_DATA[5]SDRAM_DATA[4]SDRAM_DATA[3]SDRAM_DATA[2]SDRAM_DATA[1]

CAM_PCLK

CAM_VSYNCCAM_HSYNC

CAM_DATA[7]CAM_DATA[6]CAM_DATA[5]CAM_DATA[4]CAM_DATA[3]CAM_DATA[2]

CAM_DATA[0]

P_CI

M

CAM_MCLK

SDRAM_DATA[0]

SDRAM_DATA[16]

nRESETOUT

EW_

DN

ANn

EO_

DN

ANn

nSDRAM_CS0

MOTION_INT

TNI_T

VC_

DCL

N_TE

SE

R_TV

C_D

CL

MICROSD_DATA[0]MICROSD_DATA[1]MICROSD_DATA[2]MICROSD_DATA[3]

MICROSD_DET_N

MIC_SEL

MICROSD_CMDMICROSD_CLK

LIN_MOTOR_PWM

TUO

_I

XO

RP

ADS_

C2

I_I

XO

RP

LCS

_C2I

_IXO

RP

VGA_CAM_RESET_N

VGA_CAM_PWDNMOTION_I2C_SDA

MOTION_I2C_SCL

LCD_SUBPM_I2C_SDA

LCD_SUBPM_RESET_N

LIN_MOTOR_EN

CAM_DATA[1]

KC

A_H

CU

OTTOUCH_I2C_SCL

TOUCH_I2C_SDA

N_

TE

SE

R_DCL

LCD_SUBPM_I2C_SCL

CAM_DATA[8]CAM_DATA[9]

SDRAM_CKE1

nSDRAM_CS1

TN

I_

WS

_CIUM

MCAM_RESETMCAM_PWDN

P_AT

AD_

P_ID

DM

M_AT

AD_

P_ID

DM

P_BT

S_P_I

DD

MM_

BTS_

P_ID

DM

DI

_R

EK

AM_DCL

UART2_RXD

UART2_RXD

UART2_RXD

DX

T_

2TR

AU

UART2_TXD

UART2_TXD

KC

EH

C_D

NA

B_FR

RF_BAND_CHECK

CNY

SV_TV

C_D

CL

ANT_SEL0

0001 : Native, ARM9 + ARM11 on PJTAG

MODE[3:0]

ARM9&ARM11 JTAG

0000 : Native, ARM9 on PJTAG, ARM11 on AJTAG

1.0T

ARM9&ARM11 JTAG

UART TP

TCXO Circuit

GPS D FLIP-FLOP

Clesed to TCXO

Clesed to NC7SZ74L8X

Array TP

1% Close to MSM

nip 5E

ot

esolC

1%

1.30V

150K

150K

150K

ADC

150K

R2

2.13V150K

150K

BAND

1.93V

2100 + 850

HKAIN0 : RF BAND Check ADC

2100 + 900

1900 + 850 680K

100K

1.73V300K

R1

1.04V

430K

- 187 -

7. CIRCUIT DIAGRAM


4.7u

C340

C315

4.7u

U200MSM7227

L5

E10

AE22

AD25

AE18

AE15

AE11

AE7

Y5

T5

H25

E25

E22

Y25

V25

T25

P25

M25

K25

AE12

AC10

AC5

Y8

AF26

AF25

AF3

AF2

AE26

AB11

Y20

W19

U17

U11

P23

N23

M11

L17

L12

K23

K9

J19

G23

E19

C2

B26

B3

B2

T2

R8

R5

P9

N8

K6

K5

J6

J5

F9

E6

C8

C3

U6

T6

T3

R9

P8

P5

N9

K8

J9

J8

H6

H5

E9

E5

D3

B8

AE13

AE5

AB14

AB10

AA22

Y19

Y6

V22

U14

T16

T15

T14

T13

T12

R17

R16

R15

R14

R13

R12

P22

P17

P16

P15

P14

P13

P12

P11

P6

N22

N16

N15

N14

N13

N12

M16

M15

M14

M13

M12

L15

L13

L6

K22

G22

F19

F15

F10

E14

B4

7GA

6GA

5GA

4GA

3GA

72G

A

62G

A

52G

A

42G

A

32G

A

22G

A

12G

A

02G

A

2GA

91G

A

81G

A

71G

A

61G

A

51G

A

41G

A

31G

A

21G

A

11G

A

01G

A

1GA

72F

A

1FA

72E

A

1EA

72D

A

1DA

72C

A

1CA

72B

A

1BA

72A

A

1AA

72A

62A

52A

42A

32A

22A

12A

02A

91A

81A

71A

61A

51A

41A

31A

21A

11A

01A

9A

8A

7A

6A

5A

4A

3A

2A

1A

61E

41

F

5A

A

22

H

11N

5N

81

E

31

E

5U

9T

72Y

1Y

72

W

1W

72V

1V

72U

1U

72T

1T

72

R

1R

72P

1P

72N

1N

72M

1M

72

L

1L

72K

1K

72J

1J

72H

1H

72

G

1G

72F

1F

72E

1E

72D

1D

72

C

1C

72

B

1B

9G

A

8GA

56_

CN

66_

CN

76_

CN

86

_CN

96

_CN

07_

CN

17_

CN

27_C

N37_

CN

47_

CN

57_

CN

67

_CN

77

_CN

87_

CN

97_

CN

08_C

N18_

CN

28_

CN

38_

CN

48

_CN

58

_CN

68_

CN

78_

CN

88_

CN

98_C

N09_

CN

19_

CN

29_

CN

39

_CN

49_

CN

59_

CN

69_

CN

79_C

N89_

CN

99_

CN

001

_CN

10

1_CN

20

1_CN

301

_CN

401

_C

N

1DVS

R2DV

SR

8P_

DDV

9P_D

DV

01P_

DDV

GRP_ESU

FQ_DD

V

1C_SNS_

DDV

2C_

SNS

_D

DV

6P2

_YHPBSU

_DDV

3P

3_

YHPBS

U_DDV

1_CN

2_CN

3_CN

4_CN

5_CN

6_CN

7_CN

8_CN

9_CN

01_CN

11_CN

21_CN

31_CN

41_CN

51_CN

61_

CN

71_CN

81_CN

91_CN

02_CN

12_CN

22_CN

32_CN

42_

CN

52_CN

62

_CN

72_CN

82_CN

92_CN

03_CN

13_CN

23_CN

33_CN

43

_CN

53_CN

63_CN

73_CN

83_CN

93_CN

04_CN

14_CN

24_CN

34_CN

44_CN

54_CN

64_CN

74_CN

84_CN

94_

CN

05_CN

15_CN

25_CN

35_CN

45_CN

55_CN

65_CN

75_CN

85_CN

95_CN

06_CN

16_CN

26_CN

36_CN

46_CN

GND1GND2GND3GND4GND5GND6GND7GND8GND9GND10GND11GND12GND13GND14GND15GND16GND17GND18GND19GND20GND21GND22GND23GND24GND25GND26GND27GND28GND29GND30GND31GND32GND33GND34GND35GND36GND37GND38GND39GND40GND41GND42GND43GND44GND45GND46GND47GND48GND49GND50

GND_A1GND_A2GND_A3GND_A4GND_A5GND_A6GND_A7GND_A8GND_A9GND_A10GND_A11GND_A12GND_A13GND_A14GND_A15GND_A16

VDD_A1VDD_A2VDD_A3VDD_A4VDD_A5VDD_A6VDD_A7VDD_A8VDD_A9VDD_A10VDD_A11VDD_A12VDD_A13

VDD_C1_1VDD_C1_2VDD_C1_3VDD_C1_4VDD_C1_5VDD_C1_6VDD_C1_7VDD_C1_8VDD_C1_9VDD_C1_10VDD_C1_11VDD_C1_12VDD_C1_13VDD_C1_14VDD_C1_15VDD_C1_16VDD_C1_17VDD_C1_18VDD_C1_19VDD_C1_20VDD_C1_21VDD_C1_22VDD_C1_23VDD_C1_24

VDD_C2_1VDD_C2_2VDD_C2_3

VDD_MDDI

VDD_P1_1VDD_P1_2VDD_P1_3VDD_P1_4VDD_P1_5VDD_P1_6

VDD_P2_1VDD_P2_2VDD_P2_3

VDD_P3_1VDD_P3_2VDD_P3_3VDD_P3_4VDD_P3_5VDD_P3_6

VDD_P4_1VDD_P4_2

VDD_P7_1VDD_P7_2

V3.3_B

SU

V6.2_A

MS

M_G

ER

V

10n

C300

V9.2_2X

UA_

GE

RV

V8.1_E

MS

M_G

ER

V

VREG_MSMP_2.6V

VREG_MSME_1.8V

VREG_MSMC2_1.25V

VREG_MSMC1_1.35V

VREG_MSMA_2.6V

4.7u

C342

0.1u

C301

USB_3.3V

C303

1n

C304

1n1n

C305C306

1n

C307

1n1n

C310

1n

C311

10n

C312C313

10n

1n

C314

TP

TP300

TP

TP301

C316

0.1u

DNI

R300

C317

0.1u0.1u

C318

L

K

J

I

H

G

F

E

D

C

B

A

12 11 10 9 8 7 6 5 4 3 2 1


L

K

J

I

H

G

F

E

D

C

B

A

12 11 10 9 8 7 6 5 4 3 2 1

10n

C319C321

0.1u

1n

C322C323

1n

C324

0.1u

C325

10n0.1u

C326

10n

C327

0.1u

C328C329

0.1u

0.1u

C330

0.1u

C331C332

1n

R301

10K

10u

C333

10u

C334

C335

10u

C336

10u

C337

10u

VREG_MSMA_2.6VVREG_MSMP_2.6V

0.1u

C338

VREG_MSMC1_1.35V VREG_MSME_1.8VVREG_MSMC2_1.25V

VSNS_MSMC2_1.25V

VSNS_MSMC1_1.25V

U301H8BCS0UN0MCR-4EM

01R

9R

2R

1R

01A

9A

2A

01P

1P

4M

1G

3F01B

2B

1B

E5H7N5G5B5J7E7G9F8F10G6E9J8D10H2C9G2N9K1M10E3L9H8K9G8J10J2

M1C7P8C8H10D7H1D8D1D6B8E8D5M2F6P9F7J1E6H9H4C1H3B9F5G10E4F9F4E10G4D9G3C10J4N10H5M9H6L10J5K10J6J9G7P6K6C5K5K7C6L8C3K8C4L7B4L6B7L5B3L4B6

K2N8J3M7M3N7F1P5F2P4K3N4D4P3E2P2D3M8E1N6D2M6C2P7L3M5L2N3L1N2K4N1

IO0 A0IO1 A1IO2 A2IO3 A3IO4 A4IO5 A5IO6 A6IO7 A7IO8 A8IO9 A9IO10 A10IO11 A11IO12 A12IO13 A13IO14 BA0IO15 BA1

_CE DQ0_RE DQ1_WEN DQ2CLE DQ3ALE DQ4_WP DQ5R_B DQ6

DQ7VSSN1 DQ8VSSN2 DQ9VSSQ1 DQ10VSSQ2 DQ11VSSQ3 DQ12VSSQ4 DQ13VSSQ5 DQ14VSSQ6 DQ15VSSQ7 DQ16VSSQ8 DQ17VSSQ9 DQ18VSSQ10 DQ19VSS1 DQ20VSS2 DQ21VSS3 DQ22VSS4 DQ23VSS5 DQ24VSS6 DQ25

DQ26VDD1 DQ27VDD2 DQ28VDD3 DQ29VDD4 DQ30VDD5 DQ31VDD6

_CSVDDQ0 CLKVDDQ1 _CLKVDDQ2 CKEVDDQ3 _WEDVDDQ4 _RASVDDQ5 _CASVDDQ6 DQM0VDDQ7 DQM1VDDQ8 DQM2VDDQ9 DQM3

DQS0VCCN1 DQS1VCCN2 DQS2

DQS3

1C

N2

CN

3C

N4

CN

5C

N6

CN

7C

N8

CN

1U

ND

2U

ND

3U

ND

4U

ND

5U

ND

6U

ND

7U

ND

VSNS_MSME_1.8V

0.1u

C339

TP

TP302

TP303

TP

TP

TP304

TP305

TP

TP

TP306

1n

C341

TP307

TP

VREG_MSME_1.8V

VREG_MSME_1.8V

TP

TP308

VREG_MSME_1.8V

100KR308

0.1u

C343

VREG_MSME_1.8V

SDRAM_ADDR[13]

nSDRAM_CAS

SDRAM_BA1SDRAM_BA0

EBI2_DATA[8]EBI2_DATA[9]

EBI2_DATA[10]EBI2_DATA[11]EBI2_DATA[12]EBI2_DATA[13]EBI2_DATA[14]EBI2_DATA[15]

EBI2_DATA[0]EBI2_DATA[1]EBI2_DATA[2]EBI2_DATA[3]EBI2_DATA[4]EBI2_DATA[5]EBI2_DATA[6]EBI2_DATA[7]

nNAND_FLASH_CS

SDRAM_ADDR[6]



nSDRAM_WEnSDRAM_RAS

SDRAM_CKESDRAM_DCLK1SDRAM_DCLK0

SDRAM_DQS0SDRAM_DQS1SDRAM_DQS2SDRAM_DQS3

SDRAM_DQM0SDRAM_DQM1SDRAM_DQM2SDRAM_DQM3

NAND_FLASH_READY

nNAND_LBnNAND_UB

SDRAM_DATA[31]SDRAM_DATA[30]SDRAM_DATA[29]SDRAM_DATA[28]SDRAM_DATA[27]SDRAM_DATA[26]SDRAM_DATA[25]SDRAM_DATA[24]SDRAM_DATA[23]SDRAM_DATA[22]SDRAM_DATA[21]SDRAM_DATA[20]SDRAM_DATA[19]SDRAM_DATA[18]SDRAM_DATA[17]

SDRAM_DATA[15]SDRAM_DATA[14]SDRAM_DATA[13]SDRAM_DATA[12]SDRAM_DATA[11]SDRAM_DATA[10]SDRAM_DATA[9]SDRAM_DATA[8]SDRAM_DATA[7]SDRAM_DATA[6]SDRAM_DATA[5]SDRAM_DATA[4]SDRAM_DATA[3]SDRAM_DATA[2]SDRAM_DATA[1]SDRAM_DATA[0]

SDRAM_DATA[16]

nRESETOUT

nNAND_WEnNAND_OE

nSDRAM_CS0

1EKC

_MARDS

1SC_MARD

Sn

VREG_MSMC2_1.25V|VSNS_MSMC2_1.25V

VREG_MSME_1.8V|VSNS_MSME_1.8V

VREG_MSMC1_1.35V|VSNS_MSMC1_1.25V

MCP (Hynix)MSM7227 Power Part

Cap for MSM7227 Power

NAND 4G/DDR 2G (DDR400MHz)

7. CIRCUIT DIAGRAM


U404

MAX14528

9 6

5 3

4

8 2

7 1IN1OUT1

IN2OUT2

IC1

OVLOIC2

DN

G

DN

GP

VCHG_VBUS

R435

470Kohms

434

R

smh

oK0

86

U403 NUS5530MN

5

64

73

82

91

10DRAIN_B

NC1 COLLECTOR_B

COLLECTOR EMITTER

SOURCE BASE

DRAIN NC2

GATE

VCHG_VBUS

VREG_MSMP_2.6V

334R

smho

K6.08

VBATT

C45833u

1uF

NFM21PC105B1A3FL400

4 3

2 1INOUT

G1G2

KQ03LQ-3R

CN401

3

2

1D1

D2

VBATT+VPWR

234R

smho

m001

D401

C455

39p

K7.4

924R

VREG_MSMP_2.6V

0.1u

C454

C453

0.1u

824R

K01

C451

1u

0.1u

C450

K7.4

724R

0.1u

C449

VCHG_VBUS

33uFC448

ISNS_M

2.2K

R426

U401RP103K331D

5

3 24 1

VOUTVDDGNDCE D

NG

P USB_3.3V

1u

C447

+VPWR

4.7uL403

4.7uL402

L401 4.7u

424R

K051

VREG_MSMP_2.6V

u2.2644

C

VREG_MSME_1.8V

R423

1K

VREG_LCD_1.8V

C445

1u

22p

C444

VREG_RGB_1.5V

L400 4.7u

2.2uC442

SC_MINI

SC401

1

10u

C441

K1

834R

1u

C461

+VPWR

CM315_12_5PF

X40032.768KHz 2

1

0.1uC440

VREG_MSME_1.8V

4.7uC439

C4382.2u

VREG_SYNTH_2.75V

VREG_RF_2.7V

+VPWR

M_S

NSI

PM7540U400

9J

8J

7J

6J

5J

9H

8H

7H

6H

5H

9G

8G

7G

6G

5G

9F

8F

7F

6F

5F

9E

8E

7E

6E

5E

H1

E10F1

F10E1

C12N2

B1

M12B2

K7

A5

N13A4

M13B5

B4

G10A7

D9A6

H12B7

B6

C13

A13D10

A12K10

H10

G12J10

G1

M1K4

D13J4

E12H4

N11M2

A3L2

A10H2

A8

H13K2

G13J2

A11G4

K13F4

E13D5

B13B3

A9M5

N12N3

J13N1

A2M3

K6

M4K5

N4K9

M9K8

N10M11

M6L12

N6A1

M8D4

N8B12

J1D8

K1N5

M7

2G

21

D

7D

8B

01

M

6D

9B

21

J

31

F

21

F

21

K

7N

9N

01

B

31

L

11

B

2F

4E

2C

1C

1D

1L

2D

2E

GH

CV

N_LTC_

GH

C

SU

BV_

BS

U

N_LTC_

BS

U

P_S

NSI

M_S

NSI

N_TEF_T

AB

TA

BV

NIO

CV

PU

KC

AB_

V

AN

A_D

DV

E_1C_

DD

V

AP_2

C_D

DV

2P

G_D

DV

6P

G_D

DV

2E

MS

M_D

DV

PM

SM_

DD

V

1FR_

DD

V

2FR_

DD

V

MIU

R_D

DV

RK

PS_L_

DD

V

RK

PS_

R_D

DV

OX

CT_D

DV

NAL

W_D

DV

MPP_1

MPP_2 VSW_5V

MPP_3 VREG_5V

MPP_4 VSW_MSMC1

MPP_5 VREG_MSMC1

MPP_6 VSW_MSMC2

MPP_7 VREG_MSMC2

MPP_8 VSW_MSME

MPP_9 VREG_MSME

MPP_10 VSW_PA

MPP_11 VREG_PA

MPP_12

MPP_13 VREG_GP1

MPP_14 VREG_GP2

MPP_15 VREG_GP3

MPP_16 VREG_GP4

MPP_17 VREF_GP5

MPP_18 VREG_GP6

MPP_19 VREG_MMC

MPP_20 VREG_MSMA

MPP_21 VREG_MSME2

MPP_22 VREG_MSMP

VREG_RFRX1

USB_ID VREG_RFRX2

USB_D_P VREG_RFTX

USB_D_M VREG_RUIM1

USB_OE_N VREG_SYNT

USB_DAT VREG_TCXO

USB_SE0 VREG_USB

VREG_WLAN

SBST MIC_BIAS

SBCK

SBDT_SSBI REF_ISET

MSM_INT_N REG_GND

REF_BYP

SPKR_IN_L_M

SPKR_IN_L_P TCXO_IN

SPKR_OUT_L_M TCXO_EN

SPKR_OUT_L_P TCXO_OUT

SPKR_IN_R_P

SPKR_IN_R_M XTAL_IN

SPKR_OUT_R_P XTAL_OUT

SPKR_OUT_R_M

SLEEP_CLK

VIDEO_IN AMUX_OUT

VIDEO_OUT

VIB_DRV_N KPD_PWR_N

KPD_DRV_N PON_RESET_N

LCD_DRV_N PS_HOLD

FLSH_DRV_N

1D

NG

2D

NG

3D

NG

4D

NG

5D

NG

6D

NG

7D

NG

8D

NG

9D

NG

01D

NG

11D

NG

21D

NG

31D

NG

41D

NG

5 1D

NG

61D

NG

71D

NG

81D

NG

91D

NG

02D

NG

12D

NG

22D

NG

32D

NG

42D

NG

52D

NG

R409 121K

KDS114E

D400

C437 0.1u

1nC436

22pC435

L

K

J

I

H

G

F

E

D

C

B

A

12 11 10 9 8 7 6 5 4 3 2 1


L

K

J

I

H

G

F

E

D

C

B

A

12 11 10 9 8 7 6 5 4 3 2 1

VREG_TCXO_2.85V

0.1uC434

C433 0.1u

10K

R407

0.1u

C432

51R406

C431

1n

2.2uC430

22pC429

2.2uC428

1n

C427

C426

33p

2.2uC425

VBATT

VREG_MSMC1_1.35V

VREG_MMC_3.0V

VCHG_VBUS

200K

R404

C424

1n

VREG_MSMP_2.6V

1nC423

C422 0.1u

VREG_RUIM_3.0V

C4212.2u

C420

4.7u

C4192.2u2.2u

C418

C417 0.1u

VREG_MSMA_2.6V

10u

C416

C4152.2u

R436

1K

VREG_MSMC2_1.25V

VREG_SMPS_2.1V

C414 0.1u

C413 0.1u

C412

1n

C411

1u

VREG_MSMP_2.6V

4.7uC410

0.1uC409

R403

4.7

4.7u

C408

2.2uC407

VREG_MOTOR_3.0V

TP400

C406 0.1u

C4054.7u

C404 0.1u

C403 0.1u

C402

33p

4.7uC401

C400 0.1u

VREG_AUX2_2.9V


HSMU-5SB-24DR2

CN400

15

13

11

9

7

5

4

3

2

1

14

12

10

8

6

U402MAX14526EEWP+TCC6

2B

1C

2C

C3 A2

C4

D3

D1 D4

A1

B1

A3

B4 B3

B5 A5

C5 A4

D5 D2BATVB

DN1COMN1

DP2COMP2

U1UID

U2

RES

MIC

AUD1CAP

AUD2

GND

ISETIC

LC

S

AD

S

TNI

47K

R437

934R

K01

TP403

TP

DNI

C459

C457

1u

2.2uC460

VREG_SENSOR_2.6V

SC_MINI_BRACKET

SC402

21

TP404

K003

524R

ZD400

PLW0501H-LF

RW

PV+

+VPWR

SLEEP_CLK

REMOTE_PWR_ON

JTAG_PS_HOLD

TCXO_PM_19.2MHZ

MSM_USIM_DATA

MSM_USIM_RST

MSM_USIM_CLK

PS_HOLD

PM_INT_N

GSM_PA_DAC_REF

AMUX_OUT

PMIC_TCXO

nPON_RST

TCXO_EN

PMIC_SSBI

USBH_DM

USBH_DP

MAX_MUIC_I2C_SCLMAX_MUIC_I2C_SDA

MUIC_SW_INT

UART2_RXDUART2_TXD

VSNS_MSMC2_1.25V

VSNS_MSME_1.8V

VSNS_MSMC1_1.25V

PU_

KC

AB

V

USIM_DATA

USIM_RST

USIM_CLK

PM_ON_SW

USB_LDO_EN

USB_LDO_EN

MAX_DP

MAX_DP

MAX_DM

MAX_DM

PCB_REVISION

PCB_REVISION

CHG_CTL_N

N_LTC_

GH

C

BATT_FET_N

N_TEF_TT

AB

ISNS_P

P_S

NSI

USB_ID

USB_ID

VBAT_TEMP

VBAT_TEMP

VBAT_SENSE

VBAT_SENSE

1.30V

C432 close to MSM

C459 Close to MSM

uUSB 5pinClose by uUSB CONN

Close by uUSB CONN


Battery Charging Circuit


2mm

Shield CAN & 5pin IO Bracket

1%


2mm

MAX14526

2mm

USB 3.3V LDO

150K

150K

150K

ADC

150K

TEST&E

150K

0.3mm

R2

2.13V

10K

68K

47K

150K

150K


REV

1.93V

C&H

B&G

1%

Local Ground Plan

PM7540

Place in PM7540 room at shield edge

A&F

Rev.1.1

150K

150K

PCB Revision Check ADC

Route together

0.16V

Rev.1.0

D&I

0.5mm

Rev.1.2 680K

0.81V

0.5mm

These CAPs close to inductors100K

1.73V

0.62V

300K

R1

0.5mm

1.04V

430K

Route together

Place close to PM7540 pins

- 189 -

7. CIRCUIT DIAGRAM


1R

2.2K

D505

D504

43

52

61

V6.2_R

OS

NE

S_G

ER

V

J1

9 8

10 7

6 3

5 2

4 1VCCGND1

RSTVPP

CLKIO

GND2GND5

GND3GND4

U500

5

3 24 1

VOUTVDDGNDCE D

NG

P

CN500

4140

4239

4338

4437

4536

4635

4734

4833

4932

5031

5130

5229

5328

5427

5526

5625

5724

5823

5922

6021

6120

6219

6318

6417

6516

6615

6714

6813

6912

7011

7110

729

738

747

756

765

774

783

792

801

10p

C522

1800FB503

V6.2_P

MS

M_G

ER

V

V0 .3_R

OTO

M_G

ER

V

V0.3_C

MM_

GE

RV

V8. 2_D

CL_G

ER

V

V6.2_B

GR_

GE

RV

1u

125C

1M705R

VREG_MSMP_2.6V

1800FB504

10K105R

2.2u

405

C

VREG_MSMP_2.6V

22p

C514D501

1800

FB502

J500

C8

100p

2R

1K

47

R508

D502

4.7K505R

100n

L500

47p

C517

47p

C518 D503

15K20 5R

1u

C500

VREG_RUIM_3.0V

VREG_RUIM_3.0V

22p

C520

22p

C519

V5.1_B

GR_

GE

RV

V8. 1_D

CL_G

ER

V

RW

PV+

4.7K005R

VREG_MSMP_2.6V

L

K

J

I

H

G

F

E

D

C

B

A

12 11 10 9 8 7 6 5 4 3 2 1


L

K

J

I

H

G

F

E

D

C

B

A

12 11 10 9 8 7 6 5 4 3 2 1

4.7u

C503

C505

1u

10u

C5061u

205C

22nC509

22nC510

220nC508

220nC507

+VPWR

IC500

4C

3D

B4

D4

C3

B3

B5B2

D5C2

C1

D2

D1

A2

A1A5

A4

5C

1B

3A

SS

V

DD

V

DD

VPC1N

C1P HPR

HPL

INA2

INA1

INB2

INB1 OUT+

BIAS OUT-

SDA

SCL

RXIN+

RXIN- DN

G

DN

GP

1u

105C

MIC_VGND

FM_ANT

EAR_SENSE

AUDIO_I2C_SDA

LINE_ONLINE_OP

RCV_P

RCV_N

HPH_LHPH_R

HOOK_ADC

HOOK_ADC|EAR_MICP

EAR_MICP

AUDIO_I2C_SCL

HS_MIC_BIAS_EN

MIC_BIAS

CAM_I2C_SCL

CAM_I2C_SDA

KEY_ROW[0]

KEY_ROW[1]

KEY_COL[0]

KEY_COL[1] CAM_PCLK

CAM_VSYNC

CAM_HSYNC

CAM_DATA[7]

CAM_DATA[6]

CAM_DATA[5]

CAM_DATA[4]

CAM_DATA[3]

CAM_DATA[2]

CAM_DATA[0]

MIC_P

CAM_MCLK

MOTION_INT

LCD_CVT_INT

LCD_CVT_RESET_N

MICROSD_DATA[0]

MICROSD_DATA[1]

MICROSD_DATA[2]

MICROSD_DATA[3]

MICROSD_DET_N

MIC_SEL

MICROSD_CMD

MICROSD_CLK

LIN_MOTOR_PWM

PROXI_OUT

PROXI_I2C_SDA

PROXI_I2C_SCL

VGA_CAM_RESET_N

VGA_CAM_PWDN

MOTION_I2C_SDA

MOTION_I2C_SCL

LCD_SUBPM_I2C_SDA

LCD_SUBPM_RESET_N

LIN_MOTOR_EN

CAM_DATA[1]

TOUCH_ACK

TOUCH_I2C_SCL

TOUCH_I2C_SDA

LCD_RESET_N

LCD_SUBPM_I2C_SCL

CAM_DATA[8]

CAM_DATA[9]

MCAM_RESET

MCAM_PWDN

MDDI_P_DATA_P

MDDI_P_DATA_M

MDDI_P_STB_P

MDDI_P_STB_M

LCD_MAKER_ID

VBACK_UPUSIM_DATA

USIM_DATAUSIM_RST

USIM_RST

USIM_CLK

USIM_CLK

PM_ON_SW

SPK_N

SPK_N

EAR_R

EAR_R

EAR_L

EAR_L

SPK_P

SPK_P

LCD_CVT_VSYNC

Close

EAR_SENSE

3.5pi Ear Jack Circuit

OpenHIGH (detect)

LOW

USIM

MAIN & SUB I/F CONNECTOR

AUDIO_SUB_SYSTEM

S/W

7. CIRCUIT DIAGRAM


U600

039282726252423222120291817161

31

3215

14

33

3413

3512

3611

3710

389

398

407

6

415

4

42

433

442

45

1

6474849405152535451

DN

G

2D

NG

3D

NG

4D

NG

B_E

KA

W_TS

OH_L

W

DXT_T

RA

U_TB

N_ST

C_TR

AU_T

B

N_ST

R_TR

AU_T

B

DX

R_TR

AU_T

B

ANT

BT_PCM_CLK

GND5 BT_PCM_OUT

VDD_WL_PA BT_PCM_SYNC

BT_PCM_IN

SDIO_CMD

SDIO_CLK VDD_BT_PA

SDIO_D3

SDIO_D2 S_CLK_IN

SDIO_D1 GND6

SDIO_D0 FM_ANT

WL_RST_N BT_GPIO_0

WL_WAKE_B BT_GPIO_1

REG_ON BT_GPIO_3

VBAT_IN BT_GPIO_4

BT_GPIO_7

SR_VLX1

SR_VLX1BB F_CLK_IN

F_CLK_OUT

BB2

XLV_

RS

BBT

UO

V_R

S

OID

DV

UP_L

ATX

DS_

OID

DV

TU

O_2P1_

GID

TU

O_2P1_

GLN

A

ODL

V2P1_

NIV

TU

O_2O

DLNL

AD

S_ TB

LC

S_TB

1OI

DU

A

2OI

DU

A

N_TS

R_TB

7D

NG

L6014.7n

p5.1

426C

C604

0.5p

ANT600

SDBTPTR3015

2

31

4DUMMY3

FEED DUMMY2

DUMMY1

600

FB600

1u

C621C6208p

VREG_MSMP_2.6V

C606 820p

DNI

C603

C605 100p

1nC622

L

K

J

I

H

G

F

E

D

C

B

A

12 11 10 9 8 7 6 5 4 3 2 1


L

K

J

I

H

G

F

E

D

C

B

A

12 11 10 9 8 7 6 5 4 3 2 1

1u

C601

VDD_TCXO

2.2uFC619

+VPWR

C600

1u

VDD_TCXO

R605

100K

26MHz

X600TG-5010LH-87N

4 2

3 1NCOUT

GNDVCC

U601

5

3 24 1

VOUTVDDGNDCE D

NG

P

706C

u1 u1806

C

u1906

C

016C

FU1.0

Fu7.4116

C

Fu2.2206

C

C6120.1UF

C6130.1UF

4.7uL600

4.7uFC615 3.3uL610

C6160.1UF

C6174.7uF

0

R600

0.1u

C625C618

10uF

10u

C614

TP602

+VPWR

VREG_MSMP_2.6V

VREG_MSMP_2.6V

N_TE

SE

R_TB

WLAN_RESET_NBT_HOST_WAKEUP

WLAN_CMDWLAN_CLK


WLAN_SDIO[0]

BT_PCM_DOUT

BT_PCM_DINBT_PCM_SYNC

BT_PCM_CLK

BT_UART1_CTS

SLEEP_CLK

BT_WAKEUP

R_O

IDU

A_M

F

WLAN_HOST_WAKEUP

FM_ANT

L_OI

DUA

_M

F

BT_UART1_TXD

BT_UART1_RXD

QE

R_KL

C

CLK_REQ

ANT_WLAN_BT

ANT_WLAN_BT

REG_ON

CLK_IN

CLK_IN

BT_UART1_RTS


WLAN+BT+FM

close to 3

close to 17

- 191 - LGE Internal Use OnlyCopyright © 2010 LG Electronics. Inc. All right reserved.Only for training and service purposes

FL100

01

5

64

73

82

91

7.5pF

INOUT_A1 INOUT_B1

INOUT_A2 INOUT_B2

INOUT_A3 INOUT_B3

INOUT_A4 INOUT_B4

1G

2G

U101D2D1

6F1A

1F6A

E3F2

E5D3F5E2E6E1

F3C1

A4


F4D6B6

5A

6C

5B

5C

4C

N1C

P1C

N2C

P 2C

DN

GP

C

VBATCP VOUTVBAT

LED1LED2


WPWMIN

LEDGNDSBIAS

SSENS LDO1OSGND LDO2OGC2 LDO3OGC1 LDO4O2T 4T 1T 3T

LED7LED8

CN100

31 30

32 29

33 28

34 27

35 26

36 25

37 24

38 23

39 22

40 21

41 20

42 19

43 18

44 17

45 16

46 15

47 14

48 13

49 12

50 11

51 10

52 9

53 8

54 7

55 6

56 5

57 4

58 3

59 2

60 1

G1G2

G3G4

7.5pF

FL101

01

5

64

73

82

91INOUT_A1 INOUT_B1

INOUT_A2 INOUT_B2

INOUT_A3 INOUT_B3

INOUT_A4 INOUT_B4

1G

2G

7.5pF

FL102

01

5

64

73

82

91INOUT_A1 INOUT_B1

INOUT_A2 INOUT_B2

INOUT_A3 INOUT_B3

INOUT_A4 INOUT_B4

1G

2G

7.5pF

FL103

01

5

64

73

82

91INOUT_A1 INOUT_B1

INOUT_A2 INOUT_B2

INOUT_A3 INOUT_B3

INOUT_A4 INOUT_B4

1G

2G

7.5pF

FL104

01

5

64

73

82

91INOUT_A1 INOUT_B1

INOUT_A2 INOUT_B2

INOUT_A3 INOUT_B3

INOUT_A4 INOUT_B4

1G

2G

7.5pF

FL105

01

5

64

73

82

91INOUT_A1 INOUT_B1

INOUT_A2 INOUT_B2

INOUT_A3 INOUT_B3

INOUT_A4 INOUT_B4

1G

2G

7.5pF

FL106

01

5

64

73

82

91INOUT_A1 INOUT_B1

INOUT_A2 INOUT_B2

INOUT_A3 INOUT_B3

INOUT_A4 INOUT_B4

1G

2G

7.5pF

FL107

01

5

64

73

82

91INOUT_A1 INOUT_B1

INOUT_A2 INOUT_B2

INOUT_A3 INOUT_B3

INOUT_A4 INOUT_B4

1G

2G

100p

C128

0

R100

100201R

100p

C126

15p

C102

VREG_RGB_2.6V

VREG_LCD_1.8V

10nC103

100p

C127

U100

9B

9D

1F

1E

11L

6J

9F

3F

8C

11A

1A

L1B11

K2C10

K1A8

K3

H2E9

L2A9

B10

G10

H10E2

H11E3

G11B8

G3

H3C9

G2

H1D10

J4D11

K4F10

L4F11

J5

L3C2

J1D2

J2C1

K5A7

L5

K6A2

L6A3

J7B2

J8D1

L7C3

K7A4

K9B3

K8B4

L8B5

L9A5

K10C5

L10B6

J10A6

J9C6

J11C7

K11B1

11C

01A

01E

11E

1G

2F

3J

9H

3D

7B

9G

4C

1D

DV

ER

OC

2D

DV

ER

OC

1D

DV

OIH

2D

DV

OIH

1D

DV

OIP

2D

DV

OIP

DD

VM

AR

D

CC

VM

AR

D

DD

V81D

M

DD

V51D

M

DD

VLLP

DD

VC

SO

GPIOH0 FPDAT0

GPIOH1 FPDAT1

GPIOH2 FPDAT2

GPIOH3 FPDAT3

GPIOH4 FPDAT4

GPIOH5 FPDAT5

GPIOH6 FPDAT6

GPIOH7 FPDAT7

GPIOH8 FPDAT8

GPIOH9 FPDAT9

GPIOH10 FPDAT10

GPIOH11 FPDAT11

GPIOH12 FPDAT12

GPIOH13 FPDAT13

GPIOH14 FPDAT14

GPIOH15 FPDAT15

FPDAT16

GPIOH16_ADS FPDAT17

GPIOH17_RD_ GPIOP0_FPDAT18

GPIOH18_WR_ GPIOP1_FPDAT19

GPIOH19_CS GPIOP2_FPDAT20

GPIOP3_FPDAT21

MDATA0P GPIOP4_FPDAT22

MDATA0M GPIOP5_FPDAT23

MSTBP GPIOP12

MSTBM GPIOP13

GPIOP14

INT GPIOP15

RESET_

TE FPFRAME

CNF FPLINE

TESTEN FPSHIFT

FPDRDY

PLP

PLPAV FPCS_1

MDREF FPCS_2

FPSCK

CLKI FPAO

OSCI FPSO

OSCO NC

1S

SV

2S

SV

3S

SV

4S

SV

5S

SV

6S

SV

7S

SV

1S

SV

MA

RD

2S

SV

MA

RD

SS

VD

M

SS

VLLP

3.3K

R103

100401R

2.2u

C105

2.2u

C1062.2u

C107

2.2u

C108

2.2u

C109

U102

43

52

61VCC1 VCC

A NC

GND Y

VREG_RGB_1.5V

DNI

C110

4.7nC111

1

R105


0.1u

C1120.1u

C113

TOUCH_VDD_2.8V

0.1u

C114

2.2u

C115

CAM_AF_2.8V

2.2u

C116

TOUCH_VDD_2.8V

4.7K701R

8208 01R

VREG_MSMP_2.6V

4.7K011R

VREG_MSMP_2.6V

27MHz

X100FA-238_27MHz_9PF

2 1

3 4

5.6p

C1175.6p

C118

1M

R111

16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1

L

K

J

I

H

G

F

E

D

C

B

A

L

K

J

I

H

G

F

E

D

C

B

A

16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1


TP101

1u

C1191u

C120

+VPWR

1u

121

C

CAM_VDD_1.8V CAM_VDD_2.8V

2.2u

C1222.2u

C123

1u

C124

VREG_MSMP_2.6V

10u

521

C

1211R


DNI311R

LCD_CVT_INTLCD_CVT_RESET_N

TOUCH_I2C_SDA

TOUCH_I2C_SCL

GAIN1GAIN2

LCD_SUBPM_RESET_N

SBIAS

LCD_SUBPM_I2C_SCLLCD_SUBPM_I2C_SDA

SENS

TOUCH_ACK

LCD_RESET_N

LCD_CVT_VSYNC

MDDI_P_DATA_P

MDDI_P_STB_P

LCD_MAKER_ID

LCD_SCL

LCD_SCL

LCD_SDI

LCD_SDI

LCD_CS_N

LCD_CS_N

LCD_SDO

LCD_SDO

MLED_OUT

MLED_OUTMLED1

MLED1

MLED3

MLED3

MLED5

MLED5

LCD_PWM

LCD_PWM

MLED2

MLED2

MLED4

MLED4

MLED6

MLED6

FLT_LCD_R[7]

FLT_LCD_R[7]

FLT_LCD_R[6]

FLT_LCD_R[6]

FLT_LCD_R[4]

FLT_LCD_R[4]

FLT_LCD_R[3]

FLT_LCD_R[3]

FLT_LCD_R[2]

FLT_LCD_R[2]

FLT_LCD_R[1]

FLT_LCD_R[1]

FLT_LCD_R[0]

FLT_LCD_R[0]

FLT_LCD_G[7]

FLT_LCD_G[7]

FLT_LCD_G[6]

FLT_LCD_G[6]

FLT_LCD_G[2]

FLT_LCD_G[2]

FLT_LCD_G[0]

FLT_LCD_G[0]

FLT_LCD_B[7]

FLT_LCD_B[7]

FLT_LCD_B[6]

FLT_LCD_B[6]

FLT_LCD_B[5]

FLT_LCD_B[5]

FLT_LCD_B[4]

FLT_LCD_B[4]

FLT_LCD_B[3]

FLT_LCD_B[3]

FLT_LCD_B[2]

FLT_LCD_B[2]

FLT_LCD_B[1]

FLT_LCD_B[1]

FLT_LCD_B[0]

FLT_LCD_B[0]

FLT_LCD_SCL

FLT_LCD_SCL

FLT_LCD_SDO

FLT_LCD_SDO

FLT_LCD_HSYNC

FLT_LCD_HSYNC

FLT_LCD_VSYNC

FLT_LCD_VSYNC

FLT_LCD_SDI

FLT_LCD_SDI

LCD_VSYNC

LCD_VSYNC

LCD_R[6]

LCD_R[6]

LCD_R[3]

LCD_R[3]

LCD_R[2]

LCD_R[2]

FLT_LCD_DEN

FLT_LCD_DEN

LCD_DEN

LCD_DEN

LCD_HSYNC

LCD_HSYNC

LCD_B[0]

LCD_B[0]

LCD_B[1]

LCD_B[1]

LCD_G[0]

LCD_G[0]

LCD_G[1]

LCD_G[1]

LCD_R[0]

LCD_R[0]

LCD_R[1]

LCD_R[1]

LCD_R[4]

LCD_R[4]

LCD_B[5]

LCD_B[5]

LCD_B[6]

LCD_B[6]

LCD_B[7]

LCD_B[7]

LCD_G[5]

LCD_G[5]

LCD_G[6]

LCD_G[6]

LCD_G[7]

LCD_G[7]

LCD_R[5]

LCD_R[5]

LCD_B[2]

LCD_B[2]

LCD_B[3]

LCD_B[3]

LCD_B[4]

LCD_B[4]

LCD_G[2]

LCD_G[2]

LCD_G[3]

LCD_G[3]

LCD_G[4]

LCD_G[4]

LCD_R[7]

LCD_R[7]

FLT_LCD_G[1]

FLT_LCD_G[1]

FLT_LCD_R[5]

FLT_LCD_R[5]

FLT_LCD_G[4]

FLT_LCD_G[4]

FLT_LCD_G[3]

FLT_LCD_G[3]

FLT_LCD_G[5]

FLT_LCD_G[5]

FLT_LCD_CS_N

FLT_LCD_CS_N

MLED7

MLED7

MDDI_P_STB_M

MDDI_P_DATA_M

LCD_CVT_VSYNC_LS

LCD_CVT_VSYNC_LS

LCD_DCLK

LCD_DCLK

FLT_LCD_DCLK

FLT_LCD_DCLK

MINI_3.2"_LCD

sa esolC s

A

EUSY0366801

MDDI -> RGB 24bit Convertor

LCD Charge-pump (with ALC)

7. CIRCUIT DIAGRAM


16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1

L

K

J

I

H

G

F

E

D

C

B

A

L

K

J

I

H

G

F

E

D

C

B

A

16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1


100p

C210

CN200

4140

4239

4338

4437

4536

4635

4734

4833

4932

5031

5130

5229

5328

5427

5526

5625

5724

5823

5922

6021

6120

6219

6318

6417

6516

6615

6714

6813

6912

7011

7110

729

738

747

756

765

774

783

792

801

100

R205

DNI

C2047.5p

C203

0.1u

C211

0.1u

C212

10u

C200

33p

C201

1

R201

CN201

17

16

15

14

13

12

11

10

9

8

7

6

5

314

323

332

341

30

29

28

27

26

25

24

23

22

21

20

19

18

470

R211

CAM_VDD_1.8V

0.1u

C207

CAM_AF_2.8V

7.5p

C214

CAM_VDD_2.8V

120

FB200

0.1u

C208

4.7K902R

4.7K012R

7.5pF

FL200

01

5

64

73

82

91INOUT_A1 INOUT_B1

INOUT_A2 INOUT_B2

INOUT_A3 INOUT_B3

INOUT_A4 INOUT_B4

1G

2G

7.5pF

FL201

01

5

64

73

82

91INOUT_A1 INOUT_B1

INOUT_A2 INOUT_B2

INOUT_A3 INOUT_B3

INOUT_A4 INOUT_B4

1G

2G

470

R212

60FB201

470

R213

RW

PV+

V8.1_D

CL_G

ER

V

V5.1_B

GR_

GE

RV

V6.2_B

GR_

GE

RV

V8.2_D

CL_G

ER

V

V0.3_C

MM_

GE

RV

V0.3_R

OTO

M_G

ER

V

470

R214

V6.2_P

MS

M_G

ER

V

7.5pF

FL202

01

5

64

73

82

91INOUT_A1 INOUT_B1

INOUT_A2 INOUT_B2

INOUT_A3 INOUT_B3

INOUT_A4 INOUT_B4

1G

2G

56K512R

56K612R

CAM_VDD_2.8V

VREG_MSMP_2.6V

0.1u

C206

U200

1F

E3E4

E2A5

C4

A4

D4D6

C3C5

C2D3

C1C6

B4B5

B2

B1

B3

D2E5

D1B6

A3A2IOVDD DCLK

DVDD HSYNC

AVDD VSYNC

DATA0

DATA1

DATA2

EXTCLK DATA3

PWRDWN DATA4

RESET DATA5

SDA DATA6

SCL DATA7

GND1

GND2

VDD15_1 GND3

VDD15_2 GND4DN

GP

0.1u

C209


D200

V6.2_R

OS

NE

S_G

ER

V

RCV_P

RCV_N

VBACK_UP

MIC_BIAS

LCD_CVT_INT

LCD_CVT_RESET_N

TOUCH_I2C_SDA

TOUCH_I2C_SCL

KEY_ROW[0]

KEY_ROW[1]

KEY_COL[0]

KEY_COL[1]

MOTION_INT

LCD_SUBPM_RESET_N

LCD_SUBPM_I2C_SCL

LCD_SUBPM_I2C_SDA

MOTION_I2C_SCL

MOTION_I2C_SDA

PROXI_I2C_SCL

PROXI_I2C_SDA

PROXI_OUT

LIN_MOTOR_EN

LIN_MOTOR_PWM

MICROSD_CLK

MICROSD_CMD

SPK_P

SPK_NMIC_SEL

MIC_P

MICROSD_DET_N

MICROSD_DATA[3]

MICROSD_DATA[2]

MICROSD_DATA[1]

MICROSD_DATA[0]

TOUCH_ACK

LCD_RESET_N

LCD_CVT_VSYNC

MDDI_P_DATA_P

MDDI_P_STB_P

LCD_MAKER_ID

MDDI_P_STB_M

MDDI_P_DATA_M

CAM_PCLK

CAM_PCLK

CAM_PCLK

CAM_VSYNC

CAM_VSYNC

CAM_VSYNC

CAM_HSYNC

CAM_HSYNC

CAM_HSYNC




CAM_DATA[4]

CAM_DATA[4]

CAM_DATA[3]

CAM_DATA[3]

CAM_DATA[2]

CAM_DATA[2]

CAM_DATA[1]

CAM_DATA[1]

CAM_DATA[0]

CAM_DATA[0]

CAM_MCLK

CAM_MCLK

CAM_MCLK

VGA_CAM_PWDN

VGA_CAM_PWDN

VGA_CAM_RESET_N

VGA_CAM_RESET_N

MCAM_RESET

MCAM_RESET

CAM_I2C_SCL

CAM_I2C_SCL

CAM_I2C_SCL

CAM_I2C_SDA

CAM_I2C_SDA

CAM_I2C_SDA

S_CAM_DATA[0]

S_CAM_DATA[0]

S_CAM_DATA[1]

S_CAM_DATA[1]

S_CAM_DATA[2]|S_VGA_CAM_DATA[0]

S_VGA_CAM_DATA[0]

S_CAM_DATA[2]

S_CAM_DATA[2]


S_VGA_CAM_DATA[1]

S_CAM_DATA[3]

S_CAM_DATA[3]


S_VGA_CAM_DATA[2]

S_CAM_DATA[4]

S_CAM_DATA[4]


S_VGA_CAM_DATA[3]

S_CAM_DATA[5]

S_CAM_DATA[5]


S_VGA_CAM_DATA[4]

S_CAM_DATA[6]

S_CAM_DATA[6]


S_VGA_CAM_DATA[5]

S_CAM_DATA[7]

S_CAM_DATA[7]


S_VGA_CAM_DATA[6]

S_CAM_DATA[8]

S_CAM_DATA[8]


S_VGA_CAM_DATA[7]

S_CAM_DATA[9]

S_CAM_DATA[9]

CAM_DATA[8]

CAM_DATA[8]

CAM_DATA[9]

CAM_DATA[9]

MCAM_PWDN

MCAM_PWDN

PM_ON_SW

MIC_VGND

FLT_CAM_HSYNC

FLT_CAM_HSYNC

FLT_CAM_PCLK

FLT_CAM_PCLK

5M CAMERA CON.

1608

1608

EMI FILTER

MAIN & SUB I/F CONNECTORVGA CAMERASMT TYPE

7. CIRCUIT DIAGRAM

- 193 -

7. CIRCUIT DIAGRAM


16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1

L

K

J

I

H

G

F

E

D

C

B

A

L

K

J

I

H

G

F

E

D

C

B

A

16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1


S3008

7

6

5

4

3

2

1

G5 G3 G1 SW

C1

C2

C3

C4

C5

C6

C7

C8

G6 G4 G2 COM

22K303R

22K203R

22K103R

0.1u

C301

U303

21

11

65

74

83

92

101NC1 NC2

VDD VDDIO

GND SDI

INT SDO

CSB SCK

1TO

N

2TO

N

22K003R

0 03D

43

52

61

VREG_MMC_3.0V

220K

403R

2.2

R305

VREG_MSMP_2.6V

103D

43

52

61

22K703R

2.2u

C302

470

R306

VB300

2

1

0.1u

C300

VREG_MSMP_2.6V

4.7K

R308

4.7K

R309

VREG_SENSOR_2.6V

D302

SW300

CC_

BB_

DA

0.1u

C303

VREG_SENSOR_2.6V

KB300

R310

4.7

10u

C304

U300

54

63

72

81

AD

ELL

CS

CD

ELA

DS

CC

VOI

V

TU

OV

DN

G

TP300

1u

C309

10


VREG_SENSOR_2.6V

1u

C305

10K

213

R1u

C306

U301

6

43

2

51VCC IOUT

GND1

GC1 GC22D

NG

KB301 KB302

100nL300

100n

L301

VREG_MOTOR_3.0V

1u

C3073.9n

C308313R

510K

10K413R U302

9

54

63

72

81EN V1

SIN VSS

TYPE VCC

OCT V2DN

GP

4.7K513R

4.7K613R

VREG_MSMP_2.6V

KEY_ROW[0]

KEY_ROW[0]KEY_ROW[1]

KEY_ROW[1]

KEY_COL[0]KEY_COL[1]

MOTION_INT

GAIN1 GAIN2

SBIAS SENS

MOTION_I2C_SCL

MOTION_I2C_SDA

PROXI_I2C_SCL

PROXI_I2C_SDA

PROXI_OUT

LIN_MOTOR_EN

LIN_MOTOR_PWM

MICROSD_CLK

MICROSD_CMD

MICROSD_DET_N

MICROSD_DATA[3]MICROSD_DATA[2]

MICROSD_DATA[1]

MICROSD_DATA[0]

PM_ON_SW

HIGH (Normal)

LOW (Detect)

S/W

Close (Detect =COM)

Detect

Open

Proximity Sensor


Motion Sensor

CAMERA KEYSIDE KEY - VOLUME

Linear Motor PAD

1%

LINEAR MOTOR DRIVER

EUSY0200803

MICRO SD SOCKET

POWER ON

VOL.UPVOL.down

AFcapture


100p

C412

+VPWR

BAT400

DNI

C1

0.1u

C400

CN402

1

16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1

L

K

J

I

H

G

F

E

D

C

B

A

L

K

J

I

H

G

F

E

D

C

B

A

16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1


22p

C402

ANT401

1

SW400

G1

ANTG2

ANT400

1

DNI

C403DNI

C404

100p

5 04C

10u

604C

15p

704C

47p

804C

MIC400

4

3

2

1P

G1

G2

O

U400

94

63

52

71

8101B0 1A

1B1 S1

2B0 2A

2B1 S2

GND VCC

CN400

2

1

22p

C40922p

C41022p

C411

MIC401

4

3

2

1P

G1

G2

O

CN401

2

1

RCV_P

RCV_N

VBACK_UP

MIC_BIASMIC_BIAS

SPK_P

SPK_N

MIC_SEL

MIC_PMIC_1P

MIC_1P

MIC_2P


MIC2_VGND

MIC2_VGND

MIC2_VGND


ANTENNA FEEDING

SPEAKERRECEIVER

SMD, TOP

SUMY0010609

MICROPHONE

Backup BAT contact CNT

7. CIRCUIT DIAGRAM



8. BGA PIN MAP

8. BGA PIN MAP

사내한

LGE

Great Company Great PeopleGreat Company Great People Challenge 1010NC

U200 (560 NSP)


8. BGA PIN MAP

사내한

LGE


U301 (137 FBGA)



8. BGA PIN MAP

사내한

LGE


U400 (137 CSP)


8. BGA PIN MAP 사내한

LGE

Great Company Great PeopleGreat Company Great People Challenge 1010

U402 (20WLP)

NC



8. BGA PIN MAP

사내한

LGE

Great Company Great PeopleGreat Company Great People Challenge 1010

IC500 (20 CSP)

NC

- 201 -

9. PCB LAYOUT


GD880-MAIN-TOP

J500 Ear-Jack Conn.Can not Sound.3.5phi Ear jack

Single 2-inputNAND gate for GPS

CN400 u-USB Conn.Can not operate USBDon’t chargeI/O Connector

X200 VC-TCXONo ServiceTCXO (19.2MHz)

X-tal(32.768KHz)

U400 PM7540 (PMIC)Can not power onCan not chargeNo Service

CN500 B to B conn.Can not power on.Don t operate vibrator, volume key, optical joystick, 3 sensor, speaker, Touch Window.Don’t detect USIM.Can’t operate Camera.No LCD display.Main-Sub B2B Connector

WiFi&BT ModuleTCXO (26MHz)

U600 Wi-Fi & BT & FM ModuleCan not use WLANService, BT andFM Radio Function

U200 MSM7227 (BB chipset)Can not power onNo LCD DisplayNo Service

U301 MemoryCan not bootNAND Flash Memory & SDRAM (4G+4G)

CN401 Battery Conn.Can not power onCan not detect batteryBattery CNT

9. PCB LAYOUT


GD880-MAIN-BOTTOM

FL1001 GPS SAWNo GPS Signal Detection

U1003 RF transceiverWCDMA/GSM/GPS RXSensitivity & TX PowerNo Service

U1001 GPS LNANo GPS Signal Detection

FL1004 WCDMA I RX SAWWCDMA I RX SensitivityNo Service

FL1005(I)/ FL1006(VIII)WCDMA TX SAWWCDMA I, VIII TX PowerNo Service

U1002 WCDMA Dual-PAMWCDMA I, VIII TX PowerNo Service

FL1002(VIII)/FL1003(I)DuplexerWCDMA TX Power &RX SensitivityNo Service

J1 USIM conn.Can not detect USIM

FL1007 FEMWCDMA/GSM RXSensitivity & TX PowerNo Service

U1004 GSM PAMGSM Tx powerNo service

- 203 -

9. PCB LAYOUT


GD880-SUB-FPCB-TOP

U301 Luminance Sensor.Can not control the screen’sbrightness automatically.

U300 Proximity SensorCan not control the screen’s on/offoperation automatically.

U200 VGA Camera.Can not operate VGA Camera.

CN200 B to B conn.Can not power on.Don’t operate vibrator, volumekey, optical joystick, 3 sensor,speaker, Touch Window.Don’t detect USIM.Can not operate Camera.No LCD display.

SW300 Camera KeyCan not operate camera.

MIC401 MIC.Can not record or send user voice.


GD880-SUB-FPCB-BOT

9. PCB LAYOUT

MIC400 MIC.Can not record or send user voice.

CN201 Camera Conn.Can not operate 5M Camera.

BAT400 Backup Battery.RTC reset.

S300 Micro-SD SocketCan not use a micro-SD

U302 Motor Driver IC.Can not operate vibrator.

U101 LCD Backlight Charge PumpNo Display

U101 LCD Backlight Charge PumpNo Display

CN100 LCD/Touch Conn.No LCD Display.Can not operate Touch.

U100 RGB 24bit Converter.No LCD Display.



10. RF CALIBRATION

10. RF CALIBRATION

Tachyon User manual

- 1 - 10-GD880

<GD880 RF Calibration – Using by Tachyon Tool>

GD880 Target Power

W900 : 23dBmn W2100 : 22.5dBm

GSM850/900 : 32.5dBm GSM1800 : 29.5dBm

GSM1900 : 29dBm


10. RF CALIBRATION

Tachyon User manual

- 2 - 10-GD880

10.1 Introduction

Tachyon will explain how to use the program for the user.

Used in this article Tachyon except for a detailed description of the environment file, and only the description is

only required.

10.2 Terminology

Tachyon : CMTest2, HotKimchi integrated program.

- Dictionary meaning : Quick bitboda of virtual particles.

- Mean : Want to reduce the time means fast bitboda moment.

10.3 Tachyon Main UI

It will be explained in the Main Screen.

10.3.1 Menu / Toolbar / Run Button

Tachyon has “Menu”, “Toolbar” and Buttons.

<Picture 6>



10. RF CALIBRATION

Tachyon User manual

- 3 - 10-GD880

10.3.1.1 Menu

There are six kinds of menu.

(“Program”, “Run”, “Additional Function”, “Option”, “View”, “Help”)

Program

Menu Description

Model Selection Select model

Config Editor… Develope progress

NV Item Manager… Develop progress

Sequence Editor… Develope progress

Exit Exit program

Run

Menu Description

Calibration + Test Start Calibration and Auto Test

Calibration Only Start Calibration

Test Only Start Auto Test

Select band Calibration Start Calibration with selected Band

Select Band/Item Calibration Start Calibration with selected band and item.

Select Band Auto Test Start Auto Test with selected Band

NV Read Read the NV items.

NV Write Write the NV items.

Stop STOP

Additional Function

Menu 설명

Loss Adjustment… Configuratation and adjust RF-LOSS.

Instrument Calibration… Instrument calibration(available on E5515C)

Phone Control… Phone control

(like QPST, available on Qaulcomm)

RF Switch Check… Check the RF Switch Box.

Show Result… Result screen pop-up/pop-down


Tachyon User manual

- 4 - 10-GD880

Option

Menu Description

System Option… COM-Port configuration

Run Option… Special opstion.

Instrument Change… Change instrument

Voltage / Current Setting… Voltage,Current setting

View

Menu Description

Toolbar, Menubar Toggle.

Help

Menu Description

Tachyon Help Develope progress

Tachyon Hotkey…

About Tachyon…

10.3.1.2 Toolbar

Toolbar Provides for frequently used commands.

<Picture 7 : Toolbar>

<Picture 7> Commands in order are as follows :

1. Model Selection

2. Calibration + Test

3. Not availalable.

4. Stop

5. Test Only

6. Calibration Only

7. Phone Control

8. Loss Adjustment

9. System Option

10. Run Option

11. Voltage / Current Setting

12. Show Result

10. RF CALIBRATION



10. RF CALIBRATION

Tachyon User manual

- 5 - 10-GD880

10.3.1.3 Command Button

<Picture 8 : Start Button>

“Calibration + Test” Button , “Stop” Button .

10.3.2 UI Display Information

About the item on the screen output will be explained.

10.3.2.1 Port / Loss info

<Picture 9 : COM Port / Loss Information>

Area 1, the output is imformation about the COM port.

Area 2, Show the RF-LOSS for the selected model.

10.3.2.2 Phone Info / System Option Status


10. RF CALIBRATION

Tachyon User manual

- 6 - 10-GD880

Model Information : Information of model that user selected

Solution : chipset (Qualcomm, Emp, ADI, Infineon)

Model : Model name, Buyer : Buyer name

Binary Ver : Binary Version.(Phone s/w version)

Product ID : PID (read from phone).

System Information : ezlooks, shield box, rf switch box.

Local : Factory location, Ezlooks Mode : On-line/Off-line

Limo : Using Shield box or not

Run Information : Option

Repeat Test : Aging test, ESN Write : Write the ESN(IMEI).

Test Only : Only auto test

Rework : Rework Option.

Verification : Using verification or not.

Base Inst. Information : information of instrument

Base Inst. : Equipment type

Execution Mode : Display the Command that user input

Time Elapse : test time

Voltage : voltage

Current Limit : current limit

Consumption Current(mA) : doesn’t work



10. RF CALIBRATION

Tachyon User manual

- 7 - 10-GD880

10.4.2 Run / Stop This will be explained in detail about the functionality provided.

10.4.2.1 Calibration + Test

This perform the calibraton, Test.

Select when ‘Calibration and Auto Test’ process

Description.

Excution 1. <Menu> Run-> Calibration + Test.

2. <Toolbar> Click .

Hot Key F5 : Shield Box 1

F6 : Shield Box 2

Button

button Click.

<Calibration + Test> will be in the order. Sequence xml file has it.

i) Precede Action

- NV Write.

- Test command send

ii) Calibration

- Calibration

iii) Auto Test

- Auto test

iV) After Action

- Phone reset

- Change AMSS

If you have a multi-system, you must select the Channel(1,2) that you wanted, then you can test.

<Picture 15 : Channel selection>


10. RF CALIBRATION

Tachyon User manual

- 8 - 10-GD880

10.4.2.2 Calibration Only

This perform only the Calibraton.

Select when ‘Calibration only’ process.

Description.

Excution 1. <Menu> Run-> Calibration Only.

2. <Toolbar> Click.

Hot Key F9

Button NONE.


<Picture 16 : Calibration Only>



10. RF CALIBRATION

Tachyon User manual

- 9 - 10-GD880

10.4.2.3 Test Only

This perform only the Test.

Select when “Test Only” process

Description.

Excution 1. <Menu> Run-> Test Only.

2. <Toolbar> Click.

Hot Key F8

Button NONE.


<Picture 17 : Test Only>

10.4.2.4 Stop

This perform Stopping the process.

Description.

Excution 1. <Menu> Run-> STOP

2. <Toolbar> Click.

Hot Key ESC

Button

button Click.

- 215 -

11. EXPLODED VIEW & REPLACEMENT PART LIST

11.1 EXPLODED VIEW


MTAB04

MTAB01

MTAB05

MBJZ03

MBJZ02

MPBZ01

SURY00

MPBZ05

MTAZ01

ACGK00

SACY00

MTAZ00

MPBZ00MPBZ03

AFBZ00

SVCY00

SWCC00 SUSY00

ADBY00

SJMY00

SC402

MCBA00

SC401

ANT1002

ANT1001

SAFY

ACGM

ACGA00

GMEY00

SBPL00

MLAA00

MBJZ01

MTAB02




by SBOM standard on GCSC

Level LocationNo. Description Part Number Spec Color Remark

2 AAAY00 ADDITION AAAY0454201 BLACK

3 AMBA00 MANUALASSY,OPERATION AMBA0175301 GD880 manual assy for ORF WITHOUT

COLOR

4 MCDE00 CARD,SERVICE GUIDE MCDE0007101 PRINTING, (empty), , , , , WITHOUTCOLOR

4 MMBB00 MANUAL,OPERATION MMBB0374201 PRINTING, (empty), , , , , WITHOUTCOLOR

2 APAY00 PACKAGE APAY0142901 GD880 ORF(TR7-1/ORF UB/Void/12403_Pallet/500ea) WITHOUTCOLOR

3 APLY00 PALLET ASSY APLY0003203 TDR TR1-1 ORG STD Palletizing WithoutColor

4 MPBZ00 PAD MPBZ0219601 COMPLEX, (empty), , 503, 860, 145, WithoutColor U

4 MPCY00 PALLET MPCY0012403 COMPLEX, (empty), , , , , DARK BLUE

3 MLAC00 LABEL,BARCODE MLAC0004541 PRINTING, (empty), , , , , WithoutColor

3 MLAZ00 LABEL MLAZ0037104 PRINTING, (empty), , , , , METALSILVER

3 MLAZ01 LABEL MLAZ0050901 PRINTING, (empty), , , , , WITHOUTCOLOR

3 MPAE PACKING,BLISTER MPAE0008202 COMPLEX, (empty), , , , , WITHOUTCOLOR

3 MPAE01 PACKING,BLISTER MPAE0008203 COMPLEX, (empty), , , , , WITHOUTCOLOR

2 APEY00 PHONE APEY0873401 BLACK

3 ACGA00 COVER ASSY,BATTERY ACGA0033802 GD880_BATT,COVER ASSY_ORANGE BLACK Q', 27

4 MCJA00 COVER,BATTERY MCJA0100602 MOLD, PC LUPOY SC-1004A, , , , , BLACK

3 ACGY00 COVER ASSY,EMS ACGY0009001 BLACK

4 ACGM00 COVER ASSY,REAR ACGM0145901 BLACK 26

5 MCJN00 COVER,REAR MCJN0112101 MOLD, PC LUPOY SC-1004A, , , , , BLACK N'

6 MBIZ00 BUSHING MBIZ0004901 CASTING, Zn Alloy, , , , , WITHOUTCOLOR


6 MFEZ00 FRAME MFEZ0023201 PRESS, STS, , , , , WITHOUTCOLOR

5 MDAY00 DECO MDAY0046301 PRESS, STS, , , , , SILVER

11.2 Replacement Parts Note: This Chapter is used for reference, Part order is ordered

<Mechanic component>




5 MGAZ00 GASKET MGAZ0075701 PRESS, STS, , , , , WITHOUTCOLOR

5 MIDZ00 INSULATOR MIDZ0242701 COMPLEX, (empty), , , , , WITHOUTCOLOR I'

5 MIDZ02 INSULATOR MIDZ0249001 COMPLEX, (empty), , , , , WITHOUTCOLOR G'

5 MPBT00 PAD,CAMERA MPBT0085601 COMPLEX, (empty), , , , , WITHOUTCOLOR J'

5 MPBZ00 PAD MPBZ0316101 COMPLEX, (empty), , , , , WITHOUTCOLOR

5 MSAZ00 SHEET MSAZ0063001 COMPLEX, (empty), , , , , BLACK K'

5 MTAD00 TAPE,WINDOW MTAD0116901 COMPLEX, (empty), , , , , WITHOUTCOLOR L'

5 MTAZ00 TAPE MTAZ0314001 COMPLEX, (empty), , , , , WITHOUTCOLOR H'

5 MWAE00 WINDOW,CAMERA MWAE0054201 MOLD, Tempered Glass, , , , , BLACK M'

4 ACGV COVER ASSY,BAR ACGV0012601 GD880_COVER ASSY,BAR_FRANCE BLACK

5 ACGK00 COVER ASSY,FRONT ACGK0147601 BLACK 1

6 MCCE00 CAP,RECEPTACLE MCCE0055501 MOLD, PC LUPOY SC-1004A, , , , , SILVER A

6 MCCG00 CAP,MULTIMEDIA CARD MCCG0022801 PRESS, STS, , , , , SILVER

6 MCJK00 COVER,FRONT MCJK0117101 MOLD, PC LUPOY SC-1004A, , , , , BLACK

7 MFEZ00 FRAME MFEZ0023101 PRESS, STS, , , , , WITHOUTCOLOR

7 MICA00 INSERT,FRONT MICA0019701 CASTING, Zn Alloy, , , , , WITHOUTCOLOR

6 MDAY00 DECO MDAY0045701 MOLD, PC LUPOY SC-1004A, , , , , BLACK

6 MDAY01 DECO MDAY0045801 MOLD, PC LUPOY SC-1004A, , , , , BLACK






6 MPBT00 PAD,CAMERA MPBT0085701 COMPLEX, (empty), , , , , WITHOUTCOLOR

6 MPFZ00 PLATE MPFZ0050701 PRESS, STS, , , , , WITHOUTCOLOR

6 MTAA00 TAPE,DECO MTAA0214801 COMPLEX, (empty), , , , , WITHOUTCOLOR









6 MTAD00 TAPE,WINDOW MTAD0117001 COMPLEX, (empty), , , , , WITHOUTCOLOR

6 MWAE00 WINDOW,CAMERA MWAE0054101 MOLD, PC LUPOY HI-1002M, , , , , BLACK

5 ADBY00 DECO ASSY ADBY0015901 REAR BLACK 21

6 MCCZ00 CAP MCCZ0033901 MOLD, Silicone Rubber KE971-U, , , , , BLACK A'

6 MDAY00 DECO MDAY0045601 MOLD, PC LUPOY SC-1004A, , , , , BLACK Y

6 MTAZ00 TAPE MTAZ0256901 COMPLEX, (empty), , , , , WITHOUTCOLOR X

5 AFBZ00 FRAME ASSY AFBZ0015901 BLACK 20

6 MFEZ00 FRAME MFEZ0023001 MOLD, PC LUPOY SC-1004A, , , , , BLACK B'

6 MPBZ00 PAD MPBZ0248201 COMPLEX, (empty), , , , , WITHOUTCOLOR C', 5

5 GMEY00 SCREW MACHINE,BIND GMEY0011201 1.4 mm,3 mm,MSWR3(BK) ,N ,+ ,NYLOK WITHOUTCOLOR O', 22

5 MBJZ01 BUTTON MBJZ0014801 PRESS, STS, , , , , SILVER 2

대치 BUTTON MBJZ0034801 PRESS, STS, , , , , WITHOUTCOLOR C


대치 BUTTON MBJZ0034901 PRESS, STS, , , , , WITHOUTCOLOR D


대치 BUTTON MBJZ0035001 PRESS, STS, , , , , WITHOUTCOLOR B

5 MCCZ00 CAP MCCZ0034101 MOLD, Silicone Rubber KE971-U, , , , , BLACK E, 6

6 MFBZ00 FILTER MFBZ0005601 COMPLEX, (empty), , , , , WITHOUTCOLOR

5 MCCZ01 CAP MCCZ0034001 MOLD, Silicone Rubber KE971-U, , , , , BLACK Q, 18


5 MCCZ03 CAP MCCZ0034201 MOLD, Silicone Rubber KE971-U, , , , , BLACK G, 8

5 MCCZ04 CAP MCCZ0036801 MOLD, Silicone Rubber KE971-U, , , , , BLACK F, 7





5 MIDZ00 INSULATOR MIDZ0265001 COMPLEX, (empty), , , , , WITHOUTCOLOR N, 30

5 MLAR00 LABEL,WARNING MLAR0005301 COMPLEX, (empty), , , , , YELLOW

5 MPBZ00 PAD MPBZ0248501 COMPLEX, (empty), , , , , WITHOUTCOLOR K, 9

5 MPBZ01 PAD MPBZ0248301 COMPLEX, (empty), , , , , WITHOUTCOLOR J

5 MPBZ02 PAD MPBZ0248401 COMPLEX, (empty), , , , , WITHOUTCOLOR O, 28

5 MPBZ03 PAD MPBZ0268901 COMPLEX, (empty), , , , , WITHOUTCOLOR 16

5 MPBZ05 PAD MPBZ0272001 COMPLEX, (empty), , , , , WITHOUTCOLOR P, 15

5 MTAB01 TAPE,PROTECTION MTAB0352401 COMPLEX, (empty), , , , , WITHOUTCOLOR





5 MTAZ00 TAPE MTAZ0285501 COMPLEX, (empty), , , , , WITHOUTCOLOR R, 10

5 MTAZ01 TAPE MTAZ0303101 COMPLEX, (empty), , , , , WITHOUTCOLOR I, 23

5 MTAZ02 TAPE MTAZ0335701 COMPLEX, (empty), , , , , WITHOUTCOLOR H, 29

8 ANT400 TERMINAL,GROUND MTCA0002701 PRESS, BeCu, , , , , WITHOUTCOLOR

8 ANT401 TERMINAL,GROUND MTCA0002701 PRESS, BeCu, , , , , WITHOUTCOLOR

4 GMEY00 SCREW MACHINE,BIND GMEY0011201 1.4 mm,3 mm,MSWR3(BK) ,N ,+ ,NYLOK WITHOUTCOLOR

6 MCBA00 CAN,SHIELD MCBA0062301 PRESS, STS, , , , , WITHOUTCOLOR E'

7 MTAZ00 TAPE MTAZ0309901 COMPLEX, (empty), , , , , WITHOUTCOLOR D'

6 MLAB LABEL,A/S MLAB0004801 PRINTING, (empty), , , , , WITHOUTCOLOR





6 MLAZ00 LABEL MLAZ0038301 PID Label 4 Array WITHOUTCOLOR

7 SC401 CAN,SHIELD MCBA0061701 PRESS, STS, , , , , WITHOUTCOLOR

7 SC402 BRACKET MBFZ0039301 PRESS, STS, , , , , WITHOUTCOLOR

7 ANT1001 CONTACT MCIZ0002601 PRESS, BeCu, , , , , WITHOUTCOLOR

7 ANT1002 CONTACT MCIZ0002601 PRESS, BeCu, , , , , WITHOUTCOLOR

3 MLAA00 LABEL,APPROVAL MLAA0062304 COMPLEX, (empty), , , , , WITHOUTCOLOR





1 IMT,BAR/FLIP TIMT0009801 COLORUNFIXED

4 SNGF00 ANTENNA,GSM,FIXED SNGF0057301 3.0 ,-2.0 dBd, ,GPS/BT(WiFi), FPCB ,; ,DUAL ,-2.0 ,50,3.0

6 SVLM00 LCD MODULE SVLM0037001 Main ,3.18 ,480*854 ,46.1*85.7*3.85 ,16.7M ,TFT ,TM,LG4573 ,Touch Window Hybrid ,

6 SNGF00 ANTENNA,GSM,FIXED SNGF00569033.0 ,-2.0 dBd,,GSM850/GSM900/DCS/PCS/BAND1/BAND8, FPCB ,;,MULTI ,-2.0 ,50 ,3.0

Z

5 SACY00 PCB ASSY,FLEXIBLE SACY0103201 SUB M, 11

6 SACB00 PCBASSY,FLEXIBLE,INSERT SACB0058501 SUB

6 SACE00 PCB ASSY,FLEXIBLE,SMT SACE0093001 SUB

7 SACC00 PCB ASSY,FLEXIBLE,SMTBOTTOM SACC0068401 SUB

8 BAT400 MODULE,ETC SMZY0023501 3.8 Backup Capacitor 0.03F ,; ,Module Assembly

8 C102 CAP,CERAMIC,CHIP ECCH0000112 15 pF,50V,J,NP0,TC,1005,R/TP

8 C103 CAP,CERAMIC,CHIP ECCH0000155 10 nF,16V,K,X7R,HD,1005,R/TP

8 C105 CAP,CERAMIC,CHIP ECCH0000198 2.2 uF,6.3V ,M ,X5R ,TC ,1005 ,R/TP





8 C111 CAP,CERAMIC,CHIP ECCH0000151 4.7 nF,25V,K,X7R,HD,1005,R/TP

8 C112 VARISTOR SEVY0003901 5.5 V, ,SMD ,Vdc 5.5, Vb 8, Cp 420, 1.0*0.5*0.6 , ,5.5 ,,480 ,1.0*0.5*0.6 ,[empty] ,SMD ,R/TP





8 C117 CAP,CERAMIC,CHIP ECCH0000185 5.6 pF,50V ,C ,NP0 ,TC ,1005 ,R/TP


8 C119 CAP,CERAMIC,CHIP ECCH0004904 1 uF,6.3V ,K ,X5R ,TC ,1005 ,R/TP

11.2 Replacement Parts Note: This Chapter is used for reference, Part order is ordered

<Main component>










8 C125 CAP,CERAMIC,CHIP ECCH0005604 10000000 pF,6.3V ,M ,X5R ,TC ,1608 ,R/TP , , ,[empty],[empty] ,[empty] ,[empty] ,[empty] ,[empty] ,0.8 mm

8 C126 CAP,CHIP,MAKER ECZH0000813 100 pF,50V ,J ,NP0 ,TC ,1005 ,R/TP





8 C203 CAP,CERAMIC,CHIP ECCH0010501 7.5 pF,50V ,D ,X7R ,TC ,1005 ,R/TP ,; ,C0G TYPE(NoX7R) ,[empty] ,[empty] ,[empty] ,[empty] ,[empty] ,[empty]

8 C206 CAP,CHIP,MAKER ECZH0003103 0.1 uF,10V ,K ,X7R ,HD ,1005 ,R/TP







8 C214 CAP,CERAMIC,CHIP ECCH0010501 7.5 pF,50V ,D ,X7R ,TC ,1005 ,R/TP ,; ,C0G TYPE(NoX7R) ,[empty] ,[empty] ,[empty] ,[empty] ,[empty] ,[empty]












8 C308 CAP,CHIP,MAKER ECZH0001120 3.9 nF,50V ,K ,X7R ,HD ,1005 ,R/TP , , ,[empty] ,[empty],[empty] ,[empty] ,[empty] ,[empty]





8 C406 CAP,TANTAL,CHIP ECTH0001901 10 uF,6.3V ,M ,L_ESR ,1608 ,R/TP







8 CN100 CONNECTOR,BOARD TOBOARD ENBY0045501 60 PIN,0.4 mm,STRAIGHT , , ,; , ,0.40MM ,STRAIGHT

,FEMALE ,SMD ,[empty] , ,

8 CN201 CONNECTOR,BOARD TOBOARD ENBY0040301 34 PIN,0.4 mm,ETC , ,H=1.0, Socket

8 CN402 CONNECTOR,ETC ENZY0018801 PIN, mm,ETC , ,RCS=1.35

8 D200 DIODE,TVS EDTY0008606 DFN-2 ,7.82 V,150 mW,R/TP ,PB-FREE

8 D300 DIODE,TVS EDTY0009801 SOT-963 ,5 V,25 W,R/TP , ,; , , , , , ,[empty] ,[empty] ,2P,1



8 FB200 FILTER,BEAD,CHIP SFBH0009901 120 ohm,1005 ,


8 FL100 FILTER,EMI/POWER SFEY0011401 SMD ,SMD, 18V, 4ch, EMI_ESD Filter (100 Ohm, 7.5pF)








8 FL200 FILTER,EMI/POWER SFEY0013701 SMD ,18 V,4ch. EMI_ESD Filter (100 Ohm, 7.5pF)







8 L300 INDUCTOR,CHIP ELCH0004727 100 nH,J ,1005 ,R/TP ,


8 MIC400 MICROPHONE SUMY0010609 UNIT ,-42 dB,3.76*2.95*1.1 ,mems smd mic ,; , , ,OMNI,[empty] , ,[empty]

8 R100 PCB ASSY,MAIN,PADSHORT SAFP0000501

8 R102 RES,CHIP ERHY0003301 100 ohm,1/16W ,J ,1005 ,R/TP

8 R103 RES,CHIP,MAKER ERHZ0000267 3300 ohm,1/16W ,F ,1005 ,R/TP


8 R105 RES,CHIP,MAKER ERHZ0000434 1 ohm,1/16W ,J ,1005 ,R/TP




8 R111 RES,CHIP,MAKER ERHZ0000205 1 Mohm,1/16W ,F ,1005 ,R/TP










8 R215 RES,CHIP ERHY0000275 56K ohm,1/16W,J,1005,R/TP


8 R300 RES,CHIP,MAKER ERHZ0000444 22 Kohm,1/16W ,J ,1005 ,R/TP





8 R305 RES,CHIP,MAKER ERHZ0000456 2.2 ohm,1/16W ,J ,1005 ,R/TP










8 R312 RES,CHIP,MAKER ERHZ0000203 10 Kohm,1/16W ,F ,1005 ,R/TP





8 S300 CONN,SOCKET ENSY0023301 8 ,ETC , ,0.7 mm,H=1.52,(15*15)

8 SW400 CONN,RF SWITCH ENWY0003901 ,SMD , dB,

8 U100 IC EUSY0366801 BGA ,96 ,R/TP ,MDDI, SCALIER ,; ,IC,Mobile PixelLink(MPL)

8 U101 IC EUSY0383103 CSP ,35 ,R/TP ,8CH,PWM,ALC,4LDO ,; ,IC,Sub PMIC

8 U102 IC EUSY0240001 MICROPAK ,6 PIN,R/TP ,SINGLE BIT UNIT-DIRECTIONAL TRANSLATOR / PB FREE

8 U302 IC EUSY0200803 MFL ,8 ,R/TP ,Haptic Driver IC,2X2 ,; ,IC,Motor Driver

8 U303 IC EUSY0345201 3*3 QFN ,10 PIN,R/TP ,3xis Accelerometer ,; ,IC,A/DConverter

8 U400 IC EUSY0363501 uMLF ,10 ,R/TP ,0.4ohm Audio Analog Switch ,;,IC,Analog Switch

8 X100 X-TAL EXXY0023301 27 MHz,50 PPM,9 pF,50 ohm,SMD ,3.2*2.5*0.7 ,30ppmat -20'C ~ +70'C, Pb Free

7 SACD00 PCB ASSY,FLEXIBLE,SMTTOP SACD0080901 SUB

8 CN200 CONNECTOR,BOARD TOBOARD ENBY0051101 80 , mm,STRAIGHT , , ,; , ,0.40MM ,[empty] ,MALE

,[empty] ,[empty] , ,

8 MIC401 MICROPHONE SUMY0010609 UNIT ,-42 dB,3.76*2.95*1.1 ,mems smd mic ,; , , ,OMNI,[empty] , ,[empty]

8 SW300 SWITCH,TACT ESCY0006101 15 V,20 mA,HORIZONTAL ,1 G, ,; ,1C1P ,[empty],[empty] ,[empty] , ,[empty]

8 U200 CAMERA SVCY0019901 CMOS ,VGA ,Toshiba(1/10"), 4x4x2.23t, Reflow Type

8 U300 IC EUSY0376201 ,8 ,R/TP , ,; ,IC,PMIC

8 U301 IC EUSY0388201 WSOF6 ,5 ,R/TP ,1.6*1.6 ,; ,IC,PMIC

7 SPCY PCB,FLEXIBLE SPCY0203601 FR-4 ,0.4 mm,STAGGERED-6 ,WHITE-MINI ,; , , , , , , , ,,





5 SJMY00 VIBRATOR,MOTOR SJMY0008510 2.0 V,0.1 A,10*3.6 ,spring ,; ,3V , , , , , , , W, 19

5 SURY00 RECEIVER SURY0010114 ASSY , dB, ohm,1207*2.5 ,10mm ,; , , , , , ,WIRE , L, 13

5 SUSY00 SPEAKER SUSY0027615 PIN ,8 ohm,88 dB,1810 mm,module ,; , , , , , , ,[empty] V, 17

5 SVCY00 CAMERA SVCY0025001 CMOS ,MEGA ,5M AF Toshiba(1/4"),8.5x8.5x5.4t,RAW,90degree,FPCB T, 12

5 SWCC00 CABLE,COAXIAL SWCC0009301 78 mm,1 LINE,U.FL_W.FL ,; ,[empty] ,[empty] ,0.075M ,,[empty] , ,[empty] S, 14

4 SAFY PCB ASSY,MAIN SAFY0349601 25

5 SAFB00 PCB ASSY,MAIN,INSERT SAFB0107801

6 BRAH00 RESIN,PC BRAH0001301 ; , , , ,[empty] Black

5 SAFF00 PCB ASSY,MAIN,SMT SAFF0260601 F'

6 SAFC00 PCB ASSY,MAIN,SMTBOTTOM SAFC0137201

7 C1113 CAP,CERAMIC,CHIP ECCH0009230 2200 pF,10V ,K ,X5R ,TC ,0603 ,R/TP , , ,[empty],[empty] ,[empty] ,[empty] ,[empty] ,[empty]



7 C202 CAP,CERAMIC,CHIP ECCH0017301 1000000 pF,6.3V ,M ,X5R ,HD ,0603 ,R/TP ,; ,1 ,20%,6.3V ,X5R ,-55TO+85C ,0603 ,R/TP ,0.3 mm

7 C203 CAP,CERAMIC,CHIP ECCH0009101 0.1 uF,6.3V ,K ,X5R ,TC ,0603 ,R/TP






7 C209 CAP,CERAMIC,CHIP ECCH0009103 100 pF,50V ,J ,X7R ,TC ,0603 ,R/TP , , ,[empty] ,[empty],C0G ,[empty] ,[empty] ,[empty] ,0.3 mm


7 C211 CAP,TANTAL,CHIP ECTH0001903 22 uF,6.3V ,M ,L_ESR ,1608 ,R/TP

7 C212 CAP,CHIP,MAKER ECZH0025920 1 nF,16V ,K ,X7R ,HD ,0603 ,R/TP , , ,[empty] ,[empty],[empty] ,[empty] ,[empty] ,[empty]

7 C213 CAP,CERAMIC,CHIP ECCH0009106 10 nF,16V ,K ,X7R ,TC ,0603 ,R/TP










7 C220 CAP,CERAMIC,CHIP ECCH0009203 33 nF,6.3V ,K ,X5R ,TC ,0603 ,R/TP



7 C223 CAP,CERAMIC,CHIP ECCH0009226 39 pF,25V ,J ,X7R ,TC ,0603 ,R/TP













7 C315 CAP,CERAMIC,CHIP ECCH0017601 4.7 uF,6.3V ,M ,X5R ,HD ,1005 ,R/TP ,; , ,20% ,6.3V,X5R ,-55TO+85C ,1005 ,R/TP , mm












7 C617 CAP,CERAMIC,CHIP ECCH0007802 4.7 uF,10V ,M ,X5R ,TC ,1608 ,R/TP



7 C620 CAP,CHIP,MAKER ECZH0025908 8 pF,25V ,D ,NP0 ,TC ,0603 ,R/TP





7 CN400 CONNECTOR,I/O ENRY0008701 5 , mm,ETC , , ,; , ,0.60MM ,[empty] ,RECEPTACLE,[empty] ,[empty] ,

7 CN401 CONNECTOR,ETC ENZY0026901 3 ,2.5 mm,ETC ,- ,-

7 CN500 CONNECTOR,BOARD TOBOARD ENBY0051201 80 , mm,STRAIGHT , , ,; , ,0.40MM ,[empty] ,FEMALE

,[empty] ,[empty] , ,


7 D400 DIODE,SWITCHING EDSY0010501 ESC ,30 V,100 mA,R/TP ,SWITCH DIODE





7 J500 CONN,JACK/PLUG,EARPHONE ENJE0006701 4 ,5 PIN, ,; ,4P ,4P ,ANGLE ,[empty] , ,BLACK ,

7 L400 INDUCTOR,SMD,POWER ELCP00080124.7 uH,M ,2.5*2*1.2 ,R/TP ,Coil ,; ,4.7 ,20% ,; ,1.3 ,0.338,; ,; ,SHIELD ,2.5X2X1MM ,[empty] ,R/TP ,Inductor,WireWound,Chip




7 L500 INDUCTOR,CHIP ELCH0001430 100 nH,J ,1005 ,R/TP ,PBFREE

7 L600 INDUCTOR,SMD,POWER ELCP0008001 4.7 uH,M ,2.5*2.0*1.0 ,R/TP ,





7 L610 INDUCTOR,SMD,POWER ELCP00080073.3 uH,N ,2.5*2.0*1.0 ,R/TP ,MLCI Power ,; ,3.3 ,30% ,; ,;,; ,; ,; ,SHIELD ,2.5X2X1MM ,[empty] ,[empty],Inductor,Wire Wound,Chip




7 R203 PCB ASSY,MAIN,PADOPEN SAFO0000401 0OHM DNI

7 R204 RES,CHIP ERHY0009503 100 ohm,1/20W(0.05W) ,J ,0603 ,R/TP



7 R208 RES,CHIP ERHY0009504 1 Kohm,1/20W(0.05W) ,J ,0603 ,R/TP

7 R209 RES,CHIP ERHY0024201 6040 ohm,1/16W ,F ,1005 ,R/TP ,; ,6040 ,1% ,1/16W,1005 ,R/TP


7 R211 RES,CHIP ERHY0000104 49.9 ohm,1/16W,F,1005,R/TP







7 R308 RES,CHIP ERHY0009536 100 Kohm,1/20W(0.05W) ,F ,0603 ,R/TP



7 R406 RES,CHIP ERHY0000105 51 ohm,1/16W,F,1005,R/TP




7 R433 RES,CHIP,MAKER ERHZ0000318 80.6 Kohm,1/16W ,F ,1005 ,R/TP










7 R507 RES,CHIP ERHY0009507 1 Mohm,1/20W(0.05W) ,J ,0603 ,R/TP

7 R600 PCB ASSY,MAIN,PADSHORT SAFP0000401


7 U200 IC EUSY0392302560 NSP ,12 ,R/TP,ARM11(600M),UPA5.7,FWGA,8M,WVGA30fps,WM,BMP,Android ,; ,IC,Digital Baseband Processor

7 U201 IC EUSY0306201 Micro pak ,8 PIN,R/TP ,D Flip Flip

7 U202 IC EUSY0216301 SC70 ,5 PIN,R/TP ,Single 2-Input NAND Gate

7 U301 IC EUSY0395604FBGA ,137 ,ETC ,4G(LB/256Mx16)NAND+4G(DDR400/16Mx4x32*2_2CS_2CKE) SDRAM ,;,IC,MCP

7 U400 IC EUSY0342201 CSP ,137 PIN,R/TP ,PMIC, for MSM7xxx ,; ,IC,PMIC

7 U600 MODULE,ETC SMZY0024901 WiFi 11bg+BT+FM Module 9x7.8 x1.2,54pin,BCM4325D1,; ,WLAN

7 U601 IC EUSY0355701 PLP1010-4 ,4 PIN,R/TP ,150mA 2.8V Single LDO ,;,IC,Voltage Regulator

7 X200 VCTCXO EXSK0007802 19.2 MHz,1.5 PPM,10 pF,SMD ,3.3*2.5*1.0 , ,; , ,2PPM,2.8V , , , , ,SMD ,P/TP

7 X400 X-TAL EXXY002430132.768 KHz,20 PPM,12.5 pF,70 Kohm,SMD ,3.2*1.5*0.9,-40'C ~ +85'C, C0 1.05pF, C1 fF ,; ,32.768 ,20PPM ,12.5, , ,SMD ,R/TP

7 X600 TCXO EXST0001901 26 MHz,2.5 PPM,10 pF,SMD ,32*15*1.0 ,TI_WL1251 ,; ,,2.5PPM ,2.8V , , , , ,SMD ,R/TP

7 ZD400 DIODE,TVS EDTY0008610 SOD-523 ,5 V,250 W,R/TP ,PB-FREE

6 SAFD00 PCB ASSY,MAIN,SMT TOP SAFD0134601

7 ANT600 ANTENNA,MOBILE,FIXED SNMF0051501 5 ,-5 dB,Internal, BT, Chip, Pb Free ,; ,SINGLE , , ,


7 C1004 INDUCTOR,CHIP ELCH0001430 100 nH,J ,1005 ,R/TP ,PBFREE






7 C1012 CAP,CERAMIC,CHIP ECCH0000175 2.7 pF,50V ,B ,NP0 ,TC ,1005 ,R/TP









7 C1022 CAP,CHIP,MAKER ECZH0001002 0.5 pF,50V ,B ,NP0 ,TC ,1005 ,R/TP












7 C1037 CAP,CERAMIC,CHIP ECCH0000175 2.7 pF,50V ,B ,NP0 ,TC ,1005 ,R/TP


7 C1039 CAP,CHIP,MAKER ECZH0000839 4.7 pF,50V ,C ,NP0 ,TC ,1005 ,R/TP





























7 C3 INDUCTOR,CHIP ELCH0001430 100 nH,J ,1005 ,R/TP ,PBFREE




7 C448 CAP,TANTAL,CHIP ECTH0005203 33 uF,10V ,M ,STD ,2012 ,R/TP ,; , ,[empty] ,[empty] ,,[empty] , ,[empty] ,[empty] ,[empty] ,[empty]





7 C457 CAP,CHIP,MAKER ECZH0003503 1 uF,25V ,K ,X5R ,HD ,1608 ,R/TP

7 C458 CAP,TANTAL,CHIP ECTH0005203 33 uF,10V ,M ,STD ,2012 ,R/TP ,; , ,[empty] ,[empty] ,,[empty] , ,[empty] ,[empty] ,[empty] ,[empty]












7 C507 CAP,CERAMIC,CHIP ECCH0032801 220 nF,6.3V ,M ,X5R ,HD ,0603 ,R/TP ,; , ,[empty],[empty] ,[empty] ,[empty] ,[empty] ,[empty] ,0.3 mm

7 C508 CAP,CERAMIC,CHIP ECCH0032801 220 nF,6.3V ,M ,X5R ,HD ,0603 ,R/TP ,; , ,[empty],[empty] ,[empty] ,[empty] ,[empty] ,[empty] ,0.3 mm








7 C522 CAP,CERAMIC,CHIP ECCH0009514 10 pF,25V ,D ,C0G ,HD ,0603 ,R/TP , , ,[empty] ,[empty],[empty] ,[empty] ,[empty] ,[empty] ,0.3 mm









7 FB502 FILTER,BEAD,CHIP SFBH0008102 1800 ohm,1005 ,Bead



7 FL1001 FILTER,SAW SFSY00334031575.42 MHz,1.4*1.1*0.4 ,SMD ,1574.42M~1576.42M, IL1.2, 5pin, U-U, 50-50, GPS HIGH ATTEN. ,; ,1575.42,1.4*1.1*0.4 ,SMD ,R/TP

7 FL1002 DUPLEXER,IMT SDMY0002801

897.5 MHz,942.5 MHz,2.9 dB,3.8 dB,55 dB,45dB,2.5*2.0*0.94 ,SMD ,SAW, Band8, Rx balance type ,;,942.5 ,925 to 960 ,897.5 ,880 to 915 ,3.8 ,2.9,2.5x2.0x0.94 ,DUAL ,SMD ,R/TP





7 FL1003 DUPLEXER,IMT SDMY0001901

1950 MHz,2140 MHz,1.8 dB,2.4 dB,52 dB,43dB,2.5*2.0*0.55 ,SMD ,Band1, 2520size, SAW, Rx unbal,; ,2140 ,2110 to 2170 ,1950 ,1920 to 1980 ,2.4 ,1.8,2.5x2.0x0.55 ,DUAL ,SMD ,R/TP

7 FL1004 FILTER,SAW SFSY00350012140 MHz,1.4*1.1*0.45 ,SMD ,2110M~2170M, IL 2.3,5pin, U-B, 50-100_20, WCDMA BAND I Rx ,; ,2140,1.4*1.1*0.45 ,SMD ,R/TP

7 FL1005 FILTER,SAW SFSY00351011950 MHz,1.4*1.1*0.45 ,SMD ,1920M~1980M, IL 3.2,5pin, U-U, 50-50, WCDMA BAND I Tx ,; ,1950,1.4*1.1*0.45 ,SMD ,R/TP

7 FL1006 FILTER,SAW SFSY0037601897.5 MHz,1.4*1.1*0.4 ,SMD ,880M~915M, IL 3.6, 5pin,U-U, 50-50, W-BAND VIII Tx ,; ,897.5 ,1.4*1.1*0.4 ,SMD,R/TP

7 FL1007 FILTER,SEPERATOR SFAY0012501 , , dB, dB, dB, dB,4532 ,

7 FL400 FILTER,EMI/POWER SFEY0006501 SMD ,3 TERMINAL EMI FILTER

7 IC500 IC EUSY0360201 CSP ,20 ,R/TP ,Class D(mono) + Capless HP + A/S ,;,IC,Audio Sub System

7 J1 CONN,SOCKET ENSY0024301 6 ,ETC , ,2.54 mm,16.3x17.4x1.5t, Stopper

7 L1001 INDUCTOR,CHIP ELCH0004713 6.8 nH,J ,1005 ,R/TP ,


7 L1003 INDUCTOR,CHIP ELCH0004720 1.2 nH,S ,1005 ,R/TP ,








7 L1011 INDUCTOR,CHIP ELCH0001401 15 nH,J ,1005 ,R/TP ,Pb Free







7 L1018 INDUCTOR,CHIP ELCH0004726 1.5 nH,J ,1005 ,R/TP ,










7 L1025 INDUCTOR,CHIP ELCH0004105 1.2 nH,S ,0603 ,R/TP ,MLCI



7 R1 RES,CHIP ERHY0009516 2.2 Kohm,1/20W(0.05W) ,J ,0603 ,R/TP


7 R1002 PCB ASSY,MAIN,PADOPEN SAFO0000401 0OHM DNI


































7 R432 RES,CHIP,MAKER ERHZ0003901 0.1 ohm,1/4W ,F ,2012 ,R/TP ,; ,0.1 ,1% ,1/4W ,2012,R/TP






7 SPFY00 PCB,MAIN SPFY0215601 FR-4 ,0.75 mm,ANY-LAYER10 , ,; , , , , , , , , ,

7 SW1001 CONN,RF SWITCH ENWY0004001 ,SMD ,1.3 dB,

7 SW1002 CONN,RF SWITCH ENWY0006801 ,SMD , dB, ,; ,0.40MM ,STRAIGHT ,SOCKET ,SMD,[empty] ,[empty] , ,

7 U1001 MODULE,ETC SMZY0021701 GPS LNA Module integrated Filter, 3.3x2.1x1.1 ,; ,RFModule

7 U1002 PAM SMPY0020101 dBm, %, A, dBc, dB,4x5 ,SMD ,3G Dual PAM B1+8.Coupler Integrated ,; , , , , , , , ,LGA ,R/TP ,

7 U1003 IC EUSY0344001 QFN ,68 ,R/TP ,Quad GSM, Tri WCDMA RF Transceiver,; ,IC,Tx/Rx

7 U1004 PAM SMPY0019101 dBm, %, A, dBc, dB,5x5 ,SMD ,Polar Edge for QCT ,; , , ,, , , , ,LGA ,R/TP ,

7 U401 IC EUSY0353801 PLP1010-4 ,4 PIN,R/TP ,1x1 LDO, 3.3V , 150mA ,;,IC,LDO Voltage Regulator

7 U402 IC EUSY0371201 WLP ,20 ,R/TP ,MUIC for 5Pin Micro USB ,; ,IC,AnalogSwitch

7 U403 TR,FET,P-CHANNEL EQFP0008601 DFN8 ,1.3 W,-20 V,-3.9 A,R/TP ,Intergrated powerMOSFET with PNP Transistor

7 U404 IC EUSY0374601 TDFN ,8 ,R/TP ,Programmable OVP ,; ,IC,Charger

7 U500 IC EUSY0355501 PLP1010-4 ,4 PIN,R/TP ,1.8V 150mA Single LDO ,;,IC,LDO Voltage Regulator





3 SBPL00 BATTERY PACK,LI-ION SBPL01000013.7 V,900 mAh,1 CELL,PRISMATIC,533640,Innerpack,WW ,; ,3.7 ,900 ,180 ,PRISMATIC,5.3xx36x40 ,5.7x41x39 ,BLACK ,innerpack ,

P', 24

3 SGDY00 DATA CABLE SGDY0014302 ; ,[empty] ,[empty] ,1.2M , ,BLACK ,1.2m, 4, Shield caseMicroUSB, ID resistor open ,N

3 SGEY00 EAR PHONE/EAR MIKESET SGEY0007610

; ,20mW ,16 ohm ,99dB,1KHZ,1mW ,65dB 10KHZ,104dB 100KHZ ,[empty] ,[empty] ,3.5 L TYPE STEREO4POLE PLUG ,Mic Slimtype Canal(BK) ,Earphone,Stereo

3 SSAD00 ADAPTOR,AC-DC SSAD0031001 100-240V ,5060 Hz,5.1 V,0.7 A,CE ,STA-U12ED,Europe, Cableless ,; , ,5.1 ,0.7 , , ,WALL 2P ,USB ,

대치 ADAPTOR,AC-DC SSAD0031002 100-240V ,5060 Hz,5.1 V,0.7 A,CE ,STA-U12ER,Europe, Cableless ,; , ,5.1 ,0.7 , , ,WALL 2P ,USB ,

대치 ADAPTOR,AC-DC SSAD0031003 100-240V ,5060 Hz,5.1 V,0.7 A,CE ,STA-U12ES,Europe, Cableless ,; , ,5.1 ,0.7 , , ,WALL 2P ,USB ,

11.3 Accessory Note: This Chapter is used for reference, Part order is ordered

SGDY0016701

GD880_SVC ENG_100323.indd

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