Design and Testing of Boost Converter Under the Guidance of

JSS MahavidyapeethaSri Jayachamarajendra College of Engineering, Mysore 570 006

An Autonomous Institution Affiliated toVisvesvaraya Technological University (VTU), Belgaum

Design and Testing of Boost Converter

Thesis submitted in partial fulfillment of the curriculum prescribed for theaward of the degree of Bachelor of Engineering in Electrical and

Electronics Engineering by

4JC08EE047 Sathish Kumar D4JC09EE400 Basavaraju C4JC09EE406 Nagendra Prasad M N

Under the Guidance of

M.H.SidramAssociate Professor

Department of E&EE, SJCE, Mysore

Department of Electrical & Electronics Engineering

June, 2012

JSS MahavidyapeethaSri Jayachamarajendra College of Engineering, Mysore 570 006

An Autonomous Institution Affiliated toVisvesvaraya Technological University (VTU), Belgaum

CertificateThis is to certify that the work entitled “Design and Testing of Boost Converter” is abonafide work carried out by Sathish Kumar.D, Basavaraju.C, Nagendra Prasad.M.Nin partial fulfillment of the award of the degree of Bachelor of Engineering in Electrical andElectronics Engineering of Visvesvaraya Technological University, Belgaum, during theyear 2012. It is certified that all corrections / suggestions indicated during CIE have beenincorporated in the report. The project report has been approved as it satisfies the academicrequirements in respect of the project work prescribed for the Bachelor of EngineeringDegree.

GuideM.H.Sidram

Associate ProfessorDepartment of E&EESJCE, Mysore 570 006

Head of the DepartmentR.S.Ananda Murthy

Associate Professor and HeadDepartment of E&EESJCE, Mysore 570 006

Date :Place : Mysore

Examiners : 1._____________________________

2._____________________________

3._____________________________

Abstract

The power electronics is fast developing technology with wide applications in the industrial and

power sectors. This motivated us to chose the power electronics field for our project.

This project deals with the designing of power electronics DC-DC boost converter. The objec-

tive of the project serves its purpose mainly in Solar PV stand-alone installations. A MOSFET based

boost converter was designed to run in Continuous Conduction Mode (CCM) with the achievement

of 68% efficiency.

In this project report we have presented the basics of boost converter design, selection criteria

of various components employed and the inductor design procedure.

i

Acknowledgements

We are immensely grateful to Mr.R.S.Ananda Murthy, Head of the Department of Electrical and

Electronics Engineering, SJCE Mysore, for giving us an opportunity to carryout our project work.

Also we would like to thank him for his support and encouragement throughout our project.

We take this opportunity to express our deep sense of gratitude and indebtedness to our project

guide Mr. M.H.Sidram, Associate Proffesor, Department of Electrical and Electronics Engineering,

SJCE Mysore, for his inspiring guidance, constructive criticism and valuable suggestion throughout

this project work.

Also we are very thankful to Dr.B.G.Sangameshwara, Principal of SJCE, Mysore, for providing

the necessary infrastructure and support.

We would also like to thank all teaching and non-teaching staff of our department who directly

or indirectly contributed in the accomplishment of this task.

Our sincere thanks to all our friends who have patiently extended all sorts of help for accom-

plishing this undertaking.

ii

Contents

Contents iii

1 Introduction to DC-DC Converters 11.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

1.2 Types of DC-DC converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

The functions of DC-DC converters are: . . . . . . . . . . . . . . . . . . . . . . . 2

Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2 Basics of Boost Converter 42.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2.2 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Continuons Conduction Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Discontinuons Conduction Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.3 The important features of Boost converter . . . . . . . . . . . . . . . . . . . . . . 10

3 Components Selection Criteria 113.1 Power Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Selection of Semiconductor Device . . . . . . . . . . . . . . . . . . . . . . . . . 11

Selection of Inductor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Selection of Diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Selection of Capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

3.2 PWM Control and Driver Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

4 Design of Boost Converter 164.1 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

4.2 Theoretical Calculation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

4.3 Inductor Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

4.4 Main Circuit Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

5 Result and Conclusion 21

iii

Contents iv

5.1 Triggering pulses as viewed on CRO . . . . . . . . . . . . . . . . . . . . . . . 21

5.2 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Future Advancement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Appendix-1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Appendix-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Bibliography 59

Chapter 1

Introduction to DC-DC Converters

1.1 Introduction

In many industrial applications, it is required to convert a fixed voltage DC source into a variable

voltage DC source. A DC-DC converter can be considered as DC equivalent to an AC transformer

with a continuously variable turns ratio. Like a transformer, DC-DC converter can be used to step

up or step down a DC voltage source.

Modern electonic systems require high-quality, small, lightweight, reliable, and efficient power

supplies. Linear power regulators, whose principle of operation is based on a voltage or current

divider are inefficient. This is because they are limited to output voltages smaller than the input

voltage, and also their power density is low because they require low frequency (50 or 60Hz) line

transformers and filters. Linear regulators can, howerver, provide a very high quality output volt-

age. Their main area of application is at low power levels. Electronic devices in linear regulators

operate in their Active (linear) modes, but at higher power levels switching regulators are used.

Switching regulators use power electronic semiconductor switches in ON and OFF states. Because

there is a small power loss in those states (low voltage across a switch in the ON state, zero cur-

rent through a switch in the OFF state), switching regulators can achieve high energy conversion

efficiencies. Modern power electronic switches can operate at high freuencies. The higher the

operating frequency, the smaller and lighter the transformers, filter inductors, and capacitors. In

addition, the dynamic characteristics of converters improve with increasing operating frequencies.

The bandwidth of a control loop is usually determined by the corner frequency of the output filter.

Therefore, High operating frequencies allow for achieving faster dynamic response to rapid

changes in the load current and/or the input voltage. High frequency electronic power processors

are used in DC-DC power conversion.

1

Chapter 1. Introduction to DC-DC Converters 2

1.2 Types of DC-DC converter

The DC-DC converters can be divided into two main types:

(1) Hard-switching pulse width modulated (PWM) converters

(2) Resonant and soft swtching converters.

Advantages of PWM converters include low component count, high efficiency, constant fre-

quency operation, relatively simple control and commercial availability of integrated circuit con-

trollers, and ability to achieve high conversion ratios for both step-down and step-up application. A

disadvantage of PWM regulator voltage and current waveforms cause turn-on and turn-off losses in

semiconductor devices, which limit practical operating frequencies to hundreds of kHz. Rectangu-

lar waveforms also inherently generate Electro Magnetic Interference (EMI).

• Buck Converter

• Boost Converter

• Buck-Boost Converter

For our project we are to make a boost converter, also known as a step-up converter. We are

to design our own circuit layout on PCB and design our own inductor. Our boost converter is to

have an input voltage of 20V to 24V and an output of 110V. We are to increase or decrease the load

resistance in order to achieve a continuous conduction mode at a 220 Watts output. The switching

frequency of the switch should be 60 kHz and the output voltage ripple should be 1%. The major

components that we have used in our circuit are IRF840 MOSFET , the BYQ28E Fast recovery

diode, and an output capacitor of 33 uF. For the PWM controller we are to use the SG3524 with an

inbuilt gate driving capability. Together with all our components and our own made circuit board

we were able to achieve our goal of an output of 110V.

The functions of DC-DC converters are:

• To Step up a Low DC input voltage.

• To regulate the DC output voltage against load and line variations.

• To reduce the ac voltage ripple on the dc output voltage below the required level.

• To provide isolation between the input source and the load (isolation is not always required)

• To protect the supplied system and the input source from electromagnetic interference (EMI).

Chapter 1. Introduction to DC-DC Converters 3

Applications

1. DC-DC converters are used in battery powered electronic devices such as MP3 players, Lap-

tops etc

2. Switched Mode Power Supply (SMPS).

3. Adjustable speed drives.

4. Hybrid Electric automobiles.

5. They are widely used in Traction motor control.

6. Also used in trolley cars, marine hoists, forklift trucks and mine haulers.

Chapter 2

Basics of Boost Converter

2.1 Introduction

Boost converter is a type of DC-DC converters which steps up the input voltage to a higher value.

The DC-DC converters are widely used in regulated switch mode DC power supplies. The input of

these converters is an unregulated DC voltage, which is obtained by PV array and therefore it will

be fluctuated due to changes in radiation and temperature. In these converters the average DC output

voltage must be controlled to be equated to the desired value although the input voltage is changing.

From the energy point of view, output voltage regulation in the DC-DC converter is achieved by

constantly adjusting the amount of energy absorbed from the source and that injected into the load,

which is inturn controlled by the relative durations of the absorption and injection intervals. These

two basic processes of energy absorption and injection constitute a switching cycle. Intuitively

speaking, if the energy storage capacity of the converter is too small or the switching period is

relatively too long,then the converter would have transmitted all the stored energy to the load before

the next cycle begins. This introduces an idling period immediately following the injection interval,

during which the converter is not performing any specific task.

An ideal boost converter is lossless in terms of energy, so the input and output power are equal.

In practice, there will be losses in the switch and passive elements, but efficiencies better than 90%

are still possible through careful selection of system components and operating parameters such as

the switch frequency.

The DC-DC boost converter only needs four external components: Inductor, Semiconductor

switch, Diode and output capacitor. The converter can therefore operate in the two different modes

depending on its energy storage capacity and the relative length of the switching period. These two

operating modes are known as the discontinuous conduction mode, DCM, and continuous conduc-

tion mode, CCM, corresponding to the cases with and without an idling interval respectively.

Fig 1 shows the circuit diagram of Boost converter. The Boost converter has two modes, a

continuous conduction mode, CCM for efficient power conversion and Discontinuous conduction

4

Chapter 2. Basics of Boost Converter 5

mode, DCM for low power or stand-by operation.

Fig.1 Basic circuit diagram

Where Vg= Input DC voltage

L = Inductor

C = Storage capacitor

v = Output DC voltage

2.2 Operation

The Boost converter has two modes,

• Continuons Conduction Mode, (CCM) and

• Discontinuons Conduction Mode (DCM).

Fig 2. Circuit Schematic of Step-up DC/DC Converter

The working of boost converter can be explained in two phases based on the switch (MOSFET)

operation. Depending upon the output required, the duty cycle of the triggering pulse to the switch

has to be provided. All the calculation details are provided in chapter 3.


Continuons Conduction Mode

Mode 1 (0 < t ≤ ton)

Mode 1 begins when MOSFET is switched on at t =0 and terminates at t = ton. The equivalent

circuit for the mode 1 is shown in Fig.3(a) The inductor current iL(t) greater than zero and ramp up

linearly. The inductor voltage is Vi.

Mode 2 (ton < t ≤ Ts)

Mode 2 begins when MOSFET is switched off at t = ton and terminates at t = Ts. The equivalent

circuit for the mode 2 is shown in Fig.3(b). The inductor current decrease until the MOSFET is

turned on again during the next cycle. The voltage across the inductor in this period is Vi−V0.

Since in steady state time integral of the inductor voltage over one time period must be zero.

Viton +(Vi−V0) to f f = 0

Where;

Vi : Input voltage, volts.

V0 : Average output voltage,volts

ton : On time of the MOSFET, s

to f f : Off time of the MOSFET, s

Dividing both sides by Ts and rearranging the terms yield

V0

Vi=

Ts

to f f=

11−D

Where;

Ts: Switching period, s.

D : Duty cycle.


Fig 3. Equivalent Circuit for boost Converter in CCM

(a) Mode 1 (0 < t ≤ ton)

(b) Mode 2 (ton < t ≤ Ts)

Thus, V0 is inversely proportional to (1-D). It is obvious that the duty cycle ’D’, can not be equal

to 1 otherwise there would be no energy transfer to the output. Assuming a lossless circuit,Pi =

Po,then

IiVi = IoVo

and,

Io

Ii= 1−D

Where;

Io: Average output current, Amp.

Ii: Average input current, Amp.


Discontinuons Conduction Mode

If the current following through the inductor falls to zero before the next turn-on of the switching

MOSFET, then the boost converter is said to be operating in the discontinuous conduction mode. If

we equate the integral of the inductor voltage as shown in Fig.4 over one time period to zero,

ViDTs +(Vi−V0)D1Ts = 0

Then,

V0

Vi=

D1 +DD1

and

I0

Ii=

D1

D1 +D

(since Pi = Po)

Fig.4: Equivalent Circuit for boost Converter in DCM

(a) Mode 1 (0 < t ≤ ton)

(b) Mode 2 (ton < t ≤ (D+D1)T s

(c) Mode 3 (D+D1)Ts < t ≤ Ts

From Fig.4(c), the average input current, which is equal to the inductor current, is

Ii =Vi

2LbDTs (D+D1)


I0 =

(ViTs

2Lb

)DD1

In practice, since Vo is held constant and D varies in response to variation in Vi, it is more useful

to obtain the required duty cycle ’D’, as a function of load current for various values of Vo/Vi.

Now,

D =

[427

V0

Vi

(V0

Vi−1

)I0

I0,aver,max

]0.5

Where;

Io,aver,max : The maximum average output current at the edge of continuous conduction and can be

found by the following equation.

I0,aver =TsV0

2LbD(1−D)2

The average output current has its maximum at D=1/3.

I0,aver,max =2

27TsV0

L

The critical inductance, Lc, is defined as the inductance at the boundary edge between continu-

ous and discontinuous modes and is defined as:

Lc =RD(1−D)

2Fs

where;

R : Equivalent load resistance,Ω

Fs : Switching frequency, Hz

The switching frequency has been chosen arbitrarily to minimize the size of the boost inductor


and limit the loss of the semiconductor device. At higher frequencies the switching losses in the

MOSFET increases, and therefore reduces the overall efficiency of the circuit. At lower frequencies

the required output capacitance and boost inductor size increases, and the volumetric efficiency of

the supply degrades.

2.3 The important features of Boost converter

1. The gain is more than unity.

2. The gain is independent of switching frequency as long as Ts RC. However this design

inequality is a function of the load.

3. The output voltage ripple percentage is dependent on the load on the converter.

4. The parasitic resistances in the converter degrades the gain of converter.

5. The ideal efficiency is unity.

Chapter 3

Components Selection Criteria

3.1 Power Stage

As discussed in the previous chapter, the power stage can operate in continuous or discontinuous

inductor current mode. In continuous inductor current mode (CCM), current flows continuously in

the inductor during the entire switching cycle in steady-state operation. The current never reaches

zero. In discontinuous inductor current mode (DCM), inductor current is zero for a portion of the

switching cycle. It starts at zero, reaches a peak value, and returns to zero during each switching

cycle.

The main components of the power stage are namely inductor, semiconductor switching device,

Diode and capacitor. The selection procedure for these components is as follows,

Selection of Semiconductor Device

The main switching element has been chosen to handle the worst case current and voltage stresses.

The maximum voltage stress on the switching device occurs when the PV/RPS output voltage is

maximized, so:

Vmax,stress =Vin,max

Vin,max : is the maximum input voltage from PV array or RPS, Volt.

The maximum current stress occurs when system power is predominately provided by the PV.

Therefore, the peak current is

Ipeak = Iout put + Iripple

11

Chapter 3. Components Selection Criteria 12

Ipeak =Pin,max

Vin+4Pin,max

Vin

Where;

Pin,max : Maximum input to boost converter.

4: Percentage of ripple current to load output current.

MOSFET: The MOSFET, however, is a device that is voltage controlled and not current con-

trolled. MOSFETs have a positive temperature coefficient, stopping thermal runaway. The ON-

state-resistance has no theoretical limit, hence ON-state losses can be far lower. The MOSFET also

has a body-drain diode, which is particularly useful in dealing with limited freewheeling currents.

All these advantages and the comparative elimination of the current tail soon meant that the

MOSFET became the device of choice for power switch designs. Then in 1980’s the IGBT came

along .

IGBT: The IGBT has the output switching and conduction characteristics of a bipolar transistor

but is voltage controlled like a MOSFET. In general, this means it has the advantages of high-current

handling capability of a bipolar with the case of a control of a MOSFET. However, the IGBT still

has the disadvantages of comparatively large current tail and no body drain diode.

Early versions of the IGBT are also prone to latch up, but nowadays, pretty well eliminated.

Another potential problem with some IGBT types is the negative temperature coefficient, which

could lead to thermal runaway and makes the paralleling of devices hard to effectively achieve.

This problem is now being adressed in the latest generations of IGBTs that are based on “non-

punch through” (NPT) technology. This technology has the same basic IGBT structure but is based

on bulk-diffused silicon, rather than the epitaxial material that both IGBTs and MOSFETs have

been historically used.

It is interesting to note that an IGBT does not exhibit a BJT-like second breakdown failure.

Since, in an IGBT most of the collector current flows through the drive MOSFET with positive

temperature coefficient, the effective temperature coefficient of VCE in an IGBT is slightly positive.

This helps to prevent the second breakdown failure of the device and also facilitates paralleling of

IGBTs.

Choice between IGBTs and MOSFETs is very application-specific and cost, size, speed, switch-

ing loss and thermal requirements should all be considered. Hence the MOSFET IRF840 is chosen

for switching purpose.


Selection of Inductor

Eventhough inductors and transformers are both magnetic components, there is a very important

difference in their functioning and design aspect. In a transformer, the core flux (or the flux density)

is decided by the magnetizing current. The load current virtually has no say in deciding the core flux

(the flux due to the load current is nullified by the counter flux produced by the primary component

of the load current) where as in an inductor, the core flux is decided by the load current. Thus

if the load current increases, there is a possibility that the core may saturate and inductance will

come down. So the primary consideration in inductor is that one has to know the maximum load

current and have the core which does not saturate at this current. This can lead to huge core size

if the current to be handled is high. The core size can be reduced considerably by introducing an

appropriate air gap in the magnetic circuit, with this the coil can carry considerably larger current

without saturating the core.

In switching regulator applications inductor is used as an energy storage device, when the semi-

conductor switch is ON the current in the inductor ramps up and energy is stored. When the switch

turns OFF this energy is released into the load, the amount of energy stored is given by,

Energy = 0.5(LI2

)joules

where L is the inductance in Henrys

and I is the peak value of the inductor current.

Inductor is the energy storage element in the boost converter circuit. Large inductance values

tend to increase the start-up time slightly while small inductance values allow the coil current to

ramp up to higher levels before the switch turns OFF. Inductors with a ferrite core or equivalent

are recommended. It should be ensured that the inductor’s saturation current rating for highest ef-

ficiency is to be used a coil with low DC resistance. Boost inductance is selected based on the

maximum allowed ripple current at minimum duty cycle ’D’ at maximum input voltage, Vin. Given

that switching frequency, Fs, the boost inductor value may be optimally determined to set the con-

verter operating mode in the required load and line range. The critical inductance is defined as the

inductance at the boundary edge between continuous and discontinuous modes. So the value of the

inductor assuming the inductor ripple current4I = 2Io is given by the formulae.

Lmin = (1−D)DR/2Fs in Henry.

where ,

Fs= Switching frequency in Hz

D = Duty cycle

R = The equivalent load, Ω

Keeping this value as reference one can decide what should be the value of inductor by per-


forming simulation to reduce the starting current. For our project EE type ferrite core inductor is

used with 13 SWG thickness of the wounded copper along with the bobbin.

One thing to note about the Boost converter topology is that the inductor current does not con-

tinuously flow to the load. During the switch ON period the inductor current flows to ground and

the load current is supplied from the capacitor. This means that the output capacitor must have suf-

ficient energy storage capability and ripple current rating inorder to supply the load current during

this period.

Selection of Diode

The Boost diode reverse voltage is limited to the output voltage. The diode conducts when the power

switch is in the OFF state and provides a current path for the inductor to the output. Similar to the

IGBTs the worst-case peak current through the diode occurs at low line input voltage and maximum

load. Other important considerations in selecting the diode besides its ability to block the required

OFF-state voltage stress and have sufficient peak and average current handling capability, is fast

switching characteristics, low reverse recovery, and low forward voltage drop.

Since The switching frequency is 60kHz, the diode should be fast enough to operate. Hence

fast recovery diode, BYQ28E which is rated for 500V , 10A is chosen.

Selection of Capacitor

The primary criterion for selecting the output filter capacitor is its capacitance and equivalent series

resistance, ESR. Since the capacitor’s ESR affects efficiency, low-ESR capacitors will be used for

best performance. For reducing ESR is also possible to connect few capacitors in parallel. The

output filter capacitors are chosen to meet an output voltage ripple specifications, as well as its

ability to handle the required ripple current stress.

As mentioned earlier the capacitor should be able to store the complete energy when the switch

is OFF. So the minimum value of the capacitance assuming the capacitor ripple voltage4Vc = 2Vo

is given by the formulae,

Cmin = D/2FsR in Farads

where,

Fs = Switching frequency in Hz

D = Duty cycle

R = Equivalent load, Ω.


3.2 PWM Control and Driver Circuit

The stability of the boost converter will depend on the type of control loop. The main purpose of

the driver circuit is to enhance the switching voltage for the MOSFET or any other switching device

and also we have to isolate the power circuit from the control circuit. Because the power circuit

current must not enter into the control/switching circuit. In our project we have used the PWM IC

SG3524 ( TEXAS Instruments make ) with a gate driving capability.

Fig 5.Pin Description of SG3524

Chapter 4

Design of Boost Converter

4.1 Block Diagram

The above fig shows the block diagram which includes,

1. Power Supply : 24V, 10A DC source as per our requirement

2. Boost converter : This block takes an input DC voltage at low level and gives out a Boosted

voltage, in this case it steps up 24 Volts DC to 110 Volts DC.

3. PWM Control : This gives the necessary gate pulses with required duty cycle for turning

ON the MOSFET

16

Chapter 4. Design of Boost Converter 17

4.2 Theoretical Calculation

CURRENT RIPPLE FACTOR (CRF):

By taking the current ripple factor of the inductor to be 40%.

i.e4II

= 40%

VOLTAGE RIPPLE FACTOR (VRF):

i.e4V0

V0= 1%

SWITCHING FREQUENCY (Fs):

Fs =1.3

Rt Ct=

1.32.2k ∗0.01µ

Fs = 60kHz

GIVEN DATA:

• Input voltage, Vg=24V

• Output voltage, Vo=110V

• Output load current, Io=2A

Step 1 : Calculation of Duty cycle (D):

V0

Vi=

11−D

11−D

=11024

D = 0.78


With 110 volts 2 Amps output, This represent a load of 220W.

Assuming Efficiency to be 90% ( the effiency will be less than the assumed value for Practical

case).

Input power =2200.9

= 244W

With a 24 volts input, this represents average input current of 24424 = 10.16Amps

The optimal Ripple current of the inductor is 40% of the output current. This is a good thumb

rule for most DC - DC Converters and represents a trade off between small inductor size and low

switching losses.

Our inductor current is 10.16 Amps, so for 40% ripple the peak current needs to be (10.16 ∗1.2) = 12.2A. Our minimum inductor current needs to be (10.16∗0.8) = 8.13A.

This gives a change in current4I = 4A.

A switching frequency of 60 kHz has a period of,

T =1Fs

=1

60k= 16.6µs

So the MOSFET switches ON for tON = (0.78∗T ) = 13µs.

We have calculted that our4I needs to change by 4 A, so our change in current with time is,

dIdt

=4

13µ= 0.37∗106

VL = LdIdt

When MOSFET is turned ON Vi =VL = 24V

Therefore the value of inductance is given by

L =Vi/

(dIdt

)=

240.37∗106 = 65 µH

Now, if too much current flows in the inductor, the ferrite core that is wound may saturate with

the effect, that its inductance rapidly decreases. From the equation for Inductor value above, if the

inductance decreases the change in current with time increases, worsening the effect of over current

so we must ensure that the inductor we choose is rated to handle the current. Thus the saturation

rating of the inductor needs to be in excess of the peak current of 12.2 Amps. Therefore a saturation

rating of 13 A should suffice our purpose.


4.3 Inductor Design

E = 0.5LI2 = 0.5∗65µ ∗10.162 = 3.35∗10−3 Joules

Assuming Bm = 0.2Tesla, J = 3A/mm2, Kc = 1, Kw = 0.6

Ap = Aw ∗Ac =2E

Kw Kc J Bm=

6.7∗10−3

36∗104 = 1.86∗10−8 m4

Where,

Ap= Area Product, m4

Aw= Window Area, m2

Ac= Core Area, m2

Kw= Window space factor

Kc= Crest Factor

J = Current Density

Bm= Maximum flux density

With this Calculated Area Product we can select the type of core required, refering to Appendix

- 1

So we have chosen EE 42/21/9

For the core selected,the values for Ap, Aw, Ac are obtained from Appendix-1 and are as follows,

Ap = 2.739∗104 mm4

Aw = 2.56∗102 mm2

Ac = 1.07∗102 mm2

N =LIm

Ac Bm= 32Turns

A =IJ=

10.163

= 3.38mm2

With this calculated Area of conductor (A) we get the conductor size of 13 SWG (Refer

Appendix-2)

The current through the capacitor is given by,

Ic =CdVdt

Assuming4v to be 1% of the output voltage4v = 1.1V


For CCM Ic = Io, therefore the value of capacitor is given by,

C = Io/dVdt

= 2/(

1.113µ

)= 23.6µF

So we have chosen the value of capacitor to be 33µF .

4.4 Main Circuit Diagram

Chapter 5

Result and Conclusion

5.1 Triggering pulses as viewed on CRO

Vin in volts Vo in volts Duty cycle5 23 78%

10 46 78%

15 69 78%

20 90 78%

24 110 78%

21

Chapter 5. Result and Conclusion 22

The Results are valid when 4VoVo

=4V = DTsRC 1

In other words, the switching period (Ts) must be very much less than the natural period

(t0 = RC) of the converter.

Efficiency = Pout,wattsPin,watts

= 110∗0.324∗2 = 68%


5.2 Conclusion

With the analysis completed and the board fully designed and built, we found that our group suc-

cessfully designed a boost converter. A low input voltage (24 V) was applied and a high voltage

(110 V) was obtained according to the specifications that were given to us. As a group, we designed

a functioning PCB with only minor errors. Considering that we had no prior design experience, the

board’s minor errors were typical and could easily be corrected on another design. The boost con-

verter ran with an efficiency of over 60% in all data tests. With this knowledge of power electronics

and design, we feel that, as a group, we are better prepared for the future as engineers.

The Boost converter that we have designed can be loaded upto 2 Amps.With the inductor de-

signed for still higher peak current rating the loading capability of our converter can be increased

upto 4 Amps.

Future Advancement

• By incorporating the soft-start technique and by upgrading the rating of the devices we can

use the designed Boost Converter to drive DC Motors.

• By employing an inverter at the output stage of the Boost converter we can use it for Domestic

lighting.

• It can also be used to charge a Battery by employing Charge Controller.


Appendix-1

Cores

without air

gap

Mean

length per

turn in

mm

Mean

magnetic

length in

mm

Core

cross

section

area Ac ∗100mm2

Window

area Aw ∗100mm2

Area

product

Ap ∗104 mm4

Effective

relative

permia-

bility

µr±25%

AL

nH/turns2

±25%

POTCORES - CEL HP3C grade,(*Philip 3B7 grade)

P 18/11 35.6 26 0.43 0.266 0.114 1480 3122

P 26/16 52 37.5 0.94 0.53 0.498 1670 5247

P 30/19 60 45.2 1.36 0.747 1.016 1760 6703

P 36/22 73 53.2 2.01 1.01 2.010 2030 9500

P 42/29 86 68.6 2.64 1.81 4.778 2120 10250

P 66/56 130 123 7.15 5.18 37.03

EE - CORES - CELL HP3C grade

E 20/10/5 38 42.8 0.31 0.478 0.149 1770 1624

E 25/09/6 51.2 48.8 0.40 0.78 0.312 1840 1895

E 25/13/7 52 57.5 0.55 0.87 0.478 1900 2285

E 30/15/7 56 66.9 0.597 1.19 0.71

E36/18/11 70.6 78.0 1.31 1.41 1.847 2000 4200

E 42/21/9 77.6 108.5 1.07 2.56 2.739 2100 2613

E 42/21/15 93 97.2 1.82 2.56 4.659 2030 4778

E 42/21/20 99 98.0 2.35 2.56 6.016 2058 6231

E 65/32/13 150 146.3 2.66 5.37 14.284 2115 4833

UU - CORES

UU 15 44 48 0.32 0.59 1.90 1100

UU 21 55 68 0.55 1.01 0.555 4.25

UU 23 64 74 0.61 1.36 0.823 1425

UU 60 183 184 1.96 11.65 22.83 1900

UU 100 29.3 308 6.45 29.14 187.95 3325


TOROIDS - CELL HP3C

T 10 12.8 23.55 0.062 0.196 0.012 2300 765

T12 19.2 30.40 0.12 0.442 0.053 2300 1180

T 16 24.2 38.70 0.20 0.785 0.157 2300 1482

T 20 25.2 47.30 0.22 0.950 0.213 2300 1130

T 27 34.1 65.94 0.42 1.651 0.698 2300 1851

T 32 39.6 73.00 0.61 1.651 1.010 2300 2427

T 45 54.7 114.50 0.93 6.157 5.756 2300 2367


Appendix-2

SWG Dia with

enamel mm

Area of bare

conductor

mm2

R/Km

@20oC

ohms

Weight

Kg/km

45 0.086 0.003973 4340 0.0369

44 0.097 0.005189 3323 0.0481

43 0.109 0.006567 2626 0.0610

42 0.119 0.008107 2127 0.0750

41 0.132 0.009810 1758 0.0908

40 0.142 0.011675 1477 0.1079

39 0.152 0.013700 1258 0.1262

38 0.175 0.018240 945.2 0.1679

37 0.198 0.023430 735.9 0.2202

36 0.218 0.029270 589.1 0.2686

35 0.241 0.35750 482.2 0.3281

34 0.264 0.04289 402.0 0.3932

33 0.287 0.05067 340.3 0.4650

32 0.307 0.05910 291.7 0.5408

31 0.330 0.06818 252.9 0.6245

30 0.351 0.07791 221.3 0.7121

29 0.384 0.09372 184.0 0.8559

28 0.417 0.11100 155.3 1.0140

27 0.462 0.13630 126.5 1.2450

26 0.505 0.16420 105.0 1.4990

25 0.561 0.20270 85.1 1.8510

24 0.612 0.24520 70.3 2.2330

23 0.665 0.29190 59.1 2.6550

22 0.770 0.39730 43.4 3.6070

21 0.874 0.51890 33.2 4.7020

20 0.978 0.65670 23.3 59390

19 1.082 0.81070 21.3 7.3240

18 1.293 1.16700 14.8 10.5370

17 1.501 1.58900 10.8 14.3130

16 1.709 2.07500 8.3 18.6780

15 1.920 2.62700 6.6 23.6400

14 2.129 3.24300 5.3 29.1500

13 2.441 4.28900 4.0 38.5600

12 2.756 5.48000 3.1 49.2200

11 3.068 6.81800 2.5 61.0000

10 3.383 8.30200 2.1 74.0000

9 3.800 10.5100 1.6 94.0000

8 4.219 12.9700 1.3 116.0000

©2002 Fairchild Semiconductor Corporation IRF840 Rev. B

IRF840

8A, 500V, 0.850 Ohm, N-Channel Power MOSFET

This N-Channel enhancement mode silicon gate power field effect transistor is an advanced power MOSFET designed, tested, and guaranteed to withstand a specified level of energy in the breakdown avalanche mode of operation. All of these power MOSFETs are designed for applications such as switching regulators, switching converters, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. These types can be operated directly from integrated circuits.

Formerly developmental type TA17425.

Features

• 8A, 500V

• r

DS(ON)

= 0.850

Ω

• Single Pulse Avalanche Energy Rated

• SOA is Power Dissipation Limited

• Nanosecond Switching Speeds

• Linear Transfer Characteristics

• High Input Impedance

• Related Literature- TB334 “Guidelines for Soldering Surface Mount

Components to PC Boards”

Symbol

Packaging

JEDEC TO-220AB

TOP VIEW

Ordering Information

PART NUMBER PACKAGE BRAND

IRF840 TO-220AB IRF840

NOTE: When ordering, include the entire part number. G

D

S

SOURCEDRAIN

GATE

DRAIN(FLANGE)

Data Sheet January 2002

IRF840 Rev. B

Absolute Maximum Ratings

T

C

= 25

o

C, Unless Otherwise Specified

IRF840 UNITS

Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V

DS

500 VDrain to Gate Voltage (R

GS

= 20k

Ω)

(Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

DGR

500 VContinuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

D

8.0 AT

C

= 100

o

C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

D

5.1 APulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

DM

32 AGate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V

GS

±

20 VMaximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .P

D

125 WLinear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.0 W/

o

CSingle Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .E

AS

510 mJOperating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T

J

, T

STG

-55 to 150

o

CMaximum Temperature for Soldering

Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T

L

Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T

pkg

300260

o

C

o

C

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of thedevice at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:

1. T

J

= 25

o

C to 125

o

C.

Electrical Specifications

T

C

= 25

o

C, Unless Otherwise Specified

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Drain to Source Breakdown Voltage BV

DSS

V

GS

= 0V, I

D

= 250

µ

A (Figure 10) 500 - - V

Gate to Threshold Voltage V

GS(TH)

V

GS

= V

DS

, I

D

= 250

µ

A 2.0 - 4.0 V

Zero-Gate Voltage Drain Current I

DSS

V

DS

= Rated BV

DSS

, V

GS

= 0V - - 25

µ

A

V

DS

= 0.8 x Rated BV

DSS

, V

GS

= 0V, T

J

= 125

o

C - - 250

µ

A

On-State Drain Current (Note 2) I

D(ON)

V

DS

> I

D(ON) x

r

DS(ON)MAX

, V

GS

= 10V 8.0 - - A

Gate to Source Leakage Current I

GSS

V

GS

=

±

20V - -

±

100 nA

Drain to Source On Resistance (Note 2) r

DS(ON)

V

GS

= 10V, I

D

= 4.4A (Figures 8, 9) - 0.8 0.85

Ω

Forward Transconductance (Note 2) g

fs

V

DS

≥

50V, I

D

= 4.4A (Figure 12) 4.9 7.4 - S

Turn-On Delay Time t

D(ON)

V

DD

=

250V, I

D

≈

8A, R

G

= 9.1

Ω

, R

L

= 30

Ω

MOSFET Switching Times are Essentially Independent of Operating Temperature.

- 15 21 ns

Rise Time t

r

- 21 35 ns

Turn-Off Delay Time t

D(OFF)

- 50 74 ns

Fall Time t

f

- 20 30 ns

Total Gate Charge (Gate to Source + Gate to Drain)

Q

g(TOT)

V

GS

= 10V, I

D

= 8A, V

DS

= 0.8 x Rated BV

DSS

I

g(REF)

= 1.5mA (Figure 14) Gate Charge is Essentially Independent of Operating Temperature

- 42 63 nC

Gate to Source Charge Q

gs

- 7.0 - nC

Gate to Drain “Miller” Charge Q

gd

- 22 - nC

Input Capacitance C

ISS

V

GS

= 0V, V

DS

= 25V, f = 1.0MHz (Figure 11) - 1225 - pF

Output Capacitance C

OSS

- 200 - pF

Reverse-Transfer Capacitance C

RSS

- 85 - pF

Internal Drain Inductance L

D

Measured from the Contact Screw on Tab to Center of Die

Modified MOSFET Symbol Showing the Internal Devices Inductances

- 3.5 - nH

Measured from the Drain Lead, 6mm (0.25in) from Package to Center of Die

- 4.5 - nH

Internal Source Inductance L

S

Measured from the Source Lead, 6mm (0.25in) from Header to Source Bonding Pad

- 7.5 - nH

Thermal Resistance Junction to Case R

θ

JC

- - 1.0

o

C/W

Thermal Resistance Junction to Ambient R

θ

JA

Free Air Operation - - 62.5

o

C/W

LS

LD

G

D

S

IRF840


Source to Drain Diode Specifications

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Continuous Source to Drain Current I

SD

Modified MOSFET Symbol Showing the Integral Reverse P-N Junction Diode

- - 8.0 A

Pulse Source to Drain Current (Note 3) I

SDM

- - 32 A

Source to Drain Diode Voltage (Note 2) V

SD

T

J

= 25

o

C, I

SD

= 8.0A, V

GS

= 100A/

µ

s (Figure 13) - - 2.0 V

Reverse Recovery Time t

rr

T

J

= 25

o

C, I

SD

= 8.0A, dI

SD

/dt = 100A/

µ

s 210 475 970 ns

Reverse Recovered Charge Q

RR

T

J

= 25

o

C, I

SD

= 8.0A, dI

SD

/dt = 100A/

µ

s 2.0 4.6 8.2

µ

C

NOTES:

2. Pulse Test: Pulse width

≤

300

µ

s, duty cycle

≤

2%.

3. Repetitive Rating: Pulse width limited by Max junction temperature. See Transient Thermal Impedance curve (Figure 3).

4. V

DD

= 50V, starting T

J

= 25

o

C, L = 14mH, R

G = 25Ω, peak IAS = 8A.

Typical Performance Curves Unless Otherwise Specified

FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE

FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE

FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE

G

D

S

0 50 100 1500

TC, CASE TEMPERATURE (oC)

PO

WE

R D

ISS

IPA

TIO

N M

ULT

IPL

IER

0.2

0.4

0.6

0.8

1.0

1.2

TC, CASE TEMPERATURE (oC)

50 75 10025 150

10

8

6

0

4

I D, D

RA

IN C

UR

RE

NT

(A

)

2

125

ZθJ

C, N

OR

MA

LIZ

ED

TR

AN

SIE

NT

1

10-210-5 10-4 10-3 0.1 1 10t1, RECTANGULAR PULSE DURATION (s)

10-3

0.1

10-2

DUTY FACTOR: D = t1/t2NOTES:

PEAK TJ = PDM x ZθJC x RθJC + TC

t2

PDM

t1t2

SINGLE PULSE

0.020.01

0.1

0.2

0.5

0.05

TH

ER

MA

L IM

PE

DA

NC

E

IRF840

IRF840 Rev. B

FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. OUTPUT CHARACTERISTICS

FIGURE 6. SATURATION CHARACTERISTICS FIGURE 7. TRANSFER CHARACTERISTICS

FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs VOLTAGE AND DRAIN CURRENT

FIGURE 9. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE

Typical Performance Curves Unless Otherwise Specified (Continued)

10

1 10 1020.1

I D,

DR

AIN

CU

RR

EN

T (

A)

VDS, DRAIN TO SOURCE VOLTAGE (V)

103

102

1

1ms

10ms

DC

100µs

10µs

OPERATION IN THISREGION IS LIMITEDBY rDS(ON)

TJ = MAX RATEDSINGLE PULSE

TC = 25oC


50 100 150 2000

15

12

9

0

6

I D, D

RA

IN C

UR

RE

NT

(A

)

PULSE DURATION = 80µs

3

250

VGS = 5.0V

VGS = 6.0V

VGS = 10V

VGS = 4.0VVGS = 4.5V

VGS = 5.5V

DUTY CYCLE = 0.5% MAX

VDS, DRAIN TO SOURCE VOLTAGE (V)3 6 9 120 15

15

12

9

0

6

I D, D

RA

IN C

UR

RE

NT

(A

)

3

VGS = 10V

VGS = 4.0V

VGS = 6.0V

VGS = 5.5V

VGS = 4.5V

VGS = 5.0V

PULSE DURATION = 80µsDUTY CYCLE = 0.5% MAX

I SD

(ON

), D

RA

IN T

O S

OU

RC

E

VSD, GATE TO SOURCE VOLTAGE (V)

100

10

0.1

0 2 4 6 8 10

TJ = 150oC TJ = 25oC

1

0.01

CU

RR

EN

T (

A)

PULSE DURATION = 80µsDUTY CYCLE = 0.5% MAXVDS ≥ 50V

TC, CASE TEMPERATURE (oC)8 16 240 40

10

8

6

0

4

2

32

VGS = 20V

VGS = 10V

r DS

(ON

), D

RA

IN T

O S

OU

RC

EO

N R

ES

ISTA

NC

E (

Ω)


20

3.0

1.8

0.6

100

TJ, JUNCTION TEMPERATURE (oC)

NO

RM

AL

IZE

D D

RA

IN T

O S

OU

RC

E

2.4

1.2

0140

ON

RE

SIS

TAN

CE

VO

LTA

GE

-40 60 16012080400-60 -20

PULSE DURATION = 80µsDUTY CYCLE = 0.5% MAXID = 4.4A, VGS = 10V

IRF840


FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE

FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE

FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE

FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE

Typical Performance Curves Unless Otherwise Specified (Continued)

20

1.25

1.05

0.85

100

TJ, JUNCTION TEMPERATURE (oC)

1.15

0.95

0.75140-40 60 16012080400-60 -20

ID = 250µA

NO

RM

AL

IZE

D D

RA

IN T

O S

OU

RC

EB

RE

AK

DO

WN

VO

LTA

GE

1

C, C

APA

CIT

AN

CE

(p

F)


3000

2400

1800

1200

600

02 5 10210

CISS

52

VGS = 0V, f = 1MHzCISS = CGS + CGDCRSS = CGDCOSS ≈ CDS + CGD

COSS

CRSS

ID, DRAIN CURRENT (A)3 6 9 120 15

15

12

9

0

6

gfs

, TR

AN

SC

ON

DU

CTA

NC

E (

S)

3

TJ = 25oC

TJ = 150oC

PULSE DURATION = 80µsDUTY CYCLE = 0.5% MAXVDS ≥ 50V

I SD

, SO

UR

CE

TO

DR

AIN

CU

RR

EN

T (

A)

VSD, SOURCE TO DRAIN VOLTAGE (V)

10

0 0.3 0.6 0.9 1.5

1.0

TJ = 150oC

1.20.1

100

TJ = 25oC


Qg, GATE CHARGE (nC)

12 24 36 480 60

20

8

VG

S, G

AT

E T

O S

OU

RC

E V

OLT

AG

E (

V)

16

12

0

ID = 8A

4

VDS = 250V

VDS = 100V

VDS = 400V

IRF840

IRF840 Rev. B

Test Circuits and Waveforms

FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS

FIGURE 17. SWITCHING TIME TEST CIRCUIT FIGURE 18. RESISTIVE SWITCHING WAVEFORMS

FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 20. GATE CHARGE WAVEFORMS

tP

VGS

0.01Ω

L

IAS

+

-

VDS

VDDRG

DUT

VARY tP TO OBTAIN

REQUIRED PEAK IAS

0V

VDD

VDS

BVDSS

tP

IAS

tAV

0

VGS

RL

RG

DUT

+

-VDD

tON

td(ON)

tr

90%

10%

VDS90%

10%

tf

td(OFF)

tOFF

90%

50%50%

10%PULSE WIDTH

VGS

0

0

0.3µF

12VBATTERY 50kΩ

VDS

S

DUT

D

G

Ig(REF)0

(ISOLATEDVDS

0.2µF

CURRENTREGULATOR

ID CURRENTSAMPLING

IG CURRENTSAMPLING

SUPPLY)

RESISTOR RESISTOR

SAME TYPEAS DUT

Qg(TOT)

Qgd

Qgs

VDS

0

VGS

VDD

Ig(REF)

0

IRF840

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHERNOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILDDOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCTOR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENTRIGHTS, NOR THE RIGHTS OF OTHERS.

TRADEMARKS

The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and isnot intended to be an exhaustive list of all such trademarks.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORTDEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.As used herein:1. Life support devices or systems are devices orsystems which, (a) are intended for surgical implant intothe body, or (b) support or sustain life, or (c) whosefailure to perform when properly used in accordancewith instructions for use provided in the labeling, can bereasonably expected to result in significant injury to theuser.

2. A critical component is any component of a lifesupport device or system whose failure to perform canbe reasonably expected to cause the failure of the lifesupport device or system, or to affect its safety oreffectiveness.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information

Preliminary

No Identification Needed

Obsolete

This datasheet contains the design specifications forproduct development. Specifications may change inany manner without notice.

This datasheet contains preliminary data, andsupplementary data will be published at a later date.Fairchild Semiconductor reserves the right to makechanges at any time without notice in order to improvedesign.

This datasheet contains final specifications. FairchildSemiconductor reserves the right to make changes atany time without notice in order to improve design.

This datasheet contains specifications on a productthat has been discontinued by Fairchild semiconductor.The datasheet is printed for reference information only.

Formative orIn Design

First Production

Full Production

Not In Production

OPTOLOGIC™OPTOPLANAR™PACMAN™POP™Power247™PowerTrenchQFET™QS™QT Optoelectronics™Quiet Series™SILENT SWITCHER

FASTFASTr™FRFET™GlobalOptoisolator™GTO™HiSeC™ISOPLANAR™LittleFET™MicroFET™MicroPak™MICROWIRE™

Rev. H4

ACEx™Bottomless™CoolFET™CROSSVOLT™DenseTrench™DOME™EcoSPARK™E2CMOSTM

EnSignaTM

FACT™FACT Quiet Series™

SMART START™STAR*POWER™Stealth™SuperSOT™-3SuperSOT™-6SuperSOT™-8SyncFET™TinyLogic™TruTranslation™UHC™UltraFET

STAR*POWER is used under license

VCX™

This datasheet has been download from:

www.datasheetcatalog.com

Datasheets for electronics components.

BYQ28E, BYQ28EF, BYQ28EB, UG10DCT, UGF10DCT, UGB10DCT SeriesVishay Semiconductorsformerly General Semiconductor

Document Number 88549 www.vishay.com25-Jun-03 1

Dual Ultrafast Soft Recovery RectifierReverse Voltage 100 to 200V Forward Current 10A

Reverse Recovery Time 20ns

0.08(2.032)

0.24(6.096)

0.42(10.66)

0.63(17.02)

0.12(3.05)

0.33(8.38)

Mounting Pad Layout TO-263AB 0.380 (9.65)

0.411 (10.45)

0.320 (8.13)

0.360 (9.14)

0.591 (15.00)

0.624 (15.85)

1 2

0.245 (6.22) MIN

K

K

0.160 (4.06)

0.190 (4.83)

0.045 (1.14)

0.055 (1.40)

0.014 (0.36)

0.021 (0.53)

0.110 (2.79)

0.140 (3.56)

0.090 (2.29)

0.110 (2.79)

0.047 (1.19)

0.055 (1.40)

PIN 1

PIN 2 K - HEATSINK

0-0.01 (0-0.254)

0.027 (0.686)

0.037 (0.940)

0.105 (2.67)

0.095 (2.41)0.205 (5.20)

0.195 (4.95)

1 3

PIN

2

0.060 (1.52)

0.405 (10.27)0.383 (9.72)

0.191 (4.85)0.171 (4.35)

0.600 (15.5)0.580 (14.5)

0.560 (14.22)0.530 (13.46)

0.037 (0.94)0.027 (0.69)

0.140 (3.56)0.130 (3.30)

0.350 (8.89)0.330 (8.38)

0.188 (4.77)0.172 (4.36)

0.110 (2.80)0.100 (2.54)

0.131 (3.39)0.122 (3.08)

0.110 (2.80)0.100 (2.54)

0.022 (0.55)0.014 (0.36)

DIA.DIA.

0.676 (17.2)0.646 (16.4)

0.205 (5.20)0.195 (4.95)

0.105 (2.67)0.095 (2.41)

PIN 2PIN 1

PIN 3

ITO-220AB (BYQ28EF, UGF10 Series)

TO-220AB (BYQ28E, UG10 Series)

Dimensions in inchesand (millimeters)

TO-263AB (BYQ28EB, UGB10 Series)

1 2 3PIN

0.185 (4.70)

0.175 (4.44)

0.055 (1.39)0.045 (1.14)

0.145 (3.68)0.135 (3.43)

0.350 (8.89)0.330 (8.38)

0.560 (14.22)0.530 (13.46)

0.022 (0.56)0.014 (0.36)

0.110 (2.79)0.100 (2.54)

0.603 (15.32)0.573 (14.55)

CASE

1.148 (29.16)1.118 (28.40)

PIN 2

0.154 (3.91)

0.148 (3.74)

0.113 (2.87)0.103 (2.62)

0.160 (4.06)

0.140 (3.56)

0.410 (10.41)0.390 (9.91)

0.635 (16.13)

0.625 (15.87)

0.415 (10.54) MAX.

0.370 (9.40)0.360 (9.14)

PIN 1

PIN 3

0.028 (0.70)0.104 (2.65)0.096 (2.45)

0.035 (0.90)

0.205 (5.20)0.195 (4.95)

0.105 (2.67)

0.095 (2.41)

Features• Plastic package has Underwriters Laboratories

Flammability Classification 94V-0• High reverse energy capability• Excellent high temperature switching• High temperature soldering guaranteed: 250°C/10

seconds at terminals• Glass passivated chip junction• Soft recovery characteristics

Mechanical DataCase: JEDEC TO-220AB, ITO-220AB & TO-263AB molded plastic body

Terminals: Plated leads, solderable per MIL-STD-750, Method 2026

Polarity: As marked Mounting Position: Any

Mounting Torque: 10 in-lbs maximum

Weight: 0.08 oz., 2.24 g

BYQ28E, BYQ28EF, BYQ28EB, UG10DCT, UGF10DCT, UGB10DCT SeriesVishay Semiconductorsformerly General Semiconductor

www.vishay.com Document Number 885492 25-Jun-03

Maximum Ratings (TC = 25°C unless otherwise noted) UG10BCT UG10CCT UG10DCT

Parameter Symbol BYQ28E-100 BYQ28E-150 BYQ28E-200 Unit

Maximum repetitive peak reverse voltage VRRM 100 150 200 V

Working peak reverse voltage VRWM 100 150 200 V

Maximum DC blocking voltage VDC 100 150 200 V

Maximum average forward rectified current Total device 10at TC = 100°C Per leg IF(AV) 5 A

Peak forward surge current8.3ms single half sine-wave superimposed IFSM 55 Aon rated load (JEDEC Method) per leg

Repetitive peak reverse current per leg at tp = 100µs IRRM 0.2 A

Electrostatic discharge capacitor voltage,Human body model: C = 250pF, R = 1.5kΩ VC 8 KV

Operating junction and storage temperature range TJ, TSTG –40 to +150 °C

Non-repetitive peak reverse current per leg IRSM 0.2 Aat tp= 100µs

RMS Isolation voltage (BYQ28EF, UGF types) 4500 (NOTE 1)

from terminals to heatsink with t = 1 second, RH ≤ 30% VISOL 3500 (NOTE 2) V1500 (NOTE 3)

Electrical Characteristics (TC = 25°C unless otherwise noted)

Parameter Symbol Value Unit

Maximum instantaneous forward voltage per leg (Note 4)

at IF = 10A, TJ = 25°C 1.25at IF = 5A, TJ = 25°C VF 1.10 Vat IF = 5A, TJ = 150°C 0.895

Maximum reverse current per leg TJ = 25°C 10at working peak reverse voltage (Note 4) TJ = 100°C IR 200 µA

Maximum reverse recovery time per leg at IF = 1.0A, di/dt = 100A/µs, VR = 30V, Irr = 0.1IRM

trr 25 ns

Maximum reverse recovery time per leg at IF = 0.5A, IR = 1.0A, Irr = 0.25A trr 20 ns

Maximum stored charge per legIF = 2A, di/dt = 20A/µs, VR = 30V, Irr = 0.1IRM

Qrr 9 nC

Thermal Characteristics (TC = 25°C unless otherwise noted) UG10 UGF10 UGB10

Parameter Symbol BYQ28E BYQ28EF BYQ28EB Unit

Typical thermal resistance — junction to ambient RΘJA 50 55 50 °C/Wper leg — junction to case RΘJC 4.5 6.7 4.5 °C/W

Notes:(1) Clip mounting (on case), where lead does not overlap heatsink with 0.110” offset(2) Clip mounting (on case), where leads do overlap heatsink(3) Screw mounting with 4-40 screw, where washer diameter is ≤ 4.9 mm (0.19”)(4) Pulse test: 300µs pulse width, 1% duty cycle

BYQ28E(F,B,D) Series, UG10(F,B,D)10BCT thru UG10(F,B,D)DCTVishay Semiconductorsformerly General Semiconductor

Document Number 88549 www.vishay.com25-Jun-03 3

Ratings and Characteristic Curves (TA = 25°C unless otherwise noted)

I F –

Inst

anta

neou

s F

orw

ard

Cur

rent

(A

) 100

10

I R –

Inst

anta

neou

s R

ever

se C

urre

nt (

µA)

Typical Reverse Characteristics Per Leg

1.0

0.1

0.01

Forward Current Derating Curve

0

5

15

0 50 100 150

10

Ave

rage

For

war

d C

urre

nt (

A)

Pea

k F

orw

ard

Sur

ge C

urre

nt (

A)

Number of Cycles at 60 HZ

Maximum Non-Repetitive Peak Forward Surge Current Per Leg

1

10

100

1 10 100

Case Temperature (°C)

1.0

10

100

1000

0.1

TJ = 125°C

100°C

25°C

Resistive or Inductive Load

TJ = 25°C

TJ = 125°C

1 10 100

10

100

10.1

Reverse Voltage (V)

TJ = 125°Cf = 1.0 MHZ

Vsig = 50mVp-p

0.2 0.4 0.8 1.40.6 1.0 1.2

Pulse Width = 300µs1% Duty Cycle

TC = 105°C8.3ms Single Half Sine-Wave(JEDEC Method)

TJ = 100°C

Reverse Switching Characteristics Per Leg

0

50

25 50 75 100 125

10

20

30

Sto

red

Cha

rge/

Rev

erse

Rec

over

y T

ime

(nC

/ns)

40

@5A, 50A/µs

@2A, 20A/µs

@2A, 20A/µs

@1A, 100A/µs

@5A, 50A/µs

20 10040 60 80

Percent of Rated Peak Reverse Voltage (%)

Typical Junction Capacitance Per Leg

pF –

Jun

ctio

n C

apac

itanc

eTypical Instantaneous

Forward Characteristics Per Leg

Instantaneous Forward Voltage (V)

Junction Temperature (°C)

@1A, 100A/µs

trrQrr

SLVS077D – APRIL 1977 – REVISED FEBRUARY 2003

1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Complete Pulse-Width Modulation (PWM)Power-Control Circuitry

Uncommitted Outputs for Single-Ended orPush-Pull Applications

Low Standby Current . . . 8 mA Typ

Interchangeable With Industry StandardSG2524 and SG3524

description/ordering information

The SG2524 and SG3524 incorporate all thefunctions required in the construction of aregulating power supply, inverter, or switchingregulator on a single chip. They also can be usedas the control element for high-power-outputapplications. The SG2524 and SG3524 weredesigned for switching regulators of either polarity, transformer-coupled dc-to-dc converters, transformerlessvoltage doublers, and polarity-converter applications employing fixed-frequency, pulse-width modulation(PWM) techniques. The complementary output allows either single-ended or push-pull application. Each deviceincludes an on-chip regulator, error amplifier, programmable oscillator, pulse-steering flip-flop, two uncommittedpass transistors, a high-gain comparator, and current-limiting and shutdown circuitry.

ORDERING INFORMATION

TINPUT

REGULATION PACKAGE† ORDERABLE TOP-SIDETA REGULATION

MAX (mV)PACKAGE† ORDERABLE

PART NUMBERTOP-SIDEMARKING

PDIP (N) Tube of 25 SG3524N SG3524N

0°C to 70°C 30 SOIC (D)Tube of 40 SG3524D

SG35240°C to 70°C 30 SOIC (D)Reel of 2500 SG3524DR

SG3524

SOP (NS) Reel of 2000 SG3524NSR SG3524

PDIP (N) Tube of 25 SG2524N SG2524N

–25°C to 85°C 20SOIC (D)

Tube of 40 SG2524DSG2524SOIC (D)

Reel of 2500 SG2524DRSG2524

† Package drawings, standard packing quantities, thermal data, symboliztion, and PCB design guidelines areavailable at www.ti.com/sc/package.

Copyright 2003, Texas Instruments Incorporated ! "#$ ! %#&'" ( $)(#" ! " !%$"" ! %$ *$ $! $+! ! #$ !! (( , -) (#" %"$!!. ($! $"$!!'- "'#($ $! . '' %$ $!)

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications ofTexas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

IN–IN+

OSC OUTCURR LIM+CURR LIM–

RTCT

GND

REF OUTVCCEMIT 2COL 2COL 1EMIT 1SHUTDOWNCOMP

SG2524 . . . D OR N PACKAGESG3524 . . . D, N, OR NS PACKAGE

(TOP VIEW)


2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

functional block diagram

T COL 2

OSC OUTEMIT 2

EMIT 1

COL 1

Vref

ReferenceRegulator

Comparator

Oscillator

SHUTDOWN

Error Amplifier

1

2

9

4

5CURR LIM–

CURR LIM+

GND8

10

+

–

+

–

NOTE A: Resistor values shown are nominal.

12

1113

143

IN–

IN+

COMP

1 kΩ10 kΩ

15

RT

CT

REF OUT16

6

7

Vref

Vref

Vref

Vref

VCC

Vref

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†

Supply voltage, VCC (see Notes 1 and 2) 40 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Collector output current, ICC 100 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Reference output current, IO(ref) 50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Current through CT terminal –5 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating virtual junction temperature, TJ 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Package thermal impedance, θJA (see Notes 3 and 4): D package 73°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . .

N package 67°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . NS package 64°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . .

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Storage temperature range, Tstg –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, andfunctional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is notimplied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. All voltage values are with respect to network ground terminal.2. The reference regulator may be bypassed for operation from a fixed 5-V supply by connecting the VCC and reference output

(REF OUT) pin both to the supply voltage. In this configuration, the maximum supply voltage is 6 V.3. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable ambient

temperature is PD = (TJ(max) – TA)/θJA. Operation at the absolute maximum TJ of 150°C can impact reliability.4. The package thermal impedance is calculated in accordance with JESD 51-7.



recommended operating conditionsMIN MAX UNIT

VCC Supply voltage 8 40 V

Reference output current 0 50 mA

Current through CT terminal –0.03 –2 mA

RT Timing resistor 1.8 100 kΩ

CT Timing capacitor 0.001 0.1 µF

TA Operating free air temperatureSG2524 –25 85

°CTA Operating free-air temperatureSG3524 0 70

°C

electrical characteristics over recommended operating free-air temperature range, VCC = 20 V,f = 20 kHz (unless otherwise noted)

reference section

PARAMETER TEST CONDITIONS†SG2524 SG3524

UNITPARAMETER TEST CONDITIONS†MIN TYP‡ MAX MIN TYP‡ MAX

UNIT

Output voltage 4.8 5 5.2 4.6 5 5.4 V

Input regulation VCC = 8 V to 40 V 10 20 10 30 mV

Ripple rejection f = 120 Hz 66 66 dB

Output regulation IO = 0 mA to 20 mA 20 50 20 50 mV

Output voltage change with temperature TA = MIN to MAX 0.3% 1% 0.3% 1%

Short-circuit output current§ Vref = 0 100 100 mA

† For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.‡ All typical values, except for temperature coefficients, are at TA = 25°C§ Standard deviation is a measure of the statistical distribution about the mean, as derived from the formula:

N

n1

(xn X)2

N 1

oscillator section

PARAMETER TEST CONDITIONS† MIN TYP‡ MAX UNIT

fosc Oscillator frequency CT = 0.001 µF, RT = 2 kΩ 450 kHz

Standard deviation of frequency§ All values of voltage, temperature, resistance,and capacitance constant

5%

∆fFrequency change with voltage VCC = 8 V to 40 V, TA = 25°C 1%

∆fosc Frequency change with temperature TA = MIN to MAX 2%

Output amplitude at OSC OUT TA = 25°C 3.5 V

tw Output pulse duration (width) at OSC OUT CT = 0.01 µF, TA = 25°C 0.5 µs

† For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.‡ All typical values, except for temperature coefficients, are at TA = 25°C§ Standard deviation is a measure of the statistical distribution about the mean, as derived from the formula:

N

n1

(xn X)2

N 1



error amplifier section

PARAMETERTEST SG2524 SG3524

UNITPARAMETERTEST

CONDITIONS† MIN TYP‡ MAX MIN TYP‡ MAXUNIT

VIO Input offset voltage VIC = 2.5 V 0.5 5 2 10 mV

IIB Input bias current VIC = 2.5 V 2 10 2 10 µA

Open-loop voltage amplification 72 80 60 80 dB

VICR Common-mode input voltage range TA = 25°C1.8 to

3.41.8 to

3.4V

CMMR Common-mode rejection ratio 70 70 dB

B1 Unity-gain bandwidth 3 3 MHz

Output swing TA = 25°C 0.5 3.8 0.5 3.8 V

† For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.‡ All typical values, except for temperature coefficients, are at TA = 25°C

output sectionPARAMETER TEST CONDITIONS† MIN TYP‡ MAX UNIT

V(BR)CE Collector-emitter breakdown voltage 40 V

Collector off-state current VCE = 40 V 0.01 50 µA

Vsat Collector-emitter saturation voltage IC = 50 mA 1 2 V

VO Emitter output voltage VC = 20 V, IE = –250 µA 17 18 V

tr Turn-off voltage rise time RC = 2 kΩ 0.2 µs

tf Turn-on voltage fall time RC = 2 kΩ 0.1 µs

† For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.‡ All typical values, except for temperature coefficients, are at TA = 25°C.

comparator sectionPARAMETER TEST CONDITIONS† MIN TYP‡ MAX UNIT

Maximum duty cycle, each output 45%

V Inp t threshold oltage at COMPZero duty cycle 1

VVIT Input threshold voltage at COMPMaximum duty cycle 3.5

V

IIB Input bias current –1 µA

† For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.‡ All typical values, except for temperature coefficients, are at TA = 25°C.

current limiting sectionPARAMETER TEST CONDITIONS† MIN TYP‡ MAX UNIT

VI Input voltage range (either input) –1 to1 V

V(SENSE) Sense voltage at TA = 25°CV(IN ) V(IN ) ≥ 50 mV V(COMP) 2 V

175 200 225 mV

Temperature coefficient of sense voltageV(IN+) – V(IN–) ≥ 50 mV, V(COMP) = 2 V

0.2 mV/°C‡ All typical values, except for temperature coefficients, are at TA = 25°C.

total devicePARAMETER TEST CONDITIONS MIN TYP‡ MAX UNIT

Ist Standby currentVCC = 40 V, IN–, CURR LIM+, CT, GND, COMP, EMIT 1, EMIT 2 grounded,IN+ at 2 V, All other inputs and outputs open

8 10 mA

‡ All typical values, except for temperature coefficients, are at TA = 25°C.



PARAMETER MEASUREMENT INFORMATION

0.1 µF

2 kΩ

10 kΩ

RT

1 W2 kΩ

8

4

2

1

9

6

7

10

11

14

16

3

12

13

(Open)

Outputs

VCC = 8 V to 40 V

15

SHUTDOWN

CT

RT

COMP

IN–

IN+

CURR LIM+ COL 2

COL 1

OSC OUT

REF OUT

EMIT 2

EMIT 1

GND

SG2524 or SG3524

VCC

CT

2 kΩ

1 W2 kΩ

2 kΩ10 kΩ

1 kΩ

5CURR LIM–

VREF

VREF

Figure 1. General Test Circuit

≈0 V

≈VCC

VOLTAGE WAVEFORMS

90%

10%10%

90%

trtf

TEST CIRCUIT

Circuit Under Test

Output

2 kΩ

VCC

Output

Figure 2. Switching Times



TYPICAL CHARACTERISTICS

Frequency – Hz

–10

0

10

20

30

40

50

60

70

80

90

Op

en-L

oo

p V

olt

age

Am

plif

icat

ion

of

Err

or

Am

plif

ier

– d

B

10 M1 M100 k10 k1 k100

RL is resistance from COMP to ground

ÏÏÏÏÏÏÏÏÏÏ

RL = 300 kΩ

ÏÏÏÏRL = 1 MΩ

ÏÏÏÏÏÏÏÏÏÏ

RL = 100 kΩ

ÏÏÏÏÏÏÏÏ

RL = 30 kΩ

OPEN-LOOP VOLTAGE AMPLIFICATIONOF ERROR AMPLIFIER

vsFREQUENCY

VCC = 20 VTA = 25°C

RL = ∞

Figure 3

1

– O

scill

ato

r F

req

uen

cy –

Hz

RT – Timing Resistance – kΩ

20 40 1007010742

OSCILLATOR FREQUENCYvs

TIMING RESISTANCE

VCC = 20 VTA = 25°C

1M

400 k

100 k

40 k

10 k

4 k

1 k

400

100

CT = 0.1 µF

CT = 0.01 µF

CT = 0.03 µF

CT = 0.003 µF

CT = 0

f osc

CT = 0.001 µF

Figure 4

OUTPUT DEAD TIMEvs

TIMING CAPACITANCE

1

10

4

0.001 0.01

Ou

tpu

t D

ead

Tim

e –

0.004 0.10.040.1

0.4

µs

CT – Timing Capacitance – µF

Figure 5



PRINCIPLES OF OPERATION†

The SG2524 is a fixed-frequency pulse-width-modulation (PWM) voltage-regulator control circuit. The regulatoroperates at a fixed frequency that is programmed by one timing resistor, RT, and one timing capacitor, CT. RTestablishes a constant charging current for CT. This results in a linear voltage ramp at CT, which is fed to thecomparator, providing linear control of the output pulse duration (width) by the error amplifier. The SG2524 containsan onboard 5-V regulator that serves as a reference, as well as supplying the SG2524 internal regulator controlcircuitry. The internal reference voltage is divided externally by a resistor ladder network to provide a reference withinthe common-mode range of the error amplifier as shown in Figure 6, or an external reference can be used. The outputis sensed by a second resistor divider network and the error signal is amplified. This voltage is then compared to thelinear voltage ramp at CT. The resulting modulated pulse out of the high-gain comparator then is steered to theappropriate output pass transistor (Q1 or Q2) by the pulse-steering flip-flop, which is synchronously toggled by theoscillator output. The oscillator output pulse also serves as a blanking pulse to ensure both outputs are never onsimultaneously during the transition times. The duration of the blanking pulse is controlled by the value of CT. Theoutputs may be applied in a push-pull configuration in which their frequency is one-half that of the base oscillator, orparalleled for single-ended applications in which the frequency is equal to that of the oscillator. The output of the erroramplifier shares a common input to the comparator with the current-limiting and shut-down circuitry and can beoverridden by signals from either of these inputs. This common point is pinned out externally via the COMP pin, whichcan be employed to either control the gain of the error amplifier or to compensate it. In addition, the COMP pin canbe used to provide additional control to the regulator.

APPLICATION INFORMATION†

oscillator

The oscillator controls the frequency of the SG2524 and is programmed by RT and CT as shown in Figure 4.

f 1.30RT CT

where: RT is in kΩCT is in µFf is in kHz

Practical values of CT fall between 0.001 µF and 0.1 µF. Practical values of RT fall between 1.8 kΩ and 100 kΩ.This results in a frequency range typically from 130 Hz to 722 kHz.

blanking

The output pulse of the oscillator is used as a blanking pulse at the output. This pulse duration is controlled bythe value of CT as shown in Figure 5. If small values of CT are required, the oscillator output pulse duration canbe maintained by applying a shunt capacitance from OSC OUT to ground.

synchronous operation

When an external clock is desired, a clock pulse of approximately 3 V can be applied directly to the oscillatoroutput terminal. The impedance to ground at this point is approximately 2 kΩ. In this configuration, RTCT mustbe selected for a clock period slightly greater than that of the external clock.

† Throughout these discussions, references to the SG2524 apply also to the SG3524.




synchronous operation (continued)

If two or more SG2524 regulators are operated synchronously, all oscillator output terminals must be tiedtogether. The oscillator programmed for the minimum clock period is the master from which all the otherSG2524s operate. In this application, the CTRT values of the slaved regulators must be set for a periodapproximately 10% longer than that of the master regulator. In addition, CT (master) = 2 CT (slave) to ensurethat the master output pulse, which occurs first, has a longer pulse duration and, subsequently, resets the slaveregulators.

voltage reference

The 5-V internal reference can be employed by use of an external resistor divider network to establish areference common-mode voltage range (1.8 V to 3.4 V) within the error amplifiers (see Figure 6), or an externalreference can be applied directly to the error amplifier. For operation from a fixed 5-V supply, the internalreference can be bypassed by applying the input voltage to both the VCC and VREF terminals. In thisconfiguration, however, the input voltage is limited to a maximum of 6 V.

To NegativeOutput Voltage

REF OUT

5 kΩR1

To PositiveOutput Voltage

R25 kΩ

REF OUT

+

–

+

–

5 kΩ

5 kΩ

R2

R1

VO 2.5 V R1 R2R1

VO 2.5 V 1 R2R1

2.5 V 2.5 V

Figure 6. Error-Amplifier Bias Circuits

error amplifier

The error amplifier is a differential-input transconductance amplifier. The output is available for dc gain controlor ac phase compensation. The compensation node (COMP) is a high-impedance node (RL = 5 MΩ). The gainof the amplifier is AV = (0.002 Ω–1)RL and easily can be reduced from a nominal 10,000 by an external shuntresistance from COMP to ground. Refer to Figure 3 for data.

compensation

COMP, as previously discussed, is made available for compensation. Since most output filters introduce oneor more additional poles at frequencies below 200 Hz, which is the pole of the uncompensated amplifier,introduction of a zero to cancel one of the output filter poles is desirable. This can be accomplished best witha series RC circuit from COMP to ground in the range of 50 kΩ and 0.001 µF. Other frequencies can be canceledby use of the formula f ≈ 1/RC.





shutdown circuitry

COMP also can be employed to introduce external control of the SG2524. Any circuit that can sink 200 µA canpull the compensation terminal to ground and, thus, disable the SG2524.

In addition to constant-current limiting, CURR LIM+ and CURR LIM– also can be used in transformer-coupledcircuits to sense primary current and shorten an output pulse should transformer saturation occur. CURR LIM–also can be grounded to convert CURR LIM+ into an additional shutdown terminal.

current limiting

A current-limiting sense amplifier is provided in the SG2524. The current-limiting sense amplifier exhibits athreshold of 200 mV ±25 mV and must be applied in the ground line since the voltage range of the inputs is limitedto 1 V to –1 V. Caution should be taken to ensure the –1-V limit is not exceeded by either input, otherwise,damage to the device may result.

Foldback current limiting can be provided with the network shown in Figure 7. The current-limit schematic isshown in Figure 8.

VO

RsR2

R1EMIT 2

EMIT 1

SG2524

IO(max) 1

Rs200 mV

VO R2

R1 R2

IOS 200 mV

Rs

CURR LIM+

CURR LIM–

11

14

5

4

Figure 7. Foldback Current Limiting for Shorted Output Conditions

Constant-Current Source

CURR LIM+

COMP CT

Comparator

Error Amplifier

CURR LIM–

Figure 8. Current-Limit Schematic





output circuitry

The SG2524 contains two identical npn transistors, the collectors and emitters of which are uncommitted. Eachtransistor has antisaturation circuitry that limits the current through that transistor to a maximum of 100 mA forfast response.

general

There are a wide variety of output configurations possible when considering the application of the SG2524 asa voltage-regulator control circuit. They can be segregated into three basic categories:

Capacitor-diode-coupled voltage multipliers Inductor-capacitor-implemented single-ended circuits Transformer-coupled circuits

Examples of these categories are shown in Figures 9, 10, and 11, respectively. Detailed diagrams of specificapplications are shown in Figures 12–15.

D1

VI

VO

VI < VO

VI

D1

VO

VI > VO

D1

VI

–VO

| +VI | > | – VO |

Figure 9. Capacitor-Diode-Coupled Voltage-Multiplier Output Stages





VIVO

VI > VO

VI

VI < VO

VO

VI–VO

| +VI | < | – VO |

Figure 10. Single-Ended Inductor Circuit

VO

Push-Pull

VO

VI

Flyback

ÏÏVI

Figure 11. Transformer-Coupled Outputs





SG2524

COMP

.

CURR LIM+

EMIT 2

COL 2

COL 1

EMIT 1

GND

OSC OUT

CT

RT

REF OUT

IN+

IN–

0.01 µF

0.1 µF

5 kΩ

5 kΩ

2 kΩ

50 µF

–5 V20 mA

1N916

1N91620 µF

1N91615 kΩ

VCC = 15 V

VCC

CURR LIM–SHUTDOWN

+

1

2

16

6

7

10

3

11

12

13

14

4

5

9

8

15

5 kΩ

+

Figure 12. Capacitor-Diode Output Circuit

VCC = 5 V

0.1 µF1 MΩ

300 Ω

1N916

1N916

20T200 Ω

–15 V

20 mA

15 V

50 µF

50 µF

50T

50T

TIP29A

1 Ω

1N916620 Ω

510 Ω

2N2222

4.7 µF

0.001 µF

0.02 µF

5 kΩ

2 kΩ

100 µF

5 kΩ

5 kΩ

SG2524

VCC

OSC OUT

GNDCOMP

CURR LIM+

EMIT 2

COL 2

COL 1

EMIT 1

CURR LIM–

CT

RT

REF OUT

IN+

IN–

+

+

SHUTDOWN

25 kΩ

+

+

1

2

16

6

7

10

3

11

12

13

14

4

5

9

15

8

InputReturn

Figure 13. Flyback Converter Circuit

†Throughout these discussions, references to the SG2524 apply also to the SG3524.




Input Return0.1 Ω

3 kΩ1N3880

500 µF

1 A5 V

0.9 mHTIP115

SG2524

VCC

OSC OUTGND

VCC = 28 V

0.001 µF

50 kΩ

5 kΩ

3 kΩ

0.1 µF

0.02 µF

5 kΩ

CURR LIM+

EMIT 2

COL 2

COL 1

EMIT 1

SHUTDOWN

CT

RT

REF OUT

IN+

IN–

CURR LIM–

COMP

1

2

16

6

7

10

3

11

12

13

14

4

5

9

15

8

5 kΩ

5 kΩ+

Figure 14. Single-Ended LC Circuit

5 kΩ

0.01 µF

0.1 µF

2 kΩ

5 kΩ

20 kΩ

1500 µF

0.1 Ω

100 µF

+

–5 A5 V

20T

20T

5T

5T

TIR101A

1 mH

TIP31A

100 Ω

100 Ω

TIP31A1W

1 kΩ

VCC = 28 V

GNDOSC OUT

VCC

SG2524

CURR LIM+

EMIT 2

COL 2

COL 1

EMIT 1

SHUTDOWN

CT

RT

REF OUT

IN+

IN–

CURR LIM–

COMP

1

2

16

6

7

10

3

11

12

13

14

4

5

9

15

8

5 kΩ

5 kΩ

0.001 µF

+

+

1W1 kΩ

Figure 15. Push-Pull Transformer-Coupled Circuit

†Throughout these discussions, references to the SG2524 apply also to the SG3524.

PACKAGING INFORMATION

Orderable Device Status (1) PackageType

PackageDrawing

Pins PackageQty

Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)

SG2524D ACTIVE SOIC D 16 40 Green (RoHS &no Sb/Br)

CU NIPDAU Level-1-260C-UNLIM

SG2524DE4 ACTIVE SOIC D 16 40 Green (RoHS &no Sb/Br)


SG2524DG4 ACTIVE SOIC D 16 40 Green (RoHS &no Sb/Br)


SG2524DR ACTIVE SOIC D 16 2500 Green (RoHS &no Sb/Br)


SG2524DRE4 ACTIVE SOIC D 16 2500 Green (RoHS &no Sb/Br)


SG2524DRG4 ACTIVE SOIC D 16 2500 Green (RoHS &no Sb/Br)


SG2524J OBSOLETE CDIP J 16 TBD Call TI Call TI

SG2524N ACTIVE PDIP N 16 25 Pb-Free(RoHS)

CU NIPDAU N / A for Pkg Type

SG2524NE4 ACTIVE PDIP N 16 25 Pb-Free(RoHS)


SG3524D ACTIVE SOIC D 16 40 Green (RoHS &no Sb/Br)


SG3524DE4 ACTIVE SOIC D 16 40 Green (RoHS &no Sb/Br)


SG3524DG4 ACTIVE SOIC D 16 40 Green (RoHS &no Sb/Br)


SG3524DR ACTIVE SOIC D 16 2500 Green (RoHS &no Sb/Br)


SG3524DRE4 ACTIVE SOIC D 16 2500 Green (RoHS &no Sb/Br)


SG3524DRG4 ACTIVE SOIC D 16 2500 Green (RoHS &no Sb/Br)


SG3524J OBSOLETE CDIP J 16 TBD Call TI Call TI

SG3524N ACTIVE PDIP N 16 25 Pb-Free(RoHS)


SG3524NE4 ACTIVE PDIP N 16 25 Pb-Free(RoHS)


SG3524NS OBSOLETE SO NS 16 Green (RoHS &no Sb/Br)


SG3524NSR ACTIVE SO NS 16 2000 Green (RoHS &no Sb/Br)


SG3524NSRE4 ACTIVE SO NS 16 2000 Green (RoHS &no Sb/Br)


SG3524NSRG4 ACTIVE SO NS 16 2000 Green (RoHS &no Sb/Br)


(1) The marketing status values are defined as follows:ACTIVE: Product device recommended for new designs.LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part ina new design.PREVIEW: Device has been announced but is not in production. Samples may or may not be available.OBSOLETE: TI has discontinued the production of the device.

PACKAGE OPTION ADDENDUM

www.ti.com 4-Jun-2007

Addendum-Page 1

Section 1. What are Ferrites?

Ferrites are dense, homogeneous ceramic structures made by mix-

ing iron oxide (Fe2O3) with oxides or carbonates of one or more

metals such as manganese, zinc, nickel, or magnesium. They are

pressed, then fired in a kiln at 2000°F, and machined as needed

to meet various operational requirements.

MAGNETICS ® Ferrites

Ferrites described in this catalog are the manganese-zinc type used

for communications (frequencies from 1KHz to 1000 KHz) and

for power applications such as in switching power supplies.

Advantages of Ferrites

Ferrites have a paramount advantage over other types of magnetic

materials: high electrical resistivity and resultant low eddy cur-

rent losses over a wide frequency range. Additional characteristics

such as high permeability and time/temperature stability have

expanded ferrite uses into quality filter circuits, high frequency

transformers, wide band transformers, adjustable inductors, delay

lines, and other high frequency electronic circuitry. As the high

frequency performance of other circuit components continues to

be improved, ferrites are routinely designed into magnetic circuits

for both low level and power applications. Another factor in choos-

ing ferrites is the higher cost of magnetic metals. For the most

favorable combination of low cost, high Q, high stability, and

lowest volume, ferrites are the best core material choice for fre-

quencies from 10 KHz to 50 MHz. Ferrites offer an unmatched

flexibility in magnetic and mechanical parameters.

Summary of Ferrite Advantages1. LOW COST

2. LARGE SELECTION OF MATERIALS

3. SHAPE VERSATILITY

4. ECONOMICAL ASSEMBLY

5. TEMPERATURE AND TIME STABILITY

6. HIGH RESISTIVITY

7. WIDE FREQUENCY RANGE (10 KHz to 50 MHz)

8. HIGH Q/SMALL PACKAGE

TYPICAL MECHANICAL AND THERMAL PROPERTIES OF FERRITE MATERIALSMechanical Data

Bulk DensityTensile Strength

Compressive Strength

Youngs Modulus

Hardness (Knoop)Resistivity

Thermal Data

Coef. of Linear ExpansionSpecific Heat (25°)

Thermal Conductivity (25-85°C)

4.855.07.0 x 10³4563 x 10³12.4 x 10³1 .8x107

650 Typical10²-10³

10.5 x 10- 6 °C - 1

1100 J.kg - 1 °C- 1

.26 cal.g - 1. °C- 1

3500-4300 µW.mm- 1. °C - 1

35-43 mW.cm - 1.°C- 1

.0083-.010 cal.s-¹.cm - 1 .°C - 1

Units

gm/cm³kgf.mm - 2

Ibs.in - 2

kgf.mm- 2

lbs.in - 2

kgf.mm - 2

Ibs.in- 2

ohm-cm

Units

Above properties are averages measured on a range of commercially availableMnZn ferrite materials.

1.1MAGNETIC • BUTLER, PA

Section 2. MaterialsMaterial Characteristics (1)

INDUCTORS AND LOWLEVEL APPLICATIONS

EMI/RFI FILTERS ANDBROADBAND TRANSFORMERS

MATERIALS A D G J W H

Initial Permeability µi — 750 ± 20% 2000 ± 20% 2300 ± 20% 5000 ± 20% 10000 ± 30% 15000 ± 30%

Maximum Usable Frequency(50% roll-off) f MHz <9 <4 <4 <1 <.25 <.15

tan δRelative Loss Factorµiac

10-6 <12 (.5MHz)<20 (1MHz)

<6 (.1MHz) <6 (.1MHz) <20(100kHz)

<7 (10kHz) <15 (10kHz)

*Curie Temperature Tc °C >260 >145 >180 >140 >125 >120

* Relative Temp. Factor- 30°C to +20°C+ 20°C to +70°C

/°C 10-6/°C2.0 to 4.0 (Typ.)

1.0 to 3.0.9 to 2.19 to 2.1 -. 7 to +.7

*Flux Density@ 1194 A/m (15 Oe)

Bm GmT

4600460

3800380

4600460

4300430

4300430

4200420

* Remanence Br GmT

2300230

1000100

1300130

1000100

80080

80080

* Coercivity Hc OeA/m

0.756

0.2520

0.1512

0.18

0.043

0.043

Disaccommodation Factor DF 10-6 <15 <2.0 <3.5 <3 <3 <2.5

* Resistivity ρ Ω-m 4 3 8 1 .15 .1

* Density δ g/cm3 4.5 4.7 4.7 4.8 4.8 4.9

*Power Loss (PL),

Sine Wave, in mW/cm²(typical)

25kHz200mT

(2000G)

@25°C@60°C@100°C@120°C

100kHz100mT(1000G)

@25°C@60°C@100°C@120°C

500kHz50mT(500G)

@25 °C@80°C

@100 °C@120 °C

225275

375

700kHz50mT(500G)

@25°C@60°C@100°C@120°C

Available in:

Pot Cores X X X X X

RS Cores X X X X

DS Cores X X

RM Cores X X X X X

EP Cores X X

E, U Cores X X

EC, ETD Cores

PQ Cores

Toroids X X X X X X

Blocks X

NOTE (1). These characteristics are typical for a 42206size (0.870" O.D.) toroid. Specific core data will usuallydiffer from these numbers due to the influence ofgeometry and size. Characteristics with * are typical.

2.1 MAGNETICS • BUTLER, PA

Material Characteristics (cont.) (1)

Br G 900m T 90

INDUCTORS ANDPOWER TRANSFORMERS

X

X

X

X

X

X

X

X

X

MATERIALS K R P F

Initial Permeability µj — 1500 ± 25% 2300 ± 25% 2500 ± 25% 3000 ± 20%

Maximum Usable Frequency(50% roll-off)

Relative Loss Factor

f MHz < 2 <1 .5 <1 .2 <1 .3

tan δ10-6µiac

Tc

/°C

<8(100kHz)

> 2 3 0 > 2 3 0 > 2 5 0° C >230* Curie Temperature

* Relative Temp. Factor–30°C to +20°C+20°C to +70°C

10- 6/°C

Bm G 4600mT 460

* Flux Density@ 1194 A/m (15 Oe)

* Remanence

5000 5000 4900

500 500 490

1100 1100 1200

110 110 120

0.18 0.18 0.214 14 16

* Coercivity Hc Oe 0.2A/m 16

Disaccommodation Factor 10 -6DF

p*Resisitivity Ω-m 20 6 5 2

δ 4.7 4.8 4.8 4.8*Density

*Power Loss (PL),Sine Wave, in mW/cm³(typical)

g/cm³

@25°C@60°C@100°C@120°C

25kHz

200mT

(2000G)

130 120 90

85 90 160

70 95 240

85 130

100kHz100mT

(1000G)

@25°C 100

@60°C 90@100°C 110

@120°C 130

125

90125

165

100180225

500kHz

50mT

(500G)

@25°C 100

@60°C 100

@100°C 120@120°C 140

300

250275

350

700kHz

50mT

(500G)

@25°C 180

@60°C 200@100°C 220@120°C 290

Available In:Pot Cores X X

X X

X X

X X

X X

X X

X X

X X

X X

X

RS Cores

DS Cores

X

X

X

X

X

X

X

X

X

X

RM Cores

EP Cores

E, U Cores

EC, ETD Cores

PQ Cores

Toroids

Blocks

MAGNETICS • BUTLER, PA 2.2

140

100

7090

375

300250

300

Graph 1 — Relative Loss Factor vs. Frequency Graph 2 — Initial Permeability (µi) vs. Temperature

Temperature °C

Frequency (kHz)

Graph 3A — Frequency Response Curves Graph 3B — Frequency Response Curves

Frequency (kHz)Frequency (kHz)

Graph 3C — Frequency Response Curves

Frequency (kHz)


Saturation Flux Density - gausses 5000 ( at 15 oersted, 25° C) (500 mT)

Coercive Force - oersted . . . . . . . . 0.18 (14A/m)

Curie Temperature 230°C. . . . . . . . . . . . .

P Materialµ i

2500 ± 25%Note: The core loss curves are developed from empirical data. For bestresults and highest accuracy, use them. The formula on page 2.11 yields afair approximation and can be useful in computer programs.

CORE LOSS vs FLUX DENSITYPERMEABILITY vs. TEMPERATURE

TEMPERATURE (°C)

CORE LOSS vs. TEMPERATURE

TEMPERATURE (°C)

PERMEABILITY vs. FLUX DENSITYFLUX DENSITY GAUSS

FLUX DENSITY vs. TEMPERATURE

FLUX DENSITY GAUSS

See page 2.12 for B-H DataTEMPERATURE (°C)

2.6MAGNETIC • BUTLER, PA

CORE LOSS INFORMATION

Included on Pages 2.4-2.10 are material characteristics for the various Magnetics power and inductormaterials. For computer programming purposes, the core loss curves can be represented by theequation below. The factors indicated in the chart are split into discrete frequency ranges, so that theequation offers a close approximation to the core loss curves on the above pages.

CORE LOSS EQUATION: PL=af cBd

PL is in mW/cm3

B is in kGf is in kHz

FACTORS APPLIED TO THE ABOVE FORMULA

a c d

K Material f<500 kHz 0.0530 1.60 3.15

f>1 MHz 1.77*10-9 4.13 2.98

R Material f<100 kHz 0.074 1.43 2.85

100 kHz<f<500 kHz 0.036 1.64 2.68

f>500 kHz 0.014 1.84 2.28

P Material f<100 kHz 0.158 1.36 2.86

100kHz<f<500 kHz 0.0434 1.63 2.62

f>500 kHz 7.36*10-7 3.47 2.54

F Material f<10 kHz 0.790 1.06 2.85

10 kHz<f<100 kHz 0.0717 1.72 2.66

100 kHz<f<500 kHz 0.0573 1.66 2.68

f>500 kHz 0.0126 1.88 2.29

J Material f<20 kHz 0.245 1.39 2.50

f>20 kHz 0.00458 2.42 2.50

W Material f<20 kHz 0.300 1.26 2.60

f>20 kHz 0.00382 2.32 2.62

H Material f<20 kHz 0.148 1.50 2.25

f>20 kHz 0.135 1.62 2.15


500 kHz<f<1 MHz 0.00113 2.19 3.10

B vs. H Curves (dc)

H-oersted H-oersted

H-oersted

H-oersted

H-oersted

CONVERSION TABLE

Multiplynumber ofOerstedsOerstedsGaussesGaussesTeslas

by to obtain

79.5 A/m.795 A/cm

.1 milli Teslas10 - 4 Teslas10 4 Gausses

2.12MAGNETICS • BUTLER, PA

Bibliography

[1] Muhammad H Rashid, Power Electronics Circuits, Devices and Applications,3rd

ed: Pearson Publication, 2004

[2] R S Anand Murthy and Nattarasu, Power electronics, 3rd ed:Pearson Publication

[3] L Umanand, S R Bhat, Design of Magnetic Components for Switched Mode Power

Converters

[4] Mohan, Ned, Tore M. Undeland, and William P. Robbins. Power Electronics. 3rd

ed. Hoboken: John Wiley & Sons, Inc., 2003.

[5] V Ramanarayanan, Power Switching Devices, Converters and Digital Simulation.

[6] SG3524 Data Sheet. www.ti.com/lit/ds/symlink/SG3524.pdf

59

Design and Testing of Boost Converter Under the Guidance of

Documents

Transcript of Design and Testing of Boost Converter Under the Guidance of