Compal Confidential - Kythuatphancung.com
56
A A B B C C D D E E 1 1 2 2 3 3 4 4 Viper MXM Intel Haswell rPGA Processor with Lynx Point-H Compal Confidential Date : 2012/12/20 Version 0.5 Title Size Document Number Rev Date: Sheet of Security Classification Compal Secret Data THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Issued Date Deciphered Date LA-9241P 0.5 Cover Page Custom 1 56 Thursday, December 20, 2012 2011/06/29 2011/06/29 Compal Electronics, Inc. Title Size Document Number Rev Date: Sheet of Security Classification Compal Secret Data THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Issued Date Deciphered Date LA-9241P 0.5 Cover Page Custom 1 56 Thursday, December 20, 2012 2011/06/29 2011/06/29 Compal Electronics, Inc. Title Size Document Number Rev Date: Sheet of Security Classification Compal Secret Data THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Issued Date Deciphered Date LA-9241P 0.5 Cover Page Custom 1 56 Thursday, December 20, 2012 2011/06/29 2011/06/29 Compal Electronics, Inc.
-
Upload
khangminh22 -
Category
Documents
-
view
4 -
download
0
Transcript of Compal Confidential - Kythuatphancung.com
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Viper MXM
Intel Haswell rPGA Processor with Lynx Point-H
Compal Confidential
Date : 2012/12/20
Version 0.5
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
Cover Page
Custom
1 56Thursday, December 20, 2012
2011/06/29 2011/06/29
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
Cover Page
Custom
1 56Thursday, December 20, 2012
2011/06/29 2011/06/29
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
Cover Page
Custom
1 56Thursday, December 20, 2012
2011/06/29 2011/06/29
Compal Electronics, Inc.
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Model Name :
File Name :
Compal Confidential
USB 2.0 Bus
Touch pad daughter board
DDR3L 1333MHz 1.35V
KBC
SMSC KBC1126
X4
Accelerometer
CPU FAN1 conn.
SPK conn
Combo Jack
100MHz
PS2
SMBus (PCH)
100MHz
33
MH
z
100MHz
5GT/s
DMI x4FDI x2
SP
I
(GEN1 1.5Gb/S
GEN2 3Gb/S
GEN3 6Gb/S)
PCI-Express x 8 (ARD PCIE2.0 2.5GT/s)
2.7GT/s
Touch Pad
LP
C B
US
rPGA Processor
Haswell
Intel
HDA Codec
IDT 92HD91
PCH
HD Audio
rPGA947
Intel
BIOS SPI ROM x1,
16 MB
USB 2.0 x 11
695pin BGADigital MIC
SATA HDD
Conn.
Port 0
SATAx4
USB3.0 x3
Dock x1
X4
USB 3.0 x4
37.5mm*37.5mm
Lynx Point
20mm*20mm
Power On/Off CKT.
RTC CKT.
DC/DC interface CKT.
ST HP3DC2TPM1.2
Infineon SLB9656/9635
Webcam
USB2.0
Ch A
Ch B
BANK 0, 1, 2, 3DDR3-SO-DIMM1, 3
BANK 0, 1, 2, 3DDR3-SO-DIMM2, 4
eDP
DPE
PEGx16MXM3.0 Conn
AMD:
nVidia:
ODD
Conn.
Port 1
Port 13
Port 7
WLAN
(MINI card)
mSATA
Conn.
Port 2
Expresscard
Port 5Port 6
SD/MMC Slot
Card ReaderController
Port 8
Port 6
ThunderBolt
Cactus Ridge
X4
Mini DP Conn.Smart card Controller
AU9540A51
Super I/O
SMSC LPC47N217
VGA Conn CRT
WWAN SIM Card
Dock Conn
FPR Validity VFM471
X1
X1
X1
X1
Docking connector:
RJ45
USB30*1
USB20*1
DP*2
Parallel port
Serial port
PS2
Line in/Line out
SATAx2
VGA
eDP DeMUX
PS8321
eDPFDP ConnDP MUX
PS8338
DPC
Dock Conn DPD
VGA Switch
2 to 2
MAX14885EETL
CRT
CRT
CRT
X1
X1
WLAN
X1
Dock
SPI(PCH)
EC ROM
2MB
Int.KBD
eDP Panel Conn.
LVDS Panel Conn.
eDP to LVDS
RTD 2136
RJ45 Conn.
GLAN
Intel
Clarkville
Page 22Page 36
Page 35
Page 36
Page 33
Page 39
Page 39
Page 33
Page 36Page 36
Page 4,5,6,7,8,9,10
Page 12
Page 11
Page 13,14,15,16,17,18,19,20,21
Page 30
Page 26
Page 27
Page 39
Page 22
Page 25 Page 25
Page 37
Page 28
Page 22
Page 25
Page 39
Page 33
Page 33
Page 30
Page 30
Page 38Page 38
Page 32Page 28
Page 23 Page 23Page 23
Page 25Page 39Page 29
Page 29
Page 39
Page 28
Page 24
Page 13
Page 34
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
Block Diagrams
Custom
2 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
Block Diagrams
Custom
2 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
Block Diagrams
Custom
2 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
SMBus block diagram_DSC
Custom
3 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
SMBus block diagram_DSC
Custom
3 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
SMBus block diagram_DSC
Custom
3 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CAD Note:
Trace width=12 mils ,Spacing=15mil
Max length= 400 mils.
PEG_COMP
DMI_CRX_PTX_P1DMI_CRX_PTX_P2
DMI_CTX_PRX_N0
DMI_CRX_PTX_N2
DMI_CTX_PRX_P2DMI_CTX_PRX_P1
DMI_CRX_PTX_N0
DMI_CRX_PTX_P0
DMI_CRX_PTX_N3
DMI_CTX_PRX_N3
DMI_CRX_PTX_P3
DMI_CTX_PRX_P3
DMI_CTX_PRX_P0
DMI_CTX_PRX_N1
DMI_CRX_PTX_N1
DMI_CTX_PRX_N2
PEG_COMP
PEG_CTX_GRX_P[0..15]
PEG_CTX_GRX_N[0..15]
PEG_CTX_GRX_C_P0
PEG_CTX_GRX_C_P1
PEG_CTX_GRX_P0
PEG_CTX_GRX_C_P3
PEG_CTX_GRX_C_P2
PEG_CTX_GRX_C_N3
PEG_CTX_GRX_C_N0 PEG_CTX_GRX_N0
PEG_CTX_GRX_C_N1
PEG_CTX_GRX_C_N2
PEG_CTX_GRX_C_P5
PEG_CTX_GRX_C_P6
PEG_CTX_GRX_C_P4PEG_CTX_GRX_C_N4
PEG_CTX_GRX_C_N6
PEG_CTX_GRX_C_N5
PEG_CTX_GRX_C_P7
PEG_CTX_GRX_C_P8
PEG_CTX_GRX_C_P9
PEG_CTX_GRX_C_N8
PEG_CTX_GRX_C_N7
PEG_CTX_GRX_C_P10
PEG_CTX_GRX_C_P11PEG_CTX_GRX_C_N11
PEG_CTX_GRX_C_N9
PEG_CTX_GRX_C_N10
PEG_CTX_GRX_C_P12PEG_CTX_GRX_C_N12
PEG_CTX_GRX_C_N13PEG_CTX_GRX_C_P13
PEG_CTX_GRX_C_P14PEG_CTX_GRX_C_N14
PEG_CTX_GRX_C_P15PEG_CTX_GRX_C_N15
PEG_CTX_GRX_P1PEG_CTX_GRX_N1
PEG_CTX_GRX_N2PEG_CTX_GRX_P2
PEG_CTX_GRX_P3
PEG_CTX_GRX_P4
PEG_CTX_GRX_N3
PEG_CTX_GRX_N4
PEG_CTX_GRX_P5
PEG_CTX_GRX_P6
PEG_CTX_GRX_P7
PEG_CTX_GRX_N5
PEG_CTX_GRX_N7
PEG_CTX_GRX_N6
PEG_CTX_GRX_P8
PEG_CTX_GRX_P9
PEG_CTX_GRX_P10
PEG_CTX_GRX_N8
PEG_CTX_GRX_N9
PEG_CTX_GRX_P11
PEG_CTX_GRX_N12PEG_CTX_GRX_P12
PEG_CTX_GRX_N11
PEG_CTX_GRX_N10
PEG_CTX_GRX_N13PEG_CTX_GRX_P13
PEG_CTX_GRX_P14
PEG_CTX_GRX_P15
PEG_CTX_GRX_N14
PEG_CTX_GRX_N15
FDI_CSYNCFDI_INT
PEG_CTX_GRX_C_N11
PEG_CTX_GRX_C_P7
PEG_CTX_GRX_C_N6
PEG_CTX_GRX_C_N1
PEG_CTX_GRX_C_P0
PEG_CTX_GRX_C_N12
PEG_CTX_GRX_C_N15
PEG_CTX_GRX_C_P5
PEG_CTX_GRX_C_N8
PEG_CTX_GRX_C_N3
PEG_CTX_GRX_C_P3
PEG_CTX_GRX_C_N10
PEG_CTX_GRX_C_N5
PEG_CTX_GRX_C_N0
PEG_CTX_GRX_C_P1
PEG_CTX_GRX_C_N13
PEG_CTX_GRX_C_P6
PEG_CTX_GRX_C_N7
PEG_CTX_GRX_C_N14
PEG_CTX_GRX_C_N2
PEG_CTX_GRX_C_P4
PEG_CTX_GRX_C_N9
PEG_CTX_GRX_C_N4
PEG_CTX_GRX_C_P2
PEG_CTX_GRX_C_P8PEG_CTX_GRX_C_P9PEG_CTX_GRX_C_P10PEG_CTX_GRX_C_P11PEG_CTX_GRX_C_P12PEG_CTX_GRX_C_P13PEG_CTX_GRX_C_P14PEG_CTX_GRX_C_P15
PEG_CRX_GTX_P4
PEG_CRX_GTX_P9
PEG_CRX_GTX_P14
PEG_CRX_GTX_P2
PEG_CRX_GTX_P7
PEG_CRX_GTX_P12
PEG_CRX_GTX_P0
PEG_CRX_GTX_P5
PEG_CRX_GTX_P10
PEG_CRX_GTX_P15
PEG_CRX_GTX_P3
PEG_CRX_GTX_P8
PEG_CRX_GTX_P13
PEG_CRX_GTX_P1
PEG_CRX_GTX_P6
PEG_CRX_GTX_P11
PEG_CRX_GTX_N10
PEG_CRX_GTX_N4
PEG_CRX_GTX_N13
PEG_CRX_GTX_N2
PEG_CRX_GTX_N7
PEG_CRX_GTX_N11
PEG_CRX_GTX_N0
PEG_CRX_GTX_N5
PEG_CRX_GTX_N9
PEG_CRX_GTX_N3
PEG_CRX_GTX_N8
PEG_CRX_GTX_N12
PEG_CRX_GTX_N1
PEG_CRX_GTX_N6
PEG_CRX_GTX_N15PEG_CRX_GTX_N14
DMI_CTX_PRX_P0[14]
DMI_CRX_PTX_P0[14]
DMI_CTX_PRX_N1[14]
DMI_CRX_PTX_N1[14]
DMI_CTX_PRX_P3[14]
DMI_CRX_PTX_P3[14]
DMI_CTX_PRX_P2[14]
DMI_CTX_PRX_N0[14]
DMI_CRX_PTX_N3[14]
DMI_CRX_PTX_P2[14]
DMI_CTX_PRX_N3[14]
DMI_CTX_PRX_P1[14]
DMI_CRX_PTX_N0[14]
DMI_CRX_PTX_N2[14]
DMI_CRX_PTX_P1[14]
DMI_CTX_PRX_N2[14]
FDI_INT[14]FDI_CSYNC[14]
PEG_CRX_GTX_N[0..15] [35]PEG_CTX_GRX_P[0..15] [35]
PEG_CTX_GRX_N[0..15] [35]
PEG_CRX_GTX_P[0..15] [35]
+VCCIOA_OUT
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
DMI,PEG
Custom
4 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
DMI,PEG
Custom
4 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
DMI,PEG
Custom
4 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.
CC9 0.22U_0402_6.3V6KCC9 0.22U_0402_6.3V6K12
RC124.9_0402_1% RC124.9_0402_1%
12
CC10 0.22U_0402_6.3V6KCC10 0.22U_0402_6.3V6K12
CC2 0.22U_0402_6.3V6KCC2 0.22U_0402_6.3V6K12
CC22 0.22U_0402_6.3V6KCC22 0.22U_0402_6.3V6K1 2
CC19 0.22U_0402_6.3V6KCC19 0.22U_0402_6.3V6K1 2
CC3 0.22U_0402_6.3V6KCC3 0.22U_0402_6.3V6K12
CC20 0.22U_0402_6.3V6KCC20 0.22U_0402_6.3V6K1 2
CC6 0.22U_0402_6.3V6KCC6 0.22U_0402_6.3V6K12
CC7 0.22U_0402_6.3V6KCC7 0.22U_0402_6.3V6K12
CC15 0.22U_0402_6.3V6KCC15 0.22U_0402_6.3V6K12
CC12 0.22U_0402_6.3V6KCC12 0.22U_0402_6.3V6K12
CC1 0.22U_0402_6.3V6KCC1 0.22U_0402_6.3V6K12
CC14 0.22U_0402_6.3V6KCC14 0.22U_0402_6.3V6K12
CC23 0.22U_0402_6.3V6KCC23 0.22U_0402_6.3V6K1 2
CC8 0.22U_0402_6.3V6KCC8 0.22U_0402_6.3V6K12
CC25 0.22U_0402_6.3V6KCC25 0.22U_0402_6.3V6K1 2
CC32 0.22U_0402_6.3V6KCC32 0.22U_0402_6.3V6K1 2
CC5 0.22U_0402_6.3V6KCC5 0.22U_0402_6.3V6K12
CC27 0.22U_0402_6.3V6KCC27 0.22U_0402_6.3V6K1 2
CC17 0.22U_0402_6.3V6KCC17 0.22U_0402_6.3V6K1 2
CC18 0.22U_0402_6.3V6KCC18 0.22U_0402_6.3V6K1 2
CC21 0.22U_0402_6.3V6KCC21 0.22U_0402_6.3V6K1 2
CC28 0.22U_0402_6.3V6KCC28 0.22U_0402_6.3V6K1 2
CC24 0.22U_0402_6.3V6KCC24 0.22U_0402_6.3V6K1 2
DM
IF
DI
PE
G
Haswell rPGA EDS
1 OF 9
JCPU1A
INTEL_HASWELL_HASWELL
DM
IF
DI
PE
G
Haswell rPGA EDS
1 OF 9
JCPU1A
INTEL_HASWELL_HASWELL
PEG_TXP_15B24PEG_TXP_14C25PEG_TXP_13B26PEG_TXP_12C27PEG_TXP_11B28PEG_TXP_10C29PEG_TXP_9B30PEG_TXP_8C31PEG_TXP_7A32PEG_TXP_6B33PEG_TXP_5H30PEG_TXP_4H31PEG_TXP_3G32PEG_TXP_2H33PEG_TXP_1G34PEG_TXP_0J35PEG_TXN_15A24PEG_TXN_14B25PEG_TXN_13A26PEG_TXN_12B27PEG_TXN_11A28PEG_TXN_10B29PEG_TXN_9A30PEG_TXN_8B31PEG_TXN_7B32PEG_TXN_6C33PEG_TXN_5G30PEG_TXN_4J31PEG_TXN_3H32PEG_TXN_2J33PEG_TXN_1H34PEG_TXN_0H35PEG_RXP_15D32PEG_RXP_14F33PEG_RXP_13E34PEG_RXP_12F35PEG_RXP_11E30PEG_RXP_10F31PEG_RXP_9E28PEG_RXP_8F29PEG_RXP_7K34PEG_RXP_6L35PEG_RXP_5K32PEG_RXP_4L33PEG_RXP_3K30PEG_RXP_2L31PEG_RXP_1L28PEG_RXP_0L29PEG_RXN_15E32PEG_RXN_14E33PEG_RXN_13D34PEG_RXN_12E35PEG_RXN_11D30PEG_RXN_10E31PEG_RXN_9D28PEG_RXN_8E29PEG_RXN_7L34PEG_RXN_6M35PEG_RXN_5L32PEG_RXN_4M33PEG_RXN_3L30PEG_RXN_2M31PEG_RXN_1K28PEG_RXN_0M29PEG_RCOMPE23
DISP_INTJ29 FDI_CSYNCH29
DMI_TXP_3A18 DMI_TXP_2B18 DMI_TXP_1C18 DMI_TXP_0D17
DMI_TXN_3A17 DMI_TXN_2B17 DMI_TXN_1C17 DMI_TXN_0D18
DMI_RXP_3A20 DMI_RXP_2B20 DMI_RXP_1C20 DMI_RXP_0D20
DMI_RXN_3A21 DMI_RXN_2B21 DMI_RXN_1C21 DMI_RXN_0D21
CC4 0.22U_0402_6.3V6KCC4 0.22U_0402_6.3V6K12
CC30 0.22U_0402_6.3V6KCC30 0.22U_0402_6.3V6K1 2
CC16 0.22U_0402_6.3V6KCC16 0.22U_0402_6.3V6K12
CC13 0.22U_0402_6.3V6KCC13 0.22U_0402_6.3V6K12
CC29 0.22U_0402_6.3V6KCC29 0.22U_0402_6.3V6K1 2
CC11 0.22U_0402_6.3V6KCC11 0.22U_0402_6.3V6K12
CC31 0.22U_0402_6.3V6KCC31 0.22U_0402_6.3V6K1 2
CC26 0.22U_0402_6.3V6KCC26 0.22U_0402_6.3V6K1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
For ESD concern, please put near CPU
CAD Note:
Trace width=12~15 mil, Spcing=20 mils
Max trace length= 500 mil
Place near JXDP1
CAD Note:
Avoid stub in the PWRGD path
while placing resistors RC25 & RC130
RC5 need to close to JCPU1
DDR3 COMPENSATION SIGNALS
PU/PD for JTAG signals
SM_DRAMPWROK with DDR Power Gating Topology
#4/9 change by
HP requirement
#4/9 change by HP requirement
07/25 Delete RC24
07/30 Non Install QC1
08/10 Add RC106 and change UC1.1 connection to VR_ON
9/11 Delete RC106
09/11 Noninstall RC36, RC38, RC40, RC43, RC45, RC47
09/11 Delete RC66
09/11 Connect CPU.AT26 pin to CPU_PLTRST#
09/11 Change RC55.1 connection to H_CPUPWRGD
09/11 Delete RC27 and connect CPU.AM35 pin to PCH_THERMTRIP#_R
09/23 Change netname to VGATE
09/23 Change netname to PWR_GD
09/26 Change netname to PM_PWROK. Add RC107
10/12 Reserve RC108
10/18 Uninstall QC3 10/18 Change RC108 to 10k ohms, and install RC108
10/18 Delete QC1 and RC12
11/07 Delete RC36, RC38, RC40, RC43, RC45, RC47 by
ESD request. Add T144, T145, T146, T147, T148, T149
XDP_TMS
XDP_PREQ#XDP_PRDY#
XDP_DBRESET#
XDP_TDOXDP_TRST#XDP_TDI
XDP_TCLK
H_CPUPWRGD H_CPUPWRGD_XDP
XDP_RST#_R
H_CPUPWRGDH_PM_SYNC
H_CATERR#
KBC_PROC_HOT_R
PM_DRAM_PWRGD_CPU
H_CPUPWRGD
PCH_THERMTRIP#_R
XDP_DBRESET#
XDP_TCLK
XDP_TRST#
XDP_TDO
H_PECI
PM_DRAM_PWRGD_CPU
CPU_DETECT#SM_RCOMP1SM_RCOMP2
SM_RCOMP0
XDP_TDIXDP_TRST#
XDP_TCLKXDP_TMS
XDP_PRDY#XDP_PREQ#
XDP_OBS3_R
XDP_OBS5_R
XDP_OBS2_R
XDP_OBS4_R
XDP_OBS6_RXDP_OBS7_R
PLT_RST#
XDP_OBS0XDP_OBS1
XDP_DBRESET#
DDR3_DRAMRST#_CPU
XDP_TDO
SM_RCOMP0
SM_RCOMP1
SM_RCOMP2
CFG1CFG0
CFG2CFG3
XDP_OBS0XDP_OBS1
CFG4CFG5
CFG6CFG7
CFG17CFG16
CFG9CFG8
CFG11CFG10
CFG18
CFG13CFG12
CFG15CFG14
CFG19
KBC_PROC_HOT
CPU_PLTRST#
KBC_PROC_HOT_R
CFG3
DDR3_DRAMRST#_CPU
PM_DRAM_PWRGD[14]
CFG0[8]CFG1[8]
CFG2[8]CFG3[8]
CFG6[8]CFG7[8]
CFG4[8]CFG5[8]
CFG10 [8]CFG11 [8]
CFG8 [8]CFG9 [8]
CFG12 [8]CFG13 [8]
CFG17 [8]CFG16 [8]
CFG19 [8]CFG18 [8]
CFG14 [8]CFG15 [8]
PWR_GD[30,31,47]
H_PECI[30]
PCH_THERMTRIP#_R[18,24,35]
H_PM_SYNC[14]H_CPUPWRGD[18]
CLK_CPU_DPLL#[15]CLK_CPU_DPLL[15]
CLK_CPU_SSC_DPLL#[15]CLK_CPU_SSC_DPLL[15]
CLK_CPU_DMI#[15]CLK_CPU_DMI[15]
CPU_PWR_DEBUG[9]
DDR_XDP_WAN_SMBDAT[11,12,13,16,28,38]DDR_XDP_WAN_SMBCLK[11,12,13,16,28,38]
XDP_DBRESET# [14]
CPU_DRAM_RST# [11]
KBC_PROC_HOT#[24,30]
DDR_RST_EN [16]
KBC_DS3_EN[30,45]
PLT_RST# [13,14,25,28,29,30,35,37,39]
ON/OFFBTN#[14,30]
KBC_PROC_HOT_R[24,47]
PM_PWROK[14,30]
CPU_PLTRST#[18]
+VCCIO_OUT
+VCCIO_OUT +VCCIO_OUT
+VCCIO_OUT
+1.05VS
+3VS
+1.35VS
+5VDS
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
PM,XDP,CLK
Custom
5 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
PM,XDP,CLK
Custom
5 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
PM,XDP,CLK
Custom
5 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.
RC55
10K_0402_1%
RC55
10K_0402_1%
12
RC22 0_0402_5%@
RC22 0_0402_5%@1 2
T144 PAD@T144 PAD@
T118PAD @T118PAD @
RC62 51_0402_1%RC62 51_0402_1%12
CC
33
0.1
U_0402_16V
4Z
CC
33
0.1
U_0402_16V
4Z
1
2
RC52 1K_0402_1%RC52 1K_0402_1%12
RC
28
4.9
9K
_0402_1%
RC
28
4.9
9K
_0402_1%
12 RC25 3.3K_0402_5%RC25 3.3K_0402_5%1 2
T145 PAD@T145 PAD@
G
D
S
Q592N7002KW_SOT323-3
G
D
S
Q592N7002KW_SOT323-3
2
13
RC9 100K_0402_1%RC9 100K_0402_1%
1 2
CC
34
0.1
U_0402_16V
4Z
CC
34
0.1
U_0402_16V
4Z
1
2
RC16 1K_0402_1%RC16 1K_0402_1%
12
RC23 62_0402_5%RC23 62_0402_5%
1 2
T146 PAD@T146 PAD@
T120PAD @T120PAD @
T147 PAD@T147 PAD@
RC61 75_0402_1%RC61 75_0402_1%1 2
RC65 100_0402_1%RC65 100_0402_1%1 2
RC59 100_0402_1%RC59 100_0402_1%1 2
CC35
0.1U_0402_10V6K
CC35
0.1U_0402_10V6K
1 2
G
D
S
QC32N7002_SOT23
@
G
D
S
QC32N7002_SOT23
@2
13
T148 PAD@T148 PAD@
RC107 0_0402_5%RC107 0_0402_5%1 2
PW
R
DD
R3
MISC
TH
ER
MA
L
CL
OC
K
JT
AG
Haswell rPGA EDS
2 OF 9
JCPU1B
INTEL_HASWELL_HASWELL
PW
R
DD
R3
MISC
TH
ER
MA
L
CL
OC
K
JT
AG
Haswell rPGA EDS
2 OF 9
JCPU1B
INTEL_HASWELL_HASWELL
BPM_N_7AP28BPM_N_6AP29BPM_N_5AN28BPM_N_4AP30BPM_N_3AP31BPM_N_2AN29BPM_N_1AN31BPM_N_0AR30
DBRAP33TDOAL33TDIAM31TRSTAM33TMSAN33TCKAM34PREQAT29PRDYAR29
SM_DRAMRSTAN3SM_RCOMP_2AP2SM_RCOMP_1AR3SM_RCOMP_0AP3
BCLKPE26 BCLKND26 SSC_DPLL_REF_CLKPE27 SSC_DPLL_REF_CLKNF27 DPLL_REF_CLKPH28 DPLL_REF_CLKNG28
PWRGOODAL34 PM_SYNCAT28
PROCHOTAM30 FC_AK31AK31 PECIAR27 CATERRAN32
SKTOCCAP32
PLTRSTINAT26 SM_DRAMPWROKAC10
THERMTRIPAM35
G
DS QC2BSS138W-7-F_SOT323-3
G
DS QC2BSS138W-7-F_SOT323-3
2
13
RC105 1K_0402_1%RC105 1K_0402_1%
12
T1PAD @T1PAD @
T149 PAD@T149 PAD@
RC13 1K_0402_1%RC13 1K_0402_1%1 2
UC1
74AHC1G09GW_TSSOP5Part Number = SA00003Y000
UC1
74AHC1G09GW_TSSOP5Part Number = SA00003Y000
B1
A2
G3
O4
P5
RC26 56_0402_5%RC26 56_0402_5%1 2
RC103.3K_0402_1%RC103.3K_0402_1%
12
RC60 51_0402_1%RC60 51_0402_1%12
RC5
1.8K_0402_1%
RC5
1.8K_0402_1%
12
RC57 51_0402_1%RC57 51_0402_1%12
RC108
10K_0402_1%
RC108
10K_0402_1%
12
JXDP1
SAMTE_BSH-030-01-L-D-A CONN@
JXDP1
SAMTE_BSH-030-01-L-D-A CONN@
GND01
OBSFN_A03
OBSFN_A15
GND27
OBSDATA_A09
OBSDATA_A111
GND413
OBSDATA_A215
OBSDATA_A317
GND619
OBSFN_B021
OBSFN_B123
GND825
OBSDATA_B027
OBSDATA_B129
GND1031
OBSDATA_B233
OBSDATA_B335
GND1237
PWRGOOD/HOOK039
HOOK141
VCC_OBS_AB43
HOOK245
HOOK347
GND1449
SDA51
SCL53
TCK155
TCK057
GND1659
GND12
OBSFN_C04
OBSFN_C16
GND38
OBSDATA_C010
OBSDATA_C112
GND514
OBSDATA_C216
OBSDATA_C318
GND720
OBSFN_D022
OBSFN_D124
GND926
OBSDATA_D028
OBSDATA_D130
GND1132
OBSDATA_D234
OBSDATA_D336
GND1338
ITPCLK/HOOK440
ITPCLK#/HOOK542
VCC_OBS_CD44
RESET#/HOOK646
DBR#/HOOK748
GND1550
TD052
TRST#54
TDI56
TMS58
GND1760
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
07/10 Change by HP request
07/10 Delete by HP request
08/03 Add CC84, CC85, CC86
DDR_B_D29
DDR_B_D59
DDR_B_D50DDR_B_D49
DDR_B_D13
DDR_B_D11
DDR_B_D19
DDR_B_D14
DDR_B_D3
DDR_B_D55
DDR_B_D47
DDR_B_D52
DDR_B_D44
DDR_B_D41
DDR_B_D8
DDR_B_D5
DDR_B_D56
DDR_B_D48
DDR_B_D38
DDR_B_D35
DDR_B_D26DDR_B_D25
DDR_B_D4
DDR_B_D63
DDR_B_D34
DDR_B_D32
DDR_B_D10
DDR_B_D17
DDR_B_D51
DDR_B_D40
DDR_B_D36
DDR_B_D31
DDR_B_D21DDR_B_D20
DDR_B_D15
DDR_B_D7
DDR_B_D62
DDR_B_D46
DDR_B_D42
DDR_B_D18
DDR_B_D12
DDR_B_D1
DDR_B_D53
DDR_B_D37
DDR_B_D22
DDR_B_D57
DDR_B_D27
DDR_B_D54
DDR_B_D45
DDR_B_D39
DDR_B_D30
DDR_B_D9
DDR_B_D60
DDR_B_D58
DDR_B_D33
DDR_B_D0
DDR_B_D61
DDR_B_D43
DDR_B_D28
DDR_B_D23DDR_B_D24
DDR_B_D16
DDR_B_D6
DDR_B_D2
DDR_B_DQS3DDR_B_DQS2
DDR_B_DQS7
DDR_B_DQS4
DDR_B_DQS1
DDR_B_DQS5DDR_B_DQS6
DDR_B_DQS0
M_B_ODT0
DDR_CKE0_DIMMB
DDR_CKE1_DIMMB
M_B_ODT1
DDR_CS0_DIMMB#DDR_CS1_DIMMB#
DDR_A_D0DDR_A_D1DDR_A_D2DDR_A_D3DDR_A_D4DDR_A_D5DDR_A_D6
DDR_A_D59
DDR_A_D31
DDR_A_D9
DDR_A_D50
DDR_A_D42
DDR_A_D29
DDR_A_D51
DDR_A_D46
DDR_A_D36
DDR_A_D18
DDR_A_D58
DDR_A_D55
DDR_A_D14
DDR_A_D24
DDR_A_D8
DDR_A_D63
DDR_A_D49
DDR_A_D41
DDR_A_D34
DDR_A_D28
DDR_A_D25
DDR_A_D35
DDR_A_D17
DDR_A_D13
DDR_A_D57
DDR_A_D54
DDR_A_D22DDR_A_D21
DDR_A_D23
DDR_A_D7
DDR_A_D62
DDR_A_D48
DDR_A_D40
DDR_A_D33
DDR_A_D27
DDR_A_D44
DDR_A_D16
DDR_A_D12
DDR_A_D56
DDR_A_D53
DDR_A_D45
DDR_A_D38
DDR_A_D20
DDR_A_D60DDR_A_D61
DDR_A_D47
DDR_A_D39
DDR_A_D32
DDR_A_D26
DDR_A_D10
DDR_A_D43
DDR_A_D15
DDR_A_D11
DDR_A_D52
DDR_A_D37
DDR_A_D30
DDR_A_D19
DDR_A_MA0DDR_A_MA1
DDR_A_MA3
DDR_A_MA7DDR_A_MA8
DDR_A_MA13
DDR_A_MA2
DDR_A_MA14
DDR_A_MA5
DDR_A_MA10
DDR_A_MA4
DDR_A_MA11
DDR_A_MA9
DDR_A_MA6
DDR_A_MA12
DDR_A_MA15
DDR_A_DQS#5
DDR_A_DQS#7
DDR_A_DQS#2DDR_A_DQS#1DDR_A_DQS#0
DDR_A_DQS#3DDR_A_DQS#4
DDR_A_DQS#6
DDR_A_DQS7
DDR_A_DQS1DDR_A_DQS2
DDR_A_DQS5
DDR_A_DQS3DDR_A_DQS4
DDR_A_DQS0
DDR_A_DQS6
DDR_A_BS1DDR_A_BS2
DDR_A_BS0
DDR_A_CAS#
DDR_A_RAS#DDR_A_WE#
DDR_CS1_DIMMA#DDR_CS0_DIMMA#
M_A_ODT1M_A_ODT0
DDR_CKE0_DIMMA
DDR_CKE1_DIMMA
DDR_B_BS2
DDR_B_CAS#
DDR_B_BS1DDR_B_BS0
DDR_B_DQS#3
DDR_B_DQS#6
DDR_B_DQS#1DDR_B_DQS#2
DDR_B_DQS#0
DDR_B_DQS#5
DDR_B_DQS#7
DDR_B_DQS#4
DDR_B_MA10DDR_B_MA9
DDR_B_MA14
DDR_B_MA5
DDR_B_MA13
DDR_B_MA11
DDR_B_MA7
DDR_B_MA2
DDR_B_MA0
DDR_B_MA6
DDR_B_MA1
DDR_B_MA12
DDR_B_MA4
DDR_B_MA8
DDR_B_MA3
DDR_B_MA15
DDR_B_RAS#DDR_B_WE#
M_CLK_A_DDR0M_CLK_A_DDR#0
M_CLK_A_DDR1M_CLK_A_DDR#1
M_CLK_B_DDR#0M_CLK_B_DDR0
M_CLK_B_DDR1M_CLK_B_DDR#1
DDR_CKE2_DIMMA
DDR_CKE3_DIMMA
M_CLK_A_DDR#2M_CLK_A_DDR2
M_CLK_A_DDR3M_CLK_A_DDR#3
DDR_CS3_DIMMA#DDR_CS2_DIMMA#
M_A_ODT3M_A_ODT2
DDR_CKE2_DIMMB
DDR_CKE3_DIMMBM_CLK_B_DDR3M_CLK_B_DDR#3
M_CLK_B_DDR#2M_CLK_B_DDR2
DDR_CS2_DIMMB#DDR_CS3_DIMMB#
M_B_ODT2M_B_ODT3
DDR_A_D[0..63][11]
M_CLK_A_DDR#0 [11]M_CLK_A_DDR0 [11]DDR_CKE0_DIMMA [11]M_CLK_A_DDR#1 [11]M_CLK_A_DDR1 [11]DDR_CKE1_DIMMA [11]
DDR_CS0_DIMMA# [11]DDR_CS1_DIMMA# [11]
DDR_A_BS0 [11]DDR_A_BS1 [11]DDR_A_BS2 [11]
M_A_ODT0 [11]M_A_ODT1 [11]
DDR_A_WE# [11]DDR_A_CAS# [11]
DDR_A_RAS# [11]
DDR_A_MA[0..15] [11]
DDR_A_DQS#[0..7] [11]
DDR_B_D[0..63][12]
DDR_CKE0_DIMMB [12]
M_CLK_B_DDR#0 [12]
M_CLK_B_DDR1 [12]M_CLK_B_DDR#1 [12]
M_CLK_B_DDR0 [12]
DDR_CKE1_DIMMB [12]
M_B_ODT0 [12]
DDR_B_BS1 [12]
DDR_B_WE# [12]DDR_B_CAS# [12]
DDR_B_RAS# [12]
DDR_CS1_DIMMB# [12]
DDR_B_BS2 [12]
M_B_ODT1 [12]
DDR_CS0_DIMMB# [12]
DDR_B_BS0 [12]
DDR_B_MA[0..15] [12]
DDR_CKE2_DIMMA [11]
M_CLK_A_DDR#2 [11]
M_CLK_A_DDR3 [11]M_CLK_A_DDR#3 [11]
M_CLK_A_DDR2 [11]
DDR_CKE3_DIMMA [11]
DDR_CS3_DIMMA# [11]DDR_CS2_DIMMA# [11]
M_A_ODT2 [11]M_A_ODT3 [11]
DDR_CKE2_DIMMB [12]
M_CLK_B_DDR#2 [12]
M_CLK_B_DDR3 [12]M_CLK_B_DDR#3 [12]
M_CLK_B_DDR2 [12]
DDR_CKE3_DIMMB [12]
DDR_CS3_DIMMB# [12]DDR_CS2_DIMMB# [12]
M_B_ODT2 [12]M_B_ODT3 [12]
DDR_A_DQS[0..7] [11]
DDR_B_DQS#[0..7] [12]
DDR_B_DQS[0..7] [12]
+DIMM01_VREF_DQ+DIMM23_VREF_DQ
+SM_VREF_CA
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
DDRIII
Custom
6 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
DDRIII
Custom
6 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
DDRIII
Custom
6 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.
CC84
0.1
U_
04
02
_1
6V
4Z
CC84
0.1
U_
04
02
_1
6V
4Z
1
2
CC85
0.1
U_
04
02
_1
6V
4Z
CC85
0.1
U_
04
02
_1
6V
4Z
1
2
CC86
0.1
U_
04
02
_1
6V
4Z
CC86
0.1
U_
04
02
_1
6V
4Z
1
2
Haswell rPGA EDS
4 OF 9
JCPU1D
INTEL_HASWELL_HASWELL
Haswell rPGA EDS
4 OF 9
JCPU1D
INTEL_HASWELL_HASWELL
RSVDAG8
SB_CKN0Y4
SB_CK0AA4
SB_CKE_0AF10
SB_CKN1Y3
SB_CK1AA3
SB_CKE_1AG10
SB_CKN2Y2
SB_CK2AA2
SB_CKE_2AG9
SB_CKN3Y1
SB_CK3AA1
SB_CKE_3AF9
SB_CS_N_0P4
SB_CS_N_1R2
SB_CS_N_2P3
SB_CS_N_3P1
SB_ODT_0R4
SB_ODT_1R3
SB_ODT_2R1
SB_ODT_3P2
SB_BS_0R7
SB_BS_1P8
SB_BS_2AA9
VSSR10
SB_RASR6
SB_WEP6
SB_CASP7
SB_MA_0R8
SB_MA_1Y5
SB_MA_2Y10
SB_MA_3AA5
SB_MA_4Y7
SB_MA_5AA6
SB_MA_6Y6
SB_MA_7AA7
SB_MA_8Y8
SB_MA_9AA10
SB_MA_10R9
SB_MA_11Y9
SB_MA_12AF7
SB_MA_13P9
SB_MA_14AA8
SB_MA_15AG7
SB_DQS_N_0AP18
SB_DQS_N_1AP11
SB_DQS_N_2AP5
SB_DQS_N_3AJ3
SB_DQS_N_4L3
SB_DQS_N_5H9
SB_DQS_N_6C8
SB_DQS_N_7C14
SB_DQS_P_0AP17
SB_DQS_P_1AP12
SB_DQS_P_2AP6
SB_DQS_P_3AK3
SB_DQS_P_4M3
SB_DQS_P_5H8
SB_DQS_P_6C9
SB_DQS_P_7C15
SB_DQ_0AR18
SB_DQ_1AT18
SB_DQ_2AM17
SB_DQ_3AM18
SB_DQ_4AR17
SB_DQ_5AT17
SB_DQ_6AN17
SB_DQ_7AN18
SB_DQ_8AT12
SB_DQ_9AR12
SB_DQ_10AN12
SB_DQ_11AM11
SB_DQ_12AT11
SB_DQ_13AR11
SB_DQ_14AM12
SB_DQ_15AN11
SB_DQ_16AR5
SB_DQ_17AR6
SB_DQ_18AM5
SB_DQ_19AM6
SB_DQ_20AT5
SB_DQ_21AT6
SB_DQ_22AN5
SB_DQ_23AN6
SB_DQ_24AJ4
SB_DQ_25AK4
SB_DQ_26AJ1
SB_DQ_27AJ2
SB_DQ_28AM1
SB_DQ_29AN1
SB_DQ_30AK2
SB_DQ_31AK1
SB_DQ_32L2
SB_DQ_33M2
SB_DQ_34L4
SB_DQ_35M4
SB_DQ_36L1
SB_DQ_37M1
SB_DQ_38L5
SB_DQ_39M5
SB_DQ_40G7
SB_DQ_41J8
SB_DQ_42G8
SB_DQ_43G9
SB_DQ_44J7
SB_DQ_45J9
SB_DQ_46G10
SB_DQ_47J10
SB_DQ_48A8
SB_DQ_49B8
SB_DQ_50A9
SB_DQ_51B9
SB_DQ_52D8
SB_DQ_53E8
SB_DQ_54D9
SB_DQ_55E9
SB_DQ_56E15
SB_DQ_57D15
SB_DQ_58A15
SB_DQ_59B15
SB_DQ_60E14
SB_DQ_61D14
SB_DQ_62A14
SB_DQ_63B14
Haswell rPGA EDS
3 OF 9
JCPU1C
INTEL_HASWELL_HASWELL
Haswell rPGA EDS
3 OF 9
JCPU1C
INTEL_HASWELL_HASWELL
RSVDAC7
SA_CK_N_0U4
SA_CK_P_0V4
SA_CKE_0AD9
SA_CK_N_1U3
SA_CK_P_1V3
SA_CKE_1AC9
SA_CK_N_2U2
SA_CK_P_2V2
SA_CKE_2AD8
SA_CK_N_3U1
SA_CK_P_3V1
SA_CKE_3AC8
SA_CS_N_0M7
SA_CS_N_1L9
SA_CS_N_2M9
SA_CS_N_3M10
SA_ODT_0M8
SA_ODT_1L7
SA_ODT_2L8
SA_ODT_3L10
SA_BS_0V5
SA_BS_1U5
SA_BS_2AD1
VSSV10
SA_RASU6
SA_WEU7
SA_CASU8
SA_MA_0V8
SA_MA_1AC6
SA_MA_10V6
SA_MA_11AC1
SA_MA_12AD4
SA_MA_13V7
SA_MA_14AD3
SA_MA_15AD2
SA_MA_2V9
SA_MA_3U9
SA_MA_4AC5
SA_MA_5AC4
SA_MA_6AD6
SA_MA_7AC3
SA_MA_8AD5
SA_MA_9AC2
SA_DQS_N_0AP15
SA_DQS_N_1AP8
SA_DQS_N_2AJ8
SA_DQS_N_3AF3
SA_DQS_N_4J3
SA_DQS_N_5E2
SA_DQS_N_6C5
SA_DQS_N_7C11
SA_DQS_P_0AP14
SA_DQS_P_1AP9
SA_DQS_P_2AK8
SA_DQS_P_3AG3
SA_DQS_P_4H3
SA_DQS_P_5E3
SA_DQS_P_6C6
SA_DQS_P_7C12
SA_DQ_0AR15
SA_DQ_1AT14
SA_DQ_2AM14
SA_DQ_3AN14
SA_DQ_4AT15
SA_DQ_5AR14
SA_DQ_6AN15
SA_DQ_7AM15
SA_DQ_8AM9
SA_DQ_9AN9
SA_DQ_10AM8
SA_DQ_11AN8
SA_DQ_12AR9
SA_DQ_13AT9
SA_DQ_14AR8
SA_DQ_15AT8
SA_DQ_16AJ9
SA_DQ_17AK9
SA_DQ_18AJ6
SA_DQ_19AK6
SA_DQ_20AJ10
SA_DQ_21AK10
SA_DQ_22AJ7
SA_DQ_23AK7
SA_DQ_24AF4
SA_DQ_25AF5
SA_DQ_26AF1
SA_DQ_27AF2
SA_DQ_28AG4
SA_DQ_29AG5
SA_DQ_30AG1
SA_DQ_31AG2
SA_DQ_32J1
SA_DQ_33J2
SA_DQ_34J5
SA_DQ_35H5
SA_DQ_36H2
SA_DQ_37H1
SA_DQ_38J4
SA_DQ_39H4
SA_DQ_40F2
SA_DQ_41F1
SA_DQ_42D2
SA_DQ_43D3
SA_DQ_44D1
SA_DQ_45F3
SA_DQ_46C3
SA_DQ_47B3
SA_DQ_48B5
SA_DQ_49E6
SA_DQ_50A5
SA_DQ_51D6
SA_DQ_52D5
SA_DQ_53E5
SA_DQ_54B6
SA_DQ_55A6
SA_DQ_56E12
SA_DQ_57D12
SA_DQ_58B11
SA_DQ_59A11
SA_DQ_60E11
SA_DQ_61D11
SA_DQ_62B12
SA_DQ_63A12
SM_VREFAM3
SA_DIMM_VREFDQF16
SB_DIMM_VREFDQF13
T3 PAD~D@ T3 PAD~D@
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CAD Note:Trace width=20 mils ,Spacing=25mil,
Max length=100 mils.
COMPENSATION PU FOR eDP
HPD INVERSION FOR EDP08/07 Change RC78 to 10K
FDI_CTX_PRX_N1
FDI_CTX_PRX_N0FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
EDP_COMP
EDP_COMP
EDP_HPD
EDP_HPD
EDP_CPU_C_AUX#EDP_CPU_C_AUX
EDP_CPU_C_LANE_P1EDP_CPU_C_LANE_N1EDP_CPU_C_LANE_P0EDP_CPU_C_LANE_N0
FDI_CTX_PRX_N0 [14]
FDI_CTX_PRX_N1 [14]FDI_CTX_PRX_P0 [14]
FDI_CTX_PRX_P1 [14]
EDP_CPU_LANE_N0 [36]EDP_CPU_LANE_P0 [36]EDP_CPU_LANE_N1 [36]EDP_CPU_LANE_P1 [36]
EDP_CPU_AUX# [36]EDP_CPU_AUX [36]
CPU_EDP_HPD#[36]
+VCCIOA_OUT
+VCCIO_OUT
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
CPU-FDI,eDP,DDI
Custom
7 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
CPU-FDI,eDP,DDI
Custom
7 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
CPU-FDI,eDP,DDI
Custom
7 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.
G
D
S
QH1
BSS138W-7-F_SOT323-3
SB000002X00
G
D
S
QH1
BSS138W-7-F_SOT323-3
SB000002X00
2
13
RC78
10K_0402_5%
RC78
10K_0402_5%
12
C126 0.1U_0402_25V6C126 0.1U_0402_25V61 2
C129 0.1U_0402_25V6C129 0.1U_0402_25V61 2
Haswell rPGA EDS
eDP
DDI
8 OF 9
JCPU1H
INTEL_HASWELL_HASWELL
Haswell rPGA EDS
eDP
DDI
8 OF 9
JCPU1H
INTEL_HASWELL_HASWELL
DDIB_TXBN_0T28
DDIB_TXBP_0U28
DDIB_TXBN_1T30
DDIB_TXBP_1U30
DDIB_TXBN_2U29
DDIB_TXBP_2V29
DDIB_TXBN_3U31
DDIB_TXBP_3V31
DDIC_TXCN_0T34
DDIC_TXCP_0U34
DDIC_TXCN_1U35
DDIC_TXCP_1V35
DDIC_TXCN_2U32
DDIC_TXCP_2T32
DDIC_TXCN_3U33
DDIC_TXCP_3V33
DDID_TXDN_0P29
DDID_TXDP_0R29
DDID_TXDN_1N28
DDID_TXDP_1P28
DDID_TXDN_2P31
DDID_TXDP_2R31
DDID_TXDN_3N30
DDID_TXDP_3P30
EDP_AUXNM27
EDP_AUXPN27
EDP_HPDP27
EDP_TXN_0P35
EDP_TXN_1N34EDP_TXP_0R35
EDP_TXP_1P34
EDP_RCOMPE24
EDP_DISP_UT ILR27
FDI_TXN_0P33
FDI_TXP_0R33
FDI_TXN_1N32
FDI_TXP_1P32
RC
79
10
0K
_0
40
2_
5%
RC
79
10
0K
_0
40
2_
5%
12
C127 0.1U_0402_25V6C127 0.1U_0402_25V61 2
C131 0.1U_0402_25V6C131 0.1U_0402_25V61 2
RC7724.9_0402_1% RC7724.9_0402_1%
12
C128 0.1U_0402_25V6C128 0.1U_0402_25V61 2
T119 PAD@T119 PAD@
C130 0.1U_0402_25V6C130 0.1U_0402_25V61 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CFG STRAPS for CPU
PEG Static Lane Reversal - CFG2 is for the 16x
CFG2
1:(Default) Normal Operation; Lane #
definition matches socket pin map definition
0:Lane Reversed
CFG4
1 : Disabled; No Physical Display Port
attached to Embedded Display Port
0 : Enabled; An external Display Port device is
connected to the Embedded Display Port
Display Port Presence Strap
11: (Default) x16 - Device 1 functions 1 and 2 disabled
10: x8, x8 - Device 1 function 1 enabled ; function 2
disabledCFG[6:5]
PCIE Port Bifurcation Straps
01: Reserved - (Device 1 function 1 disabled ; function
2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
1: (Default) PEG Train immediately
following xxRESETB de assertionCFG7
PEG DEFER TRAINING
0: PEG Wait for BIOS for training
07/10 Delete RC106 and RC107
09/21 Reserve CFG9 PD RC106
CFG4
CFG17CFG19
CFG16CFG18
CFG10CFG11
CFG14CFG15
CFG1CFG2
CFG0
CFG3CFG4CFG5CFG6CFG7CFG8CFG9
CFG12CFG13
CFG6
CFG5
CFG_RCOMPH_CPU_RSVD
H_CPU_TESTLO
CFG2
CFG7
CFG_RCOMP
H_CPU_RSVD
H_CPU_TESTLO
CFG9
CFG12[5]CFG13[5]CFG14[5]CFG15[5]
CFG8[5]CFG9[5]CFG10[5]CFG11[5]
CFG4[5]CFG5[5]CFG6[5]CFG7[5]
CFG0[5]CFG1[5]CFG2[5]CFG3[5]
CFG16 [5]
CFG19 [5]
CFG18 [5]CFG17 [5]
+VCC_CORE
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
CPU-RSVD,CFG
Custom
8 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
CPU-RSVD,CFG
Custom
8 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
CPU-RSVD,CFG
Custom
8 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.
T16 PAD~D@T16 PAD~D@R
C8
71
K_
04
02
_1
%@
RC
87
1K
_0
40
2_
1%
@
12
RC84 49.9_0402_1%RC84 49.9_0402_1%
12
RC
82
1K
_0
40
2_
1%
@R
C8
21
K_
04
02
_1
%@
12
RC85 49.9_0402_1%RC85 49.9_0402_1%
12
T15 PAD~D@T15 PAD~D@
RC
80
1K
_0
40
2_
1%
@R
C8
01
K_
04
02
_1
%@
12
RC
83
1K
_0
40
2_
1%
@R
C8
31
K_
04
02
_1
%@
12
T12 PAD~D@T12 PAD~D@
T26 PAD~D@T26 PAD~D@T28 PAD~D@T28 PAD~D@
RC
81
1K
_0
40
2_
1%
RC
81
1K
_0
40
2_
1%
12
T17 PAD~D@T17 PAD~D@
RC86 49.9_0402_1%RC86 49.9_0402_1%
12
Haswell rPGA EDS
9 OF 9
JCPU1I
INTEL_HASWELL_HASWELL
Haswell rPGA EDS
9 OF 9
JCPU1I
INTEL_HASWELL_HASWELL
RSVD_TPAT1
RSVD_TPAT2
RSVDAD10
RSVD_TPA34
RSVD_TPA35
RSVD_TPW29
RSVD_TPW28
TESTLO_G26G26
VSSW33
RSVDAL30
RSVDAL29
VCCF25
RSVD_TPC35
RSVD_TPB35
RSVD_TPAL25
RSVD_TPW30
RSVD_TPW31
TESTLOW34
CFG_0AT20
CFG_1AR20
CFG_2AP20
CFG_3AP22
CFG_4AT22
CFG_5AN22
CFG_6AT25
CFG_7AN23
CFG_8AR24
CFG_9AT23
CFG_10AN20
CFG_11AP24
CFG_12AP26
CFG_13AN25
CFG_14AN26
CFG_15AP25
RSVD_TPC23
RSVD_TPB23
RSVD_TPD24
RSVD_TPD23
CFG_RCOMPAT31
CFG_16AR21
CFG_18AR23
CFG_17AP21
CFG_19AP23
RSVDAR33
FC_G6G6
RSVDAM27
RSVDAM26
RSVDF5
RSVDAM2
RSVDK6
RSVD_TPAR1
RSVDE18
RSVDA2
RSVD_TPE21
RSVD_TPE20
VSSAP27
VSSAR26
VSSAL31
VSSAL32
NCB1
RSVDU10
RSVDP10
RC
10
61
K_
04
02
_1
%@
RC
10
61
K_
04
02
_1
%@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VCC_SENSE
CAD Note: RC101 SHOULD BE PLACED CLOSE TO CPU
CAD Note: RC104 SHOULD BE PLACED CLOSE TO CPU
+1.35VS Source
VDDQ DECOUPLING
# 04/02 change Pin name by Intel update
# 04/02 change Pin name by Intel update
07/25 Delete RC96
08/06 Reserve CC87
09/11 Change netname to VCCSENSE
09/11 Delete RC102 and RC103
09/11 Delete RC93 and connect SLP_S3# to QC5.5
10/16 Add Q80
10/18 Delete Q80, R461, Q2, RC90. Modify +1.35VS power circuit
11/06 Change QC5A.2 and QC5B.5 connection to SLP_S3
12/12 Uninstall QC4,RC92,CC39,RC89,QC5 and RC88. Add J4.
12/13 Install RC88
VCCSENSE
VR_SVID_ALRT#VR_SVID_CLKVR_SVID_DAT
VCCSENSE
VSSSENSE
RUN_ON_CPU1.5VS3
CPU_PWR_DEBUG
SLP_S3
RUN_ON_CPU1.5VS3 [11,12]
VSSSENSE[10,47]
VCCSENSE[47]
VR_SVID_CLK[47]
CPU_PWR_DEBUG[5]
SLP_S3[34,49]
VR_SVID_ALRT#[47]
VR_SVID_DAT[47]
+1.35VS
+VCC_CORE
+VCC_CORE
+VCCIOA_OUT
+VCC_CORE
+VCCIO_OUT
+VCC_CORE
+1.35VS
+1.35V
B+ +1.35VS
+1.05VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
CPU- PWR
Custom
9 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
CPU- PWR
Custom
9 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
CPU- PWR
Custom
9 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.
CC38 0.1U_0402_10V6KCC38 0.1U_0402_10V6K12QC5B2N7002DWH_SOT363-6
@
QC5B2N7002DWH_SOT363-6
@
34
5
CC
46
10
U_
06
03
_6
.3V
6M
CC
46
10
U_
06
03
_6
.3V
6M
1
2
RC
10
41
00
_0
40
2_
1%
RC
10
41
00
_0
40
2_
1%
12
+CC87
33
0U
_D
2_
2V
_Y
@ +CC87
33
0U
_D
2_
2V
_Y
@
1
2
CH
32
2U
_0
80
5_
6.3
V6
MC
H3
22
U_
08
05
_6
.3V
6M
1
2
CC
50
10
U_
06
03
_6
.3V
6M
CC
50
10
U_
06
03
_6
.3V
6M
1
2
R620
K_
04
02
_5
%
@
R620
K_
04
02
_5
%
@
12
QC5A
2N7002DWH_SOT363-6
@
QC5A
2N7002DWH_SOT363-6
@
61
2CC40 0.1U_0402_10V6KCC40 0.1U_0402_10V6K12
CH
82
2U
_0
80
5_
6.3
V6
MC
H8
22
U_
08
05
_6
.3V
6M
1
2
CC
49
10
U_
06
03
_6
.3V
6M
CC
49
10
U_
06
03
_6
.3V
6M
1
2
Haswell rPGA EDS
5 OF 9
JCPU1E
INTEL_HASWELL_HASWELL
Haswell rPGA EDS
5 OF 9
JCPU1E
INTEL_HASWELL_HASWELL
RSVDK27
RSVDL27
RSVDT27
RSVDV27
VDDQAB11
VDDQAB2
VDDQAB5
VDDQAB8
VDDQAE11
VDDQAE2
VDDQAE5
VDDQAE8
VDDQAH11
VDDQK11
VDDQN11
VDDQN8
VDDQT11
VDDQT2
VDDQT5
VDDQT8
VDDQW11
VDDQW2
VDDQW5
VDDQW8
RSVDN26
VCCK26
RSVDAL27
RSVDAK27
VCC_SENSEAL35
RSVDE17
VCCIO_OUTAN35
FC_A23A23
VCOMP_OUTF22
RSVDW32
RSVDAL16
RSVDJ27
RSVDAL13
VIDALERTAM28
VIDSCLKAM29
VIDSOUTAL28
VSSAP35
PWR_DEBUGH27
VSSAP34
RSVD_TPAT35
RSVD_TPAR35
RSVD_TPAR32
RSVD_TPAL26
VSSAT34
VSSAL22
VSSAT33
VSSAM21
VSSAM25
VSSAM22
VSSAM20
VSSAM24
VSSAL19
VSSAM23
VSSAT32
VCCAA26
VCCAA28
VCCAA34
VCCAA30
VCCAA32
VCCAB26
VCCAB29
VCCAB25
VCCAB27
VCCAB28
VCCAB30
VCCAB31
VCCAB33
VCCAB34
VCCAB32
VCCAC26
VCCAB35
VCCAC28
VCCAD25
VCCAC30
VCCAD28
VCCAC32
VCCAD31
VCCAC34
VCCAD34
VCCAD26
VCCAD27
VCCAD29
VCCAD30
VCCAD32
VCCAD33
VCCAD35
VCCAE26
VCCAE32
VCCAE28
VCCAE30
VCCAG28
VCCAG34
VCCAE34
VCCAF25
VCCAF26
VCCAF27
VCCAF28
VCCAF29
VCCAF30
VCCAF31
VCCAF32
VCCAF33
VCCAF34
VCCAF35
VCCAG26
VCCAH26
VCCAH29
VCCAG30
VCCAG32
VCCAH32
VCCAH35
VCCAH25
VCCAH27
VCCAH28
VCCAH30
VCCAH31
VCCAH33
VCCAH34
VCCAJ25
VCCAJ26
VCCAJ27
VCCAJ28
VCCAJ29
VCCAJ30
VCCAJ31
VCCAJ32
VCCAJ33
VCCAJ34
VCCAJ35
VCCG25
VCCH25
VCCJ25
VCCK25
VCCL25
VCCM25
VCCN25
VCCP25
VCCR25
VCCT25
VCCU25
VCCU26
VCCV25
VCCV26
VCCW26
VCCW27
VCCY25
VCCY26
VCCY27
VCCY28
VCCY29
VCCY30
VCCY31
VCCY32
VCCY33
VCCY34
VCCY35
T50 PAD~D@ T50 PAD~D@
QC4SI7326DN-T1-E3_PAK1212-8
@QC4SI7326DN-T1-E3_PAK1212-8
@
352
4
1
CC390.1U_0402_25V6
@CC390.1U_0402_25V6
@
1
2
RC
98
15
0_
04
02
_1
%R
C9
81
50
_0
40
2_
1%
12
CH
22
2U
_0
80
5_
6.3
V6
MC
H2
22
U_
08
05
_6
.3V
6M
1
2
CH
12
2U
_0
80
5_
6.3
V6
MC
H1
22
U_
08
05
_6
.3V
6M
1
2
RC89470_0603_5%@RC89470_0603_5%@
12
T51 PAD~D@ T51 PAD~D@
RC88100K_0402_5%RC88100K_0402_5%
12
CC
44
10
U_
06
03
_6
.3V
6M
CC
44
10
U_
06
03
_6
.3V
6M
1
2
CH
42
2U
_0
80
5_
6.3
V6
MC
H4
22
U_
08
05
_6
.3V
6M
1
2
CH
10
22
U_
08
05
_6
.3V
6M
CH
10
22
U_
08
05
_6
.3V
6M
1
2
CH
72
2U
_0
80
5_
6.3
V6
MC
H7
22
U_
08
05
_6
.3V
6M
1
2
RC92330K_0402_5%
@RC92
330K_0402_5%
@
12
CC
51
10
U_
06
03
_6
.3V
6M
CC
51
10
U_
06
03
_6
.3V
6M
1
2
CC
45
10
U_
06
03
_6
.3V
6M
CC
45
10
U_
06
03
_6
.3V
6M
1
2
CC
48
10
U_
06
03
_6
.3V
6M
CC
48
10
U_
06
03
_6
.3V
6M
1
2
T53 PAD~D@ T53 PAD~D@
+CC41
33
0U
_D
2_
2V
_Y
+CC41
33
0U
_D
2_
2V
_Y
1
2
CC
42
10
U_
06
03
_6
.3V
6M
CC
42
10
U_
06
03
_6
.3V
6M
1
2
RC
10
11
00
_0
40
2_
1%
RC
10
11
00
_0
40
2_
1%
12
T54 PAD~D@ T54 PAD~D@
CH
11
22
U_
08
05
_6
.3V
6M
CH
11
22
U_
08
05
_6
.3V
6M
1
2
CH
62
2U
_0
80
5_
6.3
V6
MC
H6
22
U_
08
05
_6
.3V
6M
1
2
CC
43
10
U_
06
03
_6
.3V
6M
CC
43
10
U_
06
03
_6
.3V
6M
1
2
CC
47
10
U_
06
03
_6
.3V
6M
CC
47
10
U_
06
03
_6
.3V
6M
1
2
CH
92
2U
_0
80
5_
6.3
V6
MC
H9
22
U_
08
05
_6
.3V
6M
1
2
CH
52
2U
_0
80
5_
6.3
V6
MC
H5
22
U_
08
05
_6
.3V
6M
1
2
T52 PAD~D@ T52 PAD~D@
J4
JUMP_43X79
J4
JUMP_43X79
11
22
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
09/11 Change netname to VSSSENSE
VSSSENSE [47,9]
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
CPU-VSS
Custom
10 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
CPU-VSS
Custom
10 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
CPU-VSS
Custom
10 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.
Haswell rPGA EDS
7 OF 9
JCPU1G
INTEL_HASWELL_HASWELL
Haswell rPGA EDS
7 OF 9
JCPU1G
INTEL_HASWELL_HASWELL
VSSB34
VSSB4
VSSB7
VSSC1
VSSC10
VSSC13
VSSC16
VSSC19
VSSC2
VSSC22
VSSC24
VSSC26
VSSC28
VSSC30
VSSC32
VSSC34
VSSC4
VSSC7
VSSD10
VSSD13
VSSD16
VSSD19
VSSD22
VSSD25
VSSD27
VSSD29
VSSD31
VSSD33
VSSD35
VSSD4
VSSD7
VSSE1
VSSE10
VSSE13
VSSE16
VSSE4
VSSE7
VSSF10
VSSF11
VSSF12
VSSF14
VSSF15
VSSF17
VSSF18
VSSF20
VSSF21
VSSF23
VSSF24
VSSF26
VSSF28
VSSF30
VSSF32
VSSF34
VSSF4
VSSF6
VSSF7
VSSF8
VSSF9
VSSG1
VSSG11
VSSG2
VSSG27
VSSG29
VSSG3
VSSG31
VSSG33
VSSG35
VSSG4
VSSG5
VSSH10
VSSH26
VSSH6
VSSH7
VSSJ11
VSSJ26
VSSJ28
VSSJ30
VSSJ32
VSSJ34
VSSJ6
VSSK1
VSSK10
VSSK2
VSSK29
VSSK3
VSSK31
VSSK33
VSSK35
VSSK4
VSSK5
VSSK7
VSSK8
VSSK9
VSSL11
VSSL26
VSSL6
VSSM11
VSSM26
VSSM28
VSSM30
VSSM32
VSSM34
VSSM6
VSSN1
VSSN10
VSSN2
VSSN29
VSSN3
VSSN31
VSSN33
VSSN35
VSSN4
VSSN5
VSSN6
VSSN7
VSSN9
VSSP11
VSSP26
VSSP5
VSSR11
VSSR26
VSSR28
VSSR30
VSSR32
VSSR34
VSSR5
VSST1
VSST10
VSST29
VSST3
VSST31
VSST33
VSST35
VSST4
VSST6
VSST7
VSST9
VSSU11
VSSU27
VSSV11
VSSV28
VSSV30
VSSV32
VSSV34
VSSW1
VSSW10
VSSW3
VSSW35
VSSW4
VSSW6
VSSW7
VSSW9
VSSY11
VSSH11
VSSAL24
VSSF19
VSST26
VSS_SENSEAK35
RSVDAK33
Haswell rPGA EDS
6 OF 9
JCPU1F
INTEL_HASWELL_HASWELL
Haswell rPGA EDS
6 OF 9
JCPU1F
INTEL_HASWELL_HASWELL
VSSA10
VSSA13
VSSA16
VSSA19
VSSA22
VSSA25
VSSA27
VSSA29
VSSA3
VSSA31
VSSA33
VSSA4
VSSA7
VSSAA11
VSSAA25
VSSAA27
VSSAA31
VSSAA29
VSSAB1
VSSAB10
VSSAA33
VSSAA35
VSSAB3
VSSAC25
VSSAC27
VSSAB4
VSSAB6
VSSAB7
VSSAB9
VSSAC11
VSSAD11
VSSAC29
VSSAC31
VSSAC33
VSSAC35
VSSAD7
VSSAE1
VSSAE10
VSSAE25
VSSAE29
VSSAE3
VSSAE27
VSSAE35
VSSAE4
VSSAE6
VSSAE7
VSSAE9
VSSAF11
VSSAF6
VSSAF8
VSSAG11
VSSAG25
VSSAE31
VSSAG31
VSSAE33
VSSAG6
VSSAH1
VSSAH10
VSSAH2
VSSAG27
VSSAG29
VSSAH3
VSSAG33
VSSAG35
VSSAH4
VSSAH5
VSSAH6
VSSAH7
VSSAH8
VSSAH9
VSSAJ11
VSSAJ5
VSSAK11
VSSAK25
VSSAK26
VSSAK28
VSSAK29
VSSAK30
VSSAK32
VSSE19
VSSAK34
VSSAK5
VSSAL1
VSSAL10
VSSAL11
VSSAL12
VSSAL14
VSSAL15
VSSAL17
VSSAL18
VSSAL2
VSSAL20
VSSAL21
VSSAL23
VSSE22
VSSAL3
VSSAL4
VSSAL5
VSSAL6
VSSAL7
VSSAL8
VSSAL9
VSSAM10
VSSAM13
VSSAM16
VSSAM19
VSSE25
VSSAM32
VSSAM4
VSSAM7
VSSAN10
VSSAN13
VSSAN16
VSSAN19
VSSAN2
VSSAN21
VSSAN24
VSSAN27
VSSAN30
VSSAN34
VSSAN4
VSSAN7
VSSAP1
VSSAP10
VSSAP13
VSSAP16
VSSAP19
VSSAP4
VSSAP7
VSSW25
VSSAR10
VSSAR13
VSSAR16
VSSAR19
VSSAR2
VSSAR22
VSSAR25
VSSAR28
VSSAR31
VSSAR34
VSSAR4
VSSAR7
VSSAT10
VSSAT13
VSSAT16
VSSAT19
VSSAT21
VSSAT24
VSSAT27
VSSAT3
VSSAT30
VSSAT4
VSSAT7
VSSB10
VSSB13
VSSB16
VSSB19
VSSB2
VSSB22
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Populate RD1, De-Populate RD7 for Intel DDR3
VREFDQ multiple methods M1
Populate RD7, De-Populate RD1 for Intel DDR3
VREFDQ multiple methods M3
All VREF traces should
have 10 mil trace width
Layout Note:
Place near JDIMM1
Layout Note:
Place near JDIMM1.203,204
JDIMM1 H=5.2mm BOT
All VREF traces should
have 10 mil trace width
JDIMM1 H=4mm TOP
ReverseStandard
07/10 Change by HP request
07/10 Change by HP request
07/10 Change by HP request
07/17 Rename JP3 to JDIMM1
08/03 Change RD6 to 33 ohms
08/07 Change JDIMM1 footprint
DDR_A_D0DDR_A_D1
DDR_A_D2DDR_A_D3
DDR_A_D4DDR_A_D5
DDR_A_D6DDR_A_D7
DDR_A_D8
DDR_A_D10DDR_A_D11
DDR_A_D19
DDR_A_D21
DDR_A_D26DDR_A_D27
DDR_A_D28DDR_A_D29
DDR_A_D32
DDR_A_D34DDR_A_D35
DDR_A_D36DDR_A_D37
DDR_A_D40DDR_A_D41
DDR_A_D42DDR_A_D43
DDR_A_D45
DDR_A_D46
DDR_A_D49
DDR_A_D50DDR_A_D51
DDR_A_D52DDR_A_D53
DDR_A_D55
DDR_A_D56DDR_A_D57
DDR_A_D58DDR_A_D59
DDR_A_D60DDR_A_D61
DDR_A_D62
DDR_A_MA2DDR_A_MA0DDR_A_MA1
DDR_A_MA3
DDR_A_MA4DDR_A_MA5DDR_A_MA6DDR_A_MA8
DDR_A_MA7DDR_A_MA9
DDR_A_MA10
DDR_A_MA11DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7
DDR_A_BS0DDR_A_BS1
DDR_A_BS2
DDR_CS1_DIMMA#
DDR_CS0_DIMMA#
M_CLK_A_DDR0M_CLK_A_DDR#0
M_CLK_A_DDR1M_CLK_A_DDR#1
DDR_CKE0_DIMMA DDR_CKE1_DIMMA
DDR_A_CAS#
DDR_A_RAS#
DDR_A_WE#M_A_ODT0
M_A_ODT1
DDR_A_D63
DDR_A_MA15
DDR_A_D23
DDR_A_D31
DDR_A_D17
DDR_A_D9 DDR_A_D13
DDR_A_D20DDR_A_D16
DDR_A_D25
DDR_A_D30
DDR_A_D24
DDR_A_D14DDR_A_D15
DDR_A_D12
DDR_A_D22
DDR_A_D39
DDR_A_D54
DDR_A_D33
DDR_A_D38
DDR_A_D47
DDR_A_D44
DDR_A_D48
DDR3_DRAMRST#_R
DDR_A_D18
DDR_A_D18
DDR_A_D0DDR_A_D1
DDR_A_D2DDR_A_D3
DDR_A_D4DDR_A_D5
DDR_A_D6DDR_A_D7
DDR_A_D8
DDR_A_D10DDR_A_D11
DDR_A_D19
DDR_A_D21
DDR_A_D26DDR_A_D27
DDR_A_D28DDR_A_D29
DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_D23
DDR_A_D31
DDR_A_D17
DDR_A_D9 DDR_A_D13
DDR_A_D20DDR_A_D16
DDR_A_D25
DDR_A_D30
DDR_A_D24
DDR_A_D14DDR_A_D15
DDR_A_D12
DDR_A_D22
DDR3_DRAMRST#_R
DDR_XDP_WAN_SMBDATDDR_XDP_WAN_SMBCLK
DDR_A_MA1DDR_A_MA3
DDR_A_MA5DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA12
DDR_A_MA13
DDR_A_BS0
DDR_A_BS2
DDR_CS3_DIMMA#
M_CLK_A_DDR2M_CLK_A_DDR#2
DDR_CKE2_DIMMA
DDR_A_CAS#
DDR_A_D33
DDR_A_D48
DDR_A_D32
DDR_A_D34DDR_A_D35
DDR_A_D40DDR_A_D41
DDR_A_D42DDR_A_D43
DDR_A_D49
DDR_A_D50DDR_A_D51
DDR_A_D56DDR_A_D57
DDR_A_D58DDR_A_D59
DDR_A_DQS4
DDR_A_DQS6
DDR_A_DQS#4
DDR_A_DQS#6
DDR_A_MA2DDR_A_MA0
DDR_A_MA4DDR_A_MA6
DDR_A_MA7DDR_A_MA11
DDR_A_MA14
DDR_A_BS1
M_CLK_A_DDR3M_CLK_A_DDR#3
DDR_CKE3_DIMMA
DDR_A_RAS#
M_A_ODT2
M_A_ODT3
DDR_A_MA15
DDR_A_D39
DDR_A_D54
DDR_A_D38
DDR_A_D47
DDR_A_D44
DDR_A_D36DDR_A_D37
DDR_A_D45
DDR_A_D46
DDR_A_D52DDR_A_D53
DDR_A_D55
DDR_A_D60DDR_A_D61
DDR_A_D62
DDR_A_DQS5
DDR_A_DQS7
DDR_A_DQS#5
DDR_A_DQS#7
DDR_A_D63
DDR_CS2_DIMMA#DDR_A_WE#
RUN_ON_CPU1.5VS3
DDR_A_DQS#[0..7][6]
DDR_A_DQS[0..7][6]
DDR_A_MA[0..15][6]
DDR_A_D[0..63][6]
DDR_CKE0_DIMMA[6]
DDR_A_BS2[6]
DDR_A_BS0[6]
DDR_A_WE#[6]DDR_A_CAS#[6]
M_CLK_A_DDR0[6]M_CLK_A_DDR#0[6]
DDR_CS1_DIMMA#[6]
DDR_CKE1_DIMMA [6]
M_CLK_A_DDR#1 [6]M_CLK_A_DDR1 [6]
M_A_ODT1 [6]
M_A_ODT0 [6]DDR_CS0_DIMMA# [6]
DDR_A_RAS# [6]DDR_A_BS1 [6]
DDR_XDP_WAN_SMBDAT [12,13,16,28,38,5]DDR_XDP_WAN_SMBCLK [12,13,16,28,38,5]
M_CLK_A_DDR2[6]M_CLK_A_DDR#2[6]
DDR_CS3_DIMMA#[6]
DDR_CKE2_DIMMA[6] DDR_CKE3_DIMMA [6]
M_CLK_A_DDR#3 [6]M_CLK_A_DDR3 [6]
M_A_ODT3 [6]
M_A_ODT2 [6]DDR_CS2_DIMMA# [6]
DDR3_DRAMRST#_R[12] CPU_DRAM_RST# [5]
RUN_ON_CPU1.5VS3[12,9]
+0.675VS
+1.35V
+0.675VS+0.675VS
+DIMM_VREF_CA
+1.35V
+1.35V
+DIMM_A_DQ
+1.35V
+3VS
+1.35V
+DIMM01_VREF_DQ
+3VS
+0.675VS
+DIMM_A_DQ
+0.675VS
+1.35V +1.35V
+1.35V +1.35V
+SM_VREF_CA
+DIMM_VREF_CA
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
DDRIII DIMM1&2
Custom
11 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
DDRIII DIMM1&2
Custom
11 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
DDRIII DIMM1&2
Custom
11 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.
CD
19
2.2
U_0402_6.3
V6M
CD
19
2.2
U_0402_6.3
V6M
1
2
RD
23
1K
_0402_1%
RD
23
1K
_0402_1%
12
CD
11
10U
_0603_6.3
V6M
CD
11
10U
_0603_6.3
V6M
1
2
CD
10
10U
_0603_6.3
V6M
CD
10
10U
_0603_6.3
V6M
1
2
RD24 1K_0402_1%RD24 1K_0402_1%
1 2
CD
12
10U
_0603_6.3
V6M
CD
12
10U
_0603_6.3
V6M
1
2
CD
25
0.1
U_0402_16V
4Z
CD
25
0.1
U_0402_16V
4Z
1
2
CD
18
0.1
U_0402_16V
4Z
CD
18
0.1
U_0402_16V
4Z
1
2
CD
32.2
U_0402_6.3
V6M
CD
32.2
U_0402_6.3
V6M
1
2
CD
26
2.2
U_0402_6.3
V6M
CD
26
2.2
U_0402_6.3
V6M
1
2
CD
40.1
U_0402_16V
4Z
CD
40.1
U_0402_16V
4Z
1
2
JDIMM1
FOX_AS0A626-U4RN-7FCONN@
JDIMM1
FOX_AS0A626-U4RN-7FCONN@
VREF_DQ1
VSS12
VSS23
DQ44
DQ05
DQ56
DQ17
VSS38
VSS49
DQS#010
DM011
DQS012
VSS513
VSS614
DQ215
DQ616
DQ317
DQ718
VSS719
VSS820
DQ821
DQ1222
DQ923
DQ1324
VSS925
VSS1026
DQS#127
DM128
DQS129
RESET#30
VSS1131
VSS1232
DQ1033
DQ1434
DQ1135
DQ1536
VSS1337
VSS1438
DQ1639
DQ2040
DQ1741
DQ2142
VSS1543
VSS1644
DQS#245
DM246
DQS247
VSS1748
VSS1849
DQ2250
DQ1851
DQ2352
DQ1953
VSS1954
VSS2055
DQ2856
DQ2457
DQ2958
DQ2559
VSS2160
VSS2261
DQS#362
DM363
DQS364
VSS2365
VSS2466
DQ2667
DQ3068
DQ2769
DQ3170
VSS2571
VSS2672
A12/BC#83
A1184
A985
A786
VDD587
VDD688
A889
A690
CKE073
CKE174
VDD175
VDD276
NC177
A1578
BA279
A1480
VDD381
VDD482
A591
A492
VDD793
VDD894
A395
A296
A197
A098
VDD999
VDD10100
CK0101
CK1102
CK0#103
CK1#104
VDD11105
VDD12106
A10/AP107
BA1108
BA0109
RAS#110
VDD13111
VDD14112
WE#113
S0#114
CAS#115
ODT0116
VDD15117
VDD16118
A13119
ODT1120
S1#121
NC2122
VDD17123
VDD18124
NCTEST125
VREF_CA126
VSS27127
VSS28128
DQ32129
DQ36130
DQ33131
DQ37132
VSS29133
VSS30134
DQS#4135
DM4136
DQS4137
VSS31138
VSS32139
DQ38140
DQ34141
DQ39142
DQ35143
VSS33144
VSS34145
DQ44146
DQ40147
DQ45148
DQ41149
VSS35150
VSS36151
DQS#5152
DM5153
DQS5154
VSS37155
VSS38156
DQ42157
DQ46158
DQ43159
DQ47160
VSS39161
VSS40162
DQ48163
DQ52164
DQ49165
DQ53166
VSS41167
VSS42168
DQS#6169
DM6170
DQS6171
VSS43172
VSS44173
DQ54174
DQ50175
DQ55176
DQ51177
VSS45178
VSS46179
DQ60180
DQ56181
DQ61182
DQ57183
VSS47184
VSS48185
DQS#7186
DM7187
DQS7188
VSS49189
VSS50190
DQ58191
DQ62192
DQ59193
DQ63194
VSS51195
VSS52196
SA0197
EVENT#198
VDDSPD199
SDA200
SA1201
SCL202
VTT1203
VTT2204
G1205
G2206
CD
24
1U
_0402_6.3
V6K
CD
24
1U
_0402_6.3
V6K
1
2
G
D S
QD2
2N7002KW_SOT323-3G
D S
QD2
2N7002KW_SOT323-32
1 3
CD
71U
_0402_6.3
V6K
CD
71U
_0402_6.3
V6K
1
2
CD
28
2.2
U_0402_6.3
V6M
CD
28
2.2
U_0402_6.3
V6M
1
2
CD
81U
_0402_6.3
V6K
CD
81U
_0402_6.3
V6K
1
2
CD
61U
_0402_6.3
V6K
CD
61U
_0402_6.3
V6K
1
2
CD
27
0.1
U_0402_16V
4Z
CD
27
0.1
U_0402_16V
4Z
1
2
CD
51U
_0402_6.3
V6K
CD
51U
_0402_6.3
V6K
1
2
G
DS
QD12N7002KW_SOT323-3
G
DS
QD12N7002KW_SOT323-3
2
13
CD
910U
_0603_6.3
V6M
CD
910U
_0603_6.3
V6M
1
2
CD
21
1U
_0402_6.3
V6K
CD
21
1U
_0402_6.3
V6K
1
2
RD
25
1K
_0402_1%
RD
25
1K
_0402_1%
12
CD
23
1U
_0402_6.3
V6K
CD
23
1U
_0402_6.3
V6K
1
2
CD
13
10U
_0603_6.3
V6M
CD
13
10U
_0603_6.3
V6M
1
2
RD26 1K_0402_1%RD26 1K_0402_1%
1 2
CD
22
1U
_0402_6.3
V6K
CD
22
1U
_0402_6.3
V6K
1
2
CD
14
10U
_0603_6.3
V6M
CD
14
10U
_0603_6.3
V6M
1
2
CD
20
0.1
U_0402_16V
4Z
CD
20
0.1
U_0402_16V
4Z
1
2
+ CD16330U_B2_2.5VM_R15M
SGA00004400
+ CD16330U_B2_2.5VM_R15M
SGA00004400
1
2
RD
21K
_0402_5%
RD
21K
_0402_5%
12 C
D2
0.1
U_0402_16V
4Z
CD
20.1
U_0402_16V
4Z
1
2RD6 33_0402_5%RD6 33_0402_5%1 2
JDIMM3
LCN_DAN06-K4406-0102CONN@
JDIMM3
LCN_DAN06-K4406-0102CONN@
VREF_DQ1
VSS12
VSS23
DQ44
DQ05
DQ56
DQ17
VSS38
VSS49
DQS#010
DM011
DQS012
VSS513
VSS614
DQ215
DQ616
DQ317
DQ718
VSS719
VSS820
DQ821
DQ1222
DQ923
DQ1324
VSS925
VSS1026
DQS#127
DM128
DQS129
RESET#30
VSS1131
VSS1232
DQ1033
DQ1434
DQ1135
DQ1536
VSS1337
VSS1438
DQ1639
DQ2040
DQ1741
DQ2142
VSS1543
VSS1644
DQS#245
DM246
DQS247
VSS1748
VSS1849
DQ2250
DQ1851
DQ2352
DQ1953
VSS1954
VSS2055
DQ2856
DQ2457
DQ2958
DQ2559
VSS2160
VSS2261
DQS#362
DM363
DQS364
VSS2365
VSS2466
DQ2667
DQ3068
DQ2769
DQ3170
VSS2571
VSS2672
A12/BC#83
A1184
A985
A786
VDD587
VDD688
A889
A690
CKE073
CKE174
VDD175
VDD276
NC177
A1578
BA279
A1480
VDD381
VDD482
A591
A492
VDD793
VDD894
A395
A296
A197
A098
VDD999
VDD10100
CK0101
CK1102
CK0#103
CK1#104
VDD11105
VDD12106
A10/AP107
BA1108
BA0109
RAS#110
VDD13111
VDD14112
WE#113
S0#114
CAS#115
ODT0116
VDD15117
VDD16118
A13119
ODT1120
S1#121
NC2122
VDD17123
VDD18124
NCTEST125
VREF_CA126
VSS27127
VSS28128
DQ32129
DQ36130
DQ33131
DQ37132
VSS29133
VSS30134
DQS#4135
DM4136
DQS4137
VSS31138
VSS32139
DQ38140
DQ34141
DQ39142
DQ35143
VSS33144
VSS34145
DQ44146
DQ40147
DQ45148
DQ41149
VSS35150
VSS36151
DQS#5152
DM5153
DQS5154
VSS37155
VSS38156
DQ42157
DQ46158
DQ43159
DQ47160
VSS39161
VSS40162
DQ48163
DQ52164
DQ49165
DQ53166
VSS41167
VSS42168
DQS#6169
DM6170
DQS6171
VSS43172
VSS44173
DQ54174
DQ50175
DQ55176
DQ51177
VSS45178
VSS46179
DQ60180
DQ56181
DQ61182
DQ57183
VSS47184
VSS48185
DQS#7186
DM7187
DQS7188
VSS49189
VSS50190
DQ58191
DQ62192
DQ59193
DQ63194
VSS51195
VSS52196
SA0197
EVENT#198
VDDSPD199
SDA200
SA1201
SCL202
VTT1203
VTT2204
G1205
G2206
CD
12.2
U_0402_6.3
V6M
CD
12.2
U_0402_6.3
V6M
1
2
CD
17
2.2
U_0402_6.3
V6M
CD
17
2.2
U_0402_6.3
V6M
1
2
CD
15
10U
_0603_6.3
V6M
@
CD
15
10U
_0603_6.3
V6M
@1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
JDIMM2 H=9.2mm TOP
Populate RD4, De-Populate RD8 for Intel DDR3
VREFDQ multiple methods M1
Populate RD8, De-Populate RD4 for Intel DDR3
VREFDQ multiple methods M3
All VREF traces should
have 10 mil trace width
Layout Note:
Place near JDIMM2
Layout Note:
Place near JDIMM2.203,204
JDIMM4 H=5.2mm BOT
All VREF traces should
have 10 mil trace width
4/16 change by HP requirement
Reverse
07/10 Change by HP request
07/10 Change by HP request
08/07 Change JDIMM2 footprint Reverse
11/06 Add C511 by rf request
DDR_B_MA7
DDR_B_D22
DDR_B_D19
DDR_B_D20
DDR_B_D62DDR_B_D59
DDR_CS1_DIMMB#
DDR_B_BS0
DDR_B_D27
DDR_B_D8
DDR_B_D52
M_B_ODT0
DDR_B_MA14
DDR_B_D57
DDR_B_DQS6
DDR_B_D43
DDR_B_DQS4
DDR_B_BS2
DDR_B_DQS#2
DDR3_DRAMRST#_R
DDR_B_D37DDR_B_D36
DDR_B_MA6
DDR_B_D23
DDR_B_D21
DDR_B_D41
DDR_B_MA3
DDR_B_D24
DDR_B_D63
DDR_B_D44
DDR_B_DQS#3
DDR_B_D40
DDR_CKE0_DIMMB
DDR_B_D5
DDR_B_DQS1
DDR_B_D9
DDR_B_D54
DDR_B_D53
DDR_B_D46
DDR_CKE1_DIMMB
DDR_B_D50
DDR_B_D48
DDR_B_D14
DDR_B_D61
DDR_B_MA4
DDR_B_MA1
DDR_B_D45
DDR_B_D38
DDR_B_BS1
DDR_B_DQS3
DDR_B_WE#
DDR_B_D7DDR_B_D6
DDR_B_D10
DDR_B_DQS#1
DDR_B_D55
DDR_B_D47
M_B_ODT1
DDR_B_D49
DDR_B_MA12
DDR_B_D15
DDR_B_D2
DDR_B_D0
M_CLK_B_DDR1
DDR_B_D28
DDR_B_DQS2
DDR_B_D4
DDR_B_RAS#
DDR_B_D34
DDR_B_D32
DDR_B_CAS#
DDR_B_D11
DDR_B_DQS#6
DDR_B_MA8
DDR_B_D25
DDR_B_D1
DDR_B_DQS7DDR_B_DQS#7
M_CLK_B_DDR#1
DDR_B_MA2
DDR_B_MA15
DDR_B_D29
DDR_B_DQS#5
DDR_B_MA11
DDR_B_D30
DDR_B_D51
DDR_B_D35
DDR_B_D33
M_CLK_B_DDR0
DDR_B_D12
DDR_B_DQS#0
DDR_B_D16
DDR_B_D60
DDR_B_MA5
DDR_B_D18
DDR_B_D39
DDR_B_MA0
DDR_B_D58
DDR_B_MA10
DDR_B_D26
DDR_B_D3
DDR_B_DQS5
DDR_CS0_DIMMB#
DDR_B_D31
DDR_B_D56
DDR_B_D42
DDR_B_DQS#4
DDR_B_MA13
M_CLK_B_DDR#0
DDR_B_MA9
DDR_B_D17
DDR_B_D13
DDR_B_DQS0
DDR_B_D22
DDR_B_MA7
DDR_B_D20
DDR_B_D52
M_B_ODT2
DDR_B_MA14
DDR3_DRAMRST#_R
DDR_B_D27
DDR_B_D37DDR_B_D36
DDR_B_MA6
DDR_B_D21
DDR_B_D23
DDR_B_D44
DDR_B_DQS#3
DDR_B_D14
DDR_B_D54
DDR_B_D53
DDR_B_D46
DDR_CKE3_DIMMB
DDR_B_MA4
DDR_B_D7DDR_B_D6
DDR_B_D45
DDR_B_D38
DDR_B_BS1
DDR_B_DQS3
DDR_B_D15
DDR_B_D55
DDR_B_D47
M_B_ODT3
M_CLK_B_DDR3
DDR_B_D28
DDR_B_RAS#
M_CLK_B_DDR#3
DDR_B_MA2
DDR_B_D29
DDR_B_DQS#5
DDR_B_MA11
DDR_B_D30
DDR_B_D12
DDR_B_D60
DDR_B_D39
DDR_B_MA0
DDR_CKE2_DIMMB
DDR_B_DQS5
DDR_CS2_DIMMB#
DDR_B_D31
DDR_B_D13
DDR_B_D58DDR_B_D59
DDR_B_BS2
DDR_B_MA12DDR_B_MA9
DDR_B_D4
DDR_B_MA8
DDR_B_D5
DDR_B_MA5
DDR_B_DQS#0DDR_B_DQS0
DDR_B_MA3DDR_B_MA1
M_CLK_B_DDR2M_CLK_B_DDR#2
DDR_B_MA10DDR_B_BS0
DDR_B_WE#DDR_B_CAS#
DDR_B_MA15
DDR_B_MA13DDR_CS3_DIMMB#
DDR_B_D0DDR_B_D1
DDR_B_D32DDR_B_D33
DDR_B_D2
DDR_B_DQS#4
DDR_B_D3
DDR_B_DQS4
DDR_B_D8
DDR_B_D34
DDR_B_D9
DDR_B_D35
DDR_B_DQS#1
DDR_B_D40
DDR_B_D61
DDR_B_DQS1
DDR_B_D41
DDR_B_DQS#7
DDR_B_D10
DDR_B_DQS7
DDR_B_D11
DDR_XDP_WAN_SMBDATDDR_XDP_WAN_SMBCLK
DDR_B_D42
DDR_B_D62
DDR_B_D16
DDR_B_D43
DDR_B_D63
DDR_B_D17
DDR_B_D48
DDR_B_DQS#2
DDR_B_D49
DDR_B_DQS2
DDR_B_DQS#6
DDR_B_D18
DDR_B_DQS6
DDR_B_D19
DDR_B_D50
DDR_B_D24
DDR_B_D51
DDR_B_D25
DDR_B_D56DDR_B_D57
DDR_B_D26
DDR_B_DQS[0..7][6]
DDR_B_MA[0..15][6]
DDR_B_D[0..63][6]
DDR_B_DQS#[0..7][6]
DDR_B_BS2[6]
DDR_B_BS0[6]
DDR_B_WE#[6]DDR_B_CAS#[6]
DDR_CKE0_DIMMB[6]
M_CLK_B_DDR0[6]M_CLK_B_DDR#0[6]
DDR_CS1_DIMMB#[6]
DDR_XDP_WAN_SMBDAT [11,13,16,28,38,5]
M_CLK_B_DDR#1 [6]M_CLK_B_DDR1 [6]
M_B_ODT1 [6]
M_B_ODT0 [6]DDR_CS0_DIMMB# [6]
DDR_B_RAS# [6]DDR_B_BS1 [6]
DDR_CKE1_DIMMB [6]
DDR3_DRAMRST#_R [11]
DDR_CKE2_DIMMB[6]
M_CLK_B_DDR2[6]M_CLK_B_DDR#2[6]
DDR_CS3_DIMMB#[6]
M_CLK_B_DDR#3 [6]M_CLK_B_DDR3 [6]
M_B_ODT3 [6]
M_B_ODT2 [6]DDR_CS2_DIMMB# [6]
DDR_CKE3_DIMMB [6]
DDR_XDP_WAN_SMBCLK [11,13,16,28,38,5]
RUN_ON_CPU1.5VS3[11,9]
+1.35V
+0.675VS
+1.35V
+0.675VS
+3VS
+0.675VS
+0.675VS
+DIMM_VREF_CA
+3VS
+0.675VS
+1.35V +1.35V
+1.35V +1.35V
+DIMM_B_DQ
+DIMM_B_DQ
+DIMM_VREF_CA
+1.35V
+DIMM23_VREF_DQ
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
DDRIII DIMM3&4
Custom
12 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
DDRIII DIMM3&4
Custom
12 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
DDRIII DIMM3&4
Custom
12 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.
CD
32
0.1
U_0402_16V
4Z
CD
32
0.1
U_0402_16V
4Z
1
2
CD
48
0.1
U_0402_16V
4Z
CD
48
0.1
U_0402_16V
4Z
1
2
CD
43
10U
_0603_6.3
V6M
@
CD
43
10U
_0603_6.3
V6M
@1
2
CD
40
10U
_0603_6.3
V6M
CD
40
10U
_0603_6.3
V6M
1
2
CD
56
2.2
U_0402_6.3
V6M
CD
56
2.2
U_0402_6.3
V6M
1
2
CD
42
10U
_0603_6.3
V6M
CD
42
10U
_0603_6.3
V6M
1
2
CD
55
0.1
U_0402_16V
4Z
CD
55
0.1
U_0402_16V
4Z
1
2
CD
31
2.2
U_0402_6.3
V6M
CD
31
2.2
U_0402_6.3
V6M
1
2
JDIMM2
TYCO_2-2013311-4CONN@
JDIMM2
TYCO_2-2013311-4CONN@
VREF_DQ1
VSS12
VSS23
DQ44
DQ05
DQ56
DQ17
VSS38
VSS49
DQS#010
DM011
DQS012
VSS513
VSS614
DQ215
DQ616
DQ317
DQ718
VSS719
VSS820
DQ821
DQ1222
DQ923
DQ1324
VSS925
VSS1026
DQS#127
DM128
DQS129
RESET#30
VSS1131
VSS1232
DQ1033
DQ1434
DQ1135
DQ1536
VSS1337
VSS1438
DQ1639
DQ2040
DQ1741
DQ2142
VSS1543
VSS1644
DQS#245
DM246
DQS247
VSS1748
VSS1849
DQ2250
DQ1851
DQ2352
DQ1953
VSS1954
VSS2055
DQ2856
DQ2457
DQ2958
DQ2559
VSS2160
VSS2261
DQS#362
DM363
DQS364
VSS2365
VSS2466
DQ2667
DQ3068
DQ2769
DQ3170
VSS2571
VSS2672
A12/BC#83
A1184
A985
A786
VDD587
VDD688
A889
A690
CKE073
CKE174
VDD175
VDD276
NC177
A1578
BA279
A1480
VDD381
VDD482
A591
A492
VDD793
VDD894
A395
A296
A197
A098
VDD999
VDD10100
CK0101
CK1102
CK0#103
CK1#104
VDD11105
VDD12106
A10/AP107
BA1108
BA0109
RAS#110
VDD13111
VDD14112
WE#113
S0#114
CAS#115
ODT0116
VDD15117
VDD16118
A13119
ODT1120
S1#121
NC2122
VDD17123
VDD18124
NCTEST125
VREF_CA126
VSS27127
VSS28128
DQ32129
DQ36130
DQ33131
DQ37132
VSS29133
VSS30134
DQS#4135
DM4136
DQS4137
VSS31138
VSS32139
DQ38140
DQ34141
DQ39142
DQ35143
VSS33144
VSS34145
DQ44146
DQ40147
DQ45148
DQ41149
VSS35150
VSS36151
DQS#5152
DM5153
DQS5154
VSS37155
VSS38156
DQ42157
DQ46158
DQ43159
DQ47160
VSS39161
VSS40162
DQ48163
DQ52164
DQ49165
DQ53166
VSS41167
VSS42168
DQS#6169
DM6170
DQS6171
VSS43172
VSS44173
DQ54174
DQ50175
DQ55176
DQ51177
VSS45178
VSS46179
DQ60180
DQ56181
DQ61182
DQ57183
VSS47184
VSS48185
DQS#7186
DM7187
DQS7188
VSS49189
VSS50190
DQ58191
DQ62192
DQ59193
DQ63194
VSS51195
VSS52196
SA0197
EVENT#198
VDDSPD199
SDA200
SA1201
SCL202
VTT1203
VTT2204
G1205
G2206
CD
38
10U
_0603_6.3
V6M
CD
38
10U
_0603_6.3
V6M
1
2
CD
45
2.2
U_0402_6.3
V6M
CD
45
2.2
U_0402_6.3
V6M
1
2
CD
51
1U
_0402_6.3
V6K
CD
51
1U
_0402_6.3
V6K
1
2
CD
49
1U
_0402_6.3
V6K
CD
49
1U
_0402_6.3
V6K
1
2
RD27 1K_0402_1%RD27 1K_0402_1%
1 2
CD
37
10U
_0603_6.3
V6M
CD
37
10U
_0603_6.3
V6M
1
2
RD28
1K
_0402_1%
RD28
1K
_0402_1%
12
CD
30
0.1
U_0402_16V
4Z
CD
30
0.1
U_0402_16V
4Z
1
2
CD
35
1U
_0402_6.3
V6K
CD
35
1U
_0402_6.3
V6K
1
2
CD
36
1U
_0402_6.3
V6K
CD
36
1U
_0402_6.3
V6K
1
2
CD
41
10U
_0603_6.3
V6M
CD
41
10U
_0603_6.3
V6M
1
2
CD
33
1U
_0402_6.3
V6K
CD
33
1U
_0402_6.3
V6K
1
2
CD
46
0.1
U_0402_16V
4Z
CD
46
0.1
U_0402_16V
4Z
1
2
CD
53
0.1
U_0402_16V
4Z
CD
53
0.1
U_0402_16V
4Z
1
2
G
DS
QD3
2N7002KW_SOT323-3
G
DS
QD3
2N7002KW_SOT323-3
2
13
CD
54
2.2
U_0402_6.3
V6M
CD
54
2.2
U_0402_6.3
V6M
1
2
CD
47
2.2
U_0402_6.3
V6M
CD
47
2.2
U_0402_6.3
V6M
1
2
C511
100P
_0402_50V
8J
@
C511
100P
_0402_50V
8J
@
1
2
CD
50
1U
_0402_6.3
V6K
CD
50
1U
_0402_6.3
V6K
1
2
+ CD44330U_B2_2.5VM_R15M
+ CD44330U_B2_2.5VM_R15M
1
2
JDIMM4
LCN_DAN06-K4406-0103CONN@
JDIMM4
LCN_DAN06-K4406-0103CONN@
VREF_DQ1
VSS3
DQ05
DQ17
VSS9
DM011
VSS13
DQ215
DQ317
VSS19
DQ821
DQ923
VSS25
DQS1#27
DQS129
VSS31
DQ1033
DQ1135
VSS37
DQ1639
VSS2
DQ44
DQ56
VSS8
DQS0#10
DQS012
VSS14
DQ616
DQ718
VSS20
DQ1222
DQ1324
VSS26
DM128
RESET#30
VSS32
DQ1434
DQ1536
VSS38
DQ2040
DQ1741
VSS43
DQS2#45
DQS247
VSS49
DQ1851
DQ1953
VSS55
DQ2457
DQ2559
VSS61
DM363
VSS65
DQ2667
DQ2769
VSS71
CKE073
VDD75
NC77
BA279
VDD81
A12/BC#83
A985
VDD87
A889
A591
VDD93
A395
A197
VDD99
CK0101
CK0#103
VDD105
A10/AP107
BA0109
VDD111
WE#113
CAS#115
VDD117
A13119
S1#121
VDD123
TEST125
VSS127
DQ32129
DQ33131
VSS133
DQS4#135
DQS4137
VSS139
DQ34141
DQ35143
VSS145
DQ40147
DQ41149
VSS151
DM5153
VSS155
DQ42157
DQ43159
VSS161
DQ48163
DQ49165
VSS167
DQS6#169
DQS6171
VSS173
DQ50175
DQ51177
VSS179
DQ56181
DQ57183
VSS185
DM7187
VSS189
DQ58191
DQ59193
VSS195
SA0197
VDDSPD199
DQ2142
VSS44
DM246
VSS48
DQ2250
DQ2352
VSS54
DQ2856
DQ2958
VSS60
DQS3#62
DQS364
VSS66
DQ3068
DQ3170
VSS72
CKE174
VDD76
A1578
A1480
VDD82
A1184
A786
VDD88
A690
A492
VDD94
A296
A098
VDD100
CK1102
CK1#104
VDD106
BA1108
RAS#110
VDD112
S0#114
ODT0116
VDD118
ODT1120
NC122
VDD124
VREF_CA126
VSS128
DQ36130
DQ37132
VSS134
DM4136
VSS138
DQ38140
DQ39142
VSS144
DQ44146
DQ45148
VSS150
DQS5#152
DQS5154
VSS156
DQ46158
DQ47160
VSS162
DQ52164
DQ53166
VSS168
DM6170
VSS172
DQ54174
DQ55176
VSS178
DQ60180
DQ61182
VSS184
DQS7#186
DQS7188
VSS190
DQ62192
DQ63194
VSS196
EVENT#198
SDA200
SA1201
VTT203
GND1205
SCL202
VTT204
GND2206
BOSS1207
BOSS2208
CD
34
1U
_0402_6.3
V6K
CD
34
1U
_0402_6.3
V6K
1
2
CD
39
10U
_0603_6.3
V6M
CD
39
10U
_0603_6.3
V6M
1
2
CD
52
1U
_0402_6.3
V6K
CD
52
1U
_0402_6.3
V6K
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CMOS place near DIMM
HDD
ODD
HDA_SYNC Isolation Circuit
DISABLED WHEN LOW (DEFAULT)
ENABLED WHEN HIGH
NO REBOOT STRAP
LOW = DESABLED (DEFAULT)
HIGH = ENABLED
FLASH DESCRIPTOR SECURITY OVERRIDE
High - Enable Internal VRs
Low - Enable External VRs
INTVRMEN - INTEGRATED SUS 1.05V VRM
ENABLE
CMOS setting
Shunt Clear CMOS
Keep CMOS
TPM setting
Shunt Clear ME RTC Registers
Keep ME RTC Registers
ME_CLR1
Open
CMOS_CLR1
Open
SATA Impedance Compensation
CAD note:
Place the resistor within 500 mils of the PCH. Avoid
routing next to clock pins.
DOCK_SATA3
mSATA
DOCK_SATA5
W=20milsW=20mils
W=20mils
Place near PCH
W=20mils
07/06 Follow HP's GPIO table
07/09 Delete by HP request.
07/09 Delete by HP request.
07/09 Change by HP request.
08/03 RH33.1 connection to GND
08/07 Change JBATT1 footprint
09/19 Change QH11 to P MOS, change RH30 to 2.2K ohms
09/03 Instal RH31
09/21 Non-install RH39, RH40,
RH41, RH44, RH48, RH47, RH46
10/25 Delete RH50, RH52, RH53. Add RP6
10/26 Swap QH11A.2 and QH11B.5 connection
11/01 Change YH1 to small package
PCH_RTCX1
PCH_RTCX2
SRTCRST#
PCH_RTCRST#
PCH_INTVRMEN
INTRUDER#
HDA_RST#
HDA_SDI0
HDA_BIT_CLK
HDA_SDOUT
HDA_SPKR
HDA_SYNC
HDD_HALTLED
ISO_PREP#
PCH_JTAG_TDI
PCH_JTAG_TMS
PCH_JTAG_TDO
PCH_JTAG_TCK
PCH_TP25
SATA_COMP
SATA_IREF
HDA_SDOUTHDA_RST#
HDA_SYNC_R
HDA_BIT_CLK
HDA_SPKR
HDD_HALTLED
HDA_SYNCHDA_SYNC_R
PCH_INTVRMEN
SATA_COMP
PCH_RTCX1
PCH_RTCX2
SATA_PTX_DRX_N0SATA_PTX_DRX_P0
SATA_PRX_DTX_N0SATA_PRX_DTX_P0
SATA_PTX_DRX_P1
SATA_PRX_DTX_N1SATA_PRX_DTX_P1
SATA_PTX_DRX_N1
SATA_PTX_DRX_P3
SATA_PRX_DTX_N3SATA_PRX_DTX_P3
SATA_PTX_DRX_N3
SATA_PTX_DRX_N2SATA_PTX_DRX_P2
SATA_PRX_DTX_N2SATA_PRX_DTX_P2
SATA_PTX_DRX_P5
SATA_PRX_DTX_N5SATA_PRX_DTX_P5
SATA_PTX_DRX_N5
SG_IN
FN9
SATA_ACT#
+BATT_D
HDA_SDOUT
PLT_RST#
SATA_PTX_DRX_N0 [23]
SATA_PRX_DTX_N0 [23]
SATA_PTX_DRX_P0 [23]
SATA_PRX_DTX_P0 [23]
SATA_PTX_DRX_P1 [23]
SATA_PRX_DTX_N1 [23]SATA_PRX_DTX_P1 [23]
SATA_PTX_DRX_N1 [23]
SATA_PTX_DRX_P3 [33]
SATA_PRX_DTX_N3 [33]SATA_PRX_DTX_P3 [33]
SATA_PTX_DRX_N3 [33]
SATA_PTX_DRX_N2 [33]
SATA_PRX_DTX_N2 [33]
SATA_PTX_DRX_P2 [33]
SATA_PRX_DTX_P2 [33]
DDR_XDP_WAN_SMBDAT[11,12,16,28,38,5]DDR_XDP_WAN_SMBCLK[11,12,16,28,38,5]
HDA_SPKR[26]
HDA_SDI0[26]
HDA_SDOUT_AUDIO[26]
HDA_SYNC_AUDIO[26]
HDA_BITCLK_AUDIO[26]HDA_RST_AUDIO#[26]
SATA_PTX_DRX_P5 [23]SATA_PTX_DRX_N5 [23]
SATA_PRX_DTX_N5 [23]SATA_PRX_DTX_P5 [23]
ISO_PREP#[33,36]
HDD_HALTLED[39]
SATA_ACT# [33,39]
PLT_RST#[14,25,28,29,30,35,37,39,5]
SG_IN [22]
WWAN_DET#[25]
PCH_RTCRST#[14]
BAT_GRNLED#[30,39]
+RTCVCC
+3V_PCH
+1.5VS
+3VS
+5VS
+RTCVCC
+1.5VS
+3VS
+3VS
+3VS
+BATT1.1+RTCVCC +3VDS
+3VS
+3V_PCH
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
PCH-RTC,HDA,SATA,XDP
Custom
13 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
PCH-RTC,HDA,SATA,XDP
Custom
13 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
PCH-RTC,HDA,SATA,XDP
Custom
13 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.
RH497.5K_0402_1% RH497.5K_0402_1%
1 2
RH45 0_0402_5%RH45 0_0402_5%
1 2
RH42 0_0402_5%RH42 0_0402_5%
1 2
RH35 1M_0402_5%RH35 1M_0402_5%1 2
CH15 1U_0402_6.3V6KCH15 1U_0402_6.3V6K
1 2
D40
DAN202U_SC70
D40
DAN202U_SC70
2
31
G
D
S
Q702N7002KW_SOT323-3
G
D
S
Q702N7002KW_SOT323-32
13
RH44200_0402_5%
@RH44200_0402_5%
@1 2
RH34 20K_0402_5%RH34 20K_0402_5%1 2
YH1
32.768KHZ_12.5PF_Q13FC1350000500
YH1
32.768KHZ_12.5PF_Q13FC1350000500
1 2
RH39 51_0402_1%@RH39 51_0402_1%@ 12
CH1418P_0402_50V8JCH1418P_0402_50V8J
1
2
RH30 2.2K_0402_5%RH30 2.2K_0402_5%
12
RH233
1K_0402_5%
RH233
1K_0402_5%
1 2
RH
46
100_0402_1%
@
RH
46
100_0402_1%
@
12
CH13
18P
_0402_50V
8J
CH13
18P
_0402_50V
8J
1
2
DS
G QH11A
MESS84DW-G_SC88-6
DS
G QH11A
MESS84DW-G_SC88-6
2
1 6
T72PAD~D @T72PAD~D @
CMOS1 SHORT PADS@CMOS1 SHORT PADS@
11
22
RH3710K_0402_5%
RH3710K_0402_5%
12
RH33 100K_0402_5%@
RH33 100K_0402_5%@1 2
R8
10K_0402_5%UMA@R8
10K_0402_5%UMA@
12
RH237
10K_0402_5%
RH237
10K_0402_5%
1 2
RH38
10K_0402_5%
RH38
10K_0402_5%
12
DS
G QH11B
MESS84DW-G_SC88-6
DS
G QH11B
MESS84DW-G_SC88-6
5
4 3
RP6
33_8P4R_5%
RP6
33_8P4R_5%
1 82 73 64 5
G
DS
QH2
BSS138W-7-F_SOT323-3SB000002X00
G
DS
QH2
BSS138W-7-F_SOT323-3SB000002X00
2
13
RH40200_0402_5%
@RH40200_0402_5%
@1 2
ME1 SHORT PADS@ME1 SHORT PADS@
11
22
RH
6330K
_0402_5%
RH
6330K
_0402_5%
12
CH
17
27P
_0402_50V
8J
@C
H17
27P
_0402_50V
8J
@
1
2
JT
AG
RT
CA
ZA
LIA
SA
TA
LPT_PCH_M_EDS REV = 5
1 OF 11
UH1A
LYNXPOINT_BGA695
JT
AG
RT
CA
ZA
LIA
SA
TA
LPT_PCH_M_EDS REV = 5
1 OF 11
UH1A
LYNXPOINT_BGA695
TP20AB6
TP25F8
TP9BA2
TP22C26
RTCX1B5
SATA_RXN_1BC10
SATA_RXP_1BE10
JTAG_TDIAE2
JTAG_TDOAD3
JTAG_TMSAD1
JTAG_TCKAB3
HDA_SDOA24
HDA_SDI2G22
HDA_SDI3F22
HDA_SDI1K22
HDA_SDI0L22
RTCRST#D9
INTRUDER#A8
INTVRMENG10
SRTCRST#B9
RTCX2B4
SATA_IREFBD4
SATA0GP/GPIO21AT1
SATA1GP/GPIO19AU2
SATALED#AP3
SATA_RCOMPAY5
SATA_TXP5/PETP2AR15
SATA_RXP5/PERP2BE14
SATA_TXN5/PETN2AP15
SATA_RXN5/PERN2BC14
SATA_TXP4/PETP1AW15SATA_TXN4/PETN1AV15
SATA_RXP4/PERP1BB13SATA_RXN4/PERN1BD13
SATA_TXP_3AT13
SATA_RXP_3BE12
SATA_TXN_3AR13
SATA_RXN_3BC12
SATA_TXP_2AW13SATA_TXN_2AY13
SATA_RXN_2BB9
SATA_RXP_2BD9
SATA_TXP_1AW10SATA_TXN_1AV10
SATA_TXP_0AY8SATA_TXN_0AW8
SATA_RXP_0BE8SATA_RXN_0BC8
HDA_RST#C24
SPKRAL10
HDA_SYNCA22
HDA_BCLKB25
HDA_DOCK_RST#/GPIO13C22
DOCKEN#/GPIO33B17
TP8BB2
RH36 20K_0402_5%RH36 20K_0402_5%1 2
RH51 33_0402_5%RH51 33_0402_5%
1 2
RH28 10M_0402_5%RH28 10M_0402_5%
1 2
CH16 1U_0402_6.3V6KCH16 1U_0402_6.3V6K1 2
RH
48
100_0402_1%
@
RH
48
100_0402_1%
@
12
R7
10K_0402_5%
R7
10K_0402_5%
12
RH29 10K_0402_5%@
RH29 10K_0402_5%@1 2
CH102
1U_0603_10V4Z
CH102
1U_0603_10V4Z
1
2
RH
47
100_0402_1%
@
RH
47
100_0402_1%
@
12
RH41200_0402_5%
@RH41200_0402_5%
@1 2
R463 10K_0402_5%R463 10K_0402_5%1 2
JBATT1
ACES_50271-00201-001CONN@
JBATT1
ACES_50271-00201-001CONN@
11
22
G13
G24
RH43
1M_0402_5%
RH43
1M_0402_5%
12
RH230 0_0402_5%RH230 0_0402_5%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A0 1 Reserved (NAND)
1 0
11 SPI
SATA1GP/
GPIO19
Boot BIOS Strap
PCH_GPIO51Boot BIOS Location
00 LPC
HIGH = ENABLED (DEFAULT)
LOW = DISABLED
DSWODVREN - ON DIE DSW VR ENABLE
STP_A16OVR
A16 SWAP OVERRIDE STRAP
LOW = A16 SWAP OVERRIDE
HIGH = DEFAULT
PCI
07/06 Correct netname to follow GPIO table
07/16 Add for ESD's request
07/18 Delete PCH_GPIO55 PD RH186.
07/18 Add QH12 to invertion PCH_GPIO55 signal
07/20 Add ME debug circuit
07/23 Connection RH55.2 to +RTCVCC
07/23 Move QH12 to S/B.
07/23 Add CR_SX_WARN# PU RH244
07/23 Add CR_SX_WARN# off page symbol
07/31 Correct netname
08/10 Change RH235 to 0ohms
08/10 Change UH7.5 connection to +3V_PCH power rail
08/10 Change UH3.5 connection to +3V_PCH power rail
08/10 Add RH245
09/11 Delete RH92, RH93, RH221, RH94, RH95
9/13 Delete UH7, RH235. Move RH236, CH106 to page 31
09/20 Change RH74 to 100k
09/20 Change to +3VS
10/12 Delete RH245. Add UH6, CH116
10/12 Delete VCC1_PWRGD connection to UH6.1 and 2. Then add R613
between +3VDS and UH6 pin 1,2. change UH6.5 pin connection to +3VDS
10/16 Delete R230
10/17 Change R614.1 connection to +3V_PCH
10/18 Change R614 to 10K ohms, and connection R614.1 to PM_RSMRST#
10/18 install R613, CH116 and UH6. Uninstall RH67
10/18 Uninstall R613, CH116 and UH6. Install RH68
10/23 Uninstall Q79, R614
10/23 Change net name to TBT_RR_GPIO#
10/23 Change netname to TBT_RR_GPIO#
10/25 Add R247
10/25 Change RH70 to 200K
10/25 Delete RH56, RH57, RH59, RH60. Add RP7
10/25 Delete RH66, RH69, RH71. Add RP8
10/25 Delete RH98, RH99, RH100. Add RP9
10/26 change PCH.K7 connection to BATLOW#
10/26 change RH75.2 connection to BATLOW#
10/26 change PCH.U7 connection to BT_OFF
11/06 Change PCH.D2 pin connection to DDR3_SET
12/12 Delete Q79, R615
12/12 Delete UH6, R613 and CH116
DMI_CRX_PTX_N1
DMI_CRX_PTX_P0
DMI_CRX_PTX_P3
DMI_CTX_PRX_P0
DMI_CRX_PTX_N2
DMI_CRX_PTX_P1
DMI_CTX_PRX_P2
DMI_CTX_PRX_N2DMI_CTX_PRX_N3
DMI_CTX_PRX_P3
DMI_CRX_PTX_P2
DMI_CTX_PRX_N1
DMI_CRX_PTX_N0
DMI_CTX_PRX_N0
DMI_CTX_PRX_P1
DMI_CRX_PTX_N3
DMI_IREF
DMI_RCOMP
PCH_RI#
AC_PRES_OUT
ON/OFFBTN#
ME_SUS_PWR_ACK_R
SYS_RESET#
PCH_PWROK_R
PM_RSMRST#PCH_RI#
SYS_RESET#SUS_PWR_ACK
PCH_PCIE_WAKE#
PM_CLKRUN#
FDI_CTX_PRX_N0
FDI_CTX_PRX_N1
FDI_CTX_PRX_P0
FDI_CTX_PRX_P1
FDI_CSYNC
FDI_INT
FDI_IREF
FDI_RCOMP
DSWODVREN
SLP_S5#
SLP_S4#
SLP_S3#
SIO_SLP_A#
SUSCLK_KBC
PCH_DPWROK
PCH_PCIE_WAKE#
SIO_SLP_SUS#
SLP_LAN#
H_PM_SYNC
PM_CLKRUN#
PCH_CRT_BLU
PCH_CRT_GRN
PCH_CRT_RED
PCH_CRT_DDC_CLK
PCH_CRT_DDC_DAT
HSYNC
VSYNC
CRT_IREF
PCH_CRT_DDC_CLK
PCH_CRT_DDC_DAT
PCI_PIRQA#
PCI_PIRQC#
PCI_PIRQD#
PCI_PIRQB#
PWRSV_SEL#
NMI_SMI_DBG#
ACCEL_INT_R#
PLTRST#
DGPU_PWR_EN
PCI_PIRQB#
PCI_PIRQC#
NMI_SMI_DBG#
PCI_PIRQD#
PWRSV_SEL#
PCI_PIRQA#
ODD_DA#
ENVDD_PCH
BKL_PWM_PCH
DSWODVREN
PLTRST#
PCH_CRT_BLUPCH_CRT_GRNPCH_CRT_RED
DDR3_SET
ENVDD_PCH
DGPU_SELECT#
ODD_DA#
BATLOW#
BT_OFF DGPU_HOLD_RST#
DGPU_SELECT#
Camera_ON
Camera_ON
ACCEL_INT_R#
SLP_LAN#
BATLOW#
PCH_GPIO51
SUSACK#
TBT_RR_GPIO#
PLT_RST#
SLP_S3#
SLP_S5#SLP_S4#SIO_SLP_A#
PCH_RTCRST#
ON/OFFBTN#
SYS_RESET#
TBT_RR_GPIO#
PCH_DPWROK
SLP_LAN#_R
DGPU_HOLD_RST#DGPU_PWR_EN
DMI_CTX_PRX_N0[4]DMI_CTX_PRX_N1[4]
DMI_CTX_PRX_N3[4]DMI_CTX_PRX_N2[4]
DMI_CTX_PRX_P0[4]DMI_CTX_PRX_P1[4]
DMI_CTX_PRX_P3[4]DMI_CTX_PRX_P2[4]
DMI_CRX_PTX_N2[4]DMI_CRX_PTX_N3[4]
DMI_CRX_PTX_N1[4]DMI_CRX_PTX_N0[4]
DMI_CRX_PTX_P2[4]DMI_CRX_PTX_P3[4]
DMI_CRX_PTX_P1[4]DMI_CRX_PTX_P0[4] FDI_CSYNC [4]
FDI_INT [4]
PM_DRAM_PWRGD[5]
FDI_CTX_PRX_N0 [7]
FDI_CTX_PRX_N1 [7]
FDI_CTX_PRX_P0 [7]
FDI_CTX_PRX_P1 [7]
H_PM_SYNC [5]
ON/OFFBTN#[30,5]
XDP_DBRESET#[5]
PM_PWROK[30,5]
PM_RSMRST#[30]
SUS_PWR_ACK[30]
AC_PRES_OUT[30,35]
DDR3_SET[45]
SLP_S4# [45]
SLP_S3# [30,31,34,45]
SIO_SLP_A# [30,31,46]
SIO_SLP_SUS#
SLP_LAN# [29,30]
PCH_PCIE_WAKE# [25]
PM_CLKRUN# [28,30,32]
PCH_CRT_RED[36]
PCH_CRT_GRN[36]
PCH_CRT_BLU[36]
PCH_CRT_DDC_CLK[36]
PCH_CRT_DDC_DAT[36]
PCH_CRT_HSYNC[36]
PCH_CRT_VSYNC[36]
BKL_PWM_PCH[35]
PANEL_BKEN_PCH[35]
ENVDD_PCH[35]
PWRSV_SEL# [37]
NMI_SMI_DBG# [30]
PLT_RST# [13,25,28,29,30,35,37,39,5]
ODD_DA# [23]DGPU_HOLD_RST#[35]
DGPU_SELECT#[35,36]
DGPU_PWR_EN[15,35]
Camera_ON[22]
PM_APWROK[30,31]
SUSCLK_KBC [30]
PCH_RTCRST#[13]
TBT_RR_GPIO#[39]
ACCEL_INT# [28]
PCH_PWROK_R[31]
BT_OFF [25]
BATLOW#[30]
+1.5VS
+1.5VS
+3V_PCH
+3VS
+1.5VS
+1.5VS
+3VS
+3VDS
+3V_PCH
+3VS
+RTCVCC
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
PCH -DMI,FDI,PM,DP,CRT
Custom
14 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
PCH -DMI,FDI,PM,DP,CRT
Custom
14 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
PCH -DMI,FDI,PM,DP,CRT
Custom
14 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.
JME1
FCI_10051922-1410ELFCONN@
JME1
FCI_10051922-1410ELFCONN@
11
22
33
44
55
66
77
88
99
1010
1111
1212
1313
1414
G115G216
RH70 200K_0402_5%RH70 200K_0402_5%1 2
RH87 649_0402_1%RH87 649_0402_1%1 2
T87 PAD~D@ T87 PAD~D@
RH8010K_0402_5% RH8010K_0402_5%12
T89 PAD~D @T89 PAD~D @
RH101 100K_0402_5%RH101 100K_0402_5%1 2
T85 PAD~D@T85 PAD~D@
RH97 0_0402_5%RH97 0_0402_5%1 2
RH772.2K_0402_5% RH772.2K_0402_5%12
RH75 10K_0402_5%RH75 10K_0402_5%1 2
T88 PAD~D @T88 PAD~D @
RH
55
330K
_0402_5%
RH
55
330K
_0402_5%
12
RH897.5K_0402_1% RH897.5K_0402_1%12
RH24410K_0402_5% RH24410K_0402_5%12
T90 PAD~D@ T90 PAD~D@
RH6210K_0402_5% RH6210K_0402_5%12
RH74100K_0402_5% RH74100K_0402_5%1 2
LPT_PCH_M_EV
DIS
PLA
Y
LV
DS
CR
T
PCI
5 OF 11
REV = 5UH1E
LYNXPOINT_BGA695
LPT_PCH_M_EV
DIS
PLA
Y
LV
DS
CR
T
PCI
5 OF 11
REV = 5UH1E
LYNXPOINT_BGA695
VGA_BLUET45
VGA_GREENU44
VGA_REDV45
VGA_DDC_CLKM43
DAC_IREFU40
VGA_IRTNU39
EDP_BKLTCTLN36
EDP_BKLTENK36
EDP_VDDENG36
PIRQA#H20
PIRQB#L20
PIRQC#K17
PIRQD#M20
GPIO50A12
GPIO52B13
GPIO54C12
GPIO51C10
GPIO53A10
GPIO55AL6
DDPB_CTRLCLKR40
DDPB_CTRLDATAR39
DDPC_CTRLCLKR35
DDPC_CTRLDATAR36
DDPD_CTRLCLKN40
DDPD_CTRLDATAN38
DDPB_AUXNH45
DDPC_AUXNK43
DDPD_AUXNJ42
DDPB_AUXPH43
DDPC_AUXPK45
DDPD_AUXPJ44
DDPB_HPDK40
DDPC_HPDK38
DDPD_HPDH39
PIRQE#/GPIO2G17
PIRQH#/GPIO5M15
PME#AD10
PLTRST#Y11
PIRQG#/GPIO4L15
PIRQF#/GPIO3F17
VGA_VSYNCN44
VGA_HSYNCN42
VGA_DDC_DATAM45
LPT_PCH_M_EDS
DMI
Management
FDI
System Power
REV = 5
4 OF 11
UH1B
LYNXPOINT_BGA695
LPT_PCH_M_EDS
DMI
Management
FDI
System Power
REV = 5
4 OF 11
UH1B
LYNXPOINT_BGA695
TP21AB10
TP10AW44
TP16AV43
TP12AW17
TP17AU42
TP7AV17
TP5AY45
TP13AU44
SUSWARN#/SUSPWRNACK/GPIO30J4
DMI_IREFBE16
DMI_RCOMPAY17
FDI_RCOMPAR44
SLP_WLAN#/GPIO29D2
DRAMPWROKH3
APWROKAB7
PWROKF10
SYS_RESET#AM1
DMI_RXP_2AR17
DMI_RXP_3AW20
DMI_TXN_0BD21
DMI_TXN_1BE20
SLP_LAN#G5
PMSYNCHAY3
SLP_SUS#F1
SLP_A#F3
SLP_S3#H1
SLP_S4#C6
SLP_S5#/GPIO63Y7
SUSCLK/GPIO62Y6
SUS_STAT#/GPIO61U7
CLKRUN#AN7
WAKE#K3
DPWROKL13
FDI_IREFAT45
FDI_CSYNCAL39
FDI_RXP_1AL36
FDI_RXP_0AJ36
FDI_RXN_1AL35
FDI_RXN_0AJ35
ACPRESENT/GPIO31E6
SYS_PWROKAD7
SUSACK#R6
DMI_TXP_2BB17
DMI_TXP_0BB21
DMI_RXP_1AP20
DMI_RXN_2AP17
DMI_TXP_3BC18
DMI_TXP_1BC20
DMI_TXN_3BE18 DMI_TXN_2BD17
DMI_RXP_0AY22
DMI_RXN_3AV20
PWRBTN#K1
RI#N4
BATLOW#/GPIO72K7
RSMRST#J2
FDI_INTAL40
DSWVRMENC8
DMI_RXN_1AR20 DMI_RXN_0
AW22
TP15AV45
RH64 10K_0402_5%RH64 10K_0402_5%1 2
RH67 0_0402_5%RH67 0_0402_5%1 2
RH84 20_0402_1%RH84 20_0402_1%1 2
RH63 10K_0402_5%RH63 10K_0402_5%1 2
RH86 0_0402_5%RH86 0_0402_5%1 2
T86 PAD~D @T86 PAD~D @
RH72 10K_0402_5%RH72 10K_0402_5%1 2
RH54 0_0402_5%RH54 0_0402_5%1 2
RH88 0_0402_5%RH88 0_0402_5%1 2
RH762.2K_0402_5% RH762.2K_0402_5%12
RP8
10K_8P4R_5%
RP8
10K_8P4R_5%
1 82 73 64 5
RH78 8.2K_0402_5%RH78 8.2K_0402_5%1 2
UH3
MC74VHC1G08DFT2G_SC70-5
UH3
MC74VHC1G08DFT2G_SC70-5
IN11
IN22 OUT
4VC
C5
GN
D3
RH147 100K_0402_5%RH147 100K_0402_5%1 2
CH107
22P_0402_50V8J
@ CH107
22P_0402_50V8J
@1
2
CH20
0.1U_0402_16V4Z
CH20
0.1U_0402_16V4Z
1 2
RH8210K_0402_5% RH8210K_0402_5%12
RP7
8.2K_8P4R_5%
RP7
8.2K_8P4R_5%
18273645
RH90 7.5K_0402_1%RH90 7.5K_0402_1%1 2
RP9
150_1206_8P4R_1%
RP9
150_1206_8P4R_1%
18273645
RH85 20_0402_1%RH85 20_0402_1%1 2
RH838.2K_0402_5% RH838.2K_0402_5%12
RH247 10K_0402_5%RH247 10K_0402_5%1 2
RH960_0402_5% RH960_0402_5%12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCIECLK REQ Pull UP Power Rail:
SUS Rail : 0 3 4 5 6 7
Core Rail: 1 2
CLOCK TERMINATION for FCIM and need close to PCH
07/06 Follow HP's GPIO table
07/23 Delete FN14 and FN15 off page symbol
08/06 Change ball name
09/11 Delete RH107, RH103, RH203, RH114, RH116,
RH205, RH122, RH124, RH126, RH127, RH128, RH130
10/25 Delete RH141, RH234, RH139. Add RP10.
10/25 Delete RH108, RH110, RH111, RH112. Add RP11
11/01 Change YH2 to
small package
MINI1_CLKREQ#
WLAN_TRAMSIT_OFF#
CLK_PCI0
CLK_CPU_DMI
CLK_CPU_DMI#
CLK_BUF_DOT96CLK_BUF_DOT96#
CLK_BUF_CKSSCDCLK_BUF_CKSSCD#
CLK_BUF_DMI#
CLK_BUF_BCLK
CLK_BUF_DMI
CLK_BUF_BCLK#
CLK_PCH_14MCLK_PCI_LOOPBACK
CLK_BUF_CKSSCD
CLK_BUF_DOT96#CLK_BUF_DOT96
CLK_BUF_CKSSCD#
CLK_BUF_DMI
CLK_PCH_14M
CLK_BUF_BCLK#
CLK_BUF_DMI#
SIO_14M
XTAL25_OUT
ICLK_IREF
PCH_CLK_BIASREF
CLK_CPU_SSC_DPLLCLK_CPU_SSC_DPLL#
CLK_CPU_DPLLCLK_CPU_DPLL#
CLK_PCIE_VGA
CLK_PCIE_VGA#
GFX_CLK_REQ#
CLK_BUF_BCLK
XTAL25_IN
CLKREQ_EXP#
CLK_PCIE_LAN_REQ1#
CLK_PCI2
CLK_PCI4
PCI_LOOPBACKOUTCLK_PCI_LOOPBACK
GFX_CLK_REQ#
CLK_CPU_DPLL# [5]CLK_CPU_DPLL [5]
CLK_CPU_SSC_DPLL# [5]CLK_CPU_SSC_DPLL [5]
CLK_CPU_DMI# [5]
CLK_CPU_DMI [5]
CLK_PCIE_MINI1#[25]
CLK_PCIE_MINI1[25]
CLK_PCI_SIO[32]
MINI1_CLKREQ#[25]
CLK_PCIE_VGA# [35]
CLK_PCIE_VGA [35]
CLK_SIO_14M [32]
CLK_PCIE_EXP#[39]CLK_PCIE_EXP[39]
CLKREQ_EXP#[39]
CLK_PCIE_LAN[29]CLK_PCIE_LAN#[29]
CLK_PCIE_LAN_REQ1#[29]
CLK_PCI_KBC[30]
CLK_PCI_TPM[28]CLK_PCI_DEBUG_KBC[30]
PEG_CLK_REQ# [35]
DGPU_PWR_EN [14,35]
CR_CLK_REQ#[39]
CLK_PCIE_CR#[39]CLK_PCIE_CR[39]
CLK_TB_REFCLK#[39]
CLK_TB_REFCLK[39]
TB_CLKREQ#[39]
CLK_PCI_DEBUG[25]
WLAN_TRAMSIT_OFF# [25]
+3V_PCH
+3V_PCH
+1.5VS
+1.5VS
+3V_PCH
+3V_PCH
+3V_PCH
+3V_PCH
+3VS
+3VS
+3V_PCH
+3V_PCH
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
PCH- CLK
Custom
15 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
PCH- CLK
Custom
15 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
PCH- CLK
Custom
15 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.
RH115 10K_0402_5%RH115 10K_0402_5%1 2
RH113 10K_0402_5%RH113 10K_0402_5%12
RH120 10K_0402_5%RH120 10K_0402_5%1 2
RH123 10K_0402_5%RH123 10K_0402_5%1 2
RH135 10_0402_5%RH135 10_0402_5%12
RH119 10K_0402_5%RH119 10K_0402_5%1 2
RH118 10K_0402_5%RH118 10K_0402_5%12
LPT_PCH_M_EDS
CLOCK SIGNAL
REV = 5
2 OF 11
UH1C
LYNXPOINT_BGA695
LPT_PCH_M_EDS
CLOCK SIGNAL
REV = 5
2 OF 11
UH1C
LYNXPOINT_BGA695
PCIECLKRQ4#/GPIO26V3 CLKOUT_PCIE_P_4
AF45
CLKOUT_PCIE_P_5AE42
PCIECLKRQ5#/GPIO44AA2
CLKOUT_PCIE_N_6AB40
CLKOUT_PCIE_P_6AB39
PCIECLKRQ6#/GPIO45AE4
CLKOUT_PCIE_N_7AJ44
CLKOUT_PCIE_P_7AJ42
CLKOUTFLEX2/GPIO66F36
CLKIN_SATABE6
CLKIN_GNDAR24
CLKIN_DMIAY24
PCIECLKRQ1#/GPIO18AF1
CLKOUT_DPAJ40
CLKOUT_DMIAF39
CLKOUT_PCIE_N_0Y43
CLKOUT_PCIE_P_0Y45
CLKOUT_PEG_BY39
CLKOUT_PEG_AAB35
PCIECLKRQ0#/GPIO73AB1
CLKOUT_PEG_A_PAB36
PEGA_CLKRQ#/GPIO47AF6
CLKOUT_PEG_B_PY38
PEGB_CLKRQ#/GPIO56U4
CLKOUT_PCIE_P_1AA42
CLKOUT_PCIE_N_2AB43
CLKOUT_ITPXDPAH43
XTAL25_INAM43
XTAL25_OUTAL44
CLKOUTFLEX0/GPIO64C40
CLKOUTFLEX1/GPIO65F38
DIFFCLK_BIASREFAN44
ICLK_IREFAM45
CLKOUTFLEX3/GPIO67F39
CLKIN_33MHZLOOPBACKD17REFCLK14INF45
CLKIN_SATA_PBC6
CLKIN_DOT96PG33CLKIN_DOT96NH33
CLKIN_GND_PAT24
CLKIN_DMI_PAW24
CLKOUT_DP_PAJ39
CLKOUT_DMI_PAF40
CLKOUT_PCIE_N_1AA44
PCIECLKRQ7#/GPIO46Y3
CLKOUT_ITPXDP_PAH45
CLKOUT_33MHZ1E44
CLKOUT_33MHZ0D44
CLKOUT_33MHZ2B42
CLKOUT_33MHZ3F41
CLKOUT_33MHZ4A40
CLKOUT_PCIE_N_4AF43
CLKOUT_PCIE_N_3AD43
CLKOUT_PCIE_P_3AD45
PCIECLKRQ3#/GPIO25T3
CLKOUT_PCIE_N5AE44
CLKOUT_DPNS_PAF36CLKOUT_DPNSAF35
PCIECLKRQ2#/GPIO20/SMI#AF3
CLKOUT_PCIE_P_2AB45
TP19AD39
TP18AD38
RH136 22_0402_5%RH136 22_0402_5%12
RP11
10K_8P4R_5%
RP11
10K_8P4R_5%
1 82 73 64 5
RH121 10K_0402_5%RH121 10K_0402_5%12
G
D S
Q55
2N7002KW_SOT323-3
G
D S
Q55
2N7002KW_SOT323-3
2
1 3
RH138 22_0402_5%RH138 22_0402_5%12
RH109
10K_0402_5%
RH109
10K_0402_5%
12
RH132 1M_0402_5%RH132 1M_0402_5%
1 2
RH137 10_0402_5%RH137 10_0402_5%12
T92PAD~D @T92PAD~D @
RH
10
61
0K
_0
40
2_
5%
RH
10
61
0K
_0
40
2_
5% 1
2
RH105 10K_0402_5%RH105 10K_0402_5%12
RH117 10K_0402_5%RH117 10K_0402_5%1 2
CH22
18
P_
04
02
_5
0V
8J
CH22
18
P_
04
02
_5
0V
8J
1
2
RP10
22_1206_8P4R_5%
RP10
22_1206_8P4R_5%
18273645
CH21
18
P_
04
02
_5
0V
8J
CH21
18
P_
04
02
_5
0V
8J
1
2
RH104 10K_0402_5%RH104 10K_0402_5%12
YH2
25MHZ_20PF_5YEA2500020BIF50Q3
YH2
25MHZ_20PF_5YEA2500020BIF50Q3
IN1
NC2
OUT3
NC4
RH131 10K_0402_5%RH131 10K_0402_5%12
RH125 10K_0402_5%RH125 10K_0402_5%12
RH128 10K_0402_5%RH128 10K_0402_5%12
RH1427.5K_0402_1% RH1427.5K_0402_1%
1 2
T91PAD~D @T91PAD~D @
RH1400_0402_5% RH1400_0402_5%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
07/06 Add for NFC function
07/06 Add for NFC function
07/06 Add for NFC function
07/09 Delete by HP request.
07/19 Add RH242 and RH243
07/23 Modify screw hole
07/20 Modify screw hole
07/26 Install RH242 and RH244
07/30 Add CH113 by RF request.
08/06 Delete H23
08/07 Install RH148 and
change value to 2.2K
09/12 Delete H4, H32, H34, H41. Add H42, H43, H44, H45, H46
09/21 Add H47, H48
10/09 Change to RH152, RH153 to 499ohms
10/18 Uninstall RH148
11/09 Change RH152, RH153 to 2.2K ohms
LPC_LAD2
LPC_LFRAME#
LPC_LAD0
LPC_LAD3
LPC_LAD1
SIRQ
PCH_SPI_CLK_R
PCH_SPI_CS0#_R
MEM_SMBCLK
MEM_SMBDATA
FPR_OFF
LAN_SMBCLK
LAN_SMBDATA
DDR_RST_EN
SML1_SMBCLK
SML1_SMBDATA
NFC_RST#
CL_RST1#
CL_CLK1
CL_DATA1
MEM_SMBDATA
LAN_SMBCLK
LAN_SMBDATA
MEM_SMBCLK
PCH_TD_IREF
SIRQ
FPR_OFF
DDR_RST_EN
MEM_SMBCLK
MEM_SMBDATA
SML1_SMBCLK
SML1_SMBDATA
NFC_RST#
PCH_SPI_SI_R
PCH_SPI_SO_R
PCH_SPI_CLK
PCH_SPI_CS0#
PCH_SPI_SI
PCH_SPI_SO
SML1_SMBDATA
SML1_SMBCLK
LAN_SMBDATA
LAN_SMBCLK
PCH_SPI_WP#_RPCH_SPI_WP#
PCH_SPI_HOLD# PCH_SPI_HOLD#_R
PCH_SPI_CLK
LPC_LAD0[25,28,30,32]
LPC_LAD1[25,28,30,32]
LPC_LAD2[25,28,30,32]
LPC_LAD3[25,28,30,32]
SIRQ[28,30,32]
DDR_XDP_WAN_SMBDAT [11,12,13,28,38,5]
LAN_SMBDATA [29]
CL_CLK1 [25]
CL_DATA1 [25]
DDR_XDP_WAN_SMBCLK [11,12,13,28,38,5]
LPC_LFRAME#[25,28,30,32]
DDR_RST_EN [5]
LAN_SMBCLK [29]
FPR_OFF [28]
LPC_LDRQ0#[32]
PCH_SPI_CLK[30]
PCH_SPI_CS0#[30]
PCH_SPI_SI[30]
PCH_SPI_SO[30]
CL_RST1# [25]
PCH_KBC_I2CLK [30,35]
PCH_KBC_I2CDAT [30,35]
NFC_RST# [39]
NFC_3S_SMBDAT [39]
NFC_3S_SMBCLK [39]
PCH_SPI_WP#[30]
PCH_SPI_HOLD#[30]
+3V_PCH
+3VM_LAN
+3VS
+3VS
+3V_PCH
+3V_PCH
+3VS +3VS +3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
PCH - SPI, SMBUS,LPC
Custom
16 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
PCH - SPI, SMBUS,LPC
Custom
16 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
PCH - SPI, SMBUS,LPC
Custom
16 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.
QH10A
2N7002DWH_SOT363-6
@
QH10A
2N7002DWH_SOT363-6
@6 1
2
H43
HOLEA
H_2P8
@
H43
HOLEA
H_2P8
@1
RH155 5_0402_1%RH155 5_0402_1%
1 2
H33
HOLEA
H_3P1N
@
H33
HOLEA
H_3P1N
@1
QH10B
2N7002DWH_SOT363-6
@
QH10B
2N7002DWH_SOT363-6
@3 4
5
H47
HOLEA
H_3P0N
@
H47
HOLEA
H_3P0N
@1
RH1462.2K_0402_5% RH1462.2K_0402_5%
12
RH1532.2K_0402_5% RH1532.2K_0402_5%
12
H49
HOLEA
H_3P3
@
H49
HOLEA
H_3P3
@1
H10
HOLEA
H_3P8
@
H10
HOLEA
H_3P8
@1
RH145 10K_0402_5%RH145 10K_0402_5%
1 2
H28
HOLEA
H_3P3
@
H28
HOLEA
H_3P3
@1
H21
HOLEA
H_3P8
@
H21
HOLEA
H_3P8
@1
H50
HOLEA
H_3P0
@
H50
HOLEA
H_3P0
@1
H2
HOLEA
H_3P3
@
H2
HOLEA
H_3P3
@1
RH1502.2K_0402_5% RH1502.2K_0402_5%
1 2
ZZZ1
PCBMB
ZZZ1
PCBMB
RH14910K_0402_5% RH14910K_0402_5%
12
H26
HOLEA
H_3P3
@
H26
HOLEA
H_3P3
@1
H31
HOLEA
H_3P8
@
H31
HOLEA
H_3P8
@1
RH1442.2K_0402_5% RH1442.2K_0402_5%
12
H44
HOLEA
H_2P4X3P9N
@
H44
HOLEA
H_2P4X3P9N
@1
H37
HOLEA
H_3P0
@
H37
HOLEA
H_3P0
@1
RH157 5_0402_1%RH157 5_0402_1%
12
FD4
FIDUCIAL_C40M80
@
FD4
FIDUCIAL_C40M80
@1
QH3A
2N7002DWH_SOT363-6
QH3A
2N7002DWH_SOT363-6
6 1
2H20
HOLEA
H_4P3
@
H20
HOLEA
H_4P3
@1
QH3B
2N7002DWH_SOT363-6
QH3B
2N7002DWH_SOT363-6
3 4
5
H35
HOLEA
H_3P8
@
H35
HOLEA
H_3P8
@1
H40
HOLEA
H_3P0
@
H40
HOLEA
H_3P0
@1
FD2
FIDUCIAL_C40M80
@
FD2
FIDUCIAL_C40M80
@1
H1
HOLEA
H_3P0
@
H1
HOLEA
H_3P0
@1
H38
HOLEA
H_3P8
@
H38
HOLEA
H_3P8
@1
H22
HOLEA
H_4P8X3P8
@
H22
HOLEA
H_4P8X3P8
@1
H29
HOLEA
H_3P3
@
H29
HOLEA
H_3P3
@1
RH243 15_0402_5%RH243 15_0402_5%
1 2
CH113
22P_0402_50V8J
@ CH113
22P_0402_50V8J
@
1
2
FD3
FIDUCIAL_C40M80
@
FD3
FIDUCIAL_C40M80
@1
RH1512.2K_0402_5% RH1512.2K_0402_5%
1 2
RH154 5_0402_1%RH154 5_0402_1%
1 2
RH239
2.2
K_
04
02
_5
%
@
RH239
2.2
K_
04
02
_5
%
@
12
RH1482.2K_0402_5%@
RH1482.2K_0402_5%@ 12
H45
HOLEA
H_3P8X4P8N
@
H45
HOLEA
H_3P8X4P8N
@1
H27
HOLEA
H_3P3
@
H27
HOLEA
H_3P3
@1
FD1
FIDUCIAL_C40M80
@
FD1
FIDUCIAL_C40M80
@1
H7
HOLEA
H_3P8
@
H7
HOLEA
H_3P8
@1
RH238
2.2
K_
04
02
_5
%
@
RH238
2.2
K_
04
02
_5
%
@
12
H8
HOLEA
H_3P0
@
H8
HOLEA
H_3P0
@1
H24
HOLEA
H_3P3
@
H24
HOLEA
H_3P3
@1
RH156 5_0402_1%RH156 5_0402_1%
12
H25
HOLEA
H_2P8
@
H25
HOLEA
H_2P8
@1
H46
HOLEA
H_3P8
@
H46
HOLEA
H_3P8
@1
H19
HOLEA
H_4P8X3P8
@
H19
HOLEA
H_4P8X3P8
@1
H48
HOLEA
H_3P0N
@
H48
HOLEA
H_3P0N
@1
H6
HOLEA
H_3P8
@
H6
HOLEA
H_3P8
@1
LPT_PCH_M_EDS
SMBus
C-Link
Thermal
SP
IL
PC
3 OF 11
REV = 5UH1D
LYNXPOINT_BGA695
LPT_PCH_M_EDS
SMBus
C-Link
Thermal
SP
IL
PC
3 OF 11
REV = 5UH1D
LYNXPOINT_BGA695
SML1ALERT#/PCHHOT#/GPIO74H6
SPI_IO3AJ2
SPI_MISOAH3
SPI_IO2AJ4
SPI_MOSIAH1
SPI_CS2#AJ10
SPI_CS1#AL7
SPI_CS0#AJ7
SPI_CLKAJ11
LDRQ1#/GPIO23G20
SERIRQAL11
LDRQ0#D21
LFRAME#B21
LAD_3C18
LAD_2A18
LAD_1C20
LAD_0A20
TD_IREFAY43
CL_DATAAF10
CL_RST#AF7
CL_CLKAF11
SML1DATA/GPIO75N11
SML1CLK/GPIO58K6
SML0DATAR7
SML0CLKU8
SML0ALERT#/GPIO60N8
SMBDATAU11
SMBCLKR10
SMBALERT#/GPIO11N7
TP2BC45
TP4BE43
TP1BA45
TP3BE44
RH1522.2K_0402_5% RH1522.2K_0402_5%
12
QH9A2N7002DWH_SOT363-6
QH9A2N7002DWH_SOT363-6
61
2
H42
HOLEA
H_2P8
@
H42
HOLEA
H_2P8
@1
H9
HOLEA
H_3P8
@
H9
HOLEA
H_3P8
@1
RH14310K_0402_5% RH14310K_0402_5%
12
RH242 15_0402_5%RH242 15_0402_5%
1 2
H30
HOLEA
H_3P0
@
H30
HOLEA
H_3P0
@1
RH158 8.2K_0402_1%RH158 8.2K_0402_1%
1 2
QH9B
2N7002DWH_SOT363-6
QH9B
2N7002DWH_SOT363-6
34
5
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
----->WWAN
----->NA
----->NA
----->Smart card reader
----->Docking USB 2.0 port
----->USB Camera
----->Express card slot
----->USB 3.0 Walkup port 3
----->USB 3.0 Walkup port 2
----->Docking USB 3.0
----->USB 3.0 Walkup port 4
----->Finger Print Reader
----->Walkup USB 2.0 port
----->BT/WLAN Combo
CAD NOTE:
Route single-end 50-ohms and max 500-mils length.
Avoid routing next to clock pins or under stitching capacitors.
Recommended minimum spacing to other signal traces is 15 mils.
----->Docking USB 3.0
----->USB 3.0 Walkup port 2
----->USB 3.0 Walkup port 3
----->USB 3.0 Walkup port 4
Express card slot
GIGA LAN
WLAN
Card Reader
07/17 Add by HP request.
07/18 Change net name to TB_HOT_PLUG# follow HP request.
07/23 Delete off page symbol
07/23 Modify pin define for layout smooth
09/11 Delete RH165
09/11 Change RPH1.3
connection to TB_HOT_PLUG#
10/26 Change PCH.P3 and RPH2.4 connection to WWAN_DET#_PCH
USB3RN2USB3RP2USB3TN2USB3TP2
USB3RN1USB3RP1USB3TN1USB3TP1
USBP12+USBP12-
USBP13+USBP13-
USB_OC2#USB_OC3#
dGPU_HPD_INTR
WWAN_DET#_PCHUSB_OC1#_R
USBP10+USBP10-
USBP11+USBP11-
USBP9+
USBP0-USBP0+
USBP5+
USBP7+
USBP1-
USBP9-
USBP8-USBP8+
USBP5-
USBP7-
USBP4-USBP4+
USBP1+
USBP6+USBP6-
USB_OC4#_R
USBRBIAS
PCH_PCIE_IREF
PCH_PCIE_RCOMP
USBRBIAS
PCIE_PTX_DRX_N7
PCIE_PRX_DTX_P7PCIE_PRX_DTX_N7
PCIE_PTX_DRX_P7
PCIE_PTX_DRX_P8PCIE_PTX_DRX_N8
PCIE_PRX_DTX_P8PCIE_PRX_DTX_N8
PCIE_PRX_DTX_N3PCIE_PRX_DTX_P3
PCIE_PTX_DRX_N3PCIE_PTX_DRX_P3
PCIE_PTX_DRX_P4
PCIE_PRX_DTX_N4PCIE_PRX_DTX_P4
PCIE_PTX_DRX_N4
PCIE_PRX_EXPTX_P5PCIE_PRX_EXPTX_N5
PCIE_PTX_DRX_P6PCIE_PTX_DRX_N6
PCIE_PRX_DTX_N6PCIE_PRX_DTX_P6
USB3TP5
USB3RN5
USB3TN5USB3RP5
USB3RN6USB3RP6USB3TN6USB3TP6
PCIE_PTX_EXPRX_N5_CPCIE_PTX_EXPRX_P5_C
PCIE_PTX_DRX_P1PCIE_PTX_DRX_N1
PCIE_PRX_DTX_P1PCIE_PRX_DTX_N1
PCIE_PTX_DRX_P2
PCIE_PRX_DTX_P2PCIE_PRX_DTX_N2
PCIE_PTX_DRX_N2
USB_OC1#_RUSB_OC2#dGPU_HPD_INTR
WWAN_DET#_PCH
USB_OC3#LED_LINK_LAN#_RTB_HOT_PLUG#
USB_OC4#_R
PCIE_PRX_DTX_N7[25]PCIE_PRX_DTX_P7[25]
PCIE_PTX_C_DRX_N7[25]PCIE_PTX_C_DRX_P7[25]
PCIE_PTX_C_DRX_P8[39]
PCIE_PRX_DTX_N8[39]PCIE_PRX_DTX_P8[39]
PCIE_PTX_C_DRX_N8[39]
dGPU_HPD_INTR [35]LED_LINK_LAN#_R [29]
USBP0- [33]USBP0+ [33]
USBP1- [40]USBP1+ [40]
USBP4- [39]USBP4+ [39]
USBP6- [39]USBP6+ [39]
USBP7- [37]USBP7+ [37]
USBP8- [28]USBP8+ [28]
USBP9- [39]USBP9+ [39]
USBP5- [39]USBP5+ [39]
USBP11- [33]USBP11+ [33]
USBP12- [25]USBP12+ [25]
USBP13- [25]USBP13+ [25]
USB3RN1 [33]USB3RP1 [33]
USBP10- [22]USBP10+ [22]
USB3TN1 [33]USB3TP1 [33]
USB3RN2 [40]USB3RP2 [40]
USB3TN2 [40]USB3TP2 [40]
PCIE_PRX_DTX_P3[39]PCIE_PRX_DTX_N3[39]
PCIE_PTX_C_DRX_P3[39]PCIE_PTX_C_DRX_N3[39]
PCIE_PRX_DTX_N4[39]
PCIE_PTX_C_DRX_P4[39]
PCIE_PRX_DTX_P4[39]
PCIE_PTX_C_DRX_N4[39]
PCIE_PRX_EXPTX_N5[39]PCIE_PRX_EXPTX_P5[39]
PCIE_PTX_EXPRX_P5[39]PCIE_PTX_EXPRX_N5[39]
PCIE_PTX_C_DRX_P6[29]
PCIE_PRX_DTX_N6[29]PCIE_PRX_DTX_P6[29]
PCIE_PTX_C_DRX_N6[29]
USB3TP5 [39]
USB3RN5 [39]USB3RP5 [39]
USB3TP6 [39]
USB3TN5 [39]
USB3TN6 [39]USB3RP6 [39]
USB3RN6 [39]
TB_HOT_PLUG# [39]
PCIE_PRX_DTX_P1[39]
PCIE_PTX_C_DRX_P1[39]
PCIE_PRX_DTX_N1[39]
PCIE_PRX_DTX_N2[39]
PCIE_PTX_C_DRX_N1[39]
PCIE_PRX_DTX_P2[39]
PCIE_PTX_C_DRX_P2[39]PCIE_PTX_C_DRX_N2[39]
WWAN_DET#_PCH [25]
+3V_PCH
+1.5VS
+1.5VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
PCH-PCIE,USB
Custom
17 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
PCH-PCIE,USB
Custom
17 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
PCH-PCIE,USB
Custom
17 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.
CH36 0.1U_0402_10V7KCH36 0.1U_0402_10V7K1 2
RPH1
10K_1206_8P4R_5%
RPH1
10K_1206_8P4R_5%
1 82 73 64 5
CH109 0.1U_0402_10V7KCH109 0.1U_0402_10V7K1 2
CH31 0.1U_0402_10V7KCH31 0.1U_0402_10V7K1 2
CH28 0.1U_0402_10V7KCH28 0.1U_0402_10V7K1 2
CH111 0.1U_0402_10V7KCH111 0.1U_0402_10V7K1 2CH110 0.1U_0402_10V7KCH110 0.1U_0402_10V7K1 2
RH
15
92
2.6
_0
40
2_
1%
RH
15
92
2.6
_0
40
2_
1%
12
CH108 0.1U_0402_10V7KCH108 0.1U_0402_10V7K1 2
CH34 0.1U_0402_10V7KCH34 0.1U_0402_10V7K1 2CH33 0.1U_0402_10V7KCH33 0.1U_0402_10V7K1 2
RPH2
10K_1206_8P4R_5%
RPH2
10K_1206_8P4R_5%
1 82 73 64 5
CH27 0.1U_0402_10V7KCH27 0.1U_0402_10V7K1 2
CH99 0.1U_0402_10V7KCH99 0.1U_0402_10V7K1 2
CH30 0.1U_0402_10V7KCH30 0.1U_0402_10V7K1 2
CH100 0.1U_0402_10V7KCH100 0.1U_0402_10V7K1 2
LPT_PCH_M_EDS
US
B
PC
Ie
9 OF 11
REV = 5UH1I
LYNXPOINT_BGA695
LPT_PCH_M_EDS
US
B
PC
Ie
9 OF 11
REV = 5UH1I
LYNXPOINT_BGA695
USB3TP6BE28USB3TN6BD27USB3RP6AP29USB3RN6AR29USB3TP5BC26USB3TN5BE26USB3RP5AV29USB3RN5AW29
PETP1/USB3TP3BC32
PERP2/USB3RP4AR31
PETP2/USB3TP4BB33
USB3TP2BC24
PETN2/USB3TN4BD33
PERN2/USB3RN4AT31
PETN1/USB3TN3BE32
PERP1/USB3RP3AY31 PERN1/USB3RN3
AW31
PERN_3AW33
PERP_3AY33
PETN_3BE34
PETN_4BE36
PERN_5AW36
PERP_5AV36
PETN_5BD37
PERP_6AW38
PETN_6BC38
PERN_7AT40
USB2N13F24
USB2P13G24
USB2N12G26
USB2P12F26
USB2P11C28USB2N11A28USB2P10D29
USB2P9C30
USB2N10B29
USB2N9A30USB2P8C32USB2N8A32
USB2N7G29
USB2P7H29
USB2P6L31USB2N6K31USB2P5G31
USB2P4D33
USB2N5F31
USB2N4B33USB2P3C34USB2N3A34USB2P2C36USB2N2A36USB2P1C38USB2N1A38USB2P0D37USB2N0B37
PETP_8BD41
PCIE_IREFBE30
PCIE_RCOMPBD29
PETP_3BC34
PERN_4AT33
PERP_4AR33
PETP_4BC36
PETP_5BB37
PERN_6AY38
PETP_6BE38
PERP_7AT39
PETN_7BE40
PETP_7BC40
PERN_8AN38
PERP_8AN39
PETN_8BD42
USB3RN1AR26
USB3RP1AP26
USB3TN1BE24
USB3TP1BD23
USB3RN2AW26
USB3RP2AV26
USB3TN2BD25
USBRBIAS#K24
USBRBIASK26
OC0#/GPIO59P3
OC1#/GPIO40V1
OC2#/GPIO41U2
OC3#/GPIO42P1
OC4#/GPIO43M3
OC5#/GPIO9T1
OC6#/GPIO10N2
OC7#/GPIO14M1
TP23L33
TP6BB29
TP11BC30
TP24M33
RH160 0_0402_5%RH160 0_0402_5%
1 2
CH35 0.1U_0402_10V7KCH35 0.1U_0402_10V7K1 2
RH164 7.5K_0402_1%RH164 7.5K_0402_1%
1 2
CH29 0.1U_0402_10V7KCH29 0.1U_0402_10V7K1 2
CH32 0.1U_0402_10V7KCH32 0.1U_0402_10V7K1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
ENABLED - HIGH(DEFAULT)
DISABLED - LOW
PLL ON DIE VR ENABLE
SATA2GP/GPIO36 , SATA3GP/GPIO37 SAMPLED AT RISING EDGE OF PWROK.
WEAK INTERNAL PULL-DOWN.(WEAK INTERNAL PULL-DOWN IS DISABLED AFTER
PLRST_N DE-ASSERTS).
NOTE: THIS SIGNAL SHOLD NOT BE PULLED HIGH WHEN STRAP IS SAMPLED.Config
USB X4,PCIEX8,SATAX6
GPIO16,49
11
01USB X6,PCIEX8,SATAX4
07/06 Follow HP's GPIO table
07/06 Change for NFC
07/06 Change for NFC
07/06 Add PU resistor
07/23 Follow VBK10.
07/23 Delete FN_CLK2 off page symbol
07/23 Delete PCH_GPIO24 off page symbol
07/23 Delete PCH_GPIO37 off page symbol
07/23 Correct Net name
08/01 Change net name to Sec_HDD_DET
08/01 Change net name to Sec_HDD_DET
08/01 Change net name to mSATA_DET#
08/01 Change net name to mSATA_DET#
08/03 Delete RH201, RH202
10/24 Change RH176.2 connection to GND. Install RH176
10/24 Install RH185
10/25 Add LANWAKE# PU RH248 to +3VDS
10/26 Change RH180.2 connection to PCH_GPIO_35.Change RH180.1 connection to +3VS
10/26 Change net name to PCH_GPIO_35
10/26 Change netname to PCH_GPIO_36
10/26 Delete A20GATE off page symbol
10/26 Change net name to PCH_GPIO_36
10/29 Change RH179 to 100ohms
DOCK_ID1
EC_SCI#
DGPU_PRSNT#
KBL_DET#
LAN_DIS#
DGPU_PWROK
DOCK_ID0
PCH_GPIO24
NFC_INT
ODD_EN
PCH_GPIO0
H_CPUPWRGD
RCIN#
A20GATE
CPU_PLTRST#
A20GATE
RCIN#PCH_GPIO0
OCP_OC#
ODD_EN
PCH_GPIO28
DGPU_PWROK
DOCK_ID0
PCH_GPIO_36
PCH_GPIO37
DOCK_ID1
PCH_THERMTRIP#_R
THERM_SCI#
LANWAKE#
D3E_WAKE#
KBL_DET#
DGPU_PRSNT#
WWAN_TRANSMIT_OFF#
PCH_GPIO8
PCH_GPIO8
LAN_DIS#
PCH_GPIO15
PCH_GPIO24
PCH_GPIO28
PCH_GPIO37
FPR_LOCK#
NFC_INT
KBC_SIO_RST#
GPS_XMIT_OFF#
EC_SCI#
KBC_SIO_RST#
OCP_OC#
PCH_THERMTRIP#_R
PCH_GPIO_35
PCH_GPIO15
PCH_GPIO_35
PCH_GPIO_36
THERM_SCI#
WWAN_TRANSMIT_OFF#
PCH_GPIO34
PCH_GPIO34
FPR_LOCK#
LANWAKE#
H_CPUPWRGD [5]
EC_SCI#[30]
NFC_INT[39]
ODD_EN[23]
LAN_DIS#[29]
KBL_DET#[38]
LANWAKE#[29]
DGPU_PRSNT#[35]
CPU_PLTRST# [5]
RCIN#DGPU_PWROK[35]
WWAN_TRANSMIT_OFF#[25]
D3E_WAKE#
KBC_SIO_RST#[30,32]
GPS_XMIT_OFF#[25]
OCP_PWM_OUT[30]
PCH_THERMTRIP#_R [24,35,5]
PCH_GPIO8
FPR_LOCK#[28]
+1.05VS
+3VS+3VS
+3V_PCH
+3V_PCH
+3VS
+3VDS
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
PCH -GPIO,MISC,NTFC
Custom
18 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
PCH -GPIO,MISC,NTFC
Custom
18 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
PCH -GPIO,MISC,NTFC
Custom
18 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.
RH197 10K_0402_5%RH197 10K_0402_5%1 2
RH198 10K_0402_5%RH198 10K_0402_5%12
RH180 100K_0402_5%RH180 100K_0402_5%1 2
RH175 8.2K_0402_5%RH175 8.2K_0402_5%1 2
RH177 10K_0402_5%RH177 10K_0402_5%1 2
CH
37
0.1
U_
04
02
_1
6V
4Z
CH
37
0.1
U_
04
02
_1
6V
4Z
1
2RH182 10K_0402_5%RH182 10K_0402_5%12
RH178 10K_0402_5%RH178 10K_0402_5%1 2
T104PAD~D @T104PAD~D @
RH169 100K_0402_5%RH169 100K_0402_5%12
RH248 100K_0402_5%RH248 100K_0402_5%12
RH172 10K_0402_5%RH172 10K_0402_5%1 2
RH183 10K_0402_5%RH183 10K_0402_5%12
RH170 100K_0402_5%RH170 100K_0402_5%1 2
RH181 1K_0402_1%RH181 1K_0402_1%1 2
RH173 10K_0402_5%RH173 10K_0402_5%1 2
RH185 10K_0402_5%RH185 10K_0402_5%12
RH
19
34
.7K
_0
40
2_
5%
RH
19
34
.7K
_0
40
2_
5% 1
2
G
D
S
Q582N7002KW_SOT323-3
G
D
S
Q582N7002KW_SOT323-3
2
13
RH16810K_0402_5% RH16810K_0402_5%12
RH184 10K_0402_5%@
RH184 10K_0402_5%@ 12
RH176 10K_0402_5%RH176 10K_0402_5%12
LPT_PCH_M_EDS
NCTF
CPU/Misc
GPIO
6 OF 11
REV = 5UH1F
LYNXPOINT_BGA695
LPT_PCH_M_EDS
NCTF
CPU/Misc
GPIO
6 OF 11
REV = 5UH1F
LYNXPOINT_BGA695
TACH6/GPIO70G13
TACH7/GPIO71H15
VSSBA1
VSSBC1
VSSN10
VSSA2
VSSBD45
VSSBD2
VSSBD44
VSSBD1
VSSB45
VSSB2VSSB1VSSA44
VSSA41
LAN_PHY_PWR_CTRL/GPIO12K13
GPIO15AB11
VSSA43
VSSA4VSSE45VSSE1VSSD1VSSBE3VSSBE2
TACH4/GPIO68C16
GPIO57U12
SDATAOUT1/GPIO48AN4
GPIO35/NMI#AP1
GPIO28AD11
GPIO34AN6
GPIO27R11
GPIO24Y10
SCLOCK/GPIO22BB4
TACH3/GPIO7G15
TACH1/GPIO1F13
PLTRST_PROC#AU4
THRMTRIP#AV1
PROCPWRGDAV3
RCIN#AT6
PECIAY1
SATA5GP/GPIO49AK3
VSSB44
TACH5/GPIO69D13
SATA3GP/GPIO37AK1
SATA2GP/GPIO36AT3
VSSA5 VSS
C45 VSSBE5 VSS
BE41
SDATAOUT0/GPIO39AM3
SLOAD/GPIO38AT7
TACH0/GPIO17C14
SATA4GP/GPIO16AN2
GPIO8Y1
TACH2/GPIO6A14
BMBUSY#/GPIO0AT8
TP14AN10
RH200 10K_0402_5%RH200 10K_0402_5%12
RH240 10K_0402_5%RH240 10K_0402_5%1 2
RH167 10K_0402_5%RH167 10K_0402_5%12
RH179 100_0402_5%RH179 100_0402_5%12RH241 10K_0402_5%RH241 10K_0402_5%
1 2
RH199 10K_0402_5%RH199 10K_0402_5%12
RH
19
41
K_
04
02
_1
%@
RH
19
41
K_
04
02
_1
%@
12
RH171 10K_0402_5%RH171 10K_0402_5%12
RH16610K_0402_5% RH16610K_0402_5%12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
07/20 Delete CH60, CH62, CH63
+PCH_VCCDSW
+VCCADAC
+PCH_USB_DCPSUS1
+P
CH
_V
CC
DS
W_
R
+PCH_VCCDSW
+PCH_USB_DCPSUS3
+3VS
+1.05VS
+1.05VS
+1.05VS
+1.05VM
+1.5VS
+1.05VS
+1.5VS
+1.5VS
+3VS
+1.5VS
+1.5VS
+1.05VS
+3V_PCH
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
PCH- Power
Custom
19 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
PCH- Power
Custom
19 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
PCH- Power
Custom
19 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.
CH
43
1U
_0
40
2_
6.3
V6
KC
H4
31
U_
04
02
_6
.3V
6K
1
2
CH
44
1U
_0
40
2_
6.3
V6
KC
H4
41
U_
04
02
_6
.3V
6K
1
2
CH
49
22
U_
08
05
_6
.3V
6M
CH
49
22
U_
08
05
_6
.3V
6M
1
2
CH
53
10
U_
06
03
_6
.3V
6M
@CH
53
10
U_
06
03
_6
.3V
6M
@1
2
CH
47
0.1
U_
04
02
_1
6V
4Z
CH
47
0.1
U_
04
02
_1
6V
4Z
1
2
CH
51
1U
_0
40
2_
6.3
V6
KC
H5
11
U_
04
02
_6
.3V
6K
1
2
CH
61
1U
_0
40
2_
6.3
V6
KC
H6
11
U_
04
02
_6
.3V
6K
1
2
RH204 5.11_0402_1%~DRH204 5.11_0402_1%~D
1 2
LH1
BLM18PG181SN1D_2P
LH1
BLM18PG181SN1D_2P
12
T141 PAD@T141 PAD@
CH
42
10
U_
06
03
_6
.3V
6M
CH
42
10
U_
06
03
_6
.3V
6M
1
2
CH
55
1U
_0
40
2_
6.3
V6
KC
H5
51
U_
04
02
_6
.3V
6K
1
2
CH
46
1U
_0
40
2_
6.3
V6
KC
H4
61
U_
04
02
_6
.3V
6K
1
2
CH
41
0.1
U_
04
02
_1
6V
4Z
CH
41
0.1
U_
04
02
_1
6V
4Z
1
2
LPT_PCH_M_EDS
Co
re
PCIe/DMI
VCCMPHY
USB3
HVCMOS
FDI
CRT DAC
SATA
7 OF 11
REV = 5UH1G
LYNXPOINT_BGA695
LPT_PCH_M_EDS
Co
re
PCIe/DMI
VCCMPHY
USB3
HVCMOS
FDI
CRT DAC
SATA
7 OF 11
REV = 5UH1G
LYNXPOINT_BGA695
VCCVRMAN11
VCCAE18
VCCAE22
VCCASWU20
VCCASWU22
VCCASWU24
VCCASWV22
VCCASWV24
VCCASWY18
VCCASWY20
VCCASWY22
VCCADAC1_5P45
VSSP43
VCCADACBG3_3M31
VCCVRMBB44
VCCIOAN34
VCCIOAN35
VCC3_3_R30R30
VCC3_3_R32R32
DCPSUS1Y12
VCCSUS3_3AJ30
VCCSUS3_3AJ32
DCPSUS3AJ26
DCPSUS3AJ28
VCCIOAK20
VCCVRMAK26
VCCVRMAK28
VCCIOAK18
VCCVRMBE22
VCCIOAM22
VCCIOAP22
VCCIOAR22
VCCIOAT22
VCCASWV18
VCCASWV20
VCCASWU18 VCCASW
AA18 DCPSUSBYPU14
VCCY26 VCC
AG24 VCCAG22 VCCAG20
VCCAA24
VCCAA26
VCCAD20
VCCAD24 VCCAD22
VCCAD26
VCCAD28
VCCIOAK22
VCCIOAM20VCCIOAM18
VCCAG18 VCCAE26 VCCAE24
VCCAE20
T142 PAD@T142 PAD@
CH
52
10
U_
06
03
_6
.3V
6M
@CH
52
10
U_
06
03
_6
.3V
6M
@1
2
CH
40
0.0
1U
_0
40
2_
16
V7
KC
H4
00
.01
U_
04
02
_1
6V
7K
1
2
CH
48
0.1
U_
04
02
_1
6V
4Z
CH
48
0.1
U_
04
02
_1
6V
4Z
1
2
CH
45
10
U_
06
03
_6
.3V
6M
@CH
45
10
U_
06
03
_6
.3V
6M
@1
2
CH
54
10
U_
06
03
_6
.3V
6M
@CH
54
10
U_
06
03
_6
.3V
6M
@1
2
CH
50
1U
_0
40
2_
6.3
V6
KC
H5
01
U_
04
02
_6
.3V
6K
1
2
CH
58
1U
_0
40
2_
6.3
V6
KC
H5
81
U_
04
02
_6
.3V
6K
1
2
CH
39
1U
_0
40
2_
6.3
V6
KC
H3
91
U_
04
02
_6
.3V
6K
1
2
CH
59
10
U_
06
03
_6
.3V
6M
CH
59
10
U_
06
03
_6
.3V
6M
1
2
CH
56
1U
_0
40
2_
6.3
V6
KC
H5
61
U_
04
02
_6
.3V
6K
1
2
CH
38
10
U_
06
03
_6
.3V
6M
CH
38
10
U_
06
03
_6
.3V
6M
1
2
CH
57
1U
_0
40
2_
6.3
V6
KC
H5
71
U_
04
02
_6
.3V
6K
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Place near pin AP45 Place near pin Y32,AA30,AA32 Place near pin AD34 Place near pin AD35,AD36 Place near pin AG30,AG32,AE30,AE32
Place near pin M29 Place near pin L29 Place near pin L26,M26 Place near pin U32,V32
07/19 Non Install CH101
07/20 Delete CH102
07/25 Change power rail
09/11 Delete RH226
09/24 Delete RH213, RH216, and change netname.
09/24 Change netname
10/18 Install RH209. Uninstall RH208
10/23 Install RH208. Uninstall RH209
S2
+1.05VS_VCC
+PCH_VCCDSW3_3
+PCH_VCCSST
+PCH_DCPRTC
+1.05VS_VCC
+1.05VS
+3VS
+1.5VS
+3VS
+3VDS
+3VS
+1.05VS
+3V_PCH
+3V_PCH
+1.05VM
+1.5VS
+1.05VS
+1.05VS
+3VS
+RTCVCC
+3VS
+1.05VS
+1.05VS
+1.05VS_VCC+1.05VS
+3V_PCH
+3V_PCH
+3V_PCH
+3V_PCH
+3VS
+1.05VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
PCH - Power
Custom
20 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
PCH - Power
Custom
20 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
PCH - Power
Custom
20 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.
CH
93
1U
_0
40
2_
6.3
V6
KC
H9
31
U_
04
02
_6
.3V
6K
1
2
RH2080_0402_5% RH2080_0402_5% 12
CH
85
0.1
U_
04
02
_1
0V
6K
CH
85
0.1
U_
04
02
_1
0V
6K
1
2
CH
88
1U
_0
40
2_
6.3
V6
KC
H8
81
U_
04
02
_6
.3V
6K
1
2
CH
65
0.1
U_
04
02
_1
0V
6K
CH
65
0.1
U_
04
02
_1
0V
6K
1
2
CH
77
1U
_0
40
2_
6.3
V6
KC
H7
71
U_
04
02
_6
.3V
6K
1
2
CH
87
1U
_0
40
2_
6.3
V6
KC
H8
71
U_
04
02
_6
.3V
6K
1
2
T143PAD @ T143PAD @
CH
72
10
U_
06
03
_6
.3V
6M
CH
72
10
U_
06
03
_6
.3V
6M
1
2
CH105 0.1U_0402_10V6KCH105 0.1U_0402_10V6K1 2
CH104
0.1U_0402_10V6K
CH104
0.1U_0402_10V6K
1 2
CH83 0.1U_0402_10V6KCH83 0.1U_0402_10V6K1 2
CH
64
0.1
U_
04
02
_1
0V
6K
CH
64
0.1
U_
04
02
_1
0V
6K
1
2
CH
76
0.1
U_
04
02
_1
0V
6K
CH
76
0.1
U_
04
02
_1
0V
6K
1
2
CH
94
1U
_0
40
2_
6.3
V6
KC
H9
41
U_
04
02
_6
.3V
6K
1
2
CH
92
1U
_0
40
2_
6.3
V6
KC
H9
21
U_
04
02
_6
.3V
6K
1
2
CH
89
1U
_0
40
2_
6.3
V6
KC
H8
91
U_
04
02
_6
.3V
6K
1
2
CH
67
0.1
U_
04
02
_1
0V
6K
CH
67
0.1
U_
04
02
_1
0V
6K
1
2
LH2
4.7UH_LQM18FN4R7M00D_20%
LH2
4.7UH_LQM18FN4R7M00D_20%1 2
CH
90
1U
_0
40
2_
6.3
V6
KC
H9
01
U_
04
02
_6
.3V
6K
1
2
CH
95
1U
_0
40
2_
6.3
V6
KC
H9
51
U_
04
02
_6
.3V
6K
1
2
CH
75
0.1
U_
04
02
_1
0V
6K
CH
75
0.1
U_
04
02
_1
0V
6K
1
2
CH
69
0.0
1U
_0
40
2_
16
V7
K_
X7
RC
H6
90
.01
U_
04
02
_1
6V
7K
_X
7R
1
2
CH
71
0.1
U_
04
02
_1
0V
7K
~D
CH
71
0.1
U_
04
02
_1
0V
7K
~D
1
2
CH
73
1U
_0
40
2_
6.3
V6
KC
H7
31
U_
04
02
_6
.3V
6K
1
2
CH
96
1U
_0
40
2_
6.3
V6
KC
H9
61
U_
04
02
_6
.3V
6K
1
2
CH
91
1U
_0
40
2_
6.3
V6
KC
H9
11
U_
04
02
_6
.3V
6K
1
2
RH2090_0402_5% @ RH2090_0402_5% @ 12
CH
79
1U
_0
40
2_
6.3
V6
KC
H7
91
U_
04
02
_6
.3V
6K
1
2
CH66 0.1U_0402_10V6KCH66 0.1U_0402_10V6K1 2
CH
86
10
U_
06
03
_6
.3V
6M
@CH
86
10
U_
06
03
_6
.3V
6M
@1
2
CH
81
1U
_0
40
2_
6.3
V6
KC
H8
11
U_
04
02
_6
.3V
6K
1
2
CH
70
0.1
U_
04
02
_1
0V
6K
CH
70
0.1
U_
04
02
_1
0V
6K
1
2
CH74 0.1U_0402_10V7K~DCH74 0.1U_0402_10V7K~D1 2
CH
68
0.1
U_
04
02
_1
0V
6K
CH
68
0.1
U_
04
02
_1
0V
6K
1
2
CH
80
10
U_
06
03
_6
.3V
6M
CH
80
10
U_
06
03
_6
.3V
6M
1
2
CH84 1U_0402_6.3V6KCH84 1U_0402_6.3V6K1 2
LPT_PCH_M_EDS
ICC
Thermal
Fuse
SPI
CPU
RTC
Azalia
GPIO/LPC
US
B
8 OF 11
REV = 5UH1H
LYNXPOINT_BGA695
LPT_PCH_M_EDS
ICC
Thermal
Fuse
SPI
CPU
RTC
Azalia
GPIO/LPC
US
B
8 OF 11
REV = 5UH1H
LYNXPOINT_BGA695
VCCSUS3_3R26
VCCSUS3_3R28
VCCSUS3_3U26
VSSM24
VCCUSBPLLU35
VCC3_3L24
VCCIOU30
VCCIOV30 VCCIOV28
VCCCLKY32
VCCCLK3_3M29
VCCCLK3_3L29
VCCCLK3_3L26
VCCCLK3_3M26
VCCCLK3_3U32
VCCCLK3_3V32
VCCCLKAD34
VCCCLKAA30
VCCCLKAA32
VCCCLKAD35
VCCCLKAG30
VCCCLKAG32
VCCCLKAD36
VCCCLKAE30
VCCCLKAE32
VCCSUS3_3R20
VCCSUS3_3R22
VCCDSW3_3A16
DCPSSTAA14
VCC3_3AE14
VCC3_3AF12
VCC3_3AG14
VCCIOU36
VCCSUSHDAA26
VCCSUS3_3K8
VCCRTCA6
DCPRTCP14
DCPRTCP16
V_PROC_IOAJ12
V_PROC_IOAJ14
VCCSPIAD12
VCCP18
VCCP20
VCCASWL17
VCCASWR18
VCCVRMAW40
VCC3_3AK30
VCC3_3AK32
VCCAP45
VCCVRMAF34
DCPSUS2Y35
VCCIOY30
VCCSUS3_3R24
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
PCH - GND
Custom
21 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
PCH - GND
Custom
21 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
PCH - GND
Custom
21 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.
LPT_PCH_M_EDS REV = 5
10 OF 11
UH1J
LYNXPOINT_BGA695
LPT_PCH_M_EDS REV = 5
10 OF 11
UH1J
LYNXPOINT_BGA695
VSSAV31
VSSBB25
VSSAV40
VSSAV33
VSSAV13 VSS
D42
VSSAT36
VSSAT26 VSSAT20 VSSAT17
VSSAT29
VSSAV24
VSSN12
VSSN39VSSN35
VSSN6
VSSP24VSSP22
VSSP30VSSP28VSSP26
VSSP32
VSSR12
VSSR2VSSR16VSSR14
VSSR38VSSR34
VSSR44
VSST43VSSR8
VSSU16VSSU10
VSSU28
VSSU34
VSSU38
VSSU6VSSU42
VSSV14
VSSV16
VSSV26
VSSW44VSSW2VSSV43
VSSY16VSSY14
VSSY24
VSSY34VSSY28
VSSY40VSSY36
VSSY8
VSSAT38
VSSF43
VSSAT15 VSSAT10 VSSAK16 VSSAR2 VSS
AP43
VSSAP24
VSSAN40 VSSAN36
VSSAM30 VSSAM28
VSSM22VSSM17VSSL44VSSL2VSSK39
VSSB15 VSSB11 VSSAY7 VSS
AY29 VSSAY26 VSSAY20 VSSAY15 VSSAY10
VSSAW2 VSSAV6
VSSAP31
VSSAP13 VSSAN8
VSSAM32
VSSAM26 VSSAM24 VSSAM14 VSS
AL8 VSSAL38 VSSAL34
VSSAN42
VSSAM16
VSSAV22
LPT_PCH_M_EDS REV = 5
11 OF 11
UH1K
LYNXPOINT_BGA695
LPT_PCH_M_EDS REV = 5
11 OF 11
UH1K
LYNXPOINT_BGA695
VSSD4VSSBC16
VSSG2
VSSG38
VSSG44
VSSG8
VSSH10
VSSH13
VSSAB8
VSSBD31
VSSBD35
VSSBD39
VSSBD7
VSSAV7
VSSF20
VSSF33
VSSAA16
VSSH36
VSSH26
VSSH17
VSSH22
VSSH24
VSSF29
VSSF15
VSSD25
VSSAC2
VSSAB38
VSSAJ20 VSSAJ18
VSSAJ24 VSSAJ22
VSSK33VSSK29VSSK20VSSK15VSSK10VSSH7VSSH40
VSSH31
VSSAT43VSSAY36VSSBD19VSSBD15VSSBD11VSSBA40VSSB7VSSB39VSSB35VSSB31VSSB27VSSB23VSSB19
VSSAL2 VSS
AL12 VSSAK45 VSSAK43 VSSAK24 VSSAK14 VSS
AJ8 VSSAJ6 VSS
AJ38 VSSAJ34
VSSAJ16
VSSAG16 VSS
AF8 VSSAF38 VSSAE28 VSSAE16 VSSAD8
VSSAD16 VSSAD14 VSSAC44
VSSAB34 VSSAB12 VSS
AA4 VSSAA28 VSSAA22 VSSAA20
VSSAG44 VSSAG28 VSSAG26 VSS
AG2
VSSAD32 VSSAD30 VSSAD18
VSSBB42 VSSBC22
VSSBC28
VSSAD6 VSS
AD40
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LCD POWER CIRCUIT
eDP PANEL Conn.
W=60mils
W=60mils
W=60milsPlace closed to JLVDS1
W=60mils
SM010014520 3000ma
220ohm@100mhz
DCR 0.04
07/06 Change for eDP MUX
07/23 Add C392 and C394 by RF request
07/31 Delete Q21,Q22,R454,R14.
08/03 Swap pin define for layout smooth
08/08 Reserve C449 by RF request
09/12 Modify JEDP1 symbol and footprint.
09/12 Modify JEDP1 symbol and footprint.
09/13 Modify JEDP1 symbol and footprint.
07/31 Delete +5VS_R_LOGO_KBL signal
09/20 Correct circuit short issue, Modify pin define.
9/20 Change to commond part.
09/25 Change LCDVDD power rail solution.
Delete R9, R10, R11, Q12, Q20, C1, C7, C8
Add U47, C497, C498, C499
Uninstall R494
07/23 Add C392 and C394 by RF request
09/25 Reserve C500, C501 for ESD request
09/26 Change C497 to 4.7u. Install R490
11/01 Delete C23, C80, C82, C111
11/06 Change C498 to 4700pF
ENABLT
INV_PWM
ENABLT_R
USB20_P10_R
USB20_N10_R
D_MIC_DATAD_MIC_CLK
INV_PWMENABLT_REDP_SW_HPD
USB20_P10_RUSB20_N10_R
ENAVDD
D_MIC_CLKD_MIC_DATA
ENAVDD[35]
ENABLT[35]
LID_SW#[30,38,39]
USBP10+[17]
USBP10-[17]
EDP_SW_D0P[36]
EDC_SW_AUX[36]EDC_SW_AUX#[36]
EDP_SW_D1P[36]EDP_SW_D1N[36]
EDP_SW_D0N[36]
EDP_SW_D2N[36]EDP_SW_D2P[36]
EDP_SW_D3N[36]EDP_SW_D3P[36]
D_MIC_CLK[26]D_MIC_DATA[26]
INV_PWM[35]
EDP_SW_HPD[36]SG_IN[13]
Camera_ON[14]
INVPWR_B+ B+
+LCDVDD
+5VS
+LCDVDD
+3VS
INVPWR_B+
+3VS
+5VS
+3VDS +LCDVDD
+5VDS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P0.5
22 56Thursday, December 20, 2012
2011/06/29 2011/06/29
Compal Electronics, Inc.
eDP/LVDS CONN & CameraTitle
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P0.5
22 56Thursday, December 20, 2012
2011/06/29 2011/06/29
Compal Electronics, Inc.
eDP/LVDS CONN & CameraTitle
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P0.5
22 56Thursday, December 20, 2012
2011/06/29 2011/06/29
Compal Electronics, Inc.
eDP/LVDS CONN & Camera
L1FBMA-L11-201209-221LMA30T_0805
L1FBMA-L11-201209-221LMA30T_0805
12
U47
TPS22965DSGR_SON8_2X2
U47
TPS22965DSGR_SON8_2X2
VIN1
VIN2
ON3
VBIAS4
VOUT7
VOUT8
CT6 GND
5
GND9
C394
18P
_0402_50V
8J
@
C394
18P
_0402_50V
8J
@
1
2
C2
10U_0603_6.3V6M
C2
10U_0603_6.3V6M
1
2
D3
RB751V-40_SOD323-2
D3
RB751V-40_SOD323-2
1 2
C830.1U_0402_16V4Z
C830.1U_0402_16V4Z
1
2
R122K_0402_5%
R122K_0402_5%1 2
C4
680P
_0402_50V
7K
C4
680P
_0402_50V
7K
1
2
C84
4.7
U_0603_6.3
V6K
C84
4.7
U_0603_6.3
V6K
1
2
R178100K_0402_5%R178100K_0402_5%
1 2
L3
WCM-2012-900T_4P
L3
WCM-2012-900T_4P
11
44
33
22
R490 100K_0402_5%R490 100K_0402_5%12
C393
18P
_0402_50V
8J
@
C393
18P
_0402_50V
8J
@
1
2
R13100K_0402_5%R13100K_0402_5%
12
C5
68P_0402_50V8J
C5
68P_0402_50V8J
1
2
R15 0_0402_5%@R15 0_0402_5%@1 2
R179100K_0402_5%
R179100K_0402_5%
12
L2FBMA-L11-201209-221LMA30T_0805
L2FBMA-L11-201209-221LMA30T_0805
12C449
82P
50V
J NP
O 0
402
@
C449
82P
50V
J NP
O 0
402
@
12
C498
4700P_0402_16V7K
C498
4700P_0402_16V7K
1
2
R16 0_0402_5%@
R16 0_0402_5%@1 2
C501
10P
_0402_25V
8K
@
C501
10P
_0402_25V
8K
@1
2
JEDP1
ACES_50398-04071-001
CONN@
JEDP1
ACES_50398-04071-001
CONN@
11
22
33
44
55
66
77
88
99
1010
1111
1212
1313
1414
1515
1616
1717
1818
1919
2020
2121
2222
2323
2424
2525
2626
2727
2828
2929
3030
3131
3232
3333
3434
3535
3636
3737
3838
3939
4040
G141
G242
G343
G444
G545
C22 680P_0402_50V7KC22 680P_0402_50V7K12
C499
0.1
U_0402_16V
4Z
C499
0.1
U_0402_16V
4Z
1
2
R491
100K_0402_5%
R491
100K_0402_5%
12
C500
10P
_0402_25V
8K
@
C500
10P
_0402_25V
8K
@1
2
C3
0.1U_0402_16V4Z
C3
0.1U_0402_16V4Z
1
2
C81
1U
_0402_6.3
V6K
C81
1U
_0402_6.3
V6K
1
2
C497
4.7
U_0603_6.3
V6K
C497
4.7
U_0603_6.3
V6K
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SATA ODD CONN.
Placea caps. near ODD CONN.Place caps.near ODDCONN. Placea caps. near HDD CONN.
SATA HDD CONN. Place caps.near HDDCONN.100mils
mSATA Conn.
07/06 Correct Net name to follow HP GPIO table
07/06 Change value to 10K
07/12 Delete C54 and add R539 by HP request
07/30 Modify JHHD1 footprint.
07/30 Modify JODD1 footprint.
08/01 Modify SATA bus from port 2 to port 5
08/01 Delete Q48 and add R565
08/03 Modify JODD1 footprint.
08/03 Change JODD1 pin 16 and 17 to NC.
10/26 Delete R565
10/31 Modify JODD1 footprint.
11/07 Change C58 to 68pF
11/07 Change C48 to 68pF
SATA_PRX_C_DTX_P1SATA_PRX_C_DTX_N1
SATA_PTX_C_DRX_P1SATA_PTX_C_DRX_N1
SATA_PTX_C_DRX_P0SATA_PTX_C_DRX_N0
SATA_PRX_C_DTX_N0SATA_PRX_C_DTX_P0
SATA_PTX_C_DRX_P5SATA_PTX_C_DRX_N5
SATA_PRX_C_DTX_N5SATA_PRX_C_DTX_P5
ODD_EN
ODD_EN#
mSATA_DET#
SATA_PTX_DRX_N5[13]SATA_PTX_DRX_P5[13]
SATA_PRX_DTX_P5[13]SATA_PRX_DTX_N5[13]
SATA_PTX_DRX_P0 [13]SATA_PTX_DRX_N0 [13]
SATA_PTX_DRX_N1 [13]SATA_PTX_DRX_P1 [13]
SATA_PRX_DTX_P1 [13]SATA_PRX_DTX_N1 [13]
SATA_PRX_DTX_N0 [13]SATA_PRX_DTX_P0 [13]
ODD_DA# [14]
mSATA_DET#[32]
ODD_EN[18]
+5V_ODD+5VS
+5V_ODD
+5V_ODD
+5VS
+5VS
+3VS
+3VS
+3VS
+5VS
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
IBEX-M(1/6)-HDA/JTAG/SATACustom
23 56Thursday, December 20, 2012
2012/03/23 2010/03/31Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
IBEX-M(1/6)-HDA/JTAG/SATACustom
23 56Thursday, December 20, 2012
2012/03/23 2010/03/31Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
IBEX-M(1/6)-HDA/JTAG/SATACustom
23 56Thursday, December 20, 2012
2012/03/23 2010/03/31Compal Electronics, Inc.
R539
100K_0402_5%
R539
100K_0402_5%
1 2
C61 0.01U_0402_16V7KC61 0.01U_0402_16V7K1 2
C420.01U_0402_16V7K_X7R C420.01U_0402_16V7K_X7R 1 2
C59
4.7U_0603_6.3V6K
C59
4.7U_0603_6.3V6K
1
2
JMINI1
BELLW_80003-1023CONN@
JMINI1
BELLW_80003-1023CONN@
11
22
33
44
55
66
77
88
99
1010
1111
1212
1313
1414
1515
1616
1717
1818
1919
2020
2121
2222
2323
2424
2525
2626
2727
2828
2929
3030
3131
3232
3333
3434
3535
3636
3737
3838
3939
4040
4141
4242
4343
4444
4545
4646
4747
4848
4949
5050
5151
5252
GND153
GND254
C60
0.1U_0402_16V4Z
C60
0.1U_0402_16V4Z
1
2
JODD1
SANTA_203801-1CONN@
JODD1
SANTA_203801-1CONN@
GND1
A+2
A-3
GND4
B-5
B+6
GND7
DP8
+5V9
+5V10
MD11
GND12
GND13
GND14
GND15
GND16
GND17
JHDD1
SANTA_199201-1
CONN@JHDD1
SANTA_199201-1
CONN@
GND1
A+2
A-3
GND4
B-5
B+6
GND7
V338
V339
V3310
GND11
GND12
GND13
V514
V515
V516
GND17
Reserved18
GND19
V1220
V1221
V1222
GND23
GND24
C64 0.01U_0402_16V7KC64 0.01U_0402_16V7K1 2
G
D
S
Q25
2N7002_SOT23-3
G
D
S
Q25
2N7002_SOT23-3
2
13
C48
68P
_0402_50V
8J
C48
68P
_0402_50V
8J
1
2
R56 0_0402_5%@R56 0_0402_5%@1 2
C56
0.1
U_0402_10V
6K
C56
0.1
U_0402_10V
6K
1
2
C500.01U_0402_16V7K_X7R C500.01U_0402_16V7K_X7R 1 2
C520.01U_0402_16V7K_X7R C520.01U_0402_16V7K_X7R 1 2
C62 0.01U_0402_16V7KC62 0.01U_0402_16V7K1 2
C53
0.1U_0402_10V6K@
C53
0.1U_0402_10V6K@
1
2
C55
10U
_0805_10V
4K
C55
10U
_0805_10V
4K
1
2
R1316 10K_0402_5%R1316 10K_0402_5%1 2
G
DS
Q24
SI2305CDS-T1-GE3_SOT23-3
G
DS
Q24
SI2305CDS-T1-GE3_SOT23-32
13
C430.01U_0402_16V7K_X7R C430.01U_0402_16V7K_X7R 1 2C440.01U_0402_16V7K_X7R C440.01U_0402_16V7K_X7R 1 2
R55 0_0805_5%@
R55 0_0805_5%@1 2
C57
0.1
U_0402_10V
6K
C57
0.1
U_0402_10V
6K
1
2
C410.01U_0402_16V7K_X7R C410.01U_0402_16V7K_X7R 1 2
C45
10U
_0805_10V
4Z
C45
10U
_0805_10V
4Z
1
2
C46
1U
_0402_6.3
V4Z
C46
1U
_0402_6.3
V4Z
1
2
C58
68P
_0402_50V
8J
C58
68P
_0402_50V
8J
1
2
CC
52
1U
_0402_6.3
V6K
CC
52
1U
_0402_6.3
V6K
1
2
C510.01U_0402_16V7K_X7R C510.01U_0402_16V7K_X7R 1 2
C490.01U_0402_16V7K_X7R C490.01U_0402_16V7K_X7R 1 2
C47
0.1
U_0402_16V
4Z
C47
0.1
U_0402_16V
4Z
1
2
R57
100K_0402_5%
R57
100K_0402_5%
12
C63 0.01U_0402_16V7KC63 0.01U_0402_16V7K1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PWM Fan Control circuit#4/11 change by HP requirement
Place Q65 close CPU side
Notes:
#5/7 change byHP requirement
07/12 Change U3 to TC7SET00 by HP request
07/12 Swap JFAN1 pin1 and pin 2
08/01 Change netname to KBC_PWR_ON
10/18 Install R492 and change R492.2 connection to PCH_THERMTRIP#_R
08/01 Change netname to KBC_PWR_ON
FAN_PWM[30]
TACH_FAN_IN[30]
PCH_THERMTRIP#_R [18,35,5]
KBC_PROC_HOT#[30,5]
KBC_PROC_HOT_R[47,5]
+5VS
+5VS
+3VS
+VCCIO_OUT
+5VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
Thermal/FANCustom
24 56Thursday, December 20, 2012
2012/03/23 2011/12/31Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
Thermal/FANCustom
24 56Thursday, December 20, 2012
2012/03/23 2011/12/31Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
Thermal/FANCustom
24 56Thursday, December 20, 2012
2012/03/23 2011/12/31Compal Electronics, Inc.
E
B
C
Q65
MMBT3904_SOT23-3E
B
C
Q65
MMBT3904_SOT23-3
2
13
JFAN1
ACES_50273-0040N-001CONN@
JFAN1
ACES_50273-0040N-001CONN@
11
22
33
G55
G66
44
U38
GMT G708T1U
U38
GMT G708T1U
SET1
GND2
OT#3HYST
4
VCC5
R1334.7K_0402_5%
R1334.7K_0402_5%
12
C660.1U_0402_16V4Z C660.1U_0402_16V4Z
1
2
R60
22_0402_5%
R60
22_0402_5%1 2
R166
47K_0402_5%
R166
47K_0402_5%
1 2
U3
TC7SET00FU _SSOP5
U3
TC7SET00FU _SSOP5
INB1
INA2 O
4
G3
P5
R492 0_0402_5%R492 0_0402_5%1 2
R61
150_0402_1%
R61
150_0402_1%
1 2
D4
RB751V-40_SOD323-2
D4
RB751V-40_SOD323-2
12
R172K_0402_5%
R172K_0402_5%1 2
C65
0.1U_0402_10V6K@
C65
0.1U_0402_10V6K@
12
R1315
28K_0402_1%
R1315
28K_0402_1%
1 2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
WWANWLAN
7W
WLAN
Enable
BT
on module
LOHI
HILO
Disable
BT_ON#
BT_CRTL
WLAN&BT Combo module circuits
BT
on module
For Wireless LAN
Mini Card Power Rating
+3VS
+3V
+1.5VS
Primary Power (mA)
Peak Normal
1000
330
500
750
250
375
Auxiliary Power (mA)
Normal
250 (wake enable)
5 (Not wake enable)
Power
#4/13 change by HP requirement
07/06 Change to NFCC connector
07/16 Add for ESD's request
07/19 Change power rail to +3VDS
07/19 Delete C85
07/19 Delete C79
07/24 Modify JMINI3 pin define.
07/25 JSIM1.7 connection to SUM_DET
07/25 Modify JMINI3 pin define.
07/31 modify Q4A circuit.
07/31 Install Q29 and Q31
08/01 Q68 and R459 uninstall
08/03 Q4.2 connection to BT_ON
08/03 Modify JMINI3 footprint
08/07 Add JMINI2.1 net name. Add R568
and connection R586.1 to KBC_DS3_EN
08/07 Add R567 and connection
R567.1 to WLAN_WKAE#
09/10 Add R599 and R600
09/10 Delet T128
09/10 Delet T126
09/12 Modify JSIM1 symbol and footprint.
10/16 Change R568.1 connection to KBC_WAKE#. Delete R64
10/16 Install R567
10/24 Add PD R618
10/24 Delete R567
10/24 Add R619, R620, R621
10/25 Delete R618
10/25 Delete R89
11/06 Delete Q68, R459
11/06 Change R458 to 0ohm
11/06 Change JMINI3.13
connection to signal
WWAN_DET#_PCH
11/06 Change JMINI3.65 connection to GND.
UIM_PWR
UIM_CLK
M_WXMIT_OFF#
UIM_PWRUIM_RST
UIM_DATAUIM_VPP
WW_LED#
WL_LED
WL_LED#
WL_LED
WL/BT_LED#
WLAN_WAKE#
LPC_LAD1
LPC_LFRAME#
LPC_LAD0
LPC_LAD3LPC_LAD2
PLT_RST#CLK_PCI_DEBUG
WL_LED#
BT_ON
WLAN_TRAMSIT_OFF#
WW_LED#
PLT_RST#
M_WXMIT_OFF#
NGFF_WWAN_PEDET
NGFF_WWAN_USB3_OC
WWAN_FULL_PWR
SIM_DET
BT_ON
UIM_RST
UIM_PWR
UIM_CLKUIM_DATA
WWAN_DET#_PCH
WWAN_RSVD2
SIM_DET
WLAN_WAKE#
WWAN_FULL_PWR
WWAN_RSVD2
WWAN_TRANSMIT_OFF#[18]
WWAN_DISABLE[30]
WLAN_TRAMSIT_OFF# [15]
PCIE_PRX_DTX_N7[17]PCIE_PRX_DTX_P7[17]
PCIE_PTX_C_DRX_N7[17]
CLK_PCIE_MINI1[15]CLK_PCIE_MINI1#[15]
PCH_PCIE_WAKE#[14]
PLT_RST# [13,14,28,29,30,35,37,39,5]
PCIE_PTX_C_DRX_P7[17]
LPC_LAD2 [16,28,30,32]
LPC_LFRAME# [16,28,30,32]
LPC_LAD1 [16,28,30,32]
LPC_LAD3 [16,28,30,32]
LPC_LAD0 [16,28,30,32]
CL_RST1#[16]
CLK_PCI_DEBUG[15]
BT_OFF[14]
WLAN_DISABLE [30]
MINI1_CLKREQ#[15]
CL_DATA1[16]CL_CLK1[16]
USBP13+ [17]USBP13- [17]
WL/BT_LED# [39]
USBP12+[17]USBP12-[17]
WWAN_DET#[13]
UIM_VPP[39]
GPS_XMIT_OFF# [18]
KBC_WAKE#[29,30]
WWAN_DET#_PCH[17]
+3V_WWAN
+3V_WWAN
+3V_WWAN
+3V_WWAN
+3V_WWAN
+3VDS
+3VS
+3VS
+3VS +3V_AOAC
+3V_AOAC
+3VDS
+3V_AOAC
+3VDS
+3V_AOAC
+3V_WWAN
+3VS
+3V_WWAN
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
WWAN/NAND mini
25 56Thursday, December 20, 2012
2012/03/23 2010/03/31Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
WWAN/NAND mini
25 56Thursday, December 20, 2012
2012/03/23 2010/03/31Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
WWAN/NAND mini
25 56Thursday, December 20, 2012
2012/03/23 2010/03/31Compal Electronics, Inc.
C7
4
4.7
U_
08
05
_1
0V
4Z
C7
4
4.7
U_
08
05
_1
0V
4Z
1
2
10K
47K
Q31DTA114YKAGZT146_SOT23-3
10K
47K
Q31DTA114YKAGZT146_SOT23-3
2
13
C7
0
39
P_
04
02
_5
0V
8J
@
C7
0
39
P_
04
02
_5
0V
8J
@
1
2
C86
0.1U_0402_16V4Z
C86
0.1U_0402_16V4Z
1
2
D8
RB751V-40_SOD323-2
D8
RB751V-40_SOD323-21 2
JSIM1
HB_5680629-SICR11
CONN@JSIM1
HB_5680629-SICR11
CONN@
VCC1
RST2
CLK3
GND5
VPP6
I/O7
NC4
GND8GND9
C7
6
18
P_
04
02
_5
0V
8J
@
C7
6
18
P_
04
02
_5
0V
8J
@
1
2
U5
S DIO(BR) NUP4301MR6T1 TSOP-6@
U5
S DIO(BR) NUP4301MR6T1 TSOP-6@
CH11
Vn2
CH23
CH34
Vp5
CH46
R84
220K_0402_1%
R84
220K_0402_1%
1 2
R85
10K_0402_5%
R85
10K_0402_5%
12
C7
2
0.0
1U
_0
40
2_
16
V7
K
C7
2
0.0
1U
_0
40
2_
16
V7
K
1
2
Q4B2N7002DW T/R7_SOT-363-6Q4B2N7002DW T/R7_SOT-363-6
3
5
4
C7
7
4.7
U_
08
05
_1
0V
4Z
C7
7
4.7
U_
08
05
_1
0V
4Z
1
2
R67
0_0402_5%@R67
0_0402_5%@1 2
R568 0_0402_5%@R568 0_0402_5%@1 2
JMINI2
BELLW_80003-1023CONN@
JMINI2
BELLW_80003-1023CONN@
11
22
33
44
55
66
77
88
99
1010
1111
1212
1313
1414
1515
1616
1717
1818
1919
2020
2121
2222
2323
2424
2525
2626
2727
2828
2929
3030
3131
3232
3333
3434
3535
3636
3737
3838
3939
4040
4141
4242
4343
4444
4545
4646
4747
4848
4949
5050
5151
5252
GND153
GND254
JMINI3
LOTES_APCI0018-P002A
CONN@JMINI3
LOTES_APCI0018-P002A
CONN@
GND1
3P3VAUX2
GND3
3P3VAUX4
GND5
FULL_CARD_PWR_OFF#6
USB_D+7
W_DISABLE1#8
USB_D-9
LED1#10
GND11
AUDIO012
GND_WWAN13
AUDIO114
RESERVED15
AUDIO216
RESERVED17
AUDIO318
GND19
IUM_RFU20
USB3_TX-21
UIM_RESET22
USB3_TX+23
UIM_CLK24
GND25
UIM_DATA26
USB3RX-27
UIM_PWR28
USB3RX+29
NC30
GND31
GNSS032
NC33
GNSS134
NC35
GNSS236
GND37
GNSS338
NC39
GNSS440
NC41
NC42
GND43
NC44
NC45
NC46
NC47
NC48
GND49
NC50
ANTCTL051
COEX352
ANTCTL153
COEX254
ANTCTL255
COEX156
ANTCTL357
SIM_DET58
RESET#59
SUSCLK60
PEDET61
3P3VAUX62
GND63
3P3VAUX64
GND65
3P3VAUX66
OC_USB367
GND168
GND269
R81
10K_0402_5%
R81
10K_0402_5%
12
R8347K_0402_5%@
R8347K_0402_5%@
12
R6510K_0402_5% R6510K_0402_5%12
D
G
S
Q30
AO3413L_SOT23-3
D
G
S
Q30
AO3413L_SOT23-3
1
2
3
R90
1K_0402_5%
R90
1K_0402_5%
12
D10 RB751V-40_SOD323-2D10 RB751V-40_SOD323-212
C7
3
0.1
U_
04
02
_1
0V
6K
C7
3
0.1
U_
04
02
_1
0V
6K
1
2
T134PAD @T134PAD @
C375
22P_0402_50V8J
@ C375
22P_0402_50V8J
@1
2
C7
1
39
P_
04
02
_5
0V
8J
@
C7
1
39
P_
04
02
_5
0V
8J
@
1
2
Q4A
2N7002DW T/R7_SOT-363-6
Q4A
2N7002DW T/R7_SOT-363-6
61
2
R599 10K_0402_5%R599 10K_0402_5%1 2
T135PAD @T135PAD @
R94 100K_0402_5%R94 100K_0402_5%1 2
10K
47K
Q29DTA114YKAGZT146_SOT23-3
10K
47K
Q29DTA114YKAGZT146_SOT23-3
2
13
R619 0_0402_5%R619 0_0402_5%1 2
G
D S
Q692N7002KW_SOT323-3
G
D S
Q692N7002KW_SOT323-3
2
1 3
T128 PAD@T128 PAD@
R600 10K_0402_5%R600 10K_0402_5%1 2
R457 200K_0402_5%R457 200K_0402_5%1 2
D9
DAN217T146_SC59-3
@D9
DAN217T146_SC59-3
@
2
31
R620 0_0402_5%R620 0_0402_5%1 2
G
D
S
Q28
2N7002_SOT23-3
G
D
S
Q28
2N7002_SOT23-3
2
13
C7
8
0.1
U_
04
02
_1
0V
6K
C7
8
0.1
U_
04
02
_1
0V
6K
1
2
C6
9
39
P_
04
02
_5
0V
8J
@
C6
9
39
P_
04
02
_5
0V
8J
@
1
2
R458 0_0402_5%R458 0_0402_5%1 2
R621 0_0402_5%R621 0_0402_5%1 2
G
D
S
Q27
SI2305CDS-T1-GE3_SOT23-3
G
D
S
Q27
SI2305CDS-T1-GE3_SOT23-3
2
13
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Keep PVDD supply and speaker traces routed on the DGND plane.Keep away from AGND and other analog signals
Notes:
Place AVDD ,PVDD,and DVDD capacitor close to Codec
Place close to Codec
Place C209,C210,CA87,CA89 close to Codec
If Sense_B is un-used, then pull highSense_B to AVDD by 10Kohm resistor
Internal SPKR(front stereo speaker)
Combo Jack
PLACE CLOSE TO U1 PIN 14
PLACE CLOSE TO U1 PIN 13If Sense_A total length is greater than 6 inches, chagne C12 to 0.1uF
GNDAGND
SB Beep
External MIC
Headphone
LA-XXXXP
CA8,CA10 near UA5 PIN45CA9,CA21 near UA5 PIN39
RA53 need under or near UA5
W=40Mil
07/06 Delete MUTE LED circuit
07/06 Delete MIC_SENSE# circuit
07/20 HP's request.
07/23 Delete RA7
09/03 Change UA1 P/N
09/20 Delete RA13, CA20
9/20 Change to commond part.
10/11 Change RA14 to 0 ohm.
SENSE_BSENSE_A
SPKR-
SPKL-SPKL+
SPKR+
HP_OUT_LHP_OUT_R
SENSE_A
SENSE_B
HDA_BITCLK_AUDIO
HDA_RST_AUDIO#
D_MIC_CLK_L_CD_MIC_DATA_CD_MIC_DATA
D_MIC_CLK
MONO_INMONO_INR
HDA_SPKR
MONO_IN
HDA_SDI0 SDIN_CODEC
HDA_SYNC_AUDIO
HDA_SDOUT_AUDIO
EAPD_L
HDA_BITCLK_AUDIO
DOCK_LI_L_CODECDOCK_LI_R_CODEC
MUTE_LED_CNTRREC_MUTE_LED_CTRL
REC_MUTE_LED_CTRL
SPKR- [27]SPKR+ [27]
SPKL- [27]SPKL+ [27]
HP_OUT_R [39]HP_OUT_L [39]
HDA_BITCLK_AUDIO[13]
HDA_RST_AUDIO#[13]
EC_MUTE#[30]
D_MIC_CLK[22]D_MIC_DATA[22]
HDA_SPKR[13]
HDA_SDI0[13]
HDA_SDOUT_AUDIO[13]
HDA_SYNC_AUDIO[13]
DOCK_HP_R_CODEC [27]DOCK_HP_L_CODEC [27]
EXT_MIC_L [27]EXT_MIC_JACK [27]VREFOUT_MIC_JACK [27]
DOCK_LI_R_CODEC [27]DOCK_LI_L_CODEC [27]
SENSE_A [27]SENSE_B [27]
MUTE_LED_CNTR[39]
REC_MUTE_CTRL_KB [38]
+3VS +AVDD_CODEC
+AVDD_CODEC
+AVDD_CODEC
+AVDD_CODEC
+AVDD_CODEC
+5VS
+3VS
+5VS
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.5
Audio IDT 92HD91
Custom
26 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.5
Audio IDT 92HD91
Custom
26 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.5
Audio IDT 92HD91
Custom
26 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.
RA1133_0402_5% RA1133_0402_5%
12
CA
19
10U
_0603_6.3
V6M
CA
19
10U
_0603_6.3
V6M
1
2
CA822P_0402_50V8J
@
CA822P_0402_50V8J
@
1 2
QA1ADMN66D0LDW-7_SOT363-6
QA1ADMN66D0LDW-7_SOT363-6
61
2
CA29
10U_0805_10V6K
CA29
10U_0805_10V6K1
2
RA16
10K_0402_5%
RA16
10K_0402_5%
12
RA19
10K_0402_5%
RA19
10K_0402_5%
12
CA
71U
_0402_6.3
V6K
CA
71U
_0402_6.3
V6K
1
2
CA154.7U_0603_6.3V6K
CA154.7U_0603_6.3V6K
1
2
RA28
10K_0402_5%
RA28
10K_0402_5%
12
RA12 100_0402_5%RA12 100_0402_5%12
C88
680P_0603_50V7K
C88
680P_0603_50V7K
12
RA9
33_0402_5%@
RA9
33_0402_5%@
1 2
CA
12
10U
_0603_6.3
V6M
CA
12
10U
_0603_6.3
V6M
1
2
CA31
0.1U_0402_25V6
CA31
0.1U_0402_25V6
1
2
UA2
HPA01085DBVR SOT23 5P
UA2
HPA01085DBVR SOT23 5P
VIN1
EN3
VOUT5
GND2
BYPASS4
CA1 1000P_0402_50V7KCA1 1000P_0402_50V7K1 2
RA14 0_0402_5%RA14 0_0402_5%12
RA4 2.49K_0402_1%RA4 2.49K_0402_1%1 2
CA13 1000P_0402_50V7K
@
CA13 1000P_0402_50V7K
@
1 2
CA
18
1U
_0402_6.3
V6K
CA
18
1U
_0402_6.3
V6K 1
2
CA23 0.1U_0402_25V6@CA23 0.1U_0402_25V6@1 2
CA
11
10U
_0603_6.3
V6M
CA
11
10U
_0603_6.3
V6M
1
2
CA
28
0.1
U_0402_25V
6C
A28
0.1
U_0402_25V
6
1
2
CA
16
4.7
U_0603_6.3
V6K
CA
16
4.7
U_0603_6.3
V6K
1
2
CA26
0.01U_0402_16V7K
CA26
0.01U_0402_16V7K
1
2
CA22
0.1U_0402_25V6
CA22
0.1U_0402_25V6
1 2
CA25 0.1U_0402_25V6@CA25 0.1U_0402_25V6@1 2
G
D
SQ75
2N7002KW_SOT323-3
G
D
SQ75
2N7002KW_SOT323-3
2
13
CA27 0.1U_0402_25V6@CA27 0.1U_0402_25V6@1 2
CA
31U
_0402_6.3
V6K
CA
31U
_0402_6.3
V6K1
2
CA
40.1
U_0402_25V
6C
A4
0.1
U_0402_25V
6
1
2
CA
10
0.1
U_0402_25V
6C
A10
0.1
U_0402_25V
6
1
2
DH1 RB751V-40_SOD323-2DH1 RB751V-40_SOD323-2
1 2
CA24 0.1U_0402_25V6@CA24 0.1U_0402_25V6@1 2
RA3 2.49K_0402_1%RA3 2.49K_0402_1%1 2
CA
21
4.7
U_0603_6.3
V6K
CA
21
4.7
U_0603_6.3
V6K
1
2
CA2
0.1U_0402_25V6
CA2
0.1U_0402_25V6
1
2
RA18
100K_0402_5%
RA18
100K_0402_5%
1 2
CA5
10U_0603_6.3V
CA5
10U_0603_6.3V
1
2
C87
680P
_0603_50V
7K
C87
680P
_0603_50V
7K1
2
RA1710K_0402_5%RA1710K_0402_5%
12
CA
90.1
U_0402_25V
6C
A9
0.1
U_0402_25V
6
1
2
RA20
10K_0402_5%
RA20
10K_0402_5%
1 2
UA1
92HD91B2X5NLGXWCX8_QFN48_7X7
UA1
92HD91B2X5NLGXWCX8_QFN48_7X7
DVDD_CORE1
DMIC_CLK/GPIO12
DVDD_IO3
DMIC0/GPIO24
HDA_SDO5
HDA_BITCLK6
DVSS7
HDA_SDI8
DVDD9
HDA_SYNC10
HDA_RST#11
PCBEEP12
SENSE_A13
SENSE_B14
PORTE_L15
PORTE_R16
PORTF_L17
PORTF_R18
PORTC_L19
PORTC_R20
VREFFILT21
CAP222
VREFOUT_A23
VREFOUT_C/GPIO424
MONO_OUT25
AVSS126
AVDD127
HP0_PORTA_L28
HP0_PORTA_R29
AVSS230
HP1_PORTB_L31
HP1_PORTB_R32
AVSS333
V-34
CAP-35
CAP+36
VREG(+2.5V)37
AVDD238
PVDD239
SPK_PORTD_+L40
SPK_PORTD_-L41
PVSS42
SPK_PORTD_-R43SPK_PORTD_+R44
PVDD145
DMIC1/GPIO0/SPDIFOUT146
EAPD47
SPDIFOUT0/GPIO348
PAD49
CA30 0.1U_0402_25V6@CA30 0.1U_0402_25V6@1 2
RA21 0_0805_5%RA21 0_0805_5%1 2
CA14 0.1U_0402_25V6CA14 0.1U_0402_25V6
12
RA27 10K_0402_5%RA27 10K_0402_5%1 2
CA
60.1
U_0402_25V
6C
A6
0.1
U_0402_25V
6
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Speaker Connector
Need place near Audio Codec (UA5)
DOCK Audio
07/06 Change C91 and C94 to 2.2uF as spec
7/13 Move to small board
07/16 Change P/N for ESD's request
07/16 Delete DA1 for ESD's request
07/20 Change P/N for ESD's request
07/23 Combine with QA1B
10/11 Change R97 and R98 to 1%
10/11 Change R102 and R104 to 1%
10/11 Change C95 to 0.47U X5R
10/11 Non install R106 and R107
10/11 Change to AGND
10/11 Change to AGND
10/11 Change to AGND
10/11 Change C91 and C94 to 150u
11/05 Delete R174, QA1B. HP_SENSE# connection to R167.1
SPKL+
SPKR+SPKR-
SPKL-
EXT_MIC_L2
DOCK_LINE_IN_L
DOCK_LINE_IN_R
IN-EXT_MIC_JACK
IN-
MIC_OUT
SPKR+[26]SPKR-[26]SPKL+[26]SPKL-[26]
EXT_MIC_JACK[26]
DOCK_HP_L_CODEC[26]
DOCK_HP_R_CODEC[26]
DLINE_OUT_L [33]
DLINE_OUT_R [33]
DOCK_LI_R_CODEC[26]
DOCK_LI_L_CODEC[26]
VREFOUT_MIC_JACK[26]
DOCK_HPS#[33]
SENSE_A [26]SENSE_B [26]
LINE_IN_SENSE[33]
EXT_MIC_L [26]
HP_SENSE#[39]
EXT_MIC_L2 [39]
DOCK_LINE_IN_R [33]
DOCK_LINE_IN_L [33]
+AVDD_CODEC
+AVDD_CODEC
+VREF_EQ
+AVDD_CODEC
+VREF_EQ
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
Audio SPK Conn/Jack/MIC
C
27 56Thursday, December 20, 2012
Compal Electronics, Inc.2012/10/212012/03/23 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
Audio SPK Conn/Jack/MIC
C
27 56Thursday, December 20, 2012
Compal Electronics, Inc.2012/10/212012/03/23 Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
Audio SPK Conn/Jack/MIC
C
27 56Thursday, December 20, 2012
Compal Electronics, Inc.2012/10/212012/03/23
C89
1U
_0402_6.3
V6K
C89
1U
_0402_6.3
V6K
1
2
LA8
BK1608HS601-T_2P
LA8
BK1608HS601-T_2P12
R105
100K_0402_5%
R105
100K_0402_5%
12
C92
0.01U_0402_16V7K
C92
0.01U_0402_16V7K1
2
CA36220P_0402_50V7K
CA36220P_0402_50V7K
1
2
LA3
BK1608HS601-T_2P
LA3
BK1608HS601-T_2P
12
C97
0.1U_0402_16V7K
C97
0.1U_0402_16V7K1
2
DA2
YSDA0502C C/A SOT-23
@DA2
YSDA0502C C/A SOT-23
@
22
33
11
R1072K_0402_5%
@ R1072K_0402_5%
@
12
LA6
BK1608HS601-T_2P
LA6
BK1608HS601-T_2P
12
R100
20K_0402_1%
R100
20K_0402_1%
12
CA
34
2200P
_0402_50V
7K
CA
34
2200P
_0402_50V
7K
1
2
CC54
2.2U_0402_6.3V6M
CC54
2.2U_0402_6.3V6M
1 2
C90
1U_0603_16V7
C90
1U_0603_16V7
12
DA3
YSDA0502C C/A SOT-23
@ DA3
YSDA0502C C/A SOT-23
@
22
33
11
R101
20K_0402_1%
R101
20K_0402_1%
12
+
C91
150U_B2_6.3VM_R45M
+
C91
150U_B2_6.3VM_R45M
1 2
CC55
2.2U_0402_6.3V6M
CC55
2.2U_0402_6.3V6M1
2
RA
23
3.3
_0402_5%
RA
23
3.3
_0402_5%
12
R9830_0402_1%
R9830_0402_1%
1 2
R167
20K_0402_1%
R167
20K_0402_1%1 2
R99 10K_0402_5%R99 10K_0402_5%1 2
R102
6.2K_0402_1%
R102
6.2K_0402_1%
1 2
R104
6.2K_0402_1%
R104
6.2K_0402_1%
1 2
CA
33
2200P
_0402_50V
7K
CA
33
2200P
_0402_50V
7K
1
2
U6B
TLV2462CDR_SO8
U6B
TLV2462CDR_SO8
P8
G4
OUT7+
5
-6
C93
15P_0402_50V8J
C93
15P_0402_50V8J
1 2
R109
20K_0402_1%
R109
20K_0402_1%
12
R103
100K_0402_5%
R103
100K_0402_5%
12
+
C94
150U_B2_6.3VM_R45M
+
C94
150U_B2_6.3VM_R45M
1 2
RA
25
3.3
_0402_5%
RA
25
3.3
_0402_5%
12
R96
100K_0402_5%
R96
100K_0402_5%
1 2
CA
32
2200P
_0402_50V
7K
CA
32
2200P
_0402_50V
7K
1
2
RA22
2.2K_0402_5%
RA22
2.2K_0402_5%
RA
26
3.3
_0402_5%
RA
26
3.3
_0402_5%
12
RA
24
3.3
_0402_5%
RA
24
3.3
_0402_5%
12
R10839.2K_0402_1%R10839.2K_0402_1%
12
C9668P_0402_50V8JC9668P_0402_50V8J
1
2
C95
0.47U_0603_16V7X
C95
0.47U_0603_16V7X
1 2
Q6A
2N7002DW-T/R7_SOT363-6
Q6A
2N7002DW-T/R7_SOT363-6
61
2
R9730_0402_1%
R9730_0402_1%
1 2
LA7
BK1608HS601-T_2P
LA7
BK1608HS601-T_2P
12
R1062K_0402_5%
@R1062K_0402_5%
@
12
CA40220P_0402_50V7K
CA40220P_0402_50V7K
1
2
R111
100K_0402_5%
R111
100K_0402_5%
12
CA
35
2200P
_0402_50V
7K
CA
35
2200P
_0402_50V
7K
1
2
R110
100K_0402_5%
R110
100K_0402_5%
12
CA39220P_0402_50V7K
CA39220P_0402_50V7K
1
2
U6A
TLV2462CDR_SO8
U6A
TLV2462CDR_SO8
P8
G4
OUT1+
3
-2
CC53
2.2U_0402_6.3V6M
CC53
2.2U_0402_6.3V6M
1 2
JSPKR1
ACES_50273-0040N-001CONN@
JSPKR1
ACES_50273-0040N-001CONN@
11 22 33
G55 G66
44
Q6B2N7002DW-T/R7_SOT363-6Q6B2N7002DW-T/R7_SOT363-6
3
5
4
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
TPM1.2
Base I/O Address
* 1 = 04Eh0 = 02Eh
ACCELEROMETER
Finger printer
#4/15 Correct Net name.
07/06 Delete LED1
07/16 Change P/N for ESD's request
7/24 Modify pin define.
07/26 Change U11 symbol and P/N to SLB9656.
9/12 Modify JFP1 footprint
9/18 Modify JFP1 pin define
9/26 Modify JFP1 pin define to follow ME request.
10/24 change ACCEL_INT#
connection to U9.11
12/12 Add Q85
12/13 Change netname to FPR_OFF_C
LPC_PD#_TPM
LPC_LAD3LPC_LAD2LPC_LAD1
TPM_XTALI
TPM_XTALO
LPC_LAD0BADD
LPC_PD#_TPM
CLK_PCI_TPM
BADDPLT_RST#
ACCEL_INT#
USB20_P8_RUSB20_N8_R
PM_CLKRUN#_TPM
FPR_OFF_CFPR_LOCK#
PLT_RST#
PM_CLKRUN#_TPM
TPM_XTALITPM_XTALO
LPC_LAD0[16,25,30,32]LPC_LAD1[16,25,30,32]LPC_LAD2[16,25,30,32]LPC_LAD3[16,25,30,32]
ACCEL_INT# [14]
DDR_XDP_WAN_SMBCLK[11,12,13,16,38,5]DDR_XDP_WAN_SMBDAT[11,12,13,16,38,5]
PM_CLKRUN#[14,30,32]
USBP8-[17]
FPR_LOCK#[18]
CLK_PCI_TPM[15]LPC_LFRAME#[16,25,30,32]PLT_RST#[13,14,25,29,30,35,37,39,5]SIRQ[16,30,32]
FPR_OFF[16]
USBP8+[17]
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS +3VDS
+3VS
+3VS
+3VS
+5VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
TPM/Gsensor
28 56Thursday, December 20, 2012
2012/03/23 2006/09/25Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
TPM/Gsensor
28 56Thursday, December 20, 2012
2012/03/23 2006/09/25Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
TPM/Gsensor
28 56Thursday, December 20, 2012
2012/03/23 2006/09/25Compal Electronics, Inc.
C98
0.1U_0402_16V4Z
C98
0.1U_0402_16V4Z
1
2
JFP1
ACES_85203-0602N-10CONN@
JFP1
ACES_85203-0602N-10CONN@
1212
1111 10
109
9 88
77 6
65
5 44
33 2
21
1
SLB9656TT1.2SLB9656TT1.2SLB9656TT1.2SLB9656TT1.2U11
SLB9656TT1.2_TSSOP28
SLB9656TT1.2SLB9656TT1.2SLB9656TT1.2SLB9656TT1.2U11
SLB9656TT1.2_TSSOP28
NC1
NC2
NC3
GN
D4
VD
D5
GPIO6
PP7
TEST18TESTB1/LRESET#9
VD
D1
0G
ND
11
NC12
NC13NC14
TEST15
LRESET#16
LAD317
GN
D1
8
VD
D1
9
LAD220
LCLK21
LFRAME#22
LAD123
VD
D2
4
GN
D2
5
LAD026
SERIRQ27
NC28
U9
HP3DC2
U9
HP3DC2
Vdd_IO1
NC2
NC3
SCL/SPC4
GND5SDA/SDI/SDO
6
SDO/SA07
CS8
INT29
RES10GND12
INT111
RES13
VDD14
RES15
RES16
R112
0_0402_5%
9656@R112
0_0402_5%
9656@
12
C10518P_0402_50V8J9635@
C10518P_0402_50V8J9635@
1 2
R1264.7K_0402_5%
[email protected]_0402_5%
9635@
12
RH21910K_0402_5%
RH21910K_0402_5%
12
R1194.7K_0402_5%@
R1194.7K_0402_5%@
1 2
R124
0_0402_5%@R124
0_0402_5%@
12
R121
0_0402_5%
R121
0_0402_5%
12
R177
0_0402_5%
9635@
R177
0_0402_5%
9635@
1 2
R127
10M_0402_5%
@R127
10M_0402_5%
@
12
R122
0_0402_5%9635@R122
0_0402_5%9635@
12
R1140_0402_5%
9635@
R1140_0402_5%
9635@
12
C10410U_0603_6.3V6MC10410U_0603_6.3V6M
1
2
R118 10K_0402_5%R118 10K_0402_5%12
R123
0_0402_5%
R123
0_0402_5%
12
C100
0.1U_0402_16V4Z
C100
0.1U_0402_16V4Z
1
2
C103
0.1U_0402_16V7K
C103
0.1U_0402_16V7K
1
2R120
33_0402_5%@
R120
33_0402_5%@
1 2
R1130_0402_5%
9656@
R1130_0402_5%
9656@
12
D11
SCA00000U10
YSLC05CH_SOT23-3
D11
SCA00000U10
YSLC05CH_SOT23-3
12 3
R130 0_0402_5%R130 0_0402_5%12
Y1
32.768KHZ_12.5PF_FC-135
9635@Y1
32.768KHZ_12.5PF_FC-135
9635@
12
R1164.7K_0402_5%
@
R1164.7K_0402_5%
@
12
C101
0.1U_0402_16V4Z
C101
0.1U_0402_16V4Z
1
2
C10222P_0402_50V8J
@
C10222P_0402_50V8J
@
1 2
C99
0.1U_0402_16V4Z
C99
0.1U_0402_16V4Z
1
2
C106
18P_0402_50V8J
9635@C106
18P_0402_50V8J
9635@1 2
T109 PAD@T109 PAD@
G
D S
Q852N7002KW_SOT323-3
G
D S
Q852N7002KW_SOT323-3
2
1 3
R129 0_0402_5%9656@
R129 0_0402_5%9656@
12
R117
4.7K_0402_5%9635@
R117
4.7K_0402_5%9635@
12
C107
0.1U_0402_16V4Z
C107
0.1U_0402_16V4Z
1
2
R115
4.7K_0402_5%9635@R115
4.7K_0402_5%9635@
12
T108 PAD@T108 PAD@
R131 0_0402_5%R131 0_0402_5%12
1
1
2
2
3
3
4
4
5
5
A A
B B
C C
D D
W=60mils
RJ-45 CONN.
07/06 Add by HP request
07/11 Delete R135 by HP request
07/11 Delete R139 by HP request
07/11 Delete R151, R152 by HP request
07/11 Delete R140, R142 by HP request
07/16 Change P/N for ESD's request
07/16 Change P/N for ESD's request
07/20 Change C110 to 22UF
07/20 Change location to Q7A
07/23 Change R128 to 4.7K ohms
07/23 Add C389, C390, C391, C392.
07/23 Change C121 to 1000pF
08/07 Add R569 and connection R569.1 to KBC_DS3_EN
9/27 Change Y2 to 3225 package.
10/16 Change R569.1 connection to KBC_WAKE#
10/25 Add Q63
10/25 Delete R160, R161, R162, R163. Add RP12
10/26 Change R376 to 10k. Change R376.1connection to +3VDS
10/26 Connect Q34.3 to LED_LINK_LAN_DOCK# with R625, and delete LED_LINK_LAN_DOCK#connection to Q34.1. Delete R157 and connect Q34.1 and signal LED_LINK_LAN#_R.
10/26 Delete R153
11/02 Reserve C504.Change C350 to 47u.
11/02 Add C505
XTAL1
XTAL2
LAN_MDIP3
LAN_MDIP2
LAN_MDIN1
LAN_MDIN3
LAN_MDIN2
LAN_MDIP1
LAN_MDIP0LAN_MDIN0
PCIE_PRX_DTX_P6_CPCIE_PRX_DTX_N6_C
LED_LINK_LAN#LAN_ACT#
LAN_JTAG_TCKLAN_JTAG_TMS
XTAL1XTAL2
LAN_SMBCLK
+V_DAC
+V_DAC
+V_DAC
+V_DAC
LAN_MDIN0
LAN_MDIP2
LAN_MDIN2
LAN_MDIP1
LAN_MDIN1
LAN_MDIP0
LAN_MDIN3
LAN_MDIP3
LED_LINK_LAN#_R LED_LINK_LAN#
LAN_DIS#
MDO0+
MDO0-
MDO1+
MDO1-
MDO2+
MDO2-
MDO3+
MDO3-
MDO3-
MDO0-
MDO2-
MDO1+
MDO3+
MDO1-
MDO0+
MDO2+
SLP_LAN
LAN_ACT#
LED_LINK_LAN#
MDO0-
MDO2+
MDO1-
MDO3+
MDO1+MDO2-
MDO0+
MDO3-
LAN_SMBDATA
LANWAKE#_R
PLT_RST#[13,14,25,28,30,35,37,39,5]CLK_PCIE_LAN_REQ1#[15]
CLK_PCIE_LAN#[15]CLK_PCIE_LAN[15]
PCIE_PRX_DTX_P6[17]PCIE_PRX_DTX_N6[17]
PCIE_PTX_C_DRX_N6[17]PCIE_PTX_C_DRX_P6[17]
LAN_DIS#[18]
LAN_ACT#[33]
LANWAKE#[18]
MDO0- [33]
MDO0+ [33]
MDO1- [33]
MDO1+ [33]
MDO2+ [33]
MDO2- [33]
MDO3+ [33]
MDO3- [33]
LAN_SMBCLK[16]LAN_SMBDATA[16]
SLP_LAN#[14,30]
SLP_LAN[34]
LED_LINK_LAN#_R[17]
KBC_WAKE#[25,30]
LED_LINK_LAN_DOCK# [33]
+3VM_LAN
+3VM_LAN
+3VM_LAN
+1.05VM_LAN
+3VDS
+3VM_LAN
+3VM_LAN
+3VM_LAN
+3VM_LAN
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
Intel 82566 Nineveh
29 56Thursday, December 20, 2012
2012/03/23 2009/12/31Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
Intel 82566 Nineveh
29 56Thursday, December 20, 2012
2012/03/23 2009/12/31Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
Intel 82566 Nineveh
29 56Thursday, December 20, 2012
2012/03/23 2009/12/31Compal Electronics, Inc.
T110T110
C389 0.1U_0402_16V4ZC389 0.1U_0402_16V4Z1 2
R625 0_0402_5%R625 0_0402_5%1 2
C35047U
_0805_4V
6M
C35047U
_0805_4V
6M
1
2
C110
22U
_0603_6.3
V6K
C110
22U
_0603_6.3
V6K
1
2
C123
4.7U_0603_6.3V6K
C123
4.7U_0603_6.3V6K
1
2
Y2
25M
HZ
18P
F +
-20P
PM
CR
G3202518
Y2
25M
HZ
18P
F +
-20P
PM
CR
G3202518
IN1
NC
2
OU
T3
NC
4
JP4
ACES_87212-14G0CONN@
JP4
ACES_87212-14G0CONN@
11
22
33
44
55
66
77
88
99
1010
1111
1212
1313
1414
G115G216
C390 0.1U_0402_16V4ZC390 0.1U_0402_16V4Z1 2
R128 4.7K_0402_5%R128 4.7K_0402_5%1 2
L15
4.7UH +-5% 1008HC-472EJFS-A
SHI00004C00
DELTA_1008HC-472EJFS-A_2P
L15
4.7UH +-5% 1008HC-472EJFS-A
SHI00004C00
DELTA_1008HC-472EJFS-A_2P
1 2
T111T111
R158 1K_0402_5%R158 1K_0402_5%1 2
R159 3.01K_0402_1%R159 3.01K_0402_1%1 2
C391 0.1U_0402_16V4ZC391 0.1U_0402_16V4Z1 2
C121
1000P_1808_3KVSE120102K90C121
1000P_1808_3KVSE120102K90
1
2
C118680P_0402_50V7K@ C118680P_0402_50V7K@1 2
C392 1U_0402_6.3V4ZC392 1U_0402_6.3V4Z1 2C122
0.1U_0402_16V4Z
C122
0.1U_0402_16V4Z
1
2
C115 0.1U_0402_10V7KC115 0.1U_0402_10V7K1 2
R144 10K_0402_5%R144 10K_0402_5%1 2
Q7A2N7002DWH_SOT363-6
AMT@Q7A2N7002DWH_SOT363-6
AMT@
61
2
R150 300_0603_5%R150 300_0603_5%1 2
TS1
350UH_NA0069RLFSP050006Y00
TS1
350UH_NA0069RLFSP050006Y00
TDCT13
TD1+1
TD1-2
TDCT24
TD2+5
TD2-6
TDCT39
TD3+7
TD3-8
TDCT410
TD4+11
TD4-12
TX4-13
TX4+14
TXCT415
TXCT316
TX3-17
TX3+18
TX2-19
TX2+20
TXCT221
TXCT122
TX1-23
TX1+24
C116 0.1U_0402_10V7KC116 0.1U_0402_10V7K1 2
D12
SCA00000U10
YSLC05CH_SOT23-3
@D12
SCA00000U10
YSLC05CH_SOT23-3
@
123
R569 0_0402_5%@R569 0_0402_5%@1 2 C117 1000P_0402_50V7KC117 1000P_0402_50V7K1 2
C1081U_0402_6.3V6K
C1081U_0402_6.3V6K
1
2
R155 10K_0402_5%@R155 10K_0402_5%@1 2
C114680P_0402_50V7K@ C114680P_0402_50V7K@1 2
R138 300_0603_5%R138 300_0603_5%1 2
R154 10K_0402_5%@R154 10K_0402_5%@1 2
C109
0.1
U_0402_16V
4Z
C109
0.1
U_0402_16V
4Z
1
2
PCIE
MDI
SMBUS
LED
JTAG
U10
CLARKVILLE
PCIE
MDI
SMBUS
LED
JTAG
U10
CLARKVILLE
CLK_REQ_N48
PE_RST_N36
PE_CLKP44
PE_CLKN45
PETp38
PETn39
PERp41
PERn42
SMB_CLK28
SMB_DATA31
LANWAKE_N2
LAN_DISABLE_N3
LED026
LED127
LED225
JTAG_TDI32
JTAG_TDO34
JTAG_TMS33
JTAG_TCK35
XTAL_OUT9
XTAL_IN10
TEST_EN30
RBIAS12
MDI_PLUS013
MDI_MINUS014
MDI_PLUS117
MDI_MINUS118
MDI_PLUS220
MDI_MINUS221
MDI_PLUS323
MDI_MINUS324
SVR_EN_N6
RSVD1_VCC3P31
VDD3P3_IN5
VDD3P3_44
VDD3P3_1515
VDD3P3_1919
VDD3P3_2929
VDD0P9_88
VDD0P9_1111
VDD0P9_1616
VDD0P9_2222
VDD0P9_3737
VDD0P9_4040
VDD0P9_4343
VDD0P9_4646
VDD0P9_4747
CTRL_0P97
CTRL_0P949
E
B
C
Q63
MMBT3904_SOT23-3
E
B
C
Q63
MMBT3904_SOT23-3
2
1 3
G
D S
Q342N7002_SOT23-3
G
D S
Q342N7002_SOT23-3
2
1 3
RP12
75_1206_8P4R_5%
RP12
75_1206_8P4R_5%
18273645
C3730.1
U_0402_16V
4Z
C3730.1
U_0402_16V
4Z
1
2
R14547K_0402_5%
R14547K_0402_5%
1 2
C505 10U_0603_6.3V6MC505 10U_0603_6.3V6M1 2
C50410U
_0603_6.3
V6M
@
C50410U
_0603_6.3
V6M
@
1
2
D13
SCA00000U10
YSLC05CH_SOT23-3
@D13
SCA00000U10
YSLC05CH_SOT23-3
@
123
R37610K_0402_5%R37610K_0402_5%
12
L16
100UH_SSC0301101MCF_0.18A_20%
L16
100UH_SSC0301101MCF_0.18A_20%
12
R136
10K
_0402_5%
R136
10K
_0402_5%
12
C12533P_0402_50V8JC12533P_0402_50V8J
1
2
C120 0.01U_0402_16V7KC120 0.01U_0402_16V7K1 2
C12433P_0402_50V8JC12433P_0402_50V8J
1
2
1
1
2
2
3
3
4
4
5
5
A A
B B
C C
D D
100mA 2mA
Layout note: Close to PIN14
Layout note: Close to PIN37
Layout note: Close to PIN58
Layout note: Close to PIN84
Layout note: Close to PIN68
Layout note: Close to PIN106
Layout note: Close to PIN119
Layout note: 2vias to GND
Layout note: ADC nets are spaced at least 20mils from any high speed switching signals to prevent cross talk that could add noise
20mils
2MBPVT ROM (IN)20mils
SPI ROM (16MByte )
LPC Debug Port
07/09 Delete 16 pin SPI ROM socket
07/09 Add by HP request.
07/10 Change R537 to 10K
7/13 Delete R224 and R460, beacuse no QW LED and CALC LED
7/13 Reserve R541 and R542 for NFC function
7/13 Delete R220, R223 and short to make layout easier
7/13 Delete R236
7/13 Change by HP request
7/13 Change by HP request
7/13 Delete R496,R497,R498,R499
7/13 Delete R244
7/13 Delete R269
7/13 Add R543
7/13 Delete RH220
7/13 Change power rail from +3V_SPI to +3VDS
7/13 Change power rail
from +3V_SPI to +3VDS
07/18 change net name
07/18 Add R546 by HP request.
07/18 Non install R219 and install R218
07/18 Non install R266
07/18 Non install R258 and install R500
07/18 Non install R253 and install R254.
07/18 R216 non install by HP request.
07/18 Non install R264 and install R262
07/18 R215 install by HP request.
07/18 R436 change to 1K
07/18 Install R242
07/18 Install R277
07/18 Install U18
07/19 Delete R254, Add R549
07/19 Add off page symbol
PCH_SPI_WP# and PCH_SPI_HOLD#
7/19 Install R541, R542
07/20 Add D44 and D45
07/20 Rearrange pin define
for layout smooth.
07/23 Change C322 to 100pF
07/23 Add CH112 for RF request
07/24 Add R555 for EMI request
07/24 Add C419 for EMI request
07/24 Change net name
07/25 change net name
07/25 Change net name
07/25 Change net name
07/25 Add Q77 and R559
07/25 Change U18 to scoket and add &UH2
7/26 Add R561, R562. Non install R541, R542
08/03 Change R437 to 33 ohms
08/03 Change R540 to 4.7K
08/03 Add CH114
08/07 Change net name
08/07 Change net name
08/07 Change net name
08/07 Change net name
08/07 Change JP6 footprint
08/09 Correct U18 and &UH2 SPI ROM size
08/09 Correct UH5 and &UH1 SPI ROM size
08/10 Change R277.1 connection to VR_ON
08/10 Change R253.2 connection to VR_ON
08/10 Add VCC1_PWRGD off page symbol
9/03 Non install R561, R562. install R541, R543
09/03 Change R282 to 10K
09/07 Delete TX_STBY_LED# offpage symbol
09/10 Delete R262, R264. Change pin 71 netname to KBC_XTAL1
09/10 Delete R266, netname MAIN_BAT_DET#
09/10 Delete R219
09/10 Delete R216
09/10 Delete R241 and connect EC_MUTE# to KBC.91 directly.
Delete R242 and connect MAIN_BAT_DET# to KBC.92 directly.
09/10 Delete R253 and R549
09/10 Delete R271
09/10 Delete R258, R500 and change pin69 netname to KBC_XTAL2
09/10 Add C487, C488, and Y4
9/12 Delete R543
9/12 Delete R561, R562.
09/12 Delete R249, R251
09/12 Delete R256
09/12 Delete R278
09/12 Change RP1 and RP2 to 100K ohms.
08/09 Change UH5 footprint
09/20 Change R227 to 3K
09/21 R436 change to 100K PD
09/23 Change netname to PWR_GD
09/24 Non-install D21 09/25 Install R237, R235, R234, R233, R231
09/25 Reserve R605
10/12 Add R610. Change U17.85 connection netname to RSMRST#_EC
10/12 Change R276.1 connection netname to RSMRST#_EC
10/16 Change R248 to 200k ohms. Change
R248.1 connection to VCC1_PWRGD_SUS#
10/16 Remove current VCC1_PWRGD connection to
JP6.16. Then add a 4.7 K resistor between JP6.16
and new signal VCC1_PWRGD_SUS#.
10/16 Change U17 pin 77 connection to VCC1_PWRGD_SUS#
10/16 Add a 680K PD for U7.102. Change U7.102 connection to PLT_DET.
10/16 Change U7.125 connection to CHRG_RST,
U7.126 connection to KBC_WAKE#
10/16 Change R243 to 100K. Change R243.1 connection
to CHRG_RST. Change R243.2 connection to GND
10/16 Change R245.1 connection to KBC_WAKE#
10/16 change R436.2 connection to +3VDS
10/16 Delete C322
10/16 Change EC pin 41 and R436.1 joint
point connection to iSCT_LED#
10/16 Change R215.2 to GND
10/16 Delete C186
10/16 Delete R247
10/16 Delete R540, Q74
10/16 Connect D21.2 to PM_APWROK. Install D21.
10/17 Change R227 to 10K
10/16 Delete R239, R240
10/16 Delete R218
10/16 Add R616
10/18 Change R615 to 470K ohms
10/18 Change R610 to 470 ohms
10/23 Add R617
10/15 Reserve R624 and connection to SUSCLK_KBC
10/26 Delete VCC1_PWRGD off page symbol
11/01 Uninstall Y4, C487, C488
12/12 Change RH222, RH223, RH224 to 100K
12/12 Delete R617, R227
12/12 Change R615 to 100K ohms
12/12 Remove R611. Connect JP6.16 to VCC1_PWRGD_SUS#
12/12 Change R248 to 100k ohms
12/12 Delete R605 12/12 Install R624
12/12 Add Q84
KSI6
KSI4KSI5
KSI7
KSI4
KSI7
KSI3
KSI0
KSI5
KSI1KSI2
KSI6
TP_CLK
LPC_LFRAME#
LPC_LAD1LPC_LAD2
LPC_LAD0
LPC_LAD3
PM_CLKRUN#
EC_SCI#CLK_PCI_KBCSIRQ
KBC_SIO_RST#
PCH_SPI_SO
WWAN_DISABLE
ADP_ID_CHK
VCC1_PWRGD_SUS#
PM_PWROKRSMRST#_EC
PCH_SPI_SI
PCH_SPI_CS0#
PCH_SPI_CLK
KSO12
KSO3
KSO5
KSO2
KSO13
KSO0
KSO8
KSO4
KSO11
KSO1
KSO6KSO7
KSO10KSO9
KSI2KSI3
KSI0KSI1
N27271121
PCH_KBC_I2CLK
N27271143
RSMRST#_EC
KBRST#KBRST#
ON/OFFBTN#
PCH_KBC_I2CDAT
VCC1_PWRGD_SUS#
LID_SW#
FAN_PWM
KBC_PROC_HOT#
ON/OFFBTN_KBC#
OCP_PWM_OUT
TP_DATA
KBC_XTAL1
N27271225
ADP_EN
KBC_DS3_EN
H_PECI_R
8051_RECOVER#/_NUM_LOCK_LED#
TACH_FAN_IN
TX_STBY_LED#
TX_STBY_LED#
KBC_PWR_ON
8051RX_CAPLED#
TP_CLKTP_DATA
SLP_LAN#
SP_CLKSP_DATAPS2_CLKPS2_DATA
KBD_CLKKBD_DATA
I2C_MAIN_DATI2C_MAIN_CLK
I2C_BAY_CLKI2C_BAY_DAT
SIO_SLP_A#
I2C_BAY_DAT
I2C_MAIN_CLK
I2C_BAY_CLKI2C_MAIN_DAT
FET_AFET_B
KBD_PWM_LED
KBC_WAKE#
TRAVEL_BAT_DET#
PVT_SCLK
PVT_CS#
PVT_MOSI PVT_MISO
PCH_SPI_HOLD#
PCH_SPI_WP#
PCH_SPI_CS0# PCH_SPI_HOLD#
PCH_SPI_SI
PCH_SPI_WP#
PCH_SPI_CS0#
PCH_SPI_SOPCH_SPI_SO_R_1
SP_CLKSP_DATA
PS2_CLKPS2_DATA
N27271128
LPC_LFRAME#
LPC_LAD0LPC_LAD1LPC_LAD2LPC_LAD3
8051_RECOVER#/_NUM_LOCK_LED#8051RX_CAPLED#TX_STBY_LED#
SIRQ
NMI_SMI_DBG#
KBC_PWR_ON
CPPWR_EN
JTAG_RST#KSO2KSO3KSO1KSO0
N27271393
PVT_MOSI
PVT_MISO
ADP_ID_CHK
PWR_GD
iSCT_LED#PCH_SPI_CLK_EC
KBD_PWM_LED
ON/OFFBTN_KBC#CHRG_ADP_DETPCH_KBC_I2CDATPCH_KBC_I2CLK
MAIN_BAT_DET#TRAVEL_BAT_DET#
LID_SW#
TACH_FAN_IN
KBC_PROC_HOT#OCP_PWM_OUT
KBD_DATAKBD_CLK
KBC_DS3_EN
ON/OFFBTN#
PVT_SCLK
PVT_CS#
8051_RECOVER#/_NUM_LOCK_LED#
JTAG_RST#
KSO4KSO5
KBC_XTAL2PVT_CS#
PS2_CLK
PS2_DATA
KBD_CLK
KBD_DATA
PCH_SPI_CLK_EC
WLAN_DISABLE
TX_STBY_LED#
KBC_XTAL1
KBC_XTAL2
VCC1_PWRGD_SUS#
CHRG_RST
PCH_SPI_CLK
SUSCLK_KBC
LPC_LAD3[16,25,28,32]LPC_LAD2[16,25,28,32]LPC_LAD1[16,25,28,32]LPC_LAD0[16,25,28,32]
LPC_LFRAME#[16,25,28,32]KBC_SIO_RST#[18,32]
KSI[0..7][38]
SIRQ[16,28,32]CLK_PCI_KBC[15]
EC_SCI#[18]
KSO[0..13][38]
PCH_SPI_SI[16]
PCH_SPI_CS0#[16]
WLAN_DISABLE[25]
WWAN_DISABLE[25]
PM_CLKRUN#[14,28,32]
TP_CLK[38]
OCP_A_IN[50]CURRENT_ADC[43]
ADP_A_ID [50]
PM_RSMRST# [14]
ON/OFFBTN# [14,5]
8051RX_CAPLED# [38]
AC_PRES_OUT [14,35]
SLP_S3# [14,31,34,45]8051_RECOVER#/_NUM_LOCK_LED# [38]
PLT_DET
AMBER_BATLED# [39]
EC_MUTE# [26]
LID_SW# [22,38,39]
FAN_PWM [24]
ADP_PRES [50]
PM_APWROK [14,31]
VOLTAGE_ADC[43]
CHRG_ADP_DET[43]
KBC_WAKE# [25,29]CHRG_RST [43]
BAT_GRNLED# [13,39]
PCH_KBC_I2CDAT [16,35]
TACH_FAN_IN [24]
ON/OFFBTN_KBC# [33,38]
OCP_PWM_OUT [18]
EN_P1V5 [33,39,40,44,45]
TP_DATA[38]
KBC_PROC_HOT# [24,5]
PM_PWROK [14,5]
FET_A [51]
ADP_EN [43]
H_PECI [5]
KBC_PWR_ON [34,44]
PCH_SPI_CLK[16]
SUS_PWR_ACK [14]
SLP_LAN#[14,29]
SP_CLK[38]
PS2_CLK[33]SP_DATA[38]
PS2_DATA[33]
KBD_DATA [33]KBD_CLK [33]
I2C_BAY_CLK [42]
I2C_MAIN_CLK [42,43]I2C_MAIN_DAT [42,43]
I2C_BAY_DAT [42]
SIO_SLP_A# [14,31,46]
LATCHED_ALARM[51]
FET_B [51]
KBC_DS3_EN [45,5]
KSO17 [39]
CPPWR_EN [39]
TRAVEL_BAT_DET# [42]
PCH_SPI_SO[16]
PLT_RST#[13,14,25,28,29,35,37,39,5]
CLK_PCI_DEBUG_KBC[15]
PCH_KBC_I2CLK [16,35]
KBD_PWM_LED [38]
NFC_RX [39]NFC_TX [39]
PCH_SPI_WP#[16]
PCH_SPI_HOLD#[16]
ADP_ID_CHK [50]
8051TX_STBYLED# [33,38,39]
MAIN_BAT_DET# [42]
PWR_GD[31,47,5]
iSCT_LED# [39]
NMI_SMI_DBG# [14]
BATLOW# [14]
SUSCLK_KBC [14]
+3VS
+3VDS
+RTCVCC
+3VDS
+3VDS
+3VDS
+RTCVCC
+RTCVCC
A_GND
+1.05VS
+3VDS
+3VDS
+3VDS
+3VDS
+3VDS
+3VDS
A_GND
B+
+3VDS
+3VS
+3VDS
+3VDS
+3VDS
+3VDS
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
KBC1322
30 56Thursday, December 20, 2012
2012/03/23 2011/12/31Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
KBC1322
30 56Thursday, December 20, 2012
2012/03/23 2011/12/31Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
KBC1322
30 56Thursday, December 20, 2012
2012/03/23 2011/12/31Compal Electronics, Inc.
R275 10K_0402_5%R275 10K_0402_5%1 2
R243 100K_0402_5%R243 100K_0402_5%1 2
U18
16M W25Q16CVSSIG SOIC 8P
CONN@U18
16M W25Q16CVSSIG SOIC 8P
CONN@
S1
VCC8
Q2
HOLD7
VSS4
D5
C6
W3
C487 10P_0402_25V8K@C487 10P_0402_25V8K@1 2
CH98
22P_0402_50V8J
@CH98
22P_0402_50V8J
@1
2
R268 10K_0402_5%R268 10K_0402_5%1 2
C179
0.1
U_0402_16V
4Z
C179
0.1
U_0402_16V
4Z
1
2
R233 15_0402_5%R233 15_0402_5%1 2
C183
0.1
U_0402_16V
4Z
C183
0.1
U_0402_16V
4Z
1
2
R43810K_0402_5%
R43810K_0402_5%
1 2
R272 300_0402_5%R272 300_0402_5%
1 2
RP2
100K_0804_8P4R_5%
RP2
100K_0804_8P4R_5%
1 82 73 64 5
R444 10K_0402_5%R444 10K_0402_5%1 2
R215 100K_0402_5%R215 100K_0402_5%
1 2
C180
0.1
U_0402_16V
4Z
C180
0.1
U_0402_16V
4Z
1
2
R447 10K_0402_5%R447 10K_0402_5%1 2
R542 0_0402_5%R542 0_0402_5%1 2
Y4
32.768KHZ_12.5PF_FC-135@Y4
32.768KHZ_12.5PF_FC-135@
12
R280 100K_0402_5%R280 100K_0402_5%1 2
C190 2200P_0402_50V7KC190 2200P_0402_50V7K1 2
R259 10K_0402_5%R259 10K_0402_5%1 2
R274 10K_0402_5%R274 10K_0402_5%1 2
C192 2200P_0402_50V7KC192 2200P_0402_50V7K1 2
R440 10K_0402_5%R440 10K_0402_5%1 2
C189 2200P_0402_50V7KC189 2200P_0402_50V7K1 2
RP1
100K_0804_8P4R_5%
RP1
100K_0804_8P4R_5%
18273645
R560
100K_0402_5%
R560
100K_0402_5%
12
D21 RB751V-40_SOD323-2D21 RB751V-40_SOD323-21 2
&UH1
128M W25Q128FVSIG SOIC8P
45@&UH1
128M W25Q128FVSIG SOIC8P
45@
R446 100K_0402_5%R446 100K_0402_5%1 2
R436 100K_0402_5%R436 100K_0402_5%1 2
RP5
4.7K_0804_8P4R_5%
RP5
4.7K_0804_8P4R_5%1 82 73 64 5
R231 15_0402_5%R231 15_0402_5%1 2
C191 2200P_0402_50V7KC191 2200P_0402_50V7K1 2
Q77B2N7002KDW_SOT363-6Q77B2N7002KDW_SOT363-6
3
5
4
R252 10K_0402_5%R252 10K_0402_5%1 2
R248 100K_0402_5%R248 100K_0402_5%1 2
CH970.1U_0402_16V4ZCH970.1U_0402_16V4Z
1
2
RH223100K_0402_5%
RH223100K_0402_5%
1 2
R559
100K_0402_5%
R559
100K_0402_5%
12
R238 43_0402_1%R238 43_0402_1%1 2T122PAD @T122PAD @
R265 100K_0402_5%R265 100K_0402_5%1 2
R283 5_0402_1%R283 5_0402_1%
12
C181
0.1
U_0402_16V
4Z
C181
0.1
U_0402_16V
4Z
1
2
R281 0_0402_5%R281 0_0402_5%
1 2
G
D S
Q842N7002KW_SOT323-3
G
D S
Q842N7002KW_SOT323-3
2
1 3
T121PAD @T121PAD @
JP6
ACES_50238-02471-002CONN@
JP6
ACES_50238-02471-002CONN@
11
22
33
44
55
66
77
88
99
1010
1111
1212
1313
1414
1515
1616
1717
1818
1919
2020
2121
2222
2323
2424
G125
G226
R615 100K_0402_5%R615 100K_0402_5%1 2
R267 300_0402_5%R267 300_0402_5%
1 2
R222 0_0402_5%R222 0_0402_5%1 2
R276 10K_0402_5%R276 10K_0402_5%1 2
C184
0.1
U_0402_16V
4Z
C184
0.1
U_0402_16V
4Z
1
2
RP4
4.7K_0804_8P4R_5%
RP4
4.7K_0804_8P4R_5%1 82 73 64 5
R257 100K_0402_5%R257 100K_0402_5%1 2R255 100K_0402_5%R255 100K_0402_5%1 2
R245 100K_0402_5%R245 100K_0402_5%1 2
C185
0.1
U_0402_16V
4Z
C185
0.1
U_0402_16V
4Z
1
2
R279 100K_0402_5%R279 100K_0402_5%1 2
CH114
22P
_0402_50V
8J
@
CH114
22P
_0402_50V
8J
@1
2
R441 10K_0402_5%R441 10K_0402_5%1 2
R443 10K_0402_5%R443 10K_0402_5%1 2
CH112
22P_0402_50V8J
@ CH112
22P_0402_50V8J
@
1
2
R237 15_0402_5%R237 15_0402_5%1 2
R610 470_0402_5%R610 470_0402_5%1 2R541 0_0402_5%R541 0_0402_5%1 2
C488 10P_0402_25V8K@C488 10P_0402_25V8K@1 2
D44
BAT54CW_SOT323-3
D44
BAT54CW_SOT323-3
1
3
2
RH222100K_0402_5%
@RH222100K_0402_5%
@1 2
C182
0.1
U_0402_16V
4Z
C182
0.1
U_0402_16V
4Z
1
2
R295 100K_0402_5%R295 100K_0402_5%1 2
General Purpose I/O Interface
Keyboard/Mouse Interface
LPC
Bus
Power Mgmt/SIRQ
Miscellaneous
Access Bus Interface
SMSC_1322-NU_TQFP-128P
U17
MEC1322-NU VTQFP 128P
General Purpose I/O Interface
Keyboard/Mouse Interface
LPC
Bus
Power Mgmt/SIRQ
Miscellaneous
Access Bus Interface
SMSC_1322-NU_TQFP-128P
U17
MEC1322-NU VTQFP 128P
*PW
RG
D72
KSO021
KSO120
KSO219
KSO318
KSO417
KSO516
KSO613
KSO712
KSO810
KSO99
KSO108
KSO117
*KSO12/GPIO56
*KSO13/GPIO65
KSI029
KSI128
KSI227
KSI326
KSI425
KSI524
KSI623
KSI722
*IMCLK/GPIO5135
VS
S36
*GPIO50/KCLK61
*GPIO65/KDAT62
*GPIO46/EMCLK66
*GPIO47/EMDAT67
CLKRUN#55
SER_IRQ57
PCI_CLK54
EC_SCI#76
LAD[3]51
LAD[2]50
LAD[1]48
LAD[0]46
LFRAME#52
LRESET#53
AV
SS
45
*VSS_VBAT70
*XTAL171
VC
C1
14
*XTAL269
VS
S11
VC
C1
37
VS
S47
VS
S56
VS
S104
VS
S82
VS
S117
*ADC3/GPIO6139
VC
C1
58
VC
C1
84
VC
C1
106
VC
C1
119
*JT
AG
_R
ST
#49
*GPIO66124
*GPIO25/I2C3_DAT0125
*GPIO44123
*GPIO135/KBRST122
*GPIO34/TACH2PWM_OUT121
*GPIO133/PWM0120
*GPIO136/PWM2118
VREF_PCEI79
*GPIO131/PECI_DATA80
*GPIO7/KSO1481
*GPIO10/KSO1583
OUT1/RSMRST#85
*GPIO162/RXD86
*GPIO165/TXD/HSD_CS1#87
*GPIO23/I2C1_DAT088
*GPIO22/I2C1_CLK089
*GPIO21/I2C2_DAT090
*GPIO20/I2C2_CLK091
*GPIO105/FAN_TACH192
*GPIO140/TACH2PWM_IN101
*GPIO45/A20M/PVT_CS#1102
*GPIO53/PS2CLK103
*GPIO152/PS2DAT105
*I2C0_DATA0111
*I2C0_CLK0112
*I2C0_DATA1109
*I2C0_CLK1110
*GPIO11073
*GPIO30107
*GPIO12/KSO17108
*ADC_TO_PWM_OUT/GPIO4159
*GPIO1375
*nRESET_OUT#/GPIO12160
*GPIO141/PWM378
VCC1_RST#77
*ADC4/GPIO6238
*GPIO11/KSO164
*GPIO13074
*GPIO163116
*nBAT_LED#/GPIO154113
*nPWR_LED#/GPIO156115
*GPIO155114
*GPIO361
*PVT_SCLK/GPIO1532
*SHD_SCLK/GPIO1223
*GPIO3130
*GPIO12731
*IMDAT/GPIO5232
GPIO14733
GPIO15134
*ADC1/GPIO5743
*ADC0/ADC_TO_PWM_IN/GPIO5644
AVCC40GPIO3563*GPIO2764GPIO3365*ADC2/GPIO6042*GPIO20641
*PVT_MISO/GPIO16494 FLDATAIN95 *PVT_CS0#/GPIO14696 FLCS0#97 *PVT_MOSI/GPIO54
127 FLDATAOUT128
CAP15
*GPIO14593
*GPIO157/BC_CLK98
*GPIO160/BC_DAT99
*GPIO161/BC_INT#100
*GPIO24/I2C3_CLK0126
*VB
AT
68
C193
0.1
U_0402_16V
4Z
C193
0.1
U_0402_16V
4Z
1
2
C187 4.7U_0805_10V4ZC187 4.7U_0805_10V4Z1 2
R445 10K_0402_5%R445 10K_0402_5%1 2
R624 0_0402_5%R624 0_0402_5%1 2
R235 15_0402_5%R235 15_0402_5%1 2R234 15_0402_5%R234 15_0402_5%1 2
R493 100K_0402_5%R493 100K_0402_5%1 2
R263 100K_0402_5%R263 100K_0402_5%1 2
&UH2
16M W25Q16CVSSIG SOIC 8P
45@&UH2
16M W25Q16CVSSIG SOIC 8P
45@
R270 300_0402_5%R270 300_0402_5%1 2
R246 10K_0402_5%R246 10K_0402_5%1 2
R442 10K_0402_5%R442 10K_0402_5%1 2
Q77A2N7002KDW_SOT363-6Q77A2N7002KDW_SOT363-6
61
2
R546 100K_0402_5%R546 100K_0402_5%1 2
R61615_0402_5%
R61615_0402_5%
1 2
R439 10K_0402_5%R439 10K_0402_5%1 2
RH224100K_0402_5%
RH224100K_0402_5%
1 2
R273 300_0402_5%R273 300_0402_5%
1 2
C1881U_0402_6.3V6KC1881U_0402_6.3V6K
1
2
RP3
4.7K_0804_8P4R_5%
RP3
4.7K_0804_8P4R_5%1 82 73 64 5
UH5
128M W25Q128FVSIG SOIC8PCONN@
UH5
128M W25Q128FVSIG SOIC8PCONN@
S1
VCC8
Q2
HOLD7
VSS4
D5
C6
W3
R437 33_0402_5%R437 33_0402_5%1 2
D45
BAT54CW_SOT323-3
D45
BAT54CW_SOT323-3
1
3
2
R278 10K_0402_5%R278 10K_0402_5%1 2
R555
0_0402_5%
R555
0_0402_5%
12
R282 10K_0402_5%R282 10K_0402_5%
1 2
C41933P_0402_50V8J@
C41933P_0402_50V8J@
1
2
07/18 HP request
07/20 Follow VBK10 PWR_GD circuit
07/23 Change R286 to 10K
09/03 Non install R284
09/03 Change R289 to 11.5K
09/11 Delete R287. Connect joint point of R286.1 and U18.1 to VR_ON
9/13 Modify power ok circuit
09/23 Change netname to VGATE
09/23 Change netname to PWR_GD
10/31 Change R291.1 connection to+5VL. Change R291 to 105K_1%
11/01 Change R304.1 connection to +5VL. Change R304 to 88.7k +-1%
12/12 Change CH115 to 0.22uF
1.75VREF
1.75VREF
PWR_GD
PM_APWROK
PM_APWROK [14,30]1.05VM_PG[46]
SIO_SLP_A#[14,30,46]
1.5VS_PG[49]
SLP_S3#[14,30,34,45]
PWR_GD [30,47,5]
PCH_PWROK_R [14]
VGATE[47]
+5VDS
+3VS
+5VDS
+3VS
+1.35VS
+5VS
+0.675VS
+5VL
+3VDS
+5VDS
+3VM_LAN
+5VL
+1.05VS
+5VDS
+3V_PCH
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
POK CKT
31 56Thursday, December 20, 2012
2012/03/23 2010/03/31Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
POK CKT
31 56Thursday, December 20, 2012
2012/03/23 2010/03/31Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
POK CKT
31 56Thursday, December 20, 2012
2012/03/23 2010/03/31Compal Electronics, Inc.
R550 3.3K_0402_5%R550 3.3K_0402_5%1 2
R285
1M_0402_5%
R285
1M_0402_5%1 2
U20B
LM393DR2G_SO8
U20B
LM393DR2G_SO8
+5
-6 O
7P
8G
4
R292
31.6K_0402_1%
R292
31.6K_0402_1%
12
C197
1000P
_0402_50V
7K
C197
1000P
_0402_50V
7K
1
2
R312 1M_0402_5%R312 1M_0402_5%1 2
R548
3.3K_0402_5%
R548
3.3K_0402_5%
1 2
R294
1M_0402_5%
R294
1M_0402_5%1 2
U20A
LM393DR2G_SO8
U20A
LM393DR2G_SO8
+3
-2 O
1
P8
G4
R310 20.5K_0402_1%R310 20.5K_0402_1%1 2
R175
3.3K_0402_5%
R175
3.3K_0402_5%
12
C1951000P_0402_50V7KC1951000P_0402_50V7K
1
2
R306
35.7K_0402_1%
R306
35.7K_0402_1%
12
R29973.2K_0402_1%R29973.2K_0402_1%
12
R284
40.2K_0402_1%@R284
40.2K_0402_1%@
12
CH1150.22U_0402_6.3V6K
CH1150.22U_0402_6.3V6K
1
2
R301
1M_0402_5%
R301
1M_0402_5%
1 2
R304 88.7K_0402_1%R304 88.7K_0402_1%1 2
U19B
LM393DR2G_SO8
U19B
LM393DR2G_SO8
+5
-6 O
7
P8
G4
C194
3300P_0402_25V7K
C194
3300P_0402_25V7K
1
2
R551
3.3K_0402_5%
R551
3.3K_0402_5%
1 2
R307
1K_0402_5%
R307
1K_0402_5%
12
R313
19.1K_0402_1%
R313
19.1K_0402_1%
12
R291 105K_0402_1%R291 105K_0402_1%1 2
R296 10K_0402_5%R296 10K_0402_5%1 2
R552
3.3K_0402_5%
R552
3.3K_0402_5%
1 2
C199
3300P_0402_25V7K
C199
3300P_0402_25V7K
1
2
C198
0.068U_0402_10V6K
C198
0.068U_0402_10V6K
1 2
R290 10K_0402_5%R290 10K_0402_5%1 2
U19A
LM393DR2G_SO8
U19A
LM393DR2G_SO8
+3
-2 O
1
P8
G4
R309
1M_0402_5%
R309
1M_0402_5%1 2
R289 11.5K_0402_1%R289 11.5K_0402_1%1 2
C196
3300P_0402_25V7K
C196
3300P_0402_25V7K
1
2
D43
DAP202UGT106_SC70-3
D43
DAP202UGT106_SC70-3
1
3
2
R311
10K_0402_5%
R311
10K_0402_5%
1 2
R293 30.9K_0402_1%R293 30.9K_0402_1%1 2
D41
DAP202UGT106_SC70-3
D41
DAP202UGT106_SC70-3
1
3
2
R547 3.3K_0402_5%R547 3.3K_0402_5%1 2
R297 76.8K_0402_1%R297 76.8K_0402_1%1 2
R288 76.8K_0402_1%R288 76.8K_0402_1%1 2
RH246
4.7K_0402_5%
RH246
4.7K_0402_5%
12
R553 24.3K_0402_1%R553 24.3K_0402_1%1 2
R286
10K_0402_5%
R286
10K_0402_5%
12
1
1
2
2
3
3
4
4
5
5
A A
B B
C C
D D
TO LPC47N217N
Parallel Port
1 = 04Eh0 = 02Eh
Base I/O Address
07/19 Change R483.1 and R482.1 connection to +3VS. Change R330.1, R329.1, and R328.1 connection to GND
07/20 Reserve SIO_GPIO44 PD R554, and modify R328,R329, R330 value to 4.7K. Modify R482, R483 valueto 10K
09/11 Add R601 4.7K PU to +3VS on signal SIO_GPIO42. Noninstall R601
10/25 Delete R320, R477,R478, R464. Add RP13
10/25 Delete R465, R466,R467, R472. Add RP14
10/25 Delete R473, R474, R475, R468. Add RP15
10/25 Delete R469, R470, R471, R479. Add RP16
10/25 Delete R318, R319, R321, R322. Add RP17
10/25 Delete R484, R485, R486. Add RP18
10/26 Delete R481
10/26 Connect U22.26 pin to signal mSATA_DET#
11/07 Change R332 to 33 ohms, C205 to 82pF and install R332 and C205
LPTINIT#
LPD5LPD4LPD4LPD3
LPD0LPD1LPD2LPD2
LPD7LPD6LPD6
SIO_GPIO46
SIO_GPIO12SIO_IRQ
CLK_SIO_14MCLK_PCI_SIO
LPTSLCTLPTPELPTBUSYLPTACK#LPTERR#LPTAFD#LPTSTB#
LPTINIT#LPTSLCTIN#
LPC_LAD1LPC_LAD0
LPC_LAD2LPC_LAD3
LPC_LFRAME#LPC_LDRQ0#
CLK_PCI_SIOSIRQ
KBC_SIO_RST#
PM_CLKRUN#
CLK_SIO_14M
SIO_PME#
DCD#1RI#1DTR#1CTS#1RTS#1DSR#1
RXD1TXD1
RXD1
SIO_GPIO41SIO_GPIO42
SIO_GPIO23
SYSOPT
SIO_GPIO43
SIO_IRQSIO_GPIO12
SIO_GPIO10
SIO_GPIO44mSATA_DET#SIO_GPIO46
SIO_GPIO10
SYSOPT
SER_SHD_GPIO47
LPCPD#_SIO
LPCPD#_SIO
SIO_GPIO42SIO_GPIO41SIO_GPIO23
SIO_GPIO43SIO_GPIO44
SIO_GPIO44
SIO_GPIO42
DCD#1RI#1CTS#1DSR#1
LPTSTB#LPTAFD#LPTERR#LPTACK#
LPTBUSY
LPD7
LPTPELPTSLCT
LPD6LPD5LPD4LPD3
LPTSLCTIN#LPD0LPD1LPD2
LPD0[33]LPD1[33]LPD2[33]LPD3[33]LPD4[33]LPD5[33]
LPD7[33]LPD6[33]
LPTSLCT[33]
LPTPE[33]LPTBUSY[33]LPTACK#[33]LPTERR#[33]LPTAFD#[33]LPTSTB#[33]
LPTINIT#[33]LPTSLCTIN#[33]
LPC_LAD0 [16,25,28,30]LPC_LAD1 [16,25,28,30]LPC_LAD2 [16,25,28,30]LPC_LAD3 [16,25,28,30]
LPC_LFRAME# [16,25,28,30]LPC_LDRQ0# [16]
CLK_PCI_SIO [15]
KBC_SIO_RST# [18,30]
PM_CLKRUN# [14,28,30]
DCD#1[33]RI#1[33]DTR#1[33]CTS#1[33]RTS#1[33]DSR#1[33]
RXD1[33]
TXD1[33]
CLK_SIO_14M [15]
SIRQ [16,28,30]
mSATA_DET# [23]
+5VS
+5VS_PRN
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
SUPER I/O LPC47N217N-ABZJ
32 56Thursday, December 20, 2012
2012/03/23 2009/09/09Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
SUPER I/O LPC47N217N-ABZJ
32 56Thursday, December 20, 2012
2012/03/23 2009/09/09Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
SUPER I/O LPC47N217N-ABZJ
32 56Thursday, December 20, 2012
2012/03/23 2009/09/09Compal Electronics, Inc.
R330 4.7K_0402_5%R330 4.7K_0402_5%1 2
RP16
4.7K_0804_8P4R_5%
RP16
4.7K_0804_8P4R_5%
18273645
R32710K_0402_5%R32710K_0402_5%
12
R33233_0402_5%R33233_0402_5%
12
R329 4.7K_0402_5%R329 4.7K_0402_5%1 2
RP17
4.7K_0804_8P4R_5%
RP17
4.7K_0804_8P4R_5%
18273645
C202
0.1
U_0402_16V
4Z
C202
0.1
U_0402_16V
4Z
1
2
C201
0.1
U_0402_16V
4Z
C201
0.1
U_0402_16V
4Z
1
2
R33310_0402_5%
@R33310_0402_5%
@
12
R324 10K_0402_5%R324 10K_0402_5%1 2
RP18
4.7K_0804_8P4R_5%
RP18
4.7K_0804_8P4R_5%
18273645
R476 4.7K_0402_5%R476 4.7K_0402_5%1 2
C203
0.1
U_0402_16V
4Z
C203
0.1
U_0402_16V
4Z
1
2
C20582P 50V J NPO 0402C20582P 50V J NPO 0402
1
2
R554 4.7K_0402_5%@R554 4.7K_0402_5%@1 2
R482 10K_0402_5%R482 10K_0402_5%1 2
C20610P_0402_25V8K
@C20610P_0402_25V8K
@
1
2
R331 10K_0402_5%R331 10K_0402_5%1 2
POWER
CLOCK
GPIO
LPC I/F
SERIAL I/F
PARALLEL I/F
U22
LPC47N217N-ABZJ_QFN56_8X8
POWER
CLOCK
GPIO
LPC I/F
SERIAL I/F
PARALLEL I/F
U22
LPC47N217N-ABZJ_QFN56_8X8
LAD09
LAD111
LAD212
LAD313
LFRAME#14
LDRQ#15
PCI_RESET#16
LPCPD#17
CLKRUN#18
PCI_CLK19
SER_IRQ20
IO_PME#6INIT#
35
SLCTIN#36
PD037
PD139
PD240
PD341
PD442
PD543
PD644
PD745
SLCT47
PE48
BUSY49
ACK#50
ERROR#51
ALF#52
STROBE#53
GPIO4121
GPIO4222
GPIO4324
GPIO4425
GPIO4526
GPIO4627
GPIO4728
GPIO1029
GPIO11/SYSOPT30
GPIO12/IO_SMI#31
GPIO13/IRQIN132
GPIO14/IRQIN233
GPIO2334
CLK148
VTR7
VCC23
VCC46
EPAD57
VCC38
VCC10
RXD154
TXD155
DSR1#56
RTS1#1
CTS1#2
DTR1#3
RI1#4
DCD1#5
R601 4.7K_0402_5%@R601 4.7K_0402_5%@1 2
C204
4.7
U_0805_10V
4Z
C204
4.7
U_0805_10V
4Z
1
2
R483 10K_0402_5%R483 10K_0402_5%1 2
R323 1K_0402_5%R323 1K_0402_5%1 2
RP15
4.7K_0804_8P4R_5%
RP15
4.7K_0804_8P4R_5%
18273645
R325 4.7K_0402_5%R325 4.7K_0402_5%1 2
D27RB751V-40_SOD323-2
D27RB751V-40_SOD323-2
12
RP13
4.7K_0804_8P4R_5%
RP13
4.7K_0804_8P4R_5%
18273645
R480 4.7K_0402_5%R480 4.7K_0402_5%1 2
R328 4.7K_0402_5%R328 4.7K_0402_5%1 2
RP14
4.7K_0804_8P4R_5%
RP14
4.7K_0804_8P4R_5%
18273645
1
1
2
2
3
3
4
4
5
5
A A
B B
C C
D D
DOCKING CONNECTDOCK CONN. 184PIN
(1) PCI Express x1 channels
(2) PS/2 Interfaces(2) USB 2.channels (2) SATA Channels (2) Display Port Channels
(1) Serial Port
(1) Parallel Port
(1) Line In
(1) Line Out(1) RJ45 (10/100/1000)
(1) VGA(1) 2 LAN indicator LED's(1) Power Button(1) I2C interface
12A
Quick SW
5A
IN
H
L
NC<-->COM
OFF
ON
ON
OFF
NO<-->COM
GPU
07/16 Add by ESD's request
07/18 change by HP request
08/01 Modify SATA bus from port 5 to port 2
09/11 Delete R351 and connectEN_P1V5 to JDOCK1.140
09/11 Change C299 to 0.01uF. Delete R336 andconnect C299.1 to ON/OFFBTN_KBC#. ConnectON/OFFBTN_KBC# to JDOCK1.49
09/27 Delete R339, R341 09/27 Delete R340, R342
10/11 Non-install D42
DOCK_ID
MXM_DCK_AUX#DPB_AUXDPB_AUX#
MXM_DCK_AUX
R_DOCK_RED
R_DOCK_GRNR_DOCK_BLU
DLINE_OUT_LDLINE_OUT_R
DOCK_HPS#
DETECT
DETECT
PS2_DATA
KBD_DATAKBD_CLK
VA_ON#
VA_ON#
D_DDCCLKD_DDCDATA
DCD#1
RXD1
DSR#1
RI#1
RTS#1
TXD1
CTS#1DTR#1
PS2_CLK
ADP_SIGNAL
LPD1
LPD5
ISO_PREP#
LPD3
LPTBUSY
LPTINIT#
LPTAFD#
SATA_ACT#
LPTSTB#
LPD6
LPD4
STB_LED#_R
LPTSLCTIN#
LPD7LPTSLCT
LPTACK#
DOCK_ID
LPD0
LPD2
LPTPE
LPTERR#
DCK1_HPD
R_DOCK_RED
R_DOCK_BLUR_DOCK_GRN
R_DOCK_GRNR_DOCK_BLU
R_DOCK_RED
DPB_AUXDPB_AUX# MXM_DCK_AUX#
MXM_DCK_AUX
8051TX_STBYLED#
STB_LED#_R
ON/OFFBTN_KBC#
ON/OFFBTN_KBC#
USBP11+USBP11-
USB3RN1USB3RP1
USB3TN1USB3TP1
ISO_PREP#
DPB_HPD
DOCK_LINE_IN_L [27]DOCK_LINE_IN_R [27]
DLINE_OUT_L [27]DLINE_OUT_R [27]
KBD_DATA [30]
PS2_DATA [30]
MDO3+[29]MDO3-[29]
MDO2+[29]MDO2-[29]
DPB_TXP0[36]DPB_TXN0[36]
DPB_TXP1[36]DPB_TXN1[36]
DPB_TXP2[36]DPB_TXN2[36]
DPB_TXP3[36]DPB_TXN3[36]
DPB_AUX[36]DPB_AUX#[36]
LPTSTB#[32]LPTAFD#[32]LPTERR#[32]LPTACK#[32]LPTBUSY[32]LPTPE[32]LPTSLCT[32]
LPD7[32]LPD6[32]LPD5[32]LPD4[32]LPD3[32]LPD2[32]LPD1[32]LPD0[32]LPTSLCTIN#[32]LPTINIT#[32]
SATA_ACT#[13,39]
LED_LINK_LAN_DOCK# [29]LAN_ACT# [29]
MXM_DCK_AUX [35]MXM_DCK_AUX# [35]
D_DDCDATA [36]D_DDCCLK [36]D_VSYNC [36]D_HSYNC [36]
DCD#1 [32]RI#1 [32]DTR#1 [32]CTS#1 [32]RTS#1 [32]DSR#1 [32]TXD1 [32]RXD1 [32]
DOCK_HPS# [27]LINE_IN_SENSE [27]
DPB_HPD[36]EN_P1V5[30,39,40,44,45]
KBD_CLK [30]
PS2_CLK [30]
DOCK_ID[36]
MDO0- [29]MDO0+ [29]
MDO1- [29]MDO1+ [29]
ISO_PREP#[13,36]
DCK1_HPD [35]
8051TX_STBYLED#[30,38,39]
ON/OFFBTN_KBC# [30,38]
SATA_PTX_DRX_N2[13]
SATA_PRX_DTX_N2[13]SATA_PRX_DTX_P2[13]
SATA_PTX_DRX_P2[13]
SATA_PRX_DTX_N3[13]
SATA_PTX_DRX_N3[13]SATA_PTX_DRX_P3[13]
SATA_PRX_DTX_P3[13]
USBP11-[17]
USBP0- [17]USBP0+ [17]
USB3TP1 [17]USB3TN1 [17]
USB3RP1 [17]USB3RN1 [17]
R_DOCK_RED [36]
R_DOCK_GRN [36]R_DOCK_BLU [36]
MXM_DCK_LANE_P0 [35]
MXM_DCK_LANE_N2 [35]
MXM_DCK_LANE_P1 [35]
MXM_DCK_LANE_P3 [35]
MXM_DCK_LANE_P2 [35]
MXM_DCK_LANE_N0 [35]
MXM_DCK_LANE_N3 [35]
MXM_DCK_LANE_N1 [35]
USBP11+[17]
VA+5VS
+5VS
VA
+5VS
VIN VA
ADP_SIGNAL
+5VS
+5VDS
+3V_PCH
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
DOCK CONNCustom
33 56Thursday, December 20, 2012
2012/03/23 2009/12/31Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
DOCK CONNCustom
33 56Thursday, December 20, 2012
2012/03/23 2009/12/31Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
DOCK CONNCustom
33 56Thursday, December 20, 2012
2012/03/23 2009/12/31Compal Electronics, Inc.
C210
10U
_0805_10V
4Z
C210
10U
_0805_10V
4Z
1
2
R337 10K_0402_5%R337 10K_0402_5%1 2
G
D
S
Q352N7002_SOT23-3G
D
S
Q352N7002_SOT23-3
2
13
C299
0.01U_0402_16V7K_X7R
C299
0.01U_0402_16V7K_X7R1
2
C215 0.1U_0402_16V4Z@C215 0.1U_0402_16V4Z@1 2
C2080.1U_0402_16V4ZC2080.1U_0402_16V4Z
1
2
C216 0.1U_0402_16V4Z@C216 0.1U_0402_16V4Z@1 2
D42
L30ESD24VC3-2_SOT23-3
@
D42
L30ESD24VC3-2_SOT23-3
@
123
R345 150_0402_1%R345 150_0402_1%1 2
JDOCK1A
FOX_QL0094L-D26601-8HCONN@
JDOCK1A
FOX_QL0094L-D26601-8HCONN@
P1190
G1189
11
22
33
44
55
66
77
88
99
1010
1111
1212
1313
1414
1515
1616
1717
1818
1919
2020
2121
2222
2323
2424
2525
2626
2727
2828
2929
3030
3131
3232
3333
3434
3535
3636
3737
3838
3939
4040
4141
4242
4343
4444
4545
144144 145145 146146 147147 148148 149149 150150 151151 152152 153153 154154 155155 156156 157157 158158 159159 160160 161161 162162 163163 164164 165165 166166 167167 168168 169169 170170 171171 172172 173173 174174 175175 176176 177177 178178 179179 180180 181181
182182 183183 184184 185185 186186 187187 188188
C214 0.1U_0402_16V4Z@C214 0.1U_0402_16V4Z@1 2
C207
0.1
U_0603_50V
4Z
C207
0.1
U_0603_50V
4Z
1
2
C212
0.1
U_0402_16V
4Z
C212
0.1
U_0402_16V
4Z
1
2
L28HCB2012KF-121T50_0805
L28HCB2012KF-121T50_0805
1 2
C211
0.1
U_0402_16V
4Z
C211
0.1
U_0402_16V
4Z
1
2
R344 150_0402_1%R344 150_0402_1%1 2
L27HCB2012KF-121T50_0805
L27HCB2012KF-121T50_0805
1 2
C209
0.1
U_0603_50V
4Z
C209
0.1
U_0603_50V
4Z
1
2
R334 10K_0402_5%R334 10K_0402_5%1 2
C213
0.1
U_0402_16V
4Z
C213
0.1
U_0402_16V
4Z
1
2
R3351K_0402_5%
R3351K_0402_5%
12
R168 100K_0402_5%R168 100K_0402_5%1 2
JDOCK1B
FOX_QL0094L-D26601-8HCONN@
JDOCK1B
FOX_QL0094L-D26601-8HCONN@
4848
4949
5050
5151
5252
5353
5454
5555
5656
5757
5858
5959
6060
6161
6262
6363
6464
6565
6666
6767
6868
6969
7070
7171
7272
7373
7474
7575
7676
7777
7878
7979
8080
8181
8282
8383
8484
8585
8686
8787
8888
8989
9090
9191
9292
9393
9494
9595 9696 9797 9898 9999 100
100 101101 102102 103103 104104 105105 106106 107107 108108 109109 110110 111111 112112 113113 114114 115115 116116 117117 118118 119119 120120 121121 122122 123123 124124 125125 126126 127127 128128 129129 130130 131131 132132 133133 134134 135135 136136 137137 138138 139139 140140 141141 47
474646
143143
142142
G1191
G3193
G5195
G7197
G2192
G4194
G6196
G8198
G9199
G10200
R34610K_0402_5%R34610K_0402_5%
12
R343 150_0402_1%R343 150_0402_1%1 2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Discharge circuit-2 for V-M
Discharge circuit-1+1.05VM to +1.05VS Transfer
+3VDS to +3VS Transfer+5VDS to +5VS Transfer
6A
4.5A 6.5A
1.5A
+3VALW to +3VM_LAN Transfer
+3VALW TO +3VALW(PCH AUX Power)
40mil
Short J1 for PCH VCCSUS3.3
07/06 Swap Drain and Source
to aviod leakage issue
07/10 Change R363 to 4.7K
07/20 Delete C231
07/23 Remove Q37, R366, R361
08/10 Reserve C452, C456, C457, C458 for RF08/10 Reserve C453 and C454 for RF
08/10 Reserve C455 for RF
9/25 Change +5VS power rail soultion. Delete U24, C226, C221, C222. Add U45, R603, C489, C490, C491, C492
09/25 Change +3VS power rail solution.
Delete U25, C218, C223, C219, C227, R354, R356, R357, Q9.
Add U46, R604, C493, C494, C495, C496
9/25 Uninstall R370, R373, Q43, Q44
9/26 Change C489, C492 to 10u. Change C490 to 0.01u
09/26 Change C494, C496 to 10u. Change C493 to 0.01u
09/26 Change netname to SLP_S3#
09/26 Change +1.05VS power circuit.
09/26 Change Q42 to Dual channel
09/28 Add C503
10/12 Change R455 to 47K. Add Q18A, C504, R609. Modify circuit
10/16 Delete C504, R609, R456, Q67B. Add R612. Modify circuit.
10/18 Change R612 to 4.7k ohms. Delete Q67A
10/23 Delete R612
10/25 Change R455 to 200k. Add PD R622.
10/26 Change R455.2 connection to B+
10/26 Change Q36 to AO3413
11/06 Add C506, C507, C508, C509 by RF reqeust
11/06 Reserve C510 by RF request
11/06 Change C491 to 4700pF
11/06 Change C495 to 4700pF
SLP_S3
SLP_LAN
SLP_S3
SLP_S3
SLP_S3
SLP_LAN
KBC_PWR_ON#
KBC_PWR_ON#
SLP_S3# SLP_S3#
SLP_S3
SLP_S3#[14,30,31,45]
SLP_S3[49,9]
KBC_PWR_ON#[46]
KBC_PWR_ON[30,44]
SLP_LAN[29]
+5VS+5VDS
+3VS
B+
+3VM_LAN
+1.05VS+1.05VM
+3VDS
+5VS
+3VDS +3VM_LAN
+3VDS +3V_PCH
B+ +3VDS
+5VDS
+3VDS +3VS
+5VDS
+1.05VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
DC/DC Circuits
34 56Thursday, December 20, 2012
2012/03/23 2009/12/31Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
DC/DC Circuits
34 56Thursday, December 20, 2012
2012/03/23 2009/12/31Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
DC/DC Circuits
34 56Thursday, December 20, 2012
2012/03/23 2009/12/31Compal Electronics, Inc.
D
G
S
Q40 AO3413L_SOT23-3
D
G
S
Q40 AO3413L_SOT23-31
2
3
R603 0_0402_5%R603 0_0402_5%1 2
C506
10
0P
_0
40
2_
50
V8
J
@
C506
10
0P
_0
40
2_
50
V8
J
@
1
2
Q18BDMN66D0LDW-7_SOT363-6
Q18BDMN66D0LDW-7_SOT363-6
34
5
C452
68
P_
04
02
_5
0V
8J
@
C452
68
P_
04
02
_5
0V
8J
@
1
2
C453
68
P_
04
02
_5
0V
8J
@
C453
68
P_
04
02
_5
0V
8J
@
1
2
Q7B2N7002DWH_SOT363-6Q7B2N7002DWH_SOT363-6
34
5
G
D
S
Q432N7002_SOT23-3@
G
D
S
Q432N7002_SOT23-3@
2
13
R604 0_0402_5%R604 0_0402_5%1 2
R4891K_0402_5%
R4891K_0402_5%
12
C507
10
0P
_0
40
2_
50
V8
J
@
C507
10
0P
_0
40
2_
50
V8
J
@
1
2
C489
10
U_
06
03
_6
.3V
6M
C489
10
U_
06
03
_6
.3V
6M
1
2
Q18A
DMN66D0LDW-7_SOT363-6
Q18A
DMN66D0LDW-7_SOT363-6
61
2
C2
33
10
U_
08
05
_1
0V
4Z
C2
33
10
U_
08
05
_1
0V
4Z
1
2
C495 4700P_0402_16V7KC495 4700P_0402_16V7K1 2
C455
68
P_
04
02
_5
0V
8J
@
C455
68
P_
04
02
_5
0V
8J
@
1
2
R355470_0603_5%
R355470_0603_5%
12
C508
10
0P
_0
40
2_
50
V8
J
@
C508
10
0P
_0
40
2_
50
V8
J
@
1
2
C2
29
1U
_0
40
2_
6.3
V4
Z
AMT@
C2
29
1U
_0
40
2_
6.3
V4
Z
AMT@
1
2
R375 220K_0402_5%R375 220K_0402_5%1 2
C496
10
U_
06
03
_6
.3V
6M
C496
10
U_
06
03
_6
.3V
6M
1
2
C491 4700P_0402_16V7KC491 4700P_0402_16V7K1 2
Q42B2N7002DW T/R7_SOT-363-6Q42B2N7002DW T/R7_SOT-363-6
3
5
4
C457
68
P_
04
02
_5
0V
8J
@
C457
68
P_
04
02
_5
0V
8J
@
1
2
C509
10
0P
_0
40
2_
50
V8
J
@
C509
10
0P
_0
40
2_
50
V8
J
@
1
2
C454
68
P_
04
02
_5
0V
8J
@
C454
68
P_
04
02
_5
0V
8J
@
1
2
C510
10
0P
_0
40
2_
50
V8
J
@
C510
10
0P
_0
40
2_
50
V8
J
@
1
2
C458
68
P_
04
02
_5
0V
8J
@
C458
68
P_
04
02
_5
0V
8J
@
1
2
Q41AO4430L_SO8Q41AO4430L_SO8
62
4
1
35
78
C492
10
U_
06
03
_6
.3V
6M
C492
10
U_
06
03
_6
.3V
6M
1
2
Q42A
2N7002DW T/R7_SOT-363-6
Q42A
2N7002DW T/R7_SOT-363-6
61
2
C2
34
0.1
U_
04
02
_1
6V
4Z
C2
34
0.1
U_
04
02
_1
6V
4Z
1
2
R369470_0402_5%R369470_0402_5%
12
R360470_0402_5%R360470_0402_5%
12
C503
33
00
P_
04
02
_2
5V
7K
C503
33
00
P_
04
02
_2
5V
7K
1
2
C2
30
0.1
U_
04
02
_1
6V
4Z
AMT@
C2
30
0.1
U_
04
02
_1
6V
4Z
AMT@
1
2
G
D
SQ392N7002KW_SOT323-3
G
D
SQ392N7002KW_SOT323-3
2
13
G
D
S
Q442N7002_SOT23-3@
G
D
S
Q442N7002_SOT23-3@
2
13
C490 0.01U_0402_16V7K@C490 0.01U_0402_16V7K@1 2 U45
TPS22965DSGR_SON8_2X2
U45
TPS22965DSGR_SON8_2X2
VIN1
VIN2
ON3
VBIAS4
VOUT7
VOUT8
CT6 GND
5
GND9
C2
35
10
U_
08
05
_1
0V
4Z
C2
35
10
U_
08
05
_1
0V
4Z
1
2
R363
4.7K_0402_5%
R363
4.7K_0402_5%
12
C2
20
1U
_0
60
3_
25
V6
@
C2
20
1U
_0
60
3_
25
V6
@
1
2
D
G
S
Q36AO3413L_SOT23-3
AMT@
D
G
S
Q36AO3413L_SOT23-3
AMT@
1
2
3
R370220_0402_5%@R370220_0402_5%@
12
R368100K_0402_5%
R368100K_0402_5%
12
U46
TPS22965DSGR_SON8_2X2
U46
TPS22965DSGR_SON8_2X2
VIN1
VIN2
ON3
VBIAS4
VOUT7
VOUT8
CT6 GND
5
GND9
C493 0.01U_0402_16V7K@C493 0.01U_0402_16V7K@1 2
C456
68
P_
04
02
_5
0V
8J
@
C456
68
P_
04
02
_5
0V
8J
@
1
2
R622 100K_0402_5%R622 100K_0402_5%1 2
J1
JUMP_43X79
@J1
JUMP_43X79
@
11
22
+
C2
32
33
0U
_B
2_
2V
M_
R1
5M
@
+
C2
32
33
0U
_B
2_
2V
M_
R1
5M
@
1
2
C494
10
U_
06
03
_6
.3V
6M
C494
10
U_
06
03
_6
.3V
6M
1
2
R4881K_0402_5%
R4881K_0402_5%
12
C2
25
10
U_
06
03
_6
.3V
6M
C2
25
10
U_
06
03
_6
.3V
6M
1
2
C224
10U_0603_6.3V6M
C224
10U_0603_6.3V6M
1
2
R455 200K_0402_5%R455 200K_0402_5%1 2
R373470_0402_5%@R373470_0402_5%@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CRT
SWITCH
Thunder Bolt
Dock
EDP
S Z
LO
HI
Y0
Y1
#4/6 change by HP
requirement
5/17 change by HP agree
5/28 change by HP requirement
6/2 change to fix MXM no function issue. 07/06 Swap PEG TX and RX
07/06 Swap PEG TX and RX
07/09 Change by easy layout
07/09 Change by easy layout
07/09 Change by easy layout
07/09 Change by easy layout
08/08 Reserve C450, C451 by RF request
08/09 Modify JMXM1 footprint
08/09 Modify JMXM1 footprint
09/27 Add R606, R607, R608
10/11 Change DP port C to eDP
10/11 Change DP port A to Thunder bolt
10/11 Change DP port B to DOCK
10/11 Change DP port D to SWITCH
10/18 change R137 to 4.7K
10/18 Change R606,R607 and R608 to 4.7K
10/25 Change R607 and R608 to 10K
10/25 Change Q61 and Q62 to dual channel 7002
10/29 Change R608 to 300 ohms.
10/29 Delete R137, Q82.B. Add D52
11/08 Delete D52. Add Q83, R627
12/12 Change U34, U35, U36 to small package for material shortage issue.
12/20 Uninstall R91, R92, R93.
PEG_CRX_GTX_P[0..15]
PEG_CRX_GTX_N[0..15]
PEG_CTX_GRX_P[0..15]
PEG_CTX_GRX_N[0..15]
DGPU_PWR_EN
DGPU_PRSNT#
DGPU_PWROK
ENAVDD_G
BL_PWM_GBL_EN_G
TB_HPD DCK1_HPDDCK1_SYS_HPD
dGPU_HPD_INTR
ENAVDD_G
BL_EN_G
BL_PWM_G
DGPU_SELECT#
PEX_RST
MXM_PCH_KBC_I2CDATMXM_PCH_KBC_I2CLK
PEX_RST
PCH_THERMTRIP#_R
AC_PRES_OUT
AC_PRES_OUT
PCH_THERMTRIP#_R
DGPU_SELECT#
DGPU_PWR_EN
PEG_CRX_GTX_N13
PEG_CRX_GTX_P10
PEG_CRX_GTX_P8
PEG_CRX_GTX_P14
PEG_CRX_GTX_N11
PEG_CRX_GTX_N6
PEG_CRX_GTX_P13
PEG_CRX_GTX_N9
PEG_CRX_GTX_N8
PEG_CRX_GTX_P11
PEG_CRX_GTX_P7
PEG_CRX_GTX_P15
PEG_CRX_GTX_N12
PEG_CRX_GTX_P4
PEG_CRX_GTX_P5
PEG_CRX_GTX_N4
PEG_CRX_GTX_P9
PEG_CRX_GTX_N5
PEG_CRX_GTX_N10
PEG_CRX_GTX_N7
PEG_CRX_GTX_N14
PEG_CRX_GTX_P12
PEG_CRX_GTX_P6
PEG_CRX_GTX_N15
PEG_CRX_GTX_C_N13
PEG_CRX_GTX_C_P10
PEG_CRX_GTX_C_P8
PEG_CRX_GTX_C_P14
PEG_CRX_GTX_C_N11
PEG_CRX_GTX_C_N6
PEG_CRX_GTX_C_P13
PEG_CRX_GTX_C_N9
PEG_CRX_GTX_C_N8
PEG_CRX_GTX_C_P11
PEG_CRX_GTX_C_P7
PEG_CRX_GTX_C_P15
PEG_CRX_GTX_C_N12
PEG_CRX_GTX_C_N4PEG_CRX_GTX_C_P4
PEG_CRX_GTX_C_P5
PEG_CRX_GTX_C_P9
PEG_CRX_GTX_C_N5
PEG_CRX_GTX_C_N10
PEG_CRX_GTX_C_N7
PEG_CRX_GTX_C_N14
PEG_CRX_GTX_C_P12
PEG_CRX_GTX_C_P6
PEG_CRX_GTX_C_N15
PEG_CTX_GRX_N4
PEG_CTX_GRX_N6
PEG_CTX_GRX_P5PEG_CTX_GRX_N5
PEG_CTX_GRX_P4
PEG_CTX_GRX_P6
PEG_CTX_GRX_N8
PEG_CTX_GRX_N10
PEG_CTX_GRX_P9PEG_CTX_GRX_N9
PEG_CTX_GRX_P8
PEG_CTX_GRX_P10
PEG_CTX_GRX_P11PEG_CTX_GRX_N11
PEG_CTX_GRX_P7PEG_CTX_GRX_N7
PEG_CTX_GRX_N12
PEG_CTX_GRX_N14
PEG_CTX_GRX_P13PEG_CTX_GRX_N13
PEG_CTX_GRX_P12
PEG_CTX_GRX_P14
PEG_CTX_GRX_P15PEG_CTX_GRX_N15
PEG_CRX_GTX_C_N1PEG_CRX_GTX_C_P1
PEG_CRX_GTX_C_N2
PEG_CRX_GTX_C_N0
PEG_CRX_GTX_C_P2
PEG_CRX_GTX_C_P0
PEG_CRX_GTX_N2PEG_CRX_GTX_P2
PEG_CRX_GTX_N1PEG_CRX_GTX_P1
PEG_CRX_GTX_N0PEG_CRX_GTX_P0
PEG_CRX_GTX_C_N3PEG_CRX_GTX_C_P3 PEG_CRX_GTX_P3
PEG_CRX_GTX_N3
PEG_CTX_GRX_P2
PEG_CTX_GRX_N0
PEG_CTX_GRX_N2
PEG_CTX_GRX_P1PEG_CTX_GRX_N1
PEG_CTX_GRX_P0
PEG_CTX_GRX_N3PEG_CTX_GRX_P3
MXM_THERMTRIP#
MXM_eDP_C_LANE_N0MXM_eDP_C_LANE_P0
MXM_eDP_C_LANE_N1MXM_eDP_C_LANE_P1
MXM_eDP_C_LANE_N2MXM_eDP_C_LANE_P2
MXM_eDP_C_LANE_N3MXM_eDP_C_LANE_P3
GPU_C_AUX#GPU_C_AUX
MXM_TB_C_LANE_N0MXM_TB_C_LANE_P0
MXM_TB_C_LANE_N1MXM_TB_C_LANE_P1
MXM_TB_C_LANE_N2MXM_TB_C_LANE_P2
MXM_TB_C_LANE_N3MXM_TB_C_LANE_P3
MXM_TB_AUX#MXM_TB_AUX
DCK1_SYS_HPD
TB_HPDDCK1_HPD
DGPU_PWROK
GPU_VGA_DDC_DAT [36]GPU_VGA_DDC_CLK [36]GPU_VGA_VSYNC [36]GPU_VGA_HSYNC [36]
RED_R [36]GREEN_R [36]BLUE_R [36]
PEG_CTX_GRX_P[0..15][4]
PEG_CTX_GRX_N[0..15][4]
PEG_CRX_GTX_P[0..15][4]
PEG_CRX_GTX_N[0..15][4]
DGPU_PWROK [18]DGPU_PWR_EN [14,15]
DGPU_PRSNT# [18]
INV_PWM [22]
MXM_DCK_LANE_P0 [33]MXM_DCK_LANE_N0 [33]
MXM_DCK_AUX# [33]
GPU_HPD [36]
dGPU_HPD_INTR[17]
ENAVDD [22]ENVDD_PCH[14]DGPU_SELECT#[14,36]
ENABLT [22]PANEL_BKEN_PCH[14]
BKL_PWM_PCH[14]
PEG_CLK_REQ# [15]
DGPU_HOLD_RST# [14]
PLT_RST# [13,14,25,28,29,30,37,39,5]
CLK_PCIE_VGA#[15]CLK_PCIE_VGA[15]
PCH_KBC_I2CDAT [16,30]
PCH_KBC_I2CLK [16,30]
AC_PRES_OUT [14,30]
PCH_THERMTRIP#_R [18,24,5]
MXM_eDP_LANE_P0[36]MXM_eDP_LANE_N0[36]
MXM_eDP_LANE_N2[36]MXM_eDP_LANE_P2[36]
MXM_eDP_LANE_N1[36]MXM_eDP_LANE_P1[36]
MXM_eDP_LANE_N3[36]MXM_eDP_LANE_P3[36]
GPU_AUX#[36]GPU_AUX[36]
MXM_TB_LANE_P0[39]MXM_TB_LANE_N0[39]
MXM_TB_AUX#[39]MXM_TB_AUX[39]
MXM_SYS_LANE_N0 [36]MXM_SYS_LANE_P0 [36]
MXM_SYS_LANE_P1 [36]MXM_SYS_LANE_N1 [36]
MXM_SYS_LANE_N2 [36]MXM_SYS_LANE_P2 [36]
MXM_SYS_LANE_P3 [36]MXM_SYS_LANE_N3 [36]
MXM_SYS_AUX# [36]MXM_SYS_AUX [36]
MXM_TB_LANE_P1[39]MXM_TB_LANE_N1[39]
MXM_TB_LANE_N2[39]MXM_TB_LANE_P2[39]
MXM_TB_LANE_P3[39]MXM_TB_LANE_N3[39] MXM_DCK_AUX [33]
DCK1_SYS_HPD [36]
TB_HPD [39]DCK1_HPD [33]
MXM_DCK_LANE_P1 [33]MXM_DCK_LANE_N1 [33]
MXM_DCK_LANE_P2 [33]MXM_DCK_LANE_N2 [33]
MXM_DCK_LANE_P3 [33]MXM_DCK_LANE_N3 [33]
+5VS
B+ B+
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
MXM
35 56Thursday, December 20, 2012
2012/03/23 2009/09/09Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
MXM
35 56Thursday, December 20, 2012
2012/03/23 2009/09/09Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
MXM
35 56Thursday, December 20, 2012
2012/03/23 2009/09/09Compal Electronics, Inc.
C340.1U_0402_10V7K C340.1U_0402_10V7K 12
CV5 0.22U_0402_6.3V6KCV5 0.22U_0402_6.3V6K12
CV210.22U_0402_6.3V6K CV210.22U_0402_6.3V6K 1 2
C451
82P
50V
J N
PO
0402
@
C451
82P
50V
J N
PO
0402
@
12
G
D
SQ51
2N7002KW_SOT323-3
G
D
SQ51
2N7002KW_SOT323-3
2
13
R448 10K_0402_5%R448 10K_0402_5%1 2
C260.1U_0402_10V7K C260.1U_0402_10V7K 12
CV280.22U_0402_6.3V6K CV280.22U_0402_6.3V6K 1 2
CV180.22U_0402_6.3V6K CV180.22U_0402_6.3V6K 1 2
C347
10U
_0603_6.3
V6M
C347
10U
_0603_6.3
V6M
1
2
U36
74LVC1G3157GW_SC-88-6
U36
74LVC1G3157GW_SC-88-6
Y11
GND2
Y03
Z4VCC5
S6
CV260.22U_0402_6.3V6K CV260.22U_0402_6.3V6K 1 2
C250.1U_0402_10V7K C250.1U_0402_10V7K 12
CV1 0.22U_0402_6.3V6KCV1 0.22U_0402_6.3V6K12
CV4 0.22U_0402_6.3V6KCV4 0.22U_0402_6.3V6K12
R487 4.7K_0402_5%@R487 4.7K_0402_5%@1 2
R169
100K_0402_5%
R169
100K_0402_5%
12
CV220.22U_0402_6.3V6K CV220.22U_0402_6.3V6K 1 2
CV3 0.22U_0402_6.3V6KCV3 0.22U_0402_6.3V6K12
CV240.22U_0402_6.3V6K CV240.22U_0402_6.3V6K 1 2
CV90.22U_0402_6.3V6K CV90.22U_0402_6.3V6K 1 2
CV290.22U_0402_6.3V6K CV290.22U_0402_6.3V6K 1 2
G
D
SQ52
2N7002KW_SOT323-3
G
D
SQ52
2N7002KW_SOT323-3
2
13
C670.1U_0402_10V7K C670.1U_0402_10V7K 12
CV250.22U_0402_6.3V6K CV250.22U_0402_6.3V6K 1 2
C320.1U_0402_10V7K C320.1U_0402_10V7K 12CV140.22U_0402_6.3V6K CV140.22U_0402_6.3V6K 1 2
R449 10K_0402_5%R449 10K_0402_5%1 2
C390.1U_0402_10V7K C390.1U_0402_10V7K 12
R452100K_0402_5%R452100K_0402_5%
12
U35
74LVC1G3157GW_SC-88-6
U35
74LVC1G3157GW_SC-88-6
Y11
GND2
Y03
Z4VCC5
S6
E
B
C
Q83
MMBT3904_SOT23-3
E
B
C
Q83
MMBT3904_SOT23-3
2
13
R92150_0402_1%@
R92150_0402_1%@
12
C300.1U_0402_10V7K C300.1U_0402_10V7K 12
CV190.22U_0402_6.3V6K CV190.22U_0402_6.3V6K 1 2
CV110.22U_0402_6.3V6K CV110.22U_0402_6.3V6K 1 2
C370.1U_0402_10V7K C370.1U_0402_10V7K 12
R453100K_0402_5%R453100K_0402_5%
12
R450 10K_0402_5%R450 10K_0402_5%1 2
Q60B
2N7002DW T/R7_SOT-363-6
Q60B
2N7002DW T/R7_SOT-363-6
3
5
4
CV100.22U_0402_6.3V6K CV100.22U_0402_6.3V6K 1 2C280.1U_0402_10V7K C280.1U_0402_10V7K 12
CV230.22U_0402_6.3V6K CV230.22U_0402_6.3V6K 1 2C350.1U_0402_10V7K C350.1U_0402_10V7K 12
JMXM1B
FOX_AS0B826-S43B1-7HCONN@
JMXM1B
FOX_AS0B826-S43B1-7HCONN@
GND158
PEX_TX3#160
PEX_TX3162
GND164
GND166
PEX_RX2#168
PEX_RX2170
GND172
PEX_RX1#174
GND159
PEX_RX3#161
PEX_RX3163
GND165
GND167
PEX_TX2#169
PEX_TX2171
GND173
PEX_TX1#175
PEX_TX1177
GND179
PEX_TX0#181
PEX_TX0183
GND185
PEX_CLK_REQ#187
PEX_RST#189
VGA_DDC_DAT191
VGA_DDC_CLK193
VGA_VSYNC195
VGA_HSYNC197
GND199
VGA_RED201
VGA_GREEN203
VGA_BLUE205
GND207
LVDS_LCLK#209
LVDS_LCLK211
GND213
LVDS_LTX3#215
LVDS_LTX3217
GND219
LVDS_LTX2#221
LVDS_LTX2223
GND225
LVDS_LTX1#227
LVDS_LTX1229
GND231
LVDS_LTX0#233
LVDS_LTX0#235
GND237
DP_D_L0#239
DP_D_L0241
PEX_RX1176
GND178
PEX_RX0#180
PEX_RX0182
GND184
PEX_REFCLK#186
PEX_REFCLK188
GND190
RSVD192
RSVD194
RSVD196
RSVD198
RSVD200
LVDS_UCLK#202
LVDS_UCLK204
GND206
LVDS_UTX3#208
LVDS_UTX3210
GND212
LVDS_UTX2#214
LVDS_UTX2216
GND218
LVDS_UTX1#220
LVDS_UTX1222
GND224
LVDS_UTX0#226
LVDS_UTX0228
GND230
DP_C_L0#232
DP_C_L0234
GND236
DP_C_L1#238
DP_C_L1240
GND242
GND243
DP_D_L1#245
DP_D_L1247
GND249
DP_D_L2#251
DP_D_L2253
GND255
DP_D_L3#257
DP_D_L3259
GND261
DP_D_AUX#263
DP_D_AUX265
DP_C_HPD267
DP_D_HPD269
RSVD271
RSVD273
RSVD275
RSVD277
DP_B_L0#279
DP_B_L0281
DP_C_L2#244
DP_C_L2246
GND248
DP_C_L3#250
DP_C_L3252
GND254
DP_C_AUX#256
DP_C_AUX258
RSVD260
RSVD262
RSVD264
RSVD266
RSVD268
RSVD270
RSVD272
RSVD274
RSVD276
RSVD278
RSVD280
GND283
DP_B_L1#285
DP_B_L1287
GND289
DP_B_L2#291
DP_B_L2293
GND295
DP_B_L3#297
DP_B_L3299
GND301
DP_B_AUX#303
DP_B_AUX305
DP_B_HPD307
DP_A_HPD309
3V3311
3V3313
GND315
GND317
RSVD282
GND284
DP_A_L0#286
DP_A_L0288
GND290
DP_A_L1#292
DP_A_L1294
GND296
DP_A_L2#298
DP_A_L2300
GND302
DP_A_L3#304
DP_A_L3306
GND308
DP_A_AUX#310
DP_A_AUX312
PRSNT_L#314
GND316
GND318
Q82A2N7002KDW_SOT363-6Q82A2N7002KDW_SOT363-6
61
2
CV270.22U_0402_6.3V6K CV270.22U_0402_6.3V6K 1 2
R63 100K_0402_5%R63 100K_0402_5%12
C270.1U_0402_10V7K C270.1U_0402_10V7K 12
C240.1U_0402_10V7K C240.1U_0402_10V7K 12
Q60A
2N7002DW T/R7_SOT-363-6
Q60A
2N7002DW T/R7_SOT-363-6
61
2
CV320.22U_0402_6.3V6K CV320.22U_0402_6.3V6K 1 2C349
0.1
U_0402_16V
4Z
C349
0.1
U_0402_16V
4Z
1
2
CV2 0.22U_0402_6.3V6KCV2 0.22U_0402_6.3V6K12
R608 300_0402_5%R608 300_0402_5%1 2
R91
150_0402_1%@
R91
150_0402_1%@
12
CV120.22U_0402_6.3V6K CV120.22U_0402_6.3V6K 1 2
CV8 0.22U_0402_6.3V6KCV8 0.22U_0402_6.3V6K12
U34
74LVC1G3157GW_SC-88-6
U34
74LVC1G3157GW_SC-88-6
Y11
GND2
Y03
Z4VCC5
S6
R607 10K_0402_5%R607 10K_0402_5%1 2
CV150.22U_0402_6.3V6K CV150.22U_0402_6.3V6K 1 2
R93150_0402_1%
@
R93150_0402_1%
@
12
CV300.22U_0402_6.3V6K CV300.22U_0402_6.3V6K 1 2
U37
MC74VHC1G08DFT2G_SC70-5
U37
MC74VHC1G08DFT2G_SC70-5
IN11
IN22OUT
4 VC
C5
GN
D3
CV7 0.22U_0402_6.3V6KCV7 0.22U_0402_6.3V6K12
C330.1U_0402_10V7K C330.1U_0402_10V7K 12
C400.1U_0402_10V7K C400.1U_0402_10V7K 12
R627
4.7K_0402_5%
R627
4.7K_0402_5%
C348
0.1
U_0402_16V
4Z
C348
0.1
U_0402_16V
4Z
1
2
CV6 0.22U_0402_6.3V6KCV6 0.22U_0402_6.3V6K12
CV160.22U_0402_6.3V6K CV160.22U_0402_6.3V6K 1 2
R451100K_0402_5%R451100K_0402_5%
12
C310.1U_0402_10V7K C310.1U_0402_10V7K 12
CV310.22U_0402_6.3V6K CV310.22U_0402_6.3V6K 1 2
JMXM1A
FOX_AS0B826-S43B1-7H CONN@
JMXM1A
FOX_AS0B826-S43B1-7H CONN@
PWR_SRC1
PWR_SRC3 PWR_SRC
2
PWR_SRC4
PWR_SRC6
PWR_SRC8
PWR_SRC10
PWR_SRC12
PWR_SRC14
PWR_SRC5
PWR_SRC7
PWR_SRC9
PWR_SRC11
PWR_SRC13
PWR_SRC15
PWR_SRC17
PWR_SRC19
PWR_SRC16
PWR_SRC18
PWR_SRC20
GND21
GND23
GND25
GND27
GND29
GND31
GND33
GND35
GND37
GND39
5V41
5V43
5V45
5V47
5V49
GND51
GND53
GND55
GND57
PEX_STD_SW#59
VGA_DISABLE#61
PNL_PWR_EN63
PNL_BL_EN65
PNL_BL_PWM67
HDMI_CEC69
DVI_HPD71
LVDS_DDC_DAT73
LVDS_DDC_CLK75
GND77
OEM79
OEM81
OEM83
OEM85
GND87
PEX_RX15#89
PEX_RX1591
GND93
PEX_RX14#95
PEX_RX1497
GND99
PEX_RX13#101
PEX_RX13103
GND105
PEX_RX12#107
PEX_RX12109
GND111
PEX_RX11#113
PEX_RX11115
GND117
PEX_RX10#119
PEX_RX10121
GND123
PEX_RX9#125
PEX_RX9127
GND129
PEX_RX8#131
PEX_RX8133
GND135
PEX_RX7#137
PEX_RX7139
GND141
PEX_RX6#143
PEX_RX6145
GND147
PEX_RX5#149
PEX_RX5151
GND153
PEX_RX4#155
PEX_RX4157
GND22
GND24
GND26
GND28
GND30
GND32
GND34
GND36
GND38
GND40
PRSNT_R#42
WAKE#44
PWR_GOOD46
PWR_EN48
RSVD50
RSVD52
RSVD54
RSVD56
PWR_LEVEL58
TH_OVERT#60
TH_ALERT#62
TH_PWM64
GPIO066
GPIO168
GPIO270
SMB_DAT72
SMB_CLK74
GND76
OEM78
OEM80
OEM82
OEM84
GND86
PEX_TX15#88
PEX_TX1590
GND92
PEX_TX14#94
PEX_TX1496
GND98
PEX_TX13#100
PEX_TX13102
GND104
PEX_TX12#106
PEX_TX12108
GND110
PEX_TX11#112
PEX_TX11114
GND116
PEX_TX10#118
PEX_TX10120
GND122
PEX_TX9#124
PEX_TX9126
GND128
PEX_TX8#130
PEX_TX8132
GND134
PEX_TX7#136
PEX_TX7138
GND140
PEX_TX6#142
PEX_TX6144
GND146
PEX_TX5#148
PEX_TX5150
GND152
PEX_TX4#154
PEX_TX4156
CV170.22U_0402_6.3V6K CV170.22U_0402_6.3V6K 1 2
C380.1U_0402_10V7K C380.1U_0402_10V7K 12
G
D
SQ53
2N7002KW_SOT323-3
G
D
SQ53
2N7002KW_SOT323-3
2
13
CV130.22U_0402_6.3V6K CV130.22U_0402_6.3V6K 1 2
R606 4.7K_0402_5%R606 4.7K_0402_5%1 2
C290.1U_0402_10V7K C290.1U_0402_10V7K 12
CV200.22U_0402_6.3V6K CV200.22U_0402_6.3V6K 1 2
C450
82P
50V
J N
PO
0402
@
C450
82P
50V
J N
PO
0402
@
12
C360.1U_0402_10V7K C360.1U_0402_10V7K 12
1
1
2
2
3
3
4
4
5
5
A A
B B
C C
D D
M/B DP
Docking
DP MUX 07/17 Modify DP MUX solution to PI3VDP12412
From GPU
From CPU
eDP MUX07/17 Modify eDP MUX solution to PI3VDP12413
07/19 Delete CC70, CC71, CC75, CC76,
CC77, CC78, CC79, CC80, CC81, CC82
07/23 Change dual channel MOS Q76
07/23 Change to dual channel MOS Q76
07/23 Delete R516 and CC84
07/23 Delete R545 and C371
07/23 Modify net name
07/23 Modify net name07/23 Modify net name
07/25 Combine Q56 and Q57 to Q79
07/27 Add R563, R564
W=40mils09/07 Add JVGA2 circuit
09/07 Delete VGA_RED, VGA_GRN, VGA_BLU,
VGA_DDCCLK, VGA_DDCDATA, CRT_HSYNC, and
CRT_VSYNC off page symbol
09/12 Modify JVGA2 footprint
9/21 Correct netname.
10/25 Delete R570, R571,
R572. Add RP19
10/31 Modify JVGA2 footprint
12/20 Change RP19 to 150ohms
VGA_DDCCLKVGA_DDCDATA
R_D_HSYNC
R_CRT_VSYNCR_D_VSYNC
VGA_RED
VGA_GRN
VGA_BLU
VGA_DDCDATA
VGA_DDCCLK
R_DOCK_RED
R_DOCK_GRN
R_DOCK_BLU
D_DDCDATA
CRT_VSYNC
R_CRT_HSYNC CRT_HSYNC
DGPU_SELECT#
D_DDCCLK
SEL_DP_MUX
SEL_DP_MUX
SEL_DP_MUX
DPA_TXN0DPA_TXP0
DPA_TXP2
DPA_TXN1DPA_TXP1
DPA_TXN3DPA_TXP3
DPA_TXN2
MXM_eDP_LANE_N1MXM_eDP_LANE_P0
MXM_eDP_LANE_P1
EDP_CPU_LANE_N1
EDP_CPU_LANE_N0
EDP_CPU_LANE_P1
EDP_CPU_LANE_P0
GPU_AUX#
MXM_eDP_LANE_N0
GPU_AUX
EDP_CPU_AUX#EDP_CPU_AUX
MXM_eDP_LANE_N2
MXM_eDP_LANE_N3MXM_eDP_LANE_P3
MXM_eDP_LANE_P2
SEL_eDP_MUX
GPU_HPD
CPU_EDP_HPD#
SEL_eDP_MUX
SEL_eDP_MUX
VGA_RED
DAC_BLU
DAC_RED
VGA_GRN
DAC_BL
DAC_GR
DAC_RE
VGA_BLU
VGA_RE
VGA_GR
VGA_BL VGA_B
VGA_G
VGA_R
CRT_VSYNC_R
CRT_HSYNC_RCRT_HSYNC
CRT_VSYNC
VGA_DDCCLK
VGA_DDCDATA
DAC_GRN
VGA_B CRT_HSYNC
CRT_VSYNCVGA_G
VGA_R
R_DOCK_RED [33]
R_DOCK_GRN [33]
R_DOCK_BLU [33]
PCH_CRT_VSYNC[14]
PCH_CRT_RED[14]
D_DDCDATA [33]
PCH_CRT_GRN[14]
PCH_CRT_BLU[14]
PCH_CRT_HSYNC[14]
D_HSYNC [33]
D_VSYNC [33]
PCH_CRT_DDC_CLK[14]
PCH_CRT_DDC_DAT[14]
GPU_VGA_HSYNC[35]
RED_R[35]
GREEN_R[35]
GPU_VGA_DDC_DAT[35]
BLUE_R[35]
GPU_VGA_DDC_CLK[35]
GPU_VGA_VSYNC[35]
DOCK_ID[33]
D_DDCCLK [33]
MXM_SYS_LANE_P0[35]MXM_SYS_LANE_N0[35]
MXM_SYS_LANE_P1[35]MXM_SYS_LANE_N1[35]
MXM_SYS_LANE_P2[35]MXM_SYS_LANE_N2[35]
MXM_SYS_LANE_P3[35]MXM_SYS_LANE_N3[35]
MXM_SYS_AUX#[35]MXM_SYS_AUX[35]
DCK1_SYS_HPD[35]
ISO_PREP# [13,33]
MB_DPA_TXN1 [39]MB_DPA_TXP1 [39]
MB_DPA_TXN0 [39]MB_DPA_TXP0 [39]
MB_DPA_TXN3 [39]MB_DPA_TXP3 [39]
MB_DPA_TXN2 [39]MB_DPA_TXP2 [39]
DPB_TXP0 [33]DPB_TXN0 [33]
DPB_TXP1 [33]DPB_TXN1 [33]
DPB_TXP2 [33]DPB_TXN2 [33]
DPB_TXP3 [33]DPB_TXN3 [33]
DPB_AUX# [33]DPB_AUX [33]
MB_DPA_AUX# [39]MB_DPA_AUX [39]MB_DP_HPD [39]
DPB_HPD [33]
MXM_eDP_LANE_N0[35]
MXM_eDP_LANE_P1[35]MXM_eDP_LANE_N1[35]MXM_eDP_LANE_P0[35]
EDP_CPU_LANE_N0[7]EDP_CPU_LANE_P0[7]EDP_CPU_LANE_N1[7]EDP_CPU_LANE_P1[7]
GPU_AUX[35]GPU_AUX#[35]
EDP_CPU_AUX[7]EDP_CPU_AUX#[7]
MXM_eDP_LANE_P2[35]
MXM_eDP_LANE_P3[35]
MXM_eDP_LANE_N2[35]
MXM_eDP_LANE_N3[35]
DGPU_SELECT#[14,35]
CPU_EDP_HPD#[7]
GPU_HPD[35]
EDP_SW_HPD [22]
EDP_SW_D2N [22]EDP_SW_D2P [22]EDP_SW_D3N [22]EDP_SW_D3P [22]
EDP_SW_D0N [22]EDP_SW_D0P [22]EDP_SW_D1N [22]EDP_SW_D1P [22]
EDC_SW_AUX [22]EDC_SW_AUX# [22]
+3VS
+5VS
+3VS
+5VS
+5VS+5VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+CRTVDD+5VS +RCRT_VCC
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
Switch/MUX/VGACustom
36 56Thursday, December 20, 2012
2012/03/23 2009/12/31Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
Switch/MUX/VGACustom
36 56Thursday, December 20, 2012
2012/03/23 2009/12/31Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
Switch/MUX/VGACustom
36 56Thursday, December 20, 2012
2012/03/23 2009/12/31Compal Electronics, Inc.
CC73
0.1
U_
04
02
_1
6V
4Z
CC73
0.1
U_
04
02
_1
6V
4Z
1
2
C385 0.1U_0402_16V7KC385 0.1U_0402_16V7K1 2
R388 33_0402_1%R388 33_0402_1%1 2
R5730_0805_5%
R5730_0805_5%
1 2
R5750_0805_5%
R5750_0805_5%
1 2
D48
YSLC05CH_SOT23-3
@D48
YSLC05CH_SOT23-3
@
12
3
R350 10K_0402_5%R350 10K_0402_5%1 2
U42
PI3VDP12412ZHEX_TQFN42_9X3P5
U42
PI3VDP12412ZHEX_TQFN42_9X3P5
AUX_HPD_SEL5
D0-A42
D0+A41
D1-A40
D1+A39
D2-A38
D2+A37
D3+A35 D3-A36
D0+B32 D0-B33
D1+B30 D1-B31
D2+B28 D2-B29
D3+B26 D3-B27
D0-3
D0+4
D1-6
D1+7
D2-8
D2+9
D3-10
D3+11
VDD12
VDD21
GND1
GND17
VDD34
GND22
GPU_SEL2
OE25
AUX-13
AUX+14
AUX+B20 AUX-B19
AUX-A24
AUX+A23
HPD18
HPD_A16
HPD_B15
HGND43
C383 0.1U_0402_16V7KC383 0.1U_0402_16V7K1 2
MAX14885E
U28
MAX14885EETL+T_TQFN40_5X5~D
MAX14885E
U28
MAX14885EETL+T_TQFN40_5X5~D
SVA4
SCL135
SDA134
SDAB16
S1039
SH137
BLUA9
SHA3
BLUB19
SV136
SV227
GRN223
BLU131
SHB13
GRNA8
SH228
SDA225
GRNB18
SCLB15
S001
RED133
S0140
NC12GND
30
GRN132
GND20
GND10
RED224
BLU222
SCLA5
SDAA6
SVB14
REDB17 REDA
7
S1138
SCL226
EN2
VCC29
VCC21
VL11
GPAD41
R502 10K_0402_5%R502 10K_0402_5%1 2
C386 0.1U_0402_16V7KC386 0.1U_0402_16V7K1 2
R544 10K_0402_5%R544 10K_0402_5%1 2
U26
PI3VDP12412ZHEX_TQFN42_9X3P5
U26
PI3VDP12412ZHEX_TQFN42_9X3P5
AUX_HPD_SEL5
D0-A42
D0+A41
D1-A40
D1+A39
D2-A38
D2+A37
D3+A35D3-A36
D0+B32D0-B33
D1+B30D1-B31
D2+B28D2-B29
D3+B26D3-B27
D0-3
D0+4
D1-6
D1+7
D2-8
D2+9
D3-10
D3+11
VDD12
VDD21
GND1
GND17
VDD34
GND22
GPU_SEL2
OE25
AUX-13
AUX+14
AUX+B20AUX-B19
AUX-A24
AUX+A23
HPD18
HPD_A16
HPD_B15
HGND43
R580 0_0402_5%R580 0_0402_5%1 2
L34 39NH_CS0805-39NJ-S_5%L34 39NH_CS0805-39NJ-S_5%1 2
Q78B2N7002KDW_SOT363-6Q78B2N7002KDW_SOT363-6
3
5
4
C3
69
0.1
U_
04
02
_1
6V
4Z
C3
69
0.1
U_
04
02
_1
6V
4Z
1
2
L32 39NH_CS0805-39NJ-S_5%L32 39NH_CS0805-39NJ-S_5%1 2
Q78A2N7002KDW_SOT363-6Q78A2N7002KDW_SOT363-6
61
2
L30 110NH_CS0805-R11J-S_5%L30 110NH_CS0805-R11J-S_5%1 2
C4
61
18
P_
04
02
_5
0V
8J
C4
61
18
P_
04
02
_5
0V
8J
1
2
C4
60
18
P_
04
02
_5
0V
8J
C4
60
18
P_
04
02
_5
0V
8J
1
2
C4
65
10
P_
04
02
_5
0V
8J
@
C4
65
10
P_
04
02
_5
0V
8J
@
1
2
CC61
10U_0603_6.3V6M
CC61
10U_0603_6.3V6M
1
2
R386 33_0402_1%R386 33_0402_1%1 2
F11.1A_8VDC_FUSEF11.1A_8VDC_FUSE
21
C388 0.1U_0402_16V7KC388 0.1U_0402_16V7K1 2
R349 10K_0402_5%R349 10K_0402_5%1 2
C4
59
18
P_
04
02
_5
0V
8J
C4
59
18
P_
04
02
_5
0V
8J
1
2
CC60
10U_0603_6.3V6M
CC60
10U_0603_6.3V6M
1
2
C4
63
18
P_
04
02
_5
0V
8J
C4
63
18
P_
04
02
_5
0V
8J
1
2
R5740_0805_5%
R5740_0805_5%
1 2
D47
YSLC05CH_SOT23-3
@D47
YSLC05CH_SOT23-3
@
12
3
CC74
0.1
U_
04
02
_1
6V
4Z
CC74
0.1
U_
04
02
_1
6V
4Z
1
2
C387 0.1U_0402_16V7KC387 0.1U_0402_16V7K1 2
CC62
10U_0603_6.3V6M
CC62
10U_0603_6.3V6M
1
2
C4
66
10
P_
04
02
_5
0V
8J
@
C4
66
10
P_
04
02
_5
0V
8J
@
1
2
C468
0.1
U_
04
02
_1
0V
6K
C468
0.1
U_
04
02
_1
0V
6K
1
2
R563
200K_0402_5%
R563
200K_0402_5%
12
CC83
1U
_0
40
2_
6.3
V6
K
CC83
1U
_0
40
2_
6.3
V6
K
1
2
C382 0.1U_0402_16V7KC382 0.1U_0402_16V7K1 2
CC65
0.1U_0402_16V4Z
CC65
0.1U_0402_16V4Z
1
2
R535
10K_0402_5%
R535
10K_0402_5%
12
Q7
6A
2N
70
02
KD
W_
SO
T3
63
-6Q
76
A2
N7
00
2K
DW
_S
OT
36
3-6
61
2
CC63
0.1U_0402_16V4Z
CC63
0.1U_0402_16V4Z
1
2
C3
67
0.1
U_
04
02
_1
6V
4Z
C3
67
0.1
U_
04
02
_1
6V
4Z
1
2
C381 0.1U_0402_16V7KC381 0.1U_0402_16V7K1 2
R501 10K_0402_5%R501 10K_0402_5%1 2
D49
YSLC05CH_SOT23-3
@D49
YSLC05CH_SOT23-3
@
12
3
G
G
JVGA2
C-H_13-12201572CP
CONN@
G
G
JVGA2
C-H_13-12201572CP
CONN@
611
17
1228
1339
144
1015
5
1617
CC72
0.1
U_
04
02
_1
6V
4Z
CC72
0.1
U_
04
02
_1
6V
4Z
1
2
R579 0_0402_5%R579 0_0402_5%1 2
C3
68
1U
_0
40
2_
6.3
V4
Z
C3
68
1U
_0
40
2_
6.3
V4
Z
1
2
R564 200K_0402_5%R564 200K_0402_5%1 2
C3
70
0.1
U_
04
02
_1
6V
4Z
C3
70
0.1
U_
04
02
_1
6V
4Z
1
2
L33 39NH_CS0805-39NJ-S_5%L33 39NH_CS0805-39NJ-S_5%1 2
R505
10K_0402_5%
R505
10K_0402_5%
12
R462
10K_0402_5%
R462
10K_0402_5%
12
R504
100K_0402_5%
R504
100K_0402_5%
12
L31 110NH_CS0805-R11J-S_5%L31 110NH_CS0805-R11J-S_5%1 2
R576 0_0805_5%R576 0_0805_5%1 2
C4
64
18
P_
04
02
_5
0V
8J
C4
64
18
P_
04
02
_5
0V
8J
1
2
CC64
0.1U_0402_16V4Z
CC64
0.1U_0402_16V4Z
1
2
D46
RB491D_SOT23-3
D46
RB491D_SOT23-3
21
3
C4
67
10
P_
04
02
_5
0V
8J
@
C4
67
10
P_
04
02
_5
0V
8J
@
1
2
RP19
150_0804_8P4R_5%
RP19
150_0804_8P4R_5%
18
27
36
45
CC66
0.1U_0402_16V4Z
CC66
0.1U_0402_16V4Z
1
2
R387 33_0402_1%R387 33_0402_1%1 2
Q76B
2N
70
02
KD
W_
SO
T3
63
-6
Q76B
2N
70
02
KD
W_
SO
T3
63
-6
3
5
4
L29 110NH_CS0805-R11J-S_5%L29 110NH_CS0805-R11J-S_5%1 2
C4
62
18
P_
04
02
_5
0V
8J
C4
62
18
P_
04
02
_5
0V
8J
1
2
R578 0_0805_5%R578 0_0805_5%1 2
C384 0.1U_0402_16V7KC384 0.1U_0402_16V7K1 2
R348 10K_0402_5%R348 10K_0402_5%1 2 R385 33_0402_1%R385 33_0402_1%1 2
R577 0_0805_5%R577 0_0805_5%1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
07/06 Correct netname to follow GPIO table
07/10 Modify J3 footprint
07/12 Modify J3 pin define
07/16 Modify J3 pin define
07/20 Vendor's suggestion 07/20 Vendor's suggestion
07/20 Vendor's suggestion
09/03 Change U30 P/N
09/12 Modify J3 pin define
09/20 Delete R393, CC67, and connector U30.23 to PLT_RST#
11/01 Change Y3 to small package
11/01 Change U30 to AU9560-GBS-GR
11/05 Uninstall Y3, CV33, CV34
ICCInsertNEEPWP
SCardDataSCardclk
SSDASSCL
SCardC8SCardC6SCardFcb
SCardRst
XTAL_OUTXTAL_INPWRSV_SEL#
XTAL_OUT
XTAL_IN
SCardRstSCardclkSCardFcb
SCardC8
SCardC6SCardData
ICCInsertN
USBP7+[17]
PWRSV_SEL# [14]
USBP7-[17]
PLT_RST# [13,14,25,28,29,30,35,39,5]
+1.8VS_SM
+VCC_SM+3VS_SM
+VCC_SM
+5VS
+3VS_SM
+3VS_SM+5VS
+VCC_SM
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.5
Smart Card
C
37 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.5
Smart Card
C
37 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.5
Smart Card
C
37 56Thursday, December 20, 2012
2012/03/23 2011/06/29
Compal Electronics, Inc.
CC68
1U
_0402_6.3
V6K
CC68
1U
_0402_6.3
V6K
1
2
C263
0.1
U_0402_16V
7K
@
C263
0.1
U_0402_16V
7K
@
1
2
CV34 18P_0402_50V8J
@
CV34 18P_0402_50V8J
@
C261
0.1
U_0402_16V
7K
@
C261
0.1
U_0402_16V
7K
@
1
2
C254
0.1
U_0402_16V
7K
C254
0.1
U_0402_16V
7K
1
2
CV33 18P_0402_50V8J@
CV33 18P_0402_50V8J@
C260
0.1
U_0402_16V
7K
C260
0.1
U_0402_16V
7K
1
2
CC69
1U
_0402_6.3
V6K
CC69
1U
_0402_6.3
V6K
1
2
U30
AU9560-GBS-GR_SSOP28
U30
AU9560-GBS-GR_SSOP28
SCard0C81
SCard0C62
SCard0Fcb3
SMIO_5VPWR4
SCard0Rst5
SCard0Clk6
SCard0Data7
DM8
DP9
AV3310
SCPWR011
5VGND12
5VInput13
V33OUT14
V18OUT15VDD16VDDP17VDDH18ICCInsertN19P1(6)20EEPCLK21EEPDATA22RESET23LEDPWR24LEDCRD25PWRSV_SEL26XI27XO28
C253
0.1
U_0402_16V
7K
C253
0.1
U_0402_16V
7K
1
2
T93 PAD~D @T93 PAD~D @
C258
1U
_0402_6.3
V6K
C258
1U
_0402_6.3
V6K
1
2
Y3
12MHZ_12PF_5YEA12000122IFA2Q3
@Y3
12MHZ_12PF_5YEA12000122IFA2Q3
@
34
21
C255
1U
_0402_6.3
V6K
C255
1U
_0402_6.3
V6K
1
2
C2520.1U_0402_16V7K
C2520.1U_0402_16V7K
1
2
R3914.7K_0402_5%R3914.7K_0402_5%
12
T94 PAD~D @T94 PAD~D @
C264
0.1
U_0402_16V
7K
@
C264
0.1
U_0402_16V
7K
@
1
2
R395 0_0402_5%R395 0_0402_5%12
C265
0.1
U_0402_16V
7K
@
C265
0.1
U_0402_16V
7K
@
1
2
C259
0.1
U_0402_16V
7K
C259
0.1
U_0402_16V
7K
1
2
T95 PAD~D @T95 PAD~D @
R396 470_0402_5%R396 470_0402_5%1 2
C257
0.1
U_0402_16V
7K
C257
0.1
U_0402_16V
7K
1
2
C256
0.1
U_0402_16V
7K
C256
0.1
U_0402_16V
7K
1
2
J3
ACES_51524-0100N-001CONN@
J3
ACES_51524-0100N-001CONN@
1122334455667788991010
GND11GND12
RH2251M_0402_5%
@ RH2251M_0402_5%
@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
TP/B Conn
KB backlight ConnStick Point CONN
Power Board Conn
07/09 Change by follow spec
07/09 Change by follow spec
07/12 Modify KB connector pin define.
07/16 Change P/N for ESD's request
07/20 Change P/N for ESD's request
07/20 Modify KB connector pin define.
07/24 Add for EMI request
08/07 Change JKB1 footprint
08/10 Modify JTP1 pin define.
09/12 Modify JPWR1 connector pin define.
09/12 Change JKB1 footprint09/12 Modify JTP1 pin define and footprint
09/12 Delete JTP2 connector
09/13 Change JKB1 pin define,
09/12 Modify JPWR1 connector footprint and pin define.
09/26 Modify JP9 pin define to follow ME request
09/27 Change R408 to 200k
10/11 Install D32
10/26 Modify JPWR1 connector footprint and pin define.
10/31 Change JKB1 footprint and pin define,
11/01 Add R626
11/05 Modify JKB1 pin define to follow ME request.
ON/OFFBTN_KBC#
KSO10KSO11KSO12KSO13
KSI7
KSO5KSO6KSO7
KSI6
KSO8KSO9
KSI5
KSO2KSO3KSO4
KSI3
KSO0KSO1
KSI1KSI2
KSI0
KSI4
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6KSI_D_0
KSI_D_1
KSI_D_2
KSI_D_3
KSI_D_4
KSI_D_5
KSI_D_8
KSI_D_9
KSI_D_10
KSI_D_11
KSI_D_12
KSI_D_13
SP_LEFTSP_MIDSP_RIGHT
TP_DATA
KSI_D_14
KSI_D_6
KSO12
KSI_D_13KSI_D_9
KSI_D_6
KSI_D_14
KSI_D_3
KSO0KSO11KSO2
KSO7KSO10KSI_D_5
KSI_D_12KSI_D_0KSI_D_2
KSO5
KSO8
KSI_D_11KSI7
KSI_D_4KSI_D_10KSI_D_8
KSO13KSO9
KSO3
KSO1KSO6KSO4
KSI_D_1
TP_CLK
DDR_XDP_WAN_SMBCLKDDR_XDP_WAN_SMBDAT
SP_MIDSP_RIGHT
SP_LEFT
+3VDS
8051TX_STBYLED#
+5VDS
ON/OFFBTN_KBC#
LID_SW#
KSO13
KSO9
KSI_D_11
KSI7
KSI_D_5
KSO10
KSO7
KSO8
KSI_D_3
KSI_D_2
KSI_D_0
KSI_D_12
KSI_D_14
KSO2
KSO11
KSO12
KSI_D_9
KSI_D_13
KSI_D_6
KSO1
KSO6
KSO4
KSO3
KSI_D_1
KSI_D_4
KSI_D_10
KSI_D_8
KSO5
KSO0
KSI[0..7][30]
KSO[0..13][30]
KBD_PWM_LED [30]
KSI_D_0 [39]
KSI_D_1 [39]
KBL_DET# [18]
SP_CLK[30]SP_DATA[30]
TP_DATA[30]TP_CLK[30]
DDR_XDP_WAN_SMBCLK[11,12,13,16,28,5]DDR_XDP_WAN_SMBDAT[11,12,13,16,28,5]
LID_SW#[22,30,39]8051TX_STBYLED#[30,33,39]
ON/OFFBTN_KBC#[30,33]
REC_MUTE_CTRL_KB[26]8051RX_CAPLED#[30]
8051_RECOVER#/_NUM_LOCK_LED#[30]
+3VS
+3VS
+5VS
+5VS_KBL
+5VDS
+5VS
+5VDS+3VDS+3VDS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.5
KB/TP/LED
Custom
38 56Thursday, December 20, 2012
2012/03/23 2011/11/02
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.5
KB/TP/LED
Custom
38 56Thursday, December 20, 2012
2012/03/23 2011/11/02
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.5
KB/TP/LED
Custom
38 56Thursday, December 20, 2012
2012/03/23 2011/11/02
Compal Electronics, Inc.
R626 0_0402_5%R626 0_0402_5%1 2
JTP1
CONN@
E-T_6900K-Q10N-00R
JTP1
CONN@
E-T_6900K-Q10N-00R
11
22
33
44
55
66
77
88
99
1010
1111
1212
1313
1414
1515
1616
1717
1818
1919
2020
R407
100K_0402_5%
R407
100K_0402_5%
12
Q10A
2N
7002K
DW
_S
OT
363-6
Q10A
2N
7002K
DW
_S
OT
363-6
61
2
C421 100P_0402_50V8J@C421 100P_0402_50V8J@1 2
C427 100P_0402_50V8J@C427 100P_0402_50V8J@1 2
C422 100P_0402_50V8J@C422 100P_0402_50V8J@1 2
C270
0.1U_0402_16V7K
C270
0.1U_0402_16V7K1
2
C425 100P_0402_50V8J@C425 100P_0402_50V8J@1 2
C423 100P_0402_50V8J@C423 100P_0402_50V8J@1 2
C296
0.1U_0402_16V7K
C296
0.1U_0402_16V7K
1
2
C436 100P_0402_50V8J@C436 100P_0402_50V8J@1 2
JPWR1
ACES_85203-0602N-10CONN@
JPWR1
ACES_85203-0602N-10CONN@
1212
1111 10
109
9 88
77 6
65
5 44
33 2
21
1
C298
100P
_0402_50V
8J
C298
100P
_0402_50V
8J
1
2
C433 100P_0402_50V8J@C433 100P_0402_50V8J@1 2
C439 100P_0402_50V8J@C439 100P_0402_50V8J@1 2
D32 YSDA0502C C/A SOT-23D32 YSDA0502C C/A SOT-23
22
33
11
C437 100P_0402_50V8J@C437 100P_0402_50V8J@1 2
C297100P
_0402_50V
8J
C297100P
_0402_50V
8J
1
2
C444 100P_0402_50V8J@C444 100P_0402_50V8J@1 2
R400 360_0402_5%R400 360_0402_5%1 2
C447 100P_0402_50V8J@C447 100P_0402_50V8J@1 2
C445 100P_0402_50V8J@C445 100P_0402_50V8J@1 2
C420 100P_0402_50V8J@C420 100P_0402_50V8J@1 2
D34
DAP202UGT106_SOT323-3
D34
DAP202UGT106_SOT323-3
2
31
D35
DAP202UGT106_SOT323-3
D35
DAP202UGT106_SOT323-3
2
31
C295
0.0
47U
_0402_16V
7K
@
C295
0.0
47U
_0402_16V
7K
@
1
2
D
G
S
Q47
AO3413L_SOT23-3
D
G
S
Q47
AO3413L_SOT23-3
1
2
3
JP13
ACES_50554-0080N-001CONN@
JP13
ACES_50554-0080N-001CONN@
11 2 22 33 4 44 55 6 66 77 8 88
G19G210
G412
G311 JP9
CONN@ACES_50611-0040N-001
JP9
CONN@ACES_50611-0040N-001
11
22 3
34
4 55
66 7
78
8
R408 200K_0402_5%R408 200K_0402_5%1 2
D33
DAP202UGT106_SOT323-3
D33
DAP202UGT106_SOT323-3
2
31
D36
DAP202UGT106_SOT323-3
D36
DAP202UGT106_SOT323-3
2
31
C440 100P_0402_50V8J@C440 100P_0402_50V8J@1 2
C428 100P_0402_50V8J@C428 100P_0402_50V8J@1 2
C441 100P_0402_50V8J@C441 100P_0402_50V8J@1 2
C426 100P_0402_50V8J@C426 100P_0402_50V8J@1 2
D37
DAP202UGT106_SOT323-3
D37
DAP202UGT106_SOT323-3
2
31
C429 100P_0402_50V8J@C429 100P_0402_50V8J@1 2
C424 100P_0402_50V8J@C424 100P_0402_50V8J@1 2
C442 100P_0402_50V8J@C442 100P_0402_50V8J@1 2
C430 100P_0402_50V8J@C430 100P_0402_50V8J@1 2
C443 100P_0402_50V8J@C443 100P_0402_50V8J@1 2
C434 100P_0402_50V8J@C434 100P_0402_50V8J@1 2
D38
DAP202UGT106_SOT323-3
D38
DAP202UGT106_SOT323-3
2
31
C431 100P_0402_50V8J@C431 100P_0402_50V8J@1 2
C432 100P_0402_50V8J@C432 100P_0402_50V8J@1 2
C438 100P_0402_50V8J@C438 100P_0402_50V8J@1 2
C435 100P_0402_50V8J@C435 100P_0402_50V8J@1 2
C448 100P_0402_50V8J@C448 100P_0402_50V8J@1 2
D39
DAP202UGT106_SOT323-3
D39
DAP202UGT106_SOT323-3
2
31
C446 100P_0402_50V8J@C446 100P_0402_50V8J@1 2
JKB1
HB_A823461-SBVR02CONN@
JKB1
HB_A823461-SBVR02CONN@
11
22
33
44
55
66
77
88
99
1010
1111
1212
1313
1414
1515
1616
1717
1818
1919
2020
2121
2323
2525
2727
2929
3131
3333
2222
2424
2626
2828
3030
3232
3434
3636
3838
4040
4242
4444
4646
4848
5050
5252
3535
3737
3939
4141
4343
4545
4747
4949
5151
5353
5454
5656
5858
6060
5555
5757
5959
6262
6464
6666
6868
6161
6363
6565
6767
GND70
GND69
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Card Reader Board
VGA+Function Board
USB20
Thunderbolt
NFC CONN07/06 Add NFC connector
07/09 Modify Pin define
07/10 Modify JTB1 footprint and pin define.
07/10 Modify JUB1 footprint and pin define.
7/13 Modify pin net name
07/17 Modify JTB1 pin define.
07/18 Remove B+ and change to HDD_HALTLED07/18 Add PWR_GD signal
07/19 Modify pin define for better return path
07/19 Modify pin define for better return path
07/24 Modify JUB1 pin define.
07/30 Modify JCR1 pin define and footprint.
07/30 Modify Pin define.
07/31 Change JTB1.95 to +3VDS
08/01 JCR1.35 connection to PCH_PCIE_WAKE#
08/07 Change JCR1 footprint
08/07 Modify JNFC1 footprint and pin define
08/08 Change JCR1 pin define
08/08 Modify JNFC1 pin define
08/10 Change JCR1.21 connection to +3VDS
9/07 Remove JVGA1 BTB connector
Function Board
9/07 Add JFUN1 connector
9/12 Modify JFUN1 pin define and footprint
09/13 Modify JTB1 footprint
09/19 Add R602, and noninstall.
09/21 Delete R557, Non-install R358, C374
09/26 Modify JFUN1 pin define to follow ME request
10/16 Change JTB1.91 netname to iSCT_LED#
10/16 Delete R602, connection JCR1.5 to +5VDS
08/10 Change JCR1.21 connection to +3VS
10/23 Change netnameto TBT_RR_GPIO#
10/23 Add Q80 for iSCT_LED# circuit.
10/24 Change Q80 tosingle MOS, Add R623, Q81
PLT_RST#
NFC_SEL_R
EN_P1V5
EN_P1V5
NFC_SEL_R
NFC_SW
EN_P1V5
KSI_D_0KSI_D_1KSO17MUTE_LED_CNTRWL/BT_LED#LID_SW#
WL/BT_LED#
iSCT_LED#
USB3RP5[17]USB3RN5[17]
HP_SENSE#[27]
PCIE_PRX_DTX_P8 [17]PCIE_PRX_DTX_N8 [17]
CR_CLK_REQ# [15]
EXT_MIC_L2 [27]
HP_OUT_R [26]
HP_OUT_L [26]
NFC_RST# [16]NFC_3S_SMBDAT[16] NFC_3S_SMBCLK [16]NFC_INT[18]
NFC_RX [30]NFC_TX[30]
USBP9+[17]USBP9-[17]
USB3TP6[17]USB3TN6[17]
USB3RP6[17]USB3RN6[17]
USBP5+[17]USBP5-[17]
MB_DPA_TXP0[36]MB_DPA_TXN0[36]
MB_DPA_AUX#[36]MB_DPA_AUX[36]
MB_DPA_TXN1[36]MB_DPA_TXP1[36]
MB_DPA_TXP2[36]MB_DPA_TXN2[36]
MB_DPA_TXN3[36]MB_DPA_TXP3[36]
PCIE_PRX_EXPTX_N5[17]PCIE_PRX_EXPTX_P5[17]
PCIE_PTX_EXPRX_P5[17]PCIE_PTX_EXPRX_N5[17]
CLK_PCIE_EXP#[15]CLK_PCIE_EXP[15]
CLKREQ_EXP#[15]
USBP6+[17]USBP6-[17]
MB_DP_HPD[36]
PLT_RST#[13,14,25,28,29,30,35,37,5]8051TX_STBYLED#[30,33,38]AMBER_BATLED#[30]BAT_GRNLED#[13,30]TBT_RR_GPIO#[14]
TB_HOT_PLUG#[17]
CLK_TB_REFCLK [15]CLK_TB_REFCLK# [15]
MXM_TB_AUX# [35]MXM_TB_AUX [35]
MXM_TB_LANE_P0 [35]MXM_TB_LANE_N0 [35]
MXM_TB_LANE_N2 [35]MXM_TB_LANE_P2 [35]
MXM_TB_LANE_N1 [35]MXM_TB_LANE_P1 [35]
MXM_TB_LANE_N3 [35]MXM_TB_LANE_P3 [35]
PCIE_PRX_DTX_N3 [17]PCIE_PRX_DTX_P3 [17]
PCIE_PRX_DTX_P4 [17]PCIE_PRX_DTX_N4 [17]
PCIE_PTX_C_DRX_N3 [17]PCIE_PTX_C_DRX_P3 [17]
PCIE_PTX_C_DRX_N4 [17]PCIE_PTX_C_DRX_P4 [17]
PCIE_PRX_DTX_P1 [17]PCIE_PRX_DTX_N1 [17]
PCIE_PTX_C_DRX_P1 [17]PCIE_PTX_C_DRX_N1 [17]
PCIE_PRX_DTX_N2 [17]PCIE_PRX_DTX_P2 [17]
PCIE_PTX_C_DRX_P2 [17]PCIE_PTX_C_DRX_N2 [17]
TB_HPD [35]EN_P1V5 [30,33,40,44,45]CPPWR_EN [30]TB_CLKREQ# [15]
HDD_HALTLED [13]
USBP4+[17]USBP4-[17]
USB3TP5[17]USB3TN5[17] PCIE_PTX_C_DRX_P8 [17]
PCIE_PTX_C_DRX_N8 [17]
CLK_PCIE_CR# [15]CLK_PCIE_CR [15]
UIM_VPP[25]
KSI_D_0[38]KSI_D_1[38]KSO17[30]MUTE_LED_CNTR[26]WL/BT_LED#[25]
LID_SW#[22,30,38]
SATA_ACT#[13,33]
iSCT_LED#[30]
+5VDS +3VS
+3VS
+3VS
+5VDS
+5VDS +5VDS
+1.5VS
+3VDS +3VDS
+3V_PCH
+3VS
+3VDS
+3VS
+5VS
+5VDS
+1.5VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
I/O CONN
39 56Thursday, December 20, 2012
2012/03/23 2010/03/31Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
I/O CONN
39 56Thursday, December 20, 2012
2012/03/23 2010/03/31Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.5
I/O CONN
39 56Thursday, December 20, 2012
2012/03/23 2010/03/31Compal Electronics, Inc.
C339
0.01U_0402_16V7K_X7R
C339
0.01U_0402_16V7K_X7R
1
2
R556
10K_0402_5%@R556
10K_0402_5%@
12
R558 0_0402_5%@
R558 0_0402_5%@1 2
R538100K_0402_5%
R538100K_0402_5%
12
R623 1K_0402_5%R623 1K_0402_5%1 2
G
DS
Q81BSS138W-7-F_SOT323-3
G
DS
Q81BSS138W-7-F_SOT323-3
2
13
G
DS
Q802N7002KW_SOT323-3
G
DS
Q802N7002KW_SOT323-3
2
13
JFUN1
CONN@E-T_6900K-Q10N-00R
JFUN1
CONN@E-T_6900K-Q10N-00R
11
22 3
34
4 55
66 7
78
8 99
1010 11
1112
12 1313
1414 15
1516
16 1717
1818 19
1920
20
C374
0.1U_0402_16V4Z@
C374
0.1U_0402_16V4Z@
1
2
JCR1
ACES_50103-04071-001CONN@
JCR1
ACES_50103-04071-001CONN@
11 33 55 77 99 11
11 1313 1515 1717 1919 2121 2323 2525 2727 2929 3131 3333 3535 3737 3939
224466881010121214141616181820202222242426262828303032323434363638384040
GND41
GND42GND
43GND
44GND45
GND46
JTB1
CONN@
ACES_50019-10001-001
JTB1
CONN@
ACES_50019-10001-001
11
33
55
77
99
1111
1313
1515
1717
1919
2121
2323
2525
2727
2929
3131
3333
3535
3737
3939
4141
4343
4545
4747
4949
5151
5353
5555
5757
5959
6161
6363
6565
6767
6969
7171
7373
7575
7777
7979
8181
8383
8585
8787
8989
9191
9393
9595
9797
9999
22
44
66
88
1010
1212
1414
1616
1818
2020
2222
2424
2626
2828
3030
3232
3434
3636
3838
4040
4242
4444
4646
4848
5050
5252
5454
5656
5858
6060
6262
6464
6666
6868
7070
7272
7474
7676
7878
8080
8282
8484
8686
8888
9090
9292
9494
9696
9898
100100
GND1101
GND2102
JNFC1
CONN@ACES_50559-01201-001
JNFC1
CONN@ACES_50559-01201-001
11
22 3
34
4 55
66 7
78
8 99
1010 11
1112
12
GND13GND15
GND14 GND16
JUB1
ACES_50611-0120N-001CONN@
JUB1
ACES_50611-0120N-001CONN@
11
22
33
44
55
66
77
88
99
1010
1111
1212
1313
1414
1515
1616
1717
1818
1919
2020
2121
2323 22
22
2424
R358
10K_0402_5%@R358
10K_0402_5%@
12
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
USB3.0 Connector
2.5A
W=100milsW=100mils
TO USB connector TX
TO USB connector RX
Equalizer control and program for channel A3.3V tolerant. Internally pulled down at~150K次[A_EQ1, A_EQ0] == LL: adaptive EQ enable LH: program EQ at 3.5dB HL: program EQ at 6dB HH: program EQ at 10dB
Equalizer control and program for channel B3.3V tolerant. Internally pulled down at~150K次[B_EQ1, B_EQ0] == LL: adaptive EQ enable LH: program EQ at 3.5dB HL: program EQ at 6dB HH: program EQ at 10dB
Chip test mode enable. 3.3V tolerant. Internally pulled down at~150K次.TEST == L: Normal operation (default) H: Test mode enable
Programmable output pre-emphasis level setting for channel B3.3V tolerant. Internally pulled down at ~150K次[B_EQ1, B_EQ0] == LL: 3.5dB de-emphasis LH: No de-emphasis HL: 5dB de-emphasis HH: Reserved
Programmable output pre-emphasis level setting for channel A3.3V tolerant. Internally pulled down at ~150K次[A_EQ1, A_EQ0] == LL: 3.5dB de-emphasis LH: No de-emphasis HL: 5dB de-emphasis HH: Reserved
TO USB CONNECTOR
TO CPUFORM USB CONNECTOR
FORM CPU
USB Power Switch
VDD : 1.5V for PS8713AVDD : 3.3V for PS8713B
USB3.0 Repeater
LA-9241P
Folow ESD team recommeend change ESD diode D5 D6
20120713Add DC to DC interface
2012/8/3
change power switch to high active parts
20120803
9/07 Add USB3.0 repeater and connector
9/13 Modify JUSB1 footprint and pin define
9/17 Swap L35, L36, L37 for layout smoothly
09/24 Change power rail to +3VS
09/24 Change power rail to +3VS
09/24 Change power rail to +3VS
09/24 Change power rail to +3VS
09/24 Change power rail to +3VS
09/24 Delete Q79, Q80, C475, C477, C478, R588, R587.
09/26 Add C502
USB20_P1_RUSB20_N1_R
USB3RXDN2_R
USB3RXDP2_R
USB3_TP2_RE USB3TXDP2_R
USB3TXDN2_R
USB20_N1_R
USB3_TN2_RE
USB20_P1_R
USB3_RN2_RE
USB3_RP2_RE
USB3_C_TP2
USB3_RN2_RE
USB3_C_TN2_REUSB3_C_TP2_RE
USB3_C_RN2
USB3_TP2_REUSB3_TN2_RE
TESTTEST
A_EQ0
A_EQ1
B_EQ0
B_EQ1
A_DE0
A_DE1
B_DE0
B_DE1
A_EQ1A_DE0A_EQ0A_DE1
B_EQ1B_DE0B_EQ0B_DE1
USB3_RP2_RE USB3_C_RP2
EN_P1V5
USB3RXDP2_R
USB3RXDN2_R USB3RXDN2_R
USB3RXDP2_R
USB3TXDN2_R
USB3TXDP2_R
USB3TXDN2_R
USB3TXDP2_R
USB3_C_TN2
USB20_N1_RUSB20_P1_R
USB3RXDP2_RUSB3RXDN2_R
USB3TXDP2_RUSB3TXDN2_R
USBP1-[17]
USB3RN2 [17]USB3RP2 [17]
USB3TP2[17]USB3TN2[17]
USBP1+[17]
EN_P1V5[30,33,39,44,45]
+5VDS+USB_CS
+USB_CS
+3VS
+3VS
+3VS+3VS
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.5
USB3.0 CONN/Repeater
Custom
40 56Thursday, December 20, 2012
2012/05/11 2013/05/11
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.5
USB3.0 CONN/Repeater
Custom
40 56Thursday, December 20, 2012
2012/05/11 2013/05/11
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.5
USB3.0 CONN/Repeater
Custom
40 56Thursday, December 20, 2012
2012/05/11 2013/05/11
Compal Electronics, Inc.
R598
4.9
9K
_0402_1%
R598
4.9
9K
_0402_1%
12
R597 4.7K_0402_5%@R597 4.7K_0402_5%@1 2
L35
WCM-2012-900T_4P
L35
WCM-2012-900T_4P
11
44
33
22
C481
680P
_0603_50V
7K
C481
680P
_0603_50V
7K
12
C469
0.1
U_0402_25V
6K
C469
0.1
U_0402_25V
6K1
2
C483
0.1
U_0402_16V
4Z
C483
0.1
U_0402_16V
4Z
1
2
C476
1000P
_0402_50V
7K
C476
1000P
_0402_50V
7K
1
2
R584 0_0402_5%@R584 0_0402_5%@1 2
R582 0_0402_5%@R582 0_0402_5%@1 2
R594 4.7K_0402_5%@R594 4.7K_0402_5%@1 2
C502
10U_0603_6.3V6M
C502
10U_0603_6.3V6M
1
2
U43
G547I1P81U_MSOP8
U43
G547I1P81U_MSOP8
FLG5VIN
3VOUT
6
GND1
EN4
VOUT7
VIN2 VOUT
8
C474 0.1U_0402_25V6KC474 0.1U_0402_25V6K1 2
JUSB1
CONN@LOTES_AUSB0041-P002A
JUSB1
CONN@LOTES_AUSB0041-P002A
SSTX-8
SSTX+9 GND
12
GND13
VBUS1
D+3 D-2
GND4
SSRX-5
SSRX+6
GND7 GND
10
GND11
D51
YSLC05CH_SOT23-3
@D51
YSLC05CH_SOT23-3
@
123
C482
0.0
1U
_0402_50V
7K
C482
0.0
1U
_0402_50V
7K
1
2
R586 0_0402_5%@R586 0_0402_5%@1 2
U44
PS8713BTQFN24GTR2_TQFN24_4X4
U44
PS8713BTQFN24GTR2_TQFN24_4X4
VDD1
A_EQ1/SDA_CTL15
A_DE0/SCL_CTL16
TEST14
A_INp19
VDD13
GPAD25
A_INn20
GND10
I2C_EN24 GND
21
A_DE1/NC18 A_EQ0/NC17
REXT7 PD#5
B_DE1/NC6
A_OUTn11A_OUTp12
B_DE0/I2C_ADDR03
B_EQ0/NC2
B_INn8 B_INp9
B_OUTp22
B_OUTn23
B_EQ1/I2C_ADDR14
C484
0.1
U_0402_16V
4Z
C484
0.1
U_0402_16V
4Z
1
2
R595 4.7K_0402_5%@R595 4.7K_0402_5%@1 2
L37
WCM-2012-900T_4P
L37
WCM-2012-900T_4P
11
44
33
22
D50
TVWDF1004AD0_DFN9
D50
TVWDF1004AD0_DFN9
4
5
1
6
2
7
9
8
3
C475
1000P
_0402_50V
7K
C475
1000P
_0402_50V
7K
1
2
R581 0_0402_5%@R581 0_0402_5%@1 2
C470 0.1U_0402_25V6KC470 0.1U_0402_25V6K1 2C471 0.1U_0402_25V6KC471 0.1U_0402_25V6K1 2
+
C479
150U
_B
2_6.3
VM
_R
45M
+
C479
150U
_B
2_6.3
VM
_R
45M
1
2
R596 4.7K_0402_5%@R596 4.7K_0402_5%@1 2
C473 0.1U_0402_25V6KC473 0.1U_0402_25V6K1 2
C480
680P
_0603_50V
7K
C480
680P
_0603_50V
7K
12
R589 4.7K_0402_5%@R589 4.7K_0402_5%@1 2
R590 4.7K_0402_5%@R590 4.7K_0402_5%@1 2
R583 0_0402_5%@R583 0_0402_5%@1 2
R593 4.7K_0402_5%@R593 4.7K_0402_5%@1 2
C472 0.1U_0402_25V6KC472 0.1U_0402_25V6K1 2C486 0.1U_0402_25V6KC486 0.1U_0402_25V6K1 2
R585 0_0402_5%@R585 0_0402_5%@1 2
L36
WCM-2012-900T_4P
L36
WCM-2012-900T_4P
11
44
33
22
R592 4.7K_0402_5%
@
R592 4.7K_0402_5%
@
1 2
R591 4.7K_0402_5%@R591 4.7K_0402_5%@1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BQ24736
+3VDSPJumper
+3VDS
+5VDS+5VDSP
EN
+1.35V+1.5V
+0.675VS+0.75VS
+0.675VSP+0.75VSP
EN
+1.35VP+1.5VPRT8207M
+1.05VM+1.05VMP
EN
TPS51212
TPS51631
EN
+CPU_CORE
SY8032
EN
+1.5VSP +1.5VS
ADP_EN
ACFET RBFET
ACDRV
DC IN
MainBATT
2ndBATT
BatterySelector
RT8243AZQW
RBFET
B+
BATT
ACDRV
Jumper
Jumper
Jumper
Jumper
Charger
+3VS
SLP_S3#
EN_P1V5
B++
SIO_SLP_A#
VR_ON
+3VS
7/19
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
7/11
7/11
PJP2 Zero force Footprint:
FOX_BP0208C-B24B1-9HQ_8P-T
SD028680380
SD028300080
SB00000SA00
SB00000SA00
I2C_MAIN_DAT-1ADPIN I2C_MAIN_CLK-1
I2C_BAY_DAT-1I2C_BAY_CLK-1
I2C_MAIN_CLK [30,43]
I2C_MAIN_DAT [30,43]
MAIN_BAT_DET#[30]
I2C_BAY_DAT [30]
I2C_BAY_CLK [30]TRAVEL_BAT_DET#[30]
VINVMB_A
VMB_B
BATT_A
BATT_B
ADP_SIGNAL
VIN
VIN
+3VDS
+3VDS
+3VDS
+3VDS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date 2014/12/31
15W
2012/04/03
Compal Electronics, Inc.
5242
0.3
DC Conn/BATT Conn
Thursday, December 20, 2012
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date 2014/12/31
15W
2012/04/03
Compal Electronics, Inc.
5242
0.3
DC Conn/BATT Conn
Thursday, December 20, 2012
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date 2014/12/31
15W
2012/04/03
Compal Electronics, Inc.
5242
0.3
DC Conn/BATT Conn
Thursday, December 20, 2012
PQ1A
ME
2N
7002D
KW
-G 2
N S
OT
363-6PQ1A
ME
2N
7002D
KW
-G 2
N S
OT
363-6
61
2
PL7HCB2012KF-121T50_0805
PL7HCB2012KF-121T50_0805
1 2
PC
14
100P
_0402_50V
8J
PC
14
100P
_0402_50V
8J
12
PR
12
30K
_0402_5%
PR
12
30K
_0402_5%1
2
PR
5100_0402_5%
PR
5100_0402_5%1
2
PJP1
ACES_59012-0100N-002@
PJP1
ACES_59012-0100N-002@
22
66
88
1010
44
11
33
55
77
99
PL2HCB2012KF-121T50_0805
PL2HCB2012KF-121T50_0805
1 2
PR
8100_0402_5%
PR
8100_0402_5%1
2
PC20.1U_0603_50V7KPC20.1U_0603_50V7K
12
PC130.01U_0402_50V7KPC130.01U_0402_50V7K
12
PD11AZC099-04S.R7G SOT23 ESDPD11AZC099-04S.R7G SOT23 ESD
V I/O1
V I/O3
V I/O6
V I/O4
Ground2
V BUS5
PL3HCB2012KF-121T50_0805
PL3HCB2012KF-121T50_0805
1 2
PR
11
10K
_0402_5%
PR
11
10K
_0402_5%1
2
PC
9100P
_0402_50V
8J
PC
9100P
_0402_50V
8J
12
PR
15
300_0402_5%
PR
15
300_0402_5%1
2
PC
15
100P
_0402_50V
8J
PC
15
100P
_0402_50V
8J
12
PQ2B
ME
2N
7002D
KW
-G 2
N S
OT
363-6
PQ2B
ME
2N
7002D
KW
-G 2
N S
OT
363-6
34
5
PC
41000P
_0402_50V
7K
PC
41000P
_0402_50V
7K
12
PC
8100P
_0402_50V
8J
PC
8100P
_0402_50V
8J
12
PD10L30ESD24VC3-2_SOT23-3PD10L30ESD24VC3-2_SOT23-3
12
3
PL6HCB2012KF-121T50_0805
PL6HCB2012KF-121T50_0805
1 2
PL5HCB2012KF-121T50_0805
PL5HCB2012KF-121T50_0805
1 2
PR
13
3.9
K_0402_5%
PR
13
3.9
K_0402_5%1
2PC10100P_0402_50V8JPC10100P_0402_50V8J
12
PD1L30ESD24VC3-2_SOT23-3PD1L30ESD24VC3-2_SOT23-3
12 3
PL1HCB2012KF-121T50_0805
PL1HCB2012KF-121T50_0805
1 2
PR14 300K_0402_5%PR14 300K_0402_5%1 2
PC
1100P
_0402_50V
8J
PC
1100P
_0402_50V
8J
12
PQ2A
ME
2N
7002D
KW
-G 2
N S
OT
363-6
PQ2A
ME
2N
7002D
KW
-G 2
N S
OT
363-6
61
2
PC31000P_0402_50V7KPC31000P_0402_50V7K
12
PR
4100_0402_5%
PR
4100_0402_5%1
2
PR115K_0402_5%
@ PR115K_0402_5%
@
12
PJP2FOXCONN BP0208C-B24B1-9H 8P BATT@PJP2FOXCONN BP0208C-B24B1-9H 8P BATT@
11
33
44
55
66
77
22
88
PC121000P_0402_50V7KPC121000P_0402_50V7K
12
PC70.01U_0402_50V7KPC70.01U_0402_50V7K
12
PL4HCB2012KF-121T50_0805
PL4HCB2012KF-121T50_0805
1 2
PD12L30ESD24VC3-2_SOT23-3PD12L30ESD24VC3-2_SOT23-3
12
3
PR
16
100K
_0402_5%
PR
16
100K
_0402_5%1
2
PC
5100P
_0402_50V
8J
PC
5100P
_0402_50V
8J
12
PJP3
CONN@
FOX_BR0208C-Z71H1-9H
PJP3
CONN@
FOX_BR0208C-Z71H1-9H
11
33
44
55
66
88
22
77
PR
10
680K
_0402_5%
PR
10
680K
_0402_5%1
2
PQ1B
ME
2N
7002D
KW
-G 2
N S
OT
363-6PQ1B
ME
2N
7002D
KW
-G 2
N S
OT
363-6
34
5
PR
71K
_0402_5%
PR
71K
_0402_5%1
2
PC16100P_0402_50V8JPC16100P_0402_50V8J
12
PD13AZC099-04S.R7G SOT23 ESDPD13AZC099-04S.R7G SOT23 ESD
V I/O1
V I/O3
V I/O6
V I/O4
Ground2
V BUS5
PC110.1U_0603_50V7KPC110.1U_0603_50V7K
12
PC
61000P
_0402_50V
7K
PC
61000P
_0402_50V
7K
12
PR
9100_0402_5%
PR
9100_0402_5%1
2
PR
31K
_0402_5%
PR
31K
_0402_5%1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
4/11
4/12
4/12
for RF request, 8/6
for RF request, 8/6
SB00000SA00
Remove 6 *2200pF MLCC for RF request, 11/6
SD034576380
CHG
CS
ON
1
CS
OP
1
SN
B_
CH
G
DH_CHG
DL
_C
HG
REGN_CHG
BST_CHG
LX_CHG
SR
P_
CH
G
SR
N_
CH
G
BST_CHG-1
AC
N_
CH
G
AC
P_
CH
G
ACFET_CHG
VCC_CHG
AC
DR
V_
CH
G
CM
SR
C_
CH
G
CH
RG
_A
DP
_D
ET
ICS
B+
ADP_EN [30]
CHRG_ADP_DET [30]
V_3.9K[50]
SRSET[50]
I2C_MAIN_CLK[30,42]
I2C_MAIN_DAT[30,42]
CURRENT_ADC [30]
VOLTAGE_ADC [30]
CHRG_RST [30]
BATT
P1
P2
P2 B+P1VIN
+3VDS
+3VDS
+5VS VIN
VIN
B+
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date 2014/12/31
15W
2012/04/03
Compal Electronics, Inc.
5243
0.3
CHARGER
Thursday, December 20, 2012
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date 2014/12/31
15W
2012/04/03
Compal Electronics, Inc.
5243
0.3
CHARGER
Thursday, December 20, 2012
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date 2014/12/31
15W
2012/04/03
Compal Electronics, Inc.
5243
0.3
CHARGER
Thursday, December 20, 2012
PC
14
08
2P
50
V J
NP
O 0
40
2
@
PC
14
08
2P
50
V J
NP
O 0
40
2
@
12 P
C1
45
82
P 5
0V
J N
PO
04
02
@
PC
14
58
2P
50
V J
NP
O 0
40
2
@
12
PQ105AO4409L 1P SO8PQ105AO4409L 1P SO8
3 65
78
2
4
1
PC
15
51
U_
06
03
_2
5V
6K
@
PC
15
51
U_
06
03
_2
5V
6K
@
12
PL1011UH_PCMB053T-1R0MS_7A_20%PL1011UH_PCMB053T-1R0MS_7A_20%1 2
PC1020.1U_0402_25V6
PC1020.1U_0402_25V6
1 2
PR116
1M_0402_5%
PR116
1M_0402_5%
12
PC120
1U_0603_25V6K
PC120
1U_0603_25V6K
12
PR10910_1206_1%PR10910_1206_1%
12
PR1100.02_1206_1%PR1100.02_1206_1%
1
3
4
2
PC
10
60
.1U
_0
40
2_
25
V6
PC
10
60
.1U
_0
40
2_
25
V6
12
PC
14
70
.1U
_0
40
2_
25
V6
@
PC
14
70
.1U
_0
40
2_
25
V6
@
12
PR113
22K_0402_1%
PR113
22K_0402_1%
12
PC
10
10
.1U
_0
40
2_
25
V6
PC
10
10
.1U
_0
40
2_
25
V6
12
PR
10
5
4.1
2K
_0
60
3_
1%
PR
10
5
4.1
2K
_0
60
3_
1%1
2
PC
12
51
00
P_
04
02
_5
0V
8J
PC
12
51
00
P_
04
02
_5
0V
8J
12
PR
10
12
20
K_
04
02
_5
%P
R1
01
22
0K
_0
40
2_
5%
12
PR12710_0402_1%PR12710_0402_1%1 2
PR119
20K_0402_1%
PR119
20K_0402_1%
12
PR125576K_0402_1%PR125576K_0402_1%1 2
PC
10
51
0U
_0
80
5_
25
V6
KP
C1
05
10
U_
08
05
_2
5V
6K
12
PC
11
30
.1U
_0
40
2_
25
V6
PC
11
30
.1U
_0
40
2_
25
V6
12
PC
14
46
.8P
_0
40
2_
50
V8
C
@
PC
14
46
.8P
_0
40
2_
50
V8
C
@
12P
C1
43
0.1
U_
04
02
_2
5V
6
@
PC
14
30
.1U
_0
40
2_
25
V6
@
12
PQ103AME2N7002DKW-G 2N SOT363-6PQ103AME2N7002DKW-G 2N SOT363-6
61
2
PC
11
72
20
0P
_0
40
2_
50
V7
KP
C1
17
22
00
P_
04
02
_5
0V
7K
12
PC
15
38
2P
50
V J
NP
O 0
40
2
@
PC
15
38
2P
50
V J
NP
O 0
40
2
@
12
PC
11
51
0U
_0
80
5_
25
V6
KP
C1
15
10
U_
08
05
_2
5V
6K
12
PR115
127K_0402_1%
PR115
127K_0402_1%
12PD104
LL4148_LL34-2PD104LL4148_LL34-2
12
PC
13
00
.1U
_0
40
2_
25
V6
@
PC
13
00
.1U
_0
40
2_
25
V6
@
12
PC
11
00
.1U
_0
40
2_
25
V6
PC
11
00
.1U
_0
40
2_
25
V6
12
PR11710K_0402_5%PR11710K_0402_5%1 2
PC
11
80
.01
U_
04
02
_5
0V
7K
PC
11
80
.01
U_
04
02
_5
0V
7K
12
PC
13
60
.1U
_0
40
2_
25
V6
@P
C1
36
0.1
U_
04
02
_2
5V
6@
12
PR1220_0402_5%PR1220_0402_5%1 2
PC
15
40
.1U
_0
40
2_
25
V6
@
PC
15
40
.1U
_0
40
2_
25
V6
@
12
PC
13
88
2P
50
V J
NP
O 0
40
2
@
PC
13
88
2P
50
V J
NP
O 0
40
2
@
12
PL1024.7U 20% VMPI0703AR-4R7M-Z01 5.5A
PL1024.7U 20% VMPI0703AR-4R7M-Z01 5.5A
1 2
PC
10
86
8P
_0
40
2_
50
V8
J
@
PC
10
86
8P
_0
40
2_
50
V8
J
@
12
PQ
10
6A
ON
74
06
L_
DF
N8
-5P
Q1
06
AO
N7
40
6L
_D
FN
8-5
4
5
123
PR114
18.2K_0402_1%
PR114
18.2K_0402_1%
12
PR118
10K_0402_1%
PR118
10K_0402_1%
12
PC
14
86
.8P
_0
40
2_
50
V8
C
@
PC
14
86
.8P
_0
40
2_
50
V8
C
@
12P
C1
39
82
P 5
0V
J N
PO
04
02
@
PC
13
98
2P
50
V J
NP
O 0
40
2
@
12
PD
10
1B
AT
54
WS
-7-F
_S
OD
32
3-2
~D
@
PD
10
1B
AT
54
WS
-7-F
_S
OD
32
3-2
~D
@
21
PR1020.005_1206_1%
PR1020.005_1206_1%
1
3
4
2
PQ
10
3B
ME
2N
70
02
DK
W-G
2N
SO
T3
63
-6P
Q1
03
BM
E2
N7
00
2D
KW
-G 2
N S
OT
36
3-6
34
5
PC
13
30
.1U
_0
40
2_
25
V6
@
PC
13
30
.1U
_0
40
2_
25
V6
@
12
PC
12
71
00
P_
04
02
_5
0V
8J
PC
12
71
00
P_
04
02
_5
0V
8J
12
PC
11
61
0U
_0
80
5_
25
V6
KP
C1
16
10
U_
08
05
_2
5V
6K
12
PC1120.047U_0402_25V7K
PC1120.047U_0402_25V7K
1 2
PC
10
90
.1U
_0
40
2_
25
V6
PC
10
90
.1U
_0
40
2_
25
V6
12
PQ101 AO4423L 1P SO8PQ101 AO4423L 1P SO8
3 65
78
2
4
1
PR
10
4
4.1
2K
_0
60
3_
1%
PR
10
4
4.1
2K
_0
60
3_
1%1
2
PC1280.22U_0402_6.3V6KPC1280.22U_0402_6.3V6K
12
PR
11
14
.7_
12
06
_5
%P
R1
11
4.7
_1
20
6_
5%1
2
PD
10
2R
B5
51
V-3
0_
SO
D3
23
-2P
D1
02
RB
55
1V
-30
_S
OD
32
3-2
21
PR108
2.2_0402_1%
PR108
2.2_0402_1%
1 2
PR1200_0402_5%PR1200_0402_5%1 2
PC
14
98
2P
50
V J
NP
O 0
40
2
@
PC
14
98
2P
50
V J
NP
O 0
40
2
@
12
[email protected]_0402_6.3V6K@
12
PC
10
41
0U
_0
80
5_
25
V6
KP
C1
04
10
U_
08
05
_2
5V
6K
12
PC
11
90
.01
U_
04
02
_5
0V
7K
PC
11
90
.01
U_
04
02
_5
0V
7K
12
PQ102MDU1512RH 1N POWERDFN56-8PQ102MDU1512RH 1N POWERDFN56-8
4
5
123
PC
10
31
0U
_0
80
5_
25
V6
K
@
PC
10
31
0U
_0
80
5_
25
V6
K
@
12
PC
13
76
.8P
_0
40
2_
50
V8
C
@
PC
13
76
.8P
_0
40
2_
50
V8
C
@
12P
C1
34
6.8
P_
04
02
_5
0V
8C
@
PC
13
46
.8P
_0
40
2_
50
V8
C
@
12
PR126
49.9K_0402_1%
PR126
49.9K_0402_1%
12
PC1111U_0603_25V6KPC1111U_0603_25V6K1 2
PD103RB751V-40_SOD323-2
PD103RB751V-40_SOD323-2
12
PR
10
32
20
K_
04
02
_5
%P
R1
03
22
0K
_0
40
2_
5%
12
PC
15
26
.8P
_0
40
2_
50
V8
C
@
PC
15
26
.8P
_0
40
2_
50
V8
C
@
12
PR
10
71
00
K_
04
02
_5
%P
R1
07
10
0K
_0
40
2_
5%1
2
PR12810_0402_1%PR12810_0402_1%
1 2
PQ104AON7408L_DFN8-5PQ104AON7408L_DFN8-5
35
2
4
1
PC
10
72
20
0P
_0
40
2_
50
V7
KP
C1
07
22
00
P_
04
02
_5
0V
7K
12
PR1210_0402_5%PR1210_0402_5%1 2
PR12449.9K_0402_1%PR12449.9K_0402_1%1 2
PR1122.2_0402_1%PR1122.2_0402_1%1 2
PC
12
16
80
P_
04
02
_5
0V
7K
PC
12
16
80
P_
04
02
_5
0V
7K1
2
PC
15
10
.1U
_0
40
2_
25
V6
@
PC
15
10
.1U
_0
40
2_
25
V6
@
12
PC124
0.1U_0603_25V7K
PC124
0.1U_0603_25V7K
12
PC
11
40
.1U
_0
40
2_
25
V6
PC
11
40
.1U
_0
40
2_
25
V6
12
PU102BQ24736RGRR_QFN20_3P5X3P5
PU102BQ24736RGRR_QFN20_3P5X3P5
AC
N1
AC
P2
CM
SR
C3
AC
DR
V4
AC
PR
ES
5
ACDET6
IOUT7
SDA8
SCL9
ILIM10
DLIM
11
SR
N12
SR
P13
GN
D14
LO
DR
V15
REGN16
BTST17
HIDRV18
PHASE19
VCC20
PA
D21
G
D
S
PQ108
2N7002KW 1N SOT323-3
G
D
S
PQ108
2N7002KW 1N SOT323-3
2
13
PC
14
18
2P
50
V J
NP
O 0
40
2
@
PC
14
18
2P
50
V J
NP
O 0
40
2
@
12
PC
12
30
.01
U_
04
02
_5
0V
7K
PC
12
30
.01
U_
04
02
_5
0V
7K
12
PC
12
21
00
P_
04
02
_5
0V
8J
PC
12
21
00
P_
04
02
_5
0V
8J
12
PC
13
16
.8P
_0
40
2_
50
V8
C
@
PC
13
16
.8P
_0
40
2_
50
V8
C
@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
15W
Typ: 175mA
Typ: 225mA
3VDSP/5VDSP
<1>5V=283KHz 3V=330KHz (Vin=6.5 ~ 12v)<2>5V=321KHz 3V=375KHz (Vin=12 ~ 25v)(By Rton= 68K ohm)
for RF request, 8/6for RF request, 8/6
For RF request, 11/5
For RF request, 11/5
for RF request, 8/6 for RF request, 8/6
For HP request, 11/5
SB00000SA00
SH00000PH00 BST_5V
LX_5V
BST_5V-1
FB
_5
V
UG_5V
BST_3V
LG_5V
FB
_3
V
ENLDO_3V_5V
LX_3V
UG_3V
LG_3V
EN
TR
IP2
EN
TR
IP1
BST_3V-1
+3
VL
P
PG_3V_5V
EN_P1V5 [30,33,39,40,45]
KBC_PWR_ON[30,34]
3VDS_PG
+5VDSP+3VDSP
+3VLP
+5VLP
B++
+3VDS+3VDSP
+5VDS+5VDSP
+5VLP +5VL
B++B+
+3VDSP+5VDSP
B++
+3VDS
+5VLP
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.3
44 52Thursday, December 20, 2012
2011/06/13Compal Electronics, Inc.
2014/12/31
Custom
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.3
44 52Thursday, December 20, 2012
2011/06/13Compal Electronics, Inc.
2014/12/31
Custom
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.3
44 52Thursday, December 20, 2012
2011/06/13Compal Electronics, Inc.
2014/12/31
Custom
PQ302
SIS412DN-T1-GE3_POWERPAK8-5
PQ302
SIS412DN-T1-GE3_POWERPAK8-5
4
5
123
PC
32
41
00
P_
04
02
_5
0V
8J
PC
32
41
00
P_
04
02
_5
0V
8J
12
PC
33
00
.1U
_0
40
2_
25
V6
@
PC
33
00
.1U
_0
40
2_
25
V6
@
12
PJP301PAD-OPEN 1x3m@PJP301PAD-OPEN 1x3m@
1 2
PC
30
71
0U
_0
80
5_
25
V6
KP
C3
07
10
U_
08
05
_2
5V
6K
12
PR30620K_0402_1%
PR30620K_0402_1%
12
PQ305A
ME
2N
70
02
DK
W-G
2N
SO
T3
63
-6
PQ305A
ME
2N
70
02
DK
W-G
2N
SO
T3
63
-6
61
2
PR
30
91
15
K_
04
02
_1
%P
R3
09
11
5K
_0
40
2_
1%
12
PC
31
61
U_
04
02
_1
0V
6K
PC
31
61
U_
04
02
_1
0V
6K
12
PR
32
41
0K
_0
40
2_
1%
PR
32
41
0K
_0
40
2_
1%
12
PR
31
06
8K
_0
60
3_
5%
PR
31
06
8K
_0
60
3_
5%
12
PQ305B
ME
2N
70
02
DK
W-G
2N
SO
T3
63
-6
PQ305B
ME
2N
70
02
DK
W-G
2N
SO
T3
63
-6
34
5
PL3022.2UH +-20% ETQP3W2R2WFN 8.5A
PL3022.2UH +-20% ETQP3W2R2WFN 8.5A
1 2
G
D
S
PQ3062N7002KW 1N SOT323-3
G
D
S
PQ3062N7002KW 1N SOT323-3
2
13
PC
30
31
0U
_0
80
5_
25
V6
KP
C3
03
10
U_
08
05
_2
5V
6K
12P
C3
05
22
00
P_
04
02
_5
0V
7K
@
PC
30
52
20
0P
_0
40
2_
50
V7
K
@
12 P
C3
34
10
U_
08
05
_2
5V
6K
PC
33
41
0U
_0
80
5_
25
V6
K
12
PC
32
86
.8P
_0
40
2_
50
V8
C
@
PC
32
86
.8P
_0
40
2_
50
V8
C
@
12
PR30530K_0402_1%
PR30530K_0402_1%
12
PC320100P_0402_50V8JPC320100P_0402_50V8J
1 2
PR30413.7K_0402_1%
PR30413.7K_0402_1%
1 2
PC
32
91
00
P_
04
02
_5
0V
8J
PC
32
91
00
P_
04
02
_5
0V
8J
12
PR3132.2_0603_5%PR3132.2_0603_5%1 2
PR
31
44
.7_
12
06
_5
%P
R3
14
4.7
_1
20
6_
5%
12
PR3122.2_0603_5%PR3122.2_0603_5%1 2
PR321499K_0402_1%
PR321499K_0402_1%1 2
PC
32
26
8P
_0
40
2_
50
V8
J
@
PC
32
26
8P
_0
40
2_
50
V8
J
@
12
PC
30
82
20
0P
_0
40
2_
50
V7
K
@
PC
30
82
20
0P
_0
40
2_
50
V7
K
@
12
PQ304
MD
V1
52
6U
RH
_P
DF
N3
3-8
-5
PQ304
MD
V1
52
6U
RH
_P
DF
N3
3-8
-5
4
5
123
PR3160_0402_5%
@PR3160_0402_5%
@
1 2
PC
33
26
.8P
_0
40
2_
50
V8
C
@
PC
33
26
.8P
_0
40
2_
50
V8
C
@
12
PC
32
36
8P
_0
40
2_
50
V8
J
@
PC
32
36
8P
_0
40
2_
50
V8
J
@
12P
C3
09
0.1
U_
04
02
_2
5V
6
@
PC
30
90
.1U
_0
40
2_
25
V6
@
12
PC317
4.7U_0805_10V6K
PC317
4.7U_0805_10V6K
12
PQ301
SIS
41
2D
N-T
1-G
E3
_P
OW
ER
PA
K8
-5
PQ301
SIS
41
2D
N-T
1-G
E3
_P
OW
ER
PA
K8
-5
4
5
1 2 3
PC
33
12
20
0P
_0
40
2_
50
V7
K
@
PC
33
12
20
0P
_0
40
2_
50
V7
K
@
12
PJP303JUMP_43X118PJP303JUMP_43X118
11
22
PC
32
51
00
P_
04
02
_5
0V
8J
PC
32
51
00
P_
04
02
_5
0V
8J
12
PR
32
51
00
K_
04
02
_1
%P
R3
25
10
0K
_0
40
2_
1%
12
PC
32
72
20
0P
_0
40
2_
50
V7
K
@
PC
32
72
20
0P
_0
40
2_
50
V7
K
@
12
+
PC
31
42
20
U_
6.3
V_
M
+
PC
31
42
20
U_
6.3
V_
M1
2
PC3110.1U_0603_25V7KPC3110.1U_0603_25V7K1 2
PR
30
81
24
K_
04
02
_1
%P
R3
08
12
4K
_0
40
2_
1%
12
PC
31
90
.1U
_0
60
3_
25
V7
KP
C3
19
0.1
U_
06
03
_2
5V
7K
12
PR
32
61
00
K_
04
02
_1
%P
R3
26
10
0K
_0
40
2_
1%1
2
PQ303
AON7406L_DFN8-5
PQ303
AON7406L_DFN8-5
4
5
1 2 3
PJP302JUMP_43X118PJP302JUMP_43X118
11
22
PC
32
60
.1U
_0
40
2_
25
V6
@
PC
32
60
.1U
_0
40
2_
25
V6
@
12
RT8243AZQW WQFN 20P
PU301
RT8243AZQW WQFN 20P
PU301
FB
11
EN
TR
IP1
2
TO
N3
EN
TR
IP2
4
FB
25
PGOOD6
BOOT27
UGATE28
PHASE29
LGATE210
VIN
11
EN
LD
O12
EN
M13
LD
O5
14
LD
O3
15
LGATE116
PHASE117
UGATE118
BOOT119
BYP120
PAD21
PR3110_0402_5%@PR3110_0402_5%@
1 2
PC
31
26
80
P_
04
02
_5
0V
7K
PC
31
26
80
P_
04
02
_5
0V
7K
12P
C3
13
68
0P
_0
40
2_
50
V7
KP
C3
13
68
0P
_0
40
2_
50
V7
K1
2
PC3211U_0402_10V6KPC3211U_0402_10V6K
12
PL3034.7U 20% VMPI0703AR-4R7M-Z01 5.5A
PL3034.7U 20% VMPI0703AR-4R7M-Z01 5.5A
1 2
PC
33
31
00
P_
04
02
_5
0V
8J
PC
33
31
00
P_
04
02
_5
0V
8J
12
PC302
4.7U_0805_10V6K
PC302
4.7U_0805_10V6K
12
PR
31
54
.7_
12
06
_5
%P
R3
15
4.7
_1
20
6_
5%
12
PC
30
40
.1U
_0
40
2_
25
V6
@
PC
30
40
.1U
_0
40
2_
25
V6
@
12
PC3100.1U_0603_25V7K
PC3100.1U_0603_25V7K
12
PR30720K_0402_1%
PR30720K_0402_1%1 2
PC
30
61
0U
_0
80
5_
25
V6
KP
C3
06
10
U_
08
05
_2
5V
6K
12
+
PC
31
52
20
U_
6.3
V_
M
+
PC
31
52
20
U_
6.3
V_
M 1
2
PJP306JUMP_43X39PJP306JUMP_43X39
11
22
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
7/11
8/1
for RF request, 8/6
For RF request, 11/5B+_1.35V
SN
B_1.3
5V
DH
_1.3
5V
+1.3
5V
P
CS_1.35V
+0.6
75V
SP
VDD_1.35V +1.35VP
DL_1.35V
TO
N_1.3
5V
BS
T_1.3
5V
B+_1.35V
FB
_1.3
5V
VTTREF_0.675V
S3_1.3
5V
LX
_1.3
5V
1.35V_PG
SLP_S4#[14]
DDR3_SET [14]SLP_S3#[14,30,31,34]
KBC_DS3_EN [30,5]
EN_P1V5[30,33,39,40,44]
+1.35V+1.35VP
+0.675VS+0.675VSP
B+
+1.35VP
+5VDS+1.35VP
+0.675VSP
+1.35VP
+1.35VP
+5VDS
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date 2014/12/31
15W
2012/04/03
Compal Electronics, Inc.
5245
0.3
DDR Power
Thursday, December 20, 2012
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date 2014/12/31
15W
2012/04/03
Compal Electronics, Inc.
5245
0.3
DDR Power
Thursday, December 20, 2012
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date 2014/12/31
15W
2012/04/03
Compal Electronics, Inc.
5245
0.3
DDR Power
Thursday, December 20, 2012
PL4022.2UH_VMPI0703AR-2R2M-Z01_8A_20%
PL4022.2UH_VMPI0703AR-2R2M-Z01_8A_20%
1 2
PQ401
SIS412DN-T1-GE3_POWERPAK8-5
PQ401
SIS412DN-T1-GE3_POWERPAK8-5
4
5
1 2 3
PC4180.22U_0402_16V7KPC4180.22U_0402_16V7K
12PR416
4.7K_0402_5%
PR416
4.7K_0402_5%
12
PC
401
68P
_0402_50V
8J
@
PC
401
68P
_0402_50V
8J
@
12
PR4120_0402_5%PR4120_0402_5%1 2
PR4182.2_0603_5%PR4182.2_0603_5%1 2
+
PC
409
330U
_2.5
V_M
+
PC
409
330U
_2.5
V_M
1
2
PC
403
0.1
U_0402_25V
6
@
PC
403
0.1
U_0402_25V
6
@
12
PC4020.22U_0402_10V6KPC4020.22U_0402_10V6K1 2
PC415.1U_0402_16V7KPC415.1U_0402_16V7K
12
PR411
10.2K_0402_1%
PR411
10.2K_0402_1%
12
PL401HCB1608KF-121T30_0603
PL401HCB1608KF-121T30_0603
1 2
PR40842.2K_0402_1%PR40842.2K_0402_1%1 2
PC
404
2200P
_0402_50V
7K
@
PC
404
2200P
_0402_50V
7K
@
12
PR407887K_0402_1%PR407887K_0402_1%1 2
PC
410
680P
_0603_50V
7K
PC
410
680P
_0603_50V
7K
12
PC4111U_0603_10V6KPC4111U_0603_10V6K
12
PR41510K_0402_5%PR41510K_0402_5%
12
PR4055.1_0603_5%PR4055.1_0603_5%1 2
PR40315.8K_0402_1%PR40315.8K_0402_1%1 2
G
D
S
PQ403
2N7002KW 1N SOT323-3
G
D
S
PQ403
2N7002KW 1N SOT323-3
2
13
PC
407
10U
_0805_6.3
V6K
PC
407
10U
_0805_6.3
V6K
12
PC4130.033U_0402_16V7KPC4130.033U_0402_16V7K
12
PR419100K_0402_5%@PR419100K_0402_5%@
1 2
PD401
BAT54CW_SOT323-3
PD401
BAT54CW_SOT323-3
1
32
PC
406
4.7
U_0805_25V
6-K
PC
406
4.7
U_0805_25V
6-K
12
PQ402
MDV1526URH_PDFN33-8-5
PQ402
MDV1526URH_PDFN33-8-5
4
5
1 2 3
PR
417
100_0402_5%
PR
417
100_0402_5%1
2
PR4044.7_1206_5%PR4044.7_1206_5%
12
PC
419
82P
50V
J N
PO
0402
@
PC
419
82P
50V
J N
PO
0402
@
12
PR42042.2K_0402_1%
PR42042.2K_0402_1%
12
PR40610.2K_0402_1%PR40610.2K_0402_1%1 2
PJP401JUMP_43X118PJP401JUMP_43X1181 2
PC
405
10U
_0805_25V
6K
PC
405
10U
_0805_25V
6K
12
PU401
RT8207MZQW_WQFN20_3X3
PU401
RT8207MZQW_WQFN20_3X3
VTTSNS2
FB
6
S5
8
PG
OO
D10
VDDP12
PH
AS
E16
BO
OT
18
VTTREF4
PGND14
VTTGND1
GND3
VDDQ5
S3
7
TO
N9
VDD11
CS13
LGATE15 U
GA
TE
17
VT
T20
VLD
OIN
19
PAD21
PC4160.1U_0402_10V7K@ PC4160.1U_0402_10V7K@
12
PC
408
10U
_0805_6.3
V6K
PC
408
10U
_0805_6.3
V6K
12
PJP402JUMP_43X39PJP402JUMP_43X39
11
22
PC412
1U_0603_10V6K
PC412
1U_0603_10V6K
12
PC4170.1U_0402_10V7K@ PC4170.1U_0402_10V7K@
12
PR4020_0402_5%PR4020_0402_5%1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
4/11
4/11
7/17
for RF request, 8/6
BST_1.05V
DH_1.05V
BST_1.05V-1
TRIP_1.05V
EN_1.05V
FB_1.05V
RF_1.05V
SN
B_1.0
5V
DL_1.05V
LX_1.05V
B+_1.05V
SIO_SLP_A#[14,30,31]
KBC_PWR_ON#[34]
1.05VM_PG[31]
B+
+5VDS
+1.05VMP
+1.05VM+1.05VMP
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date 2014/12/31
15W
2012/04/03
Compal Electronics, Inc.
5246
0.3
1.05VMP
Thursday, December 20, 2012
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date 2014/12/31
15W
2012/04/03
Compal Electronics, Inc.
5246
0.3
1.05VMP
Thursday, December 20, 2012
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date 2014/12/31
15W
2012/04/03
Compal Electronics, Inc.
5246
0.3
1.05VMP
Thursday, December 20, 2012
G
D
S
PQ5032N7002KW 1N SOT323-3
G
D
S
PQ5032N7002KW 1N SOT323-3
2
13
PC
502
0.1
U_0402_25V
6
@
PC
502
0.1
U_0402_25V
6
@
12
PR510
10K_0402_1%
PR510
10K_0402_1%
12
PC511
680P_0603_50V7K
PC511
680P_0603_50V7K
12
PC
505
4.7
U_0805_25V
6-K
PC
505
4.7
U_0805_25V
6-K
12 P
C512
68P
_0402_50V
8J
@
PC
512
68P
_0402_50V
8J
@
12
PL501
HCB2012KF-121T50_0805
PL501
HCB2012KF-121T50_08051 2
PQ502
AO
N7406L_D
FN
8-5
PQ502
AO
N7406L_D
FN
8-54
5
123
PR506
470K_0402_1%
PR506
470K_0402_1%
12
PC
508
.1U
_0402_16V
7K
@
PC
508
.1U
_0402_16V
7K
@
12
PC
503
2200P
_0402_50V
7K
@
PC
503
2200P
_0402_50V
7K
@
12
PU501
TPS51212DSCR_SON10_3X3
PU501
TPS51212DSCR_SON10_3X3
EN3
TRIP2
V5IN7
DRVH9
SW8
DRVL6
VBST10
RF5
VFB4
PGOOD1
TP11
PC5071U_0603_6.3V6MPC5071U_0603_6.3V6M
12
PJP501
JUMP_43X79@
PJP501
JUMP_43X79@
11
22
PR511
100K_0402_5%
@ PR511
100K_0402_5%
@
12
PR508
5.11K_0402_1%
PR508
5.11K_0402_1%12
PR50386.6K_0402_1%PR50386.6K_0402_1%1 2 PL502
2.2UH +-20% ETQP3W2R2WFN 8.5APL502
2.2UH +-20% ETQP3W2R2WFN 8.5A1 2
+ PC510330U_2.5V_M
+ PC510330U_2.5V_M
1
2
PQ501
SIS412DN-T1-GE3_POWERPAK8-5
PQ501
SIS412DN-T1-GE3_POWERPAK8-5
4
5
123
PR5022.2_0603_5%
PR5022.2_0603_5%1 2
PC
504
4.7
U_0805_25V
6-K
PC
504
4.7
U_0805_25V
6-K
12 P
C513
100P
_0402_50V
8J
PC
513
100P
_0402_50V
8J
12
PR5054.7_1206_5%PR5054.7_1206_5%
12
PC5060.22U_0603_16V7K
PC5060.22U_0603_16V7K
1 2
PR504100_0402_5%PR504100_0402_5%1 2
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
EMI Part (47.1)RF Part (47.3)
RF Part (47.3)EMI Part (47.1)
RF Part (47.3)EMI Part (47.1)
RF Part (47.3)
EMI Part (47.1)
EMI Part (47.1)
EMI Part (47.1)
EMI Part (47.1)
Acoustic (37.2)
37W pop, 47W up unpop
phase337W pop, 47W up unpop
CSN1
CSP1
CSN2
CSP2
PWM2
CPU_B+
SKIP
PWM1
CSN2
CSN1
CSP1
CSP2
CSN3
GFB
VFB
CPU_VREF
VR
_H
OT
#
SC
LK
AL
ER
T#
SDIO
CPU_B+
PWM2
PWM1
SKIP
PWM3
SKIP
F-IMAX
B-R
AM
O-USR
OC
P-I
CPU_VREF
SLEWA
CSN3
CSP3
PWM3
CPU_B+
SKIP
SCLK
ALERT#
SDIO
VR_HOT#
CSP3
VSSSENSE[10,9]
VCCSENSE[9]
KBC_PROC_HOT_R[24,5]
VGATE [31]
PWR_GD [30,31,5]
VR_SVID_DAT[9]
VR_SVID_ALRT#[9]
VR_SVID_CLK[9]
+5VDS
+3VS
+5VDS
CPU_B+
+VCC_CORE
+5VDS
+VCC_CORE
CPU_B+ B++5VDS
+VCC_CORE
+VCCIO_OUT
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.3
PWR-CPU_CORE
Custom
47 52
2011/06/24 2014/12/31
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.3
PWR-CPU_CORE
Custom
47 52
2011/06/24 2014/12/31
Compal Electronics, Inc.Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.3
PWR-CPU_CORE
Custom
47 52
2011/06/24 2014/12/31
Compal Electronics, Inc.
PR
23
21
00
_0
40
2_
5%
PR
23
21
00
_0
40
2_
5%
12
PR2494.7_1206_5%
EMI@ PR2494.7_1206_5%
EMI@
1 2
PR
21
46
3.4
K_
04
02
_1
%P
R2
14
63
.4K
_0
40
2_
1% 1
2
PU204CSD97374CQ4M_SON8_3P5X4P5
PU204CSD97374CQ4M_SON8_3P5X4P5
3PGND1
2VDD
1SKIP#
4VSW
8PWM
5VIN
7BOOT
6BOOT_R
9
PGND2
PR2240_0402_5%
PR2240_0402_5%
1 2
PC
22
9
10
U_
08
05
_2
5V
6K
PC
22
9
10
U_
08
05
_2
5V
6K
12
PR
20
8
25
5K
_0
40
2_
1%
PR
20
8
25
5K
_0
40
2_
1%
12
PR23722_0402_5%
PR23722_0402_5%
1 2
PC
21
2
10
U_
08
05
_2
5V
6K
PC
21
2
10
U_
08
05
_2
5V
6K
12
PR2330_0402_5%
PR2330_0402_5%
1 2
PR22010K_0402_1%
PR22010K_0402_1%1 2
PR20110K_0402_1%
@ PR20110K_0402_1%
@
12
PC
21
40
.1U
_0
40
2_
25
V6
EM
I@P
C2
14
0.1
U_
04
02
_2
5V
6E
MI@
12
PC
26
66
8P
_0
40
2_
50
V8
J@
RF
@P
C2
66
68
P_
04
02
_5
0V
8J
@R
F@
12
PL2020.15UH +-20% ETQP4LR15AFM 29A
PL2020.15UH +-20% ETQP4LR15AFM 29A
1
3
4
2
PC259470P_0402_50V7K
EMI@ PC259470P_0402_50V7K
EMI@
1 2
PH
20
1
10
0K
_0
40
2_
1%
_T
SM
0B
10
4F
42
51
RZ
PH
20
1
10
0K
_0
40
2_
1%
_T
SM
0B
10
4F
42
51
RZ
12
+
PC
23
41
00
U_
25
V_
M
+
PC
23
41
00
U_
25
V_
M
1
2
PR
21
63
.01
K_
04
02
_1
%P
R2
16
3.0
1K
_0
40
2_
1% 1
2
PR
21
1
20
K_
04
02
_1
%
PR
21
1
20
K_
04
02
_1
%
12
PR2210_0402_5%
PR2210_0402_5%1 2
PR2404.7_1206_5%
EMI@ PR2404.7_1206_5%
EMI@
1 2
PR2470_0402_5%
PR2470_0402_5%
1 2
PH
20
2
10
K_
04
02
_1
%_
TS
M0
A1
03
F3
4D
1R
Z
PH
20
2
10
K_
04
02
_1
%_
TS
M0
A1
03
F3
4D
1R
Z
12
PC
21
3
0.1
5U
_0
40
2_
10
V6
K
PC
21
3
0.1
5U
_0
40
2_
10
V6
K
12
22
0P
_0
40
2_
25
V8
KP
C2
58
@R
F@
22
0P
_0
40
2_
25
V8
KP
C2
58
@R
F@
12
PC
21
52
20
0P
_0
40
2_
50
V7
KE
MI@
PC
21
52
20
0P
_0
40
2_
50
V7
KE
MI@
12
PJP201
PAD-OPEN 1x3m
PJP201
PAD-OPEN 1x3m
1 2PC2101U_0402_6.3V6K
PC2101U_0402_6.3V6K
12
PC
20
2
.1U
_0
40
2_
16
V7
K
PC
20
2
.1U
_0
40
2_
16
V7
K
12
PR
25
34
7K
_0
40
2_
1%
PR
25
34
7K
_0
40
2_
1%
12
PR2442.1K_0402_1%
PR2442.1K_0402_1%
12
PC263470P_0402_50V7K
EMI@ PC263470P_0402_50V7K
EMI@
1 2
PR2170_0402_5%
PR2170_0402_5%
1 2
+
PC
23
31
00
U_
25
V_
M
@
+
PC
23
31
00
U_
25
V_
M
@
1
2
PR2280_0402_5%
PR2280_0402_5%
1 2
PR
20
7
10
0K
_0
40
2_
1%
PR
20
7
10
0K
_0
40
2_
1%
12
68
P_
04
02
_5
0V
8J
PC
25
7@
RF
@6
8P
_0
40
2_
50
V8
JP
C2
57
@R
F@
12
PR2502.1K_0402_1%
PR2502.1K_0402_1%
12
PC2501U_0603_10V6K
PC2501U_0603_10V6K
12
PC
26
46
8P
_0
40
2_
50
V8
J@
RF
@P
C2
64
68
P_
04
02
_5
0V
8J
@R
F@
12
PH
20
4
10
K_
04
02
_1
%_
TS
M0
A1
03
F3
4D
1R
Z
PH
20
4
10
K_
04
02
_1
%_
TS
M0
A1
03
F3
4D
1R
Z
12
PC
21
1
10
U_
08
05
_2
5V
6K
PC
21
1
10
U_
08
05
_2
5V
6K
12
PR
22
93
.01
K_
04
02
_1
%P
R2
29
3.0
1K
_0
40
2_
1% 1
2
PC
20
5
10
U_
08
05
_2
5V
6K
PC
20
5
10
U_
08
05
_2
5V
6K
12
PU202CSD97374CQ4M_SON8_3P5X4P5
PU202CSD97374CQ4M_SON8_3P5X4P5
3PGND1
2VDD
1SKIP#
4VSW
8PWM
5VIN
7BOOT
6BOOT_R
9
PGND2
PC
20
82
20
0P
_0
40
2_
50
V7
KE
MI@
PC
20
82
20
0P
_0
40
2_
50
V7
KE
MI@
12
PL2040.15UH +-20% ETQP4LR15AFM 29A
PL2040.15UH +-20% ETQP4LR15AFM 29A
1
3
4
2
PR
20
4
88
.7K
_0
40
2_
1%
PR
20
4
88
.7K
_0
40
2_
1%1
2
PR
20
3
10
K_
04
02
_1
%
PR
20
3
10
K_
04
02
_1
%
12
PC
26
56
8P
_0
40
2_
50
V8
J@
RF
@P
C2
65
68
P_
04
02
_5
0V
8J
@R
F@
12
PR23622_0402_5%
PR23622_0402_5%
1 2
PC2161U_0402_6.3V6K
PC2161U_0402_6.3V6K
12
PC
23
0
10
U_
08
05
_2
5V
6K
PC
23
0
10
U_
08
05
_2
5V
6K
12
PR21510K_0402_1%
PR21510K_0402_1%
1 2
PR2420_0402_5%@PR2420_0402_5%@
1 2
PU203CSD97374CQ4M_SON8_3P5X4P5
PU203CSD97374CQ4M_SON8_3P5X4P5
3PGND1
2VDD
1SKIP#
4VSW
8PWM
5VIN
7BOOT
6BOOT_R
9
PGND2
PR
20
9
15
0K
_0
40
2_
1%
PR
20
9
15
0K
_0
40
2_
1%
12
PC
20
1
47
00
P_
04
02
_1
6V
7K
PC
20
1
47
00
P_
04
02
_1
6V
7K
12
PR23822_0402_5%
PR23822_0402_5%
1 2
PR
23
93
.01
K_
04
02
_1
%P
R2
39
3.0
1K
_0
40
2_
1% 1
2PC
20
4
10
U_
08
05
_2
5V
6K
PC
20
4
10
U_
08
05
_2
5V
6K
12
PR
23
01
00
_0
40
2_
5%
PR
23
01
00
_0
40
2_
5%
12
PC2462.2P_0402_50V8C
@PC2462.2P_0402_50V8C
@
1 2
PR21210K_0402_1%
PR21210K_0402_1%
12
PC
23
20
.1U
_0
40
2_
25
V6
EM
I@P
C2
32
0.1
U_
04
02
_2
5V
6E
MI@
12
PC245330P_0402_50V7K
PC245330P_0402_50V7K
1 2
PR223 2.2_0402_5%PR223 2.2_0402_5%1 2
PR218 2.2_0402_5%PR218 2.2_0402_5%1 2
PR245 2.2_0402_5%PR245 2.2_0402_5%1 2
PC256
.1U_0402_16V7K
PC256
.1U_0402_16V7K12
PR241
2.1K_0402_1%
PR241
2.1K_0402_1%12
PU201
TPS51631RSMR_QFN32_4X4
PU201
TPS51631RSMR_QFN32_4X4
SL
EW
A1
5
VB
AT
16
TH
ER
M1
4
GFB23
CSP321
CO
MP
26
VC
LK
31
V5
A2
8
DR
OO
P2
5
AL
ER
T#
32
VFB24
CSN322
PA
D3
3
GN
D2
9
PGOOD3
VR
_H
OT
#3
0
VR
EF
27
VDIO1
VDD2
PWM34
PWM25
PWM16
SKIP#7
VR_ON8
IMO
N1
3
OC
P-I
12
B-R
AM
P1
1
F-I
MA
X1
0
O-U
SR
9
CSP220
CSP117
CSN219
CSN118
PR2192.94K_0402_1%
PR2192.94K_0402_1%
1 2
PC2621U_0402_6.3V6K
PC2621U_0402_6.3V6K
12
PC261 .1U_0402_16V7KPC261 .1U_0402_16V7K
1 2
PC
23
82
20
0P
_0
40
2_
50
V7
KE
MI@
PC
23
82
20
0P
_0
40
2_
50
V7
KE
MI@
12
PC
26
98
2P
50
V J
NP
O 0
40
2@
RF
@P
C2
69
82
P 5
0V
J N
PO
04
02
@R
F@
12
PR22610_0603_1%
PR22610_0603_1%1 2
PC
21
7
0.1
5U
_0
40
2_
10
V6
K
PC
21
7
0.1
5U
_0
40
2_
10
V6
K
12
PL201FBMA-L11-453215-800LMA90T_1812
@EMI@ PL201FBMA-L11-453215-800LMA90T_1812
@EMI@
1 2
PR
22
56
3.4
K_
04
02
_1
%P
R2
25
63
.4K
_0
40
2_
1% 1
2
PR
21
0
36
.5K
_0
40
2_
1%
PR
21
0
36
.5K
_0
40
2_
1%1
2
PC260470P_0402_50V7K
EMI@ PC260470P_0402_50V7K
EMI@
1 2
PR
23
11
00
_0
40
2_
5%
PR
23
11
00
_0
40
2_
5%
12
PR20239K_0402_1%
PR20239K_0402_1%
12
PR2270_0402_5%
PR2270_0402_5%1 2
PR
20
5
39
K_
04
02
_1
%
PR
20
5
39
K_
04
02
_1
%
12
PC253 .1U_0402_16V7KPC253 .1U_0402_16V7K
1 2
PC248 .1U_0402_16V7KPC248 .1U_0402_16V7K
1 2
PC
26
88
2P
50
V J
NP
O 0
40
2@
RF
@P
C2
68
82
P 5
0V
J N
PO
04
02
@R
F@
12
PC
20
9
0.1
5U
_0
40
2_
10
V6
K
PC
20
9
0.1
5U
_0
40
2_
10
V6
K
12
PC20647P_0402_50V8J
@ PC20647P_0402_50V8J
@
12
PL2030.15UH +-20% ETQP4LR15AFM 29A
PL2030.15UH +-20% ETQP4LR15AFM 29A
1
3
4
2
+
PC
23
51
00
U_
25
V_
M
+
PC
23
51
00
U_
25
V_
M
1
2
PR
20
6
10
0K
_0
40
2_
1%
@P
R2
06
10
0K
_0
40
2_
1%
@1
2
PC
20
70
.1U
_0
40
2_
25
V6
EM
I@P
C2
07
0.1
U_
04
02
_2
5V
6E
MI@
12
PC2030.33U_0402_10V6K
PC2030.33U_0402_10V6K
12
PC
26
78
2P
50
V J
NP
O 0
40
2@
RF
@P
C2
67
82
P 5
0V
J N
PO
04
02
@R
F@
12
PC2541U_0603_10V6K
PC2541U_0603_10V6K
12
PH
20
3
10
K_
04
02
_1
%_
TS
M0
A1
03
F3
4D
1R
Z
PH
20
3
10
K_
04
02
_1
%_
TS
M0
A1
03
F3
4D
1R
Z
12
PR
23
56
3.4
K_
04
02
_1
%P
R2
35
63
.4K
_0
40
2_
1% 1
2
PR243
4.7_1206_5%EMI@ PR243
4.7_1206_5%EMI@
1 2
PR
25
21
0_
04
02
_1
%P
R2
52
10
_0
40
2_
1%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+VCC_CORE 2 X 470u/4m
30 X 22u/0805
+VCC_CORE
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date 2014/12/31
LA-9371P
2012/04/03
Compal Electronics, Inc.
5248
0.3
PROCESSOR DECOUPLING
Thursday, December 20, 2012
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date 2014/12/31
LA-9371P
2012/04/03
Compal Electronics, Inc.
5248
0.3
PROCESSOR DECOUPLING
Thursday, December 20, 2012
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date 2014/12/31
LA-9371P
2012/04/03
Compal Electronics, Inc.
5248
0.3
PROCESSOR DECOUPLING
Thursday, December 20, 2012
PC
2015
22U
_0805_6.3
V6M
PC
2015
22U
_0805_6.3
V6M
1
2 PC
2022
22U
_0805_6.3
V6M
PC
2022
22U
_0805_6.3
V6M
12
PC
2005
22U
_0805_6.3
V6M
PC
2005
22U
_0805_6.3
V6M
12
+
PC
2001
470U
_D
2_2V
M_R
4.5
M
+
PC
2001
470U
_D
2_2V
M_R
4.5
M
1
2
PC
2029
22U
_0805_6.3
V6M
PC
2029
22U
_0805_6.3
V6M
12
PC
2018
22U
_0805_6.3
V6M
PC
2018
22U
_0805_6.3
V6M
12
PC
2011
22U
_0805_6.3
V6M
PC
2011
22U
_0805_6.3
V6M
12
PC
2031
22U
_0805_6.3
V6M
PC
2031
22U
_0805_6.3
V6M
12
PC
2007
22U
_0805_6.3
V6M
PC
2007
22U
_0805_6.3
V6M
1
2 PC
2012
22U
_0805_6.3
V6M
PC
2012
22U
_0805_6.3
V6M
12
PC
2020
22U
_0805_6.3
V6M
PC
2020
22U
_0805_6.3
V6M
12
PC
2009
22U
_0805_6.3
V6M
PC
2009
22U
_0805_6.3
V6M
1
2
PC
2023
22U
_0805_6.3
V6M
PC
2023
22U
_0805_6.3
V6M
12PC
2013
22U
_0805_6.3
V6M
PC
2013
22U
_0805_6.3
V6M
12
PC
2026
22U
_0805_6.3
V6M
PC
2026
22U
_0805_6.3
V6M
12
PC
2016
22U
_0805_6.3
V6M
PC
2016
22U
_0805_6.3
V6M
1
2PC
2014
22U
_0805_6.3
V6M
PC
2014
22U
_0805_6.3
V6M
1
2
+
PC
2002
470U
_D
2_2V
M_R
4.5
M@
+
PC
2002
470U
_D
2_2V
M_R
4.5
M@
1
2 PC
2006
22U
_0805_6.3
V6M
PC
2006
22U
_0805_6.3
V6M
1
2
PC
2028
22U
_0805_6.3
V6M
PC
2028
22U
_0805_6.3
V6M
12
PC
2019
22U
_0805_6.3
V6M
PC
2019
22U
_0805_6.3
V6M
12
PC
2008
22U
_0805_6.3
V6M
PC
2008
22U
_0805_6.3
V6M
1
2
PC
2025
22U
_0805_6.3
V6M
PC
2025
22U
_0805_6.3
V6M
12 PC
2032
22U
_0805_6.3
V6M
PC
2032
22U
_0805_6.3
V6M
12PC
2030
22U
_0805_6.3
V6M
PC
2030
22U
_0805_6.3
V6M
12
PC
2021
22U
_0805_6.3
V6M
PC
2021
22U
_0805_6.3
V6M
12
PC
2027
22U
_0805_6.3
V6M
PC
2027
22U
_0805_6.3
V6M
12
PC
2017
22U
_0805_6.3
V6M
PC
2017
22U
_0805_6.3
V6M
1
2
PC
2034
22U
_0805_6.3
V6M
PC
2034
22U
_0805_6.3
V6M
12PC
2024
22U
_0805_6.3
V6M
PC
2024
22U
_0805_6.3
V6M
12
PC
2010
22U
_0805_6.3
V6M
PC
2010
22U
_0805_6.3
V6M
12
PC
2033
22U
_0805_6.3
V6M
PC
2033
22U
_0805_6.3
V6M
12
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
+1.5V_PCIEP
TDC=0.46A
Peak Current=0.66A
4X4
7/17
7/17
LX_1.5V
SN
UB
_+
1.5
V
EN_1.5V
1.5VS_PG [31]
SLP_S3[34,9]
+1.5VSP +1.5VS
+3VS
+1.5VSP
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date 2014/12/31
15W
2012/04/03
Compal Electronics, Inc.
5249
0.3
1.5VSP
Thursday, December 20, 2012
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date 2014/12/31
15W
2012/04/03
Compal Electronics, Inc.
5249
0.3
1.5VSP
Thursday, December 20, 2012
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date 2014/12/31
15W
2012/04/03
Compal Electronics, Inc.
5249
0.3
1.5VSP
Thursday, December 20, 2012
PU601SY8032ABC_SOT23-6PU601SY8032ABC_SOT23-6
IN4
PG5
LX3
FB6
EN1
GND2
PC
604
22P
_0402_50V
8J
PC
604
22P
_0402_50V
8J
12P
R603
150K
_0402_1%
PR
603
150K
_0402_1%1
2
PC6030.1U_0402_10V7K@ PC603
0.1U_0402_10V7K@
12
PC
606
22U
_0805_6.3
VA
MP
C606
22U
_0805_6.3
VA
M
12
PR60210K_0402_5%PR60210K_0402_5%1 2
PR605100K_0402_5%
@ PR605100K_0402_5%
@
12
G
D
S
PQ6012N7002KW 1N SOT323-3
G
D
S
PQ6012N7002KW 1N SOT323-3
2
13
PR
601
4.7
_0402_1%
PR
601
4.7
_0402_1%
12
PR604
100K_0402_1%
PR604
100K_0402_1%
12
PJP602
JUMP_43X39
@
PJP602
JUMP_43X39
@
11
22
PJP601
JUMP_43X39@
PJP601
JUMP_43X39@
11
22
PC602
680P_0402_50V7K
PC602
680P_0402_50V7K
12
PC
601
22U
_0805_6.3
VA
MP
C601
22U
_0805_6.3
VA
M
12
PL6020.47UH +-20% PCMC042T-R47MN 6A
PL6020.47UH +-20% PCMC042T-R47MN 6A
1 2
PC
605
22U
_0805_6.3
VA
MP
C605
22U
_0805_6.3
VA
M
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
ADP_PRES [30]
OCP_A_IN [30]ADP_A_ID [30]
SRSET [43]
V_3.9K[43]
ADP_ID_CHK[30]
ADP_SIGNAL
+3VDS
+3VDS
+5VL
P1
+5VL
VIN
+3VDS
+3VDS
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date 2014/12/31
15W
2012/04/03
Compal Electronics, Inc.
5250
0.3
ADP_OCP
Thursday, December 20, 2012
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date 2014/12/31
15W
2012/04/03
Compal Electronics, Inc.
5250
0.3
ADP_OCP
Thursday, December 20, 2012
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date 2014/12/31
15W
2012/04/03
Compal Electronics, Inc.
5250
0.3
ADP_OCP
Thursday, December 20, 2012
PR11138.66K_0402_1%PR11138.66K_0402_1%
12
PR11193.24K_0402_1%
PR11193.24K_0402_1%
12
PC11033900P_0402_50V7KPC11033900P_0402_50V7K
1
2
PR11108.06K_0402_1%PR11108.06K_0402_1%
12
PR1121200K_0402_1%PR1121200K_0402_1%
12
PR1112100K_0402_5%PR1112100K_0402_5%1 2
PR1124
47K_0402_5%
PR1124
47K_0402_5%
12
PU1102ALM393DR2G SO8PU1102ALM393DR2G SO8
+3
-2 O
1
P8
G4
PR112386.6K_0402_1%PR112386.6K_0402_1%
12
C
B
E
PQ1102MMBT3906H_SOT23-3
C
B
E
PQ1102MMBT3906H_SOT23-3
1
2
3
PR1126100K_0402_1%PR1126100K_0402_1%
12
PR1108100_0402_5%PR1108100_0402_5%1 2
G
DS
PQ1101NDS0610_NL_SOT23-3
G
DS
PQ1101NDS0610_NL_SOT23-3
2
13
PR1118130K_0402_1%PR1118130K_0402_1%
12
C
B
E
PQ1104MMBT3906H_SOT23-3
C
B
E
PQ1104MMBT3906H_SOT23-3
1
2
3
PR1120470K_0402_1%PR1120470K_0402_1%1 2
PC11040.01U_0402_16V7K@ PC11040.01U_0402_16V7K@
12
PR1109
100K_0402_5%
PR1109
100K_0402_5%
12
PR1115
619_0402_1%
PR1115
619_0402_1%
12
E
B
C
PQ1103MMBT3904WH_SOT323-3
E
B
C
PQ1103MMBT3904WH_SOT323-3
2
31
PR111745.3K_0402_1%PR111745.3K_0402_1%
12
PR112513K_0402_1%PR112513K_0402_1%
12
PR112247K_0402_5%PR112247K_0402_5%
12
G
D
S
PQ5042N7002KW 1N SOT323-3
G
D
S
PQ5042N7002KW 1N SOT323-3
2
13
PR1114220K_0402_5%PR1114220K_0402_5%
12
PR1116
3.9K_0402_5%@PR1116
3.9K_0402_5%@
12
PD1102GLZ4.7B_LL34-2
@PD1102GLZ4.7B_LL34-2
@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
4/114/11 4/11
SB00000SA00
SB00000SA00
SB00000SA00
SB00000SA00
LATCHED_ALARM
BATT_B
MFET_B
MFET_A
MFET_A
MFET_B
LATCHED_ALARM
LATCHED_ALARM
BATT_A
LATCHED_ALARM [30]
FET_A[30]
FET_B[30]
BATT
+3VDS
BATT
+3VDS+5VL
+3VDS
BATT_A
+3VDS
BATT_B
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date 2014/12/31
15W
2012/04/03
Compal Electronics, Inc.
5251
0.3
Battery selector
Thursday, December 20, 2012
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date 2014/12/31
15W
2012/04/03
Compal Electronics, Inc.
5251
0.3
Battery selector
Thursday, December 20, 2012
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date 2014/12/31
15W
2012/04/03
Compal Electronics, Inc.
5251
0.3
Battery selector
Thursday, December 20, 2012
PQ
1207A
ME
2N
7002D
KW
-G 2
N S
OT
363-6
PQ
1207A
ME
2N
7002D
KW
-G 2
N S
OT
363-6
61
2
PQ
1207B
ME
2N
7002D
KW
-G 2
N S
OT
363-6
PQ
1207B
ME
2N
7002D
KW
-G 2
N S
OT
363-6
34
5
PR1209
10K_0402_5%
PR1209
10K_0402_5%
12
PR1214
10K_0402_5%
PR1214
10K_0402_5%
12
PQ
1202B
ME
2N
7002D
KW
-G 2
N S
OT
363-6
PQ
1202B
ME
2N
7002D
KW
-G 2
N S
OT
363-6
34
5
PR1206
220K_0402_5%
PR1206
220K_0402_5%
12
PR121210K_0402_5%PR121210K_0402_5%
1 2
PQ1203AO4409L 1P SO8PQ1203AO4409L 1P SO8
3 65
78
2
4
1
PR12131M_0402_5%PR12131M_0402_5%1 2
PQ
1201B
ME
2N
7002D
KW
-G 2
N S
OT
363-6
PQ
1201B
ME
2N
7002D
KW
-G 2
N S
OT
363-6
34
5
PR120210K_0402_5%PR120210K_0402_5%1 2
PU1102BLM393DR2G SO8PU1102BLM393DR2G SO8
+5
-6 O
7
P8
G4
PC12010.1U_0603_25V7MPC12010.1U_0603_25V7M
12
G
D
S PQ12092N7002KW 1N SOT323-3
G
D
S PQ12092N7002KW 1N SOT323-3
2
13
PR1215
100K_0402_5%
PR1215
100K_0402_5%
12
PQ1206AO4409L 1P SO8PQ1206AO4409L 1P SO8
365
78
24
1
PD1204BAV99WT1G_SC70-3PD1204BAV99WT1G_SC70-3
2 31
PR1210
10K_0402_5%
PR1210
10K_0402_5%
12
PD1201BAV99WT1G_SC70-3PD1201BAV99WT1G_SC70-3
2 31
PR1218
137K_0402_1%
PR1218
137K_0402_1%
12
PR1201
10K_0402_5%
PR1201
10K_0402_5%
12
PR1205
470K_0402_5%
PR1205
470K_0402_5%
12
PR1204
470K_0402_5%
PR1204
470K_0402_5%
12
PR1216
200K_0402_1%
PR1216
200K_0402_1%
12
PR1217
64.9K_0402_1%
PR1217
64.9K_0402_1%
12
PD1202
SX34H_SMA2
PD1202
SX34H_SMA2
21
PR1211
470K_0402_5%
PR1211
470K_0402_5%
12
PD1203
SX34H_SMA2
PD1203
SX34H_SMA2
21
PR1207
470K_0402_5%
PR1207
470K_0402_5%
12
PQ1205AO4409L_SO8PQ1205AO4409L_SO8
3 65
78
2
4
1
PQ1204AO4409L 1P SO8PQ1204AO4409L 1P SO8
365
78
2
4
1
PR1203
10K_0402_5%
PR1203
10K_0402_5%
12
PQ
1202A
ME
2N
7002D
KW
-G 2
N S
OT
363-6
PQ
1202A
ME
2N
7002D
KW
-G 2
N S
OT
363-6
61
2
PQ
1201A
ME
2N
7002D
KW
-G 2
N S
OT
363-6
PQ
1201A
ME
2N
7002D
KW
-G 2
N S
OT
363-6
61
2
PR1208
220K_0402_5%
PR1208
220K_0402_5%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
P age 1P age 1P age 1P age 1
Solution D escriptionSolution D escriptionSolution D escriptionSolution D escription R ev .R ev .R ev .R ev .P age#P age#P age#P age# T itleT itleT itleT itle
V ersion C hange L ist ( P . I . R . L ist )V ersion C hange L ist ( P . I . R . L ist )V ersion C hange L ist ( P . I . R . L ist )V ersion C hange L ist ( P . I . R . L ist )
ItemItemItemItem Issue D escriptionIssue D escriptionIssue D escriptionIssue D escriptionD ateD ateD ateD ateR equestR equestR equestR equest
O w nerO w nerO w nerO w ner
1 43
2 Reserve PC324,322,323,325326,327,328,329,330,331,332,33344
443
454
455
466
7 46
RF solution
RF solution
8
489
2012/08/06
Reserve PC130,129,131,139,133,132,134,140,136,135,137,141,143,142,144,145,146,147,148,149,151,150,152,153,138
2012/08/06
Reserve PC419,401
RF solution2012/08/06
Add PC403,404,405
2012/08/06 RF solution
Add PC305,304,308,309
2012/08/06 RF solution
Reserve PC512,513
Add PC502,503
2012/08/06
2012/08/06
RF solution
RF solution
48 Reserve PC264,267,266,269,265,268 2012/08/06 RF solution
Add PC214,215,207,203,232,236 2012/08/06 RF solution
10 48 Change PC233,234 from SF000001280 to SF000004M00 2012/08/09 Change the hieght to 6mm
11 47 Change PR234 from 19.1K to 62K 2012/08/10 HP suggestion
12 Change PQ203,204,211 from SB00000K300 to SB00000U3002012/09/11 Design change48
13 Change PQ201,205,209 from SB00000SJ00 to SB00000WX002012/09/13 Design change48
14 44 Change PQ301,302 from SB00000JM00 to SB00000IA00 2012/09/17 Design change
15 44 Change PQ303 from SB00000CT00 to SB00000H700 2012/09/17 Design change
16 44 Change PQ304 from SB00000N800 to SB00000TZ00 2012/09/17 Design change
17 45 Change PQ401 from SB00000H800 to SB00000IA00
18 45 Change PQ402 from SB00000N800 to SB00000TZ00
19 46 Change PQ501 from SB00000H800 to SB00000IA00
20 46 Change PQ502 from SB00000N800 to SB00000H700
2012/09/17
2012/09/17
2012/09/17
2012/09/17
Design change
Design change
Design change
Design change
21 51 Reserve PR1101,1102,1103,1104,1105,1106,1107,PC1101,1102,PU1101,PD11012012/09/25 HP suggestion
22 45 Change PD401 from SC600000D00 to SCS00006400 2012/10/2 HP suggestion
23 45 Change PR416 from SD034100380 to SD028470180 2012/10/2 HP suggestion
24 43 Change PL101 from SH00000MR00 to SH00000NW00 2012/10/2 Design change
25 23 Change PR240,243,249 from SD001470B80 to SD0000102802012/10/2 Design change
26 23 Reserve PL201 2012/10/2 Design change
27 25 Reserve PL301 2012/10/2 Design change
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.3
PWR - PIR
52 52Thursday, December 20, 2012
2011/10/03 2014/12/31Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.3
PWR - PIR
52 52Thursday, December 20, 2012
2011/10/03 2014/12/31Compal Electronics, Inc.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-9241P 0.3
PWR - PIR
52 52Thursday, December 20, 2012
2011/10/03 2014/12/31Compal Electronics, Inc.
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VBL20 from DB0 to DB1 LA-9241P REV:0.1 -> 0.2 Modify <2012.07.04.~2012.08.07. >
-Change UH1.B17 to HDD_HALTLEDItem ImpactDate PageRev. Modify DescriptionChange Cause
0.2 1 7/6 CKT 13 -Follow HP GPIO table
0.2 2 7/6 CKT 14,37 -Follow HP GPIO table -Change UH1.G17 and U30.26 to PWRSV_SEL#.
0.2 3
0.2 4
0.2 5
0.2 6
0.2 7
0.2 8
0.2 9
0.2 10
110.2
0.2 12
0.2 13
0.2 14
0.2 15
0.2 16
0.2 17
0.2 18
0.2 19
0.2 20
0.2 21
CKT7/6 -Follow HP GPIO table15 -Change UH1.U4 to WLAN_TRAMSIT_OFF#
16CKT, LAYOUT7/6 -For NFC function -Change UH1.H6 to NFC_RST#, and add QH10, RH238, RH239 for NFC SMBUS level shift
7/6 CKT, LAYOUT 18,23 -Follow HP GPIO table -Change UH1.C16 to ODD_EN. Change Q25.1 netname to ODD_EN and Q25.2 netname to ODD_EN#
-Follow HP GPIO table7/6 18CKT, LAYOUT -Change UH1.U12 and RH185.1 to NFC_INT
CKT, LAYOUT7/6 19 -Add PU resistor to avoid issue. -Add RH240 and RH241PU resistor of THERM_SCI# and WWAN_TRANSMIT_OFF#
7/6 CKT, LAYOUT 22 -eDP MUX -Modify eDP connector signal source from eDP MUX.
7/6 CKT 23 -Power driving -Change R1316 from 100K to 10K ohms
7/6
7/6
CKT, LAYOUT 25 -Change WWAN connector to NFCC -Modify JMINI3 connector type and pin define
CKT, LAYOUT 26 -Move Mute circuit to S/B -Move QA2 and R95 to S/B
7/6 26CKT, LAYOUT -Audio Combo Jack -Delete MIC_SENSE# circuit.
7/6 CKT, LAYOUT 27 -Follow reference design -Change C91 and C94 to 2.2uF as spec
7/6 CKT, LAYOUT 28 -No ACCELEROMETER LED -Delete LED1
CKT, LAYOUT7/6 29 -NIC yellow ban issue -Add C350 and C373 to +1.05VM_LAN
7/6 CKT, LAYOUT 30 -Follow HP KBC pin define. -Modify U17 pin define.
7/6 CKT, LAYOUT 34 -Avoid leakage issue -Swap Q40 drain and source
35CKT, LAYOUT7/6 -MXM no display out issue -Swap JMXM1 PEG TX and RX bus
36CKT, LAYOUT7/6 -Avoid eDP signal quality fail issue -Change U42 to PS8321 which had include repeater function
7/6 CKT, LAYOUT 36 -To support DP1.2a -Change U26 to PS8338 to support DP1.2a spec.
39CKT, LAYOUT7/6 -Add NFC function -Add JNFC1 circuit.
0.2 22 7/9 CKT, LAYOUT 13 -HP request -Delete PCH XDP circuit
0.2 7/9 CKT, LAYOUT
0.2 7/9 CKT, LAYOUT
0.2 7/9 CKT, LAYOUT
-HP request1323 -Add QH11
-HP request16 -Delete U39, U40, RH23224
25 -HP request30 -Delete 16pin SPI ROM socket
-HP request30CKT, LAYOUT7/90.2
CKT, LAYOUT7/90.2
CKT, LAYOUT7/90.2
-Add R537,Q7326
27 35 -HP request -Swap MXM port A and port C for layout smoothly
3828 -Follow spec pin define -Modify JTP1 and JTP2 pin define
CKT, LAYOUT7/90.2 29 39 -Follow spec pin define -Modify JNFC1 pin define
7/1030
31
32
33
0.2
0.2
0.2
0.2
CKT, LAYOUT
7/10 CKT, LAYOUT
7/10 CKT, LAYOUT
7/10 CKT, LAYOUT
6,11,12 -Following Intel CRB by HP request -Modify JCPU1 pin AM3,F16,F13 netname. Delete RC73,RC76,C13,C75. Add QD3,RD27,RD28
8 -HP request -Delete RC106, RC107
30 -HP request -Modify R537 to 10K ohms
34 -HP request -Modify R363 to 4.7K ohms
0.2 CKT, LAYOUT7/1134 36 -Follow vendor request -Add CC75,CC76,CC77,CC78,CC79,CC80,CC81,CC82. Modify U26 circuit
7/11 CKT, LAYOUT0.2 35 29 -HP request -Delete R135, R139, R151, R152, R140, R142 for layout.
CKT, LAYOUT7/120.2
0.2 7/12 CKT, LAYOUT
36
37
22 -HP request -Delete C6
23 -HP request -Delete C54. Add R539.
0.2 7/12 CKT, LAYOUT
0.2 7/12 CKT, LAYOUT
38
39
24 -HP request -Change U3 to TC7SET00
24 -FAN module pin define wrong. -Modify JFAN1 pin define by follow latest spec.
7/12 CKT, LAYOUT0.2 40 37 -Follow latest Smart card module pin define. -Modify J3 pin define.
0.2 7/12 CKT, LAYOUT41 38 -Follow latest KB connector pin 1 location. -Modify JKB1 pin define.
7/13 CKT, LAYOUT0.2
CKT, LAYOUT0.2
CKT, LAYOUT0.2
CKT, LAYOUT0.2
0.2
0.2
42
43
44
45
7/13
7/13
7/13
27,39 -Reduce layout spacing -Move R494,R495,LA5,LA9,CA37,CA38,DA4 to sub board
30 -Correct KBC circuit -Change U17.68, C179.1, C188.1 to +RTCVCC. -Delete R224, R460, R220, R223, R496, R497, R498, R499, R244, R269, R236, RH220. -Change RH222.1, RH223.1, RH224.1, CH97.1, CH98.1, UH5.8 to +3VDS-Reserve R541, R542 for NFC TX/RX
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
39 -Follow ME connector list -Modify JVGA1 footprint and pin define.
-Follow ME connector list39 -Modify JTB1 pin define, add WL/BT_LED# signal.
46 7/16 CKT, LAYOUT 14 -ESD request -Reserve CH107
47 -ESD requestCKT, LAYOUT 257/16 -Reserve C375
48 CKT, LAYOUT -ESD request7/16 27 -Change DA2 and DA3 P/N.
49 -ESD request27CKT, LAYOUT7/16 -Delete DA1
50 7/16 CKT, LAYOUT 28 -ESD request -Change D11 P/N
-ESD request29CKT, LAYOUT7/1651 -Change D12 and D13 P/N
-ESD request33CKT, LAYOUT7/16 -Add D4252
-Follow HP latest generation smart card connector pin define.37CKT, LAYOUT7/16 -Modify J3 pin define.53
7/16 CKT, LAYOUT 38 -ESD request54 -Change D32 P/N.
CKT7/17 -Change JP3 to JDIMM111 -Correct connector name55
CKT, LAYOUT7/17 -Modify U26 and U42 to PI3VDP12412ZHEX and releate circuit.-Change DP and eDP MUX to passive solution3656
-Modify JTB1 pin define. Add CH108, CH109, CH110, CH111. Connect PCIE port 1 and port 2 to JTB1.-Follow HP requestCKT, LAYOUT7/17 17,3957
-Delete RH186, and add QH12 to invertion PCH_GPIO56 signal for CR_SX_WARN#-Follow HP requestCKT, LAYOUT 147/1858
-Change RH165.2 net name to TB_HOT_PLUG# for TBT function.-Follow HP request17CKT, LAYOUT7/1859
-Change JP6.13 connection to 8051TX_STBYLED# (instead of 8051TX_STBLED#)-Change Q35.2 connection to 8051TX_STBYLED# (instead of 8051TX_STBLED#)-Add a 100K pullup resistor between signal PVT_CS# and +3VDS power rail.-Make these resistors as non-install (from Install): R219,R266,R258,R253,R216,R264-Make R215 install-Change R436 to 1K (from 10 ohm)-Make these resistors as install (from un-install): R242,R254,R500,R277,R269,R262,R218-Make U18 as install.
-Follow HP request30,32CKT, LAYOUT7/1860
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
53
Compal Electronics, Inc.
HW_PIR1
0.5LA-9241P56
2010/12/012011/11/5
C
Thursday, December 20, 2012
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
53
Compal Electronics, Inc.
HW_PIR1
0.5LA-9241P56
2010/12/012011/11/5
C
Thursday, December 20, 2012
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
53
Compal Electronics, Inc.
HW_PIR1
0.5LA-9241P56
2010/12/012011/11/5
C
Thursday, December 20, 2012
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VBL20 from DB0 to DB1 LA-9241P REV:0.1 -> 0.2 Modify <2012.07.04.~2012.08.07. >
-Modify PM_APWROK circuitItem ImpactDate PageRev. Modify DescriptionChange Cause
0.2 61 7/18 31 -Follow HP requestCKT, LAYOUT
-Modify JTB1 connector pin define. Add HDD_HALTLED and PWR_GD0.2 397/1862 -Follow HP requestCKT, LAYOUT
-Reserve RH242 and RH243. Add off page symbol of PCH_SPI_WP# and PCH_SPI_HOLD#16,307/190.2 -Follow HP requestCKT, LAYOUT63
-Non-install CH101-Follow Intel reference schematic V1.2207/190.2 CKT64
-Delete C79 and C85. Change R457.1 power rail to +3VDS257/19 CKT,LAYOUT650.2 -Follow HP request
-Delete R25430CKT,LAYOUT7/19660.2 -Follow HP request
67 7/19 CKT,LAYOUT 32 -Change R483.1 and R482.1 connection to +3VS. Change R330.1, R329.1, and R328.1 connection to GND0.2 -Follow HP request
68 7/19 CKT,LAYOUT0.2 36 -Follow HP request -Delete CC70, CC71, CC75, CC76, CC77, CC78, CC79, CC80, CC81, CC82
69 -Modify pin define JVGA1 and JCR1 pin define for better return path-Follow HP request39CKT,LAYOUT7/190.2
-Follow HP request40CKT,LAYOUT70 7/190.2 - Connect signal ADP_ID_CHK to pin 78 of KBC via a 0 ohm resistor (install this resistor).- Connect NFC_RX to pin 86 of KBC directly, and then move R541 (install) between ADP_ID_CHK and pin 86 of KBC. - Connect NFC_TX to pin 87 of KBC directly, and then move R542 (install) between pin 87 of KBC and signal PLT_SEL.
71 CKT,LAYOUT 14 -Follow HP request -Add ME debug connector JME10.2 7/20
16CKT,LAYOUT72 -Correct screw hole size.-Follow latest ME drawing.7/200.2
19,20CKT,LAYOUT -Delete CH60, CH62, CH63, CH102-Follow HP request.7/20730.2
-Add RA28 and Q75 for REC_MUTE_CTRL_KB signal. Modify JKB1 pin define.-Follow HP request.19,21,38CKT,LAYOUT7/20740.2
-Change DA2, DA3, D32 P/N-Follow ESD request.27,38CKT7/20750.2
CKT,LAYOUT 29,34 -Change C110 to 22uF, Delete C231. Change Q170A lcation to Q7A-Follow HP request.0.2 76 7/20
-Modify RP1 pin define.-Layout smooth30CKT,LAYOUT770.2 7/20
CKT,LAYOUT 30 -Add D44 and D450.2 78 7/20 -Follow HP request.
31CKT,LAYOUT -Modify PWR_GD circuit.-Follow HP request.7/20790.2
-Change C258 and C255 to 1uF. Non install RH225.-Vendor's suggestion37CKT7/20800.2
-Reserve SIO_GPIO44 PD R554, and modify R328, R329, R330 value to 4.7K. Modify R482, R483 value to 10K-Modify for 2 DIMM and 4 DIMM SKU.38CKT7/20810.2
-Connection RH55.2 to power rail +RTCVCC-Schematic wrong.147/23820.2 CKT,LAYOUT
147/23830.2
15,17,187/23840.2 CKT,LAYOUT
CKT,LAYOUT -Follow HP request. -Move QH12 to sub board. Add CR_SX_WARN# PU 10K ohms RH244
-No connection to other page. -Delete FN14, FN15, USB_OC0#_R, USB_OC1#_R, USB_OC2#, USB_OC3#, USB_OC4#_R, PCH_GPIO24, FN_CLK2, PCH_GPIO37 off page symbol.
16CKT,LAYOUT7/23850.2 -Modify screw hole size.-Follow latest ME drawing.
0.2 86 7/23 CKT,LAYOUT 17 -Correct net name -Change RH171.1 connection to ODD_EN
7/23870.2 -Non install RH184 and RH185. Add C389, C390, C391, C392. Change C121 to 1000pF. Change C322 to 100pF. Delete Q37, R366, R361.-Follow VBK1018,29,30,34
88 7/230.2 22,30 -Follow RF request. -Reserve C393, C394, CH112CKT,LAYOUT
0.2 89 7/23 26CKT,LAYOUT -MIC_SENSE circuit had been removed. -Delete RA7.
7/23900.2 -Combine QA2B with QA1A.-Reduce layout spacing27CKT,LAYOUT
7/23910.2 CKT,LAYOUT
CKT,LAYOUT
-Change R286 to 10K31 -Follow HP request.
7/2392 -Combine Q63 and Q72 to Dual channel Q76. Delete R516, R545, CC84, C371.36CKT,LAYOUT0.2 -Follow HP request.
-Change SEL to SEL_eDP_MUX. Change SEL_DP to SEL_DP_MUX367/2393 -Modify netname to more clear.CKT,LAYOUT0.2
-Modify RPH1 and RPH2 pin define-Layout smooth177/230.2 94 CKT,LAYOUT
-Modify JMINI3 pin define.-Follow latest NGFF pin define.257/24 CKT,LAYOUT950.2
-Modify JFP1 pin define.-Follow latest FP spec.28CKT,LAYOUT7/24960.2
-Add C420, C421, C422, C422, C423, C424, C425, C426, C427, C428, C429, C430, C431, C432, C433, C434, C435, C436, C437, C438, C439, C440, C441, C442, C443, C444, C445, C446,C447, C448, R555 and C419. Change R437.2 netname to PCH_SPI_CLK_EC.
-Follow EMI request30,38CKT,LAYOUT7/24970.2
-Follow HP request39CKT,LAYOUT7/24980.2 -Modify JUB1 pin define.
-Follow HP request5,9,20CKT,LAYOUT7/25990.2 -Delete RC24, RC96. Change UH1 pin AJ12 and AJ14 connection to +1.05VS
-Follow HP request30 -Change U18 to socket and add &UH2 for KBC ROMCKT,LAYOUT7/251000.2
-Follow HP request101 7/25 CKT,LAYOUT 30 -Connect JP6.13, U17.115, and R255.1 to TX_STBY_LED. Add R559, R560, and Q770.2
-Reduce layout spacingCKT,LAYOUT7/25102 -Combine Q56 and Q57 to dual channel Q79360.2
-Modify JMINI3 and JSIM1 pin define.-Follow latest NGFF specCKT,LAYOUT7/25103 250.2
-Install RH242, RH244. Add R561, R562. Noninstall R541, R5420.2 16,30104 7/26 CKT,LAYOUT -Follow HP request
-Change U11 to SLB96560.2 28CKT,LAYOUT7/26105 -Follow RFQ spec
-Add R563, R56436CKT,LAYOUT7/270.2 -Follow HP request106
-Non install QC15 -Follow Intel reference schematicCKT,LAYOUT7/301070.2
-PCH_SPI_CLK reserve CH113 to GND-Follow RF request16CKT,LAYOUT7/301080.2
-Change R10.1 to +5VDS and Q20.3 to +3VDS for layout easy. Modify JVGA1 and JCR1 pin define.22,39CKT,LAYOUT7/301090.2 -Follow HP request
-Modify JHDD1, JODD1 and JCR1 footprint.23CKT,LAYOUT7/30110 -Follow latest connector list0.2
-Modify JNFC1 pin define.39 -Correct JNFC1 pin defineCKT,LAYOUT7/301110.2
-Modify Q4A circuit. Change JTB1.95 connection to +3VDS.25,39CKT,LAYOUT7/311120.2 -Follow HP request
-Install Q29 and Q3125CKT7/311130.2 -Wireless LED fail issue.
26 -Delete Q21,Q22,R454,R14. Delete JEDP1.35 signal0.2 114 7/31 -No LOGO KBL functionCKT,LAYOUT
14 -Change RH62.2 netname to PWRSV_SEL#7/310.2 115 -Correct netnameCKT,LAYOUT
0.2 116 8/01 23,33,39 -Swap SATA bus port 2 and port 5. JCR1.35 connection to PCH_PCIE_WAKE#CKT,LAYOUT -HP request
8/011170.2 -HP requestCKT,LAYOUT -Uninstall Q68, R459. Change PCH.AT3 and RH198.2 netname to Sec_HDD_DET. Change PCH.AP1 and RH180.2 to mSATA_DET#. Delete Q48. Add R565.18,23,25
8/011180.2 -Change R492.2 connection to KBC_PWR_ON-PWR request24CKT,LAYOUT
8/01 -Change KBC symbol to SMC1322-Follow RFQ spec301190.2 CKT
-Add CC84, CC85, CC86. Change RD6 to 33ohms. RH33.1 connection to GND. Delete RH201, RH202. Q4.2 connection to BT_ON6,11,13,188/031200.2 CKT,LAYOUT -HP request
-Swap L3 pin define for layout smooth8/03121 -Layout smoothCKT,LAYOUT0.2 22
-Modify JODD1, JMINI3 footprint8/03122 -Follow ME connector list23LAYOUT0.2
-Q4.2 connection to BT_ON. Change R437 to 33 ohms. Change R540 to 4.7K. Change JVGA1 pin 39 and 40 connection to +3VDS8/03 25,30,39CKT,LAYOUT -HP request1230.2
-Add CH1148/03 -RF request30CKT,LAYOUT1240.2
-Reserve CC87. Change JCPU1 pin AM43 and pin AL44 ball name-HP request9,15CKT,LAYOUT8/061250.2
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
54
Compal Electronics, Inc.
HW_PIR2
0.5LA-9241P56
2010/12/012011/11/5
C
Thursday, December 20, 2012
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
54
Compal Electronics, Inc.
HW_PIR2
0.5LA-9241P56
2010/12/012011/11/5
C
Thursday, December 20, 2012
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
54
Compal Electronics, Inc.
HW_PIR2
0.5LA-9241P56
2010/12/012011/11/5
C
Thursday, December 20, 2012
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VBL20 from DB0 to DB1 LA-9241P REV:0.1 -> 0.2 Modify <2012.07.04.~2012.08.14. >
-Change RC78 to 10Kohms. Install RH148 and change to 2.2Kohms. Add R567, R568 and R569.Item ImpactDate PageRev. Modify DescriptionChange Cause
0.2 126 8/07 7,16,25,29 -Follow HP requestCKT, LAYOUT
-Change TX_STBY_LED net name to TX_STBY_LED#0.2 30127 8/07 -Correct netnameCKT, LAYOUT
-Modify JDIMM1, JDIMM2, JBATT1, JKB1, JCR1, JNFC1, JP6 connector footprint0.2 -Follow latest ME connector list11,12,13,30,38,39
CKT, LAYOUT8/07128
-Reserve C449, C450, C4510.2 -RF request22,35CKT, LAYOUT8/08129
-Modify JCR1 and JNFC1 pin define.0.2 39130 8/08 CKT, LAYOUT -Follow latest ME connector list
-Modify JMXM1 footprint390.2 131 -Follow latest ME connector list8/09 CKT
1320.2 5,14,30 -Add RC106 and change UC1.1 connection to VR_ON. Change UH7.5 and UH3.5 connection to +3V_PCH power rail. Change RH235 to 0ohms. Add RH245 and connection toVCC1_PWRGD. Change R277.1 and R253.2 connection to VR_ON
8/10 CKT, LAYOUT -Follow HP request
0.2 133 39 -Change JCR1.21 connection to +3VDS8/10 CKT -Add +3VDS power rail for USB repeater
8/10 -Modify JTP1 pin define.381340.2 -Follow TP module pin defineCKT
-Reserve C452, C453, C454, C455, C456, C457, C458 8/10 -RF request0.2 135 34CKT, LAYOUT
0.2 -Material EOL8/14 -Change Q59, Q70, Q55, Q58, Q68, Q75, Q39, Q61, Q51, Q52, Q53 to SB000009Q80 (S TR 2N7002KW 1N SOT323-3 )CKT136
CKT -Change D4, D8, D10, D21, D27 to SCS00000Z00 (S SCH DIO RB751V-40 SOD-323)8/14 -Material EOL0.2 137 24,25,30,32
VBL20 from DB1 to DB2 LA-9241P REV:0.2 -> 0.3 Modify <2012.09.03.~ 2012.09.28 >
ImpactItem Change Cause Modify DescriptionRev. PageDate0.3 1 -Change UA1 P/N to 92HD91B2X5NLGXWCX8-Chang UA1 to HP P/N9/03 26CKT
9/03 -Follow HP request -Install R451, R452. Noninstall R561, R562, R284. Change R282 to 10K ohms. Change R289 to 11.5k ohms20.3 CKT 30,31
9/07 CKT0.3 3 -Delete TX_STBY_LED#, VGA_RED, VGA_GRN, VGA_BLU, VGA_DDCCLK, VGA_DDCDATA, CRT_HSYNC, and CRT_VSYNC off page symbol-No used30,36
-Add VGA circuit and connector. Remove JVGA1 BTB connector. Add JFUN1 connector. Add USB3.0 repeater and connector40.3 9/07 36,39,40 -Follow latest ME drawingCKT, LAYOUT
0.3 5 -Add WWAN_FULL_PWR and WWAN_RSVD2 PU R599 and R600 to +3V_WWAN. Delete T126 and T128259/10 CKT, LAYOUT
-Delete R219, R258, R500, R262, R264, R266, R216, R241, R242, R253, R549, R271. Change U17 pin69 to KBC_XTA2, pin 71 to KBC_XTAL1. Add C487, C488, Y4Connect EC_MUTE# to KBC.91. MAIN_BAT_DET# to KBC.92. pin 70 of KBC to GND. ADP_ID_CHK signal to KBC.78. A\DP_EN signal to KBC.63
60.3 CKT, LAYOUT9/10 30
-Follow HP request
-Follow HP request
-Delete RC102 and RC103. Connect CPU.AL35 pin to VCCSENSE. Connect CPU.AK35 pin to VSSSENSE. Delete RH165 and connect PCH.M1 to TB_HOT_PLUG# directly. ConnectRPH1.3 to TB_HOT_PLUG# directly. Delete RH226 and connect pin AD12 of PCH to +3V_PCH power rail. Delete RC106 and connect UC1.1 to VR_ON. Noninstall RC36,RC38,RC40,RC43,RC45,RC47. Delete RC66. Connect CPU.AT26 pin to CPU_PLTRST#. Delete RC30. Connect CPU.AL34 pin to H_CPUPWRGD. Change RC55.1 connection toH_CPUPWRGD. Delete RC27. Connect CPU.AM35 pin to PCH_THERMTRIP#_R. Delete RC93 and connect SLP_S3# to QC5.5. Delete R351. Connect EN_P1V5 to JDOCK1.140. ChangeC299 to 0.01uF. Delete R336 and connect C299.1 to ON/OFFBTN_KBC# . Connect ON/OFFBTN_KBC# to JDOCK1.49. Delete R287. Connect joint point of R286.1 and U18.1 to VR_ON.Add R601 4.7K PU to +3VS on signal SIO_GPIO42. Noninstall R601. Delete RH92, RH93, RH221, RH94, RH95, RH107, RH103, RH203, RH114, RH116, RH205, RH122, RH124, RH126,RH127, RH128, RH130
0.3 7 9/11 CKT, LAYOUT 5,9,10,14,15,17,20,31,32, 33
-Follow HP request
-Delete R543, R561, R562. Delete signal ADP_ID_CHK connection to KBC.86 pin. Delete R249 and connect signal OCP_PWM_OUT to KBC.59 pin. Delete R251 and connect signalPM_PWROK to KBC.60 pin. Delete R256 and connect signal EN_P1V5 to KBC.38 pin. Delete R277 and connect signal VR_ON to KBC.72. Change RP1 and RP2 to 100K.
CKT, LAYOUT9/1280.3 -Follow HP request30
-ME move LID SW from Power board to Function baord.CKT, LAYOUT9/120.3 9 38, -Modify JPWR1 and JFUNC1 connector pin defein.
0.3 9/12 CKT, LAYOUT -ME rotate Smart connector 90 degree. -Modify J3 pin define.3710
-Follow latest ME drawingCKT, LAYOUT9/130.3 11 16 -Delete H4, H32, H34, H41, JP2. Add H42, H43, H44, H45, H46. Modify JEDP1, JSIM1, JFP1, JVGA2, J3, JKB1, JTP1. JFUN1 pin define and footprint.
0.3 9/14 CKT, LAYOUT -Delete UH7, RH235. Move RH236, CH106 to page 31. Modify POWER OK circuit14,3112 -Follow HP request
0.3 -Modify JEDP1, UH5, JTB1, JUSB1 and JKB1 pin define and footprint.CKT, LAYOUT9/14 -Follow ME and DFX request13 22,30,38,39,40
-Swap L35, L36, L37 for layout smoothly.0.3 4014 -Layout request9/17 CKT, LAYOUT
-Follow ME connector list15 380.3 -Change JPWR1 footprint and pin define.CKT, LAYOUT9/17
-Modify JKB1 pin define.0.3 3816 -Follow Keyboard spec9/17 CKT, LAYOUT
280.3 -Modify JFP1 pin define.CKT, LAYOUT9/18 -Follow ME drawing17
-Add a 0ohm resistor between JCR1.5 and signal PCH_PCIE_WAKE#. Then make this resistor open. Change QH11 to P MOS. Change RH30 to 2.2K ohms0.3 13,3918 -Follow HP request9/19 CKT, LAYOUT
-Layout smooth19 340.3 -Delete J2CKT, LAYOUT9/19
-Change RH74 to 100K. Change RH147.1 power rail to +3VS. Delete RA13, CA20. Change R227 to 3K. Delete R393, CC67, and connector U30.23 to PLT_RST#.0.3 14,26,30,3720 -Follow HP request9/20 CKT, LAYOUT
220.3 -Modify JEDP1 connector circuit. Add one more +3VS power pin for power consumptionCKT, LAYOUT9/20 -Correct circuit short issue21
9/20 CKT, LAYOUT -Change D3 and DH1 to RB751V-40_SOD323-20.3 22,2622 -Change to common part.
0.3 -Reserve CFG9 PD resistance RC106. Non-install RH39, RH40, RH41, RH44, RH48, RH47, RH46. Change R436 to 100K and connection R436.2 to GND. Delete R557, Non-install R358, C374CKT, LAYOUT9/21 -Follow HP request23 8,13,30,39
9/21 CKT, LAYOUT -Change L29.2 netname to DAC_RED. L30.2 netname to DAC_GRN. L31.2 netname to DAC_BLU0.3 3624 -Netname issue.
9/23 5,30,31,470.3 -Change netname VR_ON to PWR_GD, change netname PWR_GOOD_3 to VGATECKT, LAYOUT25 -Follow HP request
-Non install D21. Delete RH213, RH216, and change netname0.3 20,309/24 -Follow HP request26 CKT, LAYOUT
0.3 -Delete Q79, Q80, C475, C477, C478, R588, R587. Change +3VDS_P power rail to +3VS.CKT, LAYOUT27 -No need another DC/DC circuit to provide +3VDS_P to U44.9/24 40
-Delete R9, R10, R11, Q12, Q20, C1, C7, C8, U24, C226, C221, C222, U25, C218, C223, C219, C227, R354, R356, R357, Q9. Add U47, C497, C498, C499, U45, R603, C489, C490, C491,C492, U46, R604, C493, C494, C495, C496, Uninstall R370, R373, Q43, Q44, R490
0.3 229/25 -Change +3VS, +5VS and +LCDVDD power rail soultion28 CKT, LAYOUT
300.3 -Install R237, R235, R234, R233, R231CKT, LAYOUT29 -Follow HP request9/25
3130 CKT, LAYOUT -Reserve R605 and connect R605.1 to SUSCLK_KBC0.3 9/25 -Reserve for EC CLK issue
31 5,22,34,409/260.3 -Change JXDP1.47 connection to PM_PWROK via a 0ohm resistor. Add a C502 (10uF cap) for +3VS decoupling. Change C489 and C492 value to 10uF or 4.7uF. Change C494 and C496 to10uF or 4.7uF. Change C499 value to 4.7uF and make R480 as install. Change C493 and C490 to 0.01uF
CKT, LAYOUT -Follow HP request
32 -Change R375.1 connection netname to SLP_S3#0.3 9/26 34 -Correct NetnameCKT, LAYOUT
33 CKT, LAYOUT -Follow ME request38,399/260.3 -Modify JP9 and JFUN1 pin define.
34 -Modify +1.05VS power circuit.0.3 9/26 34 -Follow HP request.CKT, LAYOUT
-Delete R339, R340, R341, R342. Add R606, R607, R608 PU to +3VS. Change R408 to 200K ohms. Uninstall C295.35 CKT, LAYOUT -Follow HP request.33,35,389/270.3
-Change Y2 to smaller (32x25 mm) package.0.3 9/27 29 -Material shortage issueCKT, LAYOUT36
CKT, LAYOUT 349/280.3 -Add C50337 -Follow HP request.
ckT38 -Change RH152, RH153 to 499ohms.0.3 10/09 16 -Follow HP request.
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
55
Compal Electronics, Inc.
HW_PIR3
0.5LA-9241P56
2010/12/012011/11/5
C
Thursday, December 20, 2012
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
55
Compal Electronics, Inc.
HW_PIR3
0.5LA-9241P56
2010/12/012011/11/5
C
Thursday, December 20, 2012
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
55
Compal Electronics, Inc.
HW_PIR3
0.5LA-9241P56
2010/12/012011/11/5
C
Thursday, December 20, 2012
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VBL20 from DB1R to SI1 LA-9241P REV:0.3 -> 0.4 Modify <2012.10.11.~ 2012.11.09>
-Change RA14 to 0 ohm. Change C91, C94 to 150u. Change R97, R98, R102, R104 to 1%. Non-install R106, R107. Change C95 to 0.47u X5R. Change QA1.4, R110.2, Q6.1, R111.2, Q6.4 toAGND.
Item ImpactDate PageRev. Modify DescriptionChange Cause0.4 1 10/11 26,27 -Follow IDT requestCKT, LAYOUT
-Non-install D42. Install D32.0.4 3310/112 -Follow ESD request.CKT,
10/11 350.4 -Re-arrange MXM DP port. Port A for Thunder Bolt. Port B for Dock. Port C for EDP. Port D for SWITCH-Follow HP request3 CKT, LAYOUT
5,14,30,3410/124 -Follow HP request -Reserve RC108, UH6, CH116, R610. Change U17.85 and R276.1 connection netname to RSMRST#_EC. Change R455 to 47K. Add Q18A, C504, R609. Modify +3V_PCH power circuit0.4 CKT, LAYOUT
-Install R567, D21. Add R612, R616, Q80, R614, Q79. Delete R602, C504, R609, R456, Q67B, R218, R239, R240, R540, Q74, R247, C322, C186, R230, R64. Change R568.1, R569.1 and R245.1 connection to KBC_WAKE#. Remove current VCC1_PWRGD connection to JP6.16. Then add a 4.7 K resistor between JP6.16 and new signal VCC1_PWRGD_SUS#. Change R215.2 to GND. Change R227 to 3.3K. Add a R615 PD for U7.102. Change U7.102 connection to PLT_DET. Change R248 to 200k ohms. Change R248.1, U17.77 connection toVCC1_PWRGD_SUS#. Change R243.1 and U7.125 connection to CHRG_RST. Change R243 to 100K. Change R243.2 connection to GND. change R436.2 connection to +3VDS. ChangeJTB1.91, U17.41 and R436.1 connection to iSCT_LED#. Change D21.2 connection to PM_APWROK. Modify +3V_PCH power circuit. Change JCR1.5 connection to +5VDS.
-Follow HP request9,14,25,29,30,34,39
CKT, LAYOUT10/1650.4
14,3060.4 10/17 -Follow HP request -Change R614.1 connection to +3V_PCH. Correct R227 to 10K.CKT, LAYOUT
-Follow HP request5,9,14,1620,24,2530,34,35
10/1870.4 -Change R615 to 470K, R610 to 470 ohm, R614 to 10K ohms, R612, R137, R606, R607 and R608 to 4.7K ohms, RC108 to 10K ohms . Delete Q67A, QC1, RC12, Q80, R461, Q2, RC90.Install RH209, R492, RC108, R613, CH116 and UH6. Uninstall QC3, RH148, RH67, RH208. Change R492.2 connection to PCH_THERMTRIP#_R Connection R614.1 to PM_RSMRST#. Modify+1.35VS power circuit
CKT, LAYOUT
-Follow HP request14,20,3034,39
10/2380.4 -Delete R612. Reserve R616 between KBC. 124 pin and signal SIO_SLP_SUS#. Uninstall RH209, Q79, R614, R613, CH116 and UH6. Install RH67, RH208. Change PCH.AL6, JTB1.91and RH244.2 connection to TBT_RR_GPIO#. Add Q80 for iSCT_LED# circuit
CKT, LAYOUT
0.4 9 10/24 18,25,28 -Follow HP requestCKT, LAYOUT -Add R618, R619, R620, R621. Delete R567, and connect JMINI3.15 to WLAN_WAKE# directly. Change ACCEL_INT# connection to U9.11. Change RH176.2 connection to GND and makeRH176 install. Change RH185 as install
0.4 CKT, LAYOUT -Follow HP request14,18,2529,34,35
10/2510 -Add R247, Q63. Change RH70 to 200k ohms. Add LANWAKE# PU RH248 to +3VDS. Delete R618, R89. Change R455 to 200k. Add PD R622. Change Q61 and Q62 to dual channel 7002
10/25 30 -Solve KBC external crystal can not work issue.CKT, LAYOUT0.4 -Reserve R624 and connection to SUSCLK_KBC11
0.4 CKT, LAYOUT -For layout smoothly.13,14,1529,32,36
10/2613 -Rearrange RP11, RP8, RP17, RP13, RP14, RP15, RP16, RP12, RP10, RP7 pin assignment for layout smoothly.
38 -Move LID switch to PWR board by ME reqesut.CKT, LAYOUT0.4 -Change JPWR1 to 6 pin, and modify the JPWR1 pin define.14 10/26
0.4 CKT, LAYOUT -Follow Compal HW request13,14,1529,32,36
10/2612 -Delete RH56, RH57, RH59, RH60, RH66, RH69, RH71, RH98, RH99, RH100, RH141, RH234, RH139, RH108, RH110, RH111, RH112, R160, R161, R162, R163, R320, R477, R478, R464,R465, R466, R467, R472, R473, R474, R475, R468, R469, R470, R471, R479, R484, R485, R486, R318, R319, R321, R322, R570, R571,R572. Add RP7, RP8, RP9, RP10, RP11, RP12, RP13, RP14, RP15, RP16, RP17, RP18, RP19.
-Follow HP request.13,14,1718,23,2930,32,3438,
15 -Delete R153, R481, R565. Swap QH11A.2 and QH11B.5 connection. Change RH75.2 and PCH.K7 connect to BATLOW#. Change PCH.U7 connect to BT_OFF. Change PCH.P3 and RPH2.4connect to WWAN_DET#_PCH. Delete A20GATE and VCC1_PWRGD_SUS# off page symbol. Change RH180.2 and UH1.AP1 connect to PCH_GPIO_35. Change RH198.1 and UH1.AT3connect to PCH_GPIO_36. Change R376 to 10k. Change R376.1 connect to +3VDS. Connect Q34.3 to LED_LINK_LAN_DOCK# with R625, and delete LED_LINK_LAN_DOCK# connection toQ34.1. Delete R157 and connect Q34.1 and signal LED_LINK_LAN#_R. Connect U22.26 pin to signal mSATA_DET#. Change R455.2 connection to B+. Change Q36 to AO3413.
0.4 CKT, LAYOUT10/26
18,35 -Follow HP request.0.4 16 CKT, LAYOUT -Change RH179 to 100ohms. Delete R137, Q82.B. Add D5210/29
170.4 -Follow ME request.18,3610/31 -Change JODD1, JVGA2, JKB1 footprintCKT, LAYOUT
-Follow HP request.0.4 18 CKT, LAYOUT -Change R291.1 connection to +5VL. Change R291 to 105K_1%10/31 18,37
11/01 -Change R304.1 connection to +5VL. Change R304 to 88.7k +-1%. Uninstall R306.CKT, LAYOUT190.4 -Follow HP request.31
-Change Y3, YH1, YH2 to small package11/01 13,15,37 -Material shortage issue0.4 20 CKT, LAYOUT
22,30,37,3811/01 -Uninstall Y4, C487, C488. Delete C23, C80, C82, C111. Change U30 to AU9560-GBS-GR. Add R626CKT, LAYOUT210.4 -Follow HW request
290.4 22 11/02 CKT, LAYOUT -Reserve C504. Add C505-Follow HP request.
11/05230.4 27 -Delete R174, QA1B. HP_SENSE# connection to R167.1CKT, LAYOUT -Audio Jack change to normal open type
380.4 24 11/05 -Follow ME requestCKT, LAYOUT -Modify JKB1 pin define to follow ME request.
39CKT, LAYOUT -Smart Card Reader AU9560-GBS-GR no need external crystal11/05250.4 -Uninstall Y3, CV33, CV34
26 11/06 -Follow HP requestCKT, LAYOUT 9,14,22, 25 -Change QC5A.2 and QC5B.5 connection to SLP_S3. Change PCH.D2 pin connection to DDR3_SET. Delete Q68, R459. Change R458 to 0ohm. Change JMINI3.13 connection to signalWWAN_DET#_PCH. Change JMINI3.65 connection to GND. Change C498 to 4700pF
0.4
27 11/06 12CKT, LAYOUT -Add C506, C507, C508, C509, C510, C511-Follow RF request0.4
28 11/07 CKT, LAYOUT 50.4 -Follow ESD request -Delete RC36, RC38, RC40, RC43, RC45, RC47 by ESD request. Add T144, T145, T146, T147, T148, T149
29 -Follow RF request23,32CKT, LAYOUT11/070.4 -Change C48 and C58 to 68pF. Change R332 to 33 ohms, C205 to 82pF and install R332 and C205
-Follow HP request -Delete D52. Add Q83, R62723,33CKT, LAYOUT11/08300.4
16,34,35 -Follow HP request -Change RH152 and RH153 value to 2.2K. Change C491 and C495 to 4700pF. Change R627 to 4.7K.0.4 31 11/09 CKT
VBL20 from SI1 to SI2 LA-9241P REV:0.4 -> 0.5 Modify <2012.12.12.~ >
-Uninstall QC4, RC92, CC39, RC89, QC5 and RC88. Add J4, Q84, Q85. Delete Q79, R615, UH6, R613, R617, R227 , CH116, R605. Change RH222, RH223, RH224, R615, R248 to 100K.Remove R611. Connect JP6.16 to VCC1_PWRGD_SUS#. Install R624. Change CH115 to 0.22uF
Item ImpactDate PageRev. Modify DescriptionChange Cause0.5 1 12/12 9,14,28,30
31-Follow HP request
-Change U34, U35, U36 to small package0.5 3512/122 -Material shortage issue.
CKT, LAYOUT
CKT, LAYOUT
0.5 3 12/13 CKT -Follow HP request9,28 -Install RC88. Change JFP1.11 netname to FPR_OFF_C
-Solve CRT switch issueCKT12/2040.5 -Uninstall R91,R92,R93. Change RP19 to150 ohms35,36
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
56
Compal Electronics, Inc.
HW_PIR3
0.5LA-9241P56
2010/12/012011/11/5
C
Thursday, December 20, 2012
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
56
Compal Electronics, Inc.
HW_PIR3
0.5LA-9241P56
2010/12/012011/11/5
C
Thursday, December 20, 2012
Title
Size Document Number Rev
Date: Sheet of
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
56
Compal Electronics, Inc.
HW_PIR3
0.5LA-9241P56
2010/12/012011/11/5
C
Thursday, December 20, 2012
