Automotive Compilation - CiteSeerX

Automotive Compilation

Volume 9, October 2012

Contents

Table of Contents

Capacitive Touch Technology Opens the Door to a New Generation of Automotive User Interfaces . . . . . . . . . . . . . 1

RF System Design Considerations . . . . . . . . . . . . . . . . . . . . . 5

RF RSSI Sniffer Tool for Car Access Systems . . . . . . . . . . . . 9

Atmel Eases Automotive Design Process Through Support of AUTOSAR Standard . . . . . . . . . . . . . . . . . . . . . . . 13

Simplifying the Design of Switch Applications with LIN Bus Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Two-Wire LIN Networking . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Low-cost Battery Measurement System for 7/13-Cell Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

ATmegaxx8PA-15 RC Oscillator Frequency Drift Compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Highly Integrated AVR MCU-Based UHF Transceiver Family Increases Car Access System Flexibility . . . . . . . . . . 38

How to Define the LF Driver’s Key Parameters in Automotive PEPS Systems . . . . . . . . . . . . . . . . . . . . . . . . . 43

Automotive IC-Level EMC Testing—Trends andForthcoming Standards . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52

© 2012 / www.atmel.com1

When designing a modern car, the spotlight is on the driving experience, from the external impression that the vehicle makes to the way in which the driver and passenger interact with the air-conditioning, navigation or infotainment systems. The key to this experience is the use of clearly laid out, intuitive operating elements which represent the driver-car interface. The user interface in a modern car is very comprehensive. Most of the essential functions are just a few centimeters

away from the point where the driver holds the steering wheel, and are accessed by various combinations of touches and movements. The steering column switch is an effective way of bringing together functions which allow the driver to activate the direction indicator, control the windscreen wipers or adjust the headlights without needing to move his hands far from the steering wheel while keeping his eye on the road at the same time. For this, however, drivers have had to learn the specific press and turn combinations for the required function.

Capacitive Touch Technology Opens the Door to a New Generation of Automotive User InterfacesStephan Thaler, Thomas Wenzel

2Automotive Compilation Vol. 9

DRIVENLINE X Cx

RECEIVE LINE Y

DRIVENLINE X Cx

RECEIVE LINE Y

Cg

Figure 1. Mutual Capacitance Measurement

Because more and more electronic systems are being integrated into vehicles, the user interface needs to be expanded: there are too many functions for an interface that is based on mechanical keys. An interactive touch-sensitive display provides the opportunity to integrate many different functions in a concentrated space in the center of the dashboard. The different pages shown on the screen provide individual user interfaces for the various functional blocks. The touchscreen presents new challenges in menu definition so that user interfaces can be made safe, easy to use and intuitive.

Bringing Familiar Touchscreen Interface Into VehiclesIf the driver tries to look at details of his surroundings on the navigation system without a touch-sensitive display, he must do this by operating a directional button, which is awkward and takes his attention away from the road traffic for a considerable time. A touchscreen allows the system in question to recognize wipe and zoom gestures, which means that the user can change the scale of the map or the position in just a short time. When scrolling through lists, in a telephone book for example, the wipe gesture considerably reduces the length of time for which attention is deflected.

Basically, more and more drivers are familiar with the operation of smartphones and touch pads. Therefore, they often try to intuitively push aside images on the display through touches, or influence them with other standard gestures. Without gesture support, it may even happen that the driver and passenger are dissatisfied that the vehicle systems do not work in the same way as the smartphones and tablet PCs with which they are accustomed. Most first-generation touch-sensitive interfaces were based on the same principle as the mechanical soft-touch keys on the dashboard: the pressing together of two conductive surfaces to change the electrical resistance. This resistive touchscreen technology uses a flexible layer over a substrate below it, separated by a small gap of air. The layers consist of transparent plastic coated with a grid of very thin electric wires and mounted over the liquid crystal display (LCD). To register a contact, the electric wires must be pressed together through holes in the spacer.

Because this type of touchscreen can only recognize the touch of an individual finger, it is not suitable for entering multi-touch gestures.

Resistive touchscreens were preferred in the past because they are easy to control and relatively cheap to manufacture. The additional plastic layers, however, cause many internal reflections, which lead to a lower light transmission. An outer elastic layer of soft plastic means that the surface is sensitive to scratching. Capacitive technology eliminates many of the problems known from resistive touchscreens, and it is continuing to develop rapidly. Users of smartphones and Internet tablet computers are familiar with the advantages of capacitive technology.

A capacitive touchscreen can be regarded as an arrangement of lots of capacitors that have a particular capacity. If a finger approaches the surface, this leads to a slight change in the capacities of one or more of these sensors (see Figure 1).

Understanding Sensor Capacities

There are two basic ways of mapping the capacity: self-capacitance and mutual capacitance. Many first-generation touchscreens were based on measurement of self-capacitance. However, they had the same kind of problem as the resistive touchscreens. Because the self-capacitance method measures the input signal of a complete row and column of electrodes, it cannot always unambiguously classify the position when operated with more than one finger. Mutual capacitance technology guarantees this by measuring every point of intersection in the orthogonal matrix. In this way, it is possible to exclude gaps in the finger classification which would be visible on the screen, depending on the application software. One of the important


Figure 2. Block Diagram Atmel maXTouch Controller

differences between capacitive and resistive technology is that the user's finger does not need to exert any pressure on the surface of the screen to be recognized. Placing the finger on the surface leads to a tiny change in capacity of the corresponding capacitive sensor, which is recognized by the controller. The precise position of the fingers on the touchscreen is calculated when the measured values of all points of the intersection are evaluated. Nowadays, a sensitive touchscreen controller, such as a member of the Atmel® maXTouch® family (see Figure 2), is even able to register the approach of one or more gloved fingers.

As the capacity changes in this case are only very small, it is vitally important to be able to remove the effects of noise and interference. For this, there are various algorithms that minimize the capture of interference and that further suppress its effects by post-processing. The special interference suppression of the maXTouch controllers offers a number of advantages. It is now even possible to reduce the number of sensor layers above the LCD screen to a minimum. Many existing touchscreens need a shield layer to protect the

measurement signals from the strong display radiation that is generated by the rapidly switching transistors in the LCD screen. A reduction in the sensor layers leads to a smaller loss of brightness, which improves the image reproduction quality of the display. In addition, the manufacturing costs of the touch-sensitive sensor can also be reduced. The post-processing functions guarantee reliable operation in the specific ambient conditions in the automotive sector. Drift compensation, for example, ensures that the touchscreen interface is always calibrated to the ambient conditions, and reacts, for example, independently of changes in the relative humidity and temperature. Post-processing also ensures that touches by both fingers wearing gloves and bare fingers can be recognized at the same time without additional switchovers.

The electrode (individual capacitive sensor) spacing is another important criterion for touchscreens. A spacing of 5mm or less means that it is possible to recognize not only small zoom movements between two or more fingers, but also the difference between a weak and a strong touch (see


Figure 3. How Capacitive Sensing Works

Figure 3). Post-processing as applied by Atmel's maXTouch family also helps the system to recognize that large areas of the screen are covered, for example, if a user places the palm of his hand on the screen. This action is rejected as an accidental contact, thus preventing the incorrect triggering of unwanted functions.

All these functions make it possible to design intuitive, highly reactive user interfaces that mimic the application experience of tablet computers in automobiles.

The touchscreen can also be combined with capacitive proximity sensors. In this way, it is possible to identify whether a hand is approaching from the left or right, in order to allow just the passenger to use certain functions. This makes it easier for car manufacturers to comply with local laws which state, for example, that a driver is not allowed to change navigational settings when driving, while a passenger could continue to do this at any time, because his hand is approaching from a different angle.

Because the displays in the center panel of the dashboard are becoming larger all the time, it is a good idea to offer divided interfaces so that a passenger can "push aside" part of the screen to display the interface for audio settings while

the driver can continue to interact with the main operating elements. Because it recognizes from which side the hand approaches the screen, the host microcontroller can provide access to the correct set of operating elements for the user.

Delivering Intuitive Automotive InterfacesBy using intelligent, capacitive touch technology, such as the Atmel maXTouch family, vehicle manufacturers can integrate a new generation of user interfaces into their designs, thus continuing the tradition of intuitive, achievable and reactive operating elements. The intelligence inherent in the controllers ensures that the latest characteristics of modern consumer interfaces can also be used quickly in the world of automobiles.


f (MHz)

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Figure 1. Typical Frequency Response of SAW Filter

Introduction

Highly integrated and advanced radio designs available today enable the engineer to design RF systems with greater levels of performance than ever before. Recent advancements in the areas of blocking, sensitivity, frequency control and baseband processing are influencing RF system architecture design. The purpose of this article is to explore some of these parametric attributes and consider their implications to system performance.

Dealing with Interference

Unwanted RF signals at or near the desired operating frequency can compromise a receiver’s ability to accurately demodulate the desired RF data packet. Disturbers fall into several categories based on their proximity to the carrier frequency of the system: a) in-band, b) near-band and c) wide-band. Different methods are used to reduce each type of interfering signal. Common approaches are listed in the sections that follow.

Near and Wide-band Disturbers

This type of interference suppression focuses on improving the radio’s selectivity and blocking characteristics. Selectivity is a term that describes the ability of the radio to select the desired signal in the midst of other RF spectrums. Blocking describes the ability of the IC to ignore a jamming

or interference signal while still receiving the wanted RF signal. The prudent engineer will pay close attention to the selectivity and blocking characteristics of a radio during the initial selection process. Frequently, these parameters are overlooked and the RF system performance is compromised. Beyond selection of radios with robust blocking characteristics, other approaches are available to suppress both near and wide-band interference. A popular method involved the addition of a SAW filter between the receiver’s antenna and RF front end. This has a bandpass effect which enables the desired signal to enter the radio with very little attenuation while subjecting the disturber to increased attenuation. Typical bandpass characteristics of a 433.92MHz SAW filter are shown in Figure 1.

RF System Design Considerations Jim Goings


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Figure 3. Blocking Characteristics of ATA5830 at 433.92MHz, IFBW = 25kHzFigure 2. Blocking Characteristics of ATA5830 at 433.92MHz, IFBW = 366kHz

Channel 1

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Time

Figure 4. Time Domain Redundancy

When the additional suppression provided by a SAW filter is not sufficient to fully block the interference, the engineer should consider the bandwidth of the radio’s intermediate frequency (IFBW). To illustrate this point refer to Figure 2 and consider noise appearing 200kHz below the desired operating frequency. In this case, an IFBW of 366kHz would only attenuate the disturber by 10dB at its corner frequencies. In contrast, when using a 25kHz IFBW, the disturber will be attenuated by 56dB, as shown in Figure 3.

In the past, IFBW was fixed by the IC design. However, high-performance RF devices, such as the Atmel® ATA5830N and ATA5780N, enable adjustments to the IFBW through the use of an EEPROM-based configuration table. The user-configurable IFBW range spans from 25kHz to 366kHz, and offers the engineer 26 different IFBW settings. During the optimization process, the engineer should ensure that the selected IFBW remains wide enough to account for variations in the RF frequency of both receiver and transmitter resulting from modulation and tolerance of internal frequency references. RF signals coming from the intentional radiator (e.g., transmitter) possess carrier frequency error terms due to initial tolerance, temperature and aging. In addition to the worst case stack of crystal frequency tolerances on the receiver and the transmitter, selection of minimum IFBW must also consider the RF spectral bandwidth required to transmit the RF data packet at a desired baud rate and modulation.

In-band Disturbers

Unwanted RF signals within the desired operating frequency spectrum must be approached differently since it is not

possible to differentiate between a very strong source of interference and the intended RF data packet. In this case, redundant information is the only method to mitigate this problem. Two methods to convey redundant information are used today: a) time domain redundancy or b) time and frequency domain redundancy.

Time domain redundancy is the most common architecture today due to its simplicity and low cost. This is used to mitigate intermittent sources of interference and is achieved by sending multiple copies of the same RF data packet, delayed by a finite amount of time (see Figure 4). This enables the use of a single RF carrier frequency for both the transmitter and receiver sides of the RF system. However, it is ineffective if the disturber has a continuous presence. With the recent release of advanced and inexpensive integrated radio ICs, this approach is losing ground to time and frequency redundancy methods.


Channel 1

Channel 2

Channel 3

Frequency

Time

Figure 5. Time and Frequency Domain Redundancy

By adding the dimension of frequency channels to the existing time domain redundancy, it is possible to completely avoid a continuous RF disturber if the disturber’s spectrum occupies a small frequency range. This approach offers a substantial improvement in radio performance and is shown graphically in Figure 5. The time domain is represented in the horizontal axis and shows redundant data packets that occur after a finite time delay. The frequency domain is represented in the vertical axis and shows redundant RF spectral content appearing on different frequencies, e.g., channels 1-3.

Channel frequency spacing must be at least as wide as the RF spectral content of the basic RF data packet to prevent channel overlap. In the case of Atmel ATA5830N and ATA5780N, a channel spacing of at least two times the IFBW is recommended. In automotive remote and passive keyless entry systems today, channel spacing is typically in the range of 400kHz to 450kHz.

Factors influencing the selection of RF data packet spacing delay in the time domain include a) settling time to change channel frequency, b) managing the average amount of RF carrier “ON” time and c) overall system response time. Typically the channel frequency settling times are less than 1ms and are only of second-order concern. The primary factor is managing RF energy in order to optimize range while maintaining local regulatory compliance. Through duty-cycle averaging, it is possible to transmit higher peak RF power levels provided the average power falls below the local regulatory agency’s threshold. Obviously, higher output powers will enable RF systems to attain greater range.

Multi-channel operation is enabled through high-end radio architectures which utilize a fractional-N PLL to establish the RF frequencies needed in both the receiver and transmitter blocks of an RF system. With the programmable

architecture that these devices offer, it is easy to develop a receiver capable of quickly and accurately shifting the center frequency of operation (e.g., channel). These leading-edge designs are fast becoming the RF system architecture of choice for automotive car access systems as consumers demand more robust operation.

RF Modulation

It is important to understand that amplitude shift keying (ASK) and on-off keying (OOK) are not interchangeable terms. ASK is a special case of amplitude modulation (AM), while OOK can be considered an RF carrier that is gated on and off. Closer examination of the equations for ASK and OOK shows these fundamental differences.

Amplitude Modulation:

• Asin(ωt) is the RF carrier with amplitude A• m(t) is the modulation signal ranging in value between

-1 and +1, typically a sine wave• a is the modulation index which can posses value

between 0 and 1• Maximum amplitude is 2A

Amplitude Shift Key Modulation (special case of AM):

• ASK occurs when the equation for Amplitude Modulation has the following conditions:• Modulation signal, m(t), is a square wave, ranging

in value between -1 and +1• Modulation index, a, is 1

• Maximum amplitude is 2A

On/ Off Key Modulation:

• Asin(ωt) is the RF carrier with amplitude A• g(t) is gating signal which is either ON with value 1 or

OFF with value 0• Maximum amplitude is A

While both ASK and OOK appear to have the same envelope, it is significant to point out that the amplitude of an ASK signal is twice as large as its OOK counterpart. This means

FAM

(t)={1+ a×m(t)}× A × sin(ωt)

FASK

(t)={1+ a×m(t)}× A × sin(ωt)

FOOK

(t)= g(t)× A × sin(ωt)


that when performing receiver sensitivity measurements with an ASK-modulated input, it will yield a 6dB better value than the same receiver when measured using an OOK-modulated signal. In practice, automotive RKE and PKE systems use OOK.

The selection of OOK or FSK modulation has implications on the receiver’s ability to perform in the midst of interference and jamming signals. In general for an OOK receiver, demodulation errors (BER = 10-3) will begin to appear if the disturber is 10dB to 12dB below the desired RF signal. In the case of FSK, the RF disturber must be larger before demodulation errors occur; typically at levels of 4dB to 6dB (η = 1) below the useful signal. This suggests FSK modulation has the advantage of more robust performance than OOK in the midst of interference.

RF Carrier Frequency

Much debate focuses on the topic of which carrier frequency bands provide optimum performance for automotive remote and passive keyless entry systems: high-band (868-915MHz) or low-band (315-434MHz). Insight on answering this question rests in a better understanding of fundamental characteristics of each frequency band.

One metric to consider is output power allowed by regional regulatory agencies. Generally, higher radiated transmit powers are allowed in the high-band which brings the perception of greater system range. However, this is a “double-edged sword” because an unintended consequence of this is the presence of disturbers from other high-power applications present in the same frequency spectrum. It is important to note that high-power disturbers also exist in the low-band, too. However, it stands to reason that the likelihood of being subjected to RF disturbers of higher amplitude is greater in the high-band than in the low.

Another parameter to consider is the RF path loss, which increases with frequency. In order to compensate for the higher path loss, the transmitter’s effective radiated power must be increased. This is only possible through the selection of a transmitter with higher output power capability or through the use of an antenna with greater efficiency. When factoring path loss, transmit power and antenna efficiency into an RF link budget analysis, it may turn out that the perceived benefit of higher transmit power in the high-band will be of marginal impact on the system's operating range.

Clearly the primary benefit to high-band operation is the ability to realize highly efficient antennas (dipoles) using much smaller physical geometries due to wavelengths that are two to three times shorter than in low-band. This

is attractive not only for handheld remote fob applications but also for the vehicle. However, high-band RF tends to propagate more directionally and may not provide as consistent performance as low-band systems around the contours of an automobile.

An important and final note with regard to the selection of high- or low-band operation is the specification of the reference frequency crystal and its associated tolerance required by the radio itself. This can have a significant influence on the cost and performance of high-band and low-band systems, as the following examples will illustrate.

Example 1:When one extends the influence of a typical crystal with a 150PPM frequency tolerance to a high-band transmitter application at 915MHz, the resulting frequency tolerance will be ±137.25kHz. However, when the same 150PPM crystal tolerance is applied to a low-band transmitter application at 315MHz, the resultant frequency tolerance drops to ±47.25kHz. Clearly, the high-band application will require an IFBW of nearly three times larger than the low-band application to capture the wider variation in transmitted spectrum. Since receiver sensitivity is generally inversely proportional to its IFBW, this will desensitize and compromise the performance of the high-band system by reducing the operating range of the system.

Example 2: To mitigate this effect, a crystal with lower tolerance, such as 50PPM, could instead be selected for use in the high-band application. This would reduce the frequency tolerance at 915MHz from ±137.25kHz to ±45.75kHz. Now the selection of an IFBW comparable to the ±47.25kHz that was needed at 315MHz is possible. But, it came at the expense of a higher precision reference frequency crystal and its associated cost.

Conclusion

Advancements in the design and availability of highly integrated radios have become more prevalent in recent years. To realize the maximum benefit from these recent developments, it is worth the effort for the engineer to reconsider the architecture of RF systems today. It was the intent of this article to re-visit fundamental system operation considerations such as interference, modulation and frequency selection, and to explore them in light of the new radio ICs such as the Atmel ATA5830N transceiver and the Atmel ATA5780N receiver.


RF RSSI Sniffer Tool for Car Access SystemsChris Wunderlich, George Rueter

Introduction

The ability to monitor the received signal strength in a radio receiver is a valuable development and diagnostic tool for the engineer. In an automotive application the ablility to monitor this received signal strength indicator (RSSI) value represents what a radio receiver will experience in service, including the effects related to antenna and mounting location. The article describes a simple method to re-configure the Atmel® ATA5830N device, utilizing its Flash program capability, to create an RSSI monitoring tool for labratory and in-vehicle use.

The ATA5830N UHF transceiver chip incorporates a high-performance UHF transceiver and a low-power 8-bit AVR® microcontroller on a single die. Figure 1 shows a simplified block diagram of the ATA5830N device. Included in the device is 6KB of Flash memory available to the end user. This article describes an application that utilizes this Flash memory space to develop an application for an RSSI monitor that generates universal synchronous/asynchronous receiver transmitter- (USART-) formatted messages containing RSSI data. From an operational perspective this application lends itself well to several common RF engineering tasks such as: a) RF environment analysis, b) performance tuning of the


Figure 1. ATA5830N Block Diagram

Rx DSP

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receiver section, c) RF component selection and d) antenna performance evaluation.

Flash-based RSSI Application

RSSI data is a critical radio reception metric that reflects the level of RF signal energy at a given frequency channel and is useful in evaluating an RF environment. The Flash memory application uses the internal RSSI measuring function of the chip and communicates this value using a general-purpose I/O pin using standard USART communication protocol timing. This article describes how a Flash program application is implemented and demonstrates the flexibility of the internal AVR controller. The Flash application provides a small flexible RSSI measurement tool that can be easily and quickly configured to operate across a wide range of frequencies, providing a simple way to measure RSSI.

The software for this demo was developed using the ATAK51002-V1 evaluation kit. The application operates with no external inputs required other than 5V DC power and the RF signal source. The desired radio parameters, such as frequency and intermediate frequency bandwidth (IFBW), are programmed into the part using the EEPROM configuration file. The user selects these values by using an Excel spreadsheet tool that automatically generates the EEPROM file. Once these values are programmed into the EEPROM, the application of power will automatically initiate the self-configuration and execution of the Flash application program. It begins measuring and outputting the 8-bit RSSI data values on pin 17 (PC3) of the device. USART communication parameters are 38400 Baud, 8 data bits,

1 start bit and no parity bit (38400, 8-1-N). Each data byte output requires about 260μs to transmit and occurs about every 50ms. The output data is at logic value voltage levels (about 0V to 5V) and, while not compliant with RS-232 standards, most PCs have no problem in receiving and displaying this data stream using a terminal program.

RSSI Measurement Details

Received signal strength indicator (RSSI) is a measurement of the power present in a received radio signal. In the ATA5830N chip, this function is built into the receiver’s digital signal processing (Rx DSP) section and occurs completely in the digital signal domain, allowing for high relative and absolute RSSI accuracy.

In this application, RSSI values are returned as 8-bit values and the signal power at the matched 50Ω antenna input can be calculated in dBm as: RF Power In (dBm) = RSSI/2 – 155 (154 in 868-928MHz

band)

The ATA5830N datasheet notes the following RSSI measurement specifications:

• Absolute RSSI accuracy ± 5.5dBm• Relative RSSI accuracy ± 1dB• RSSI resolution 0.5dB

The typical RSSI range is a function of the IFBW selected:

• IFBW = 25kHz >>> RSSI = -115dBm to -25dBm• IFBW = 80kHz >>> RSSI = -110dBm to -25dBm• IFBW = 165kHz >>> RSSI = -105dBm to -25dBm• IFBW = 366kHz >>> RSSI = -100dBm to -25dBm

Software Operational Flow

On power-up and after the hardware-generated power-on reset is complete, the AVR controller will execute its main() function in ROM, where the EEPROM configuration settings are loaded and checked. This EEPROM configuration defines all operational parameters of the device, including that a Flash application program is present. When this EEPROM setting is encountered, the application flow jumps to the Flash main(), and the application flow begins. The Flash main() function can be very simple since the ROM software functions will perform most of the work. In this application, the Flash program function loops indefinitely, first requesting ROM-code-based RSSI measurements and then calling Flash code functions that format and output the data. The following is the Flash program loop that drives this application:


Operation and Use

Hardware Platform

The ATA5830N can be used in several frequency bands: 310MHz to 318MHz, 418MHz to 477MHz and 836MHz to 928MHz, operating from a single crystal. The highly integrated radio architecture is optimized for minimal external part count. See Figure 2 for the schematic of a low-band Flash-based application such as the one described in this article.

Setup

The only required external signals are a +5V power supply and the RF signal input. The reference design included in the ATAK51002-V1 evaluation kit consumes about 9mA when running this application, which is sufficiently low to enable battery-powered use. Once the reference design is powered up, the ATA5830N device must be awakened by momentarily connecting any of the “npwron" pins (15, 16, 17, 18, 19 and 29) to ground or the “pwron” pin to +5V. After the part is awake and active, no other input is required and the RSSI data will be available at PC3 pin 17.

RF Considerations

In addition to the EEPROM configuration settings, the hardware in the RF path must be optimized or “matched” to the specific frequency being used. The default configuration frequency for the ATAK51002-V1 evaluation kit is 433.9MHz,

so the application kit hardware is shipped with this hardware installed. If another frequency is selected, the matching component values in the RF signal path need to be changed.

The ATA5830N device includes two separate LNA inputs, one for low-band (315MHz and 433MHz) and one for high-band (869MHz to 902MHz) operation. These LNA inputs are provided since the chip is capable of multi-band operation and these separate ports provide optimum performance matching for each frequency range. The hardware configuration as shipped utilizes the low-band input port. The hardware must be modified accordingly to measure a high-band frequency.

A list of component values for several common radio frequency bands is available upon request and included in the evaluation kit. Installation of the corresponding hardware component values is required for optimal performance at the desired frequency.

PC Connection

Data is output at pin 17 (PC3), which can be accessed at one of the I/O pins on the hardware evaluation board. This signal can be connected directly to pin 2 of a PC-connected RS-232 port. While the voltage level is not compliant with RS-232 standards, most PCs will successfully receive this data. The data can then be displayed using a terminal emulation program such as “Realterm”, available at no cost at http://realterm.sourceforge.net/.

for(;;){ _WDR; ATA_makeGlobalSystemFlags(); // ROM code check and execution of mode changes RDCR |= (1 << RQSS); // Register bit set to request RSSI measurement rssi=RSSI; // Store the RSSI register value in SRAM variable if (rssicnt==100){ //Every 100th reading output data to FLASH program (~50mS) RSSI_flash(); // FLASH program to initialize required timers RSSI_TransmitValue(rssi); // FLASH program to format and output data while ((T4CR & (1<<T4ENA))); // Wait for data transmission to complete PORTC &= ~(1<<PORTC3); // Set output port value TMCR = (TMCR & 0xF8) | SSI_PC3_OUTPUT; // Set the modulator MUX to output at PORTC ATA_timer4Close(); // Close the timer used by the FLASH functions } rssicnt++; // increment counter }


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Figure 2. ATA5830N Flash Application Schematic

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Figure 3. Sample Data Collected Using Flash Application

Data Collected

Figure 3 shows sample RSSI data collected using the described Flash application with the ATA5830N chip configured to operate at a center frequency of 314.9MHz with an IFBW of 165kHz.

Summary and Results

This article highlights the capability and flexibility of the ATA5830N radio transceiver. By generating a program that runs in the Flash memory space, and leveraging the available

ROM-based functions, end users can customize the chip for their individual needs. The described application, for example, reports measured RSSI values every 50ms using standard USART timing. This tool would be useful in RF environment analysis such as choosing an operating band or frequency. While not quite as easy to program as a commercial spectrum analyzer, the tool does provide a means to test the RF energy content of a specific frequency and measurement bandwidth.

Perhaps the most useful application for this tool is the optimization of external components for an automotive car access system using the ATA5780N or ATA5830N device. Traditional fine-tuning of a receiver requires a method to extract received data or RSSI, and is typically done with an external microcontroller. Using this application, the external microcontroller and its programming can be eliminated—all that is needed is a PC.

External References

The software and documentation, incl. an application note with even greater detail for this application, is available by contacting [email protected].

The Flash software program was generated using Atmel Studio 6, IAR Embedded Workbench for AVR and JTAGICE mkII.


Firmware

Hardware

Firmware

Hardware

Figure 1. AUTOSAR—Abstraction Layer Between Hardware and Application

Automotive ECUs Cars today can have up to 70 electronic control units (ECUs) driving many of their in-vehicle functionalities. In recent years, tougher constraints in areas such as security, environment, comfort, and safety have resulted in an increased number of ECUs within vehicles. All functionalities within the areas mentioned require simultaneous interactions by sensors, actuators and control units. However, the increasing development effort needed, combined with the complexity of signal interactions among ECUs, is making this issue a challenge for car manufacturers.

The ever-growing number of ECU nodes and increasingly complex interactions are causing a dramatic increase in the amount and complexity of software required. This, in turn, affects software scalability, reusability, maintenance and cost-efficiency throughout the life cycle of a product.

The AUTOSAR Standard

The Automotive Software Platform and Architecture (AUTOSAR) is an open and standardized automotive software platform and architecture jointly developed by automotive manufacturers, suppliers and tools developers. Its framework manages the various automotive ECUs and their complex signal interactions. From an ECU perspective, AUTOSAR provides an abstraction layer between hardware and application that allows hardware-independent

development and testing of the application software. It also permits the reuse of a validated application from previous designs for a new one.

Atmel® has collaborated with Vector Informatik to fully support the Atmel 32-bit automotive family devices in AUTOSAR through the MICROSAR bundle provided by Vector.

Microcontroller Abstraction Layer

Atmel has developed a so-called microcontroller abstraction layer (MCAL) for its 32-bit AVR® automotive family devices.

These MCAL modules and Vector’s LIN/CAN communication layers are integrated into Vector’s complete MICROSAR

Atmel Eases Automotive Design Process Through Support of AUTOSAR Standard Eric Tinlot


DaVinciDeveloper

ECU ConfigurationDescription

SystemDescription

Application

Microcontroller

ComplexDrivers

DaVinciConfigurator Pro

Generator

1) Available extensions for AUTOSAR

*.dbc *.fibex *.lfd

31939TP1)

MICROSAR RTE

MICROSAR COM

MICROSAR EXTMcal

MIC

RO

SA

R O

S

MIC

RO

SA

R S

YS

MIC

RO

SA

R D

IAG

MIC

RO

SA

R M

EM

MIC

RO

SA

R IO

MIC

RO

SA

R L

IN

MIC

RO

SA

R F

R

MIC

RO

SA

R C

AN

Figure 2. The AUTOSAR Structure

Figure 3. GUI of MCU Modules

environment (including OS, real-time environment, diagnostic, etc.). This AUTOSAR bundle supporting the 32-bit AVR family is available from Vector Informatik.

Atmel has also developed a complete set of graphical user interfaces (GUI) for each MCAL module to help users configure all features needed in the application.

These GUIs have been developed using Vector’s DaVinci configurator kit. Figure 3 shows the GUI screenshot of the

MCU module where the user can configure the various Atmel MCU clock sources.

All MCAL modules have to be configured using their respective GUI screens. The user generates the required configuration files (.h and .c files) with a single click of the “generate” toolbar icon (green triangle) at the top. These configuration files, the MCAL module, and the MICROSAR package can be compiled with any AUTOSAR application onto a 32-bit AVR automotive device to design an AUTOSAR-compliant ECU node.


ConfiguredBSW Modules

Generated RTEECU Extractof System

Description

ECU Extractof System

Description

ECUConfigutationDescription

BSWModule

Description

SWCDescription

4

From OEM

DaVinci Developer

DaVinci Configurator Pro

From TIER1

From TIER1

From TIER2

2

1

3

Design/Integrate/ValidateSWCs

Configure/Validate RTE

Create Initial

Generate RTE

Generate BSW

Design Steps According to AUTOSAR

AUTOSAR XML Replacement Files

C Code File

Configure/ Validate BSW

Figure 4. AUTOSAR Generation Process

The following list shows the MCALs and GUIs developed by Atmel:

• General-purpose timer driver• Watchdog driver• Microcontroller unit driver• Flash drivers• EEPROM drivers• Serial protocol interface drivers• ICU drivers• Pulse width modulation (PWM) drivers• Analog-digital (A/D) converter drivers• Digital input output drivers• Port drivers

The control area network drivers and LIN drivers are provided by Vector Informatik.

AUTOSAR Generation Process

Figure 4 describes the complete generation process:

1. The OEM first defines the functional scope of the entire vehicle based on the software components (SWCs), independent of the ECUs. The next step is to design the communication networks and distribute SWCs to the available ECUs. The result is saved in the “system description.”

2. For each ECU, the OEM reduces the “system description” to an “ECU extract of system description,” which the OEM can pass on to the (tier-one) supplier of the relevant ECU.

3. Starting with the “ECU extract of system description,” the tier one supplier integrates its own SWCs. This results in a complete and up-to-date “ECU extract of system description,” which now contains the description of all SWCs (from the OEM and tier-one supplier) of an ECU.

4. Next, the tier-one supplier creates the initial “ECU configuration description” (activity 2 in Figure 3) based on the current “ECU extract of system description” and the “BSW module description” files. Once this has been completed, the tier-one supplier begins to configure the ECU and documents it in the “ECU configuration description.”

5. The “ECU configuration description” is the foundation for the ECU-specific generation of the RTE and the BSW modules by the relevant generators.

Conclusion

The complete AUTOSAR solution, available through Vector Informatik, allows designers to develop their own ECU firmware using an Atmel 32-bit automotive device. Networking communication via LIN or CAN buses is also available. The firmware included fullfills the AUTOSAR specification requirements.


Figure 1. ATA6642 SiP

How LIN Systems Benefit from System-in-Package Devices

Low-cost local interconnect networking (LIN) is a serial protocol used for in-car communications. LIN systems are typically used throughout the automobile in comfort, powertrain, sensor and actuator applications. Atmel® supports these applications with a modular LIN family that ranges from simple transceiver ICs to complex system basis chips (SBCs) and system-in-package (SiP) solutions.

System in package is used for devices that integrate several semiconductor chips within one package, thus forming a complete electronic system. In contrast to standard solutions where the functionalities of a complete system are performed by separate ICs, a SiP can do so with one single device. That said, SiPs are another milestone of continuous IC performance improvement, power loss and cost reduction, as well as miniaturization at the system level.

With the rapid LIN market growth, the requirements for ever-increasing system efficiency, higher integration and lower costs have increased as well. Similarly, the number of control switches for various applications has also increased. Applications where the switches are located very remote

from the control electronics and wires integrated within the wiring harness do require high-voltage switches. The Atmel ATA6642 SiP has been developed to fulfill these increasingly demanding market requirements.

Atmel ATA6642 LIN SiP

The new ATA6642 LIN SiP is designed for complete LIN-bus node applications, in particular for LIN switch applications. Integrating almost the complete LIN node, the device consists of two ICs within one package. The first chip is the ATA6641 LIN SBC, encompassing a LIN transceiver, a 5V regulator (up to 80mA load current), a window watchdog, an 8-channel high-voltage switch interface with high-voltage current

Simplifying the Design of Switch Applications with LIN Bus Connections

Daniel Yordanov, Berthold Gruber


Figure 2. ATA6641 LIN SBC Block Diagram

16-bit SerialProgramming

Interface(SPI)

HV Input

VoltageDivider

5VVoltage

Regulator

Control LogicInt. Oscillator

Window WatchdogWD Oscillator

LIN Physical LayerInterface

HV SwitchInterface Unit

(8x)

CS1IREFCSPWMMODE CS2 CS3 CS4 CS5 CS6 CS7 CS8

VS

VRLS

VCC

VBATT

VDIV

NCS

GND

AGND

CL15

SCK

MOSI

MISO

LIN

TXD

RXD

NIRQ

NRES

WDOSCNTRIG

Figure 3. AVR Core Block Diagram

PowerSupervisionPOR/ BOD

andRESET

OscillatorCircuits/

ClockGeneration

WatchdogTimer

WatchdogOscillator

ProgramLogic

debugWIRE

AVR CPU

EEPROM

DAT

A B

US

Flash

GND VCC

A/D Conv.

InternalVoltage

References

Timer/Counter-1

Timer/Counter-0

AnalogComp.SPI and USI

11

2

PORT B (8) PORT A (8) LIN/ UART

SRAM

AVCC

AREF

RESETXTAL[1; 2]

PB[0 to 7] PA[0 to 7]

sources and a 16-bit SPI for configuration and diagnostic purposes. The second chip is the Atmel AVR® ATtiny167 automotive 8-bit microcontroller with advanced RISC architecture and 16KB Flash memory.

With its industry-leading design, the ATA6642 offers designers great flexibility, so that the SiP can be used in various applications such as port/contact monitoring, switches (towards GND or VBAT), LED/ relay/ power transistor control or switches connected through the wiring harness.

Integrated LIN System Basis Chip

The block diagram in Figure 2 provides a basic overview of the structure of the ATA6641 LIN SBC.

The ATA6641 LIN SBC with its flexible operation modes (sleep mode and active low-power mode) guarantees a very low current consumption even in the case of a floating bus line or a short circuit on the LIN bus to GND. Special techniques ensure that the circuit switches back to sleep mode after approximately 10ms if the bus line is floating or if a short circuit occurs to keep the current consumption at a minimum level. In sleep mode the entire SiP is switched off, with a current consumption as low as 8μA. The SiP can be easily woken up via the LIN bus or CL15, and is ready to operate within a couple of microseconds. The LIN transceiver is compliant to LIN2.1 and SAEJ2602-2. The slope control at the LIN driver ensures secure data communication up to 20kBit/s. Data rates of up to 200kBit/s are also possible and enable high-speed data communication (for example, programming at line end over the LIN bus).

The window watchdog ensures a correct function of the microcontroller.

A total of eight high-voltage (HV) current sources with HV comparators and voltage dividers implemented in the HV switch interface are available for switch scanning. Using the HV current sources also enables direct driving of LEDs, relays and transistors. All eight are high-side current sources; three of them can also be switched to low-side current sinks.

The ATA6641 device's functionalities can be configured via the 16-bit SPI. This SPI interface simplifies and speeds up the configuration of the slave/master LIN node for any given application.

Integrated AVR MCU Functionality

The ATA6642 device's high-performance AVR core enables designers to build flexible and cost-effective embedded control applications. By executing powerful instructions within a single clock cycle, engineers can achieve throughputs


Figure 4. Basic Application Example

PA7

PB7

PA0

PA3

AVC

C

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PWM3

PWM2

MOSI_ISPSCK_ISP

VBAT

ISP

CL15

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2

5NRES

6

(1) Note: If the watchdog shall be disabled directly after power-up (e.g. for microcontroller programming or debugging purposes) the pin VDIV must be tied to high level until the reset phase ends (positive slope at pin NRES).

USI used as SPI, because PA2 is used for third PWM signal.

approaching 1 MIPS per MHz, helping them, optimize power consumption versus processing speed. The AVR core combines a rich instruction set with 32 general-purpose working registers. All 32 registers are directly connected to the arithmetic logic unit (ALU), allowing the access of two independent registers in one single instruction executed within one clock cycle.

One of the AVR core's main features is the LIN UART, designed to match as closely as possible to the LIN software application structure, thus helping to save development time and CPU resources.

A debug wire and an ISP interface are available to program the microcontroller.

Application Examples

Figure 4 shows a LIN slave application with the ATA6642 where several external devices are connected to the CSx pins of the HV switch interface. Only a minimum number of external parts is needed due to the device's very high level of integration.

Switch Control Application

Eight high-voltage I/O ports are the heart of the ATA6642; these ports make the device perfectly suited for switch control applications with higher ESD requirements. These I/O ports allow a very flexible control of up to eight single switches, a switch matrix or any combinations of both, as shown in Figure 4, supplied by an internal current source in the range of 5mA to 25mA. Three of the I/O ports can be configured either as current sources (i.e., for switches towards ground) or as current sinks (i.e., for switches towards battery); the other five pins serve for current sourcing only.

Each of the eight current sources delivers a constant current level derived from a reference value measured at the IREF pin. This pin is voltage stabilized (VIREF = 1.23 V typ.) so that the reference current directly depends on the externally applied resistor connected between the IREF pin and ground. The resulting current at the CSx pins is (1.23V/ RIref) x rICS. For example, with a 12kΩ resistor between IREF and GND, the value of the current at the CSx pins is 10mA (assuming IMUL = `0´ => rICS_H = 100). Missing and short-circuited resistors will be detected for failsafe reasons. In such cases,


Figure 6. 3 x 3 High-voltage and 3 x 2 Low-voltage Switch Matrix Application

PA7

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3 x 2 Low VoltageSwitch Matrix

3 x 3 High VoltageSwitch Matrix

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GND

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O

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IG

(1)Note: If the watchdog shall be disabled directly after power-up (e.g. for microcontroller programming or debugging purposes) the pin VDIV must be tied to high level until the reset phase ends (positive slope at pin NRES).

Figure 5. Principle Schematic of a High-side / Low-side Switch Interface

StateChangeDetector

AGND

IIREF × rlCS

IIREF × rlCS

VCSxth (4V)

MU

X

HVComp

VS

PWMY

CSx

VDIV

d_statechange_x

dout_cs_x

CSA[2 to 0]

VDIVP

VDIVE

CSE_x

CSSM_x

CSC_x

VBATT3R

R

an internally generated reference current IIREFfs will be used instead to maintain a certain level of functionality.

Each switch input has a HV comparator, a state-change-detection register for wake-up and interrupt request generation, and a voltage divider with a low-voltage output that can be fed through to the measurement pin VDIV.

The I/O interface is shown in Figure 5.

The ATA6642 offers flexible switch monitoring. A state-change detection circuitry is implemented so that each input can be configured to trigger an interrupt upon state change even during low-power mode. Therefore, the respective current source needs to be configured so that it is controlled via the corresponding pin. A rising edge on this pin enables the current source and delivers a stable switch readback signal at the CS pin. With the falling edge on the corresponding PWMy pin, the switch state is updated. If a change of state is monitored, an interrupt request is generated. If no wake-up occurs on a certain switch—either because there is no application demand for this, or due to a failure, e.g., a hanging switch or a shorted connection line—it

can be prevented by disabling the current source in the SPI configuration register.


Port CS1 CS2 CS3 CS4 CS5 CS6 CS7 CS8

PWM1 X - - - - - X X

PWM2 - X - - X X - -

PWM3 - - X X - - - -

Table 1. CSx Port Configuration Table

Figure 7. LIN Slave for HV/ PWM Control with ATA6642 Microcontroller

PA7

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If switches are placed outside and connected via a wiring harness to the ECU, the ATA6642 permits a complete diagnosis of short circuits or cable breaks. If ports are not used for switch detection, they can be switched off.

The ATA6642 comprises a high-precision current source for multi-resistor coding. The scan current through the switches can be chosen to be sufficiently high so that it cleans the switches.

Voltage Measurement Application

In addition to the high-voltage (HV) comparator for simple switches, the ATA6642 device's HV I/O ports are also equipped with a voltage divider. The low-voltage signal at the tap of the divider is linearly dependant on the input voltage and is provided at the VDIV pin to enable analog voltage measurements on the HV pins by using one of the AVR core's ADC pins.

The VDIV pin guarantees a voltage and temperature-stable output ratio of the selected input. It can be sourced either by the VBATT pin or by one of the switch input pins CS1 to CS8.

PWM Control Application

The ATA6642's switch interface current sources can be used to directly control pulse-width-modulated loads (i.e., switch scanning or LED driving). The PWM signal applied to the PWM1 to PWM3 input pin is used as control signal for the chosen current sources at the corresponding I/O ports. The assignment of the current sources to the three PWM input pins is shown in Table 1.

Depending on the application, it might be required to control the HV I/O ports with different PWM signals. The ATA6642 device's AVR core provides three different PWM signals. In


Figure 8. LIN Slave for RGB LED Control

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B

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(1)Note: If the watchdog shall be disabled directly after power-up (e.g. for microcontroller programming or debugging purposes) the pin VDIV mustbe tied to high level until the reset phase ends (positive slope at pin NRES).


those applications, a universal serial interface (USI) needs to be used instead of the hardware SPI. This is because of the dual function of the pin PA2 (SPI master input/ slave output and PWM output A for timer/counter0).

The USI provides the basic hardware resources for serial communication. Along with a minimum of control software, the USI allows for significantly higher transfer rates and uses less code space than merely software-based solutions. Interrupts are included to reduce the processor load.

RGB LED Control Application

With its constant current sources, the ATA6642 device is perfectly suited for LED control systems. The most typical application is shown in Figure 8, where the ATA6642 device controls an RGB LED. Depending on the current capability

of the applied LED, this LED can be connected to a single I/O HV port. The ATA6642 device is capable of driving up to 25mA per channel. In case a higher current is needed, two or more I/O HV ports can be combined.

ExampleControlling an RGB LED with the following forward current capabilities:

• Red = 20mA• Green = 20mA• Blue = 10mA

can be done by setting a constant current of 10mA for all I/O HV ports. 20mA are achieved by connecting two I/O ports. In the case of the blue LED, which is only capable of 10mA, only one of the connected I/O ports needs to be switched on.


Figure 9. LIN Slave Relay Driver

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H-bridge Relay Control Application

The ATA6642 can also be used as a relay driver. In case the 20mA output current of each I/O port is not sufficient to drive the load, the output pins can be interconnected to achieve a higher load current.

In the example shown in Figure 8, three outputs are connected, so that the minimum achievable output current is 3 x 20mA = 60mA. As an additional safety feature, the CS1 and CS2 HV interface pins are used as sense inputs that monitor the proper relay operation.

The relays are configured as an H-bridge, which enables driving of a motor in both directions. A typical application example for such a configuration is a window lifter system.

Conclusion

With its system-in-package (SiP) architecture and rich set of features the ATA6642 fulfills the increasingly demanding market requirements for improved system efficiency, higher integration and lower costs. The SiP device offers designers extended flexibility and is well suited for a broad range of LIN-related applications such as port/contact monitoring, switches (towards GND or VBAT), LED/ relay/ power transistor control or switches connected through the wiring harness.


Two-Wire LIN NetworkingDarius Rydahl

Vbatt

Cvs_mDLIN

Dbatt

RLIN

CLIN_m CLIN_s

Cvs_s

VS

LIN

GND

Master

VS

LIN

GND

Slave

Figure 1. Standard Three-wire LIN Configuration

LIN Bus—Introduction

Today’s modern automobiles contain hundreds of sensors used to measure and report on parameters such as temperature and pressure. In most instances, these sensors are remotely located within a vehicle far away from the host microcontroller responsible for monitoring and processing the sensor data. These sensors typically do not directly connect to a network (such as CAN or LIN) due to the vehicle wiring overhead associated with connecting to the network. One such method for overcoming this wiring limitation is to convert the standard three-wire LIN network to a two-wire implementation where the LIN slave nodes harvest power directly from the LIN bus master communication wire, thereby eliminating the need for an individual battery supply wire to each slave node.

A standard LIN bus consists of a master node and up to 15 slave nodes connected to a single network. The physical LIN network is a three-wire configuration consisting of power (vehicle battery), ground and the LIN bus communication line. A pull-up resistor, RLIN

, typically 1kΩ, is required on the

master’s LIN bus line. Under normal LIN bus operation, this pull-up resistor provides a voltage bias on the LIN bus line to the slave nodes on the LIN network. It does not power the LIN slave nodes. Slave node power is derived from the battery input to the device, as shown in Figure 1.

It is possible to use a non-standard LIN network architecture that simplifies to two wires. This approach relies on the


Figure 2. Proposed Two-wire LIN Configuration

Cvs_m

Dbatt

Vbatt

RLIN

CLIN_m CLIN_s

Dvs

Cvs_s

VS

LIN

GND

Master

VS

LIN

GND

Slave

LIN Master Pull-up Resistance (Ω)

0 200 220 270 390 1000

Slav

e N

ode

Load

Cur

rent

(mA

) 16

14

12

10

8

6

4

2

0

Minimum Slave Supply 5.5V

Figure 3. LIN Master Pull-up Resistance versus Maximum Slave Node Load Current

at 5.5V Supply

harvesting of power by a connected slave node directly from the LIN bus line, thus eliminating the need for an independent slave node battery supply line. This concept is shown in Figure 2.

With the battery supply line removed, all that is required to power the slave node is a blocking diode, VDS and buffer capacitor, CVS_S, large enough to sustain the slave node supply voltage during the transmission of LIN data packets, which periodically pulls the LIN signal to ground. This article outlines the implementation of this two-wire approach and identifies the inherent system-level tradeoffs that must be considered to fully realize a functional two-wire LIN network.

Key Parameters

The key to successfully implementing a two-wire LIN network centers around the power requirements of the connected slave node. The slave node must be supplied with sufficient power to maintain communication at the minimum system operating voltage: typically 9V. If this condition cannot be met, it is unlikely that the two-wire LIN implementation will be a viable solution.

Key parameters that affect the slave node’s performance in the two-wire implementation are:

1. LIN bus power supply2. Slave node current consumption3. Slave node buffer capacitance4. LIN bus data protocol

LIN Bus Power Supply

The two-wire LIN network is limited by the power supplied from the master to the slave node over the LIN bus line. The

supply to the LIN slave in this configuration will be dictated by the LIN bus master pull-up resistor, RLIN (Figure 2). The slave node has a fixed minimum input voltage operating requirement of 5.5V (reference: the Atmel® ATA6624 LIN transceiver). In order to meet this minimum operating voltage requirement, the load current drawn by the slave node must not cause the voltage drop across the LIN master pull-up resistor to increase to the point at which the input voltage to the slave node drops below 5.5V. This is the minimum operating voltage threshold for slave node voltage regulator operation. Figure 3 shows the maximum load current available to the slave node at the minimum supply voltage of 5.5V at different LIN master pull-up resistances.

The 1kΩ master pull-up resistor specified in the LIN standard specification cannot be used in the two-wire configuration. The resistor is too large and, as a result, is unable to properly source the slave node load (slave node current will be discussed in further detail in the following chapter). The pull-up resistor must be reduced in size to the smallest value possible without exceeding the current limitation specification of the LIN driver. In the case of the typical Atmel LIN transceiver, the ATA6624, the recommended minimum pull-up resistor value is 220Ω. Resistances lower than this could result in excessive current flow through the LIN transceiver when the LIN bus is asserted low.

Slave Node Current Consumption

There are several factors which contribute to the overall current consumption of the LIN slave node. They include:

1. System clock frequency2. Power management

a. Sleep modeb. LIN scheduling


Frequency (MHz)0 2 4 8

Cur

rent

(mA

)

10

9

8

76

5

4

3

2

1

0

Normal Mode

Figure 4. Typical Normal Mode ATtiny167 Current vs. System Clock Frequency

System Clock Frequency (MHz)0 2 4 8

Ave

rage

Cur

rent

(mA

)

10

9

8

76

5

4

3

2

1

0

Normal Mode

Power-down/Silent Mode

Figure 5. Typical Current vs. System Clock Frequency

(Note: 2MHz System Clock, 8-bit Response, No Load, 1s LIN Schedule Table Period

for the Power-down/Silent Mode Measurement Case)

Figure 6. LIN Wake-up and LIN Frame

System Clock Frequency

The system clock frequency of the microcontroller has the most significant effect on the slave node current consumption. The slave node current consumption is directly proportional to the clock frequency. This effect is shown in Figure 4.

Clearly, one should attempt to use the lowest clock frequency that enables the application to meet functional design requirements.

Power Management—Sleep Mode

The overall current consumption of the two-wire LIN slave node can be further reduced by duty-cycling between low and high current operating modes, e.g. power-down/normal mode for the microcontroller and silent/normal mode for the LIN transceiver in between LIN data frames. Figure 5 demonstrates this point.

Atmel AVR® microcontrollers provide various sleep modes, allowing the user to tailor power consumption to the application’s requirements. In the case of the two-wire LIN application, the power-down mode provides the greatest current reduction when used in conjunction with the silent

mode of the LIN transceiver. In this mode, all generated clocks are shut down, allowing operation of asynchronous modules only (external interrupts, USI and watchdog). To wake up the microcontroller from power-down, the LIN master must first generate a LIN wake-up request followed by a LIN frame header. This process is shown in Figure 6.

Upon wake-up, the microcontroller enters the normal mode and switches the EN pin (LIN transceiver enable) to HIGH at the start of each newly received LIN wake-up/frame packet. During LIN data frames, the slave node microcontroller remains in normal mode and is able to provide an immediate data response upon receipt of the sync-break and message ID. At the end of the LIN data frame, the slave node returns to the power-down mode.

Operating the device in this manner will significantly reduce the average current consumption of the slave node.

Power Management—LIN Scheduling

The time between LIN frames, also known as the schedule table period, and the duration of the LIN frame define the power duty cycle of the slave node. This duty cycle affects the average current consumption of the two-wire LIN slave node. A typical LIN network operating at 19.2kbaud with a single frame, 8-bit message response has an average frame length of 2.95ms each. Figure 7 shows the effect of varying the schedule table period while connected to a slave node that is power duty cycling between power-down/silent and normal modes under these conditions.

Clearly, lengthening the schedule table period reduces the slave node’s average current consumption. However, this benefit is bounded by the power-down/silent mode current


LIN Schedule Table Period (ms)0 10 20 50 100 1000 2000

Ave

rage

Cur

rent

(mA

)

6

5

4

3

2

1

0

Normal Mode

Power-down/Silent Mode

Figure 7. Effect of LIN Schedule Periods vs. Current Consumption (2MHz System Clock)

Cvs_m

Dbatt

Vbatt

RLIN

CLIN_m CLIN_s

Dvs

Cvs_s

VS

LIN

GND

ATA6617

VS

LIN

GND

ATA6617

Master Slave1

CLIN_s

Dvs

Cvs_s

VS

LIN

GND

ATA6617

Slaven

Figure 8. Two-wire LIN Multi-slave Network

and offers minimal benefit for schedule periods greater than one second.

Slave Node Buffer Capacitance

While an important piece of the two-wire LIN equation, sizing of the slave node buffer capacitor, CVS_S, is not a dominant factor. The capacitor must provide sufficient charge reserve to power the slave node during a LIN frame data packet (LIN signal is periodically asserted low) and also receive a full charge between LIN frame data transmissions (the LIN signal is pulled up to system supply voltage). In practice, bench tests indicate that a buffer capacitor of 47μF to 100μF is sufficient to maintain power to the slave node for a network operating at a data rate of 19.2kbaud with a 100ms delay (or greater) between LIN data frames and a 9V minimum operating battery voltage.

LIN Bus Data Protocol

The format of the LIN bus data protocol will affect the charge/discharge rate of the slave node supply line buffer capacitor. Three factors affect the data format:

1. Rate of data transfer2. Quantity of data transferred3. LIN data schedule table period

The LIN bus data rate should be kept high, i.e., a maximum baud rate of 19.2kHz or higher to maximize the speed at which the data can be transferred. The quantity of data (number of bits) should be kept as low as possible in order to minimize the duration of the dominant state (logic level low) on the LIN bus line. And finally, the LIN schedule table period should be long enough in duration to allow the LIN bus powered slave node time to fully recharge the buffer capacitor, CVS_S, between LIN message frames.

Note: Most Atmel LIN transceivers are capable of baud rates in excess of the LIN specification (please refer to the specific device data sheet for more information).

Multi-slave Evaluation Network

The multi-slave two-wire LIN network used for test and characterization purposes is shown in Figure 8. The two-wire LIN network total node count is limited only by the LIN master pull-up resistor’s ability to source the required current to the attached slave nodes to maintain normal operation (slave node VS greater than 5.5V).

Each node has been realized using the Atmel ATA6617-EK* evaluation board and configured using the settings shown in Table 1. This configuration provides one possible operating scenario and, as such, will most likely need to be modified to accommodate the end user’s application.

*Note: the ATA6617-EK is an Atmel LIN system in package (SiP) evaluation board which consists of an Atmel AVR microcontroller, the ATtiny167, and the Atmel LIN system basis chip (SBC), the ATA6624. For more detailed information, please refer to the product data sheets for the respective devices.

The network utilizes the standard LIN protocol and does not deviate from the LIN2.x standard in any manner. The schedule table has been optimized for the two-wire LIN application where a LIN wake-up frame is followed by a single slave node frame, Figure 9.


Wake-up

Frame Slave1 Frame Slave2 Frame Slaven

Wake-upWake-up

Figure 9. Multi-slave LIN Frame Schedule

Figure 10. Three-slave Network Start-up

Standard LIN protocol dictates that each node must process every incoming frame ID message on the bus. This forces each slave node to wake-up on every incoming message, regardless of ownership. Sending a wake-up frame followed by a single slave node frame minimizes the time that each slave node is powered “ON”. The alternate approach of sending a wake-up frame followed by a sequential burst of all the slave frames will cause slave nodes to remain awake longer than necessary. The end result is an overall increase in system load current—a scenario that should be avoided.

Network Start-up and the Voltage RegulatorA multi-slave, two-wire LIN network can be implemented so long as the supply voltage to the slave node does not drop below the 5.5V minimum input voltage requirement of the ATA6617 voltage regulator. In this regard, extensive testing has shown that the network as currently configured cannot support more than three slave nodes at any one time. The effective load placed upon the LIN master pull-up resistor simply cannot source enough current to meet the minimum input voltage requirement under all operating conditions.

Ultimately, the network is limited by the voltage drop across the LIN master pull-up resistor and the cumulative load induced by the multiple slave nodes. Adding slave nodes to the network will increase the effective load placed upon LIN master pull-up resistor. The load placed upon Vbatt results in an increased voltage drop across the master pull-up resistor, RLIN, thus decreasing the input supply voltage to the slave nodes. If the input voltage falls below 5.5V, the minimum input voltage required for ATA6617 voltage regulator operation, the output will become unregulated and the slave node(s) will be rendered inoperable. In this mode of operation, the voltage regulator pass transistor behaves as a switch and the input voltage flows directly through to the regulator output. Voltage regulator current in this region is unstable and can be upwards of 3mA in excess of the normally regulated current. Operation in this unstable region

will lead to non-linear increases in the voltage drop across the LIN master pull-up resistor, RLIN.

Increasing the number of slave nodes on the network greatly raises the risk that an “unregulated” voltage regulator condition will occur. This is due to the brief, but instantaneous spike in the load current of each slave node when power is initially supplied to the network at start-up. Extra current is required to kick-start the voltage regulator of each slave node. Even though the average current consumption in the multi-slave network is approximately 0.8mA per slave node, an extra 2mA to 3mA of current must be factored into the overall current consumption of each node at start-up.

Four-node Network (1 Master, 3 Slaves)

Figure 10 shows the effect that the load has upon the LIN bus line at network power-on when three slave nodes are connected to the network. The plot clearly shows that slave node start-up briefly places an extra load on the network not seen during normal operation. At start-up, the LIN bus supply voltage hovers around 5.5V. Eventually, the slave node voltage regulators stabilize and the supply voltage settles to 8.2V. Network communication begins at this point.


Figure 11. Four-slave Network Sequential, Start-up

Figure 12. Four-slave Network, Serial Start-up

Five-node Network (1 Master, 4 Slaves)

Figure 11 shows the start-up behavior when a fourth slave node is added to the network. In this case, the LIN bus supply voltage is never able to recover from the start-up load condition and hovers at 5V (0.5V below the minimum operating voltage of the voltage regulator). The measured voltage drop across the LIN master pull-up resistor in this case is 3.3V.

The load current through the 220Ω LIN master pull-up resistor under these conditions is calculated by:

IRLIN = VRLIN / RLIN = 3.3 / 220 = 15mA

Referencing the plot from Figure 3, one can see that the maximum load current supported by the 220Ω LIN master pull-up resistor is approximately 13mA at 5.5V. The 15mA load caused by the addition of the fourth slave node is 2mA greater than the two-wire LIN network can handle. As a result, the slave nodes fail to respond to the master frame requests.

To mitigate this effect, consider the scenario where the slave nodes are started sequentially (one node after the other, not all at once). In this case, network communication will occur as shown in Figure 12. Staggering the start-up of the individual slave nodes greatly reduces the current load on the network at reset, in effect increasing the node handling capabilities of the two-wire network.

A network using this implementation could potentially run up to 12 slave nodes under the same network conditions;

a) current per slave node is 0.8mA and b) 3mA voltage regulator start-up transient is limited to one slave node at a time. Then,

ISlave_total = number of slaves × ISlave = 12 × 0.8 = 9.6mA

and,

INetwork = ISlave_total + IVreg_start = 9.6 + 3 = 12.6mA

The calculated current of 12.6mA is slightly below the 13mA maximum supply current that the LIN master is capable of supporting with a pull-up resistance of 220 ohms. In theory, this network should be possible.

Conclusion

The analysis and measurements here have shown that the existing LIN networking topology (three wires, battery, ground and LIN) can be easily transformed to a two-wire implementation (LIN and ground) with very little effort. All that is required is a thorough understanding of the system supply/load requirements and several hardware modifications to enable the slave node to harvest power from the master LIN bus line in between LIN data frame transmissions. The two-wire LIN network is best suited for low-node count networks where the system is limited to one master and no more than three slaves where all nodes are powered on simultaneously. The number of slave nodes could potentially be increased if the system designer is able to implement a power-on scheme where the slave nodes are activated serially to limit the surge current at network start-up.


Low-cost Battery Measurement System for 7/13-Cell Applications

Darius Rydahl

Introduction

The standard battery measurement system using the Atmel® ATA6870 circuit can measure the voltage of up to six battery cells. Several of these ICs can be stacked in series to measure the voltage of up to 96 battery cells simultaneously. For most applications, the “stacked” battery measurement IC approach is sufficient since the number of cells measured in these applications is a multiple of three, four or six cells. In some instances, e.g., an e-bike application, the cell count of the battery may be of an odd number: 7 or 13 cells. With these applications, the use of multiple, stacked ATA6870 circuits combined with a standard microcontroller (MCU) may not be the most cost-effective solution for the end application. A more practical, lower cost implementation is to use one ATA6870 chip in conjunction with an Atmel battery management microcontroller.

Standard ATA6870 Implementation

The standard implementation of an ATA6870 battery management system consists of at least one ATA6870 battery measurement IC (maximum sixteen, connected in series) plus a general-purpose MCU for control and data processing. In Figure 1, the MCU is powered by the lower ATA6870 IC’s on-board 3.3V voltage regulator (VDDHVM). Communication occurs via SPI where data is transferred serially between multiple ATA6870 circuits, one IC to the next, to/from the MCU. As shown in Figure 1, a common ground reference is shared between the bottom ATA6870 device and the MCU. In this instance, there is no voltage offset between the MCU and the ATA6870 circuit, thus eliminating the need for additional interface circuitry between the CLK and SPI pins of the two ICs.


Figure 1. Standard Twelve-cell ATA6870 Configuration (Common GND)

MCU

VBMS

VBAT SPI

VDDHVM

CLK

SPI

+-+-+-+-+-+-

AtmelATA6870

+-+-+-+-+-+-

AtmelATA6870

Figure 2. Seven-cell Battery Measurement System Using Two ATA6870 ICs

MCU

VBMS

VBAT SPI

VDDHVM

CLK

SPI

+-

+-+-

AtmelATA6870

+-+-

+-+-

AtmelATA6870

Figure 3. Two-chip Battery Measurement Solution for 7 or 13 Cells

ATmega32HVE2or

ATmega32HVB

LevelShifterGNDBMS

GNDMCU

VBMS

VBAT

VMCU

CLK

SPI

+-+-+-+-+-+-

+-

AtmelATA6870

Seven/Thirteen-cell ATA6870 ImplementationIn applications where the total cell count is a multiple of 7 or 13, the designer can simply add additional ATA6870 ICs to the battery stack as shown in Figure 2. The seven battery cells must be split between the ICs to maintain the minimum operating voltage of 6.7V for each ATA6870 IC.

This three-chip battery measurement architecture for seven-cell applications is easy to implement, but can increase the system cost due to the use of multiple ATA6870 ICs. A more practical implementation is the two-chip1 approach where a single ATA6870 (six cells) circuit is coupled with a battery measurement MCU (one cell).

1 The 7-cell application can be expanded to accommodate 13 or

more cells by including additional ATA6870 ICs into the stack.

Atmel offers two possible solutions for the seven-cell application using a battery measurement MCU as shown in Figure 3. In this example, the ATA68670 IC can be paired with either the Atmel megaAVR® ATmega32HVE2 or megaAVR ATmega32HVB MCU. Both MCUs have battery voltage and current measurement capabilities. The feature sets2 and peripheral offerings (number of cell measurement inputs, LIN bus interface, etc.) of two MCUs are slightly different, so the specific requirements of the end application must be taken into consideration before selecting the MCU.

2 Please refer to the specific datasheet for each device for more

detailed information.


Figure 4. Input Level Shifter

GND

VDDHVM

OUT

IN

MCU

Figure 5. Output Level Shifter

OUT

IN

VDDHVM

GNDMCU

Ground Offset

Regardless of the MCU used, additional circuitry must be inserted between the digital I/O pins that connect the MCU to the ATA6870 IC to compensate for the ground offset between these two devices. This offset/voltage difference arises since the ATA6870 ground is no longer referenced to the same ground as the MCU. The battery management MCU must now measure the voltage of the bottom-most cell in the battery stack, VMCU (see Figure 3). The MCU also derives its supply voltage from VMCU, unlike the situation in the standard measurement implementation where the MCU is supplied by the ATA68670 voltage regulator (VDDHVM). Due to this configuration, VMCU is now the ground reference for the bottom-most ATA6870 IC in the stack. Therefore, isolation between the two devices and level shifting of the digital I/O interconnections is required. Six digital I/O lines are affected by the ground offset and must be level shifted. They include the SPI pins (MOSI, MISO, SCK and CS), the ADC reference clock (CLK) and the interrupt request line (IRQ).

Up-converting Level Shifter

Up-converting from the MCU to the ATA6870 is accomplished through the use of the circuit shown in Figure 4. All ATA6870 SPI input signals (SCK, MOSI, CS_N) and the ADC reference clock (CLK) must use this circuit. The level shifter utilizes a high-speed switching NPN transistor and voltage divider to up-convert the low-level MCU output voltage to the regulated voltage supplied by the ATA6870 IC, VDDHVM (3.3V + VMCU). It should also be noted that resistor divider values are dependent upon the voltage offset between the MCU ground, GNDMCU, and the ATA6870 ground, GNDBMS.

Down-converting Level Shifter

Down-converting the voltage from the ATA6870 to the MCU is accomplished by the use of the circuit shown in Figure 5. All ATA6870 SPI output signals (MISO and IRQ) must use this circuit. The level shifter utilizes a P-channel MOSFET and a voltage divider to down-convert the ATA6870 IC's output signal to the input voltage required by the MCU. As with the up-converted inputs, the same resistor divider rules apply.

Conclusion

Since cost is the primary concern for any application, it is important to consider the type of architecture to be used. The 7/13-cell battery management application is a perfect example when it is useful to modify the system architecture in a way that completely eliminates one IC. In this case of a seven-cell application, the total IC count can be easily reduced from three ICs to two by replacing one ATA6870 circuit and the MCU with one Atmel battery measurement MCU. In making this architecture change to the system, the MCU and ATA6870 IC have different ground potentials, and the digital I/O pins between the two devices are offset by this difference in voltage. This offset can be easily eliminated by adding several low-cost transistors and resistors to the digital I/O lines that connect the two devices. The resulting cost-effective solution fulfills all end application requirements.


ATmegaxx8PA-15 RC Oscillator Frequency Drift CompensationRobin Walsh

The new Atmel® AVR® ATmegaxx8PA-15 family with UART and 32-pin package is perfectly suited for multiple automotive applications with local interconnect network (LIN) or pulse width modulation (PWM) communications . Design engineers can include a small software routine to compensate the RC oscillator temperature drift over temperature . This article describes a method to achieve this by using the on-chip temperature sensor .


Temperature (°C)

F RC (M

Hz)

-40 -30 -20 -10 10 20 30 40 50 60 70 80 90 100 110 120 130 140 1500

8.4

8.3

8.2

8.1

8.0

7.9

7.8

7.7

6.05.5

5.04.54.03.63.33.02.72.52.2

2.01.87.6

Figure 1. Typical RCO Frequency Drift Characteristic

(Calibrated 8MHz RC Oscillator Frequency vs. Temperature)

Signature ByteZ-Pointer Address

Device Signature Byte 1 0x0000



RC Oscillator Calibration Byte 3V 0x0001

TS_ADC_25_L-Temp Sensor Value at 25˚C - Low Byte 0x0005

TS_ADC_25_H-Temp Sensor Value at 25˚C - High Byte 0x0007

RC Oscillator Calibration Byte 5V 0x0009

Note: All other addresses are reserved for future use

Table 1. Signature Row Addressing

The ATmegaxx8PA's internal RC oscillator (RCO) is useful in applications where an external quartz crystal or resonant element cannot be used for cost reasons. The RCO is capable of providing a reasonably accurate 8MHz clock source for the AVR microcontroller where the high precision of an external crystal resonator is not required for the application. The RCO frequency is, however, sensitive to temperature and voltage change as are many semiconductor elements. The degree of sensitivity to voltage and temperature change varies considerably from device to device. Therefore, no general compensation rule can be applied; instead, it must be determined for each part empirically.

Compensation Measures and Parameters

With the introduction of the new automotive ATmegaxx8PA-15 devices, it is now possible to determine with reasonable accuracy the current operating temperature of the microcontroller using the integrated temperature sensor peripheral. It is also possible during automotive part production test procedures to determine the tendency of the RCO on each individual device to change in frequency as the temperature and voltage is changed. This specific device-dependent characteristic is then stored in a read-only non-volatile ATmegaxx8PA memory space accessible to the user’s application program, the signature row.

With this characteristic value and specified base reference conditions, it is now possible to compensate the RCO frequency drift to good effect in an application program with the addition of a small supplementary software routine which is called regularly from the main application. To function, this software routine needs, as parameters, to know the degree

to which the RCO will drift with the change of temperature for the actual device, that is to say: Δ_RCO_Frequency per Δ_Temperature_Sensor_Reading. This value can be determined during production testing and is stored as a signed byte value in the signature row at address 0x0003. It corresponds to the calculation:

Where:TS_ADC_Hot is the result obtained from the temperature sensor ADC reading of the microcontroller when it is being subjected to high temperature operational testing.

TS_ADC_25C is the result obtained from the temperature sensor ADC reading of the microcontroller when it is being subjected to ambient 25°C temperature operational testing.

Osccal_Hot is the best case RCO frequency adjustment register value (OSCCAL) to obtain 8MHz when the device is being subjected to high temperature operational testing.

Osccal_25C is the best case RCO frequency adjustment register value (OSCCAL) to obtain 8MHz when the device is being subjected to ambient 25°C temperature operational testing.

S(sensitivity)

=(TS_ADC_Hot - TS_ADC_25C)

(Osccal_Hot - Osccal_25C)


Typical values obtained during this testing would be:

TS_ADC_Hot = 437TS_ADC_25C = 297Osccal_Hot = 143Osccal_25C = 154

Giving an example result of: (437-297) / (143-154) = -13 (rounded).

What this -13 example “S” parameter effectively means to the microcontroller is that for every change in its temperature sensor ADC result of -13 (counts) from its base reference value TS_ADC_25C, we should adjust the RCO Osccal register upwards (increment) by one (count) from its base starting point Osccal_25C to compensate for the temperature-induced drift.

Naturally there are sanity checks on the values of these parameters generated during production testing to ensure that only reasonable values are accepted to be written to the signature row memory. For instance, the minimum S parameter values considered acceptable are S > 7 or S < -7, and the difference between the temperature sensor 25°C reading and the temperature sensor hot reading corresponds closely to the expected temperature excursion. Frequency adjustment guard bands are also verified to ensure that the device possesses sufficient oscillator adjustment range capability to compensate for worst case adjustment situations.

The ATmegaxx8PA microcontroller by default starts operation with the RCO adjusted to the RC Oscillator Calibration Byte 3V value, which is also stored in the AVR read-only signature row at address 0x0001. During production testing of the automotive ATmegaxx8PA family, Atmel also stores the TS_ADC_25C ADC reading as an unsigned 16-bit word value, as two individual byte values in the signature row (0x0007 and 0x0005) as well as the signed 8-bit S parameter (0x0003).

The Application Algorithm

To adjust the ATmegaxx8PA-15 RCO calibration register OSCCAL to a temperature-compensated value, the factory-supplied calibration parameters (OSCCAL_25C

Vcc*,

TS_ADC_25C, S) as well as the on-chip actual temperature sensor reading (TS_Actual) are used as follows:

OSCCAL_Compensated = OSCCAL_25CVcc* + ((TS_Actual – TS_25C) / S)

Vcc* is respectively OSCCAL_25C 5V (0x0009) or

OSCCAL_25C 3V (0x0001), whichever is closer to the application operational voltage.

Note if application space is constrained, the S division in the above equation can be usefully replaced by successive subtractions in a loop to avoid voluminous library division functions as is shown in the chapter "Sample Code Routines".

The algorithm is designed to make good use of the dynamic range of the signed byte S parameter (very little of the numerical range is unused) while being simple and code-efficient to implement on even resource-limited devices. The slowest part of the algorithm is the reading of the current temperature sensor value get_temperature() due to the time it takes to configure the ADC and possibly allow the internal references to stabilize. This operation could be usefully removed from the recalibrate() function and integrated into an application ADC task such that the current temperature sensor value is passed to the recalibrate() function only when a significant temperature change (±10°C) has been recognized, for optimal performance.

Hardware Constraints

The only specific hardware constraints for correct operation of the procedure is that the ADC-internal reference supply 1.1V be available for selection, as this is essential for the calibrated reading of the on-chip temperature sensor. Therefore, the ATmegaxx8PA-15 ARef pin should not be tied to an external reference supply but connected to a 10nF smoothing capacitor to ground as recommended in the datasheet. This still allows selection of the AVCC supply as an alternate reference to the on-chip 1.1V reference via the ADMUX register but precludes the use of any other external ADC reference.

Performance

Analysis of a large number of ATmega48PA-15 parts has shown that the use of software temperature compensation is capable of holding the RC oscillator frequency stability to better than ±2% over the temperature range +125°C to -20°C and better than ±3%, normal performance over the full operational temperature range of +125°C to -40°C. This is in comparison to the ±10% performance for the unadjusted device. This stability is normally sufficient to allow usage of PWM signaling as well as UART communication.


Sample Code Routines: ATmegaxx8PA-15 Compact Using Loop SubtractIAR C

recalibrate.c

#include <iom48pa.h>

#include <intrinsics.h>

#define OSCCAL_3V_ROOM 0x01 // Location of Factory 25C 3V osccal value

#define OSCCAL_5V_ROOM 0x09 // Location of Factory 25C 5V osccal value

#define SENSITIVITY 0x03 // Location of S parameter

#define TS_ADC_ROOM_HI 0x07 // Temp Sensor Factory 25C ADC value high byte

#define TS_ADC_ROOM_LOW 0x05 // Temp Sensor Factory 25C ADC value low byte

#define SIGRD 5 // Signature row read activation bit in MCUCR

#define FCPU 8000000 // 8MHz CPU

#define TEMP_SENSOR ((3<<REFS0)|(8<<MUX0))

#define millisecond_delay FCPU/1000

unsigned int get_temperature(void);

unsigned char read_sig_mem(unsigned int addr)

{

return (__AddrToZByteToSPMCR_LPM((void __flash*)(addr),((1<<SIGRD)|(1<<SELFPRGEN))));

}

void recalibrate(void)

{

unsigned int temperature_factory_25C,current_temperature; // TS worker variables

unsigned char new_osccal; // Temporary holding variable for result OSCCAL

signed char step_size; // Temporary holding for osccal temperature sensitivity

signed char pos_neg_sensitivity; // Increment or decrement variable

signed int temp_diff; // Temp sensor

current_temperature=get_temperature(); // First we get the actual device temperature

/* new_osccal is the (unsigned char) best-case value for OSCCAL to give nearest 8MHz RC oscillator reading at the 25˚C test point at 3V and 5V. These values are determined during production test and stored directly in the signature row at addresses 0x0001 3V or 0x0009 for the 5V setting. */

new_osccal=read_sig_mem( OSCCAL_5V_ROOM ); // Get ambient 5V osccal reading from sigrow

/* step_size is the (signed char) value which gives the change required in the temp sensor ADC value to warrant an incremental change in the OSCCAL register to compensate. This value can be derived by the formula :

((ADC_Temp_Hot - ADC_Temp_Ambient)/(Best_OSCCAL_Hot - Best_OSCCAL_Ambient)) = step_size

This value can be either positive or negative depending on the device. */

step_size=read_sig_mem(SENSITIVITY); // Get osccal sensitivity reading from signature ram


/* Optional safety check, valid sensitivity values are (abs)S > 7 */

if((step_size >= -7) && (step_size <= 7)) return; // If invalid S exit without recalibration

if(step_size<0)

{

pos_neg_sensitivity=-1;

// Negative sensitivity means reduce OSCCAL on increasing temperature

step_size=((~step_size)+1);

// Now that sensitivity has been determined make step_size absolute

}

else pos_neg_sensitivity=1;

// Positive sensitivity means increase OSCCAL on increasing temperature

/* room_temp is the (unsigned integer) raw value which the temp sensor returned via the ADC when the device was calibrated at room temperature. */

temperature_factory_25C=((unsigned int)((read_sig_mem(TS_ADC_ROOM_HI))<<8)+read_sig_mem(TS_ADC_ROOM_LOW));

/* For optimal code size here it needs to be ensured that all calculations are adjusted to positive operations */ if((temp_diff=(current_temperature-temperature_factory_25C))<0)

{

pos_neg_sensitivity=(~pos_neg_sensitivity)+1;

// Invert the sensitivity if we are dealing with below reference temperatures

temp_diff=(~temp_diff)+1; // And make temperature difference absolute

}

/* Now the parameters for the temp sensor value at room, the sensitivity Osccal/Temp and the OSCCAL at room are available. With these parameters and the current temperature sensor reading, the OSCCAL register can be adjusted. */

// Here we perform the calibration operation itself based on the given parameters

// We do a repetitive subtraction instead of a division for code size efficiency

while(temp_diff > step_size) // While an adjustment to OSCCAL is necessary

{

new_osccal+=pos_neg_sensitivity; // Adjust OSCCAL in appropriate direction

temp_diff-=step_size; // Reduce temperature difference by step amount

}

OSCCAL=new_osccal; // Calibrate Osccal

}

unsigned int get_temperature(void)

{

// Wait for conversion to complete just in case ADC is already in use

while(ADCSRA&(1<<ADSC));

ADCSRB=0;


// Be careful of the order here, if ADC is not enabled ADMUX doesn't update

ADCSRA = ((1<<ADEN)|(1<<ADIF)|(1<<ADPS2)|(1<<ADPS1)|(1<<ADPS0));

// Enable ADC, clear ADC flag, 8MHz / 64 = 125kHz

/* If the internal reference is not already on, turn it on and wait about 1ms for it to settle */

if((ADMUX&(3<<REFS0))!=(3<<REFS0)) // Is 1.1V reference already on ?

{

ADMUX|=(3<<REFS0); // Activate internal 1.1V reference

__delay_cycles(millisecond_delay);

// Wait 1ms for reference to stabilize on AREF capacitor

}

ADMUX=TEMP_SENSOR; // Configure for temperature measurement

ADCSRA|=(1<<ADSC); // Start dummy conversion

while(ADCSRA&(1<<ADSC)); // Wait for conversion to complete

ADCSRA|=(1<<ADSC); // Start proper conversion

while(ADCSRA&(1<<ADSC)); // Wait for conversion to complete

return (ADC);

}


Automotive Communications RequirementsThe protocols used in the automotive industries are not standardized. Therefore, every OEM can define and use its own message structures and properties. A wide range of signal properties and message structures is possible. Signal properties can be RF frequency, data rate, coding, modulation or deviation. The properties of the messages can be much more versatile because any constellation such as a short preamble or wake-up pattern (WUP), followed by a big gap with a start frame identifier (SFID) and a special ID at the beginning of the payload, is conceivable. Signal properties can also be mixed within one message; for example, using ASK and FSK for different parts of the message. Very flexible hardware is required to cover all potential applications.

Auto RF Portfolio for Reception of Prospective ProtocolsThe Atmel® ATA583x family is a new generation of highly integrated transceiver ICs including an AVR® core, a RX digital signal processor (DSP) and a separate analog front end with two separate receive paths that allow two signals to be searched in parallel. These new transceivers can cover most known protocols without limitations, as well as the standard frequencies (310-318MHz, 418-477MHz, and 836-956MHz) with only one external XTO via the implemented fractional-N PLL.

Highly Integrated AVR MCU-Based UHF Transceiver Family Increases Car Access System FlexibilitySascha Wagner


WUP

25 x 8-bit 0x55

CV

GAP Sync. Header

CVSFID PayloadRUN-In

2 bit 2 bit0x0815 XXBytes8-bit ”1”

Figure 3. Typical RF Protocol Structure

Figure 1. ATA583x UHF Transceiver Family

LNA, MixerImage Rej.

PowerAmplifier

Rx DSPA

D

RFIN_LB

RFIN_HB

RFOUT

VS_PA

SPDT_RX

SPDT_ANT

SPDT_TX

ANT_TUNE

Tx DSP

Temp (÷)

XTO

XTAL1 XTAL2 PB [0 to 7]

DATA BUS

PC [0 to 5]

IRQ CRC

AVCC DVCCVS

ROM24kB

AVR CPU

Flash20kB

EEPROM1024B

SRAM1kByte

16-bit SyncTimer

SRC, FRCOscillators

WatchdogTimer

ClockMan.

DebugWire

NVM Controller

Port B (8) SPI Port C (6)

SSIModulator

RF FrontendControl

16-bit AsyncTimers

2x

8-bit AsyncTimers

2x

FractionalN-PLL

Suppliesand

Reset

VoltageMonitor

SPDT

Damping

AntennaTuning

RSSIFIFO

Rx/TxFIFO

Figure 2. ATA5831 System Block Diagram

The ATA583x family provides up to five services with three channels each, making it possible to implement comprehensive and complex applications. The 24k ROM provides a voluminous API that can be used in Flash applications or via SPI from an external host controller. A key feature of the new product family is the combination of demodulator plus RX DSP. This delivers extended flexibility and is described in the following chapters (see also Figure 2).

Family Members• ATA5831: Flash version with 20k Flash memory for the

user plus 24k ROM firmware• ATA5832: User ROM version with 20k customer ROM

software plus 24k ROM firmware• ATA5833: ROM-only version with 24k firmware

Typical Protocol Types

Typical protocols as specified by the OEMs have a WUP and an SFID. In some cases, there may be a gap between these two data patterns. Also, some applications may use a code violation (CV) to achieve a defined stop and restart of the demodulator. Figure 3 shows the typical structure of such a message.


t

noise

noise

noise

noise

noise

Symbol Check Size [0 to 32]

DemodulatedSymbol Stream

Demodulator Checks

Carrier Check(only FSK)

ModulationAmplitude

Manchester

Symbol Timing

Figure 4. ATA583x Signal Checks

Typically the WUP is used to synchronize to this data stream, even if the transceiver is operating in polling mode and cyclically checks for a message. This is a typical application-specific design to decrease the current consumption.

Signal Properties

To receive a message it is necessary to know the message properties:

• RF frequency• Modulation/coding• Data rate• Deviation (if appropriate)

In the transceiver's memory, these properties can be set up individually for every service and path. Once the transceiver configuration has been completed, the device’s receive function can be used. Several signal checks are available during reception to identify the signal.

Signal Checks

The first check that is performed internally is the carrier check. This is used to quickly identify the availability of a valid signal. The check unit samples the incoming signal with a much higher clock rate, and compares the phase of each sample. In the second step a check is considered successful or unsuccessful depending on the measured phase jump. To increase flexibility a set of failure samples can be defined during the sampling time, typically one bit. The check is

repeated as long as the device is performing the signal check. This feature can only be used with FSK modulation because during ASK, there is no modulation available half of the time.

The second check that helps to detect the correct signal is the amplitude check. The amplitude after the data filter is compared with a predefined threshold. If this threshold is not exceeded, the check results in a failure signal. This feature is helpful if other signals with lower deviation frequencies are in the range of the transceiver. In this context, this protects against false signals because these are not received if the threshold is well defined.

The third check is the symbol timing check that is used to identify the right data rate. This method utilizes an edge detection unit that controls whether the edges occur within defined limits. This feature can also set the maximum data rate tolerance in the incoming data stream. The check setup takes place in the transceiver's memory within a defined percentage of the symbol time.

The fourth check performed during the signal check is the Manchester check, which scans for Manchester-compliant symbols. This check compares previous, current and upcoming symbols; if the next upcoming symbol is not allowed, the check generates a failure signal. This is helpful in detecting failures in the telegram as well as wrong coding.

Figure 4 presents a schematic overview of the four check methods.


0

= = = = = = = = = = = = = = =

1 2 3 4 5 6 7 27 28 29 30 318 9 ........

........

0 1 2 3 4

Start Frame ID Check Length

DemodulatedSymbol Stream

Wake-up Pattern Check Length

5 6 7 27 28 29 30 31

WUP

WUPCHECK

SFIDCHECK

SFID8 9 ........

0

= = = = = = = = = = = = = = =

1 2 3 4 5 6 7 27 28 29 30 318 9 ........

........

Figure 5. WUP and SFID Check Engine

All four checks are performed in parallel; however, some checks run faster than others. The fastest check method is the carrier check that generates a first result after less than one bit time, TBit. With at least two bit times, 2TBit, the Manchester coding check is the slowest. The combination of all these checks can be used to achieve a robust system that prevents false wake-ups. These four checks are very important during polling mode, in particular. If the first check generates a failure signal, the sequencer state machine exits the current channel and switches to the next one. Using this procedure reduces the time during which the system is active and also saves energy. In turn, this helps to significantly extend battery life and to achieve a very fast reaction time.

Frame Synchronization

The transceiver can perform the signal and frame synchronization checks at the same time. To this end, the new transceiver generation incorporates several pattern checks that can be used to identify specific predefined patterns.

The first executed check is the WUP check. A WUP typically consists of a data stream that is periodically repeated over an

extended period of time. It is used to indicate the incoming message to the transceiver. The WUP check compares the incoming data stream with a predefined pattern that can be freely configured regarding length and content.

The second check that is performed is the SFID check. Typically the SFID indicates the start of a telegram. It works the same way as the WUP check and is also configurable. It is possible to search for WUP and SFID in parallel, a procedure required when the synchronization pattern before the payload is very short.

To design an application that is insensitive to disturbances and that has the appropriate signal characteristics, it is necessary to implement time-outs. The wake-check-okay time-out is active from the beginning of the incoming data stream until the match of the wake-up pattern. The second time-out is the start-frame-identifier time-out that is used to cover the long gaps between WUP and SFID. This time-out is also used to reset the receive function if additional data is unavailable after the WUP to prevent a dead lock of the device.

The frame synchronization is performed in parallel to the signal checks. The designer can define which check is to be


WUP 25x8 bit 0x55/ 0x99 Symbol based SFID 0x0815

Wake Check

= 1

Wake Check Pass Start Frame ID Pass End ofTelegram

Start of Telegram Check

Wake Check Time-out Start of Telegram Time-outID Check

Pass

Payload

GAPCV CVRUN-In

0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 1 0 1 0 100000010000

Figure 6. Check Timing Overview

performed during which time slot of the frame reception. Three ranges are available: The first one lasts until the wake check is okay. The second one ranges from wake-check okay until start-of-frame okay, and the third range extends until after the SFID has occurred. The first two are called start-of-frame conditions and can be configured so that they have a predefined set of symbols that are checked until one of the checks is successful. The third check is called the end-of-telegram condition, and searches for a failure in one of the signal checks during the reception of the payload. In case one of the activated checks has generated a failure, the transceiver terminates reception. Figure 5 shows the schematic overview of the frame synchronization.

Message Identification

The transceiver devices include an ID scan for message identification. This feature scans the payload and compares the incoming data with up to 18 predefined IDs. In case there is no match until a predefined threshold of bytes, reception is stopped and the demodulator restarts so it can detect the next valid message.

Figure 6 shows a protocol overview with the duration of the different checks, such as symbol, frame and message check, plus various time-outs.

Mixed Reception Using the ATA5831 FamilyA unique feature of the new device family is its ability to handle mixed modulations within one message. Mixed modulation involves using the two reception paths of the transceiver—one path for the wake condition, the other for synchronization and reception. With this simple procedure it is also possible to handle complex protocols. The reason for this type of telegram is the strict restriction imposed by the regulatory agency. By using mixed modulation plus gaps between WUP and SFID, it is possible to increase output power and, thus, extend the transmission range.


How to Define the LF Driver’s Key Parameters in Automotive PEPS Systems

Dr. Jedidi Kamouaa

Introduction

Because of the increased comfort and security they provide, passive entry (PE) systems have become standard in medium-class cars. Although they’ve been available for several years, they have become more popular recently as their increased level of integration lowers system costs. Today, the latest trend is toward passive entry passive start systems (PEPS) for medium-class vehicles, which are well established in the automotive high-end car market. This adoption of PEPS systems in medium and low-end markets is driven by an important system cost decrease, primarily due to the reduced number of coils per vehicle, which is the highest cost contributor.

Designing such PEPS systems is challenging and includes the following difficulties:

• Generation of high-drive current and, thus, the required low-frequency (LF) magnetic field to detect the key fob inside the vehicle and/or in the near vicinity

• Drive current regulation to allow reliable RSSI measurements

• Protection under thermal stress conditions and electrical diagnostics

• Reduction of electromagnetic radiation• PEPS speed

The purpose of this article is to help designers understand how to define the key parameters of the LF driver, which is a


Figure 1. Automotive Application Example with Four Antennas

MCU

SPIInterface

LF AntennaFront Position

LF AntennaBack Position

LF Antenna at Door Handle

LF Antenna at Door Handle

ó

Coil 1

Coil 2

Coil 4Coil 3

ATA5279C

key component in PEPS systems. Also, the piece will briefly explain how the LF driver technology will evolve in the future in response to the ever-increasing need to cut costs.

Principle of PEPS System Operation

A car key is powered by a small Lithium-Ion battery that supplies the key-fob microcontroller and its associated UHF transmitter/transceiver whenever the LF wake-up signal occurs. Often, however, the key remains in sleep mode to minimize current consumption and, thus, extend battery lifetime. A key wake-up is initialized by touching one of the vehicle’s door handles or by a proximity sensor which causes the car (LF driver) to send a wake-up signal via the LF antenna located in the door handle. Each of the 3D LF receivers located in the key fob can be adjusted for sensitivity and resonance frequency to ensure a reproducible system design. If one of the key’s 3D LF receivers detects an appropriated LF wake-up signal, an ultra-high frequency (UHF) identification response (ID response) is sent back to the car.

Once mutual authentication has been processed through the UHF channel, the car door opens. Up to seven (sometimes

nine) LF antennas are used to determine whether the key is located inside or outside the vehicle prior to authorizing the engine start.

A PEPS system should also offer a special battery back-up mode that allows key fob controller operation via the LF magnetic field. All capacitors related to an LF antenna (mainly in the key fob) can be trimmed to the current resonant frequency to accommodate the tolerances of the components being used.

LF Antenna Driver System

Figure 2 shows the basic architecture of a PEPS system for a car sending a wake-up signal via the LF antenna. If the key’s LF receiver has detected an appropriate LF wake-up signal, a UHF ID response is sent back to the car. Once mutual authentication has been processed through the UHF channel, the car door opens. Based on key fob sensitivity (1-2mVpp typically) and an antenna drive current of 1Apeak, current systems can achieve a wake-up distance of one to two meters. Though it operates at the same LF frequency of 125kHz, the base station device is often separated from the LF driver device.


EngineControlModule

CentralBoard

Controller

ImmobilizerBase Station

UHFReceiver

PEPSAntennaDriver

PowerManagement

Emergency/Immobilizer

3D LFModule

LF BidirectionalLink

125kHz)

LF Up Link125kHz)

UHF Down Link315/ 433/ 868/ 915MHz

Cbuf

Vbat

X-Axis

Y-Axis

Z-Axis

UHFTransmitter

MCU

AFE

Vehicle Passive Key Fob

Figure 2. Basic PEPS System Architecture

To best match the PEPS system requirements, the Atmel® ATA5279C multi-channel LF antenna driver IC includes the following technical features:

• Three drivers with a peak current of up to 1000mA each and three additional drivers with 700mA of peak current each

• A boost converter to stabilize the antenna current independently from the battery voltage as well as from antenna tolerances

• A sinus wave 125kHz antenna signal to minimize harmonics radiation

• An antenna current regulation loop to allow stable RSSI measurement

• Programmable current in 20 steps required for RSSI field strength measurement

• An LF data buffer to reduce microcontroller data transmission tasks (limited microcontroller resources)

• Advanced fault diagnostics for driver and antenna indication

• Full protection against electrical and thermal overload• An SPI interface suitable for bus structure designs

• Very low power consumption in power-down mode• A small QFN48 7mmx7mm package

The ATA5279C IC operates alongside the Atmel ATA5791 single-chip key fob controller featuring a typical sensitivity of 1mVpeak-peak integrating the RF transmitter.

There are several critical aspects for the LF antenna driver system design which need to be considered:

• Ability to generate sufficient magnetic field to detect the key fob inside the vehicle and/or in the vicinity of the vehicle. For this purpose, the boost converter is the best choice, allowing a high-drive current with the required voltage that can reduce the antenna size and, therefore, lower the cost of the overall PEPS system. The use of a boost converter implies further considerations such as filtering, alignment and thermal calculation, etc.

• A regulation loop of the drive current for reliable field strength and thus RSSI (receive signal strength indicator) measurement

• Protection under thermal stress conditions and electrical diagnostics


Figure 3. Principle of an Antenna Current Regulation Loop

47Ω

+ +

Boost Control

VL

VDS

PGND

CinCout

Vout

Iout

IANT

IANT

VANT

VRSH

VRLS

LinDinD

10nF

Vin

IinL

Driver Stage

ATA5279

Control

DAC

Sine waveGenerator

ReturnLine

Switch

Zero CrossDetection

Sample and Hold

CurrentRegulation

CINT

CINT

RGND

AxP

AxN

VSHF

VSHS

RSH

Vout = Vin ×1

1-D×η

D =1-Vin

Vout

×η

D =ton

T

Δ IL =1

f× Vout − Vin( )× Vin

Vout

×1

L

Vout = VDS = 2× Iant_p × Zant +RShunt +2×RDSon( )+3V⎡⎣ ⎤⎦

• Electromagnetic radiation• The interface to the host microcontroller• Thermal considerations

Figure 3 shows the principle of an antenna current regulation loop, and how the ATA5279C IC's boost converter is connected to the car battery.

Boost Converter

The boost converter operates in pulse width modulation (PWM) switch mode at a fixed frequency derived from the 8MHz resonator. For example, in the case of the ATA5279C device, this fixed frequency is 125kHz. The converter is able to generate an output voltage of up to 40V, providing the required supply voltage for the driver stage. The antenna current regulator provides the required control voltage for the boost converter in order to deliver the current set for the appropriate antenna. Thus, the current flowing through the antenna is fully independent of both antenna impedance and battery voltage.

In theory, the converter output voltage depends on the duty cycle (D) of the PWM control only. However, in real life the output voltage is reduced due to the losses of the affected

components (NMOS, L, D, C) expressed by the efficiency factor η.

In continuous conducting mode (CCM), the output voltage is determined as follows:

In the case of the ATA5279C IC, the boost converter is controlled within the antenna current regulation loop. Therefore, the duty cycle and the output voltage are automatically set to the required value in order to deliver the programmed antenna current.

a) Determination of the Boost Inductor

The inductance of the boost coil determines the ripple current through the inductance itself, the decoupling diode and the smoothing capacitor at the output (see the following formula):

where:• ∆I

L = ripple current

• Vin = input voltage

• Vout

= output voltage• f = frequency• I

L = programmed current

• L = inductance

The output voltage VDS supplying the driver stage as well as the driver input signal is controlled by the current regulation. If the driver input signal is a sine wave, the boost inductor output voltage has to be increased according to the sine wave rail margin of typically 3V.


PD ≈ VF × Iout

ID_P ≈ Iout ×Vout

Vin

ΔVout =Iout ×D

f ×C

ΔVout = ESR ×Iout

1−D+ΔIL2

⎛

⎝⎜

⎞

⎠⎟

IC_RMS ≥ Iout ×D

1−D

ICin_rms =ΔIL

3

Higher Load Range Lower Load Range

25 to 40V Up to 25V

47 to 100μH 22 to 47μH

Table 1. AT5279C Inductor Value Recommendations

As a consequence, a higher inductance will (theoretically) smooth the ripple current Delta IL and reduce the thermal load of the boost power transistor. An increased inductance, however, results in increased coil size and, as a result, higher system cost, adversely affecting the boost control stability that occurs, in particular, with low current loads at the boundary of CCM to DCM (discontinuous conduction) mode. This instability is attributable to an increased oscillation effect on the NMOS switch (VL) if the converter switches to DCM operation. Also, undesirable emissions caused by those oscillations may conflict with EMC requirements.

Therefore, the selection of the inductor value needs to balance out low ripple current and stable boost converter operation. Regarding the ATA5279C device, Atmel recommends a selection of inductor values based on the specific load conditions of the driver (see Table 1).

b) Determination of the Decoupling Diode

Thanks to its low forward voltage drop and fast recovery time, a Schottky diode is the best choice to reduce power dissipation. As the switching losses can be ignored regarding conductivity losses, power dissipation as well as the peak current can be expressed as follows:

c) Determination of the Output Capacitor Cout

The output ripple voltage can be expressed in two ways:

1. While discharging the capacitor during the conduction phase of the boost converter

(D = ton/T =1 - Vin/Vout)

2. When generating a voltage drop at the impedance ESR of the capacitor caused by charging during the complementary time (1-D)

Both calculations imply a high-capacitance value to reduce the ripple voltage. However, because PEPS applications require a fast start-up time, the capacitance value needs to be low. Therefore, the best trade-off between these two diverging requirements needs to be found. Also, the capacitance value must match the resulting ripple current:

d) Determination of the Input LC Filter

The use of an inductor at the boost converter input facilitates the suppression of the ripple current in the input capacitor Cint. The required inductance depends on the individual application and the EMC requirements. The input inductor is generally similar to the one used for the boost converter.

The input capacitor provides low impedance that prevents any interaction with the car battery supply voltage. It is important, however, to ensure that the rms ripple current of the selected capacitor is higher than the equivalent rms of the boost inductor ripple current ΔIL

e) Determination of Cint

The ATA5279C IC's internal current regulator is similar to a trans-conductance amplifier that provides sink/source output currents at the Cint pin. Typically, the capacitor Cint is connected to ground so that the regulator integrates the voltage over time. The resulting voltage at the Cint pin supplies the internal control for the driver as well as for the boost converter unit.

Selection of the Cint capacitor involves a trade-off between the rise time and the overshoot antenna current. It is rather difficult, however, to calculate or simulate this value


VDS

IHS

Nmirr

ILS ILS

Pmirr2

Pmirr1

Npwr

Npwr

GND

AxP

Diag Enable

IHSDiag

Diag Enable

ILSDiag

internal nodes

VSin_pre

Ax_State

Figure 4. Principle of AxP Driver Arrangement

because the dynamic behavior of the antenna regulation loop also depends on the antenna's Q factor and the boost converter circuitry. Therefore, direct physical measurement is recommended.

Reduction of Radiated Antenna Harmonics

Even though the power dissipation of the driver stage exceeds that of a driver with a square wave output, a sinusoidal antenna signal minimizes the radiated harmonics and, thus, both effort and cost to achieve EMC approval.

Antenna Regulation Loop

The antenna current is regulated by the boost driver voltage VDS, the current of which is primarily independent of the battery state and antenna tolerances. Given the fact that PEPS systems require an accurate field strength measurement, the regulated antenna current (and, thus, the field strength) can be programmed via SPI in 20 predefined steps from 50mA to 1Apeak.

Interface to the Host Controller

To avoid overloading the host controller, the ATA5279C IC contains a 128-bit data buffer that is organized in 16 bytes. All driver-related commands and data are stored and

processed by the FIFO buffer. During operation, the status is continuously monitored. An interrupt to reload the buffer via SPI can be executed within 2Mb/s.

Electrical Diagnostics and Protection under Thermal Stress Conditions

All ATA5279C driver connection lines (AxP) and return lines (axN) are monitored during operation (see Figure 5). In case of a short circuit to battery supply or to ground, or if an antenna is shorted, the power stages switch to shut-down mode to protect themselves from damage. In addition, the temperature sensors on the NMOS driver stages shut down if the temperature exceeds 145°C. At the same time as the shutdown, an interrupt request is triggered and the shutdown cause is stored in the fault register. In addition, an advanced diagnostic mode allows the AxP and AxN outputs to be loaded by switchable DC current sources (see the gray area in Figure 4). During this diagnostic mode, the driver stages remain in high impedance. The diagnostic mode also allows the current switches and the digital level state of the selected AxP/ AxN stages to be set so they can be read via a status request. This mode as well as the related test structures can be used to indicate any antenna-line interconnection faults.


+

VDS

GND

GND

IANT

+VBatt

+VBattControl

Return LineSwitch

GND

AxP

AxN

VSHF

VSHS

RSH

ATA5279

Figure 5. Fault Scenario Schematic

Fault Scenario, e.g., at Driver 1

DriverFault Register

CodeDetected by Meaning of Fault Code /Criteria

Normal operation Switch on 00 ----- No fault

Open antenna Switch off 28 RSHMissing return line signal during modulation, no zero

cross detected via VSHS

Short circuit A1P- A1N Switch off 22 HSExcessive current through high-side transistor,

parameter 4.1 > ;0.88 A;

Short circuit A1P - VBatt Switch off 21 LSExcessive current through low-side transistor,


Short circuit A1N - VBatt Switch off 24 RSHExcessive positive voltage on VSHS detected,

parameter 6.2 > ;1.25 A ;* RSH (1Ω)

Short circuit A1P - GND Switch off 22 HSExcessive current through high-side transistor,


Short circuit A1N - GND Switch off 30 RSH / Temp Missing return line or temperature shut-down

Note: For multiple detection of a steady channel fault (e.g., in a running loop), the channel must be changed before the fault register can be reset by sending the Reset Fault Status command.

Table 2. Fault Scenarios


THeatslug t( ) = Tamb +nduty ×Rthca × PBoost +PDriver( )× 1− e−

tτca

⎛

⎝⎜

⎞

⎠⎟

Determination of the Thermal Model

Driver stage activation and the boost transistor (when integrated) are the main sources of thermal load in LF driver devices. PEPS operation typically lasts a few milliseconds only, so it is unlikely that the thermal overload will cause damage. At the same time, the ATA5279C IC includes a temperature sensor monitoring function that protects the device from being damaged in the event of an unusual operation scenario. To avoid thermal shutdown and to extend the lifetime of the device, the designer should consider and use the worst-case trigger scenario (protocol length and repetition rate) as a basis to estimate the margin to the thermal shutdown and vice versa.

Thermal Model Determination of the Device

Mounted on the PCB

The calculation of the LF devices’ thermal behavior implies the definition of a simplified thermal model. The ATA5279C IC’s power dissipation sources are located in different chip areas. Each source is connected to an individual thermal resistance Rthjc (thermal resistance junction case) having the same value. The thermal capacity Cthjc can be ignored because the time constant (around 4ms) has only minor impact compared to that of the device package. The combined power dissipation Pboost + Pdriver flows through Rthca (thermal resistance case-to-ambient) and is then absorbed by the PCB. Thus, the final heat slug temperature is determined by the total power dissipation multiplied by the thermal resistance Rthca and the duty cycle plus the ambient temperature (see the formula below).

To estimate the margin to the thermal shutdown, it is important to calculate the junction temperature as shown below:

TJunction (t) = THeatslug + (PBoost + PDriver) x Rthjc

However, the calculation of the temperature increase does not help in obtaining a real temperature profile while sending the LF data pattern (0 and 1) because it assumes an average operation based on one duty cycle. By applying the analogy of thermal and electrical behavior, the temperature rise can be simulated by a standard PSPICE tool.

PEPS Speed

The communication protocol between the car and the key, the corresponding baud rate and the amount of services/

functions determine the overall PEPS timing, i.e., the speed. For example, a protocol that drives several LF antennas simultaneously ensures a faster PEPS system. However, several issues may arise depending on the complexity of the localization algorithm:

• Field cancellation that renders the key fob detection impossible

• The resulting field does not reflect the absolute key fob position

• A high-current drive generates excessive heat and instability in the driver stage

• A cost-effective and highly integrated LF driver solution is not viable compared to a discrete solution

For advanced localization, these issues are difficult to overcome so that driving only one coil at a time may be a good compromise.

Future LF Antenna Driver Trends

Driven by the need to achieve cost savings—in particular for passive start systems—car makers are expecting the LF driver to also perform the immobilizer backup function. This requires the immobilizer and the LF driver function to be merged. Therefore, multiplexing one of the antennas and thus reducing one coil (a major cost contributor) is possible. This allows the immobilizer base station coil in the steering lock cylinder to be removed. The resulting car architecture change will lead to significant cost savings that will further increase PEPS adoption. Strategy Analytics is anticipating annual demand for PEPS systems of almost 19 million units by 2016 while also forecasting passive start systems to accelerate faster and reach 26 million units by 2016.

Car manufacturers also want to have LF drivers charging while driving wireless mobile devices.

This entails several technical innovations:

• Merging the immobilizer base station into the LF driver allows multiplexing one of the antennas.

• Multiplexing one of the LF antennas requires operation at a low coupling factor within a range of 1% to 2% and a highly sensitive LF base station receiver since the LF antenna is located up to several meters away from its base station.

• Enhanced and complex state machines that offer flexible immobilizer protocols and self-polling schemes, autonomous operation to lower the host controller resources for reduced power consumption. Programmability of an embedded microcontroller provides higher flexibility but it is more expensive, slower and consumes more power than a state machine.


EngineControlModule

CentralBoard

Controller

ImmobilizerBase Station

UHFReceiver

PEPSAntennaDriver

PowerManagement

Emergency/Immobilizer

3D LFModule

LF BidirectionalLink

125kHz)

LF Up Link125kHz)

UHF Down Link315/ 433/ 868/ 915MHz

Cbuf

Vbat

X-Axis

Y-Axis

Z-Axis

UHFTransmitter

MCU

AFE

Vehicle Passive Key Fob

Figure 6. Advanced PEPS System Architecture

• Thanks to their low cost, passive entry passive start and/or passive start systems combined with RKE (keyless entry systems) are expected to grow faster than the PEPS market.

• Leading silicon vendors aim to reduce the number of drivers to three or four and to limit overheating in their devices. External drivers or multiplexing techniques could be proposed to address PEPS applications requiring six to nine antennas.

• On-going sensitivity improvement of the key-fob controller towards 200μVpeak-peak or lower also allows the drive current to be reduced, thereby limiting overheating in LF driver devices.

• As wireless power charging operates at the same (or almost the same) LF frequency, the implementation of a dominant wireless charging protocol into the LF driver allowing the use of the same PEPS LF antennas could enable significant cost saving while adding new features and enhancing value for automotive OEMs.

• The implementation of near field communication (NFC) interfaces that enable communication with mobile phone devices and computers will add new features such as payment services.

A silicon integration example is given in Figure 6. This figure shows an LF driver IC that includes a state-of-the-art immobilizer base station block. Thanks to its high sensitivity of 100μVpeak-peak, the key fob controller enhanced with RF transmitter functionality allows for LF distances of up to 8m, thus enabling new applications/features such as approach lighting and/or automatic walk-away detection.

Conclusion

This article examined the key technical parameters of LF driver devices, and discussed how these can be defined for the Atmel ATA5279C LF driver, a widely used device for automotive car access applications. The article also explained how LF drivers will evolve to become a key PEPS device in response to the ever-present need for integration and cost reduction while enabling new applications such as wireless power charging for mobile devices or connectivity through NFC with NFC-enabled devices, etc. Forthcoming developments will encompass both LF drivers together with the key fob functionality at an optimized level of integration.


Automotive IC-Level EMC Testing—Trends and Forthcoming StandardsStephan Gerlach, Juergen Strohal

Standardization activities focused on electromagnetic compatibility (EMC) at the IC level have been evolving to keep pace with potential current and future interference scenarios . This article describes forthcoming new test standards such as local injection horn antenna for covering such higher operation frequencies as WLAN and Bluetooth . In addition, this paper identifies new trends in electromagnetic surface scanning .

Each day, EMC labs that deal with compliance measurements for certification and validation carry out a variety of well-known methods and techniques to investigate unintended emissions by complete vehicles or modules in violation of specifications .


DUT

50Ω Termination Directional Coupler

(Cable Harness)

Periphery(Styrofoam)

Artificial Networks

Figure 1. Basic Set-Up for Stripline EMC Testing According to ISO11452-5

Within these devices under test—mostly modules with a certain functionality as well as input and output lines—there is a long-term trend emerging: the concentration of functionality within an ever smaller number of “active” devices. This trend is primarily driven by two important factors. First, there is the increasing level of integration seen in IC functionality on a single chip and, second, the ability of integrated processes to implement functionality previously reserved for external blocks. This feature, initially welcome, increases the level of disturbance that can be produced by a tiny amount of silicon housed in a small plastic package.

This being said, the techniques for investigating signal source interference must logically concentrate on the device with the highest potential for interference. As most of the established test standards are limited to frequencies up to 1GHz, or in the best case 2GHz, there has been a greater and greater need to cover frequencies up to 3GHz or even higher with reliable and reproducible test methods. Various standardization committees have devoted time to developing such standards; two of them, the “IC Stripline” and “Local Injection Horn Antenna”, are briefly introduced in this paper. Another helpful instrument for locating sources of distortion, even at the sub-IC level, are the proven techniques and methods for PCB scanning, which have been adopted by the industry and greatly improved. The reason for carrying out EMC evaluation at the IC level is quite comprehensive: A complete system (mainly a module) has to meet the filed requirements so that it is very time-consuming for application engineers to find out in detail the root cause for a specification violation—whether it originated in the board, the peripheral connectors, the passive

components, the arrangement of the components, GND layer management, or in the IC itself. In general it is both important and very useful to know the maximum disturbance level coming from the IC itself if it is operated in an environment optimized with regard to EMC considerations.

IC Stripline

The stripline method is a well-known standard for use in a component (module) level test according to ISO11452, with the wiring harness placed inside a widened stripline. Recently, this method has been less frequently used for homologation (usually the ALSE method is preferred); however, it is still a fairly easy-to-use instrument for evaluative measurements. The basic setup can be seen in Figure 1.

The new, forthcoming IC stripline standards take this approach down to the IC level. Both aspects of radiated EMC tests are covered; IEC61967-8 contains the emission measurements while IEC62132-8 standardizes immunity measurements. In contrast to the ISO11452 stripline measurement, the IC stripline does not contain a wiring harness but instead covers the IC under test. For this purpose the IC stripline is dimensioned according to the width and height requirements. These two parameters must be chosen interdependently in order to maintain stable conditions over the complete operation frequency range from 150kHz up to 3GHz with VSWR<1.25. The default height (spacing between active conductor and ground plane) is 6.7mm with a default width of 33mm. The DUT’s dimension should not exceed half the height of the stripline, and its width should not exceed 110% of the stripline’s width. The standards documentation provides information on correct dimensioning of the IC stripline. Figures 2 and 3 show the respective test setups for emission and immunity measurements.


Figure 4. Internal Assembly of EMC Chamber with Local Horn Antenna Injection

AntennaFeed

ICunderTest

E Field

Ground Plane

Shielded Chamber

Horn Antenna

H Field

Figure 2. Setup for Emission Measurements with IC Stripline According to IEC 61967-8

Spectrum Analyzer/EMI Receiver

Power Supply

IC Stripline DUT

Preamplifier(if Necessary)

EMC TestBoard

Port 2(RF Connector)

Port 1(RF Connector) 50Ω

Termination

DUT Stimulationand Monitor

Figure 3. Setup for Immunity Measurements with IC Stripline According to IEC 62132-8

Power SupplyRF Generator

Pforward

Preverse

RF Amplifier

Power Meter

IC Stripline DUT

EMC TestBoard

DirectionalCoupler

Port 2(RF Connector)

Port 1(RF Connector) 50Ω

Termination

DUT Stimulationand Monitor

Figure 5. Courtesy of: Detectus AB, Malung, Sweden

Local Injection Horn Antenna

Another approach to extend test standards on the IC level toward higher frequencies is the local injection horn antenna. Typically, the ICs under test are only equipped with minimum external circuitry (blocking capacitors) mounted on a small PCB. The disturber is applied to the IC surface by means of a specially designed horn antenna that creates a strong, concentrated E and H field with a high degree of homogeneity. That means the field strength deviation is less than 3dB throughout the surface of the IC.

Regarding radiated immunity, a standard is under development that uses a horn antenna in the 1GHz to 18GHz frequency range. The IC is exposed to the antenna’s electrical field, which is arranged at right angles to the DUT. The magnetic field deflects circularly around the IC.

The test bench and proceedings are regulated in IEC 62132-6.

IC-based Scanning

Scanning systems mostly consist of a near field probe, spectrum analyzer, xyz-moving table, and a computer with software for mechanical steering as well as analysis and interpretation.

Precise calibration and test system repeatability are important criteria, in particular in the micrometer range, and should not be underestimated. The results of such measurements can be visualized as two or three-dimensional colored plots.


Figure 7. H-Field Probe for IC-Level

Measurements; Vertical Coil with an Inside

Diameter of 150μm

Figure 8. H-Field Probe for IC-Level

Measurements; Horizontal Coil with an

Inside Diameter of 150μm

Figure 6. E-Field Probe for IC-Level

Measurements

Field Probes

Several electric and magnetic field probes for IC-based measurement are already available on the market. Magnetic field probes are equipped with vertical and horizontal coils. The mechanical resolution is 65μm for the E-field probe and 80μm to 100μm for the H-field probes; they can be used within a frequency range of 30MHz to 3GHz. H-field probes with a low-frequency range from 9kHz to 50MHz are available for specific applications.

The reason IC-based scanning is used is because of the basic rule that the EMC disturbing levels of the complete module should never fall below the reference values of the applied IC (optimum blocking provided).

This being said, it is essential that ICs are measured and compared before making a decision which could have a significant and long-lasting impact on technical performance. A wide variety of IC-level test methods has been available for unwanted electromagnetic emissions and electromagnetic distortion susceptibility for over ten years. These standards are well established and widely used in the automotive industry to indicate how critical the application of a particular IC might be in terms of EMC, and how much external effort is required to achieve EMC compliance. Choosing the appropriate ICs with superior EMC performance at the very beginning of a project helps to avoid subsequent and expensive corrective measures.

© 2012 Atmel Corporation . All rights reserved . / Rev .: 9024A-AUTO-E-A4-10/12

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