III B. TECH II SEMESTER QUESTION BANK (2021 - MRCET

35
MALLA REDDY COLLEGE OF ENGINEERING &TECHNOLOGY (Autonomous Institution – UGC, Govt. of India) (Affiliated to JNTU, Hyderabad, Approved by AICTE - Accredited by NBA & NAAC – ‘A’ Grade, ISO 9001:2008 Certified) Maisammaguda, Dhulapally, Secunderabad – 500100. DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING III B. TECH II SEMESTER QUESTION BANK (2021 – 22)

Transcript of III B. TECH II SEMESTER QUESTION BANK (2021 - MRCET

MALLA REDDY COLLEGE OF ENGINEERING &TECHNOLOGY

(Autonomous Institution – UGC, Govt. of India) (Affiliated to JNTU, Hyderabad, Approved by AICTE - Accredited by NBA & NAAC – ‘A’ Grade, ISO 9001:2008 Certified)

Maisammaguda, Dhulapally, Secunderabad – 500100.

DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING

III B. TECH II SEMESTER

QUESTION BANK (2021 – 22)

Code No: R18A0513

MALLA REDDY COLLEGE OF ENGINEERING &TECHNOLOGY

(Autonomous Institution – UGC, Govt. of India)

MODEL PAPER -1

B. Tech III Year II Semester Examinations

Computer Networks (Electronics Communication and Engineering)

Time: 3hours Max Marks: 70

Answer any one full question from each unit. Each question carries 14 marks and may

have a, b, c as sub questions.

1. Explain ISO OSI Reference model with neat sketch. (14M)

(OR)

2. Explain different kinds of Transmission Media. (14M)

3. Explain CSMA and CSMA/CD in detail. (14M)

(OR)

4. a) What do you mean by bit stuffing and why it is employed. (7M)

b) Explain error detection using Checksum. (7M)

5. a) Compare and contrast TDM, STDM and FDM. (14M)

b) What are the common Fast Ethernet implementations? Give the purpose of NIC (7M)

(OR)

6. a) Explain indetail about different Bluetooth layers. (7M)

b) What are the advantages of dividing an Ethernet LAN with a bridge? Give the

relationship between a switch and a bridge (7M)

7. a) With the aid of necessary explain in detail about significance of tunneling. (7M)

b) Explain DHCP. (7M)

(OR)

8. a) Write short notes on Link state routing. (7M)

b) Explain the process of physical address to logical address mapping using Boot

Strap Protocol. (7M)

9. a) Explain UDP header format. (7M)

b) Write short notes on congestion control. (7M)

(OR)

10. Explain the following

a) FTP (7M)

b) DNS (7M)

Code No: R18A0513

MALLA REDDY COLLEGE OF ENGINEERING &TECHNOLOGY

(Autonomous Institution – UGC, Govt. of India)

MODEL PAPER -2

B. Tech III Year II Semester Examinations

Computer Networks (Electronics Communication and Engineering)

Time: 3hours Max Marks: 70

Note: Answer any one full question from each unit. Each question carries 14 marks and may have a, b, c as sub questions.

1. Explain TCP/IP Protocol Suit with neat sketch and list out differences between TCP/IP and OSI model

(14M)

(OR)

2. Write short notes on internet. (14M)

3. a) Explain about services provided by PPP and also list out the services that are not provided by PPP.

(7M)

b) Explain Pure and derive expression for its throughput. (7M)

(OR)

4. a) Explain about different strategies that are employed under controlled access. (6M)

b) Explain in detail about working of TDMA and also list out differences between TDMA,

FDMA and CDMA. (8M)

5. a) Write short notes on giga bit ethernet. (8M)

b) Explain in detail about hidden and exposed node problems in wireless LANs (6M)

(OR)

6. What do you mean by virtual lan and explain in detail about configuring and maintaing data of virtual

lans. (7M)

With the aid of suitable example explain about frequency reuse principle. (7M)

7. a) Explain in detail about IGMP. (7M)

b) Is multicast routing is same as multiple unicast routing, Explain. And also write short

notes on MOSPF (7M)

(OR)

8. a) Explain Transport layer Connection Establishment and Connection Release. (7M)

b) Explain Transport protocol addressing. (7M)

9. a) Explain TCP header format. (7M)

b) Explain TCP Congestion Control. (7M)

(OR)

10. Explain the following

a) SMTP (7M)

b) HTTP (7M)

Code No: R18A0513

MALLA REDDY COLLEGE OF ENGINEERING &TECHNOLOGY

(Autonomous Institution – UGC, Govt. of India)

MODEL PAPER -3

B. Tech III Year II Semester Examinations

Computer Networks (Electronics Communication and Engineering)

Time: 3hours Max Marks: 70

Note: Answer any one full question from each unit. Each question

carries 14 marks and may have a, b, c as sub questions.

1. a) Explain in detail about layering scenario. (6M)

b) Write short notes on different levels of addressing mechanism employed in internet (8M)

(OR)

2. Explain different kinds transmission media used for internet. (14M)

3. a) Explain error detection using CRC for the following. Consider a message 110010

represented by the polynomial M(x) = x5 + x4 + x and a generating polynomial

G(x) = x3 + x2 + 1 (1101) (7M)

b) Explain in detail about different fields present in PPP frame format. (7M)

(OR)

4. a) Draw and explain HDLC frame format and also explain about different types of frames

used in HDLC. (8M)

b) Explain how slotted aloha improves the performance of pure aloha (7M)

5. a) Discuss briefly about the MAC layers in the 802.11 standard. (7M)

b) Explain in detail about the Physical layer in the Fast Ethernet. (7M)

(OR)

6. a) Describe in detail about the Frequency Division Multiple Access. (14M) b) What is learning bridge and explain in detail about the process of learning of

learning bridge (7M)

7. a) Write short notes on IPV6 addresses. (7M)

b) Explain indetail about message format and different types of error reporting messages

of ICMP. (7M)

(OR)

8. With a suitable example explain Distance Vector Routing algorithm. What is the serious

drawback of Distance Vector Routing algorithm? Explain. (14M)

9. a) Explain TCP header format. (7M)

b) What is WEB Documents? Explain with its categories. (7M)

(OR)

10. a)Write short notes on SMTP (7M)

b) Write short notes of different techniques that are employed to improve QoS (7M)

Code No: R18A0513

MALLA REDDY COLLEGE OF ENGINEERING &TECHNOLOGY

(Autonomous Institution – UGC, Govt. of India)

MODEL PAPER -4

B. Tech III Year II Semester Examinations

Computer Networks (Electronics Communication and Engineering)

Time: 3hours Max Marks: 70

Note: Part B consists of questions from five units. Answer any one full question from each unit. Each question

carries 14 marks and may have a, b, c as sub questions.

1. a) Explain in detail about layering scenario. (6M)

b) Write short notes on different levels of addressing mechanism employed in internet (8M)

(OR)

2. Explain different kinds transmission media used for internet. (14M)

3. a)Given 1101011011 data frame and generator polynomial G(x) = x4 + x + 1. Derive the

transmitted frame (7M)

b) Explain in detail about CSMA/CA. (7M)

(OR)

4. a) Explain in detail about CSMS/CD (8M)

b) Give a brief note on the Multilink Point to point protocol (7M)

5. a) Why there is no need for CSMA/CD on a full-duplex Ethernet LAN? Explain. (14M)

b) Write short on back bone networks. (7M)

(OR)

6. a) Describe in detail about the CDMA. (7M)

b) Write short notes on IEEE 802.11 (7M)

7. a) Explain briefly about the shortest path routing algorithm. (6M)

b) Explain indetail about classfull addressing and classless addressing. (8M)

(OR)

8. a) What is Count to infinity problem? Explain with suitable example. (7M)

b) Write short notes on internetworking (7M)

9. a) Draw frame format of SCTP and discuss indetail about each field. Also list out differences

between SCTP and TCP. (7M)

b) Write short notes of different techniques that are employed to improve QoS (7M)

(OR) 10. a) List out the different fields that are missing in TCP header as compared to that of UDP and

give the reasons for their missing. (7M)

b) What is WEB Documents? Explain with its categories. (7M)

Code No: R18A0513

MALLA REDDY COLLEGE OF ENGINEERING & TECHNOLOGY (Autonomous Institution – UGC, Govt. of India)

III B.Tech II Semester Supplementary Examinations, February 2022

Computer Networks

(ECE)

Roll No

Time: 3 hours Max. Marks: 70

Note: This question paper Consists of 5 Sections. Answer FIVE Questions, Choosing ONE

Question from each SECTION and each Question carries 14 marks.

***

SECTION-I

1 Explain TCP/IP Protocol Suit with neat sketch and list out differences between

TCP/IP and OSI model [14M]

OR

2 a) Write any four reasons for using layered protocols

b) Compare and contrast a circuit-switched network and a packet-switched

network

[8M]

[6M]

SECTION-II

3 a) Explain about different strategies that are employed under controlled access.

b) Explain in detail about working of TDMA and also list out differences between

TDMA, FDMA and CDMA.

[6M]

[8M]

OR

4

a) Explain error detection using CRC for the following. Consider a message

110010 represented by the polynomial M(x) = x5 + x4 + x and a generating

polynomial G(x) = x3 + x2 + 1 (1101)

b) Explain in detail about different fields present in PPP frame format.

[7M]

[7M]

SECTION-III

5 a) What are the advantages of dividing an Ethernet LAN with a bridge? Give the

relationship between a switch and a bridge

b) Distinguish Frame Relay and ATM

[7M]

[7M]

OR

6 a) Discuss briefly about the MAC layers in the 802.11 standard

b) Explain in detail about the Physical layer in the Fast Ethernet.

[7M]

[7M]

SECTION-IV

7 a) Explain in detail about classfull addressing and classless addressing.

b)Is multicast routing is same as multiple unicast routing, Explain. And also write

short notes on MOSPF

[6M]

[8M]

OR

8 a) With the aid of necessary explain in detail about significance of tunneling.

b) Distinguish between ICMP and IGMP [6M]

[8M]

SECTION-V

9 a) Explain TCP header format.

b) Differentiate between SCTP and UDP

[8M]

[6M]

OR

10 a) Describe the Mechanism of FTP

b) How the World Wide Web Works?

[8M]

[6M]

**********

R18

Page 1 of 10

Code No: R18A0414MALLA REDDY COLLEGE OF ENGINEERING & TECHNOLOGY

(Autonomous Institution – UGC, Govt. of India) III B.Tech II Semester Digital Signal Processing

(ECE) MODEL QUESTION PAPER-1

Roll No

Time: 3 hours Max. Marks: 70Note: This question paper Consists of 5 Sections. Answer FIVE Questions, Choosing ONE Question from each SECTION and each Question carries 14 marks.

***SECTION-I

1 a) Test causality and stability of the system y(n)=x(2n). b) Determine the impulse response of LTI system described by y(n) = x(n) + 0.9

y(n-1) - 0.81y(n-2)

[7M]

[7M]OR

2 Realize the Direct form-I and Direct form-II structure of the system given byby y(n) = -13/12 y(n-1) – 9/24 y( (n-2) – 1/24 y( (n-3)+ x(n)+4 x(n-1) +3 x(n-2)

[14M]

SECTION-II3 a. Find the output sequence y(n)= of a filter whose impulse response is

h(n)=[1,1,1]; and input signal x[n]=[3,-1,0,1,3,2,0,1,3,1 ] using over lap save method b. State and Prove Linearity Property of DFT

[7M]

[7M]OR

4 Compute the DFT of the following sequence using Radix -2, DIT-FFT , DIF-FFT algorithm x[n] = 1, 1, 1, 1, 0, 0, 0, 0.

[14M]

SECTION-III5 a. How Chebyshev filter approximation is superior to Butterworth filter

approximation.b. a) In a speech recording system with a sampling frequency of 10,000 Hz, the speech is corrupted by random noise. To remove the random noise while preserving speech information, the following specifications are given.Speech frequency range: 0 - 3000 KHz. Stop band range: 4,000 - 5,000 KHz.Pass band ripple : 3 dB Stop band attenuation: 25 dB.Determine the filter order and transfer function using Butterworth IIR filter.

[7M]

[7M]

OR6 a. For the analog transfer function H(s)=

2

(s + 1)(s + 2) determine H(Z) using

Bilinear Transformation method if the sampling frequency is 1Hz.b. Explain Bilinear transformation method in design of IIR filter

[7M]

[7M]

SECTION-IV7 a. The desired frequency response of a low pass filter is [7M]

R18

Page 2 of 10

Determine H for M=5 using a Rectangular windowb. Compare FIR filters and IIR filters [7M]

OR8 (a) Explain different windows techniques in FIR digital filters.

(b) windows Compare different in terms of main lobe width and peak side lobe level

[8M][6M]

SECTION-V9 a Discuss the process of Decimation by a factor D with a neat block diagram.

b. Given x(n)=1,3,2,5,4,-1,-2,6 ,-3,7,8,9….. x(n) is applied to I Up sampler and D Down sampler .Show that cascade of Up sampler and Down sampler are interchangeable when I-3 and D-2.

[7M]

[7M]

OR10 a. What are Multirate Systems? Discuss their importance in real time processing of

signals. b..Given x(n)=1,2,3,4,5,6,7,-1,-2,-3,-4. And x (n) is applied to Decimator with D-2 . What is the output of Decimator ?

[7M]

[7M]

**********

Page 3 of 10

Code No: R18A0414MALLA REDDY COLLEGE OF ENGINEERING & TECHNOLOGY

(Autonomous Institution – UGC, Govt. of India) III B.Tech II Semester Examinations

Digital Signal Processing (ECE)

MODEL QUESTION PAPER-2Roll No

Time: 3 hours Max. Marks: 70Note: This question paper Consists of 5 Sections. Answer FIVE Questions, Choosing ONE Question from each SECTION and each Question carries 14 marks.

***SECTION-I

1 a) What is meant by impulse response of a discrete system? Find the impulse response of the system described by difference equation y(n) – 3y(n-1) – 4y(n-2) = x(n) + 2x(n-1) using z transform. b) What are the various basic building blocks used in realization of digital systems. Obtain the direct form-II realization for the given system. y(n) = -0.1 y(n-1) + 0.72 y(n-2) + 0.7 x(n) – 0.252 x(n-2).

[7M]

[7M]

OR2 a)Obtain the direct form-I realization structures for the system function given by

b)Explain basic block diagram of Digital Signal Processing

[7M]

[7M]SECTION-II

3 a)Find the y(n) for the sequences x(n)=1,-1,1,2,1,0,1,-4,3,2,1,0,1,1 and h(n)=1,1,2,1 using overlap-save method. b)State and prove circular convolution property of DFT. (OR) Analyze about periodic convolution.

[8M]

[6M]

OR4 a)Develop a radix-4 DIT FFT algorithm for evaluating the DFT for N = 16.

b) Using FFT and IFFT, determine the output of system if input x(n)=2,2,4 and impulse response h(n) = 1,1.

[7M][7M]

SECTION-III5 a) Write the differences between IIR and FIR.

b) Design an analog Butterworth filter that as a -2dB pass band attenuation at a frequency of 20rad/sec and at least -10dB stop band attenuation at 30rad/sec

[6M][8M]

OR6 Design a chebyshev filter for the following specifications using bilinear

transformation. [14M]

SECTION-IV7 Design a low pass digital FIR filter using Kaiser Window satisfying the

specifications given below. Pass band cut-off frequency = 100 Hz, Stop band cut-[14M]

R18

Page 4 of 10

off frequency = 200 Hz, Pass band ripple = 0.1dB, Stop band attenuation = 20 dB and Sampling frequency = 1000 Hz.

OR8 a) Design a band pass filter which approximates the ideal filter with cutoff-

frequencies at 0.2rad/sec and 0.3rad/sec. The filter order is M=7. Use the Hanning window function. b) Design an ideal band pass filter with a frequency response.

[7M]

[7M]

SECTION-V9 a) Discuss in detail the down sampling with a neat diagram.

b) Explain the necessity of multirate signal processing and hence define decimation and interpolation

[7M][7M]

OR10 a) Explain the application of sampling rate conversion in subband coding.

b) Consider a signal x(n) = u(n) i. Obtain a signal with a decimation factor ‘3’ ii. Obtain a signal with a interpolation factor ‘3’

[7M][7M]

****

Page 5 of 10

Code No: R18A0414MALLA REDDY COLLEGE OF ENGINEERING & TECHNOLOGY

(Autonomous Institution – UGC, Govt. of India) III B.Tech II Semester Digital Signal Processing

(ECE) MODEL QUESTION PAPER-3

Roll No

Time: 3 hours Max. Marks: 70Note: This question paper Consists of 5 Sections. Answer FIVE Questions, Choosing ONE Question from each SECTION and each Question carries 14 marks.

***SECTION-I

1 A. Determine, if the system describes the following input-output equation is linear or nonlinear B. If impulse response h(n) = 2n u [-n]. Test the system for causality and

stability.OR

[7M]

[7M]2 A. Realize following digital filter by using direct form – II realization.

)1()()2(25.0)1(5.0)( nxnxnynyny

B. Determine the impulse response of LTI system described by y[n] = x[n]+0.9 y[n-1] -0.81 y[n-2].

SECTION-II

[7M]

[7M]

3 A. Find the DFT of the x[n]=[1, -1, 2, 2]

B. State and Prove any two Properties of DFTOR

[7M]

[7M]

4 A. Compute 8 point DFT of the sequence x[n]=[1, 1, 1, 1, 0, 0, 0, 0].using DIT FFT algorithm

B. Compute 8 point DFT of the sequence x[n]=[1, 2, 3, 4, 1, 1, 1, 1].using DIF FFT algorithm

SECTION-III

[7M]

[7M]]

5 A. Obtain an Chebyshev filter transfer function that satisfies the

constraints

0.707 ≤H(w) ≤ 1 0 ≤ w ≤ 0.2π

H(w) ≤ 0.1 0.5π ≤ w ≤ π

B. Distinguish Butterworth and Chebyshev filterOR

[10M]

[4M]

]1[1][][

nx

nxny

R18

Page 6 of 10

6 A. Obtain an analog Butterworth filter transfer function that satisfies the

constraints using Bilinear transformation with T = 1sec

B. Distinguish IIR and FIR filters

SECTION-IV

[10M]

[4M]

7 A. The desired frequency response of a low pass filter is

Determine H for M=7 using a Hamming window .B. Explain differences between analog and digital filters.

OR

[10M]

[4M]

8 For the desired frequency response given by

Find H(ω) for N=9 using rectangular window for truncating hd(n).

[14M]

SECTION-V9 A. Explain the process of Decimation with a neat diagram

B. Explain applications of multi rate digital signal processing?

[7M]

[7M]

OR10 a)Describe the interpolation process with factor D

b)The signal x(n) is given by

i) Obtain the decimated signal with a factor of 3

ii) Obtain the interpolated signal with a factor of 3

[6M]

[8M]

**********

432.0)(

201)(9.0

j

j

eH

eH

Page 7 of 10

Code No: R18A0414MALLA REDDY COLLEGE OF ENGINEERING & TECHNOLOGY

(Autonomous Institution – UGC, Govt. of India) III B.Tech II Semester Digital Signal Processing

(ECE) MODEL QUESTION PAPER-4

Roll No

Time: 3 hours Max. Marks: 70Note: This question paper Consists of 5 Sections. Answer FIVE Questions, Choosing ONE Question from each SECTION and each Question carries 14 marks.

***SECTION-I

1 Check for the stability and Causality of the following systems.

( i ) y(n) = x(-n-3) ( ii ) y(n) = nx(n) iii)y(n) =cos[x(n)]

[14M]

OR

2 Obtain the Direct form I and Form II realization of the system described the

difference equation y[n]-13/12 y[n-1]+9/24 y[n-2]-1/24 y[n-3]=x[n]+2 x[n-1]

[14M]

SECTION-II

3 a)Compare over lap add method and overlap save method

b) State and prove any two properties of DFT

[14M]

OR

4 Determine the 8 point DFT of the sequence x(n)=1,1,1,1,0,0,0,0using

i)DIT-FFT algorithm ii)DIF-FFT algorithm

[14M]

SECTION-III

5 Explain the steps in designing an analog low pass chebyshev filter. [14M]

OR6 Design a chebyshev low pass filter with the specifications αp=1dB ripple in the

pass band 0 ≤ w ≤ 0.2π , αs = 15 dB ripple in the stop band 0.3π ≤ w ≤ π. Using

Bilinear Transformation technique.

[14M]

SECTION-IV7 a)List out the advantages and disadvantages of FIR filters.

b)Design an Ideal Low pass filter with a frequency response

Hd(ejw) = 1 for –π/2≤w≤ π/2

= 0 for π/2≤|w|≤ π Using Rectangular window for N=7.

[14M]

R18

Page 8 of 10

OR8 Explain about i) Rectangular window ii) Hanning window iii) Triangular window.

iv)Kaiser window

[14M]

SECTION-V9 a)Discuss about the Down sampling and derive the expression of spectrum of

Down sampler

b)Consider the discrete time signal x[n]=1,2,3,4,5,6,7,8,9,10,11,12.Determine

the Down sampled signals for the sampling rate reduction factor D=2.

[7M]

[7M]

OR10 Explain the applications of Multi rate signal Processing [14M]

**********

Page 9 of 10

Code No: R18A0414MALLA REDDY COLLEGE OF ENGINEERING & TECHNOLOGY

(Autonomous Institution – UGC, Govt. of India) III B.Tech II Semester Digital Signal Processing

(ECE) MODEL QUESTION PAPER-1

Roll No

Time: 3 hours Max. Marks: 70Note: This question paper Consists of 5 Sections. Answer FIVE Questions, Choosing ONE Question from each SECTION and each Question carries 14 marks.

***SECTION-I

1 For the following discrete time systems, determine whether or not the system is linear, shift invariant, casual and stable (i) y(n)= x(n+7) (ii) y(n)= x3(n)

[14M]

OR2 Realize the Direct form-I and Direct form-II structure of the system given by

y[n] + 2 y[n-1] + y[n-2] = x[n] + 0.75 x[n-1][14M]

SECTION-II3 a)Define DFT. State and Prove any two properties of DFT

b)Find the DFT of a sequence x(n)=1,1,1,0 for N=4[7M][7M]

OR4 Find the 8 point DFT of a sequence x[n] = 1, 2, 3, 4, 4, 3, 2, 1 using:

a) DIT-FFT algorithm b) DIF-FFT algorithm[7M][7M]

SECTION-III5 a) Compare analog filters and Digital filters.

b) Compare Butterworth and Chebyshev filters.[7M][7M]

OR6 For the given specifications design an analog Butterworth filter.

0.9≤| H(jΩ) | ≤ 1 for 0≤ Ω ≤ 0.2π. | H(jΩ) | ≤ 0.2 for 0.4π ≤ Ω ≤ π [14M]

SECTION-IV

7 Design a Low pass filter with a frequency response Hd(ejw) = 1 for –π/2≤w≤ π/2 = 0 for π/2≤|w|≤ πUsing Hanning window for N=11. Find H(z) , plot magnitude response

[14M]

OR8 Differentiate between IIR and FIR filters. Discuss the various steps in designing

FIR filter[14M]

SECTION-V9 a) Define Down Sampling and list out the advantages of multi rate systems.

b) Consider the discrete time signal x[n]=1,2,3,4.Determine the Up sampled signals for the sampling rate multiplication factor I= 2.

[7M]

[7M]

R18

Page 10 of 10

OR10 a. Explain the interpolation process. How it is different from Decimation?

b. How do you change the sampling rate by arbitrary factor? [7M][7M]

**********

Page 1 of 1

Code No: R18A0415

MALLA REDDY COLLEGE OF ENGINEERING & TECHNOLOGY (Autonomous Institution – UGC, Govt. of India)

III B.Tech II Semester Supplementary Examinations, February 2022

Microprocessors and Microcontrollers

(EEE & ECE)

Roll No

Time: 3 hours Max. Marks: 70

Note: This question paper Consists of 5 Sections. Answer FIVE Questions, Choosing ONE

Question from each SECTION and each Question carries 14 marks.

***

SECTION-I

1 Sketch the Architecture of 8086 and summarize the role of EU unit. [14M]

OR

2 With a neat sketch describe the Minimum and Maximum mode of operation of

8086 with neat timing (read and write cycle) diagrams

[14M]

SECTION-II

3 List and explain the addressing modes of 8086 with examples? [14M]

OR

4

a) Write an assembly language program to convert unpacked BCD to ASCII. b) Write an assembly language program to find sum of squares.

[7M]

[7M]

SECTION-III

5 a) Discuss how 8251 is used for serial communication of data.

b) Write short notes on 5 types of interrupts supported by 8086.

[8M]

[6M]

OR

6 a) Construct an Interface of two 16k×8 EPROMS & and two 32k×8 RAM

chips with 8086. Select suitable memory map.

b) Explain the purpose of interfacing 8257 with 8086

[10M]

[4M]

SECTION-IV

7 a) Discuss the internal memory organization of the 8051 microcontroller. b) Write an Assembly Language Program using 8051,

i) Addition of two 8 bit Numbers ii). Multiplication of two 8 bit Numbers

[6M]

[8M]

OR

8 a) Define ports and explain for ports in 8051 Microcontroller.

b) Sketch and illustrate how to access external memory devices in an 8051

based system.

[8M]

[6M]

SECTION-V

9 a) Explain the register IE format of 8051

b) Describe the Interrupt, vector table and exception handler in ARM. .

[7M]

[7M]

OR

10 a) Explain about TCON & PCON operation with an example.

b) Mention about the program status register instructions in ARM processor.

[8M]

[6M]

**********

R18

Page 1 of 2

Code No: R18A0415

MALLA REDDY COLLEGE OF ENGINEERING & TECHNOLOGY (Autonomous Institution – UGC, Govt. of India)

III B.Tech II Semester Model Paper-1

Microprocessors and Microcontrollers

(ECE)

Roll No

Time: 3 hours Max. Marks: 70

Note: This question paper Consists of 5 Sections. Answer FIVE Questions, Choosing ONE

Question from each SECTION and each Question carries 14 marks.

***

SECTION-I

1 (a) Discuss register organization of 8086 microprocessor? What are the special

functions of general purpose registers?

(b) Explain the following pins of 8086? (i) HOLD (ii) TEST (iii) NMI

[8M]

[6M]

OR

2 (a) Explain physical memory organization for 8086 microprocessor.

(b) Describe the timing diagrams of minimum mode write operation and explain in

detail.

[8M]

[6M]

SECTION-II

3 (a) Explain any 2 groups of instructions in 8086.

(b) Calculate physical address of the memory location being referred in the given

instructions for the following values in the 8086 registers

CS=1120h,DS=1150h,ES=1250h,SS=1350h,AX=1000h,BX=2000h,

CX=3000,DX=4000h, SI=1111h,DI=2222h,SP=1010h,BP=1100h (i) MOV AX, [BX]

(ii) MOV AX, [BP][SI]

(iii) MOV AX, [BX][DI]10H

(iv) MOV AX, [BP][DI]-10H

[6M]

[8M]

OR

4

(a) Develop an assembly language program to find the sum of squares of first ten

numbers.

(b) Develop an assembly language program to find number of even and odd

numbers in an 8- bit array.

[7M]

[7M]

SECTION-III

5 With a neat block diagram explain the operation of 8251 USART. [14M]

OR

6 Explain the internal architecture of 8259 PIC and explain its blocks. [14M]

SECTION-IV

7 (a) Discuss internal memory organization of 8051 microcontroller.

(b) Interface a 2-digit 7 segment LED display to the 8051 microcontroller and

write a program to display numbers 00 to 99.

[8M]

[6M]

OR

8 (a) How many number of IO ports are available in 8051? List all the ports with [8M]

R18

Page 2 of 2

relevant sketches and what are the ports used for external memory access?

(b) Develop assembly language program using branch instructions of 8051.

[6M]

SECTION-V

9 (a) Explain how do you do the programming of 8051 by using timers and counters.

(b) Discuss interrupt structure of 8051 microcontroller and explain in detail.

[8M]

[6M]

OR

10 Write Short notes on the following

(i) Current program status register

(ii) Registers of ARM Processor

[7M]

[7M]

**********

Page 1 of 2

Code No: R18A0415

MALLA REDDY COLLEGE OF ENGINEERING & TECHNOLOGY (Autonomous Institution – UGC, Govt. of India)

III B.Tech II Semester Model Paper-2

Microprocessors and Microcontrollers

(ECE)

Roll No

Time: 3 hours Max. Marks: 70

Note: This question paper Consists of 5 Sections. Answer FIVE Questions, Choosing ONE

Question from each SECTION and each Question carries 14 marks.

***

SECTION-I

1 (a) How do you implement memory segmentation and instruction pipelining in 8086

microprocessor, Explain?

(b) Explain the following pins of 8086?

(i)READY (ii) INTR (iii) ALE

[8M]

[6M]

OR

2 (a) Discuss Flag Register Format in 8086 and explain significance of each flag.

(b) Differentiate between minimum mode and maximum mode 8086 operation with the help of suitable diagrams.

[8M]

[6M]

SECTION-II

3 (a) Implement a programming logic in assembly language to sort the given list of ten

numbers starting at memory location 1000h in ascending order.

(b) Explain the following instructions with an example to each?

(i) AAA (ii) SCASB (iii) SHR

[8M]

[6M]

OR

4

(a) Write an assembly language program to reverse the given string

“1, 2, 3, 4, 5” with string instructions.

(b) List various addressing modes supported in 8086 microprocessor

programming and give one example to each.

[6M]

[8M]

SECTION-III

5 With the help of a neat diagram discuss the operation of DMA controller 8257 and

its interfacing with 8086 microprocessor. [14M]

OR

6 Discuss the need for an interrupt controller. Enumerate the functionality of

8259PIC (priority interrupt controller) with the help of neat block diagram.

[14M]

SECTION-IV

7 (a) Enumerate the features of 8051 microcontroller with the help of neat

architecture diagram.

(b) Discuss external memory access capacity of 8051 microcontroller and list the

instructions used to access external memory.

[8M]

[6M]

OR

8 (a) Explain about the Timers of 8051 with its Modes of Operation, and the Registers [8M]

R18

Page 2 of 2

used for 8051 Timers.

(b) What are the interrupts available in 8051? Explain about the Interrupt Structure.

[6M]

SECTION-V

9 Draw the Architecture of ARM processor and explain each function in detail. [14M]

OR

10 Explain about the Serial data communication of 8051 with its registers. Also explain

about the Modes of operation of the same.

[14M]

**********

Code No: R18A0415

MALLA REDDY COLLEGE OF ENGINEERING & TECHNOLOGY (Autonomous Institution – UGC, Govt. of India)

III B.Tech II Semester Model Paper-3

Microprocessors and Microcontrollers

(ECE)

Roll No

Time: 3 hours Max. Marks: 70

Note: This question paper Consists of 5 Sections. Answer FIVE Questions, Choosing ONE

Question from each SECTION and each Question carries 14 marks.

***

SECTION-I

1 a) Draw the Architecture of 8086 and summarize the role of BIU unit.

b) List the advantages of memory segmentation. [10M]

[4M]

OR

2 a) Illustrate the functionality of Flag register with suitable examples.

b) What is memory segmentation? Explain the use of segmentation in different

applications.

[8M]

[6M]

SECTION-II 3

Explain the Addressing Modes of 8086 microprocessor with examples [14M]

OR

4

a) Write an assembly language program to sort the given values in descending

order with detailed explanation of taking example data.

b) b) Define assembler directives and mention the purpose of assembler directives

with some examples

[7M]

[7M]

SECTION-III

5 Explain the control word format of 8255 in I/O & BSR mode. [14M]

OR

6 Illustrate the purpose of 8251 USART and how it is interfaced with 8086 [14M]

SECTION-IV

7 a) Explain the architecture of 8051 microcontroller.

b) Write short notes on external hardware interrupts of 8051 microcontroller.

[10M]

[4M]

OR

8 a) Describe the operation of I/O ports in 8051 with neat sketch.

b) List the format of PSW register of 8051 and explain each bit [10M]

[4M]

SECTION-V

9 a) Explain about the CPSR register of ARM processor

b). Explain about Architecture of ARM processor

[7M]

[7M]

OR

10 a) Explain the SCON register in 8051.

b) Describe the Interrupt, vector table and exception handler in ARM. [6M]

[8M]

**********

R18

Code No: R18A0415

MALLA REDDY COLLEGE OF ENGINEERING & TECHNOLOGY (Autonomous Institution – UGC, Govt. of India)

III B.Tech II Semester Model Paper-4

Microprocessors and Microcontrollers

(ECE)

Roll No

Time: 3 hours Max. Marks: 70

Note: This question paper Consists of 5 Sections. Answer FIVE Questions, Choosing ONE

Question from each SECTION and each Question carries 14 marks.

***

SECTION-I

1 Explain the architecture of 8086 with neat diagram. [14M]

OR

2 Explain the function of following registers 8086 microprocessor. a) AX,BX,CX,DX

b) CS,DS,SS, ES c) BP,SP, SI& DI d) IP and instruction queue [14M]

SECTION-II

3 Explain the instructions of 8086 with examples.

[14M]

OR

4

a) Write an 8086 assembly language program to convert Binary to BCD number?

b) Describe in detail about the Procedures with suitable syntax and example.

[7M]

[7M]

SECTION-III

5 Draw the Block diagram and explain the operations of 8255 PPI. [14M]

OR

6 Explain the architecture of 8251A with neat diagram.

[14M]

SECTION-IV

7 a) Describe about the timer mode 0 with a neat sketch in 8051 microcontroller.

b) Write short notes on external hardware interrupts of 8051 microcontroller. [7M]

[7M]

OR

8 a) Explain about the Memory Structure of 8051.

b)Write an Assembly Language Program using 8051

i)Addition of two 8 bit Numbers ii). Addition of two 16 bit Numbers?

[8M]

[6M]

SECTION-V

9 Describe the various timers/ counters of 8051.

[14M]

OR

10 a) Describe the Software Interrupt instructions in ARM.

b) Mention about the program status register instructions in ARM processor. [7M]

[7M]

**********

R18

Page 1 of 8

Code No: R18A1205

MALLA REDDY COLLEGE OF ENGINEERING &

TECHNOLOGY (Autonomous Institution – UGC, Govt. of India)

III B.Tech I Semester Regular Examinations, February 2021

Artificial Intelligence (EEE, CSE & IT)

Roll No

Time: 2 hours 30 min Max.

Marks: 70

Answer Any Five Questions

All Questions carries equal marks.

***

1 Explain about uninformed search strategies with examples

[14M]

2 a) Define Heuristic search? What are the advantages of Heuristic

search?

b) Write about any one Heuristic technique

[7M]

[7M]

3 Discuss A* algorithm in detail.

[14M]

4

Give a brief note on Alpha-Beta Pruning

[14M]

5 Explain how to handle uncertain knowledge in detail.

[14M]

6 Write about the Belief Bayesian Networks

[14M]

[14M] R18

Page 2 of 8

7 a. . Discuss about Winston’s Learning Program.

b. Briefly describe learning in Problem Solving

[7M]

[7M]

8 Discuss various ways of knowledge acquisition. [14M]

Page 3 of 8

Code No: R18A1205

MALLA REDDY COLLEGE OF ENGINEERING & TECHNOLOGY (Autonomous Institution – UGC, Govt. of India)

III B.Tech II Semester Regular Examinations, July 2021

Artificial Intelligence

(ECE & AE) Time: 3 hours Max. Marks: 70

Answer Any Five Questions

All Questions carries equal marks.

***

1 What are the basic components of AI problem solving

methodology? Describe them in detail. Illustrate with an example.

[14M]

2 What is a depth first search of the search tree? Write an algorithm

to conduct depth first search. Explain with example and also

mention advantages and disadvantages.

[14M]

3 Demonstrate Forward Chaining and Backward Chaining.

[14M]

4

Explain the minimax algorithm with an example and diagram. [14M]

5 Describe Non- monotonic Reasoning in detail.

[14M]

6 Demonstrate Bayes’ Rule with an example.

[14M]

7 Explain Learning by Taking Advice in detail.

[14M]

8 Explain the process of knowledge acquisition and validation for

expert systems.

[14M]

R18

Page 4 of 8

Code No: R18A1205

MALLA REDDY COLLEGE OF ENGINEERING & TECHNOLOGY (Autonomous Institution – UGC, Govt. of India)

III B.Tech I Semester Supplementary Examinations, July/August 2021

Artificial Intelligence (EEE, CSE & IT)

Time: 3 hours Max. Marks: 70

Answer Any Five Questions

All Questions carries equal marks.

***

Discuss about the advantage of heuristic search techniques and explain generic

best first search strategy

[14M]

2 a. Define Artificial Intelligence. Explain the techniques of A.I. Also describe the

characteristics of Artificial Intelligence.

b. Discuss about how backtracking search strategy performs.

[7M]

[7M]

3 Describe the mini max algorithm with an example.

[14M]

4

a. Discuss about backward chaining algorithm

b. Describe probabilistic reasoning with example.

[7M]

[7M]

5 Explain how to represent Knowledge in an Uncertain Domain.

[14M]

6 a. Discuss about Knowledge Representation Issues in detail.

b. Explain rule based methods for uncertain reasoning.

[7M]

[7M]

7 a. Explain how to do learning from examples.

b. Describe the role of information gain in decision tree learning.

[7M]

[7M]

8 Explain the Expert System Architecture with the help of a neat diagram [14M]

R18

Page 5 of 8

Code No: R18A1205

MALLA REDDY COLLEGE OF ENGINEERING &

TECHNOLOGY (Autonomous Institution – UGC, Govt. of India)

II III B.Tech I Semester Regular/Supplementary Examinations,

Dec-21/Jan-22

Artificial Intelligence (EEE, CSE & IT)

Artificial Intelligence (EEE, CSE & IT)

Time: 3 hours Max. Marks: 70

Note: This question paper Consists of 5 Sections. Answer FIVE Questions, Choosing

ONE Question from each SECTION and each Question carries 14 marks.

***

SECTION-I

1 Explain the Heuristic Search Techniques. List and explain the applications of

Artificial Intelligence [14M]

OR

2 What is a Breadth first search of the search tree? Write an algorithm to conduct

Breadth first search explain with example and also mention advantages and

disadvantages.

[14M]

SECTION-II

3 Give a brief note on Alpha-Beta Pruning. How Mini max Search is useful and

implemented. [14M]

OR

4

How Probabilistic Reasoning is useful in Basic Knowledge Representation. Compare

Propositional Logic & First-Order Logic with their features

[14M]

SECTION-III

5 Explain in detail about Other Knowledge Representation Schemes along with its

advantages and disadvantages. [14M]

OR

6 Discuss about Acting Under Uncertainty? Analyze the Bayesian Belief networks with

clear examples.

[14M]

R18

Page 6 of 8

SECTION-IV

7 Illustrate Learning by Taking Advice & Learning in Problem Solving by considering

two real time examples [14M]

OR

8 Describe the role of information gain in decision tree learning [14M]

SECTION-V

9 With the help of a neat diagram, explain the Expert System Architecture. List its

Applications [14M]

OR

10 Explain Various Phases in building Expert Systems. Write the procedure for Knowledge

Acquisition by using Expert Systems. [14M]

**********

Page 7 of 8

Code No: R18A1205

MALLA REDDY COLLEGE OF ENGINEERING & TECHNOLOGY (Autonomous Institution – UGC, Govt. of India)

III B.Tech II Semester Supplementary Examinations, February 2022

Artificial Intelligence

(ECE & AE)

Roll No

Time: 3 hours Max. Marks: 70

Note: This question paper Consists of 5 Sections. Answer FIVE Questions, Choosing ONE

Question from each SECTION and each Question carries 14 marks.

***

SECTION-I

1 Define Artificial Intelligence. Explain the techniques of A.I. Also describe the

characteristics of Artificial Intelligence [14M]

OR

2 What is a breadth first search of the search tree? Explain breadth first search with

an example and also mention advantages and disadvantages.

[14M]

SECTION-II

3 Define constraint satisfaction problem (CSP). How CSP is formulated as a search

problem? Explain with an example? Give a brief note on Alpha-Beta Pruning

[14M]

OR

4

What is Propositional Logic? Differentiate Forward Chaining and Backward

Chaining, [14M]

SECTION-III

5 Write down logical representations for the following sentences suitable to use with

Generalized Modus Ponens:

(a) Horses, cows and pigs are mammals

(b) An offspring of a horse is a horse

(c) Bluebeard is a horse

(d) Offspring and parent are inverse relations

(e) Every mammal has a parent. Draw the proof tree generated by an exhaustive back-

ward chaining algorithm for the query ∃h Horse(h).

[14M]

OR

6 Explain, the knowledge level, logical level, and implementation level in a

knowledge-based agent? State the Bayes’ Rule

[14M]

R18

Page 8 of 8

SECTION-IV

7 What is Learning? Explain instance based learning with an example. [14M]

OR

8 Discuss the issues to be addressed in order to extend decision tree induction to a

wide variety of platforms.

[14M]

SECTION-V

9 Explain the process of knowledge acquisition and validation for expert systems. List the

Characteristics of Expert Systems. [14M]

OR

10 Discuss in detail about Various Knowledge Acquisition Techniques? [14M]

**********

Sub.Code:R18A0453 R18

MALLA REDDY COLLEGE OF ENGINEERING & TECHNOLOGY (Autonomous Institution – UGC, Govt. of India)

III B.Tech II Semester- Model Paper-1 Electronics and Communication Engineering

IoT & its Applications

Roll No. `

Time: 3 hours Max. Marks: 70 Note: This question paper Consists of 5 Sections. Answer FIVE Questions, Choosing ONE Question from each SECTION and each Question carries 14 marks.

SECTION- I

1 Explain in detail IoTWF standardized reference model. (OR)

2 Describe the IoT enabling Technologies & M2M Communication with suitable explanations.

SECTION- II 3 Describe on IEEE 802.15.4 &tabulate the protocol stacks utilizing IEEE 802.15.4.

(OR) 4 Describe about Application Layer Protocols:

(i) CoAP (ii) MQTT SECTION- III

5 Demonstrate the key steps involved in IoT Design methodology, explain the steps involved in

(OR) 6 Analyze the software and hardware features of Arduino board and explain the

procedure to install IDE. SECTION- IV

7 What is the difference between structured data and unstructured one, mentioning examples of each one?

(OR) 8 Explain the following

i) Cloud Platform for IoT/M2M Applications/Services ii) Cloud Service Models

SECTION- V 9 Explain the smart home automation system in an IOT?

(OR) 10 Explain the concept of Industry 4.0

R18

Sub.Code:R18A0453 R18

MALLA REDDY COLLEGE OF ENGINEERING & TECHNOLOGY (Autonomous Institution – UGC, Govt. of India)

III B.Tech II Semester- Model Paper-2 Electronics and Communication Engineering

IoT & its Applications

Roll No. `

Time: 3 hours Max. Marks: 70

Note: This question paper Consists of 5 Sections. Answer FIVE Questions, Choosing ONE Question from each SECTION and each Question carries 14 marks.

SECTION- I 1 Summarize in detail IoT data management and Compute stack.

(OR) 2 Describe the seven layers of IoT Reference model designed by IoTWF.

SECTION- II 3 Analyze in detail Lora WAN technology, illustrating the layers, MAC format and

Architecture. (OR)

4 Analyze in detail Supervisory Control and Data Acquisition (SCADA) with suitable illustration.

SECTION- III 5 Summarize in detail about embedded computing logic.

(OR) 6 Discuss in detail the building blocks of IoT and its functionalities with suitable

illustration. SECTION- IV

7 What is the difference between data in motion and data in rest, mentioning examples to each one?

(OR) 8 Compare in detail about

(i) Structured Vs Unstructured Data. (ii) Data in Motion Vs Data in Rest.

SECTION- V 9 Discuss the Infrastructures and Buildings development of an IOT?

(OR) 10 Explain the types of home appliances and other IoT Electronic equipments.

R18

Sub.Code:R18A0453 R18

MALLA REDDY COLLEGE OF ENGINEERING & TECHNOLOGY (Autonomous Institution – UGC, Govt. of India)

III B.Tech II Semester- Model Paper-3 Electronics and Communication Engineering

IoT & its Applications

Roll No. `

Time: 3 hours Max. Marks: 70

Note: This question paper Consists of 5 Sections. Answer FIVE Questions, Choosing ONE Question from each SECTION and each Question carries 14 marks.

SECTION- I 1 Describe the simplified IoT Architecture.

(OR) 2 Discuss the following in detail

i. Sensors and Actuators. ii. Connecting Smart Objects.

SECTION- II

3 Discuss the following: (i) Need for Optimization Constrained nodes and Networks. (ii) IP Versions

(OR) 4 Explain the following:

(i) 6LoWPAN (ii) IEEE 802.11ah

SECTION- III 5 Explain the microcontroller and chips involved in embedded devices.

(OR) 6 Discuss in detail the use of embedded computing in the design of IoTSysems.

(i) Analyze in detail an exemplary device: Raspberry Pi. (ii) Explain in detail the Raspberry Pi interfaces.

SECTION- IV 7 Explain in detail the need of Data Analytics for IoT and brief the challenges faced

by IoT Data Analytics. (OR)

8 What are the main three IOT data analytics challenges? Explain SECTION- V

9 Explain briefly about case study of smart home automation. (OR)

10 Explain the concept of Industry 4.0

R18

Sub.Code:R18A0453 R18

MALLA REDDY COLLEGE OF ENGINEERING & TECHNOLOGY (Autonomous Institution – UGC, Govt. of India)

III B.Tech II Semester- Model Paper-4 Electronics and Communication Engineering

IoT & its Applications

Roll No. `

Time: 3 hours Max. Marks: 70

Note: This question paper Consists of 5 Sections. Answer FIVE Questions, Choosing ONE Question from each SECTION and each Question carries 14 marks.

SECTION- I 1 Explain the various functional blocks of IoT eco systems.

(OR) 2 Describe the seven layers of IoT Reference model designed by IoTWF.

SECTION- II 3 Analyze in detail Lora WAN technology, illustrating the layers, MAC format and

Architecture. (OR)

4 Describe about Application Layer Protocols: (i) CoAP (ii) MQTT

SECTION- III 5 Demonstrate the key steps involved in IoT Design methodology, explain the steps

involved in (OR)

6 Illustrate the arduino board details and explain the steps for installing the board. SECTION- IV

7 What is the difference between data in motion and data in rest, mentioning examples to each one?

(OR) 8 Explain the following

i) Cloud Platform for IoT/M2M Applications/Services ii) Cloud Service Models

SECTION- V 9 Discuss the Infrastructures and Buildings development of an IOT?

(OR) 10 Explain the concept of Industry 4.0

R18