Debre Berhan University

College of Computing

Department of Information Technology

Enhanced Security – Efficiency Advanced Encryption Standard (ESE-

AES) Algorithm

A Thesis Submitted to the Department of Information Technology in Partial Fulfillment for

the Degree of Master of Science in Computer Networking and Security

By: Nigusu Gebeyehu Zinabu

Advisor: Samuel Asferaw (PhD)

Debre Berhan, Ethiopia

June, 2019

Enhanced Security – Efficiency Advanced Encryption Standard (ESE-

AES) Algorithm

By

Nigusu Gebeyehu Zinabu

Advisor: Samuel Asferaw (PhD)

Debre Berhan University

College of Computing

Department of Information Technology

In Partial Fulfillment for the Degree of Master of Science in Computer

Networking and Security

Debre Berhan, Ethiopia

June, 2019

APPROVAL PAGE

DEBRE BERHAN UNIVERSITY

COLLEGE OF COMPUTING

DEPARTMENT OF INFORMATION TECHNOLOGY

BY: NIGUSU GEBEYEHU ZINABU

ADVISOR: SAMUEL ASFERAW (PhD)

This is to certify that the thesis prepared by Nigusu Gebeyehu, in titled: Enhanced Security–

Efficiency Advanced Encryption Standard (ESE-AES) Algorithm and submitted in partial fulfillment

of the requirements for the Degree of Master of Science in Computer Networking and Security

complies with the regulations of the university and meets the accepted standards with respect to its

originality.

Signature of the Board of Examiners for Approval

_____________________________ ______________ _______________

Chairperson Signature Date

_______________________________ ______________ _______________

Advisor Signature Date

________________________________ ______________ _______________

Internal Examiner Signature Date

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External Examiner Signature Date

Dedicat ion

. . . t o m y b e l ov ed wi f e

T i r in go S hew al e f a

an d

… t o m y ch i lds :1 . N u h ami n Ni gu su Geb e yeh u

2 . A m an nu e l Ni gu su G eb e yeh u

Acknowledgements

First and foremost, I would like to thank my God for giving me the strength to carry out and complete

this work.

I am extremely grateful to my advisor Dr. Samuel Asferaw for his valuable advice, guidance,

beneficial discussions and encouragement throughout my research. He gave me all his knowledge,

time, patience and advices.

I would also like to thank my parents, brothers, sisters and my friends for their support, patience and

love. Without their encouragement, motivation and understanding, it would have been impossible for

me to complete this work. Finally, thanks to all people who supported me to complete this work.

i

Abstract

Encryption is a method of coding information or sensitive data or asset, to prevent unauthorized

users from accessing it. Now a day, it is essential to secure data that is at rest in our computer or

is transmitted via web against attacks. Several of cryptographic techniques are being used to

preserve security and could be classified as: symmetric and asymmetric. A symmetric algorithm

named as (AES) is selected for enhancement due to its applicability and widely used algorithm. In

AES, among the four stages that are used for encryption and decryption Sub Bytes and Mix Column

produce more delay; from the two, mix column accounts 60% of the whole delay. On the other side,

Shift Rows stage contribute to less security level of AES because it uses easy operation that is linear

in nature. To overcome these challenges, in the designed symmetrical cryptography algorithm shift

row stage of AES is replaced by symmetrical transposition technique to advance security and mix

column stage is replaced by bitwise reverse transposition technique to improve the sped efficiency

of the existing AES algorithm. The simulation result of our Symmetrical Transposition technique

has shown better security achievement, with greater than 50% avalanche effect and Bitwise Reverse

Transposition technique resulted in better encryption speed and decryption sped time when

compared with original AES: 112.48%, 128.953% and 122.9% encryption speed performance

because of symmetrical transposition, bitwise reverse transposition and combination of both

techniques (ESE-AES), respectively taking average of ten trials; 114.3%, 140.8% and 128.4%

increased the throughput because of symmetrical transposition, bitwise reverse transposition and

combination of both techniques (ESE-AES). Hence, our proposed Enhanced Security-Efficiency

Advanced Encryption Standard (ESE-AES) has better security, encryption and decryption speed

performance and throughput when compared to original Advance Encryption Standard (AES).

Keywords: Cryptography, Security, AES, Modified AES, Efficiency, Security, Avalanche Effect,

Symmetrical Transposition, Bitwise Reverse Transposition.

ii

Table of Contents

Abstract .............................................................................................................................................. i

Table of Contents ............................................................................................................................. ii

List of Figures ................................................................................................................................... v

List of Tables ................................................................................................................................... vi

List of Abbreviations ..................................................................................................................... vii

Chapter 1. Introduction ..................................................................................................................... 1

1.1 Background of the Study ................................................................................................ 1

1.2 Motivation ....................................................................................................................... 2

1.3 Statements of the Problem .............................................................................................. 2

1.4 Objective of the Study .................................................................................................... 3

1.5 Significance of the Study ................................................................................................ 3

1.6 Scope of the Study .......................................................................................................... 3

1.7 Limitation of the Study ................................................................................................... 3

1.8 Organization of the Thesis .............................................................................................. 4

Chapter 2. Literature Review ............................................................................................................ 5

2.1 Survey of related literature ............................................................................................. 5

2.1.1 Security ........................................................................................................................... 5

2.1.2 Cryptography .................................................................................................................. 5

2.1.3 Symmetric and Asymmetric Methods ............................................................................ 6

2.2 Related Work .................................................................................................................. 6

2.2.1 Original Advanced Encryption Standard Algorithm (AES) ........................................... 6

2.2.1.1 High-level Description of the AES algorithm ................................................................ 7

2.2.1.2 Operation of AES ........................................................................................................... 7

2.2.1.3 Encryption Process ......................................................................................................... 8

2.2.1.4 Byte Substitution (Sub Bytes) ........................................................................................ 9

iii

2.2.1.5 Shift Rows ...................................................................................................................... 9

2.2.1.6 Mix Columns .................................................................................................................. 9

2.2.1.7 Add Round Key ............................................................................................................ 10

2.2.1.8 Decryption Process ....................................................................................................... 10

2.3 Follow up work on Original Advanced Encryption Standard Algorithm (AES) ......... 11

2.4 Summary ....................................................................................................................... 16

Chapter 3. The Proposed Enhanced Security – Efficiency Advanced Encryption Standard

Algorithm ........................................................................................................................................ 17

3.1 Enhanced Security Advanced Encryption Standard (ES-AES) Algorithm ........................... 17

3.1.1 Mathematical Model of Symmetrical Transposition Stage .......................................... 19

3.1.2 Symmetrical Transposition Rule .................................................................................. 20

3.1.1 Algorithm of Symmetrical Transposition Stage ........................................................... 22

3.2 Enhanced Efficiency Advanced Encryption Standard (EE-AES) Algorithm ............... 22

3.2.1 Mathematical Model for Bitwise Reversed Transposition ........................................... 24

3.2.2 Bit Wise Reverse Transposition Rule ........................................................................... 25

3.2.3 Algorithm of Bitwise Reverse Transposition Stage ..................................................... 29

3.2.4 Comparison of the Existing Mix Column and proposed Bitwise Reverse Transposition

with the Same Input ..................................................................................................................... 29

3.2.4.1 Existing Mix Column ............................................................................................ 30

3.2.4.2 Proposed Bit Wise Reverse Transposition ............................................................ 31

3.3 The ESE- AES Algorithm Encryption Procedure ........................................................ 31

3.3.1 Add Round Key ............................................................................................................ 32

3.3.2 Sub Bytes ...................................................................................................................... 32

3.3.3 Symmetrical Transposition ........................................................................................... 32

3.3.4 Bitwise Reverse Transposition ..................................................................................... 32

3.3.5 Decryption in ESE-AES ............................................................................................... 33

3.4 Summary ................................................................................................................................ 35

iv

Chapter 4. Implementation and Performance Evaluation ............................................................... 36

4.1 Implementation of our Proposed Algorithms ............................................................... 36

4.2 Result and Discussion of the Proposed ESE-AES Algorithm ............................................... 36

4.2.1 The Key Expansion Algorithm ..................................................................................... 36

4.2.2 Encryption Process of ESE-AES .................................................................................. 37

4.3 Security Analysis: Enhanced Security Advanced Encryption Standard (ES-AES)

Algorithm ..................................................................................................................................... 40

4.3.1 Comparison of the Existing Shift Rows and Proposed Symmetrical Transposition based

on Randomness of the Output ..................................................................................................... 40

4.3.2 Avalanche Effect .......................................................................................................... 42

4.3.3 Analysis of the Existing and Proposed Algorithm Effects on the Diffusion Property . 46

4.4 Performance Analyses: Enhanced Efficiency Advanced Encryption Standard (EE-AES)

algorithm ...................................................................................................................................... 49

4.4.1 Encryption Speed .......................................................................................................... 49

4.4.2 Decryption Speed .......................................................................................................... 51

4.4.3 Throughput ................................................................................................................... 53

Chapter 5. Conclusions and Future Work ....................................................................................... 55

5.1 Conclusions ................................................................................................................... 55

5.2 Future Work .................................................................................................................. 55

References ....................................................................................................................................... 56

Appendices ....................................................................................................................................... A

v

List of Figures

Figure 2.1 Over all structure of AES Encryption and Decryption Process ....................................... 8

Figure 2.2 AES Encryption Process .................................................................................................. 8

Figure 2.3 Byte Substitution ............................................................................................................. 9

Figure 2.4 Shift Rows........................................................................................................................ 9

Figure 2.5 Mix Columns ................................................................................................................. 10

Figure 2.6 Add Round key .............................................................................................................. 10

Figure 3.1 The AES and MAES algorithm compared with our proposed Stages and ESE-AES

algorithm design .............................................................................................................................. 17

Figure 4.1 Shows identical input of shift rows and symmetrical transposition, however distinction

output .............................................................................................................................................. 40

Figure 4:2 Comparison of avalanche effect of proposed ES-AES, EE-AES, ESE-AES and AES

algorithms for the same data size. ................................................................................................... 45

Figure 4.3 Comparison of avalanche effect of AES, ES-AES, EE-AES and ESE-AES algorithms

for the same data size. ..................................................................................................................... 46

Figure 4.4 Analysis of the existing shift rows and proposed symmetrical transposition Algorithm

Effects on the Diffusion Property ................................................................................................... 49

Figure 4.5 Encryption time bar graph of taking average of 10 trials (16 byte). ………………….50

Figure 4:6 throughputs for encryption side………………………………………………………………54

vi

List of Tables

Table 2.1 AES parameters for the various AES ................................................................................ 7

Table 2.2.Proposed Methods, Major Contribution, Drawback/Limitation of the Papers ............... 13

Table 3.1 Bit Wise Reversed Transposition rule............................................................................. 25

Table 3.2 Bit Wise Reversed Transposition rule............................................................................. 26

Table 3.3 Input and output of Bit Wise Reversed Transposition conversation rule ....................... 27

Table 4.1 shows over all encryption process of ESE-AES algorithm with each rounds. ............... 37

Table 4.2 Degree of Input and Shift Row Output Confusion.......................................................... 41

Table 4.3 The existing shift row transformation ............................................................................ 41

Table 4.4 Degree of Input and Symmetrical Transposition Output Confusion .............................. 42

Table 4.5 The Proposed Symmetrical Transposition ...................................................................... 42

Table 4.6 Comparison of avalanche effect of ES-AES, EE-AES, AES and ESE-AES algorithms for

the same data size (128-bit) ............................................................................................................ 43

Table 4.7 The Cipher Value and Hamming Distance for the Change Shift Rows Operation. ........ 47

Table 4.8 The Cipher Value and Hamming Distance (bits) for the Change Symmetrical

Transposition Operation .................................................................................................................. 48

Table 4.9 Encryption time taking average of 10 trials (16 byte) ..................................................... 50

Table 4.10 Encryption time taking average of 1st 5 trials (16 byte) ................................................ 51

Table 4.11 Encryption time taking average of 2nd 5 trials (16 byte) ............................................... 51

Table 4.12 Decryption time taking average of 10 trials (16 byte) .................................................. 52

Table 4.13 Decryption Time taking 1st 5 Trials (16 byte) ............................................................... 52

Table 4.14 Decryption Time taking 2st 5 Trials (16 byte) ............................................................... 52

Table 4.15 Comparison of throughput at encryption side of AES, ESE-AES, ES-AES and EE-AES

based on ten trails experimental result. ........................................................................................... 53

vii

List of Abbreviations

AES Advanced Encryption Standard

ASCII American Standard Code for Information Interchange

BSS Bit Wise Reverse Transposition

CIA Confidentiality Integrity Authentication

CPU Central Processing Unit

CSE Common Sub-Expression Elimination

DES Data Encryption Standard

ECC Elliptic-Curve Cryptography

EE Enhanced Efficiency Advanced Encryption Standard

ES Enhanced Security Advanced Encryption Standard

ESE-AES Enhanced Security – Efficiency Advanced Encryption Standard

GF Galois field

GHz Gigahertz

HD Hamming Distance

IP Initialization vector for permutation

IV Initialization vector

LUTs Look up Tables

MAES Modified Advanced Encryption Standard

NIST National Institute of Standards and Technology

PAES Proposed Advanced Encryption Standard

PBWRT Proposed Bitwise Reverse Transposition

PDAs Personal Digital Assistances

PST Proposed Symmetrical Trans potion

viii

RAM Random Access Memory

RCon Round Constant

S-Box Substitution-box

TLS Transport Layer Security

Triple-DES Triple- Data Encryption Standard

Verilog HDL Verilog Hardware Description Language

XOR Exclusive Or

1

Chapter 1. Introduction

1.1 Background of the Study

Information security is process or method designed and implemented to secure electronic, or other

form of confidential, personal and sensitive data from unauthorized access, use, misuse,

disclosure, destruction, modification, or disruption. Among such methods the dominant technique

is used today is cryptography. Cryptography is the process of changing plain text in to encrypted

text and encrypted text back to plain text. Cryptography in most literature is classified into

symmetric and asymmetric cryptography. Advanced Encryption Standard (AES) is one of the

most popular symmetric cryptography encryption with block cipher structure. It was introduced

by Rijndael who is from US National Institutions of Standard and Technology Computation in

2001. It is a replacement of DES.

For data security, AES is the most used encryption algorithms from symmetric cipher. Every

rounds within the secret writing method contains four operations (Daemen and Rijmen, 2013)

[1]. Sub Byte, Shift Rows, Mix Column and Add Round Key. The algorithm is capable to use

key lengths of 128, 192 and 256 bits and also the range of rounds 10, 12 and 14 severally [1].

Every round has four operations and repetitious in nature. So, the output of 1st round is input to

the second round and performs constant operations with another set of keys. This method

continues until the last round reaches. In the last round, there is no mix-column operation. The

state array obtained when the last round is cipher text for transmission.

AES has four stages for encrypting and decrypting message these are: Sub Bytes, Shift Rows,

Mix Columns and Add Round Key. Among them Sub bytes, and Mix Columns produce more

delay [1]. The execution delay of Mix Columns accounts to 60% percent of the total delay. Due

to this AES algorithm is not adopted for IoT, wireless detector networks, low power devices like

PDAs. Therefore, cost effective symmetrical data encryption algorism with less power

consumption is critical for these environments [1]. Thus, the study focuses on proposing an

efficient and secured technique by modifying shift rows and mix column steps of AES.

2

1.2 Motivation

The major motivations were:

1. Small device has limited capabilities of battery power and memory and it is not possible to

use a typical AES Algorithm.

2. Secure information transmission between low power devices are required.

3. Encrypting data using standardized cryptographic algorithms consume more energy which

decrease the lifetime of small device [2].

1.3 Statements of the Problem

For information or data security, AES is the most used encryption algorithms from symmetric

cipher. In AES each rounds in the encryption process contains four operations as follows: Sub

Byte, Shift Rows, Mix Column and Add Round Key [2].

The algorithm is capable to use key lengths of 128, 192 and 256 bit and also the range of rounds

is 10,12 and 14, severally. However, previous research work identified the following shortcoming

on AES. Among its stages Sub bytes, Shift Rows, Mix Columns and Add Round Key, Sub bytes,

and Mix Columns cause more delay, more specifically the execution delay of Mix Columns

accounts to 60% percent of the total delay. Moreover, among these stages, shift rows stage of

AES exposes it to be less secure, due to simple operation and linear in nature [1].

To overcome these challenges, symmetric key encryption algorism with less power consumption

and better security level is necessary especially for small battery capability.

Hence, this research work attempted to answer the following research questions:

1. How can we improve the execution delay of Mix Columns in AES which accounts 60%

percent of the total delay of AES algorithm’s?

2. How can we enhance data encryption efficiency of AES keeping the security level of AES

not affected?

3. How can we improve the security problem of Shift rows stage in AES algorithm?

3

1.4 Objective of the Study

General Objective

The general objective of this study was Enhanced Security – Efficiency Advanced Encryption

Standard (ESE-AES) Algorithm by using optimal techniques, while not minimize the protection

level of the algorithmic.

Specific Objective

The specific objectives of this study include:

1. To design data encryption algorithm which enhances data encryption speed of AES algorithm.

2. To design data encryption algorithm which enhances data encryption security of AES

algorithm.

3. To evaluate our proposed techniques against data encryption efficiency and security of AES

algorithm.

1.5 Significance of the Study

This study enhances data encryption efficiency of AES algorithm, which would be more

important especially for battery scarce devices by replacing the more power consuming stage of

mix column and the low security level of AES by our proposed efficient techniques. It also

provides new directions for the researchers in the future.

1.6 Scope of the Study

This research exhaustively discusses the AES algorithm and its shortcomings. Then, it attempted

to propose algorithm to overcome these shortcomings. The proposed algorithm was evaluated

with AES algorithm using simulation, not test bed.

1.7 Limitation of the Study

AES supports 3 key length alternatives with 128, 192, or 256 bits and block length of 128 bits.

But, in our proposed algorithm we implemented using only 128-bit size because of constraint

of time.

4

1.8 Organization of the Thesis

The rest part of this thesis is organized as follows: Chapter 2, literature review and related work

for cryptanalytic algorithms were presented. Then, the proposed techniques symmetrical

transposition and bitwise reverse transposition for replacement of the shift rows and mix columns

is introduced in Chapter 3. Chapter 4 discusses implementation and performance analysis of the

proposed techniques. Finally, conclusion and future work is discussed in Chapter 5.

5

Chapter 2. Literature Review

In this section we surveyed related literature and related work about information security,

cryptography, symmetric cryptography and AES algorithm. These include concepts of security,

cryptography, encryption and decryption of AES. In addition, we include further ideas about

related work Modified Advanced Encryption Standard (MAES) which particularly focuses on

enhancing data encryption security and efficiency of Advanced Encryption Standard algorithm.

2.1 Survey of related literature

2.1.1 Security

Information security has extended to incorporate many analytical directions like user

authentication and authorization, network and hardware security, software security and

information cryptography [3]. Data security has importance for safeguarding the majority data

dealings applications. Security is taken into account as a crucial science discipline which has

several multifarious complexities [18].

The security of the sensitive data may be a prime concern for each company. It should have

fashionable communication, storage techniques and victimization computers which is connected

through networks that builds the sensitive information vulnerable for lot of threats.

The fundamental security ideas that are vital to sensitive data contain [18].

Confidentiality: the data is accessed solely by the licensed user.

Integrity: solely the licensed user will amendment the information.

Availability: accessing the information while not downside.

Also, the ideas that concern the sensitive data users are [18]:

Authentication: proving that a user is that the person he claims to be.

Authorization: the act of determinant whether or not a selected user has the proper to access

the information.

Non-repudiation: the user cannot deny playing associate activity [4].

2.1.2 Cryptography

Cryptography is the science of victimization arithmetic to cypher and decipher. The origin of

cryptography is found in Roman and Egyptian culture. Cryptography is thousand years previous

6

method to encipher the messages [5]. In its ancient type, folks use cryptography to cover their

messages that they need to stay secret from different attackers by using symbols, numbers or

photos on their part of the message. However, with the rise in technology, the necessity of

cryptography is augmented which supplies rise to new science algorithms like DES, 3DES and

AES [6].

With the arrival of technology, Cryptography has got emphasis because it has a discipline that

studies the mathematical techniques associated with data security like providing the protection

services of confidentiality, knowledge integrity, authentication and nonrepudiation. It is an

imperative tool to defend data in computing systems. It is used everyplace and by billions of

individuals worldwide on a routine. It is used to defend knowledge at rest and data in motion.

Cryptographic systems are an integral part of standard protocols, most notably the Transport

Layer Security (TLS) protocol, creating it comparatively straightforward to include robust coding

into a wide range of applications [2].

2.1.3 Symmetric and Asymmetric Methods

The cryptographic systems may be classified into symmetric and asymmetric. In symmetric

cryptography, the same secret key is used for the encoding and decoding. Whereas, in asymmetric

cryptography, separate keys are used for the encoding and decoding method. The Advanced

Encryption Standard AES can be encountered in symmetrical cryptography algorithm. It is found

a minimum of six time quicker than triple DES. A replacement for DES was that its key size was

too small. However, triple DES was designed to beat this downside but, it absolutely was found

slow [7]. To overcome the weak side of DES, AES was brought in to application with the

following

Options: 128/192/256-bit keys and block size-128-bit. It is stronger and quicker than Triple-DES,

give full specification and style details, software system implementable in C and Java.

2.2 Related Work

2.2.1 Original Advanced Encryption Standard Algorithm (AES)

AES is a symmetric block cipher with block length of 128 bits. It permits 3 different key lengths

128,192 and 256 bits. As it is shown in Table 2:1, it needs 128 bit keys for ten rounds, 192 bit

keys for twelve rounds and 256 bit keys for fourteen rounds for encoding process. For encryption

7

and decryption, every round has four functions except the last round. The last round needs 3

functions.

The encryption algorithm has four round functions: Sub Byte (), Shift Rows (), Mix Column ()

and Add Round Key (). The decryption, also has the same number of rounds with reverse

transformation order of round operation i.e. InvShiftRow (), InvSubByte (), AddRoundKey () and

InvMixColumn () [8].

Table 2.1 AES parameters for the various AES

AES Parameters AES-128 AES-192 AES-256

Key Size (Bits) 128 192 256

Number of rounds 10 12 14

Plaintext box size(Bits) 128 128 128

2.2.1.1 High-level Description of the AES algorithm

Key Expansions round keys are derived from the cipher key using Rijndael's key schedule. AES

needs a separate 128-bit round key block for every round.

Add Round Key (): every computer memory unit of the state is combined with a block of

the round key using bitwise xor.

Sub Bytes (): A non-linear substitution step wherever every computer memory unit is

replaced with another in step with a lookup table.

Shift Rows (): A transposition step wherever the last 3 rows of the state are shifted

cyclically a certain number of steps.

Mix Columns (): A mixing operation that operates on the columns of the state, combining

the four bytes in every column.

Final round (No Mix Columns) SubBytes () Shift Rows () AddRoundKey () [8].

2.2.1.2 Operation of AES

AES is a reiterative instead of Feistel cipher. It is supported ‘substitution–permutation network.

It consists of a series of joined operations, a number that involve exchange inputs by specific

outputs substitutions and involve shuffling bits around permutations. Curiously, AES performs

8

all its computations on bytes instead of bits. Hence, AES treats the 128 bits of a plaintext block

as sixteen bytes. These sixteen bytes organized in four columns and four rows for processing as

a matrix, not like DES. The amount of rounds in AES is variable and dependent on the length of

the key [9].

The general structure of AES coding and decoding method structure is given in the following

illustration.

Figure 2.1 Over all structure of AES Encryption and Decryption Process

2.2.1.3 Encryption Process

Here, we describe typical round of AES encryption. Every round includes of 4 sub-processes. The

primary round method is delineated below [9].

Figure 2.2 AES Encryption Process

9

2.2.1.4 Byte Substitution (Sub Bytes)

The 16 input bytes are substituted by looking up a fixed table S−box given in design. The result

is in a matrix of four rows and four columns [9].

2.2.1.5 Shift Rows

Each of the four rows of the matrix is shifted to the left. Any entries that ‘fall off’ area unit re-

inserted on the correct aspect of row. Shift is administered as follows 1st row is not shifted.

Second row is shifted one-byte position to the left. Third row is shifted 2 positions to the left.

Fourth row is shifted 3 positions to the left. The result is a new matrix consisting of a similar

sixteen bytes [3] [19].

Figure 2.4 Shift Rows

2.2.1.6 Mix Columns

Perform takes as input the four bytes of 1 column and outputs four fully new bytes, that replace

the initial column. The result is another new matrix consisting of sixteen new bytes. It ought to

be noted that this step is not performed within the last round [1] [19].

Figure 2.3 Byte Substitution

10

Figure 2.5 Mix Columns

2.2.1.7 Add Round Key

The sixteen bytes of the matrix are currently thought of as 128 bits and are XORed to the 128 bits

of the round key. If this is often the last round, then the output is that the cipher text. Otherwise,

the ensuing 128 bits are taken as sixteen bytes and that we begin another similar rounds [9].

Figure 2.6 Add Round key

2.2.1.8 Decryption Process

The method of decipherment of AES cipher text is comparable to the coding process within the

reverse order. Every rounds consists of the four processes conducted within the reverse order:

Add round key, Mix Columns, Shift Rows and byte substitution. Since sub-processes in every

round are in reverse manner, not like for a Feistel Cipher, the coding and decipherment algorithms

has to be singly enforced, though they are very closely connected [9].

11

2.3 Follow up work on Original Advanced Encryption Standard Algorithm

(AES)

Many researchers had conducted a number of researches in the area of cryptography following

the arrival of technology because everything is completed over internet, which results in the

upgrading of algorithms using encrypt information or data. Of the various encryption algorithmic,

Advanced Encryption Standard(AES) is the most generic algorithmic that is used to code

messages or information.

To collect information on AES algorithm, we tried to refer a number of journal and conference

articles. But, in this thesis, we focused on the recent papers which were published between 2015

up to 2018. And from this literature review, we determined three parameters that are necessary

within the AES algorithm: efficiency (Encryption time, decryption time), security (avalanche

result, result of diffusion and confusion) of AES, and randomness of the output or mathematical

soundness of the AES algorithm.

Rahman, A. et al. [2] It is presented under the title of “a modified version of AES for Resource-

Constraint Environments.” A replacement Substitution Box is proposed which works over the

Galois Field (24) by constructing a novel affine transformation equation. The result shows that it

extends the battery lifetime of low power-driven devices by consuming less amount of energy.

However, the speed of the algorithm will not increase significantly due to mix column stage

because the execution delay of mix column stage results is 60% of the whole computational time

of AES rather than s-box stage of AES [1]. Therefore, this is not convenient with restricted

resource and low power-driven devices.

Amina M. et al. [10] Focus on the title of “Secure Encryption for Wireless Multimedia Sensors

Network”. The concept of the approach is predicated on the AES algorithm with shifts rather than

the arithmetic operations named the Shift-AES. During this approach, the Mix-Columns method

of the AES algorithm is replaced by another shift transformation of columns.

12

Fig. 2.7. The Transformation Shift-Cols after the whole processing Sub Byte and Shift Rows of AES

The proposed scheme achieves high speed encryption and decryption process specifically for

media like image also for plaintext transfer by eliminate the complex process of the mix column.

On the other hand, the security level of the algorithm will decrease significantly because shift-

column use similar operation like shift rows stage of AES. Here, the only difference is rows and

columns. In AES Shift row stage, there is less security level stage due to its usage of simple

operation and linear in nature, Therefore, this will not be good solution for high security

requirements, taking into consideration the powerful computational process for the attackers [10].

M.Vaidehi et al [11] Focus on “Enhanced Mix Column Design for AES Encryption.” In this

research work, Structure of Mix Column for AES Encryption has been realized to improve the

hardware architecture of AES Encryption algorithm.

Reducing the Common Sub-Expression Elimination (CSE) technique has been employed in this

analysis work to reduce the hardware structure of mix column design. More technique of

increased Inverse Mix Column is employed in decipherment side. The main goal of the analysis

work is to cut back the hardware Slices, Lookup Tables (LUTs) and Power consumption of AES

encryption architecture. Designed of proposed increased encryption has been designed with the

assistance of Verilog Hardware Description Language (Verilog HDL) [11].

The proposed scheme improves the hardware architecture of AES encryption algorithm. It offers

10.93% reduction in Slices, 13.6% reduction in LUTs and 1.19% reduction in delay consumption

than the existing Mix Column transformation architecture of AES Encryption. But it focuses on

hardware architecture of AES Encryption algorithm rather than reducing execution time of

mathematical structure of mix column stage operations [11].

Rizky Riyaldhia, et al, [12] Focus on “Improvement of advanced encryption standard algorithm

with shift row and s-box modification mapping in mix column.” The Improvement has been made

by reduces shift row circular process and S-Box modification for Mix Column transformation.

The result showed that improvement on encryption process is 86.143% and decryption process is

13.085%. But, the techniques need to consume bigger memory to store two modified S-Box map

and Array Shift Row map. And the approach is not considering security issue of AES.

Mahmoud A. eltatar, et al, [13] Focus on “Modified Advanced Encryption Standard Algorithm

for Reliable Real-Time Communications”. The first goal of the MAES algorithm is to extend the

13

speed of the coding and decoding algorithms. In the MAES design, the Mix Columns stage is

replaced with xor operation between the input state and random vector called IV. The mix column

stage is the most calculation demanding stage in the AES design and therefore it consume most

of the time needed for encryption and decryption. So the modification can increase the speed of

the algorithm by replacing the mix column stage with xor operation.

On the other hand, the security level of the algorithm will decrease significantly because of the

using of the old and part of an in secure algorithms such as DES (FIPS197,2001), therefore this

will not be good solution for high security requirements [13].

Shasi B. Rana Puneet Kumar (2015) [14] Introduced “parallel computation victimization

multicore processors by parallelizing the execution of the algorithmic program in multiple cores/

Moderate Security/.” This paper presents the protection and comparison for the data with the

AES. throughout this analysis, it increases the number of rounds (Nr) to sixteen for the coding

and decoding method of AES algorithmic, which ends up in further security to the system. The

generation of the key has been finished the help of the Polybius square. Therefore, the protection

of the system has been improved. However, with the increase in sort of rounds it is going to take

loads of machine time.

The most related summary of cited publication comparison of the results of the proposed

methods, major contribution and drawback/limitation of the papers was also included in the

following Table

Table 2.2.Proposed Methods, Major Contribution, Drawback/Limitation of the Papers

Author Proposed Methods Major Contribution Drawback/Limitation of the

Paper

14

Arnab

Rahman,

et al 2018

The paper it presents

a modified Version

of AES for

Resource-Constraint

Environments. A

replacement

Substitution Box is

proposed which

works over the

Galois Field (24) by

constructing a novel

affine transformation

equation.

The result shows that extending

the battery lifetime of low

power-driven devices by

consuming less amount of

energy.

The speed of the algorithm

will not increase

significantly due to mix

column stage, because the

execution delay of mix

Column stage results is

60% of the whole

computational time of AES

rather than s-box stage of

AES. Therefore, this is not

convenient with restricted

resource and low power-

driven devices.

Amina M.

et al

(2017)

Focus on Secure

Encryption for

Wireless Multimedia

Sensors Network.

The concept of the

approach is

predicated on the

AES algorithm with

shifts rather than the

arithmetic operations

named the Shift-

AES.

The proposed scheme achieves

high speed encryption and

decryption process specifically

for media like image also for

plaintext transfer by eliminate

the complex process of the mix

column, but in the other hand

the security level of the

algorithm will decrease

significantly because shift-

column use similar operation

like shift row stage of AES, the

only difference is rows and

columns. Because in AES Shift

row stage is less security level

stage, due to it uses simple

operation and linear in nature.

In AES, Shift rows stage

and the proposed shift

column is less security

level stage, due to it uses

simple operation and linear

in nature, Therefore, this

will not be good solution

for better security

requirements.

15

P. Kumar

, et al

(2016)

introduced parallel

computation

victimization

multicore processors

by parallelizing the

execution of the

algorithmic program

in multiple cores/

Moderate Security/.

In this research, it increases the

number of rounds (Nr) to 16 for

the encryption and decryption

process of AES algorithm,

which results in more security

to the system. The generation

of the key has been done with

the help of the Polybius square.

thus the security of the system

has been improved.

However, due to an

increase in number of

rounds it increase more

computational time and

hence is not recommended

for low power device.

Mahmoud

A. eltatar,

et al,

(2017)

Focus on Modified

AES Algorithm for

Reliable Real-Time

Communications.

The 1st goal of the

MAES scheme is to

increase the speed of

the encryption and

decryption

algorithms.

So the modification can

increase the speed of the

algorithm by replacing the mix

column stage with xor

operation.

In the other hand the

security level of the

algorithm will decrease

significantly because the

using of old and concepts

of an in secure algorithms

such as DES principle,

therefore this will not be

good solution for better

security requirements.

Rizky

Riyaldhia,

et al,

(2017)

Focus on

Improvement of

advanced encryption

standard algorithm

with shift row and s-

box modification

mapping in mix

column.

The result show that percentage

improvement on encryption

process is 86.143% and

decryption process is 13.085%.

The techniques are need to

consume bigger memory to

store two modified S-Box

map and Array Shift Row

map and the approach is

not considering security

issue of AES.

16

2.4 Summary

As we have seen, all the above related works do have tradeoff between efficiency and security

level of AES. In other words, when they increase the efficiency, security is affected and vice

versa. To overcome this challenges, efficient symmetrical key cryptography algorithm with less

computational time and better security level is important. It is clear that the robustness of an

encryption algorithm depends of the key length, the number of rounds and its mathematical

complexness.

Therefore, we tried to propose efficient techniques of AES Algorithm with balancing the tradeoff

between the efficiency and the security level of the algorithm. Then, we constructed better data

encryption efficiency technique of AES that is bit wise reverse transposition and symmetrical

transposition techniques. This was done to balance the tradeoff between efficiency and security

of Enhanced Security Efficiency Advanced Encryption Standard (ESE-AES) as much as possible.

17

Chapter 3. The Proposed Enhanced Security – Efficiency Advanced

Encryption Standard Algorithm

In this chapter we have proposed three algorithms: Enhanced Security Advanced Encryption

Standard (ES-AES), Enhanced Efficiency Advanced Encryption Standard (EE-AES) and

Enhanced Security- Efficiency Advanced Encryption Standard (ESE-AES) to improve the

original AES algorithm. Each of these algorithms is discussed in separate sections as follows:

Figure 3.1 shows the overall design of AES, MAES and ESE-AES algorithm. The figure shows

the stage difference between MAES algorithm and AES is in 3rd stage while the difference

between ESE-AES is on 2nd and 3rd stages.

Figure 3.1 The AES and MAES algorithm compared with our proposed Stages and ESE-AES

algorithm design

3.1 Enhanced Security Advanced Encryption Standard (ES-AES) Algorithm

To improve security of AES algorithm among its 4 stages, shift rows stage is substituted by our

new stage called symmetrical transposition. This block brings a 4×4 matrix of bytes. This block

comes into the state array. The state array is changed at every stage of AES. Similarly, the 128-

bit key is represented also as a matrix of 4×4 bytes. Key expansion schedule generates a total of

10 rounds this 4×4-byte matrix (in one round we have 4 words or 16 bytes), with pre-round we

have a total of forty-four words.

AES supports 3 key length alternatives: 128, 192, or 256 bits and a block length of 128 bits. But,

in our proposed algorithm we choose to implement using 128-bits key length. The ES-AES

18

algorithm’s encryption and decryption process design with 128 bit are shown on Figure 3.2 and

Figure 3.3, respectively.

Figure 3.2 ES-AES algorithm encryption process with 128 bit

19

Figure 3.3 ES-AES algorithm decryption process with 128 bit

3.1.1 Mathematical Model of Symmetrical Transposition Stage

Symmetrical Transposition Stage which is 2nd stage in the algorithm is substituted in the place of

Shift Rows in AES enhances data encryption security of AES algorithm. The following example

shows input and output of symmetrical transposition stage:

0 4 8 12

20

Input Output

3.1.2 Symmetrical Transposition Rule

Interchanging the position of non-main diagonal elements that are symmetrical with

respect to the main diagonal elements.

Interchanging the position of the main diagonal elements that are symmetrical with

respect to the non-main diagonal elements.

Figure 3.4 Symmetrical Transposition Rule

1 5 9 13

2 6 10 14

3 7 11 15

15 1 2 3

4 10 6 7

8 9 5 11

12 13 14 0

21

The internal structure of Symmetrical Transposition showed significant confusion and diffusion

in the output compared to the existing shift rows stage of the AES algorithm as shown in Figure

3.5.

Input Output

Figure 3.5 The Internal Structure of Symmetrical Transposition

22

3.1.1 Algorithm of Symmetrical Transposition Stage

An algorithmic could be a procedure or formula for solving a problem, supported by conducting

a sequence of specific actions. A computer program is often viewed as associate degree elaborate

algorithmic rule. In mathematics and computer science, associate degree algorithmic rule

sometimes suggests that a little procedure that solves a continual downside. Therefore, the

proposed algorithm procedure for our symmetrical transposition stage is shown in Algorithm 3.1

Algorithm 3.1 Symmetrical Transposition Stage Algorithm

3.2 Enhanced Efficiency Advanced Encryption Standard (EE-AES)

Algorithm

The primarily goal of the proposed EE-AES scheme is to enhances the computational time of the

AES algorithm. In the proposed EE-AES design, the mix column stage is replaced with a bitwise

reverse transposition, this operation decreases the calculation demands of the original design mix

column stage of AES. Therefore, to improve efficiency of AES algorithm among its 4 stages, mix

columns stage is substituted by our new stage called bitwise reverse transposition.

The proposed diagram of the EE-AES encryption and decryption process with 128-bit design are

shown on Figure 3.6 and Figure 3.7, respectively.

First, Accept 4x4 hex value array of matrix;

Next, Swap the position of non-main diagonal elements that

are symmetrical with respect to the main diagonal;

Then, reversing elements of major diagonal(𝑎11 with 𝑎44 and

𝑎22 with 𝑎33);

Finally, display 4x4 hex value array of matrix.

23

Figure 3.6 EE-AES encryption process with 128 bit

24

Figure 3.7 EE-AES Decryption Structure of Proposed Algorithm

3.2.1 Mathematical Model for Bitwise Reversed Transposition

In this section, we have proposed efficient data encryption technique that can be named as bitwise

reversed transposition operation, which enhances data encryption speed of AES algorithm by

using bitwise reverse transposition, which remove the complexity of addition and multiplication

operations of the current mix column stage of AES. The proposed EE-AES algorithm’s bitwise

reversed transposition operation, mathematical model and overall rules and examples are

discussed as follows:

25

Examples of bitwise reversed transposition string of an array input and output.

We use hex (00-09 and 0A-0F) as a result of two hex digit maps to eight binary bits perfectly,

rather than writing 00001010, we have to use 0A (10 decimal). We will tell Java to use hex

(literals) by beginning with 0x as in 0x0A. As declared before, we must always output 80

(00000001 to 00001000) sifting eight bit.

3.2.2 Bit Wise Reverse Transposition Rule

Taking the 1st row elements of the input to the 1st column in the output, and then interchanging

𝑎21 with 𝑎31 and reverse bit wise in the output.

Taking the 2nd row elements of the input to the 3rd column in the output, and then

interchanging 𝑎23 with 𝑎33 and reverse bit wise in the output.

Taking the 3rd row elements of the input to the 2nd column in the output, and then

interchanging 𝑎22 and 𝑎32 and reverse bit wise in the output.

Taking the 4th row elements of the input to the 4th column in the output, and then interchanging

𝑎24 and 𝑎34 and reverse bit wise in the output.

The above transposition rule can be summarized as follows:

Table 3.1 Bit Wise Reversed Transposition rule

Input Output

1st row 1st column, and interchange 𝑎21 with 𝑎31 and reverse bit wise in the output.

26

2nd row 3rd column, and interchange 𝑎23 with 𝑎33 and reverse bit wise in the output.

3rd row 2nd column, and interchange 𝑎22 with 𝑎32 and reverse bit wise in the output

4th row 4th column, and interchange 𝑎24 with 𝑎34 and reverse bit wise in the output

On the other hand, the transposition can be made by using the following transposition rule:

Interchanging 𝑎12 with 𝑎13 in the input and then taking it to the 1st column in the output.

Interchanging 𝑎22 with 𝑎23 in the input, and then taking it to the 3rd column and reverse

bit wise in the output.

Interchanging 𝑎32 with 𝑎33 in the input, and then taking it to the 2nd column and reverse

bit wise in the output.

Interchanging 𝑎42 with 𝑎43 in the input, and then taking it to the 4th column and reverse

bit wise in the output.

This transposition can be summarized as follows:

Table 3.2 Bit Wise Reversed Transposition rule

Input Output

Taking 1st row elements and interchanging 𝑎12 with 𝑎13 and reverse bit wise in the

output.

1st column

Taking 2nd row elements and interchanging 𝑎22 with 𝑎23 and reverse bit wise in the

output.

3rd column

Taking 3rd row elements and interchanging 𝑎32 and 𝑎33 and reverse bit wise in the

output.

2nd column

Taking 4th row elements and interchanging 𝑎42 and 𝑎43 and reverse bit wise in the

output.

4th column

27

This method is not similar to the original AES design method. It showed easy operation and better

efficiency as compared to the existing mix column of AES method. In this method we take an

array as follows:

Table 3.3 Input and output of Bit Wise Reversed Transposition conversation rule

DEC HEX BIN INVBIN INVHEX DEC

0 00 00000000 00000000 00 0

1 01 00000001 10000000 80 8

2 02 00000010 01000000 40 4

3 03 00000011 11000000 C0 12

4 04 00000100 00100000 20 2

5 05 00000101 10100000 A0 10

6 06 00000110 01100000 60 6

7 07 00000111 11010000 D0 14

8 08 00001000 00010000 10 1

9 09 00001001 10010000 90 9

10 0A 00001010 01010000 50 5

11 0B 00001011 11010000 D0 13

12 0C 00001100 00110000 30 3

13 0D 00001101 10110000 B0 11

14 0E 00001110 01110000 70 7

15 0F 00001111 11110000 F0 15

28

Input Output

Figure 3.8 The Internal structure of bitwise reverse transposition

The above diagram shows that almost all the input data are significantly producing confusion in

the output.

29

3.2.3 Algorithm of Bitwise Reverse Transposition Stage

Algorithm 3.2 Bitwise Reverse Transposition Stage Algorithm

3.2.4 Comparison of the Existing Mix Column and proposed Bitwise Reverse

Transposition with the Same Input

First we compare the existing mix column against the proposed bit wise reverse transposition with

the same input.

First Accept 4x4 hexa value String Array;

Then convert hexa value to binary;

Next apply reverse order bit wise in byte by byte;

Then convert binary to hexa value;

Finally, Display 4x4 hexa value String array;

or

Accept Input I

Get Length of I, L

Declare Input matrix IM

Declare BitRevorder of Input = BR

For (i = 0; I < L; i++)

Im[i]=GetAscii(I[i]);

Decimal = get Decimal (Im[i]);

BR[i] = getBitReverse (decimal);

Display: IM

: BRmatrix

30

3.2.4.1 Existing Mix Column

Figure 3.9 Existing mix column operations

Input = 00 01 02 03

Output (00) of in the output = (00 * 2) XOR (01*3) XOR (02*1) XOR (03*1). So based on

2.2.1.6 related work literature review explanation, every column of 4 bytes is currently

transformed using a special mathematical relation. This operation takes four bytes of one column

as input and results four absolutely new bytes, that replace the initial column. The output matrix

consists of 16 new bytes.

It ought to be noted that this step isn't performed in the last round. So normally one-byte mix

column operation within the encryption process will consume 17 cycles and one-byte mix column

operation within the decryption process will consume 60 cycles that thought-about too very long

time [9].

31

3.2.4.2 Proposed Bit Wise Reverse Transposition

Figure 3.10 Proposed bit wise reverse transposition

Based on section 3.2.2. Bit Wise Reverse Transposition Rule, the above figure showed that

the input matrix is easily transformed in to the output matrix by using bitwise reverse order

without addition and multiplication operation. Therefore, bitwise revers transposition showed

better computational time compared to mix column stages of AES.

3.3 The ESE- AES Algorithm Encryption Procedure

ESE-AES algorithm is integration of ES-AES and EE-AES algorithms discussed above. It

substitutes 2nd and 3rd stages of AES by Symmetrical Transposition, and Bitwise Reverse

Transposition, respectively. The four sub-operations of ESE-AES are Add Round Key, Sub

Bytes, Symmetrical Transposition, and Bitwise Reverse Transposition. These stages are

explained in detail in the following subsections. The coding section of ESE-AES is broken into

three phases: the initial round, the main rounds, and final round.

All of the phases use an equivalent sub-operation in several combinations as follows:

Initial Round: I. Add Round Key

Main Round: I. Sub Bytes II. Symmetrical Transposition III. Bitwise Reverse Transposition

IV. Add Round Key

Final Round: I. Sub Bytes II. Symmetrical Transposition III. Add Round Key

32

3.3.1 Add Round Key

In this paper the Add Round Key operation of ESE-AES is like AES encoding directly operates

on the AES Round key. Throughout this operation, the input to the round is exclusive-ored with

the round key.

3.3.2 Sub Bytes

Similarly, The Sub Bytes part of Proposed ESE-AES and AES involves splitting the input into

bytes. Unlike DES, AES uses constant S-Box for all bytes. And the AES and ESE-AES S-Box

implements inverse multiplication in Galois Field 28.

3.3.3 Symmetrical Transposition

In this part the shift row of AES is replaced by Symmetrical Transposition part of the proposed

ESE-AES, every rows and columns of the 128-bit internal state of the cipher is mixed. That could

be a 4x4 matrix wherever every cell contains a byte. Bytes of the interior state are placed within

the matrix across rows and columns interchanging the position of non-main diagonal parts that

are symmetrical with respect to the main diagonal elements. Then interchanging the position of

the main diagonal parts that are symmetrical with relevance of the non-diagonal array of elements.

3.3.4 Bitwise Reverse Transposition

Like the symmetrical transposition phase of the proposed ESE-AES, the bitwise reverse

transposition stage provides diffusion by mix the input round. In contrast to mix columns section

of original AES, bitwise reverse transposition uses optimum operations to enhance the speed of

the encoding and secret writing algorithm. Wherever position has to range between zero and

seven, if we have got the smallest amount vital bit as "bit 1" then you would like your -1 however

we would suggest against it - that sort of modification of position is often a supply of errors for

us.

The proposed diagram of the ESE-AES encryption process with 128 bit designed is shown below:

33

Figure 3.11 The proposed ESE- AES design algorithm for encryption process

3.3.5 Decryption in ESE-AES

To decipher the proposed ESE-AES-encrypted cipher text, it is necessary to undo every stage of

the encryption operation within the reverse order during which they were applied. The 3 stage of

decryption are as follows:

Inverse Final Round: I. Add Round Key II. Sub Bytes III. Symmetrical Transposition

Inverse Main Round: I. Bit wise Reverse Transposition II. Add Round Key

III. Sub Bytes IV. Symmetrical Transposition

34

Inverse Initial Round: I. Add Round Key

The proposed diagram of the ESE-AES Decryption process with 128 bit designed are shown

bellows:

Figure 3.12 The proposed ESE- AES design algorithm for decryption process

35

3.4 Summary

As we have discussed so far, we proposed the two proposed techniques: symmetrical

transposition, and bitwise reverse transposition. These proposed techniques were designed for

ESE-AES algorithm. Under these proposed techniques, the following points were discussed:

proposed design, mathematical modeling, input and output and algorithms of the proposed

methods.

Based on the proposed techniques, the current AES shift row stage was replaced by symmetrical

transposition. This happened to balance the tradeoff between security and efficiency of ESE-AES.

And the AES mix columns stage was replaced by bitwise reversed transposition. This was done

to enhance the speed of the encryption algorithm and to balance the tradeoff between encryption

time and security.

36

Chapter 4. Implementation and Performance Evaluation

4.1 Implementation of our Proposed Algorithms

Our proposed algorithms: ES-AES, EE-AES and ESE-AES are implemented and compared with

original AES algorithms based on the following evaluation metrics: for security (avalanche effect,

soundness of mathematics, effect of confusion and diffusion, hamming distance) and

computational speed (encryption speed, decryption speed). The implementation is conducted

using Intel-R, Core-TM i5, CPU 2.7-GHz, 64-bit Processor with 4 GB of RAM. We have

implemented these algorithms using NetBeans IDE 8.0.1 software. Input to the algorithm is a

block of 128-bit plaintext (data) and a 128-bit key.

4.2 Result and Discussion of the Proposed ESE-AES Algorithm

A single 128-bit block is depicted as a squared matrix of bytes. This block is copied in to the state

array. Which is modified at each stage of encryption or decryption. After the final stage, state is

copied to an output matrix. Let the message be (consider the value is after add with the given key)

Plain text: ABCDEFGHIJKLMNOP Cipher key: 0123456789012345

4.2.1 The Key Expansion Algorithm

The AES key expansion algorithm takes as input a 4-word (16-byte) key and produces a linear

array of forty-four words (176 bytes). this is often enough to provide a 4-word round key for the

initial add round key step and every of the ten rounds of the cipher [22].

-- Key Hex --

| 30 34 38 32 |

| 31 35 39 33 |

| 32 36 30 34 |

| 33 37 31 35 |

-- Plain Text --

| 41 45 49 4D |

| 42 46 4A 4E |

| 43 47 4B 4F |

| 44 48 4C 50 |

37

-- key Expansion –

4.2.2 Encryption Process of ESE-AES

Table 4.1 shows over all encryption process of ESE-AES algorithm with each rounds.

Table 4.1 Encryption process of proposed ESE-AES with each rounds

| 30 34 38 32 |

| 31 35 39 33 |

| 32 36 30 34 |

| 33 37 31 35 |

| AB F3 AE F1 |

| 9A C6 97 C2 |

| A8 F0 A7 F6 |

| 9B C7 96 C3 |

| 6F 63 80 E5 |

| F5 A5 17 27 |

| 5D 55 B0 D1 |

| C6 92 26 12 |

| 24 94 49 51 |

| D1 31 5E 76 |

| 8C 64 EE A7 |

| 4A F6 C8 B5 |

| 6E 7C 9C 87 |

| BF 4D C2 F1 |

| 33 29 2C 56 |

| 79 DF E4 E3 |

| E0 15 8D 31 |

| 5F 58 4F C0 |

| 6C 71 63 96 |

| 15 AE 87 75 |

| 24 02 10 68 |

| 7B 5A 5F A8 |

| 17 2B 3C 3E |

| 02 85 BB 4B |

| F3 E8 A3 1F |

| 88 B2 FC B7 |

| 9F 99 C0 89 |

| 9D 1C 7B C2 |

| EF C9 86 41 |

| 67 7B 7A F6 |

| F8 E2 BA 7F |

| 65 FE C1 BD |

| 4F B1 FC 0C |

| 28 CA 86 FA |

| D0 28 3C 85 |

| B5 D6 FD 38 |

| 8F E5 FB D9 |

| A7 2F 7D 23 |

| 77 07 41 A6 |

| C2 D1 BC 9E |

38

Round Start of Round

After Sub

Bytes

After Symmetrical

Transposition

Bit Revers

Transposition

Round key

Value

0 | 41 45 49 4D |

| 42 46 4A 4E |

| 43 47 4B 4F |

| 44 48 4C 50 |

| 30 34 38 32 |

| 31 35 39 33 |

| 32 36 30 34 |

| 33 37 31 35 |

1 | 71 74 7B 7E |

| 76 73 7C 79 |

| 7B 7E 7B 7E |

| 76 7B 78 65 |

A3 92 21 F3 |

| 38 8F 10 B6 |

| 21 F3 21 F3 |

| 38 21 BC 4D |

| A3 38 21 38 |

| 92 8F F3 21 |

| 21 10 21 BC |

| F3 B6 F3 4D |

| C4 1C 84 1C |

| 49 F0 CE 84 |

| 84 08 84 3D |

| CE 6D CE B2 |

| 30 31 32 33 |

| 34 35 36 37 |

| 38 39 30 31 |

| 32 33 34 35 |

2 | 6F 86 2C 87 |

| BA 36 3E 43 |

| 2A 9F 23 AB |

| 3F AF 38 71 |

| A8 44 71 17 |

| F4 05 B2 1A |

| E5 DB 26 62 |

| 75 79 07 A3 |

| A8 F4 E5 75 |

| 44 05 DB 79 |

| 71 B2 26 07 |

| 17 1A 62 A3 |

| 15 2F A6 AE |

| 22 A0 DA 9E |

| 8E 4D 64 E0 |

| E8 58 46 C4 |

| AB 9A A8 9B|

| F3 C6 F0 C7 |

| AE 97 A7 96 |

| F1 C2 F6 C3 |

3 | 7A DA FB 68|

| 41 05 8F 0C |

| 0E 5A D4 C6|

| 0D 7F 97 D6 |

| DA 57 0F 45 |

| 83 6B 73 FE |

| AB BE 48 B4|

| D7 D2 88 F6 |

| DA 83 AB D7 |

| 57 6B BE D2 |

| 0F 73 48 88 |

| 45 FE B4 F6 |

| 5B C0 D4 EA |

| EA D6 7D 4B |

| F0 CE 12 11 |

| A2 7F 2D 6F |

| 6F F5 5D C6 |

| 63 A5 55 92 |

| 80 17 B0 26 |

| E5 27 D1 12 |

4 | 7F 11 58 A0 |

| 7E E7 19 BD |

| B9 90 FC D9 |

| F3 09 8A DA|

| D2 82 6A E0 |

| F3 94 D4 7A |

| 56 60 B0 35 |

| 0D 01 7E 57 |

| D2 F3 56 0D |

| 82 94 60 01 |

| 6A D4 B0 7E |

| E0 7A 35 57 |

| 4B CE 6A B0 |

| 41 29 06 80 |

| 56 2B 0D 7E |

| 07 5E AC EA |

| 24 D1 8C 4A |

| 94 31 64 F6 |

| 49 5E EE C8 |

| 51 76 A7 B5 |

5 | 25 71 59 C9 | |3F A3 CB DD| | 3F 27 74 CD | | FC E4 2E B2 | | 6E BF 33 79 |

39

| 3D 64 2F 5F |

| CA E9 21 9A|

| 80 AF FA 09 |

| 27 43 15 CF |

| 74 1E FD B8 |

| CD 79 2D 01 |

| A3 43 1E 79 |

| CB 15 FD 2D |

| DD CF B8 01 |

| C4 C2 78 9E |

| D2 A8 BE B4 |

| BA F2 1D 80 |

| 7C 4D 29 DF |

| 9C C2 2C E4 |

| 87 F1 56 E3 |

6 | 1C BB 42 A7|

| D1 9A 09 30 |

| 5F E7 DD 33 |

| 8B 32 8B F5 |

| 9C EA 2C 5C|

| 3E B8 01 04 |

| CF 94 C1 C3 |

| 3D 23 3D E6 |

| 9C 3E CF 3D |

| EA B8 94 23 |

| 2C 01 C1 3D |

| 5C 04 C3 E6 |

| 39 7C F2 BC |

| 57 1D 29 C4 |

| 34 80 82 BC |

| 3A 20 C2 67 |

| E0 5F 6C 15 |

| 15 58 71 AE |

| 8D 4F 63 87 |

| 31 C0 96 75 |

7 | 1D 07 E5 BE |

| 55 47 02 41 |

| 24 DF BE 07 |

| 52 88 FC 2C |

| A4 C5 D9 AE|

| FC A0 77 83 |

| 36 9E AE C5 |

| 00 C4 B0 71 |

| A4 FC 36 00 |

| C5 A0 9E C4 |

| D9 77 AE B0 |

| AE 83 C5 71 |

| 25 3F 6C 00 |

| A2 05 79 23 |

| 9A EE 75 0D |

| 75 C0 A2 8E |

| 24 7B 17 02 |

| 02 5A 2B 85 |

| 10 5F 3C BB |

| 68 A8 3E 4B |

8 | D6 B7 F3 9D |

| 4A B7 E0 3F |

| 39 12 B5 76 |

| 6A 77 2B 4C |

| F6 A9 0D 5E |

| D6 A9 E1 75 |

| 12 C9 D5 38 |

| 02 F5 F1 29

| F6 D6 12 02 |

| A9 A9 C9 F5 |

| 0D E1 D5 F1 |

| 5E 75 38 29 |

| 6F 6B 48 40 |

| 94 94 92 AE |

| B0 86 AA 8E |

| 7A AE 1C 94 |

| F3 88 9F 9D |

| E8 B2 99 1C |

| A3 FC C0 7B |

| 1F B7 89 C2 |

9 | 80 0C B0 25 |

| 5D EF 70 50 |

| 36 FC 10 4F |

| 3B 58 63 29 |

| CD FE E7 3F|

| 4C DF 51 53 |

| 05 B0 CA 84 |

| E2 6A FB A5|

| CD 4C 05 E2 |

| FE DF B0 6A |

| E7 51 CA FB |

| 3F 53 84 A5 |

| B2 32 A0 47 |

| 7F FA 0D 56 |

| E6 8A 53 DE |

| FC CA 21 A4 |

| EF 67 F8 65 |

| C9 7B E2 FE |

| 86 7A BA C1 |

| 41 F6 7F BD |

10 | DB 2C D5 4E|

| 47 2B F9 D5 |

| AA 42 E9 F5 |

| 50 EE 80 40 |

| 54 A2 51 89 |

| 8B 04 3F CD |

| A2 FE A8 26 |

| 8C 04 49 DE |

| 54 8B A2 8C |

| A2 04 FE 04 |

| 51 3F A8 49 |

| 89 CD 26 DE |

| 4F 28 D0 B5 |

| B1 CA 28 D6 |

| FC 86 3C FD |

| 0C FA 85 38 |

40

4.3 Security Analysis: Enhanced Security Advanced Encryption Standard

(ES-AES) Algorithm

The security analysis was based on the following evaluation metrics: used are soundness of

math, randomness of output, Avalanche effect, effect of diffusion.

To balance the tradeoff between efficiency and security we were working on shift row stage of

AES replacing by symmetrical transposition technique. Firs we would like to compared the

existing and proposed techniques as follows:

4.3.1 Comparison of the Existing Shift Rows and Proposed Symmetrical

Transposition based on Randomness of the Output

Example, let the message be considering this values is after Sub Bytes:

Based on section 2.2.1.5 on related work explanation, Shift Row is a circular method that started

from second row to fourth row on state key array. Table. 4.2. Shows Degree of Input and Shift

Row Output Confusion.

Figure 4.1 Shows identical input of shift rows and symmetrical transposition, however distinction output

41

Table 4.2 Degree of Input and Shift Row Output Confusion

Input 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50

Output 41 46 4B 50 45 4A 4F 44 49 4E 4B 48 4D 42 47 4C

Table 4.2 shows the input value 41 move to output value 41, then input value 42 move to output

value 41 and so on.

The Shift Row transformation looks like this:

Table 4.3 The existing shift row transformation

From To

41 45 49 4D 41 45 49 4D

42 46 4A 4E 46 4A 4E 42

43 47 4B 4F 4B 4F 43 47

44 48 4C 50 50 44 48 4C

The output of the shift rows shows 75% randomness, which makes less confusion to compare the

proposed symmetrical transposition.

Based on section 3.3.3 proposed technique explanation, symmetrical transposition could be a

symmetrical method that interchanging the position of non-main diagonal elements that are

symmetrical with relation to the most diagonal and interchanging the position of the most diagonal

elements that are symmetrical with relation to the non-diagonal these symmetrical process could

be better output randomness, that has index value that mapped on to index of key state that ought

to be inserting. Table. 4.4. The array symmetrical transposition value input for symmetrical

movement.

42

Table 4.4 Degree of Input and Symmetrical Transposition Output Confusion

Index 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50

Value 50 45 49 4D 42 4B 4A 4E 43 47 46 4F 44 48 4C 41

Table 4.4 shows the input value 41 move to output value 50, then input value 42 move to index

value 45 and so on.

The Proposed Symmetrical Transposition looks like this:

Table 4.5 The Proposed Symmetrical Transposition

From To

41 45 49 4D 50 42 43 44

42 46 4A 4E 45 4B 47 48

43 47 4B 4F 49 4A 46 4C

44 48 4C 50 4D 4E 4F 41

The output of the proposed symmetrical transposition shows 100% randomness, which makes

better confusion. That the proposed methodology shows better randomness of in the output. Is

shows better security is achieved [1].

4.3.2 Avalanche Effect

Avalanche effect, in cryptography, a property referred to as diffusion reflects cryptographically

strength of associate degree algorithm. If there is small modification in associate degree input

(plaintext or in secret key), the output changes significantly. This is also called avalanche effect.

We have measured Avalanche effect using hamming distance. Hamming distance in information

theory is measure of dissimilarity. We find hamming distance as sum of bit-by-bit xor (exclusive

or) considering ASCII value, as it becomes easy to implement programmatically. A high degree

of diffusion i.e. high avalanche result is desired. Avalanche result reflects performance of

cryptographically algorithm [1].

The avalanche effect formula shows as the follows equation 4.1

43

Avalanche effect% =Number of flipped bits in cipher text

𝑁𝑢𝑚𝑏𝑒𝑟 𝑜𝑓 𝑡𝑜𝑡𝑎𝑙 𝑏𝑖𝑡𝑠 𝑖𝑛 𝑐𝑖𝑝ℎ𝑒𝑟 𝑡𝑒𝑥𝑡∗ 100 ---------------4.1

Where: Number of flipped bits in cipher text is Number of Changed bit in Cipher text

Number of total bits in cipher text is total Number of block size of the algorithm in

the cipher text

Example: Key: 0123456789012345 for all ES-AES, EE-AES, AES and ESE-AES

Table 4.6 Comparison of avalanche effect of ES-AES, EE-AES, AES and ESE-AES algorithms

for the same data size (128-bit)

Plaintext

(Alphabet)

input of AES,

,ES-AES, EE-

AES and ESE-

AES

Cipher text(Hex) of

AES, ES-AES, EE-

AES and ESE-AES

consecutively

Number of bits flipped with Avalanche effect% of

AE

S

ES-

AES

EE-

AES

ESE-

AES

AE

S

ES-

AES

%

EE-

AES

ESE-

AES

ABCDEFGHIJ

KLMNOP(0-

bit change)

| 39 52 BD 72 |

| DD CD FA D7 |

| 33 1A C6 0B |

| F0 4D 26 76 |

66 51.6

| F7 4C D4 B8 |

| 89 3C 44 B3 |

| 6C DA F4 AF |

| B3 39 D7 4E |

77 60.2

| CB 36 78 9F |

| 37 FC BE A3 |

| B1 FC A1 61 |

| 49 6C 35 05 |

62 48.4

44

| CB E5 EE FC |

| 8B B7 3C 47 |

| 86 6B 45 99 |

| 50 02 0E 80 |

54 42.2

ABCDEFGHIJ

KLMNOP (1-

bit change

i.e. A to 1)

| 18 9C 3E F2 |

| 4D 36 35 C9 |

| 63 3A 6F 4C |

| 26 E3 0C 78 |

60 46.9

| 12 33 6F 2E |

| 3C 04 BB 66 |

| E8 A6 94 13 |

| 38 95 EA EE |

71 55.5

| 0E 11 B2 E9 |

| AA D7 C3 26 |

| 47 8A B3 D5 |

| 8C 8E 46 58 |

53 41.4

| 0E 24 E5 37 |

| 03 CB D2 C8 |

| 53 93 C1 CE |

| 28 1B EC 0E |

53 41.4

ABCDEFGHIJ

KLMNOP (2-

bit change

| 5E AC ED DE |

| 0F 5E 6B 08 |

| EA 72 14 0F |

64 50

45

i.e. A to 33) | 62 E3 71 A3

| 76 CE 3A F4 |

| A4 A9 F9 A2 |

| 96 1E 88 94 |

| A0 B2 F9 31 |

79 61.7

| 2F E4 08 5E |

| 63 79 C7 78 |

| 02 8F E2 3D |

| EA 54 9A 78 |

59 46.1

| 2F 3A B3 6C |

| 9B 7B ED 53 |

| A7 A2 0A 1D |

| 5A 93 2C 06 |

65 51

Figure 4:2 Comparison of avalanche effect of proposed ES-AES, EE-AES, ESE-AES and AES

algorithms for the same data size.

0

10

20

30

40

50

60

70

0 bit change 1-bit change 2-bits change

Aval

anch

e ef

fect

%

Number of changed bits in the Input

Avalanche effect% AES Avalanche effect% ES-AES

Avalanche effect% EE-AES Avalanche effect% of ESE-AES

46

Avalanche effect result is extremely necessary characteristic for coding algorithm. This property

seen one bit in plaintext then observance the change within the outcome of a minimum of 1/2 the

bits within the cipher text [1]. Hence in the above graph showed ES-AES and ESE-AES achieved

better avalanche effect respectively compared to EE-AES and AES.

Figure 4.3 Comparison of avalanche effect of AES, ES-AES, EE-AES and ESE-AES algorithms for the

same data size.

4.3.3 Analysis of the Existing and Proposed Algorithm Effects on the

Diffusion Property

In this section we evaluate of diffusion property of the proposed methods (symmetrical

transposition) compared with diffusion of the shift rows of AES. Diffusion property calculated

by using Hamming Distance (HD), wherever the HD could be a range of various symbols

between 2 strings of equal length [15] [16]. In the run time of two previous methods for testing

the change in the cipher value and measured hamming distance between input and output

(current output) for each round. We suggested the message "ABCDEFGHIJKLMNOP" as input

for all methods that consist of 16 char which represent a one block and notice the changing. The

following Table 4.7 showed a change in the cipher value and hamming distance for each round

in the shift rows. Table 4.8 showed a change in the cipher value and hamming distance for each

round in the proposed method (symmetrical transposition).

Example: Key: 0123456789012345

Plain Text: ABCDEFGHIJKLMNOP

51.646.9 49.2

60.255.5

61.7

48.441.4

46.142.2 41.4

51

0 BIT CHANGE 1-BIT CHANGE 2-BITS CHANGE

Ava

lan

che

eff

ect

%

Number of changed bits in the Input

Avalanche effect% AES Avalanche effect% ES-AES Avalanche effect% EE-AES Avalanche effect% of ESE-AES

47

Table 4.7 The Cipher Value and Hamming Distance for the Change Shift Rows Operation.

No,

Rounds

The Change Shift Rows Operation. Hamming

Distance

(bits) Cipher text (Hex)

1 A3 92 21 F3 8F 10 B6 38 21 F3 21 F3 4D 38 21 BC 69

2 CA 58 F1 EF2C 69 42 21 82 D2 F0 E0 4D E2 B0 09 66

3 39 8B 93 A7 E0 14 D7 FD C3 34 E4 49 E9 22 62CA 60

4 A0 42 FC CD CE F0 32 78 9E 6E D8 8A 10 8C 22BB 65

5 89 B5 10 83 74 E1 86 89 15 C4 D9 26 04 FE AC 94 57

6 43 71 C2 80 5E AC 57 84 6D 33 B1 81 F5 61 B4 F4 59

7 61 36 92 0F4A E2 DA 08 F0 32 66 A0 F7 A8 33 42 60

8 9B 1A CD B6 06 27 F4 F8 82 F8 A3 7916 0D 38 BB 66

9 4A8A D9 2E C7A2 DC 03 90 62 B2 EA 60 CFA4 FA 62

10 B6 F5 CA B0 38 E2 FD 06 C8 67 87 B7 29 6E 80 E8 63

48

Example 2: Key: 0123456789012345

Plain Text: ABCDEFGHIJKLMNOP

Table 4.8 The Cipher Value and Hamming Distance (bits) for the Change Symmetrical

Transposition Operation

.

From the results explained in Table 4.7 and Table 4.8, we notice the hamming distance values in

Table 4.8 range from 59 bits to 74 bits, however the hamming distance values in Table 4.7 are

ranged from 57 bits to 71 bits. When shift rows operation changes the position by exchange with

sub operation, it caused less diffusion property. Therefore, the sequence of operations the

proposed symmetrical transposition shows better diffusion.

No, Rounds The Change Symmetrical Transposition Hamming

Distance

(bits) Cipher text (Hex)

1 A3 38 21 38 92 8F F3 21 21 10 21 BC F3 B6 F3 4D 71

2 A7 16 66 83 B4 FF 78 AA 05 65 12 F4 B6 15 E2 64 73

3 2F AB 6A 3E 6D CE 2B 95 1E F0 A9 8B E4 27 53 A2 68

4 9A 5C 63 CD 77 C7 D3 E1 9E E9 7D 27 EA C1 DC 4E 66

5 91 39 8F FA FF 4D E8 3A 80 91 D4 BB D3 CE 20 E6 77

6 60 A5 90 39 06 5E B3 70 AE 40 0E D01E CA AF 05 60

7 58 EE 7D 4A 2C 3B EF BD 1A 21 1E 3C 96 23 5A AC 70

8 EA 53 2C 42 63 02 AB 25 2B CB CD B3 6E 9E AF 1D 59

9 BA 42 E9 8C4F BF C0 55 36 D0 B1 34 B7 3F B0 0E 74

10 51 BC 5C 03 EE 56 0C D8 1A 93 5C 79 8F 3A 58 74 65

49

Figure 4.4 Analysis of the existing shift rows and proposed symmetrical transposition Algorithm

Effects on the Diffusion Property

As we have seen the above line graph, when hamming distance value is increased, the diffusion

of bits in cipher text is increased and this makes our algorithm a more secure encryption

algorithm.

4.4 Performance Analyses: Enhanced Efficiency Advanced Encryption

Standard (EE-AES) algorithm

The analysis is based on metrics: Encryption Speed and Decryption Speed.

Here the performance of our algorithms are compared with AES and MAES algorithms.

4.4.1 Encryption Speed

The Encryption time is one of the vital parameter whereas observing performance of any kind

cipher [18].

Comparison of Encryption time taking average of 1st 5, 2nd 5 and 10 trials (16 byte) of AES, M-

AES, ES-AES, EE-AES and ESE-AES algorithms of 10 trials (16 byte) shows Table:4.9, 4.10

and 4.11.

As it is possible to refer the following Tables, ten trials were taken to test the encryption time of

the proposed algorithm. The reason to take ten trials java run time is that data processing system

of CPU, RAM, and Hard Disk is not constant. In other words, there is time variation among the

first, second and so on trials. In the first trial, it takes longer time than the second and the so on

0

50

100

0 1 2 3 4 5 6 7 8 9 10 11

HA

MM

ING

DIS

TAN

CE

(BIT

S)

NUMBER OF ROUNDS

Hamming Distance(bits)

Shift Rows Symmetrical Transposition

50

trials. This happens due to the text that CPU is unfamiliar with RAM and it also un familiar with

hard disk for the first time. But in the second, third and so on trials, they become familiar each

other and can transfer data with faster manner. As a result, three ways of trials were taken in such

a way that 1st five trials,2nd five trials and 3rd ten trials (the sum of the 1st and 2nd trials) of the

three trials they were took average as a result encryption time of the trials.

Table 4.9 Encryption time taking average of 10 trials (16 byte)

Algorithms Encryption Time Efficiency comparison

Encryption Time (sec) Encryption Time (ms) %

AES 0.4749 474.9 100%

M-AES 0.3865 386.5 118.5%

ES-AES 0.4156 415.6 112.487%

EE-AES 0.3374 337.4 128.953%

ESE-AES 0.37 370 22.09%

Figure 4.5 Encryption time bar graph of taking average of 10 trials (16 byte)

The above bar graph showed comparison of AES, M-AES, ES-AES, EE-AES and ESE-AES

algorithms, as we have seen the encryption time, the proposed method (EE-AES and ESE-AES)

were better performance when compare to the existing AES, ES-AES and MAES.

100.00%

118.50% 112.50%

128.90%122.10%

AES M-AES ES-AES EE-AES ESE-AESEncr

ypti

on

tim

e t

akin

g av

era

ge

of

10

tri

als

(16

byt

e)

in %

Algorithms

51

Table 4.10 Encryption time taking average of 1st 5 trials (16 byte)

Algorithms Encryption Time Efficiency comparison

Encryption Time (sec) Encryption Time (ms) %

AES 0.4936 493.6 100%

ES-AES 0.456 456 107.617%

EE-AES 0.3466 346.6 129.78%

ESE-AES 0.3752 375.2 123.987%

Table 4.11 Encryption time taking average of 2nd 5 trials (16 byte)

Algorithms Encryption Time Efficiency comparison

Encryption Time (sec) Encryption Time (ms) %

AES 0.4936 493.6 100%

ES-AES 0.456 456 108.9%

EE-AES 0.3466 346.6 28.58%

ESE-AES 0.3752 375.2 119.816%

4.4.2 Decryption Speed

Decryption time The time to recover plaintext from cipher text is called decryption time. The

decryption time is desired to be less similar to encryption time to make system responsive and

fast. Decryption time affects performance of system [1] [19]. In our experiment, we have

measured decryption time is milliseconds as follows:

Decryption time: The time to recover plaintext from cipher text is named decipherment time. The

decipherment time is desired to be less almost like encoding time to create system responsive and

52

quick. decipherment time affects performance of system. In our experiment, we've got measured

decipherment time is milliseconds as follows:

Table 4.12 Decryption time taking average of 10 trials (16 byte)

Algorithms Decryption Time Efficiency comparison

Decryption Time (sec) Decryption Time (ms) %

AES 27.579 27579.2 100%

ES-AES 6.836 6835.9 24.9%

EE-AES 4.264 4264.2 15.46 %

ESE-AES 5.6122 5612.2 20.4%

Table 4.13 Decryption Time taking 1st 5 Trials (16 byte)

Algorithms Decryption Time Efficiency comparison

Decryption Time (sec) Decryption Time (ms) %

AES 39.7133 39713.6 100

ES-AES 10.334 10334 26.0%

EE-AES 5.0378 5037.8 12.7%

ESE-AES 5.6696 5669.6 14.4%

Table 4.14 Decryption Time taking 2st 5 Trials (16 byte)

Algorithms Decryption Time Efficiency comparison

Decryption Time (sec) Decryption Time (ms) %

AES 15.4448 15444.8 100

53

ES-AES 3.3378 3337.8 21.6%

EE-AES 3.4906 3490.6 22.6%

ESE-AES 4.5548 4554.8 29.5%

4.4.3 Throughput

The throughput is outlined as variety of bits which will be encoded and decoded throughout one

unit of your time. Thus, in variety of equation the throughput is outlined as: [20].

𝑇𝐻𝑅AES=128/𝑇𝐸𝑁𝐶

𝑇𝐻𝑅𝑃AES=128/𝑇𝐸𝑁𝐶

𝑇𝐻𝑅PST=128/𝑇𝐸𝑁𝐶

𝑇𝐻𝑅𝑃BWRT=128/𝑇𝐸𝑁𝐶

Where, 𝑇𝐻𝑅𝐴ES is representation of throughput for AES algorithm, 𝑇𝐻𝑅𝑃𝐴ES is representation of

throughput for proposed AES algorithm, 𝑇𝐻𝑅PST is representation of throughput for proposed

Symmetrical Transposition algorithm, 𝑇𝐻𝑅𝑃BWRT is representation of throughput for proposed

bitwise reverse transposition algorithm, 𝑇𝐸𝑁𝐶 denotes the time taken to cypher the 128-bit block

message.

Table 4.15 Comparison of throughput at encryption side of AES, ESE-AES, ES-AES and EE-

AES based on ten trails experimental result.

Evaluation matrix AES ESE-AES ES-AES EE-AES

Throughput 269.5 346 308 379.4

% 100% 128.4% 114.3% 140.8%

54

Fig 4.6 shows, throughput for encryption side based on taking average of 10 trials (16 byte)

Figure 4:6 throughputs for encryption side

100114.3

140.8128.4

AES ES-AES EE-AES ESE-AESThro

ugh

pu

t at

en

cryp

tio

n s

ide

(b

ps)

Algorithms

Throughput

55

Chapter 5. Conclusions and Future Work

5.1 Conclusions

To enhance the security and encryption-decryption performance speed AES we have designed

ESE-AES algorithm. ESE-AES algorithm substitutes 2nd and 3rd stages (shift rows and mix

column) of AES with symmetrical transposition and bitwise reverse transposition, respectively.

The symmetrical transposition showed better security measured in metrics: hamming distance,

avalanche effect, diffusion and randomness of the output compared to the existing shift rows of

AES algorithm. For example, it showed that the avalanche effect of our proposed algorithm is

greater than 50% when compared to 49.2% avalanche effect of AES.

The bitwise reverse transposition resulted in better encryption and decryption speed when

compared to the existing mix columns stage of AES algorithm. The experimental result showed

12.48%, 28.953% and 22.9% encryption speed increase by symmetrical transposition, bitwise

reverse transposition and integration of both stages when compared to AES algorithm.

The outcome of the throughput also increased by 114.3% of Symmetrical transposition, 140.8%

of bitwise reverse transposition and 128.4% because of symmetrical transposition, bitwise reverse

transposition and integration of both stages, respectively when compared to AES algorithm.

From this we can conclude that the proposed algorithm showed better security, encryption-

decryption speed and throughput performance than AES algorithm.

5.2 Future Work

As a future work, one can consider testing our algorithm with different bit size and comparing it

with most state-of-the-art algorithms; implementing the algorithm in real environment with

different size of text, image and video.

56

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A

Appendices

Appendix I. Java Code for Symmetrical Transposition

Efficient Java program to find Symmetry of Symmetrical Transpositions’ matrix across diagonal.

public class Symmetrical transpositions {

public static String[][] getSymmtry(String[][] state_plain) {

String[][] symm = new String[4][4];

String temp;

for (int i = 0; i < 4; i++) {

for (int j = 0; j < 4; j++) {

temp = state_plain[i][j];

symm[i][j] = state_plain[j][i];

symm[j][i] = temp;

}

}

return symm;

}

}

Appendix II. For Inverse Symmetrical Transpositions

public class InvSymmetricalTransposions {

public static String[][] getInvSymmtry(String[][] state_plain) {

String[][] invsymm = new String[4][4];

String temp;

for (int j = 0; j < 4; j++) {

for (int i = 0; i < 4; i++) {

B

temp = state_plain[j][i];

invsymm[j][i] = state_plain[i][j];

invsymm[i][j] = temp;

}

}

return invsymm;

}

}

Appendix III. Bitwise Reverse Transposition

Efficient Java program to find reverse of Bitwise Reverse Transposition matrix in each byte.

public class BitRevers {

public static void main (String [] args) {

String [][] mat = {{"30", "31", "32", "33"},

{"34", "35", "36", "37"},

{"38", "39", "0A", "0B",},

{"0C", "0D", "0E", "0F"}};

printMat(mat);

String [][] revmat = getBitReverse(mat);

printMat(revmat);

}

public static String [][] getBitReverse(String[][] mat) {

String [][] rmat = new String[4][4];

for (int i = 0; i < 4; i++) {

for (int j = 0; j < 4; j++) {

byte bytval = getBytHexa(mat[i][j]);

C

byte rbyt = getReverseByte(bytval);

String hexaval = getHexaByt(rbyt);

rmat[i][j]=hexaval;

}

}

return rmat;

}

private static int toDigit(char hexChar) {

int digit = Character.digit(hexChar, 16);

if (digit == -1) {

throw new IllegalArgumentException(

"Invalid Hexadecimal Character: " + hexChar);

}

return digit;

}

private static byte getBytHexa(String rmatelement) {

int firstDigit = toDigit(rmatelement.charAt(0));

int secondDigit = toDigit(rmatelement.charAt(1));

byte b = (byte) ((firstDigit << 4) + secondDigit);

return b;

}

private static byte getReverseByte(byte bytval) {

byte reversebyt = 0;

int intSize = 8;

if ((int) bytval % 2 == 0) {

for (int position = intSize - 1; position >= 0; position--) {

reversebyt += ((bytval & 1) << position);

bytval >>= 1;

D

}

} else {

for (int position = intSize - 1; position >0; position--) {

reversebyt += ((bytval & 1) << position);

bytval >>= 1;

}

}

return reversebyt;

}

private static String getHexaByt(byte rbyt) {

String hexval ;//= Integer.toString(rbyt);

hexval = String.format("%02X ", rbyt);

System.out.println("Hexa value: " + hexval);

return hexval;

}

private static void print Mat (String [][] mat) {

System.out.println("-------------------------------------");

for (int i = 0; i < 4; i++) {

for (int j = 0; j < 4; j++) {

System.out.print(mat[i][j] + "\t");

}

System.out.println();

}

}

}

Appendix iv. Inverse Bitwise Reverse Transposition

package reverse;

public class BitReverseDec {

E

public static void main(String[] args) {

String[][] encryptedMatrix = {{"0C", "8C", "2C", "22"}, {"1C", "6C", "2C", "1C"}, {"4C",

"50", "30", "30"}, {"50", "70", "00", "0C"}};

printMat(encryptedMatrix);

String[][] decrptedMatrix = getBitReverseDec(encryptedMatrix);

printMat(decrptedMatrix);

}

public static String[][] getBitReverseDec(String[][] encrptedMat) {

String[][] decrMatrix = new String[4][4];

for (int i = 0; i < 4; i++) {

for (int j = 0; j < 4; j++) {

byte encypHexa = getHexaByt(encrptedMat[i][j]);

byte decrpByte = getReverseByte(encypHexa);

String decrHexa = getHexaByt(decrpByte);

decrMatrix[i][j]=decrHexa;

}

}

return decrMatrix;

}

private static byte getHexaByt(String rmatelement) {

int hb = Integer.parseInt(rmatelement, 16);

System.out.println("Byte : " + hb);

return (byte) hb;

}

private static byte getReverseByte(byte bytval) {

byte reversebyt = 0;

int intSize = 8;

F

if ((int) bytval % 2 == 0) {

for (int position = intSize - 1; position >= 0; position--) {

reversebyt += ((bytval & 1) << position);

bytval >>= 1;

}

} else {

for (int position = intSize - 1; position > 0; position--) {

reversebyt += ((bytval & 1) << position);

bytval >>= 1;

}

}

System.out.println("Reverse Byte: " + reversebyt);

return reversebyt;

}

private static String getHexaByt(byte rbyt) {

String hexval;//= Integer.toString(rbyt);

hexval = String.format("%02X ", rbyt);

System.out.println("Hexa value : " + hexval);

return hexval;

}

private static void printMat(String[][] mat) {

System.out.println("-------------------------------------");

for (int i = 0; i < 4; i++) {

for (int j = 0; j < 4; j++) {

System.out.print(mat[i][j] + "\t");

}

G

System.out.println();

}

}

}

Appendix v. Weiman, D. [21] ASCII - Binary Character Table.

Table 1. Conversions between ASCII, decimal, hexadecimal, octal, and binary values

ASCII Decimal Hexadecimal Octal Binary

null 0 0 0 0

start of header 1 1 1 1

start of text 2 2 2 10

end of text 3 3 3 11

end of

transmission

4 4 4 100

enquire 5 5 5 101

acknowledge 6 6 6 110

bell 7 7 7 111

backspace 8 8 10 1000

H

Table 1. Conversions between ASCII, decimal, hexadecimal, octal, and binary values

ASCII Decimal Hexadecimal Octal Binary

horizontal tab 9 9 11 1001

linefeed 10 A 12 1010

vertical tab 11 B 13 1011

form feed 12 C 14 1100

carriage return 13 D 15 1101

shift out 14 E 16 1110

shift in 15 F 17 1111

data link escape 16 10 20 10000

device control

1/Xon

17 11 21 10001

device control 2 18 12 22 10010

device control

3/Xoff

19 13 23 10011

device control 4 20 14 24 10100

I

Table 1. Conversions between ASCII, decimal, hexadecimal, octal, and binary values

ASCII Decimal Hexadecimal Octal Binary

negative

acknowledge

21 15 25 10101

synchronous idle 22 16 26 10110

end of

transmission

block

23 17 27 10111

cancel 24 18 30 11000

end of medium 25 19 31 11001

end of file/

substitute

26 1A 32 11010

escape 27 1B 33 11011

file separator 28 1C 34 11100

group separator 29 1D 35 11101

record separator 30 1E 36 11110

unit separator 31 1F 37 11111

space 32 20 40 100000

J

Table 1. Conversions between ASCII, decimal, hexadecimal, octal, and binary values

ASCII Decimal Hexadecimal Octal Binary

! 33 21 41 100001

" 34 22 42 100010

# 35 23 43 100011

$ 36 24 44 100100

% 37 25 45 100101

& 38 26 46 100110

' 39 27 47 100111

( 40 28 50 101000

) 41 29 51 101001

* 42 2A 52 101010

+ 43 2B 53 101011

, 44 2C 54 101100

- 45 2D 55 101101

. 46 2E 56 101110

K

Table 1. Conversions between ASCII, decimal, hexadecimal, octal, and binary values

ASCII Decimal Hexadecimal Octal Binary

/ 47 2F 57 101111

0 48 30 60 110000

1 49 31 61 110001

2 50 32 62 110010

3 51 33 63 110011

4 52 34 64 110100

5 53 35 65 110101

6 54 36 66 110110

7 55 37 67 110111

8 56 38 70 111000

9 57 39 71 111001

: 58 3A 72 111010

; 59 3B 73 111011

< 60 3C 74 111100

L

Table 1. Conversions between ASCII, decimal, hexadecimal, octal, and binary values

ASCII Decimal Hexadecimal Octal Binary

= 61 3D 75 111101

> 62 3E 76 111110

? 63 3F 77 111111

@ 64 40 100 1000000

A 65 41 101 1000001

B 66 42 102 1000010

C 67 43 103 1000011

D 68 44 104 1000100

E 69 45 105 1000101

F 70 46 106 1000110

G 71 47 107 1000111

H 72 48 110 1001000

I 73 49 111 1001001

J 74 4A 112 1001010

M

Table 1. Conversions between ASCII, decimal, hexadecimal, octal, and binary values

ASCII Decimal Hexadecimal Octal Binary

K 75 4B 113 1001011

L 76 4C 114 1001100

M 77 4D 115 1001101

N 78 4E 116 1001110

O 79 4F 117 1001111

P 80 50 120 1010000

Q 81 51 121 1010001

R 82 52 122 1010010

S 83 53 123 1010011

T 84 54 124 1010100

U 85 55 125 1010101

V 86 56 126 1010110

W 87 57 127 1010111

X 88 58 130 1011000

N

Table 1. Conversions between ASCII, decimal, hexadecimal, octal, and binary values

ASCII Decimal Hexadecimal Octal Binary

Y 89 59 131 1011001

Z 90 5A 132 1011010

[ 91 5B 133 1011011

\ 92 5C 134 1011100

] 93 5D 135 1011101

^ 94 5E 136 1011110

_ 95 5F 137 1011111

` 96 60 140 1100000

a 97 61 141 1100001

b 98 62 142 1100010

c 99 63 143 1100011

d 100 64 144 1100100

e 101 65 145 1100101

f 102 66 146 1100110

O

Table 1. Conversions between ASCII, decimal, hexadecimal, octal, and binary values

ASCII Decimal Hexadecimal Octal Binary

g 103 67 147 1100111

h 104 68 150 1101000

i 105 69 151 1101001

j 106 6A 152 1101010

k 107 6B 153 1101011

l 108 6C 154 1101100

m 109 6D 155 1101101

n 110 6E 156 1101110

o 111 6F 157 1101111

p 112 70 160 1110000

q 113 71 161 1110001

r 114 72 162 1110010

s 115 73 163 1110011

t 116 74 164 1110100

P

Table 1. Conversions between ASCII, decimal, hexadecimal, octal, and binary values

ASCII Decimal Hexadecimal Octal Binary

u 117 75 165 1110101

v 118 76 166 1110110

w 119 77 167 1110111

x 120 78 170 1111000

y 121 79 171 1111001

z 122 7A 172 1111010

{ 123 7B 173 1111011

| 124 7C 174 1111100

} 125 7D 175 1111101

~ 126 7E 176 1111110

DEL 127 7F 177 1111111

128 80 200 10000000

129 81 201 10000001

130 82 202 10000010

Q

Table 1. Conversions between ASCII, decimal, hexadecimal, octal, and binary values

ASCII Decimal Hexadecimal Octal Binary

131 83 203 10000011

132 84 204 10000100

133 85 205 10000101

134 86 206 10000110

135 87 207 10000111

136 88 210 10001000

137 89 211 10001001

138 8A 212 10001010

139 8B 213 10001011

140 8C 214 10001100

141 8D 215 10001101

142 8E 216 10001110

143 8F 217 10001111

144 90 220 10010000

R

Table 1. Conversions between ASCII, decimal, hexadecimal, octal, and binary values

ASCII Decimal Hexadecimal Octal Binary

145 91 221 10010001

146 92 222 10010010

147 93 223 10010011

148 94 224 10010100

149 95 225 10010101

150 96 226 10010110

151 97 227 10010111

152 98 230 10011000

153 99 231 10011001

154 9A 232 10011010

155 9B 233 10011011

156 9C 234 10011100

157 9D 235 10011101

158 9E 236 10011110

S

Table 1. Conversions between ASCII, decimal, hexadecimal, octal, and binary values

ASCII Decimal Hexadecimal Octal Binary

159 9F 237 10011111

160 A0 240 10100000

161 A1 241 10100001

162 A2 242 10100010

163 A3 243 10100011

164 A4 244 10100100

165 A5 245 10100101

166 A6 246 10100110

167 A7 247 10100111

168 A8 250 10101000

169 A9 251 10101001

170 AA 252 10101010

171 AB 253 10101011

172 AC 254 10101100

T

Table 1. Conversions between ASCII, decimal, hexadecimal, octal, and binary values

ASCII Decimal Hexadecimal Octal Binary

173 AD 255 10101101

174 AE 256 10101110

175 AF 257 10101111

176 B0 260 10110000

177 B1 261 10110001

178 B2 262 10110010

179 B3 263 10110011

180 B4 264 10110100

181 B5 265 10110101

182 B6 266 10110110

183 B7 267 10110111

184 B8 270 10111000

185 B9 271 10111001

186 BA 272 10111010

U

Table 1. Conversions between ASCII, decimal, hexadecimal, octal, and binary values

ASCII Decimal Hexadecimal Octal Binary

187 BB 273 10111011

188 BC 274 10111100

189 BD 275 10111101

190 BE 276 10111110

191 BF 277 10111111

192 C0 300 11000000

193 C1 301 11000001

194 C2 302 11000010

195 C3 303 11000011

196 C4 304 11000100

197 C5 305 11000101

198 C6 306 11000110

199 C7 307 11000111

200 C8 310 11001000

V

Table 1. Conversions between ASCII, decimal, hexadecimal, octal, and binary values

ASCII Decimal Hexadecimal Octal Binary

201 C9 311 11001001

202 CA 312 11001010

203 CB 313 11001011

204 CC 314 11001100

205 CD 315 11001101

206 CE 316 11001110

207 CF 317 11001111

208 D0 320 11010000

209 D1 321 11010001

210 D2 322 11010010

211 D3 323 11010011

212 D4 324 11010100

213 D5 325 11010101

214 D6 326 11010110

W

Table 1. Conversions between ASCII, decimal, hexadecimal, octal, and binary values

ASCII Decimal Hexadecimal Octal Binary

215 D7 327 11010111

216 D8 330 11011000

217 D9 331 11011001

218 DA 332 11011010

219 DB 333 11011011

220 DC 334 11011100

221 DD 335 11011101

222 DE 336 11011110

223 DF 337 11011111

224 E0 340 11100000

225 E1 341 11100001

226 E2 342 11100010

227 E3 343 11100011

228 E4 344 11100100

X

Table 1. Conversions between ASCII, decimal, hexadecimal, octal, and binary values

ASCII Decimal Hexadecimal Octal Binary

229 E5 345 11100101

230 E6 346 11100110

231 E7 347 11100111

232 E8 350 11101000

233 E9 351 11101001

234 EA 352 11101010

235 EB 353 11101011

236 EC 354 11101100

237 ED 355 11101101

238 EE 356 11101110

239 EF 357 11101111

240 F0 360 11110000

241 F1 361 11110001

242 F2 362 11110010

Y

Table 1. Conversions between ASCII, decimal, hexadecimal, octal, and binary values

ASCII Decimal Hexadecimal Octal Binary

243 F3 363 11110011

244 F4 364 11110100

245 F5 365 11110101

246 F6 366 11110110

247 F7 367 11110111

248 F8 370 11111000

249 F9 371 11111001

250 FA 372 11111010

251 FB 373 11111011

252 FC 374 11111100

253 FD 375 11111101

254 FE 376 11111110

255 FF 377 11111111