Assembly 8051 programming-1

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Microcontroller Programming Mr. S. V. Viraktamath. Faculty, Dept. of E&CE, SDMCET Dharwad.

Transcript of Assembly 8051 programming-1

Microcontroller Programming

Mr. S. V. Viraktamath.

Faculty, Dept. of E&CE,SDMCET Dharwad.

Basic Assembly language programming

• Programming is both science and art• Analogy Writing a fiction

– Involves rules of grammar, spelling…– How the words are arranged (art)

• This subject teach you how to take work from sand (VLSI IC)

• The CPU needs to access data from Internal and external memory and process the data

• CPU uses many instructions to carry out its operations.

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• The instructions that refer to internal memory are executed faster.

• Addressing mode-• The 8051 mnemonics are written with the destination address named first followed by the source address.

• Thee are 28 distinct mnemonics that copy data from source to destination.

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Addressing modes• 3 main types

– MOV destination. Source– PUSH source, POP destination– XCH destination, source

• Following are the four addressing modes– Immediate addressing mode– Register addressing mode– Direct addressing mode– Indirect addressing mode

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REG ContentR0R1R2R3R4R5R6R7

MEM Content25 F826 E427 6728 7829 E230 6931 9132 35

Mov R3,#0F8h

Mov R0,#25hMov A,@R0Mov R4,A

Mov R5, 25

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REG ContentR0R1R2R3 F8R4R5R6R7

MEM Content25 F826 E427 6728 7829 E230 6931 9132 35

Mov R3,#0F8h

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REG ContentR0 25R1R2R3 F8R4R5R6R7

MEM Content25 F826 E427 6728 7829 E230 6931 9132 35

Mov R3,#0F8h

Mov R0,#25h

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REG ContentR0 25R1R2R3 F8R4R5R6R7

MEM Content25 F826 E427 6728 7829 E230 6931 9132 35

Mov R3,#0F8h

Mov R0,#25hMov A,@R0

REG ContentA F8

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REG ContentR0 25R1R2R3 F8R4 F8R5R6R7

MEM Content25 F826 E427 6728 7829 E230 6931 9132 35

Mov R3,#0F8h

Mov R0,#25hMov A,@R0Mov R4,A

REG ContentA F8

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REG ContentR0 25R1R2R3 F8R4 F8R5 F8R6R7

MEM Content25 F826 E427 6728 7829 E230 6931 9132 35

Mov R3,#0F8h

Mov R0,#25hMov A,@R0Mov R4,A

Mov R5, 25

REG ContentA F8

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REG ContentR0R1R2R3R4R5R6R7

MEM Content2526272829303132

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End of stack

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End of PUSH and POP

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• 0 and o looks same to debug - difficult

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Data Exchange Instructions

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Arithmetic Operations

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Instructions

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org 00hmov r0,#11hmov r1,#22hmov r2,#33hmov r4,#44hmov r5,#55hmov a,#00hmov 11,#11hmov 12,#12hmov dptr,#1234inc ainc r0inc 11inc @r1dec r2dec ainc dptr

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3

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• org 00h• mov r0,#11h• mov r1,#22h• mov r2,#33h• mov r4,#44h• mov r5,#55h• mov a,#00h• mov 11,#11h• mov 12,#12h• mov 22,#01h• mov dptr,#1234h• add a,r0• add a,11h• add a, @r1• add a,#11h10/16/22 SDMCET EC SVV-8051 54

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Same but address

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NEW Slide

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NEW SLIDE

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With previous status • add a,#11h• add a,11h• add a,@r1• addc a,r0• subb a,r0• mul ab

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NEW SLIDE

Consider this states

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NEW SLIDE

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Instruction set

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8051 Instruction Format

Op code Direct address

Op code Immediate data

• immediate addressing

add a,#3dh ;machine code=243d

• Direct addressing

mov r3,0E8h ;machine code=ABE8

8051 Instruction Format

Op code n n n

• Register addressing

070D E8 mov a,r0 ;E8 = 1110 1000070E E9 mov a,r1 ;E9 = 1110 1001070F EA mov a,r2 ;EA = 1110 10100710 ED mov a,r5 ;ED = 1110 11010711 EF mov a,r7 ;Ef = 1110 11110712 2F add a,r70713 F8 mov r0,a0714 F9 mov r1,a0715 FA mov r2,a0716 FD mov r5,a0717 FD mov r5,a

8051 Instruction Format

Op code i• Register indirect addressing

mov a, @Ri ; i = 0 or 1

070D E7 mov a,@r1070D 93 movc a,@a+dptr070E 83 movc a,@a+pc070F E0 movx a,@dptr0710 F0 movx @dptr,a0711 F2 movx @r0,a0712 E3 movx a,@r1

Arithmetic InstructionsMnemonic DescriptionADD A, byte add A to byte, put result in AADDC A, byte add with carrySUBB A, byte subtract with borrowINC A increment AINC byte increment byte in memoryINC DPTR increment data pointerDEC A decrement accumulatorDEC byte decrement byteMUL AB multiply accumulator by b registerDIV AB divide accumulator by b registerDA A decimal adjust the accumulator

ADD Instructions

add a, byte ; a a + byteaddc a, byte ; a a + byte + CThese instructions affect 3 bits in PSW:C = 1 if result of add is greater than FFAC = 1 if there is a carry out of bit 3OV = 1 if there is a carry out of bit 7, but not

from bit 6, or visa versa.

Instructions that Affect PSW bits

ADD Examplesmov a, #3Fhadd a, #D3h

• What is the value of the C, AC, OV flags after the second instruction is executed? 0011 1111

1101 0011 0001 0010

C = 1AC = 1OV = 0

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