Vi Dieu Khien Pic 1814

7/31/2019 Vi Dieu Khien Pic 1814

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TRNG S QUAN CHKT THNG TIN

NGUYEN VN TNH

Kho DH12

Hoto di hn AI HC

TAI LIU VI IU KHIN

PIC16F877A

Nm 2008

SI QUAN CHI HUY KI THUT THNG TIN


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LI NI UCho cc ng ch.Mnh tn l nguyn vn tnh l hoc vin tiu on 18 kha H12 .Saunhiu thi gian nghin cu v vi iu khin,v nhn thy l chng ta hc IN TVIN THNG nhng chng ta cha c cc thy dy nhiu v vi iu khin .Chnh viu nn hm nay mnh quyt nh cho xut bn quyn sch v mt loi vi iu khinm n c nhng tnh nng vt tri so vi nhiu dng vi iu khin trcnh:8051,AVR,P89v51. l dng vi iu khin ca hng MICROCHIP .Vi iu khinhin nay cng nh tng lai l c rt nhiu ng dng trong cuc sng,khng chcho nhng ng ch thch nghin cu v t ng ha hay v robocon v..v..V hin ti ldng vi iu khin ny cng cha c a vo dy trong cc trng i hc m a s cctrng ch dy v 8051 v cng cha c ti liu chnh thng no.Nay mnh cho ra i quynsch ny vi mc ch gip chng ta tip cn cng ngh mi ch khng lc hu so vinhng sinh vin bn ngoi.V nhiu l do v kh nng c hn nn qu trnh bin son cnhiu sai st.mong cc ng ch c v cho kin chng ta cng sa cha. Mi thc

mc sin lin h vi mnh NGUYN VN TNHc3/d18/dh12h.Hay qua emailh enlag k a @ y a ho o.c om. DT:0583743625

Nha Trang ,ngay 25 thng 12 nm 2008
mailto:[email protected]:[email protected]:[email protected]


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MUCLUC

CHNG 1 TONGQUAN VE VIIE UKHIE NPIC

1.1 PIC L A G ??1.2 TAISAO L A PIC M A KHONG L A C A CH O VIIEU KHIENKHAC??1.3 KIE NTR U CPIC1.4 RISC V A CISC1.5 PIPELINING1.6 CAC DONGPIC V A CACHLACHONVIIE UKHIE NPIC1.7NGONN G L A PTRNH CHO PIC1.8 MACHNAPPIC1.9 BOOTLOADERV A ICP (In Circuit Programming)

CHNG 2 VIIEU KHIENPIC16F877A

2.1 S O C H A NVIIE UKHIE NPIC16F877A2.2 M O TV A IT H O N GS O VE VIIE UKH IE NPIC16F877A2.3 S O K H O IVIIE UKH IEN PIC16F877A2.4 T O CHCB O N H 2.4.1 B O N H CHNG TRNH2.4.2 B O N H D LIEU2.4.2.1 THANH GHI CH CNA N GA CBI E TSFR2.4.2.2 THANH GHI MUCCH CHUNG GPR

2.4.3 STACK2.5 CAC CONGX UA TNH A PCU APIC16F877A2.5.1 PORTA2.5.2 PORTB2.5.3 PORTC2.5.4 PORTD2.5.5 PORTE2.6 TIMER02.7 TIMER12.8 TIMER22.9 ADC2.10 COMPARATOR2.10.1 B O TAOIENA PSO SANH2.11 CCP2.12 GIAO T I E PN O IT I E P


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1.12.1 USART2.12.1.1 USART B A T O N GB O 2.12.1.1.1 TRUYEND L I E UQUA CHUANGIAO T I E PUSART B A T O N GB O 2.12.1.1.2 N H A ND L I E UQUA CHUANGIAO T I E PUSART B A T O N GB O 2.12.1.1.2 USART O N GB O 2.12.1.2.1 TRUYEND L I E UQUA CHUANGIAO T I E PUSARTONGB O MASTERMODE2.12.1.2.2 N H A ND L I E UQUA CHUANGIAO T I E PUSARTONGB O MASTERMODE2.12.1.2.3 TRUYEND L I E UQUA CHUANGIAO T I E PUSARTONGB O SLAVEMODE2.12.1.2.4 N H A ND L I E UQUA CHUANGIAO T I E PUSARTONGB O SLAVE MODE

2.12.2 MSSP

2.12.2.1 SPI2.12.2.1.1 SPI MASTERMODE2.12.2.1.2 SPI SLAVE MODE2.12.2.2 I2C2.12.2.2.1 I2C SLAVE MODE2.12.2.2.2 I2C MASTERMODE2.13 CONGGIAO T I E PSONG SONG PSP (PARALLEL SLAVE PORT)2.14 TONGQUAN V E M O TS O A CTNH CU ACPU.2.14.1 CONFIGURATION BIT2.14.2 C A C A CTNH C U AOSCILLATOR

2.14.3 C A CC H E O RESET2.14.4NGAT(INTERRUPT)2.14.4.1 NGATINT2.14.4.2 NGATDO STHAY O ITRANGT H A IC A CPIN TRONG PORTB2.14.5 WATCHDOG TIMER(WDT)2.14.6 C H E O SLEEP2.14.6.1 A N HTH CVIIE UKHIEN

CHNG 3 T A PL E N H C U AVIIE UKHIE NPIC

3.1 V A IN E TS LCV E T A PLE N HCU AVIIE UKHIE NPIC3.2 T A PL E N H C U AVIIE UKHIE NPIC3.3 C A UT R U C C U AM O TCHNG TRNH ASSEMBLY VIETCHO VIIE UKHIE NPIC


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CHNG 4 M O TS O N GDUNGCUT H E C U APIC16F877A

4.1IE UKHIE NCACPORT I/O4.1.1 CHNG TRNH DELAY4.1.2 M O TS O N GDUNGV E A CTNH I/O C U AC A CPORT IE UKHIEN4.2 VIIE UKHIE NPIC16F877A V A IC GHI DCH74HC5954.3 PIC16F877A V A LED 7 OAN4.4NGATV A C A UT R U C C U AM O TCHNG TRNHNGAT4.5 TIMERV A N GDUNG4.5.1 TIMERV A HO AT O N GN HTH I

PHULUC1 S O K H O IC A CPORT C U AVIIE UKHIE NPIC16F877APHULUC2 THANH GHI SFR (SPECIAL FUNCTION REGISTER)


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CHNG 1 TONGQUAN V E VI IE UKHIENPIC

1.1 PIC LA G ??

PIC l a v i e t t a t c u aProgramable Intelligent Computer, cothetam dch lamay tnh thongminh khatrnh do hangGenenral Instrument atten cho vi ieu khien autien cuaho:PIC1650 c thietke edunglamcacthietb ngoai vi cho vi ieu khienCP1600. Vi ieukhien naysau oc nghien cuphattrien them va t o hnh thanhnendongvi ieukhienPIC ngaynay.

1.2 TAISAO L A PIC M A KHONGLACACHO VI IEUKH IENKHAC??

Hiennay tren th trng coratnhieu ho vi ieukhien nh 8051, Motorola 68HC, AVR,

ARM,... Ngoaiho 8051 c hngdanmotcachcanban moitrngai hoc, ba ntha nngiviet achon ho vi ieu khienPIC em rong vonkien thcvaphat trien cacngdung trencongcuna yv c a cnguyennhansau:

Hovi ieukhiennaycothetm mua deda ngtai th tr ngVie tNam.Giathanh khongquaat.Coa yuc a ctnh nangcuamotvi ieukhienkhi hoatongoclap.L a m o t s b o sung rattotvekien th ccungnh v e n gdung cho ho vi ieukhien

mang tnhtruyenthong:hovi ieukhien8051.Solng ngisdung ho vi ieukhienPIC. Hiennay tai VietNam cungnh tren

thegii,hovi i e u k h i e n n a y c s dung kharongrai.ieunaytao nhieuthuanlitrongquatrnh tm hieu vaphattrien c a c n gdung nh: solng tailieu, solng cacngdungm ac phattrienthanhcong,dedangtraooi,hoctap,dedangtm c schdankhigapkhokhan,

Shotrcu anhasanxuatvetrnh biendc h, cacco ngcu laptrnh, napchng trnh t n gianenph cta p ,

Cactnh nanga dang cuavi ieukhienPIC, v a c a ctnh nangnaykhongngngcphattrien.

1.3 KIE NTRU CPIC

Ca utrucphan cngcuamotvi ieukhien c thietketheo hai dang kien truc :kien trucVon Neuman vakien t r u cHavard.


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Hnh 1.1: KientrucHavard vakien t r u cVon-Neuman

To chcpha n cngcu aPIC c thietke theo kientrucHavard. iem kh a cbiet giakien

trucHavard v a kientrucVon-Neuman lacautru cb o nh d lie uva bo nhchng trnh.

oivikien trucVon-Neuman, b o n h d lieuv a b o n h chng trnh namchung trong motbo nh,do o tac o t h e t o c h c ,c a n o i m o tca c hlinh hoat bonhchng trnh v a b o n h d l i e u . Tuy n h i e n i e u n a y c h c o y ngha khi t o c o x l cuaCPU pha iratcao, v v icau t r u c o ,trong cungmotthiiem CPU chcothe tng t a c v i b o n h d l ie u h o a c b o n h chng trnh. Nh vay cothe no ikien trucVon-Neuman khong thch hp vicau truc cuamotvi ieukhien.

oiv ikien trucHavard, b o n h d li e u v a b o n h chng trnh tachra thanhhai bo nh

rieng biet.Do o trong cungmotthiiemCPU c o t h e tng t a cv i cahai b o n h ,nh v a ytocoxl cuavi ieukhienc caithienangke.

Motiemca n c h u y n a la tap len h trong kientrucHavard cothec toiu t u ytheo yeucaukientruccuavi ieukhien makhongphu thuocvaocautrucdlieu. V du, oiviviieukhien dong16F, o d a i lenhluonl a 14 bit (trong khi dlieu c tochcthanh tngbyte), conoivikien trucVon-Neuman, o d a i le n h l u o n l a b o i s o c u a1 byte (do dlieuc t o c hc tha nht n gbyte). aciemn aycminh hoacuthetrong hnh 1.1.

1.4 RISC v a CISC

Nh a trnh b a y tren, kien trucHavard la khai niem mihn so vikien truc Von-Neuman. Khainiemnayc hnh thanhnham caitien tocothc thi cuamotvi ieukhien.Qua v i e c t a c h r i b o n h chng trnh v a b o n h d l i e u ,bus chng trnh v a bus dlieu,CPU c o t h e c u n gm o t l u ctruy xuatcabonhchng trnh v a b o n h d li e u , g i u p t a n g t o c o x l cuavi ieukhienlengapoi.ongthicautruclenh khongconphu thu ocvaocautrucdl i e u n amacothelinh ongieuchnhtuytheo khanangvatococuatngvi ieu


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khien. Vaetieptuc caitien to c othc thi lenh, taplenh cu a ho vi ieukhienPIC cthietkesao chochieu daimalenhluonconh (v duoiviho16Fxxxx chieu daimalenhluonla14 bit) v a cho phepthc thi lenhtrong motchu k cuaxung clock ( ngoai trmotsotrnghp acbietnh lenhnha y ,lenhgoi chng trnh con c a n hai chu k xung o n g h o ) . ie u n a y c o ngha taplenhcuavi ieukhienthuoccautrucHavard se t lenhhn, nganhn,n gianhn eapn gyeucauma ho alenhbang mo t solngbit nhatnh.

Vi ieukhien c t o c h c theo kien trucHavard c o n c goi l a vi ieu khien RISC(Reduced Instruction Set Computer) hay vi ieu khien cotaplenh rutgon. Vi ieukhienc thiet ke theo kien truc Von-Neuman co n c goi l a vi ieu khien CISC (ComplexInstruction Set Computer) hay vi ieukhienco taplenhphctap v malenh cu anokhong

pha il a m o ts o co nh maluonl aboi socua8 bit (1byte).

1.5 PIPELINING

aychnh l a c c h e x l lenh cuacacvi ieukhien PIC. Motchu k lenhcuavi ieukhiense bao gom4 xung clock. V du ta sdung oscillator c o ta n s o 4 MHZ, th xung l e n h s e c o t a nso1 MHz (chu k lenhs e l a 1 us). G i a s ta c o motoanchng trnh nh sau:

1. MOVLW 55h2. MOVWF PORTB3. CALL SUB_14. BSF PORTA,BIT35. instruction @ address SUB_1

ayta chbanenqui trnh vi ieu khienxl oan chng trnh trenthongquatngchu klenh.Quatrnh trensecthcthi nh sau:

Hnh 1.2: C chepipelining


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TCY0: oclenh1TCY1: thcthi lenh1, oclenh2TCY2: thcthi lenh2, oclenh3TCY3: thcthi lenh3, oclenh4.TCY4: v lenh4 khongphail a l en h se cthc thi theo qui trnh thc thi cuachng

trnh (lenhtiep theo cthc thi pha ilalen h au tie n ta i label SUB_1) nenchu k thc thilenh naychc dunge oc lenhautientai label SUB_1. Nh v a y c o th e xem lenh3can2 chu k xung clockethcthi.

TCY5: thcthi lenhautiencuaSUB_1 vaoc l e n ht i eptheo cuaSUB_1.Quatrnh naycthchientng t cho caclenhtieptheo cuachng trnh.

Thongthng,e thc thi motlenh, ta canmotchu k lenh e goi lenh o,vamotchu kxung clockna e g i a im a v a thc thi lenh. Vic chepipelining c trnh b a y tren,moilenhxem nh chcthc thi trong motchu k lenh. oivicaclenhma quatrnh thc thi

no la m thayoigiatr

thanh ghi PC (Program Counter) canhai chu k le n hethc thi v pha ithc hienviecgoi lenh a c h thanh ghi PC ch t i .Sau khi a x a c nh ungv tr lenhtrong thanh ghi PC, moilenhchcanmotchu k lenhethcthi xong.

1.6 CA CDO NGPIC V A CACHLACHO NVI IEUKH IE NPIC

Cack hieucuavi ieukhienPIC:PIC12xxxx: odailenh12bitPIC16xxxx: odailenh14bitPIC18xxxx: odailenh16bit

C: PIC co b o n h EPROM ( c h c o 16C84 l a EEPROM)F: PIC c o b o n h flashLF: PIC co b o n h flash hoatong i e na pthapLV: tng t nh LF, a yla k h i e uc u

Bencanh o m o ts o vi i e uk h i e nc o k hieuxxFxxx la EEPROM, n eu co th emc h A c u o ila flash (v du PIC16F877 l a EEPROM, c o nPIC16F877A l a flash).

Ngoa ira concothem m o t d o n gvi ieukhienPIC m ila dsPIC. VietNamph obiennha tlacachovi ieukhienPIC do hangMicrochip sanxuat.

Cachlachon motvi ieukhienPICphu hp:

Trchetcanchuy ensochancuavi ieukhiencanthietcho ngdung.C o nhieuvi ieukhien PIC visolng chan khacnhau, tham ch c o vi ieu khien chco8 chan,ngoaira co n co c a cvi ieukhien28, 40, 44, chan.


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Canchon vi ieukhien PIC c o b o n h flash e c o th e nap xoachng trnh cnhieulanhn.

Tieptheo c a n c h u y encackhoichcnang c tch hp santrong vi ieu khien,cacchuangiaotiepbentrong.

Sau cungcanchuy enbonhchng trnh m a vi ieukhiencho phep.

Ngoa ira moithongtin vecachla chon vi ieukhienPIC cothec tm thaytrongcuonsachSelect PIC guide do nhasanxuatMicrochip cung cap.

1.7 N G O NN G L A PTRNH CHO PIC

Ngo nngla p trnh cho PIC r a ta dang. Ngonnglaptrnh capthap co MPLAB (c cungcapmienph b inhasanxuatMicrochip), cacngon nglaptrnh cap cao hn bao gomC,Basic, Pascal, Ngoa ira c o n c o mot songon nglap trnh c phattrien danhriengcho

PIC nh PICBasic, MikroBasic,

1.8 MACHNAPPIC

a yc u n gla motdongsanphamrata dangdanhcho vi ieukhienPIC. C o t h e s dung cacmach nap c cung capbinhasa nxuat lahangMicrochip nh: PICSTART plus, MPLABICD 2, MPLAB PM 3, PRO MATE II. Cothe dungcacsanpham naye nap cho vi ieukhien khacthongqua chng trnh MPLAB. Dongsanpham chnh thong nay co u t h e l a nap c cho t a t c a c a c vi ieukhien PIC, tuy nhien gia tha n h r a t cao vathnggap ratnhieukhokhantrong quatrnh mua sanpham.

Ng oaira do tnh nangcho phe p nh ieucheonap khacnhau, co n co ra tnhieum ach nap cthietkedanhcho vi ieukhienPIC. Cothe s lcmotsomachnapcho PIC nh sau:

JDM programmer: mach nap naydungchng trnh nap Icprog cho phe pnap c a cviieukhien PIC c o h o t r tnh nang nap chng trnh ien apthap ICSP (In Circuit SerialProgramming). Hauhetcacmach nap e uhotrtnh nangnapchng trnh nay.

WARP-13A v a MCP-USB: hai mach nap naygiong vimach nap PICSTART PLUSdo nhasanxuatMicrochip cung cap,tng thch v itrnh bie ndch MPLAB, ngha l a ta c o

t h e t r c t i e p d u n gchngtrnh MPLAB enap cho vi ieukhienPIC makhongcans dungmotchng trnh nap khac,changhan nhICprog.

P16PRO40: mach nap naydo Nigel t h i e t k e v a c u n gk h a n o i t ien g . O n gco nth ie t k e c achngtrnhnap,tuy nhienta c u n gcothesdungchng trnh napIcprog.


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CHNG 2 VI IEUKHIE NPIC16F877A

2.1 S O CHANVI IEUKH IENPIC16F877A

Hnh 2.1 Vi ieukhienPIC16F877A/PIC16F874A v a ca cdangs o chan


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2.2 M O TV A ITHONGSO V E VI IEUKH IENPIC16F877A

a yla vi ieukhienthuocho PIC16Fxxx vitaplenhgom35 l e n h c oo da i14 bit.Moilenheucthcthi trong motchu k xung clock. T o c o hoat ongtoia cho p h e pla 20 MHz vimotchu k l e n h la 200ns. B o n h chng trnh 8Kx14 bit, b o n h d l ie u 368x8byte RAM v a b o n h d l i eu EEPROM v idung lng 256x8 byte. S o PORT I/O l a 5 v i33pin I/O.

Cacactnh ngoaivi bao gomcackhoichcnangsau:

Timer0: boem8 bit v i b o chia t a nso8bit.Timer1: boe m 16 bit v ib o chia t a n s o ,co thethc hienchcnange mda vao

xung clockngoaivi ngay khi vi ieukhienhoatong ch e o sleep.Timer2: bo em8 bit v ib ochia t anso ,bopostcaler.

Hai b o Capture/so sanh/ieucheorongxung.Cacchuangiao tiepnoi tiepSSP (Synchronous Serial Port), SPI v a I2C.ChuangiaotiepnoitiepUSART v i9 bit ach.Conggiao tiepsong song PSP (Parallel Slave Port) v icac chanieukhienRD, WR,

CS benngoai.

Cacactnh Analog:8 kenhchuyenoiADC 10 bit.Haib o so sanh.

Bencanh o l a m o tv a i actnh khaccuavi ieukhiennh:

Bonhflash vikhanangghi xoac100.000 lan.B o n h EEPROM vikhanangghi xoac1.000.000 lan.D l i eub o n h EEPROM cothelu trtren40 nam.Khanangt napchng trnh visieukhiencuaphanmem.Nap c chng trnh ngay trenmach ienICSP (In Circuit Serial Programming)

thongqua 2 chan.Watchdog Timerv i b o dao ongtrong.Chcnangbaomatmachng trnh. Che

o Sleep.C othe hoa t o ngv inhieudangOscillatorkhacnhau.


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2.3 S O K H O IVIIE UKHIENPIC16F877A

Hnh 2.2 S okhoivi ieukhienPIC16F877A.


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2.4 T O CHCB O N H

Cautrucbon hcuavi ieukhienPIC16F877A bao gombo nhchng trnh (Programmemory) v a b o nhdl ieu(Data Memory).

2.4.1 B O N H CHNG TRNH

B o n h chng trnh cua vi ieu khienPIC16F877A l a b o n h flash, dung lngb o n h 8Kword (1 word = 14 bit) vac phanthanh nhieu trang ( t page0 enpage 3) .Nh vay bonh chng trnh co khana ngchac 8*1024 = 8192 lenh (v motlenhsau khi m a h o a s e co dung lng 1 word (14

bit).

em aho ac a chcu a8K wordbo nh chng trnh, bo e mchng trnh c o dung lng13 bit (PC).

Khi vi ieukhienc reset, b o emchng trnh sechena ch0000h (Resetvector). Khi c o n g a t x a yra, bo e m chngtrnh s e c h en a c h 0004h (Interrupt

vector).

B o n h chng trnh khongbao gomb o nhstack vakhong c a c h h o ab ib o em chng trnh. B o n h stack s e cecapcuthetrongphansau. Hnh 2.3 B o n h chng trnh PIC16F877A2.4.2 B O N H D LIEU

B o n h d l ie u c u a PIC l a b o n h EEPROM c chia ra lam nhieu bank. o i v iPIC16F877A b o nhdlieuc chia ra lam4 bank. Moibank c o dung lng 128 byte, baogom cacthanh ghi c o c h cnang acbietSFG (Special Function Register) nam cacvunga c h t h a p v a c a cthanh ghi muc ch chung GPR(General Purpose Register) nam vunga chconlai trong bank. Cacthanh ghi SFR thngxuyen c s dung (v du nh thanhghi STATUS) s e c a t t a t c a c a cbank cuabonh dlieu giupthuan tien trong quatrnh truy xuat valam giam btlenh cuachng trnh. S o c u t he c u a b o n h d l i e uPIC16F877A nh sau:


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Hnh 2.4 S obonhdl ieuPIC16F877A


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2.4.2.1 THANH GHI CHCNA NGA CBIE TSFR

a y l a c a cthanh ghi c sdung biCPU hoacc dungethiet lapvaieu khien cackhoichcnang c tch hp bentrong vi ieu khien. Cothephan thanh ghi SFR lamhailoai: thanh ghi SFR lienquan encacchcnangbe n trong (CPU) v a thanh ghi SRF d u n g e th i e t l ap v a ieu k h i e n ca ck h o ich cnangbenngoai(v du nh ADC, PWM, ).Phannayseecapencacthanh ghi lienquan encacchcnangbentrong. Cacthanh ghi dungethietlapvaieukhien cackhoichcnang sec nha cenkhi ta ecapencackhoichcnango.Chi tietvecacthanh ghi SFRsec lietkecuthetrongbangphu lu c2.

Thanh ghi STATUS (03h, 83h, 103h, 183h):thanh ghi chaketquathc hien pheptoancuakhoiALU, trang thaireset v a c a cbit chonbankcantruy xuattrong b o n h d lieu.

Thanh ghi OPTION_REG (81h, 181h): thanh ghi naychop h e p o c v a ghi, chophepieu khien chcnangpull-up cuacacchantrong PORTB, xaclapcactham s o v exung taco ng,canh tacongcuangat ngoaivi vaboem Timer0.

Thanh ghi INTCON (0Bh, 8Bh,10Bh, 18Bh):thanh ghi cho p h e p o c v a ghi, chacacbit ieukhien v a c a cbit c h ie u khi timer0 b tran,ng atngoa i vi RB0/INT v a n g a tinterrput-on-change ta icacchancuaPORTB.

Thanh ghi PIE1 (8Ch): chacacbit ieukhienchi tietcacnga t cuacackhoichcnangngoaivi.

Thanh ghi PIR1 (0Ch) chacngatcuacackhoichcnangngoai vi, cacngatnayccho phepb ic a cbit ieukhie nchatrong thanh ghi PIE1.

Thanh ghi PIE2 (8Dh): chacacbit ieukhienc a c ngat cuacackhoi chcnangCCP2, SSP bus, ngatcuaboso sanhvangatghi va obo nhEEPROM.


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Thanh ghi PIR2 (0Dh): c h acaccnga tc u aca ckhoichcnangngoaivi, cacngatnayc choph e p bicacbit ieukhienchatrong thanh ghi PIE2.

Thanh ghi PCON (8Eh): c h ac a c c hieu chobie ttrang thaicaccheoreset cuaviieukhien.

2.4.2.2 THANH GHIMUC

CH CHUNGGPR

Cacthanh ghi n a y c o thec truy xuattrctiephoacgiantiepthong qua thanh ghiFSG (File Select Register). a y l a c a cthanh ghi d lieu thongthng,ngis dung co t h et u ytheo mucch chng trnh m a c o t h e d u n g c a cthanh ghi nayechacacbienso,hangso,ketquahoaccactham sophucvucho chngtrnh.

2.4.3 STACK

Stack khongnam trong b o n h chng trnh hay b o n h d l ie u m a la m o t v u n g n h

acb ie tkhong cho phepoc hay ghi. Khi lenhCALL cthchienhay khi motngatxayralamchng trnh b renha nh,giatrcuaboem chng trnh PC t ongc vi ieukhiencatvaotrong stack. Khi mottrong c a clenh RETURN, RETLW hat RETFIE cthc thi, giatr PC setong clayra t trong stack, vi ieukhiense thchien tiepchng trnh theoungqui trnh nhtrc.

B o n h Stack trong vi ieukhienPIC ho 16F87xA c o khanangchac 8 a c h v a hoat ongtheo c chexoay vong.Ngha l a gia t r c a tv a o b o n h Stack l a n t h 9 s e ghi e l e n g i a t r c a t v a oStack lanautien v a g i a t r c a t v a o b o n h Stack la n t h 10 se ghi e l e ng i a tri6 catvaoStack lan th2.

Canchuy l a khongc o c hieunaocho bie ttra ng t h a i stack, do o ta khongbietckhi naostack tran.Bencanh o ta p lenh cuavi ieukhien dongPIC cung khong colenhPOP hay PUSH, c a cthao t acvibonhstacksehoantoancieukhienbiCPU.


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2.5 C A CCO N GXUATNHAPCU APIC16F877A

Congxuatnhap(I/O port) chnh l a phng tien mavi ieukhien dunge tng t a cvi thegiibenng oa i.S tng t a c n a y r a t a dang vathong qua quatrnh tng taco,chcnangcuavi ieukhien cthehienmotcachr o rang.

Motcongxuatnhapcuavi ieukhienbao gomnhieuchan(I/O pin), t u ytheo cachbotrv a chcnangcuavi ieukhienmasolng congxuatnha pvasolng ch antrong moicongcothekhac nhau. Ben canh o ,do vi ieukhienc tch hp sa nbe n trong cacactnhgiao tiepngoai vi nenbencanh chc nangl a congxuatnhap thongthng,motsoc h a n x u a tn h a p co n co th em ca cch cn an g k h a c e t h e h i e n s t a cong cuacacactnh ngoai vi neutrenoivithegiibenngoai. Chcnangcuatngchanxuatnhap trong moicongh o a n t o a nc o thec xaclapvaieukhienc thongqua c a cthanh ghi SFRlienquan enchanxuatnhapo.

Vi ieukhienPIC16F877A c o 5 congxua t

nhap,bao gomPORTA, PORTB, PORTC,PORTD v a PORTE. Cautrucva chcnang cuatngcong xuat nhap sec ecapcu thetrongphansau.

2.5.1 PORTA

PORTA (RPA) bao gom 6 I/O pin. a y la c ac chanhai chieu (bidirectional pin),ngha l a c o thex u a t v anha pc.Chcnang I/O nayc ieukhienb ithanh ghi TRISA(a ch85h). Muon xaclapchcnangcua motchantrong PORTA l a input, ta set bit ieukhien tng n g v ich an o trong thanh ghi TRISA vangc lai, muonxaclapchcnang

cuamotchantrong PORTA l a output, ta clear bit ieukhien tng n g v ich an o trongthanh ghi TRISA. Thao tacnayhoan toantng t o i v i c a cPORT v a c a cthanh ghi ieukhientng ngTRIS (oiv iPORTA l a TRISA, o i v iPORTB l a TRISB, o i v iPORTC l a TRISC, o i v iPORTD l a TRISD v a o iv iPORTE l a TRISE). Bencanh oPORTA co n l an g o ra c u ab o ADC, b o so sanh,ngovaoanalog ngovaoxung clock cuaTimer0 va ngova oc ua bogiao tiepMSSP (Master Synchronous Serial Port). a ctnh na ysec trnh ba ycu th etrongphansau.

Cautrucbentrong vachcnangcu thecuatngchantrong PORTA sec trnhbaycu thetrong Phuluc1.

Cacthanh ghi SFRlienquan enPORTA bao gom:

PORTA (ach05h) : ch agia trca cpin trong PORTA.TRISA (ach85h) : ieukhienxuatnhap.CMCON (ach9Ch) : thanh ghi ieukhienboso sanh.CVRCON (a c h 9Dh) : thanh ghi ieukhienboso sanhienap.


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ADCON1 (ach9Fh) : thanh ghi ieukhienboADC.Chi tietvecacthanh ghi sec trnh ba ycu thetrongphu lu c2.

2.5.2 PORTB

PORTB (RPB) gom 8 pin I/O. Thanh ghi ieukhienxuatnhap tng n g la TRISB.Bencanh omotsochancuaPORTB conc s dung trong quatrnh nap chng trnh chovi ieu khien vicaccheo napkhacnhau. PORTB conlienquan enngatngoai vi v a b o Timer0. PORTB conc tch hpchcnang ientrkeolenc ieukh ienb ichngtrnh.

Cautrucbentrong vachcnangcuthecuatngchantrong PORTB sec trnh baycuthetrong Phuluc1.Cacthanh ghi SFRlienquan enPORTB bao gom:

PORTB (ach06h,106h) : ch agia t rcacpin trong PORTB

TRISB (ach86h,186h) : ieukhienxuatnhapOPTION_REG (ach81h,181h) : ieukhienngatngoaivi v a b o Timer0.Chi tietv e c a cthanh ghi sec trnhba ycu thetrongphu lu c2.

2.5.3 PORTC

PORTC (RPC) gom 8 pin I/O. Thanh ghi ieukhienxuatnhap tng n g la TRISC.Bencanh o PORTC conchacacchan chcnang cuaboso sanh,boTimer1, b o PWM v a c a cchuangiao tiepnoitiepI2C, SPI, SSP, USART.

Cautrucbentrong vachcnangcuthecuatngchantrong PORTC sec trnh bay

cuthetrong Phuluc1.Cacthanh ghi ieukhienlienquan enPORTC:PORTC (ach07h) : ch agia trcacpin trong PORTCTRISC (ach87h) : ieukhienxuatnhap.

Chi tietvecacthanh ghi sec trnh ba ycu thetrongphu lu c2.

2.5.4 PORTD

PORTD (RPD) gom8 chanI/O, thanh ghi ieu khienxuatnhaptng n gla TRISD.PORTD c o nla c o n gx u a td lieucuachuangiao tiepPSP (Parallel Slave Port).

Cautrucbentrong vachcnangcuthecuatngchantrong PORTD se ctrnh baycuthetrong Phuluc1.

Cacthanh ghi lienquan enPORTD bao gom:Thanh ghi PORTD : ch agia trcacpin trong PORTD.Thanh ghi TRISD : ieukhienxuatnhap.Thanh ghi TRISE : ieukhienxuatnhapPORTE v a chuangiao tiepPSP.

Chi tietvec a cthanh ghi sec trnh ba ycu thetrong phu luc2.


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2.5.5 PORTEPORTE (RPE) gom3 chanI/O. Thanh ghi ieukhienxuatnhaptng n g la TRISE.

Cacchan cuaPORTE c o n g o v a o analog. Bencanh o PORTE c o nla cacchanieukhiencuachuangiao tiepPSP.

Cautrucbentrong v a chcnangcuthecua tngchantrong PORTE se ctrnh ba ycuthetrong Phuluc1.Cacthanh ghi lienquan enPORTE bao gom:

PORTE : chagiatr cacchantrong PORTE.TRISE : ieukhienxuatnhapvaxaclapcacthongso cho chuangiao tiep PSP.ADCON1 : thanh ghi ieukhienkhoiADC.


2.6 TIMER 0

a yl a m o ttrong baboemhoacbonh th icuavi ieukhienPIC16F877A. Timer0 la b o e m 8 bit c ketnoivibochia t a n s o (prescaler) 8 bit. Cau truccuaTimer0 chophepta la chon xung clock t a c ongvacanh tch cccuaxung clock. NgatTimer0 s e x u a thien khi Timer0 b tran. Bit TMR0IE (INTCON) l a bit ieu khien cua Timer0.TMR0IE=1 cho ph ep ng atTimer0 tacong, TMR0IF= 0 khong cho ph e png a tTimer0 tacong.S okhoicuaTimer0 nh sau:

Hnh 2.5 S okhoicuaTimer0.


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MuonTimer0 hoat ong c h e o Timer ta clear bit TOSC (OPTION_REG), khiogiat r thanh ghi TMR0 se tan g theo tngchu k xung ongho(tansovaoTimer0 bangt a n s o oscillator). Khi g i a tr thanh ghi TMR0 t FFh t r v e 00h, ngatTimer0 sexuat hien.Thanh ghi TMR0 cho phepghi v a x o ac giupta a nnh thi iemnga tTimer0 xuathienmotcachlinh ong.

MuonTimer0 hoat ong c h e o counter ta set bit TOSC (OPTION_REG). Khi o xung t a conglenboemc layt c h a n RA4/TOCK1. Bit TOSE (OPTION_REG)cho phe pla chon ca nh tacongvaobotem.Canh tacongse l a canhlenneuTOSE=0 v a canh t a c o n gselacanhxuongneuTOSE=1.

Khi thanh ghi TMR0 b tra n,bit TMR0IF (INTCON) sec set. aychnh l a c ngat cua Timer0. Cngat nayphaic xoabang chng trnh trckhi bo e m ba ta uthc hienlai qua

trnh

em.NgatTimer0

khongtheanhthcvi ieukhien tche o

sleep.B o chia t a n s o (prescaler) c chia s e g i aTimer0 v a WDT (Watchdog Timer). ie u

o c o ngha l a neuprescaler c s dung cho Timer0 th WDT sekhongcoc hotrcuaprescaler v a ngc lai. Prescaler c ieu khien bithanh ghi OPTION_REG. Bit PSA(OPTION_REG) xac nh oi tng t a c ong cua prescaler. Cac bit PS2:PS0(OPTION_REG) xac nh t s o chia ta n so cua prescaler. Xem lai thanh ghiOPTION_REG exacnhlaimotcachchi tietvecacbit ieukhientren.

Caclenhtac onglengiatr thanh ghi TMR0 sexoacheo hoatong cuaprescaler.Khi oitng t a c o n g l a Timer0, taco ng len giatr thanh ghi TMR0 s e x o aprescaler

nhng khonglamthay oioitng tacongcuaprescaler. Khi oi tngtacongl a WDT,lenhCLRWDT s e x o aprescaler, ongthiprescaler s e ngng tacvuhotrcho WDT.

Cacthanh ghi ieukhienlienquan enTimer0 bao gom:TMR0 (ach01h, 101h) : ch agiatr e mcuaTimer0.INTCON (a ch0Bh, 8Bh, 10Bh, 18Bh): cho phe pnga thoat ong(GIE v a PEIE).OPTION_REG (ach81h, 181h): ieukhienprescaler.


2.7 TIMER1

Timer1 l a b o nh thi16 bit, giatr cu a Timer1 s e c lu trong hai thanh ghi(TMR1H:TMR1L). C ngat cua Timer1 l a bit TMR1IF (PIR1). Bit ieu khien cuaTimer1 s e l a TMR1IE (PIE).

Tng t nh Timer0, Timer1 c u n gc o hai cheohoat ong:cheonh thi(timer)v ixung kch l a xung clock cuaoscillator (tan so cuatimerbang t a n s o c u aoscillator) vacheoem(counter) v ixung kch l a xungpha nanhcacskiencanemlayt benngoai


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thongqua chanRC0/T1OSO/T1CKI (canh t a c o n g l a canh len).Viec la chon xung tacong (tng ngviviec la chon cheohoat o n g l a timer hay counter) c ieu khien

b ibit TMR1CS (T1CON). Sau a yla s okhoicuaTimer1:

Hnh 2.6 S okhoicuaTimer1.Ngoa ira Timer1 concochc nang reset input ben trong c ieu khien bimot

trong hai khoiCCP (Capture/Compare/PWM).Khi bit T1OSCEN (T1CON) c set, Timer1 s e l a y xung clock t hai chan

RC1/T1OSI/CCP2 v a RC0/T1OSO/T1CKI lam xung em. Timer1 sebatau em sau canhxuong au tiencua xung ngo vao. Khi o PORTC s e b o qua s tac ong cua hai bitTRISC v a PORTC c gangiatr 0. Khi clear bit T1OSCEN Timer1 se l a y xung e mt oscillatorhoact chanRC0/T1OSO/T1CKI.

Timer1 c o hai c h e o e m l a o n gb o (Synchronous) v a b a t o n gb o (Asynchronous).

Cheoem cquyetnh bibit ieukhien (T1CON).Khi =1 xung e m la y tbe nng oa isekhongc ongbohoavixung clock

ben trong, Timer1 s e tieptucquatrnh emkhi vi ieukhienang c h e o sleep v a n g a tdoTimer1 tao ra khi b tr a nc o k h a nang a n hthcvi ieukhien. cheoembatongbo,Timer1 khong the c s dung e lam nguon xung clock cho khoi CCP(Capture/Compare/Pulse width modulation).

Khi =0 xung emvaoTimer1 sec o ngboh o av ixung clockbe ntrong. cheonayTimer1 sekhonghoat ongkhi vi ieukhienang ch e o sleep.Cacthanh ghilienquan enTimer1 bao gom:

INTCON (a ch0Bh, 8Bh, 10Bh, 18Bh): cho phe pnga thoat ong(GIE v a PEIE).

PIR1 (ach0Ch): c h ac nga tTimer1 (TMR1IF).PIE1( ach8Ch): chophepng a tTimer1 (TMR1IE).TMR1L (a ch0Eh): chagiatr 8 bit thapcuaboemTimer1.TMR1H (ach0Eh): chagiatr 8 bit cao cuaboem Timer1.T1CON (a c h 10h):xaclapcacthongso cho Timer1.



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2.8 TIMER2

Timer2 l a b o nh thi 8 bit v a c h o tr b i hai b o chia t a n s o prescaler vapostscaler. Thanh ghi cha giatr em cuaTimer2 l a TMR2. Bit cho phe p ng a tTimer2 t a c o n g l a TMR2ON (T2CON). Cngat cuaTimer2 l a bit TMR2IF (PIR1). Xung ngovao(tansobang t a n so oscillator) ca qua b o chia t a n so prescaler 4 bit ( v ic a ct so chia t a n s o la 1:1, 1:4 hoac 1:16 va c ieu khien bicacbit T2CKPS1:T2CKPS0(T2CON)).

Hnh 2.7 S okhoiTimer2.

Timer2 con c hotrb ithanh ghi PR2. Gia tr emtrong thanh ghi TMR2 s e t an gt

00h en giatr chatrong thanh ghi PR2, sau oc reset v e 00h. Kh I reset thanh ghi PR2 c nha ngiatr ma cnh FFh.

Ngora cuaTimer2 ca qua b o chia t a nsopostscaler vicacmcchia t 1:1 en1:16. Postscaler c ieu khien bi4 bit T2OUTPS3:T2OUTPS0. Ngora cuapostscalerongvai t r o quyetnhtrong viecieukhienc ngat.

Ngoa ira ngora cuaTimer2 conc ketnoivikhoi SSP, do o Timer2 conongvai trotaora xung clockong bocho khoigiao tiepSSP.

Cacthanh ghi lienquan enTimer2 bao gom:INTCON (ach0Bh, 8Bh, 10Bh, 18Bh): chophe p to a nbocacnga t(GIE v a PEIE).PIR1 (ach0Ch): c h ac nga tTimer2 (TMR2IF).PIE1 (a ch8Ch): chabit ieukhienTimer2 (TMR2IE).TMR2(ac h 11h): ch agiatr e mcuaTimer2.T2CON (a c h 12h): xaclapcacthongso cho Timer2.


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PR2 (ach92h): thanh ghi hotrcho Timer2.


Ta c o motvai nhanxetve Timer0, Timer1 v a Timer2 nh sau:

Timer0 v a Timer2 l a b o e m 8 bit (giatr emtoia l a FFh), trong khi Timer1 l a b o e m 16 bit (g ia tr e mtoia l a FFFFh).

Timer0, Timer1 v a Timer2 e u c o hai che o hoat o n g l a timer v a counter. Xungclockco tansobang t a nso c uaoscillator.

Xung tacong lenTimer0 c hotr biprescaler vacothec thiet lap nhieucheokhacnhau (tansotacong,canh tacong)trong khi cacthongsocuaxung taconglenTimer1 laconh. Timer2c hotr bihai b o chia t a n s o prescaler v a postcaler oclap,tuy nhiencanh tacongva ncconh lacanhlen.

Timer1 c o quan hevi khoiCCP, trong khi Timer2 c k etno iv ikho iSSP.

Motvaisosanhsegiupta dedanglachoncTimer thch hpcho ngdung.

2.9ADC

ADC (Analog to Digital Converter) l a b o chuyen oitn hieugiahai dang tng t v aso .PIC16F877A c o 8ngovaoanalog (RA4:RA0 v a RE2:RE0). HieuienthechuanVREF c o t h e c l ac h o n l a VDD, VSS hayhieuienthechuan c xaclaptrenhai chanRA2 v a RA3.Ketquachuyen oit tn tieu tng t sang tn h i e u s o l a10 bit s o tng ngvac lutrong hai thanh ghi ADRESH:ADRESL. Khi khong sdung b o chuyen oiADC, c a cthanh

ghi naycothec sdung nh c a cthanh ghi thongthngkhac.Khi quatrnhchuyen oihoan ta t , k e t q u a s e c lu vao hai thanh ghi ADRESH:ADRESL, bit

(ADCON0) c xoave0 v a c n g a tADIF cset.

Qui trnh chuyenoit tng t sang s o bao gomcacbcsau:1. Thietlapcacthongso cho b o chuyenoiADC:

Chonngovaoanalog, c h o n i e na pm au(da trencactho ngsocuathanh ghiADCON1)

Chonh kenhchuyenoiAD (thanh ghi ADCON0).Chonhxung clock cho kenhchuyenoiAD (thanh ghi ADCON0).

Cho phep b o chuyenoiAD hoatong(thanh ghi ADCON0).2. Thietl apcaccnga tcho b o AD

Clearbit ADIF.Set bit ADIE.Set bit PEIE.Set bit GIE.


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3.icho t ikhi quatrnh laymauhoantat.

4. Batauquatrnh chuyenoi(set bit ).5.icho t ikhi quatrnh chuyenoihoantatbangcach:

Kiemtra bit .Neu =0, quatrnh chuyenoiahoanta t .K i e m tra c ngat.

6.ock etquachu yeno ivaxoacnga t ,set bit (neucantiep tucchuyenoi).

7. Tieptucthchiencacbc1 v a 2 cho quatrnh chuyenoitieptheo.

Hnh 2.8 S o k h o ib o chuyenoiADC.

Canchuy l a c o hai cachlu ketquachuyeno iAD, viecla choncachlu cieukhienb ibit ADFM v a cminh hoacuthetrong hnh sau:


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Hnh 2.9 Caccachlu ketquachuyenoiAD.

Cacthanh ghi lienquan enbochuyenoiADC bao gom:

INTCON (a ch0Bh, 8Bh, 10Bh, 18Bh): cho ph e pca cnga t(cacbit GIE, PEIE).PIR1 (ach0Ch): c h ac nga tAD (bit ADIF).PIE1 (ach8Ch): chabit ieukhienAD (ADIE).ADRESH (a ch1Eh) v a ADRESL (ach 9Eh): c a cthanh ghi chaketquachuyen

oiAD.ADCON0 (a c h 1Fh) v a ADCON1 (a c h 9Fh): xac lap cac thong so cho b o

chuyenoiAD.PORTA (a c h 05h) v a TRISA (a ch 85h): lienquan en cacngovaoanalog

PORTA.PORTE (a c h 09h) v a TRISE (a ch 89h): lienquan en cacngovaoanalog

PORTE.

Chi tietvecacthanh ghi sec trnh b a yc u t h e phu luc2.

2.10 COMPARATOR

B o so sanhbao gomhai b o so so sanhtn hieuanalog vac at PORTA. N g o va ob o so sanhl a c a cchanRA3:RA0, ngora l a hai chanRA4 v a RA5. Thanh ghi ieukhienboso

s a n h l a CMCON. Ca cbit CM2:CM0 trong thanh ghi CMCON ongvai trochon la caccheohoat o ngcho b o Comparator (hnh2.10).

C chehoat ong cuaboComparator nh sau:


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Tn hieu analog chanVIN + s e c sosanh viien apchuan chanVIN- v a tnhieu ngorab o so sanhse thay oitng ngnh hnh v e .Khi ien ap chanVIN+ l nhn iena p chanVIN+ ngoras e mc1 v a ngclai.

Davaohnh v e ta thayapngtaingora khong phailatcthiso v ithay oitaingovaomacanc o motkhoangthigian nhatnh engora thay oi trangthai(toia l a 10us). Canchuy enkhoangthigianapngnaykhi s dung boso sanh.

Cctnh cuacacboso s a n hcothethay oida va ocacgia tr atvaocacbit C2INVv a C1INV (CMCON).

Hnh 2.10Nguyenl hoat ong cuamotboso sanhn gian.


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Cacthanh ghi lienquan enboso sanhbao gom:CMCON (a c h 9Ch) v a CVRCON (a c h 9Dh): xaclapcacthong socho b o so

sanh.

Thanh ghi INTCON (a c h 0Bh, 8Bh, 10Bh, 18Bh): chacacbit cho ph epcacngat(GIE v a PEIE).

Thanh ghi PIR2 (ach0Dh): c h ac nga tc ua boso sanh(CMIF).Thanh ghi PIE2 (ach8Dh): chabit chophe p boso sanh(CNIE).Thanh ghi PORTA (a c h 05h) v a TRISA (a c h 85h): c a cthanh ghi ieukhien

PORTA.Chi tietvecacthanh ghi sec trnh ba ycu thetrongphu lu c2.

2.10.1 B O TAOIENA PSO SANH

B o so sanhnaychhoat ongkhi b o Comparator c nh dang hoat ong c h e o 110.Khi o c a cpin RA0/AN0 v a RA1/AN1 (khi CIS = 0) hoacpin RA3/AN3 v a RA2/AN2 (khiCIS = 1) s e l a n g o v a oanalog cuaienapcanso sanha vaongoVIN- cua2 b o so sanhC1 v a C2 (xem chi t i e t hnh 2.10). Trong khi o ien a pa vaongoVIN+ sec layt m o t b o t a o i e n a pso sanh.S o k h o ic u a b o ta oiena pso sanhc trnh baytrong hnh v e sau:

Hnh 2.12 S o k h o ib o ta o i e na pso sanh.Botao ien apso sanhnaybao gommotthang ien tr16 mcongvai t r o l a ca up h a n a pchia nhoien a pVDD thanhnhieumckhacnhau (16 mc).Moimccogiatrienapkhacnhau tuythuocvaobit ieukhien CVRR (CVRCON). NeuCVRR mclogic 1, ientr8Rsekhongcotacdungnh motthanhphancu acauphana p(BJT danmanh v a d o n gien


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khongi qua ien tr8R), khi o 1 m c i e n a p c o g i a t r VDD/24. Ngc lai khi CVRR mclogic 0,dongien se qua ien tr8Rv a 1 m c i e n a p co g ia t r VDD/32. C a c m c i e napnayc a qua b o MUX chophepta c h o n c i e na pa rapinRA2/AN2/VREF-/CVREF e a vaongoVIN+ c u ab o so sa n hbang cach a cacgiatr thchhpvaocacbit CVR3:CVR0.

Botao ien apso s a n hn a y co th exem nh motbochuyen oiD/A n gian.Giatr ien a p cansosanh n g o v a o Analog sec so s a n hvicacmcien a pdo b o ta o i e n a pta o ra cho t ikhi hai ien apnayat c giatr xap x ba ng nhau. Khi o k e t q u a chuyenoixem nh cchatrong c a cbit CVR3:CVR0.

Cacthanh ghi lienquan en b o t a o i e na pso sanhnaybao gom:Thanh ghi CVRCON (a c h 9Dh): thanh ghi trc tiepieukhie n boso sanhienap.Thanh ghi CMCON (ach9Ch): thanh ghi ieukhienboComparator.

Chi tietvec a cthanh ghi sec trnh b a yc u t h e phu luc2.

2.11 CCP

CCP (Capture/Compare/PWM) bao gomcacthao tactren ca cxung emcung capbicacboem Timer1 v a Timer2. PIC16F877A c tch hpsanhai khoiCCP : CCP1 v a CCP2.MoiCCP c o m o tthanh ghi 16 bit (CCPR1H:CCPR1L v a CCPR2H:CCPR2L), pin ieukhiendungcho khoiCCPx l a RC2/CCP1 v a RC1/T1OSI/CCP2. CacchcnangcuaCCP bao gom:

Capture.So sanh(Compare).

ieucheoron gxung PWM (Pulse Width Modulation).

C a CCP1 v a CCP2 ve nguyentachoat ongeugiongnhau v a c h cn a n g c u a t n g k h o i la k h a o c l a p .Tuynhien trong motsotrnghp ngoai le CCP1 v a CCP2 cokhanang phoihp vinhau eetao ra c a chien tng acbiet(Special event trigger) hoaccactaconglenTimer1 v a Timer2. Cactrnghpnayc lietk e trongbangsau:

CCPx CCPy TacongCapture Capture Dungchung nguonxung clockt TMR1Capture Compare Taora hientng acbietlamxoaTMR1Compare Compare Taora hientng acbietlamxo aTMR1

PWM PWM Dungchung t a nsoxung clockvacungchu ta co ngcu angat

TMR2.PWM Capture Hoat ong oclapPWM Compare Hoat ong oclap


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Khi hoat ong c h e o Capture th khi c o mot hien tng xayra tai pin RC2/CCP1(hoac RC1/T1OSI/CCP2), giatr cua thanhghi TMR1 s e c a vaothanh ghi CCPR1(CCPR2). Cachien tng c nh nghabi c a c bit CCPxM3:CCPxM0(CCPxCON) v a c o t h e l a mot trongcachientng sau:

Moikhi c o canh xuong tai c a cpin Hnh 2.13 S okhoiCCP (Capture mode).

CCP.

Moikhi c o canhlen.M oicanh lenth4.M oicanh le nth16.

Sau khi giatr cuathanh ghi TMR1 c a vaothanh ghi CCPRx, c ngatCCPIF c setvaphaic xoabangchng trnh. Neuhientng tiep theo xayra m a g ia t r trong thanhghi CCPRx cha cx l, giatrtieptheo nhancsetongcghi e l e ng i a t rc u .

Motsoiemcanchuy khi s dungCCP nh sau:Cacpin dungcho khoiCCP ph a ic a n nh l a input (set c a cbit tng ngtrong

thanh ghi TRISC). Khi a n nh c a cpin dungcho khoiCCP l a output, viec a giatr vaoPORTC cungcothe gay ra cachien tng ta cong lenkhoiCCP do trang thaicuapinthay oi.

Timer1 pha ichoa tong ch e o Timerhoaccheoemong bo.

Tranhs dungngatCCP bangcachclear bit CCPxIE (thanh ghi PIE1), c n g a t CCPIFnenc xoabangphan mem moikhi c set etiep tuc nhan nh c trang thaihoatongcuaCCP.

CCP c o n c tch hp b o chia tan so prescaler c ieu khien b i c a c bitCCPxM3:CCPxM0. Viecthay oioitng tacongcuaprescaler c o t h e tao ra hoat ongngat.Prescalercxoakhi CCP khonghoatonghoackhi reset.

Xem c a cthanh ghi ieukhienkhoiCCP (phuluc2 ebietthemchi tiet).


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Khi hoat ong c h e o Compare, giatr trong thanh ghi CCPRx se th ng xuyen c sosanhvigiatr trong thanh ghi TMR1. Khi hai thanh ghi chagiatr bang nhau, c a cpin cuaCCP c thay oitrang thai(c a lenmccao, a xuong m cthaphoacginguyentrang thai),ongthic n g a t CCPIF c u n gse c set. S thay oitrang thaicuapin cothec ieukhienb ica cbit CCPxM3:CCPxM0 (CCPxCON).

Hnh 2.14 S okhoiCCP (Compare mode).

Tng t nh c h e o Capture, Timer1 phaic a n nh c heo hoat ong la timerhoacemongbo .Ng oa ira, khi c h e o Compare, CCP cokhanang tao ra hientng acbie t (Special Event trigger) lam reset giatr thanh ghi TMR1 va khiong bochuyen oiADC. ieuna ychophepta ieukhiengiatrthanh ghi TMR1 motcachlinh onghn.


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Khi hoat ong c h e o PWM (PulseWidth Modulation _ khoiieucheorongxung), tn hieu sau khi ieu che seca ra c a cpin cuakhoiCCP (ca n annhcacpin n a y l a output). e s dung chcnang ieu che naytrc tien ta cantienhanhcacbccaiatsau:

1. Thiet lapthigian cua1 chu kcua xung ieu che cho PWM(period) ba ng cach a gia trthch hpvaothanh ghi PR2.

2. Thiet laporongxung canieuche (duty cycle) ba ng cachag i a tr vao thanh ghi CCPRxLv a c a cbitCCP1CON.

3. ieu khie ncacpin cuaCCP l a output ba ng cach clear c a cbittng ng trong thanh ghiTRISC.

4. Thiet lap giatr bochia t a n s o prescaler cua Timer2 v a chophep Timer2 hoat ongbangcacha g i a tr thch hp vaothanh ghiT2CON.

5. Cho phe pCCP hoatong che o PWM.

Hnh 2.15 S okhoiCCP (PWM mode).

Hnh 2.16 Cactham s o c u aPWM

Trong ogiatr 1 chu k (period) cu axung ieuchec tnhbangco ngth c:

PWM period = [(PR2)+1]*4*TOSC*(gia tr bochia t a nso c uaTMR2).

B o chia t a n s o prescaler cuaTimer2 chcothenhan cacgiatr 1,4 hoac16 (xem lai Timer2ebietthemchitiet).Khi giatr thanh ghi PR2 ba ng vigiatr thanh ghi TMR2 th quatrnh

sau xayra:Thanh ghi TMR2 t ongcxoa.PincuakhoiCCP cset.Giatr thanh ghi CCPR1L (chagiatrannh orongxung ieucheduty cycle)

ca vaothanh ghi CCPRxH.

oro n gcuaxung ieuche(duty cycle) ctnh theo congthc:

PWM duty cycle = (CCPRxL:CCPxCON)*TOSC*(g i a tr bochia t a nsoTMR2)


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Nh vay2 bit CCPxCON s e c h a2 bit LSB. Thanh ghi CCPRxL chabyte cao cuagiatrquyetnh o rongxung. Thanh ghi CCPRxH ongvai t r o l a buffer cho khoiPWM. Khi giatr trong thanh ghi CCPRxH bang v i g i a t r trong thanh ghi TMR2 v a hai bitCCPxCON ban g vigiatr 2 bit c u ab o chia tans o prescaler, pin cuakhoi CCP laic a vemcthap, nh vay ta coc hnh anhcuaxung ieuche tai ngora cuakhoiPWM nh hnh 2.14.

Motsoiemcanchuy khi s dungkhoiPWM:Timer2 c o hai b o chia t a n s o prescaler v a postscaler. Tuy nhien bopostscaler khong

cs dung trong quatrnh ieucheorongxung cuakhoiPWM.Neuth igian duty cycle d a ihn thigian chu k xung period th xung ngora tieptuc

c gi mccao sau khi giatrPR2ban gv igia trTMR2.

2.12 GIAO T I E PN O ITIEP

1.12.1 USART

USART (Universal Synchronous Asynchronous Receiver Transmitter) l a m o t tronghai chuangiao tiepnoitiep.USART c o n c g o i l a giao diengiao tiepnoitiepnoitiepSCI(Serial Communication Interface). C o t h e s dung giao dien naycho c a cgiao tiep vicacthiet b ngoai vi, v i c a c vi ieu khien khac hay vimay tnh. Cac dang cua giao dienUSART ngoaivi bao gom:

Batong bo(Asynchronous).ongbo_Master mode. ong

bo _Slave mode.

Hai pin dungcho giao d i e n na y la RC6/TX/CKv a RC7/RX/DT, trong o RC6/TX/CKdung e truyen xung clock (baud rate) v a RC7/RX/DT dungetruyen data. Trong trnghpnaytaph a iset bit TRISC v a SPEN (RCSTA) c0echophepgiao dienUSART.

PIC16F877A c tch hp sanbotao tocobaud BRG (Baud Rate Genetator) 8 bitdungcho giao dienUSART. BRG thc chat lamotboem co thec sdung cho c a haidang ongbovab a to n gbova c ieukhienb ithanh ghi PSBRG. dang batongbo,BRG c o n c ieu khien bibit BRGH ( TXSTA). dang ong botacong cuabit

BRGH cb o qua. To c o baud do BRG tao ra ctnh theocongthcsau:

Trong o X l a g i a t r cu athanh ghi RSBRG ( X l a s o nguyenv a 0


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Cacthanh ghi lienquan enBRG bao gom:TXSTA (a c h 98h): chon che oo ngbohay ba ton gbo( bit SYNC) vachon m c

tocobaud (bitBRGH).RCSTA (ach18h): choph e phoa t ongcongnoitiep(bit SPEN).RSBRG (ac h 99h): quyetn h tocobaud.

Chi tietvecacthanh ghi sec trnh bat cu thetrongphu lu c2.

2.12.1.1 USART B A T O N GB O

cheo truyen nayUSART hoat ong theo chuanNRZ (None-Return-to-Zero), ngha l a c a cbit truyeni s e bao gom1 bit Start, 8 hay 9 bit dlieu (thong thn g la8 bit) v a 1 bitStop. Bit LSB s e c truyen i trc.Cackhoi truyen v anhan data o c l a p v inhau s ed u n g chung t a n s o tng n g v i t o c o baud choquatrnh dch dlieu(tocobaud gap16

hay 64 lantocodch dlieu tuytheo giatr cuabit BRGH), v a e ambaotnh h i e u q u a cuadl ieuth hai khoitruyenv a nha npha idu ngchung motnhdang d lieu.

2.12.1.1.1 TRUYEND L I E UQUA CHUANGIAO TIEPUSART B A T O N GB O

Thanhphan quan trong nhatcuakho itruyend l i eu la thanh ghi dch d lieuTSR (TransmitShift Register). Thanh ghi TSR s e l a y d l i eu t thanh ghi emdungcho quatrnh truyend l i e u TXREG. Dlieucantruyen phaic a trcvaothanh ghi TXREG. Ngay sau khi bitStop c u a d lieucantruyen trcoc truyen xong, d l i eu t thanh ghi TXREG seca vaothanh ghi TSR, thanh ghi TXREG b ro ng, nga txay ra v a c h ieu TXIF (PIR1)

c set. Ngatnay c ieukhie n bibit TXIE (PIE1). Chieu TXIF vanc set ba tchap trang thai cuabit TXIE hay tacong cua chng trnh (khong the xoaTXIF bangchng trnh) m a c h reset v e 0 khi c o d lieumica vaothanhh ghi TXREG.

Hnh 2.17 S o khoicuakhoitruyendl ieuUSART.


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Trong khi c h ieu TXIF ongvai trochth trang thaithanh ghi TXREG th c h ieu TRMT(TXSTA) c o nhiem vu thehien trang thaithanh ghi TSR. Khi thanh ghi TSR rong,bitTRMT s e c set. Bit nayc h oc vakhong congat naoc gan vitrang thaicuano.Motiem canchuy n a l a thanh ghi TSR khong c o trong bonhd lieu vach c ieukhienbiCPU.

Khoitruyend l i eu c cho phep hoatongkhi bit TXEN (TXSTA) c set. Quatrnhtruyen d lieuc h thc s bataukhi a co d l i eu trong thanh ghi TXREG v a xung truyenbaud ctao ra. Khi khoitruyendlieuc khiong lanautien, thanh ghi TSR rong.Tai thiiem o,dlieu a vaothanh ghi TXREG ngay laptcc load vaothanh ghiTSRv a thanh ghi TXREG b rong . Lucnayta c o t h e hnh thanhmotchuoi dlieulientuccho quatrnh truyen dlieu.Trong quatrnh truyen dlieuneubit TXEN b reset v e 0, quatrnh truyen ketthuc,khoitruyen dlieu c reset v a pin RC6/TX/CK chuyen en trangthaihigh-impedance.

Trong trnghp d lieucantruyen l a 9 bit, bit TX9 (TXSTA) cset v a bit dl ieut h 9 sec lu trong bit TX9D (TXSTA). Ne nghi bit d l ie u t h 9 vaotrc,v khi ghi 8bit dlieuvaothanh ghi TXREG t r c c o th e xayra trnghpnoidung thanh ghi TXREGsec load vaothanh ghi TSG trc,nh vaydlieutruyen i s e b sai khacso viyeucau.

Tomlai, etruyen dlieutheo giao dienUSART ba t ongbo ,ta canth c hientua nt cacb csau:

1. Taoxung truyenbaudbangcac ha cacgiatrcanthietvaothanh ghi RSBRG v a bitieukhien mc to c obaud BRGH.

2. Cho phepconggiao diennoitiepnoitiepba tongbo ba ngcachclear bit SYNCv a set bit PSEN.

3. Set bit TXIE neucans dungngattruyen.4. Set bit TX9 neunhdang d lieucantruyen l a 9bit.5. Set bit TXEN e chopheptruyendl ieu(lu cnaybit TXIF cungsecset).6. Neunhdang dl i eula 9 bit, a bit dl ieut h 9 vaobit TX9D.7. a 8 bit d lieucantruyenvaothanh ghi TXREG.

8. Neu s dung ngat truyen, can kiem tra lai c a cbit GIE v a PEIE (thanh ghiINTCON).

Cacthanh ghi lienquan enquatrnh truyendl ieub a n ggiao dienUSARTbato n gbo:

Thanh ghi INTCON (a c h 0Bh, 8Bh, 10Bh, 18Bh): cho p h e pta tcacacngat.Thanh ghi PIR1 (ach0Ch): c h ac h ie uTXIF.


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Thanh ghi PIE1 (ach8Ch): chabit chophe pnga ttru yenTXIE.Thanh ghi RCSTA (a c h 18h): chabit cho ph ep cong truyen dlieu (hai pin

RC6/TX/CKv a RC7/RX/DT).Thanh ghi TXREG (ach19h): thanh ghi c h ad lieu cantruyen.Thanh ghi TXSTA (ach98h): xaclapcacthongso cho giao dien.Thanh ghi SPBRG (a c h 99h): quyetnh tocobaud.


2.12.1.1.2 NHAND L I E UQUACHUA NGIAO TIEPUSART B A T O N GB O

Dlieuc a v a o t c h a nRC7/RX/DT s e kch hoat k hoiphuc hoidlieu.Khoiphuc hoidlieuthcchatl am o tb o d ch d l i euc t o c o cao va cotanso hoatonggap16 lanhoac64 l antansobaud. Trong khi o toco d ch cu athanh thanh ghi n h a ndl ieusebangvitanso

baud hoactans o c u aoscillator.

Hnh 2.18 S o k h o ic u a k h o in h a ndl ieuUSART.

Bit ieukhiencho p h e p k h o in h a n d l i eu la bit RCEN (RCSTA). Thanhphanquan trongnhatcuakhoinhan d lieula thsnh ghi nhan d lieuRSR (Receive Shift Register). Sau khinhandienbit Stop c u a d lieutruyent i ,dlieu nhanc trong thanh ghi RSR sec avaothanh ghi RCGER, sau o c h i e u RCIF (PIR1) sec set vangatnhan c kchhoat. Ngatnay c ieukh ien bibit RCIE (PIE1). Bit c hieuRCIF l a bit c h o c v a khongthec tacongbichng trnh. RCIF c h reset v e 0 khi d l i e u nhan v a o thanhghi RCREG ac oc vakhi o thanh ghi RCREG rong.Thanh ghi RCREG l a thanh ghi


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c o b o e m k e p (double-buffered register) vahoat ongtheo c cheFIFO (First In First Out)cho phepnhan 2 byte v a byte t h 3 tieptuc c a vaothanh ghi RSR. Neusau khi nhancbit Stop cuabyte d l i e u t h 3m a thanh ghi RCREG vanconay,chieuba o t r a n d l i e u (Overrun Error bit) OERR(RCSTA) s e c set, d l i e u trong thanh ghi RSR s e b m a t i v a q u a trnh a d l ie u t thanh ghi RSR vaothanh ghi RCREG seb gianoan.Trong trnghp naycan lay h et dlieu thanh ghi RSREG vaotrckhi tiep tuc nhanbyte dlieu tiep theo. Bit OERRph a i c xo a bang ph an mem va thc hien ban g cachclearbit RCEN r o iset lai. Bit FERR (RCSTA) sec set khi ph a thienbit Stop d u a d lieuc nhanvao. Bit d l ieu th9 sec a vaobit RX9D (RCSTA). Khi o c d l i e u t thanh ghi RCREG, hai bit FERR v a RX9D senhan cacgiatrmi.Do o c a n o c d l i eut thanh ghi RCSTA trckhi o c d l i eut thanh ghi RCREG e t r a n hb m a td lieu.

Tomlai, khi sdung giao dien nhan d lieuUSART ba tongbocantie nha nh tuan tcacb csau:

1. Thietlaptocobaud (a giatrthch hpvaothanh ghi SPBRG v a bit BRGH.2. Choph e pco nggiao tiepUSARTbato ng bo(clear bit SYNC v a set bit SPEN).3. N e uc a nsdungngatnhand l i e u ,set bit RCIE.4. N e ud lieutruyennhanc o nh dangl a 9 bit, set bit RX9.5. Cho p h e pn h a ndl ieub a n gc a c hset bit CREN.6. Sau khi dlieuc nhan,bit RCIF sec set vangatc kch hoat (neubit

RCIE cset).7. oc giatr thanh ghi RCSTA eocbit d l i e u t h 9 vakiem tra xem quatrnh

n h a ndl ieucob loikhong.8. oc8 bit dl i eut thanh ghi RCREG.

9. Neuqu atrnh truyennhancoloixayra, xoalo iba ngca c hxo abit CREN.10.N e us dungngatnhancanset bit GIE v a PEIE (thanh ghi INTCON).

Cacthanh ghi lienquan enquatrnh n h a ndl ieub a n ggiao dienUSARTba to n gbo:Thanh

ghi INTCON (a c h 0Bh, 8Bh, 10Bh, 18Bh): chacacbit cho pheptoanboc a cnga t(bit GIERv a PEIE).

Thanh ghi PIR1 (ach0Ch): c h ac h ie uRCIE.Thanh ghi PIE1 (ach8Ch): chabit chophe png a tRCIE.Thanh ghi RCSTA (ach18h): xacnh ca ctrang thaitrong quatrnh n h a nd l i e u .

Thanh ghi RCREG (ach1Ah): c h adl ieun h a nc.Thanh ghi TXSTA (ach98h): chacacbit ieukhienSYNC v a BRGH.Thanh ghi SPBRG (ach99h): ieukhientocobaud.



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2.12.1.1.2 USART O N GB O

Giao dienUSART ongboc kch hoatbangc ach set bit SYNC. Conggiao t i ep n o i t i epv a n la hai chan RC7/RX/DT, RC6/TX/CKvac cho phe pbangcac hset bit SPEN. USARTcho phephai cheotruyen nhan d l i eu la Master mode v a Slave mode. Master mode ckch hoat bangcachset bit CSRC (TXSTA), Slave mode c kch hoat bangcachclearbit CSRC. iem k hacbiet duy nhatgiahai che onayl a Master mode s e l a y xung clock o n g b o t b o tao xung baud BRG c o nSlave mode layxung clock o n g b o t ben ng oaiquachanRC6/TX/CK. ieuna ycho phe pSlave mode hoatongngay c a khi vi ieukhienang ch e o sleep.

2.12.1.2.1 TRUYEND L I E UQUA CHUANGIAO TIEPUSART O N GB O MASTERMODE

Tng t nh giao dienUSART ba t o n gb o ,thanhph a n quan trong nhatcuahoitruyen d l i eu la thanh ghidch TSR (Transmit Shift Register). Thanh ghi naychc ieu khien biCPU. Dlieu a vaothanh ghi TSR c chatrong thanh ghi TXREG. Chieu cuakhoitruyen d l ie u l a bit TXIF (chth trang thaithanh ghi TXREG), chieu nayc gan vimotngatvabit ieu khien ngatnaylaTXIE. Chieu chth trang thaithanh ghi TSR l a bitTRMT. Bit TXEN cho phephay khongchophe ptruyend lieu.

Cacbccantienhanhkhi truyendl ieuqua giao dienUSART ong boMastermode:

1. Taoxung truyenbaudban gca cha cacgiatrcanthietvaothanh ghi RSBRG v a bitieukhien mc to c obaud BRGH.2. Chophe pco nggiao diennoitiepnoitiepongbobangcach set bit SYNC, PSEN

v a CSRC.3. Set bit TXIE neucans dungngattruyen.4. Set bit TX9 neunhdang d lieucantruyen l a 9bit.5. Set bit TXEN e chopheptruyend lieu.6. Neunhdang dl i eula 9 bit, a bit dl ieut h 9 vaobit TX9D.7. a 8 bit d lieucantruyenvaothanh ghi TXREG.8. Neu s dung ngat truyen, can kiem tra lai c a cbit GIE v a PEIE (thanh ghi

INTCON).

Cacthanh ghi lienquan enquatrnh truyendlieubang giao dienUSART ongboMastermode:

Thanh ghi INTCON (a c h 0Bh, 8Bh, 10Bh, 18Bh): cho p h e pta tcacacngat .Thanh ghi PIR1 (ach0Ch): c h achieuTXIF.


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2.12.1.2.2 NHAND L I E UQUACHUA NGIAO TIEPUSART ONGB O MASTERMODE

Cautruckhoitruyen d l ie u l a khong oiso v igiao die nba tongbo,ke ca c acchie u ,ngatnhanvacacthao tactrencacthanhpha no.iem khacbietduy n h a tla giao diennay

cho phephai c h e o n h a n s lieu, o l a c h n h a n1 word dl ieu (set bit SCEN) hay nhanmotchuoidlieu (set bit CREN) cho t ikhi ta clearbit CREN. N e u c a hai bit euc set, bitieukhienCREN secu tien.

Cacbccantienhanhkhi n h a ndl ieub a n ggiao dienUSART ong boMaster mode:

1. Thietlaptocobaud (a giatrthch hpvaothanh ghi SPBRG v a bit BRGH).2. Choph e pco nggiao tiepUSARTbato ng bo(set bit SYNC, SPEN v a CSRC).3. Clear bit CREN v a SREN.4. N e uc a nsdungngatnhand l i e u ,set bit RCIE.

5. N e ud lieutruyennhanc o nh dangl a 9 bit, set bit RX9.6. Ne uch nhan1 word dlieu,set bit SREN, neunhan1 chuoiword d lieu,setbit

CREN.7. Sau khi dlieuc nhan,bit RCIF sec set vangatc kch hoat (neubit


n h a ndl ieucob loikhong.9. oc8 bit dl i eut thanh ghi RCREG.10.Neuqua trnh truyennhancoloixayra, xoalo iba n gcac hxo abit CREN.11.N e us dungngatnhancanset bit GIE v a PEIE (thanh ghi INTCON).

Cacthanh ghi lienquan enquatrnh nhandlieubanggiao dienUSART ongbo Mastermode:

Thanh ghi INTCON (a c h 0Bh, 8Bh, 10Bh, 18Bh): chacacbit cho phe ptoanbocacnga t(bit GIERv a PEIE).

Thanh ghi PIR1 (ach0Ch): c h ac h ie uRCIE.


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Thanh ghi PIE1 (ach8Ch): chabit chophe png a tRCIE.Thanh ghi RCSTA (ach18h): xacnh ca ctrang thaitrong quatrnh n h a nd l i e u .Thanh ghi RCREG (ach1Ah): c h adl ieun h a nc.Thanh ghi TXSTA (ach98h): chacacbit ieukhienSYNC v a BRGH.Thanh ghi SPBRG (ach99h): ieukhientocobaud.


2.12.1.2.3 TRUYEND L I E UQUA CHUANGIAO TIEPUSART ONGB O SLAVEMODE

Quatrnh naykhongcoskhacbietso v iMaster mode khi vi ieukhienhoatong c h e o bnh thng. Tuy nhienkhi vi ieukhienang trang thaisleep, skhacbiet c thehie nrorang.Ne u cohai word d lieuc a vaothanh ghi TXREG trckhi lenhsleep c

thcthi th quatrnh sau se xa yra:

1. Word dl ieua u t i e ns e ngay laptcca vaothanh ghi TSRetruyen i.2. Word dl ieut h hai vannamtrong thanh ghi TXREG.3. ChieuTXIF sekhongcset.4. Sau khi word d l ieu a u t ie n a dch ra khoithanh ghi TSR, thanh ghi TXREG

tieptuc truyenword t h hai vaothanh ghi TSRvachieuTXIF cset.5. Neungattruyenc cho phe phoat ong ,ngatnayseanhthcvi i e u k h i e n v a

n e u t o a nb o c a cngat ccho phe phoa t o ng ,boe mchng trnh se ch t i ac h c h achng trnh ngat (0004h).

Cacbccantienhanhkhi truyendl ieub a n ggiao dienUSART ong boSlave mode:

1. Set bit SYNC, SPEN v a clear bit CSRC.2. Clear bit CREN v a SREN.3. N e uc a nsdungngat,set bit TXIE.4. Neunhdang dl i eula 9 bit, set bit TX9.5. Set bit TXEN.6. a bit dl ieut h 9 vaobit TX9D trc(neunhdang dl i eula 9bit).7. a 8 bit dl ieuv a othanh ghi TXREG.

8. Neungattruyen cs dung,set bit GIE v a PEIE (thanh ghi INTCON).

Cacthanh ghi lienquan enquatrnh truyendlieubanggiao dienUSART ongboSlavemode:

Thanh ghi INTCON (a c h 0Bh, 8Bh, 10Bh, 18Bh): cho p h e pta tcacacngat .Thanh ghi PIR1 (ach0Ch): c h achieuTXIF.


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2.12.1.2.4 N H A N D L I E U QUA CHUANGIAO TIEPUSART O N G B O SLAVEMODE

SkhacbietcuaSlave mode so v iMaster mode c h t h e h i e n r o r a n g khi vi ieukhienhoatong ch e o sleep. Ngoa ira ch e o Slave mode khongquan t a m t ibit SREN.

Khi bit CREN (cho ph e pnh an chuo i d lieu) c set trckhi lenh sleep c thc thi, 1word d lieuvanc tieptuc nhan,sau khi nhanxong bit thanh ghi RSR s e chuyend l i euv a othanh ghi RCREG v a bit RCIFc set. Neubit RCIE (cho phe p ngatnhan) ac settrco,ngatse cthc thi v a vi ieukhienc anhthc,boemchng trnh sechenach0004h v a chng trnh nga tsec thc thi.

Cacbccantienhanhkhi n h a ndl ieub a n ggiao dienUSART ong boSlave mode:

1. Cho phep conggiao tiep USART bat on g bo(set bit SYNC, SPEN clear bit

CSRC).2. N e uc a nsdungngatnhand l i e u ,set bit RCIE.3. N e ud lieutruyennhanc o nh dangl a 9 bit, set bit RX9.4. Set bit CREN e chophe pquatrnh n h a ndl ieub a tau.5. Sau khi dlieuc nhan,bit RCIF sec set vangatc kch hoat (neubit


n h a ndl ieucob loikhong.7. oc8 bit dl i eut thanh ghi RCREG.8. Neuqu atrnh truyennhancoloixayra, xoalo iba ngca c hxo abit CREN.

9. N e us dungngatnhancanset bit GIE v a PEIE (thanh ghi INTCON).

Cacthanh ghi lienquan enquatrnh nhan dlieubang giao dien USART ong boSlavemode:

Thanh ghi INTCON (a c h 0Bh, 8Bh, 10Bh, 18Bh): chacacbit cho phe ptoanbocacnga t(bit GIERv a PEIE).


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Thanh ghi PIR1 (ach0Ch): c h ac h ie uRCIE.Thanh ghi PIE1 (ach8Ch): chabit chophe png a tRCIE.Thanh ghi RCSTA (ach18h): xacnh ca ctrang thaitrong quatrnh n h a nd l i e u .Thanh ghi RCREG (ach1Ah): c h adl ieun h a nc.Thanh ghi TXSTA (ach98h): chacacbit ieukhienSYNC v a BRGH.Thanh ghi SPBRG (ach99h): ieukhientocobaud.


2.12.2 MSSP

MSSP ( Master Synchronous SerialPort) l a giao dien ongbon oi tie p dun gegiao tiepvicacthietb ngoai vi (EEPROM,

ghi dch,chuyen oi ADC,)hay c a cvi ieukhienkhac.MSSP c o thehoatongdihaidanggiao tiep:

SPI (Serial Pheripheral Interface).I2C(Inter-Intergrated Circuit).

Cac thanh ghi ieu khien giao chuan giaotiep naybao gom thanh ghi trang thaiSSPSTAT v a hai thanh ghi ieu khienSSPSON v a SSPSON2. Tuytheo chuangiaotiep c s dung (SPI hay I2C) machc

nang cacthanh ghi nayc thehien khacnhau.

2.12.2.1 SPI

Chuangiao tiep SPI cho phep truyennhan ong bo. Ta c a n s dung 4 pin chochuangiaotiepnay:

RC5/SDO: ngo ra d l i e u dang noitiep(Serial Data output).

RC4/SDI/SDA: ngovaodl ieu dangnoitiep(Serial Data Input).

Hnh 2.19 S okhoiMSSP (giao dienSPI)

RC3/SCK/SCL: xung ong bonoitiep(Serial Clock).RA5/AN4/SS/C2OUT: chonoitnggiao tiep(Serial Select) khi giao tiep ch e o

Slave mode.

Cacthanh ghi lienquan enMSSP khi hoa tong chuangiao tiepSPI bao gom:


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Thanh ghi ieukhienSSPCON, thanh ghi naychop h e p o c v a ghi.Thanh ghi trang thaiSSPSTAT, thanh ghi naychchop h e p o c v a ghi 2 bit tren,6

bit conlaichchophe poc.Thanh ghi ongvai t ro labuffertruyennhanSSPBUF, d lieutruyeni hoacnhan

c sec a vaotranh ghi nay.SSPBUF khongcocaut rucemhai l p(doubled-buffer), do odlieughi vaothanh ghi SSPBUF selaptcc ghi vaothanh ghi SSPSR.

Thanh ghi dch d l i e u SSPSR dunge dch dlieu v aohoac ra. Khi 1 byte dlieuc nhan hoanch nh, dlieu setthanh ghi SSPSR chuyenqua thanh ghi SSPBUF v a c hieucset, ongthingatse xa yra.


Khi sdung chuan giao tiepSPI trctienta canthiet lapcaccheo cho giao dienbangcacha cacgiatr thch hp vaohai thanh ghi SSPCON v a SSPSTAT. Cacthongso canthietlap

bao gom:Master mode hay Slave mode. o i v iMaster mode, xung clock o n gb o se i ra t chan RC3/SCK/SCL. o iv iSlave mode, xung clockongbos ec nhan t benng oa iquachanRC3/SCK/SCL.

CaccheocuaSlave mode.Mclogic cuaxung clock khi trang thaitam ngng quatrnh truyennhan(Idle).Canh tacong cuaxung clockong bo(canhlenhay canhxuong).To c o xung clock (khi hoatong Master mode).Thiiem xacnh mclogic cu ad l i eu ( giahay cuoithigian 1 bit dlieu

ca vao).

Master mode, Slave mode va c a c c he o c u aSlave mode c ieukhienb ica cbitSSPM3:SSPM0 (SSPCON). Xem chi t i e t phuluc2.

MSSP bao gommotthanh ghi dch dlieuSSPSR v a thanh ghi em dlieuSSPBUF.Hai thanh ghinaytao thanhboem dlieukep(doubled-buffer). Dlieusec dch vaohoac ra qua thanh ghi SSPSR, bit MSB c dch trc.ay lam ottrong nhngiemkhacbiet g i hai giao dienMSSP v a USART (USARTdchbit LSB trc).

Trong quatrnh nhan dlieu, khi d l i e u a v a o t chan RC4/SDI/SDA trong thanhghi SSPSR a sa n sa n g ( a n h an u 8 bit), d lieu sec a vaothanh ghi SSPBUF, bit ch

th trang thaiboemBF (SSPSTAT) sec set ebaohieuboem aay,ong thicngatSSPIF (PIR1) cungc set. Bit BF s e t ong reset v e 0 khi d l i e u trong thanhghi SSPBUF c oc vao.Boemkepcho phepoc tie pbyte tiep theo trckhi byte d l ie u t r c o c oc vao.Tuy nhien ta nen oc trcdlieu tthanh ghi SSPBUF trckhi nhanbyte dl ieut i e ptheo.

Quatrnh truyendlieucunghoan toantng t nhng ngclai. Dlieucantruyense cavaothanh ghi SSPBUF ongthia vaothanh ghi SSPSR, khi o c h i eu BF


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cset. Dlieuc d ch t thanh ghi SSPSR v a a ra ngoaiqua chanRC5/SDO. N gat se xayra khi quatrnh dch dlieuhoantat.Tuy nhien dlieutrckhi ca ra ngoaiphai

c cho phe pbitn h i e u t chan . Channayongvai trochon oitnggiao tiepkhi SPI ch e o Slave mode.

Khi quatrnh truyen nhan dlieuang dien ra, ta khongcphepghi d l ie u v a othanh ghi SSPBUF. Thao t a cghi d l i eu n a yse set bit WCON (SSPCON). Motieucanchuy n a l a thanh ghi SSPSR khongcho phe ptruy xuattrc tiepmaphaithong qua thanhghi SSPBUF.

Conggiao tiepcuagiao dienSPI c ieukhien bibit SSPEN (SSPSON). Bencanh o canieukhienchieuxuatnhapcuaPORTC thongqua thanh ghi TRISC sao cho phu hpvichieucuagiao dien SPI. Cuthenh sau:

RC4/SDI/SDA setongc ieukhienbi khoigiao itepSPI.RS5/SDO l a n g o ra d l i e u ,do oc a nclear bit TRISC.Khi SPI dang Master mode, can clear bit TRISC e cho phe pa xung clock

ong bora chanRC3/SCK/SCL.Khi SPI dang Slave mode, can set bit TRISC e cho phep nha n xung clockongb o t benngoaiqua chanRC3/SCK/SCL.

Set bit TRISC e cho phe pchan nha n tn hieuieukhien truyx u a tdl ieukhi SPI cheoSlave mode.

S o k e tn o icu achua ngiao tiepSPI nh sau:

Hnh 2.20 S oketnoicuachuangiao tiepSPI.Theo s oketnoinay,khoiMaster sebatauquatrnh truyennhandl ieub a n gc a c h

g itn hieu xung ong boSCK. Dlieusedch t c a hai thanh ghi SSPSR a ra n g o a in e uc o motcanh cu axung ong bot a c o n gv angng dchkhi cotacongc u acanh conlai.


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C a hai khoiMaster v a Slave nenc annh chung c a cqui tactacong cuaxung clock o n gb o e d l ieuc o thedchchuyenongthi.

2.12.2.1.1 SPI MASTER MODE.

c h e o Master mode, vi ieu khienco quyen annh thiiemtrao o id l i eu ( v a o i tng trao oidlieu neu can) v no ieukhien xung clock ong bo.Dlieu sectruyen nhanngay thiiem d lieuc a va o thanh ghi SSPBUF. N e u c h c a n n h a n d l i e u , ta c o th e a n nh chanSDO l a n g o v a o(set bit TRISC). Dlieu sec dch vaothanh ghi SSPSR theo mottococ nh sancho xung clockongb o .Sau khi nhancmotbyte d lieu hoanch nh,byte d l i eu se ca daothanh ghi SSPBUF, bitBFc setv a n g a tx a yra.

Khi lenhSLEEP cthc thi trong quatrnh truyen nhan,trang thaicuaquatrnh se c ginguyenvatieptuc sau khi vi ieukhiencanhthc.

Gianoxung cuaMaster mode v a ca c t a cong c uacacbit ieukhienctrnh baytrong hnh v e sau:

Hnh 2.21 Gianoxung SPI ch e o Master mode.


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2.12.2.1.2 SPI SLAVE MODE

cheonaySPI s e truyenv a n h a ndl ieukhi c o xung ong boxuathien chanSCK. Khitruyennhanxong bit dl ieuc u o ic u n g ,c nga tSSPIF secset. Slave mode hoatongngayc a khi vi ieukhienang che o sleep, v a ngattruyennhanchophepanhthcvi ieukhien.Khi c h c a n n h a nd l i e u ,ta c o t h e a nnh RC5/SDO l a n g o v a o(set bit TRISC).Slave mode choph e ps taco ngcuach a nieuk hie n (SSPCON =

0100). Khi chan mcthap,chanRC5/SDO cchop h e px u a tdl ieuv a

khi mccao, dl ieura chanRC5/SDOb khoa,o ngthiSPI creset (boembit d lieuc ga ngiatr0).

Hnh 2.22 Gianoxung chuangiao tiepSPI (Slave mode).

Cacthanh ghi lienquan en chuangiao tiepSPI bao gom:

Thanh ghi INTCON (a c h 0Bh, 8Bh, 10Bh, 18Bh): chabit chophep to anboca cngat(GIE va PEIE).

Thanh ghi PIR1 (ach0Ch): changatSSPIE.Thanh ghi PIE1 (ach8Ch): chabit chophe png a tSSPIE.


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Thanh ghi TRISC (ach87h): ieukhienxuatnhapPORTC.Thanh ghi SSPBUF (ach13h): thanh ghi e m d lieu.Thanh ghi SSPCON (ach14h): ieukhienchuangiao tiepSPI.Thanh ghi SSPSTAT (ach94h): chacacbit chth trang thaichuangiao tiepSPI.

Thanh ghi TRISA (ach85h):ieukhienxuatnhapchan .


2.12.2.2 I2C

a y l a m o t dang khac cuaMSSP.Chuan giao tiep I2C c u n g c o hai c h e o Master, Slave v a cu ng c ketnoiv inga t.I2C s e s dung2pin e truyennhand l i e u :

RC3/SCK/SCL: chan truyen danxung clock.RC4/SDI/SDA: chan truyen d a n d

lieu.

Cackhoicba ntrong s okhoicuaI2C khong conhieu khac biet so v i SPI.Tuy nhien I2C concothem khoi phathienbit Start v a bit Stop cu a d l i e u (Start andStop bit detect) v a khoi xac nh a c h (Match detect).

Cacthanh ghi lienquan enI2C bao gom:Thanh ghi SSPCON va SSPCON2:

ieukhienMSSP.Thanh ghi SSPSTAT: thanh ghi cha

cactrang thaihoato ngcuaMSSP.

Hnh 2.23 S okhoiMSSP (I2Cslavemode).

Thanh ghi SSPBUF: buffer truyennhannoitiep.Thanh ghi SSPSR: thanh ghi dchdungetruyennhand l i e u .Thanh ghi SSPADD: thanh ghi chaachcuagiao dienMSSP.

Cacthanh ghi SSPCON, SSPCON2 cho phe poc v a ghi. Thanh ghi SSPSTAT c h chop h e p o c v a ghi 2 bit au,6 bit conlaichchophepoc.

Thanh ghi SSPBUF chadlieusec truyen i hoac nhanc vaongvai t r o nh motthanh ghi emcho thanh ghi d c h d l i e uSSPSR.

Thanh ghi SSPADD chaa chcuathiet b ngoai vi can truy xuat dlieu cuaI2Ckhi hoat ong Slave mode. Khi hoatong Master mode, thanh ghi SSPADD chagiatrtao ra t o c o baud cho xung clockdungetruyennhand lieu.


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Trong quatrnh nhan dlieu,sau khi nhanc 1 byte dlieuhoan chnh, thanh ghiSSPSR s e chuyend l ie u v a o thanh ghi SSPBUF. Thanh ghi SSPSR khong ocvaghi c,quatrnh truy xuatthanh ghinayphaithongqua thanh ghi SSPBUF.

Trong qua trnh truyen d lieu, dlieu can truyen khi c a vao thanh ghiSSPBUF c ungseongthia vaothanh ghi SSPSR.Chi tietvecacthanh ghi sec trnh b a yc u t h e phu luc2.

I2C c o n h i e uc h e o h o a t o n gv a c i e uk h i e nb ic a cbit SSPCON, bao gom:I2C Mastermode, xung clock = fosc/4*(SSPADD+1).I2C Slave mode, 7 bit ach.I2C Slave mode, 10 bit ach.I2C Slvae mode, 7 bit ach,choph epng a tkhiph a thienbit Start v a bit Stop.I2C Slave mode, 10 bit ach,choph e png a tkhiphathienbit Start v a bit Stop.I2C Firmware Control Mastermode.

a chtruye n i s e bao gomcacbit a chvamotbit exacnh thao tac(ochay ghi d l i e u )v ioitng cantruy x u a td lieu.

Khi la chongiao dienI2C v a khi set bit SSPEN, c a cpin SCL v a SDA s e trang thaicc thu h .Do o trong trnghpcanthietta pha isdu ng ie ntrkeolen be nngo a iviieukhien, ben canh o c a n a n nh c a c g i a trphuhp cho c a cbit TRISC (bit ieukhienxuatnhapcacchanSCL v a SDA).

2.12.2.2.1 I2C SLAVE MODE.

Viectrctienl a p h a iset c a cpin SCL v a SDA l a input (set bit TRISC). I2C cuaviieukhiense c ieukhienb imo tvi ieukhienhoacmotthietb ngoai vi khacthongquacaca ch.Khi achna y c h envi ieukhien, th tai thiiem nayvatai thiiem dlieuac truyen nhan xong sau o ,vi ieu khien se tao ra xung ebaohieu ketthuc dlieu, giatr trong thanh ghi SSPSR sec a vaothanh ghi SSPBUF. Tuy nhienxung sekhongctao ra neumottrong cactrnghpsau xayra:

Bit BF (SSPSTAT) ba o hieu buffer a y a c set trckhi qua trnh truyennhanxayra.

Bit SSPOV (SSPCON) c set trckhi qua trnh truyen nhan xay ra (SSPOV

c set trong trnghp khi motbyte khacc nhanvaotrong khi d l i e u trong thanh ghiSSPBUF trcova ncha c layra).

Trong cactrng hp tren,thanh ghi SSPSR sekhong a giatr vaothanh ghi SSPBUF,nhng bit SSPIF (PIR1)se c set. e quatrnh truyen nhan dlieuc tieptuc, ca noc d l ie u t thanh ghi SSPBUF vaotrc,khi o bit BF set ong c xoa, conbitSSPOVpha i cx o aba ngchng trnh.


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Khi MSSP ckch hoat, n o s e c h tn hieuebatauhoatong.Sau khi nhanctn hieubatauhoat ong(canh xuongautiencuapin SDA), d l i e u 8 bit sec dch vaothanh ghi SSPSR. Cacbit a vaosec layma u tai canh lencuaxung clock. Giatr nhanc t thanh ghi SSPSR sec so sanhvigiatr trong thanh ghi SSPADD tai canh xuongcuaxung clock t h 8. Neu ket qua so sanhbang nhau, t c la I2C Master chnh oitnggiao t ie p l a vi ieukhien ang c h e o Slave mode (ta goi hien tng n a y l a addressmatch), bit BF v a SSPOV sec xoave0 va ga yra cactacongsau:

1. Giatrtrong thanh ghi SSPSRca vaothanh ghi SSPBUF.2. Bit BF t ongcset.3. Motxung ctao ra.4. CngatSSPIF c set (ngatc kch hoatneuc cho ph eptr co)t a i ca nh

xuongcuaxung clockt h 9.

Khi MSSP c h e o I2C Slave mode 10 bit a ch ,vi ieu kh ien canp ha inha nva o10 bit a c h e so sanh.Bit (SSPSTAT) ph a ic x o a v e 0 e cho phe pnha n2byte ach.Byteau tienconh dang l a 11110 A9 A8 0 trong o A9, A8 l a hai bit MSBcua10 bit ach.Byte t h 2 l a 8bitach conlai.

Quatrnhnhandangac h c u aMSSP ch e o I2C Slave mode 10 bit achnh sau:

1. au tien 2 bit MSB cu a 10 bit a c h c nhan trc,bit SSPIF, BF v a UA(SSPSTAT)cset (byte acha ut i e nc o nh dangl a 11110 A9 A8 0) .

2. Capnhatvao8 bit a chthapcuathanh ghi SSPADD, bit UA se cxoabivi

ieukhienekhitaoxung clock pin SCL sau khi quatrnh capnhathoantat.3. ocg iatr thanh ghi SSPBUF (bit BF sec xo ave0) vaxoacnga tSSPIF.4. Nhan8 bit achcao, bit SSPIF, BF v a UA cset.5. Capnhat8 bit a chanhan c vao8 bit achcao cuathanh ghi SSPADD,

neuachnhanc la ung(address match), xung clock chan SCL c k h it a o v a bit UA cset.

6. ocg iatr thanh ghi SSPBUF (bit BF sec xo ave0) vaxoacnga tSSPIF.7. Nhantn hieuStart.8. Nhanbyte achcao (bit SSPIF v a BF cset).9. ocg iatr thanh ghi SSPBUF (bit BF c x oave0) vaxoacnga tSSPIF.

Trong o c a c b c 7,8,9 xayra trong quatrnh truyen dlieu c h e o Slave mode.Xem g i a n o xung cuaI2C ecoc hnh a n hcuthehn vecacbctienhanhtrong quatrnh nhandanga ch.


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Xetquatrnh nhan d lieu c h e o Slave mode, c a cbit a chsec I2C Mastera vao trc. Khi bit trong c a cbit a c h c o g ia trbang0 (bit naycnhandang saukhi c a cbit a chac nhanxong)vaa chc chnh u ng(address match), bitcuathanh ghi SSPSTAT c x o a v e 0 va ngdlieu SDI c a vemc logic thap(xung ). Khi bit SEN (SSPCON) c set, sau khi 1 byte dlieu c nhan,xungclock t c h a n RC3/SCK/SCL sec a xuong mcthap,muonkhitao lai xung clock taset bit CKP (SSPCON). ieu nayse lamcho hientng trandlieukhong xa y ra v bitSEN cho phe pta ieu khiencxung clockdchd l i eu th o n gqua bit CKP (tham khaogiano xung e bietthem chi tiet).Khi hien tng tra ndl ieu x a yra, bit BF hoacbit SSPOV se c set. N ga tsexayra khi motbyte dlieuc nhan xong, c ngat SSPIF sec set v a p h a i c x o ab an gchng trnh.

Hnh 2.24 Gianoxung cuaI2C Slave mode 7 bit achtrong quatrnh n h a ndl ieu(bit

SEN = 0).


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Hnh 2.25 Gianoxung cuaI2C Slave mode 10 bit achtrong quatrnh n h a ndl ieu(bitSEN = 0).



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Xetquatrnh truyendl ieu ,khi bit trong c a cbit d l i e u mang giatr 1 vaa c hc chnhung(address match), bit cuathanh ghi SSPSTAT sec set. Cacbit ach c nhantrcvaa vaothanh ghi SSPBUF. Sau o xung ctaora, xung clock chanRC3/SCK/SCL c a xuongmcthapbatchaptrang thaicu abit SEN. Khi o I2CMaster sekhongc a xung clockvaoI2C Slave cho enkhi dl ieu thanh ghi SSPSR trang thaiwsansangcho quatrnh truyen d lieu(dlieu a vaothanh ghi SSPBUF se ong thi c a vao thanh ghi SSPSR). Tiep theo cho phep xung pin RC3/SCK/SCLbangca chset bit CKP (SSPCON). Tngbit cuabyte d l i eu se c dch ra ngoaitaimoicanh xuo ngcuaxung clock. Nh va yd l i e u se sa nsang n g o ra khi xung clock mclogic

cao, giupcho I2C Master nhan c dlieutai moicanh lencuaxung clock. Nh vaytrongquatrnh truyend l i e ubit SENkhongongvai t r o quan trong nh trong quatrnh n h a n d lieu.

Tai canh lenxung clock t h 9, dlieu ac dch hoantoanva oI2C Master, xungs e c tao ra I2C Master, ong thipin SDA s e c g i mclogic cao. Trong

trnghpxung c cho tbiI2C Slave, thanh ghi SSPSTAT secreset. I2C Slave


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s e c h tn hieucuabit Start etieptuctruyenbyte dlieu tieptheo (a byte dlieutieptheo vaothanhghi SSPBUF v a set bit CKP.

Nga tMSSP xayra khi motbyte dlieuket thu cquatrnh truyen,bit SSPIF c settai canhxuong cuaxung clock t h 9 vaphaic xoabangchng trnh eambaosecset khi byte dl ieut i e ptheotruyenxong.

Hnh 2.28 Gianoxung cuaI2C Slave mode 7 bit achtrong quatrnh truyend lieu.

Hnh 2.29 Gianoxung cuaI2C Slave mode 10 bit achtrong quatrnh truyend lieu.


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Quatrnh truyen n han cacbit a c h cho phe pI2C Master chon la oi tng I2CSlave cantruyxuatdlieu. Bencanh oI2C co ncung capthem mota chGCA (GeneralCall Address) cho ph e pchon ta t c a c a c I2C Slave. a y l a m o t trong 8 a chacbiet cuaprotocol I2C. a chnayc nh da ng l a motchuoi0 v i =0 vac cho ph e pban gcachset bit GCEN (SSPCON2). Khi o a ch nhan vaosec so sanhvithanh ghiSSPADD vav i a chGCA.

Hnh 2.30 Gianoxung cuaI2C Slave khi nhanachGCA.

Quatrnh nhandang a c h GCA cungtng t nh khi nhandang c a ca c h k h a cv a khongc o s k h a cb ie tro ra n gkhi I2C hoatong cheoach7 bit hay 10bit.

2.12.2.2.2 I2C MASTER MODE

I2C Master mode c xaclapbangcacha cacgiatr thch hp vaocacbit SSPMcuathanh ghi SSPCON v a set bit SSPEN. c h e o Master, c a cpin SCK v a SDA secieukhienbipha ncngcuaMSSP.


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Hnh 2.31 S okhoiMSSP (I2C Master mode).

I2C Master ongvai t r o tch cc trong quatrnh giao tiepvaieukhien cacI2C Slave thongqua viecc h u ongtao ra xung giao t i e p v ac a cieukienStart, Stop khi truyennhandlieu.Motbyte d l i e u c o the c bataubangieukienStart, ket thucban gieukienStop h o a cb a ta uv ak e tth u cv ic u n gm o t ie uk i e nkh ionglaplai(Repeated Start Condition).

Xung giao tiepnoitiepsec tao ra t BRG (Baud Rate Generator), giatr annh tansoxung clock noit i e p c l a y t 7 bit thapcuathanh ghi SSPADD. Khi dlieuc a vaothanh ghi SSPBUF, bit BF c set v a BRG t ongemngc ve0 v a d n glai, pin SCLc ginguyen trang thaitrco.Khidlieutiep theo c a vao,BRG secanmotkhoang thigian TBRG t ong reset lai g ia tr etiep tuc quatrnh emngc. Moivonglenh(cothigian TCY ) BRG segiamgiatr2 lan.

Hnh 2.32 S okhoiBRG (Baud Rate Benerator) cuaI2C Master mode. Cac

giatr cuthecuatansoxung noitiepdo BRG tao ra c lietketrongbangsau:


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Trong ogiatr BRG l a g ia trclayt 7 bit thapcuathanh ghi SSPADD. Do I2C c h e o Master mode, thanh ghi SSPADD sekhongc sdung echaa ch,thay v a o o

c hc na ngc u aSSPADD l a thanh ghi ch agia trcuaBRG.

e ta o c ieu kienStart, trchetcana hai pin SCL v a SDA lenmclogic caov a bit SEN (SSPCON2) pha ic set. Khi o BRG setong oc giatr 7 bit thapcuathanh ghi SSPADD vabatauem. Sau khoang thigian TBRG, pin SDA c a xuongmclogic thap.Trang thaipin SDA mclogic t h a p v apin SCL mclogic cao chnh la i e u k i e n Start cuaI2C Master mode. Khi o bit S (SSPSTAT) s e c set. Tiep theoBRG tiep tuc lay giatr t thanh ghi SSPADD etiep tuc quatrnh em,bit SEN c t o n gxoavacnga tSSPIF cset.

Trong trnghppin SCL v a SDA trang thailogic t h a p , h o a c latrong quatrnh taoieukienStart, pin SCL c a v e trang thai logic thaptrckhi pin SDA c a v e trang thailogic thap,ieukien Start sekhongchnh thanh,c n g a tBCLIF secset vaI2C s e trang tha itam ngng hoatong(Idle).

Hnh 2.33 Gianoxung I2C Master mode trong quatrnh tao ieukienStart.


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Tn hieuStop sec a ra pin SDA khi ke tthcdlieubang ca c h set bit PEN(SSPCON2). Sau canh xuongcuaxung clock t h 9 va vitacong cuabit ieukhienPEN, pin SDA cungc a xuong m cthap, BRG lai bat a u qua trnh em.Sau motkhoang thigian TBRG, pin SCL c a lenmclogic cao v a sau motkhoang thigianTBRG napin SDA cungc a lenmccao. Ngay ta i thiiem obit P (SSPSTAT)cset, ngha l a i e u k i e n Stop ac tao ra. Sau motkhoangthigian TBRG na,bit PENt ongcxoavacnga tSSPIF cset.

Hnh 2.34 Gianoxung I2C Master mode trong quatrnh tao ieukienStop.

etao c dieukienStart laplai lientuc trong quatrnh truyen dlieu, trchet

canset bitRSEN (SSPCON2). Sau khi set bit RSEN, pin SCL c a xuongmclogicthap,pin SDA ca lenmclogic cao, BRG la yg i a t r t thanh ghi SSPADD vaoebatyauqua trnh em. Sau khoang thigian TBRG, pin SCL cungc a lenmclogic caotrong khoangthigian TBRG tieptheo. Trong khoangthigian TBRG ketiep,pin SDA lai ca xuongmclogic thaptrong khi SCL vanc gi mclogic cao. Ngay th i iem o bit S(SSPSTAT) c set ebaohieu ieu kien Start c hnh thanh,bit RSEN t ong cxo ava cnga t SSPIF s e c set sau motkhoang thigian TBRG na.Lucnaya ch cuaI2C Slave c o t h e c a vaothanh ghi SSPBUF, sau o ta chviec a tiep a chhoacdlieutieptheo vaothanh ghi SSPBUF moikhi nhanc tn hieu t I2C Slave, I2CMaster setongtao tn hieuStart laplai lientuccho quatrnh truyendl ieul i e ntuc.

Canchuy la b a t c m o t trnh tnaosai trong quatrnh tao ieukienStart laplai selamchobit BCLIF cset v a I2C ca vetrang thaiIdle.


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Hnh 2.35 Gianoxung I2C Master mode trong qua trnh tao ieukienStart lientuc.

Xetquatrnh truyen dlieu, xung clock se c a ra t pin SCL vadlieu ca ra t pin SDA. Byte d l i eu au t i en p h a ila byte a chxacnh I2C Slave cangiao t iepv a bit (trong trnghpnay = 0). a utie nca cgia tr a ch se c a vaothanhghi SSPBUF, bit BF t ongc set len1 v a b o em tao xung clock noitiep BRG (Baud

Rate Generator) bata uho at o n g.Khi o t n gbit dlieu(hoaca c h v a bit ) secdch ra ngoaitheo tngcanh xuon gcuaxung clock sau khi canh xuongautiencuapin SCLc nhandien(ieukienStart), BRG ba t au e m ngc ve0. Khi t a t c a c a cbit cuabytedlieu c ac a ra ngoai,boe m BRG mang gia tr 0. Sau o,tai canh xuongcua

xung clock t h 8, I2C Master s e ngng tacong lenpin SDA echi tn h i e u t I2CSlave (tn hieuxung ). Tai canh xuongcuaxung clock th 9, I2C Master selaymautnh i e u t pin SDA ekiem tra xem a chac I2C Slave nhandang cha, trang thaic a vaobit ACKSTAT (SSPCON2). Cungtai th iiemcanh xuongcuaxung clockt h 9, bit BF c t ongclear, c n g a tSSPIF c set v a BRG tam ngng hoat ongchot ikhi d lieuhoacachtieptheo ca vaothanh ghi SSPBUF, d l i eu h o ac a c h s e tieptuc c truyeni taicanhxuongcuaxung clocktieptheo.


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Hnh 2.36 Gianoxung I2C Master mode trong quatrnh truyend lieu.

Xetquatrnh nhan dlieu c h e o I2C Master mode. Trctien ta canset bit chophe p nha n d lieuRCEN (SSPCON2). Khi o BRG ba ta u qu atrnh e m , d li e u s e c dch vaoI2C Master qua pin SDA tai canh xuong cuapin SCL. Tai canh xuong cuaxung clock t h 8, bit c h ieu cho phepnhan RCEN tongc xoa,dlieutrong thanh ghiSSPSRc a vaothanh ghi SSPBUF, c h ieu BF c set, c n g a tSSPIF c set, BRG

ngng em vapin SCL c a vemc logic thap.Khi o MSSP trang thaitam ngnghoat onge chi lenh tiep theo. Sau khi oc giatr thanh ghi SSPBUF, c h ieu BF t ong cxoa.Ta c onc o the g itn hieu ban gca chset bit ACKEN (SSPCON2).


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Hnh 2.37 Gianoxung I2C Master mode trong quatrnh n h a nd lieu.

2.13 CONGGIAO TIEPSONG SONG PSP (PARALLEL SLAVE PORT)

Ngoa icaccongnoitiepvacacgiao iennoitiepc trnh b a y phantren ,vi ieukhien PIC16F877A c o nc h o tr motcong giao tiepsong song vachuan giao tiepsongsong thongqua PORTD v a PORTE. Do congsong song ch hoatong c h e o Slave modenenvi ieukhienkhi giao tiepqua giaodien naysechu s ieukhiencuathietb benngoa ithong qua c a cpin cuaPORTE, trong khi d lieus e c ochoacghi theo dang batongbothongqua 8 pin cuaPORTD.

Bit ieukhienPSP l a PSPMODE (TRISE). PSPMODE c set sethiet lapchcnangcacpincuaPORTE l a c a cpin cho ph epoc dlieu ( ), cho phe pghi d

lieu ( ) v a pin chon vi ieukhien ( ) phuc vu cho viec truyennhan d l i e u song song thongqua bus d l i e u 8 bit cu aPORTD. PORTD lucnayongvai t r o l a thanh ghi chotd lieu8 bit, ong thitacong cuathanh ghi TRISD cungse cboquado PORTD l u c n a y chu s ieu khiencuac ac thiet b ben ngoai.PORTE vanchu s tacong cuathanh ghi TRISE, do o c a n x a claptrang thaicacpin PORTE l a input bang cachset c a cbit TRISE. Ngoaira cana giatr thch hp c ac bit PCFG3:PCFG0 (thanh ghi


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ADCON1) e a nnh c a cpin cuaPORTE lac a cpin I/O dang digital (PORTE c o nlac a cpin chcnangcuakhoiADC).

Khi c a cpin v a c u n g mcthap, dlieut b e n n g o a i s e c ghi lenPORTD. Khi mot trong hai pin tren chuyenlenmclogic cao, c hie ub a od l ie u trongbuffer a a y BIF (TRISE) c set v a c n g a t PSPIF (PIR1) c set e ba ohieu ket thucghi dlieu. Bit BIF chcxoa v e 0 khi d li e u v a nhan c PORTD c oc vao.Bit ba ohieu d l ieunhan c trong buffer b tra n IBOV(TRISE) s e c set khi vi ieu khiennhan tiep dlieu tiep theo trong khi cha o c vaodl ieu a nhanctrco.

Khi c a cpin v a c u n g mc logicthap,bit ba ohieubuffer truyen d l ie u a a y BOF (TRISE) sec xoangay laptcebaohieu PORTD a sansangcho quatrnh oc dlieu. Khi mottrong hai pin trenchuyensang mclogic cao, c nga tPSPIF

Hnh 2.38 S okhoicuaPORTD v a PORTE khi hoatong ch e o PSP Slave

mode.sec set ebaohieuquatrnh oc dlieuhoantat.Bit BOF vanc gi mclogic 0cho enkhi d lieutieptheo ca vaoPORTD.

Canchuy l a ngatSSPIF c ieukhien bibit PSPIE (PIE1) va pha ic xo abangchngtrnh.

Cacthanh ghi lienquan enPSP bao gom:

Thanh ghi PORTD (ach08h): c h adl ieuc a n o c h o a cghi.Thanh ghi PORTE (ach09h): ch agia trcacpin PORTE.

Thanh ghi TRISE (ach89h): chacacbit ieu khienPORTE v a PSP.Thanh ghi PIR1 (ach0Ch): c h ac nga tPSPIF.Thanh ghi PIE1 (ach8Ch): chabit chophepng atPSP.Thanh ghi ADCON1 (ach9Fh): ieukhienkhoiADC taiPORTE.

Chi tietvec a cthanh ghi sec trnh b a yc u t h e phu lu c2.


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2.14 TONGQUAN V E M O TS O ACTNH C U ACPU.

2.14.1 CONFIGURATION BIT

a y l a c a cbit dunge la chon cacactnh cuaCPU. Ca cbit nayc chatrongb o n h chng trnh tai a c h 2007h v a c h c o th e c truy xuattrong quatrnh laptrnhcho vi ieukhien.Chi tietvecacbit naynh sau:

Bit 13 CP: (Code Protection)1: t a tcheobaovemachng trnh.0:b a tch e o b a ov e m a chng trnh.

Bit 12, 5, 4: khongquan t a m v a cm a c n h mang giatr0.Bit 11 DEBUG (In-circuit debug modebit)

1:khongchophep,RB7 v a RB6 cxem nh c a cpin xuatnhapbnh thng.0:chophe p,RB7 v a RB6 l a c a cpin cs dungcho quatrnh debug.

Bit 10-9 WRT1:WRT0 Flash Program Memory Write Enable bit11: Tatchcnangchongghi, EECON seieukhienquatrnh ghi lentoanbo

nhchngtrnh.10: chchongt a c h 0000h:00FFh.01: chchongghi t a c h 0000h:07FFh.00: chchongghi t a c h 0000h:0FFFh.

Bit 8 CPD Data EEPROM Memory Write Protection bit1: Tatchcnangba ov e m a c u aEEPROM.0: Batchcnangbaovema.

Bit 7 LVP Low-Voltage (Single supply) In-Circuit Serial Programming Enable bit1: Cho phe pcheo napienaptha p ,pin RB3/PGM c s dung cho c h e o

nay.0: Khongcho phe pcheonap ienaptha p ,ienapcao ca v a ot pin

, pin RB3 l a pin I/O bnh thng.Bit 6 BODEN Brown-out Reset Enable bit

1: chophepBOR (Brown-out Reset)

0: khongchophepBOR.Bit 3 Power-up Timer Enable bit

1: khongchophepPWR.0: chophepPWR.

Bit 2 WDTEN Watchdog Timer Enable bit1: chophepWDT.0: khongchophepWDT.


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Bit 1-0 FOSC1:FOSC0 la chonloaioscillator11: s dungRC oscillator.10: s dungHS oscillator.01: s dungXT oscillator.00: s dungLP oscillator.

Chi tietvecacactnh sec ecapcuth etrong cacphantieptheo.

2.14.2 CACACTNH C U AOSCILLATOR

PIC16F877A c okha na ngs dungmottrong 4 loaioscillator, o la :LP: (Low PowerCrystal).XT: Thachanh bnh thng.HS: (High-Speed Crystal).

RC: (Resistor/Capacitor) dao ongdo machRC taora.

oivica cloai oscillator LP, HS, XT, oscillatorcganvaovi ieukhienthongqua c a cpin OSC1/CLKI v a OSC2/CLKO.

oiv i ca cngdung khong cancacloai oscillator t o c o cao, ta cothe sdungmach dao ong RC lam nguon cung capxung hoatongcho vi vi ieukhien.Tan so tao ra phu thuocvaocacgia tr ien ap,gia

trientrvatuien,be ncanh o l a sanhhng cua cac yeu to nh nhiet o,chatlngcuacaclinh kien. Hnh 2.39 RC oscillator.

Caclinh kien s dungcho machRC oscillatorpha iba oa mca cgia trsau:3 K < REXT < 100 KCEXT >20pF

2.14.3 C A CC H E ORESET

C o nhieucheoreset vi ieukhien,bao gom:

Power-on Reset POR (Reset khi capnguonhoatongcho vi ieukhien).reset trongquatrnh hoatong.

t c h e o sleep.WDT reset (reset do khoiWDT tao ra trong quatrnh hoatong).WDT wake up t ch e o s

Vi Dieu Khien Pic 1814

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