GaN Comes of Age

S24 December 2010 Supplement 1527-3342/10/$26.00©2010 IEEE

Allen Katz and Marc Franco

Digital Object Identifier 10.1109/MMM.2010.938583

Allen Katz ([email protected]) is with Linearizer Technology, Inc., 3 Nami Lane, Unit C-9, Hamilton, NJ 08550 USA, and The College of New Jersey, PO Box 7718, Ewing, NJ 08628-0718 USA. Marc Franco ([email protected]) is with

RFMD Technology Platforms, Component Advanced Development, 7628 Thorndike Rd. Greensboro, NC, 27409 USA.

Gallium nitride (GaN) devices have been

around for several years, but their im-

pact on commercially available high-

power amplifi ers has only recently

started to be felt. The importance of

these devices on power amplifi er technology is certain

to grow and is already changing the rules for solid-

state power amplifi er design and application. Solid-

state power amplifi ers with wider bandwidths and

higher effi ciencies than considered possible even a few

years ago are now a reality. Novel circuit topologies

combined with GaN’s high-voltage capabilities and

linearization are allowing GaN high-power amplifi ers

to simultaneously achieve both linearity and record

high effi ciency. Greater than several hundred watts of

power, over multioctave bandwidths with power-add-

ed effi ciencies (PAEs) of greater than 60% and PAEs

topping 90% for more modest bandwidths are now

regularly being achieved [1], [2]. Even at frequencies

greater than 10 GHz, PAEs of greater than 60% are now

being reported [3]. This article will review develop-

ments in GaN high-power amplifi er technology for the

RF and microwave frequencies. The different types of

GaN power devices will be discussed, recent advances

GaN Comes of Age

December 2010 Supplement S25

in GaN high-power amplifi er bandwidth, effi ciency

and operating frequency will be focused upon, and

two example GaN high-power amplifi ers, one show-

ing very high effi ciency and the other very wide band-

width with excellent effi ciency, will be presented in

more detail.

© PHOTODISC

TABLE 1. Comparison of device material properties.

MaterialBand Gap Energy eV

Breakdown E Field MV/cm

Mobility cm2/V/s

Saturated Velocity cm/s

Thermal Conductance W/cm/°K

Gallium nitride 3.4 3.0 1,500 2.7 3 107 1.5

Silicon 1.1 0.3 1,300 1.0 3 107 1.5

Gallium arsenide 1.4 0.4 6,000 1.3 3 107 0.5

Material Considerations

The attractiveness of

GaN devices is primarily

due to the advantages of GaN in

comparison to other solid-state device

materials [4]. Table 1 summarizes the key

parameters of the three most popular power

amplifier device materials (silicon, gallium arsenide,

and GaN).

It can be seen from Table 1 that GaN offers sig-

nificantly greater band gap energy and breakdown

field intensity, which translates into a higher operat-

ing voltage. Higher drain voltages allow GaN power

devices to be operated with an output impedance

closer to 50 V than other devices, that is, requiring

less difference between the input and output imped-

ances of the matching networks. Since Z is pro-

portional to V2 for a fixed power level, an increase

in drain voltage from 10 V to 50 V increases Z by a

factor of 25. For a gallium arsenide power ampli-

fier with a real output impedance of about 2 V, this

voltage increase results in an output impedance of

very near 50 V. GaN’s higher impedance results in

the ability to more easily produce power amplifiers

with much wider bandwidths. The loss of a matching

network is related to the difference between its input

and output impedances. The smaller this difference,

the lower an amplifier’s loss and the higher its effi-

ciency. Multioctave GaN high-power amplifiers are

S26 December 2010 Supplement

now available with a reasonable efficiency. In this

article, an example of a decade-bandwidth UHF high-

power amplifier will be highlighted with a worst-case

PAE of nearly 60% [5]. Gallium arsenide high-power

amplifiers typically provide higher efficiencies than

silicon-based devices in similar applications. GaN

devices are now increasing efficiencies an additional

10% or more over gallium arsenide device–based

power amplifiers [6]. These higher efficiencies are

allowing solid-state power amplifiers to be used in

applications where they have not been considered in

the past. In this article, we also show an example of

a GaN field effect transistor (FET) power amplifier

designed for linear applications with a saturated out-

put power PAE near 90% [7].

Higher voltage and a higher saturated velocity

allow GaN devices to produce more power in less

space—higher-power density. There is more than a 5:1

advantage of GaN in power density over gallium arse-

nide and laterally diffused metal oxide semiconductor

(LDMOS), currently the most popular silicon micro-

wave power devices. This means that much-higher-

power amplifiers of significantly smaller size can be

built with GaN devices, as long as a way to remove the

heat can be provided. Here, GaN’s three times higher

thermal conductivity over gallium arsenide (tied with

silicon) and its ability to operate reliably at higher tem-

peratures than gallium arsenide (and silicon) are major

advantages. (At least one manufacturer has developed

a GaN device with a 50 V drain supply that qualifies

for use in space satellite applications.) These proper-

ties, when combined with GaN’s very high efficiency,

can result in high-power amplifiers with a smaller ther-

mal footprint. GaN power amplifiers’ high efficiency

means that less heat may need to be removed from a

GaN high-power amplifier than a smaller gallium arse-

nide power amplifier. For example, the thermal load of

a 100 W GaN solid-state power amplifier with 90% effi-

ciency is equivalent to only a 16.5 W gallium arsenide

power amplifier with 60% efficiency or a 9 W silicon

power amplifier with 45% efficiency.

Mobility is one material constant where GaN

lags behind gallium arsenide. Gallium arsenide has

about a four times larger mobility than GaN, giving

it greater potential at very high frequencies. How-

ever, GaN has a higher saturation velocity, which can

partially offset its mobility disadvantage for high-

frequency and power applications. To date, most

GaN applications have been at UHF and at the lower

microwave bands (1–3 GHz). The two example ampli-

fiers presented here operate at UHF. They show the

highest efficiency and bandwidth percentage of any

GaN power amplifiers reported to date. GaN power

devices do exist for the higher bands, but they do not

yet display the performance edge of GaN at lower

frequencies. There is significant work in progress

to extend GaN’s advantages in high-power ampli-

fiers to the higher microwave bands and even into

millimeter-wave bands. At the 2010 International

Microwave Symposium (IMS), a GaN amplifier was

reported with 100 W of output power and a PAE

of greater than 60% at 4 GHz, and at the 2009 IMS,

another with the same output power was reported

with a PAE greater than 50% at 10 GHz [8], [9].

GaN Device ConsiderationsGaN devices are very similar to silicon lateral N-chan-

nel FETs. They have been fabricated in both enhance-

ment mode and depletion mode. It is also possible to

manufacture P-channel GaN FETs, but their perfor-

mance has been very poor. GaN devices are fabricated

on a base substrate, usually silicon, silicon carbide, or

sapphire, but silicon and silicon carbide are by far the

most common. Silicon carbide is very popular because

of its excellent thermal conductivity but is more expen-

sive than silicon. Adherents of these two flavors will

argue their relative merits. Both types are in wide use;

GaN is grown on the base substrate by using various

methods, including molecular beam epitaxy and metal

organic chemical vapor deposition. In molecular beam

epitaxy, a gallium vapor beam from an effusion cell is

directed to the heated base substrate together with a

beam of activated nitrogen. In metal organic chemical

vapor deposition, the growth is produced by a chemi-

cal reaction. There are many processes currently used

to fabricate GaN devices. The most common is a com-

bination of GaN and/or aluminum-GaN over the base

substrate, as shown in Figure 1.

GaN devices have brought a variety of advantages

to RF power amplifier designers. Since they can oper-

ate at higher voltages, their load line is higher for a

given power level. This results on a smaller imped-

ance transformation required by the output matching

network, which usually reduces its insertion loss and

allows for broader bandwidth designs to be imple-

mented much more easily. In fact, the second example

presented in this article shows how a load impedance

of 50 V, which requires no transformation, can be used

to obtain 30.8–35.7 W of output power across the 100–

1,000 MHz range [5] (see the "Decade-Bandwidth GaN

Power Amplifier" section).

In the early days of GaN semiconductor manu-

facturing, reliability was a concern, with the main

Novel circuit topologies combined with GaN’s high-voltage capabilities and linearization are allowing GaN high-power amplifiers to simultaneously achieve both linearity and record high efficiency.


problems related to trap effects and leakage current

[10]. However, great progress has been made, and now

all the major semiconductor manufacturers offer some

type of fully qualified GaN technology [11], [12]. GaN

devices still can display a change in quiescent current

and associated gain with time that is believed to be

trap related. Under RF drive, the quiescent current

changes instantly in relation to the peak signal level.

When the signal is removed, the quiescent current

(and gain) will hold its new value and slowly return

to the initial level. The time period of this change can

be as long as minutes. Because this time period is so

much longer than usual for modulation or signal enve-

lope variations, it does not normally affect the opera-

tion of a power amplifier. GaN manufactures have

been working to eliminate or at least reduce this effect.

LinearityOne of the difficulties in utilizing GaN devices is their

linearity. The majority of power amplifier applications

today require linear operation. GaN device linearity is

generally not as well behaved as gallium arsenide or

even silicon devices. They tend to display softer gain

characteristics, showing a greater separation (in power)

between saturation and the one-dB compression point.

This condition can reduce GaN’s efficiency advantage

as these devices may need to be operated at a higher

output power backoff and, consequently, at a lower

efficiency. The average power (usually referenced in

backoff relative to saturation) that a high-power ampli-

fier can be operated at is dependent on the linearity

requirement and the ratio of peak envelope power to

average power of the signals to be amplified. This ratio

is often referred to as the peak-to-average ratio (PAR).

Even an ideal linear high-power amplifier (constant

gain and phase to saturation) must be backed off to

achieve a given level of linearity. Figure 2 shows the

backoff required to achieve a specific ratio of carrier-

to-intermodulation (C/I) power in an adjacent chan-

nel for an ideal high-power amplifier with a wideband

code division multiple access (WCDMA) signal with a

PAR of 7.5 dB at 5 MHz offset. This measure is known

as adjacent channel level ratio (ACLR). For an ACLR of

25 dB, which is often required for satellite applications,

a highly linear high-power amplifier need only be

backed off by about 1 dB, and there is little loss in effi-

ciency (less than a 5% drop). If an ACLR of 45 or 50 dB is

required, the output power backoff will be much higher

and the related loss in efficiency will be often unaccept-

able. Real amplifiers with less than ideal linearity will

require additional backoff. To overcome this restraint,

linearization (primarily predistortion linearization) is

frequently used to allow the GaN high-power amplifi-

er’s linearity to approach that of an ideal amplifier [13].

Linearization works well for moderate linear-

ity requirements, but for more stringent linearity

specifications, as already noted, even the most linear

amplifier must be backed off. To overcome this prob-

lem, novel power amplifier architectures have been

developed that allow high-power amplifiers to oper-

ate at high efficiency, even when moderately backed

off. Currently, the two most popular approaches are

Doherty and envelope-tracking (including envelope

elimination and restoration) [14], [15]. Doherty high-

power amplifiers combine two amplifiers in parallel.

One is the main amplifier, which is on all of the time.

The other is the peaking amplifier, which is biased

class-C such that it is only on at signal envelope

peaks. The two amplifiers are driven in quadrature

and combined in a way that, when both amplifiers are

on, their output power is combined, but when backed

Figure 1. Structure of basic GaN N-channel field-effect transistors. The three key elements (source, gate, and drain) are protected with a passivation layer. The gate connects to the channel through a Schottky barrier. The channel is separated from the substrate by a buffer layer that enables the GaN to grow more easily on the thermally conductive but electrically insulating substrate.

Passivation

AlGaN Schottky Barrier

GaN Channel

Si, SiC, or Sapphire

High-Resistivity Substrate

Source DrainGate

AlGaN or AlN Buffer

Figure 2. Minimum output power backoff required by an ideally linear amplifier to achieve a given level of adjacent channel level ratio (ACLR) with a WCDMA signal having a peak-to-average power ratio of 7.5 dB.

25

30

35

40

45

50

55

60

1 2 3 4 5 6 7 8 9 10Output Power Backoff (dB)

AC

LR

(dB

)

GaN offers significantly greater band gap energy and breakdown field intensity, which translates into a higher operating voltage.


off, only the main amplifier is coupled to the output

port (see Figure 3). This condition can be achieved by

recognizing that the output impedance of a power

amplifier changes under drive. The peaking amplifier,

when turned on, is matched to present the appropri-

ate impedance for combining with the main ampli-

fier, but, when off, it presents a high impedance at the

junction combining the two amplifiers. Doherty high-

power amplifiers tend to be limited in bandwidth

(5–10%, even when using GaN devices). But today,

those using GaN are achieving PAEs of greater than

60% at 6 dB backoff [16]. PAE measured from a 2 GHz

high-power Doherty amplifier using a harmonically

tuned, class F main amplifier is shown in Figure 4

[17]. As mentioned above, predistortion linearization

is normally used with Doherty high-power amplifiers

to increase their linearity.

Envelope-tracking amplifiers vary their drain

voltage in proportion to the envelope of their

input signal [18]. When the input signal’s envelope

decreases, the drain voltage decreases to keep the

amplifier always near saturation, and thus oper-

ating at or near its highest efficiency even when

the output level is greatly reduced. Some forms of

envelope-tracking amplifiers use a limiter to elimi-

nate the envelope of the input signal and drive the

power amplifier with a constant amplitude signal.

This form of envelope-tracking amplification is

known as envelope elimination and restoration and is

illustrated in Figure 5. GaN devices’ high drain volt-

age makes them particularly attractive for envelope-

tracking applications. GaN devices can maintain

excellent efficiency over nearly 5:1 drain voltage

ratio, while gallium arsenide devices can only oper-

ate efficiently over about a 3:1 ratio.

The major limitation of envelope-tracking high-

power amplifiers is the frequency response of their

drain modulators, which limits the bandwidth of

the input signal. GaN high-power amplifiers’ higher

drain voltages lower the peak currents and thus

put less demand on the modulator-enabling wider

bandwidths. Envelope-tracking amplifiers are also

limited by the efficiency of the drain voltage modu-

lation circuitry. Because envelope-tracking ampli-

fiers are operated at saturation, they do not need

to be linear, and, therefore, highly efficient switch-

ing amplifier modes (such as class E) may be used.

GaN’s higher drain voltage and low-drain capaci-

tance allows class E amplifiers to be implemented at

higher frequencies than other types of devices. GaN

envelope-tracking amplifiers are being reported

with efficiencies greater than 65% at 2.5 GHz but

without including the loss of the drain voltage mod-

ulator. Because of their complexity and bandwidth

limitations, envelope-tracking high-power amplifi-

ers have not yet been as widely adopted as Doherty

high-power amplifiers. However, many believe that

Figure 3. A Doherty amplifier combines a class B main amplifier with a class C peaking amplifier.

Input

Output

Peak

Main

λ /4

40

45

50

55

60

65

0 1 2 3 4 5 6 7 8 9 10Output Power Backoff (dB)

Pow

er

added

Effic

iency (

dB

)

Figure 4. GaN Doherty high-power amplifiers are achieving power-added efficiencies of greater than 55% at 6 dB output power backoff and 60% near saturation in the 2.5–2.6 GHz frequency band. (Efficiency is based on a continuous wave test signal.)

Figure 5. GaN envelope-tracking high-power amplifiers may be the power amplifier of the future and are presently offering greater than 65% efficiency in the 2–4 GHz band. The system shown employs both envelope elimination and restoration. Other versions may not limit the input signal amplitude and only vary the drain voltage in relation to the signal amplitude. Digital predistortion of both the input signal and the drain voltage is often used to correct for distortion.

E (t )dc Supply

VDD Modulated Supply

Class-S

Modulator

S

Envelope

DetInput

Signal Limiter PA

Higher voltage and a higher saturated velocity allow GaN devices to produce more power in less space—more than a 5 to 1 advantage of GaN in power density over the current most popular silicon microwave power devices.


GaN envelope-tracking high-power amplifiers will

be the preferred high efficiency, linear amplifier

technology in the future [19], [20].

GaN Amplifier Design ExamplesIn the following sections, two high-power ampli-

fiers are presented that illustrate in greater detail

the advantage of GaN devices and show how the

benefits of using GaN devices can be achieved in

practice. The first amplifier was chosen because it is

believed by the authors to be the highest efficiency

linear GaN amplifier reported in the literature. This

amplifier, as well as the second example amplifier, is

at UHF because this frequency range is where GaN

is most mature and where the highest efficiency is

easiest to achieve. In addition, it is a high-power

amplifier design with which the authors are very

familiar. The second example amplifier was chosen

for its very wide bandwidth and excellent efficiency.

This amplifier is believed to be the widest-band

high-power amplifier reported with a PAE of greater

than 50%. It covers a decade of bandwidth and has

the potential of being extended to a two-decade fre-

quency range (0.1–1 GHz). It also covers the UHF fre-

quency range for the same reasons as stated for the

first example.

Linear GaN Power Amplifier with Highest EfficiencyThe first example high-power amplifier was designed

to provide a linear power output of over 60 W, satisfy-

ing the linearity typically required for the transmis-

sion of WCDMA over a satellite link with emphasis on

achieving the highest possible efficiency [1]. Eudyna

(now Sumitomo) EGN90MK GaN power FETs were

selected for use in this high-power amplifier. Two of

these devices, when combined and operated at the

reduced voltage often required for space applications,

can more than provide the desired output power. The

target linearity specifications for a WCDMA signal

in a satellite application required an ACLR of better

than 25 dB. The solid-state power amplifier includes

a linearizer module followed by a two-stage driver

amplifier and a final amplifier. Two versions of the

amplifier were produced. One optimized for high

efficiency in the frequency range of 290–320 MHz and

the other for 360–380 MHz. The data shown here is

for the lower-frequency version. The performance of

both amplifiers was very similar with almost identi-

cal PAEs. Figure 6 shows a block diagram of the solid-

state power amplifier.

The solid-state power amplifier’s driver ampli-

fier module includes a low-level microwave mono-

lithic integrated circuit (MMIC) gain block (in the

linearizer block), followed by a predistortion gen-

erator, a second low-level MMIC gain block, and a

4 W Eudyna EGN04MK GaN power FET amplifier.

The gain and driver stages are used to offset the

losses introduced by the predistortor (about 10 dB)

and to raise the RF signal to the level required to

drive the dual power amplifier stage. Only a 4-W

power driver stage was required because of the high

gain of GaN devices at UHF (greater than 26 dB).

The output of the driver amplifier is split into two

paths by a broadside quadrature hybrid. Each path

goes through a GaN FET power stage and is recom-

bined with a second broadside quadrature hybrid

at the output. Broadside couplers were selected for

the quadrature splitter/combiner due to their low

insertion loss. These couplers were implemented

using a multilayer stripline design and multiple

PC boards. The overall amplifier circuit design

uses microstrip interconnection on Rogers 4003

low-dielectric 32 mil material. Figure 7 shows a

photograph of the assembled amplifier, which is

contained in a 10.16 cm 3 15.24 cm 3 2.54 cm (4 in 3

6 in 3 1 in) aluminum housing. At UHF in particu-

lar, the design of a power amplifier stage’s drain and

gate biasing circuitry can be a challenge. Ideally, the

Figure 6. Block diagram of the linearized GaN solid-state power amplifier for satellite applications [1].

RF In

Amplifier

Amplifier

CouplerCouplerDriverGainLinearizer

Figure 7. Assembled solid-state power amplifier showing GaN field-effect transistors and couplers [1].

High efficiency can be maintained if the drain voltage can be varied to allow the amplifier to operate at the same relative power backoff.


bias networks should exhibit a near-zero impedance

at the signal’s envelope frequencies while maintain-

ing a very high impedance at the signal’s carrier

frequency. If the impedance at the envelope frequen-

cies is greater than zero, undesired ac voltages will

be added to the dc supply voltage, which will result

in the amplitude and phase modulation of the signal

[21]. The sidebands created by both of these modu-

lations will fall exactly where the intermodulation

distortion products would also occur, producing

either reinforcement or attenuation. An additional

problem is that, if there is any delay between the

amplitude modulation and the phase modulation

due to imperfections in the biasing networks, the

sidebands will not be symmetrical at either side of

the carrier [22].

This type of distortion is commonly known as

bias-induced memory effects, and it can be mitigated

by careful design of the biasing networks. A typical

approach consists of using a parallel resonant circuit

tuned at the carrier frequency in series with the sup-

ply voltage. This provides a high impedance at the

carrier frequency and a relatively low impedance

at all other frequencies. The parallel resonator must

employ the minimum attainable, highest possible

quality inductance and a high quality capacitor in

order to minimize the voltage drop and, as a conse-

quence, reduce the modulation of the bias voltage.

Sometimes, several parallel resonators are employed

in a staggered-tuned fashion in order to extend the

bandwidth, across which the amplifier can operate

satisfactorily. The parallel resonant circuit is then fol-

lowed on the power supply side by a very effective

path to ground for all other frequencies implemented

with several low series resistance capacitors whose

series self-resonant frequencies fall across the enve-

lope frequency range [23].

Conventional analog predistortion linearizers

will not correct for memory effect induced distortion.

This condition is especially bad for gallium arsenide

power amplifiers because of their low-drain volt-

age and corresponding high currents. The relatively

lower currents and resulting higher impedances of

GaN power amplifiers eases this problem somewhat,

but bias circuit design still needs to be carefully con-

sidered. Although the amplifier was biased class AB,

it was also found that the impedance of the matching

networks and bias circuits at the second harmonic

frequency were important contributors to ampli-

fier’s efficiency. This form of operation is sometimes

referred to as Class J [24]. The amplifier’s PAE as a

function of output power backoff (from maximum

power) at 305 MHz is shown in Table 2. This table

also shows the RF power output and current draw.

The output stages were operated at a reduced drain

voltage of 40 V for increased reliability and biased at

PAWR, Power Amplifi ers for Wireless and Radio Conference, will take place on January 17th and 18th in Phoenix, Arizona as part of the 2011 Radio Wireless Week. It covers all areas of RF/microwave power amplifi er technology with special attention on achieving high effi ciency and linearity.

Power amplifiers are often the most critical component of RF/microwave communications systems and are, consequently, the focus of intense research so that increased linearity and power efficiency may be achieved. New forms of power amplification are being developed to meet the needs of the wireless communication equipment industry and the world’s demand for greater information transmission. RWS 2011 will feature a special two-day archival session track on RF/microwave Power Amplifiers. Papers will feature innovative work in the following areas of RF/microwave power amplifier technology:

• high-power/wideband active devices• power amplifiers for mobile, avionics and space

• modeling and characterization• power amplifier technology• advanced circuit design and topologies• green power amplifier technology• integration technology• packaging and reliability• linearization and efficiency enhancement techniques• applications, novel architectures and system

analysis.The impact of Gallium nitride (GaN) devices

on wireless and radio power amplifiers has only recently started to be felt but is already changing the rules for solid-state power amplifier design and application. Solid-state power amplifiers that have wider bandwidth and higher efficiencies considered even possible just a few years ago are now a reality. The importance of these devices is certain to grow. Many of the PAWR conference papers involve the use of GaN devices in power amplifiers and the effect of this technology on power amplifier applications.

—Allen Katz and Marc Franco, cochairs IEEE PAWR

2011 IEEE Topical Conference on Power Amplifiers for Wireless and Radio Applications

Conventional analog predistortion linearizers will not correct for memory effect induced distortion.

Digital Object Identifier 10.1109/MMM.2010.939503


a 2.5 A quiescent current. The PAE at sat-

uration was over 85%. At this voltage, the

power amplifier produced a maximum

power level and efficiency at the high end

of the band of 115 W and 87%, respec-

tively. Figure 8 shows the PAE across the

30 MHz operating band. More than 60%

PAE is achieved across the band up to

a 2.5 dB output power backoff. All effi-

ciency figures are for continuous wave

(CW) signals. Under multicarrier and

modulated signal excitation, GaN power

amplifier efficiency tends to improve as

is observed for gallium arsenide power

amplifiers [25].

It is often desirable to operate a solid-

state power amplifier at different drain

voltage levels for applications as in

envelope-tracking. For satellite applica-

tions, the required power can change with

time. High efficiency can be maintained

if the drain voltage can be varied to allow

the amplifier to operate at the same rela-

tive power backoff. Figure 9 shows that the solid-state

power amplifier’s efficiency is maintained at different

drain voltage levels. An efficiency of near 70% is main-

tained to below 20 V.

Figure 10 shows that with a single-carrier

WCDMA modulated signal, an ACLR of 25 dB can

be achieved at an output power backoff of approxi-

mately 1.2 dB from saturation. This result means that

this amplifier can be operated with a PAE of about

80% and still comply with the linearity needed for

many satellite communications applications. This

level well exceeded our design expectations. Upper

and lower channel ACLR symmetry showed that

the bias circuit design was working as anticipated

and not introducing undesired memory effects, as

discussed earlier in this section on linearity. For

the desired 25 dB ACLR, 1 dB in additional output

power, and a 10% increase in PAE were gained by

the use of linearization. Two-tone C/I ratio is one of

the most common measures of amplifier linearity.

Figure 11 shows that, at a 2 dB output power back-

off, a C/I of 23 dB is achieved. This C/I level is very

TABLE 2. UHF GaN satellite solid-state power amplifier power added efficiency.

Output power backoff (dB) Pin (dBm) Po (dBm) VDC IDC PAE (%)

0 226.9 50.4 40.03 3.19 85.87

1 231.8 49.4 40.07 2.82 77.08

2 234 48.4 40.11 2.53 68.18

3 235.5 47.4 40.14 2.27 60.31

4 236.8 46.4 40.17 2.05 53.01

5 237.7 45.4 40.19 1.88 45.89

6 238.5 44.4 40.20 1.77 38.71

7 239.5 43.4 40.21 1.73 31.45

8 240.5 42.4 40.20 1.76 24.56

9 241.5 41.4 40.20 1.80 19.08

10 242.6 40.4 40.19 1.85 14.75

Figure 8. Power added efficiency as a function of output power in dB with respect to a milliwatt at low, mid and high frequency points. The amplifier was biased at 40 V with a quiescent current of 2.5 A [1].

P2 UHF SSPA PAE (40 V, 2.5 A)

0102030405060708090

100

40 41 42 43 44 45 46 47 48 49 50 51

Pout (dBm)

Effi

cien

cy (

%) 290-MHz Eff (%)

305-MHz Eff (%)320-MHz Eff (%)

Figure 9. Saturated output power and power added efficiency as a function of drain voltage for a continuous wave signal [1].

10090807060504030

Effic

iency (

%)

20100

200180160140120100

PO

ut (W

)

806040200

20 25 30 35 40 45

Vd (V)

50

dc Efficiency and Power Versus Drain Voltage

Eff dc Po watts

GaN UHF SSPA ACLR (±5 MHz)and PAE (40 V, 2.5 A)

10.0015.0020.0025.0030.0035.0040.0045.00

1 2 3 4 5 6 7 8 9 10Output Power Backoff (dB)

AC

LR (

dB)

1525354555657585

PAE

(%

)

ACLR L/SSPAACLR SSPAPAE %

Figure 10. Adjacent channel power ratio (ACLR) and power added efficiency as a function of output power backoff for a WCDMA signal having a peak to average power ratio of 7.5 dB with and without linearization [1].


close to that achieved by an ideal amplifier. Power

amplifier linearity with many carriers is often a

major concern. Figure 12 shows the amplifier’s C/I

performance for output power backoffs of 2–8 dB

when excited by ten randomly phased CW carriers

of equal power, each spaced 1 MHz apart. A worst

case C/I of about 20 dB was achieved at 2 dB out-

put power backoff. This linearity is very close to the

theoretical limit.

Decade-Bandwidth GaN Power AmplifierThe second GaN high-power amplifier example was

designed to provide more than 100 W of power over

a decade-bandwidth [5]. It has a gain of 15.5–18.6 dB

with 104–121 W of output power at a PAE of 58–75%

over the frequency range of 100–1,000 MHz. This

power amplifier is 5.1 cm 3 5.1 cm (2 in 3 2 in) in size

and combines four 30 W hybrid amplifier modules,

each containing an RFMD GaN high electron mobil-

ity transistor (HEMT) on silicon carbide (SiC) device in

ceramic SO8 package, operating at a 48 V drain voltage.

Each of the individual devices is fully matched to 50 V

using gallium arsenide integrated passive matching cir-

cuitry, and producing 30.8–35.7 W with a 68–79% drain

efficiency over the band. A low-loss broadband coaxial

balun is used to transform an unbalanced 50 V load

into two 25 V impedances that are 180º out of phase,

as shown in Figure 13. Each of these 25 V loads is then

driven by a pair of hybrid devices. The 50 V hybrids

are connected in parallel to match the 25 V load. A simi-

lar balun is used at the input side to create the out-of-

phase 25 V input impedances needed to match the load

provided by two 50 V devices connected in parallel.

The GaN HEMT devices were fabricated using

RFMD’s aluminum-GaN HEMT process that incorpo-

rates 0.5 µm gate length devices and advanced source

connected field plates for breakdown voltages in excess

of 175 V. A SiC substrate is used for its excellent thermal

conductivity, decreased temperature-related memory

effects, and high-power density capability. The device

Figure 12. The linearity of a power amplifier with multiple carriers is often a major concern. The graph shows the amplifier’s carrier-to-intermodulation (C/I) performance with ten randomly phased, equal-power continuous-wave (CW) carriers, spaced 1 MHz part for output power backoff levels from 2 to 8 dB [1].

40

35

C/I

(dB

c)

30

25

20

15

Ten Carrier (C /I )

2 3 4 5 6 7 8Output Power Backoff (dB)

Figure 13. Schematic diagram of the 100 W decade-bandwidth high efficiency GaN amplifier [5].

RF In RF Out

Vd

VdVg

25 Ω

25 Ω

25 Ω

25 Ω

Figure 11. Two-tone carrier-to-intermodulation (C/I) ratio is one of the most common measures of amplifier linearity. This figure shows that at a 2 dB output power backoff, the amplifier achieves a C/I of 23 dB. This level is very close to that achieved by an ideal amplifier [1].

Atten 20 dB

RL 4.0 dBm 10 dB/

ΔMKR –23.16 dB –980 kHz

Center 305.00 MHz SPAN 10.00 MHzSWP 84.0 msRBW 100 kHz

ΔMKR –980 kHz

–23.16 dB

VBW 3.0 kHz

GaN is now providing solid-state power amplifiers of higher efficiency, bandwidth and power density than could be achieved only a few years ago.


current and power gain cut-off frequencies ( ft and fmax),

measured on 2.2 mm periphery devices, including the

bond-pad parasitic, are 11 GHz and 17 GHz, respectively

at a 48 V drain voltage and 44 mA bias current.

To obtain the wide bandwidth, several balun designs

were evaluated over the frequency range from a few

megahertz to several gigahertz [26], [27]. The design

selected was optimized to handle a high power of up to

100 W and have low loss over the 10 to 1,000 MHz band.

A 50 V coaxial cable with a loss of 0.2 dB/m and capable

of handling 162 W at 1 GHz was used along with a dual-

aperture core high-frequency ferrite bead from Fair-Rite

Products Corp. It provided sufficient bandwidth while

conserving space. The ferrites act like chokes to force

equal and opposite current in the inner and outer con-

ductors and isolate the 180º output ter minal from the

input ground terminal. Two baluns were built and con-

nected back-to-back to characterize their performance.

They showed about 0.5–0.6 dB insertion loss and bet-

ter than a 20 dB return loss from 50 to 1,000 MHz. The

lower cut-off could be further improved to cover down

to 10 MHz by adding additional lower-frequency fer-

rites, which was not attempted.

Figure 14 shows a photograph of the ampli-

fier. The four hybrid devices were first individually

tested before installation on the board. Each device is

matched to 50 V at the input and drives a 50 V load at

the output. The gate bias feeds to the devices are iso-

lated using a 470 V resistor and jumpered to the gate

power supply. An 82 nH high-Q bias inductor was

used at the drain of each device, and the bias feed was

jumpered to the drain power supply through a 115 V

(at 100 MHz) impedance ferrite. This approach of sepa-

rate bias chokes and dc blocking capacitors was used to

keep each hybrid identical. The top and bottom halves

of the amplifier were then connected to the differential

ends of the coaxial balun using 25 V traces. A similar

approach was used at the input. The board is soldered

down to a copper slug and mounted to an aluminum

heat sink with fins. No tuning was required, as each

of the devices was previously characterized under

the same matching conditions. The input and output

return losses were better than 9 dB and 7 dB, respec-

tively, over the band. The output power and PAE with

a CW test signal as a function of frequency are shown

in Figure 15. Figure 16 shows the gain over the band at

power levels of 1, 10, and 100 W, respectively and pro-

vides an indication of the amplifier’s linearity.

ConclusionGaN is now providing solid-state power amplifiers of

higher efficiency, bandwidth, and power density than

could be achieved only a few years ago. Novel circuit

topologies combined with GaN’s high-voltage capa-

bilities and linearization are allowing GaN high-power

amplifiers to simultaneously achieve both linearity

and record high efficiency. GaN high-power amplifiers

have been produced with more than 100 W of power

over multioctave bandwidths and with PAEs of more

than 60%. Narrower-band high-power amplifiers have

been produced with PAEs of more than 90%.

Figure 14. 100 W decade-bandwidth GaN amplifier showing four hybrid devices and coaxial baluns [5].

Figure 15. 100 W decade-bandwidth GaN amplifier’s Pout at 3 dB compression and power added efficiency for a continuous-wave test signal [5].

52

51

50

49

80

70

60 PA

E (

%)

50

P3dB

(dB

m)

0.0 0.2 0.4 0.6 0.8 1.0

P3dBPAE

Frequency (GHz)

Figure 16. Measured gain of the decade-bandwidth GaN amplifier at 1, 10, and 100 watts output power for a continuous-wave test signal [5].

21

18

15

12

9

6

3

00.0 0.2 0.4 0.6

Frequency (GHz)

Gain

(dB

)

0.8 1.0

1 W

10 W100 W


This article shows, as an example, a highly efficient

UHF solid-state power amplifier using GaN FETs

developed for use in space. This solid-state power

amplifier provides more than 60 W of linear output

power over a 30 MHz frequency band. When driven

by a WCDMA signal, it achieved an ACLR of 25 dB,

at an output power of 80 W with a PAE of near 80%,

21.25 dB greater than the target linear power. A satu-

rated PAE of greater than 85% was measured. Its per-

formance shows that the combination of predistortion

linearization and high-voltage GaN devices can pro-

vide both linearity and very high efficiency. A very

broadband 100 W GaN high-power amplifier was

also shown. This amplifier operated over a decade

of frequency from 100 to 1 GHz with a minimum

PAE across the full band of nearly 60%. Their excep-

tional performance makes GaN devices particularly

attractive for a wide range of applications at UHF and

microwave frequencies.

AcknowledgmentsThe authors wish to thank Karthik Krishnamurthy

and his associates at RFMD for use of portions of their

2010 IMS GaN amplifier paper and Allan Guida, Brian

Eggleston, and David McGee at Linearizer Technol-

ogy, Inc. for their advice and support.

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GaN Comes of Age

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