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Charles Kime & Thomas Kaminski

2008 Pearson Education, Inc.

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Chapter 6

SelectedDesign Topics

Part 4 Programmable Implementation

Technologies

Logic and Computer Design Fundamentals

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Chapter 6 - Part 4 2

Overview

Part 4Teknologi Implementasi Terprogram

Mengapa logika terprogram?

Teknologi terprogram

Read-Only Memories (ROMs)

Programmable Logic Arrays (PLAs)

Programmable Array Logic (PALs)

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Mengapa logika terprogram?

Fakta: Lebih ekonomis untuk menghasilkan IC dalam jumlah yang

besar.

Hampir semua desain hanya membutuhkan jumlah IC yang

sedikit.

Kebutuhan IC dapat seperti : Dihasilkan dalam jumlah besar.

Menangani banyak desain yang mnembutuhkan sedikit IC.

Bagian logika terprogram seperti: Dibuat dalam jumlah besar

Diprogram untuk implementasi jumlah yang besar dari

perbedaan desain low-volume

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Programmable Logic - More Advantages

Banyak programmable logic devices adalah field-

programmable, yaitu, dapat diprogram diluar pabrik

(manufacturing environment)

Hampir semua programmable logic devices dapat dihapus

(erasable) dan diprogram ulang (reprogrammable)

Memperbolehkan updating devais atau koreksi errors

Memperbolehkan penggunaan kembali devais untuk desain yang

berbeda - the ultimate in re-usability!

Sangat ideal untuk pelajaran di laboratorium.

Programmable logic devices dapat dipakai sebagai desainprototype yang akan di-implementasikan untuk penjualan

regular ICs.

Complete Intel Pentium designs were actually prototyped with

specialized systems based on large numbers of VLSI programmable

devices!

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Teknologi Pemrograman

Teknologi pemrograman dipakai untuk: Pengontrolan hubungan

Membangun lookup tables

Pengontrolam switching transistor

Teknologi-nya

Pengontrolan hubungan

Mask programming

Fuse

Antifuse

Single-bit storage element

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Teknologi-nya Membangun lookup tables

Elemen Penyimpan (seperti pada memory)

Pengontrolam switching transistor Pengisian tersimpan pada floating transistor gate

Erasable

Electrically erasable

Flash (as in Flash Memory)

Elemen Penyimpan (seperti pada memory)

Teknologi Pemrograman

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Karakteristik Teknologi

Permanen-Tidak dapat dihapus dan diprogram ulang

Mask programming

Fuse

Antifuse

Diprogram ulang VolatileProgram hilang bila tegangan pada chip mati.

Single-bit storage element

Non-Volatile - Program tidak hilang bila teganganpada chip mati.

Dapat dihapus

Dihapus secara Elektrikal

Flash (as in Flash Memory)

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Konfigurasi Terprogram

Read Only Memory (ROM)suatu larik fix dari

gerbang AND dan larik terprogram dari gerbangOR.

Programmable Array Logic (PAL)- suatu larikterprogram dari gerbang AND yang masuk kelarik fix dari gerbang OR .

Programmable Logic Array (PLA) - suatu larikterprogram dari gerbang AND yang masuk kelarik terprogram dari gerbang OR.

Complex Programmable Logic Device (CPLD)/Field- Programmable Gate Array (FPGA)cukupkompleks untuk disebut architectures LihatVLSI Programmable Logic Devices reading supplement

PAL is a registered trademark of Lattice Semiconductor Corp.

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Konfigurasi ROM, PAL and PLA

(a) Programmable read-only memory (PROM)

Inputs FixedAND array(decoder)

ProgrammableOR array Outputs

ProgrammableConnections

(b) Programmable array logic (PAL) device

Inputs ProgrammableAND array

FixedOR array

OutputsProgrammable

Connections

(c) Programmable logic array (PLA) device

InputsProgrammable

OR arrayOutputs

ProgrammableConnections

Programmable

Connections

Programmable

AND array

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Read Only Memory

Read Only Memories (ROM) atau ProgrammableRead Only Memories (PROM) mempunyai:

N baris input,

M baris output, dan

2N decoded minterms.

Larik Fix AND dengan 2N output menerapkan

semua N-literal minterms.

Larik terprogram OR dengan M baris outputmembentuk sampai M ekspresi sum of minterm.

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Read Only Memory

Suatu program untuk ROM atau PROM adalahtabel kebenaran dari multiple-output yang

sederhana.

Bila masukan 1 , terbentuk hubungan antara

corresponding minterm untuk correspondingoutput

Bila masukan 0, tidak ada hubungan terbentuk.

Dapat dilihat sepertimemory dengan inputsebagaiaddressesdata (output values), sehingga

bernama ROM atau PROM !

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Contoh: Suatu 8 X 4 ROM (N = 3 baris input, M= 4 baris output)

Larik fix "AND" adalah suatu

decoder dengan 3 inputs dan 8

output minterms.

Larik terprogram ORmenggunakan baris tunggal

untuk merepresentasikan semua

input ke gerbang OR. Suatu X

pada larik berkaitan denganpenempatan minterm pada OR

Untuk input (A2,A1,A0) = 011, output adalah (F3,F2,F1,F0 ) = 0011.

What are functions F3, F2 , F1 and F0 in terms of (A2, A1, A0)?

Contoh:Read Only Memory

D7

D6

D5D4

D3

D2

D1D0

A2

A1A0

A

B

C

F0F1F2F3

X XX

XX

X

X

XX

X

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Programmable Array Logic (PAL)

PAL adalah kebalikan dari ROM, yang mempunyaiprogrammable set AND dikombinasikan fixed OR.

Kerugian

ROM akan menghasilkan M fungsi dari N input. PAL

mungkin mempunyai input lebih sedikit ke gerbang OR.inputs.

Keuntungan

PAL dapat mempunyai N dan M lebih besar.

Beberapa PAL mempunyai output yang dapat dikomplemenkan, penambahan fungsi POS

Tidak ada implementasi rangk multilevel pada ROM (withoutexternal connections from output to input). PAL mempunyaioutputs dari OR term,sebagai internal input ke semua AND

term, membuat implementasi rangk multi-level lebih mudah.

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Contoh : Programmable Array Logic

4-input, 3-output PALwith fixed, 3-input OR

terms

What are the equations

for F1 through F4?F1 = +

F2 = B + AC + AB

F3 =

F4 =

0 91 2 3 4 5 6 7 8

AND gates inputs

0 9

Productterm

1

2

3

4

5

6

7

8

9

10

11

12

F1

F2

F3

F4

I35 C

I25 B

I1 A

1 2 3 4 5 6 7 8

I4

X X

X X

XX X

X X

X

X

X

XX

X

X X

X

X X

B CA

A C

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Programmable Array Logic Example

X

XX

XX

XX

X XX

X X X

XX X

X X X

AND gates inputs

A C WProduct

term

1

2

3

4

5

6

7

8

9

10

11

12

A

B

C

D

W

F1

F2

All fuses intact

(always 5 0)

XFuse intact

X

A B B C D D W

A C WA B B C D D W

1 Fuse blown

F1 =

ABC+ABC+ABC+

ABC

F2 = AB + BC + AC

W = ABC + ABC

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Productterm

ANDInputs

OutputsA B C D W

1

2

3

W = C

4

5

6

F1 = X = A

+ B + W

7

8

9

10

11

12

A B

C

+ ABC

F2 = Y

= AB + BC +AC

B CA

1

0

0

1

0

0

1

0

1

0

1

1

1

1

1

1

1

1

1

Equations: F1 = A + B + C + ABC

F2 = AB + BC + AC

F1 must be

factored

since four

terms

Factor out

last twoterms as W

A BB C C A

Programmable Array Logic Example

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Programmable Logic Array (PLA)

Compared to a ROM and a PAL, a PLA is themost flexible having a programmable set ofANDs combined with a programmable set ofORs.

Advantages

A PLA can have large N and M permittingimplementation of equations that are impracticalfor a ROM (because of the number of inputs, N,required

A PLA has all of its product terms connectable to alloutputs, overcoming the problem of the limitedinputs to the PAL Ors

Some PLAs have outputs that can be complemented,

adding POS functions

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Programmable Logic Array (PLA)

Disadvantages Often, the product term count limits the application

of a PLA.

Two-level multiple-output optimization is requiredto reduce the number of product terms in animplementation, helping to fit it into a PLA.

Multi-level circuit capability available in PAL notavailable in PLA. PLA requires externalconnections to do multi-level circuits.

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Chapter 4 19

Programmable Logic Array

The set of functions to be implemented must fit theavailable number of product terms

The number of literals per term is less important in

fitting

The best approach to fitting is multiple-output, two-level optimization (which has not been discussed)

Since output inversion is available, terms can

implement either a function or its complement

For small circuits, K-maps can be used to visualizeproduct term sharing and use of complements

For larger circuits, software is used to do the

optimization including use of complemented functions

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Programmable Logic Array Example

3-input, 3-output PLA

with 4 product terms

What are the equations for F1 and F2? Could the PLA implement the

functions without the XOR gates?

Fuse intact

Fuse blown

1

F1

F2

X

A

B

C

C C B B A A 0

1

2

3

4X

XX

X X

X

X

X

X

X

X

X

X

X A B

A C

B C

A B

X

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Chapter 4 21

Programmable Logic Array Example

K-mapspecification

How can this

be implemented

with four terms?

Complete the

programming tableOutputs

1

2

3

4

F2

1

1

1

AB

AC

BC

Inputs

1

1

C

1

1

A

1

1

B

PLA programming table

(T)F1

( )Productterm

F1 = A BC + A B C + A B C

F1 = AB + AC + BC + A B C

0

C

0

1

0 1

0 0

00 01 11 10BCA

0

B

1

1A

0

C

0

1 0

1 1

00 01 11 10BCA

1

B

0

1A

F2 = AB + AC +BC

F2 = AC + AB + B C

0

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Chapter 4 22

Lookup Tables

Lookup tables are used for implementing logicin Field-Programmable Gate Arrays (FPGAs)

and Complex Logic Devices (CPLDs)

Lookup tables are typically small, often with

four inputs, one output, and 16 entries

Since lookup tables store truth tables, it is

possible to implement any 4-input function

Thus, the design problem is how to optimallydecompose a set of given functions into a set of

4-input two- level functions.

We will illustrate this by a manual attempt

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Chapter 4 23

Lookup Table Example

Equations to be implemented:F1(A,B,C,D,E) = A D E + B D E + C D E

F2(A,B,D,E,F) = A E D + B D E + F D E

Extract 4-input function:F3(A,B,D,E) = A D E + B D E

F1(C,D,E,F3) = F3 + C D E

F2(D,E,F,F3) = F3 + F D E The cost of the solution is 3 lookup tables

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Chapter 6 Part 4 24

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