ACKNOWLEDGEMENTS
A huge thank you to Dr. Marıa Petrie, a friend and confidante. I am always amazed
at how you get it all done, always patient with the continuous hordes of Logic Design
Students, while balancing the administration of LACCEI and your own research including
remote labs.
Dr. Bassem Alhalabi, I thank you for you pioneering work on remote labs that has
inspired so many students to pursue this area.
Thank you, Drs. Amir Abtahi, Hari Kalva and Hanqi Zhuang; for your guidance,
assistance and support.
I am truly grateful for the assistance provided by my fellow students, staff, teachings
assistants (TAs) and professors.
Logic and Microprocessors TAs: Thank you for the support and assistance during
the development of these Lab Platform refinements. Thank you for helping the students
figure out the issues. Umran Al-Abd-Alrazak, Catalina Aranzazu Suescun, Hamzah Al-
Naja, Robert Fennel, Mathew Herland, Chad Mandy, Paul Morris, Paul Reyes, Mazhar
Sher, and Mahendra Singh. Thank you Umran and Chad for the diligent support throughout
this project and verifying the revisions.
The invaluable assistance, guidance, support, and coding from Luis Felipe Zapata
Rivera and his crew of students for the Smart Adaptive Remote Laboratory (SARL) and
LACCEI. The SARL project group have been instrumental in making this project possible.
Thank you Felipe for providing the Smart Adaptive Remote Laboratory framework
and specifically for the coding of the “Test Equipment” remote lab. We will truly miss you
when you graduate. Good Luck!
iv
Thank you Tri Nguyen for coding of the USB Arduino Nano for the Local Input
System. Thank you for finding the R5 code and getting it to work well.
Thank you to: Grant Kveton, Vinh Huynh, and Lars Koester for all the assistance
with SARL.fau.edu projects.
Thank you Ms. Catalina Aranzazu Suescun, for your help, continued support, and
for putting a smile on all those around you. You are an amazing TA and we will truly miss
you when you graduate. Good Luck!
Thank you to the Computer & Electrical Engineering and Computer Science De-
partment, CEECS, Lab Support Staff throughout the years: Kim Smelt, Rachel Phelps,
Willard Bachli, Roberto Sanchez-Giron. Will and Roberto, thank you so very much for all
the help with this project.
Dr. Mirjana Pavlovic, M.D., Ph.D, a consummate professional and one of the sweet-
est and kindest people with whom I have had the pleasure to work with.
Thank you to the folks who have helped my BionicGlove.org Project fulfill the
dream of building missing hands for children. Drs. Aaron Berger, Patricia Anastacio,
Kenneth Jeffers, and The FAU Tech Runway Team: Rhys Williams, Jessica Beaver, Megan
Moore and Beverly Marsh. Without your continued support we would not be able to do it.
Dr. Joel Herbst, Allan Phipps, Robin Barkes, Dr. Homer “Scooter” Willis, Vladimir
Safin, Frank Dickinson, Christian Liautaud, and Matt Trask thank you for the boost when
needed.
Thank you to Mark Easley (Texas Instruments), Ninette Fernandez (Newark), Jerry
Goldberg (Omnitron), Carl Hancick (Tektronix), and Dave Paloian (Microchip) for your
support in helping the budding engineers blossom.
Jean Mangiaracina and Helene Tomaszewski, Ladies thank you for all you do for
everyone, I know it is never said often enough. You are truly appreciated.
v
COECS, DESSA, OME & TSG staff: Craig Ades, Jessica Brynes, Anastasia Cal-
nick, Tamsyn Carey, Evelyn Chang Cruzpino, George Edmunds, Jenniefer Fabricius, Syl-
vania Fahenstock, Ed Henderson, Kalen Sue Hezard, Jessica Hibberd, Trudy Jefferies, John
Kielbasa, Fred Knapp, Tayler Kung, Tony Lavigne, James Mauser, Jessica Meith, Mahesh
Neelakanta, Teresa Perez, Pooran Rambharose, Gina Seits (formerly CoE, now Medical
School), Barbara Steinberg, Stephanie Waldorf, Willem van Dam. You folks are the un-
sung heroes of the College. Thank you for all you do.
FAU’s President John Kelly, Ph.D and FAU’s Former Provost Gary Perry, Ph.D:
Gentlemen, it is always a pleasure to sit around the table and find new ways of “Making
New Waves to Cast Upon the Oceans of Opportunities.”
A special thank you Chad Coarsey, Chancey Kelley, Alex Roscoe, Dr. David
Jaramillo, Ph.D., and Manny Papir for your persistent assistance.
The UCF Walking Machine Club: Larry Gaber (of Blessed Memory), Dean DuBois,
Steve Dick, Lenny “Lennoumous” Pearlman, Douglas Lattman, Eric Wampner and John
“Swami” Howard. It took me 30 more years to get it done, one step at a time.
Marc, Debbie, Allan, Elliot: Thanks.
Bobby Quibedioux and Pat Henderson and Eva Gaber: the Orlando Crew, thanks
for your friendship, throughout the years.
The Hirschmans for all the Shabbat Dinners, and Ari for all the late night coffee.
Brad Landy, Thanks you for the adventures.
Mom and Dad (of Blessed Memory): Thank you both for all you have done.
To My wife, Barbara Landy, and dear daughter, Janet Weinthal, following in my
footsteps as an Electrical Engineer. Thank you for your support and all the things you both
have helped me do.
vi
ABSTRACT
Author: Charles Perry Weinthal
Title: Remote Labs: A Method to Implement a Portable Logic DesignLaboratory Infrastructure and to Provide Access to Modern TestEquipment
Institution: Florida Atlantic University
Thesis Advisor: Dr. Marıa Mercedes Larrondo Petrie
Degree: Master of Science
Year: 2018
This Thesis explores building low cost and reliable portable laboratory infrastruc-
ture platform for Logic Design, methods for allowing access to modern test equipment via
the internet, and issues related to academic integrity. A comprehensive engineering edu-
cation, per ABET, requires an equal emphasis on both lecture and laboratory components.
The laboratory experience builds and establishes a foundation of skills and experiences that
the student cannot obtain through any other means. The laboratory must use modern, perti-
nent methods and techniques including the use of appropriate tools. This is especially true
when it comes to test equipment. Engineering students require and deserve training on and
access to modern test equipment in order to obtain better career opportunities. However,
providing access to modern and relevant labs requires a significant budget commitment.
One way to extend current budgets is to adopt the growing concept of “remote labs.” This
approach allows higher utilization of existing (and costly) equipment, it improves an insti-
tution’s Return on Investment (ROI), and also can be used to meet the needs of students’
complicated schedules, especially in the case of a “commuter campus,” where a majority of
students live off campus. By developing remote labs, both the institution and the students
vii
benefit: Institutions increase equipment utilization, and utilize space, budgets and support
personnel more efficiently. Students can access a lab whenever and wherever they have
internet access. Finally, academic integrity must be protected to ensure the potential of
remote laboratories in education.
This Thesis presents a design and implementation plan for a low cost Logic Design
laboratory infrastructure built and tested over 3 years by over 1,500 Logic Design students;
a design and implementation of the infrastructure to include the ability to measure using
remote test equipment; and the design of a case (3d printed or laser cut) to encapsulate a
USB enabled micro-controller; and a scheme to ensure the academic integrity is maintained
for in-person, hybrid and fully online classes.
Keywords: Academic Integrity, Engineering Education, Digital Design, Logic An-
alyzer, Logic Design, Logic Probe, Multi Domain Analyzer, Online Labs, Oscilloscope,
Portable Labs, Remote Labs, Test Equipmentviii
To the Scout Leaders and Mentors: Past, Present and Future;
Passing on the Torch of Knowledge.
Past: Bernard ”Bernie” Plotkin, Jim Horton, Joseph ”Joe Murray” Weinthal, Morton
”Mory” Lang, Richard Poole, and Willard ”Buck” Collins
Present: Allan, Ari, Bob Fennel, Bobby, Carl, Chancey, Christian, Ed, Erik Engeberg, Fred,
Jim Nance, Kim, John K. Karen, Marıa, Mahesh, Matt, Robin, Scooter, Vlad, Willem
Future: Alex, Ayah, Ben, Chad, Devin, Fritz, Guerla, Gunner, Gigi, Hanah, Janet, Kaan,
Roberto, Stincy, Tadas, Will
To the Men and Women who stand tall and proud protecting us.
Finally, Thank You Lord for All the Beauty That Abounds All Around Us;
and for each new day that begins with 1440 more chances to get it right.
Remote Labs: A Method to Implement a Portable Logic Design Laboratory Infrastructure
and to Provide Access to Modern Test Equipment
List of Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xiv
List of Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xv
1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 Addressing the Problems and the Motivations . . . . . . . . . . . . . . . . 2
1.2 Scope of the Thesis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.3 Structure of the Thesis . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.4 Motivation for Developing Low-Cost Lab Platforms . . . . . . . . . . . . . 4
2 Background and History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 Why the Need for Instructional Laboratories . . . . . . . . . . . . . . . . . 8
2.1.1 The Objectives of Engineering Instructional Laboratories . . . . . . 8
2.1.2 Curriculum Accreditation Requirements by ABET . . . . . . . . . 8
2.2 Simulation and Lab Tools . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.2.1 Industry Provided Coursework . . . . . . . . . . . . . . . . . . . . 10
2.2.2 Digital Prototyping Process . . . . . . . . . . . . . . . . . . . . . 12
2.2.3 Augmented Reality . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.2.4 Innovation, Quality and Reality of the Virtual Labs (VL) . . . . . . 14
2.2.5 System Considerations for Cyber Laboratory . . . . . . . . . . . . 14
2.2.6 Remote Labs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2.2.7 Simulation versus Remote Labs . . . . . . . . . . . . . . . . . . . 15
2.2.8 Pros and Cons of Remote Laboratories . . . . . . . . . . . . . . . 15
x
3 Exploring the Issues and Possible Solutions . . . . . . . . . . . . . . . . . . . 17
3.1 The Issues . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.2 Simulation: Then Testing? . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4 Development of a Low-Cost Portable Lab Platform . . . . . . . . . . . . . . 20
4.1 The First Portable Logic Lab Kit: (PLLK1) . . . . . . . . . . . . . . . . . 20
4.2 Analysis of the PLLK1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4.3 The Second Portable Lab Kit: (PLLK2) . . . . . . . . . . . . . . . . . . . 26
4.4 The Third Portable Lab Kit: (PLLK3) . . . . . . . . . . . . . . . . . . . . 35
4.4.1 Improving the Logic Probe . . . . . . . . . . . . . . . . . . . . . . 45
4.4.2 Implementing a 7 Segment Display Driver with Hexadecimal andGray Code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
4.4.3 Building the Lab Kits . . . . . . . . . . . . . . . . . . . . . . . . . 50
5 Supplemental Academic Materials to Implement the Portable Lab Platform . 54
5.1 Strengthening the Foundation of Knowledge . . . . . . . . . . . . . . . . . 54
5.1.1 Supplemental Materials and Documentation on Google Drive . . . 56
5.1.2 YouTube Channel for Supplemental Videos . . . . . . . . . . . . . 61
5.2 Learning Skills and Using the Tools . . . . . . . . . . . . . . . . . . . . . 62
5.2.1 Video: Skills and Tools: Wire Stripping . . . . . . . . . . . . . . . 62
5.2.2 Video: Skills and Tools: How a Breadboards Works . . . . . . . . . 63
5.2.3 Video: Skills and Tools: Straighten Pins . . . . . . . . . . . . . . . 64
5.2.4 Video: Skills and Tools: How to Solder & Using a Solder Sucker . 65
5.2.5 Video: The Tools: Soldering the 9V Battery Wires . . . . . . . . . 66
5.3 How Things Work . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
5.3.1 Video: How Things Work: About LEDs . . . . . . . . . . . . . . . 67
5.3.2 Video: How Things Work: How Switches Work . . . . . . . . . . . 68
5.4 How to Build the Lab Kit Infrastructure . . . . . . . . . . . . . . . . . . . 69
5.4.1 Video: The Infrastructure: Introduction & Marking LEDs . . . . . 69
xi
5.4.2 Video: The Infrastructure: Power Supply . . . . . . . . . . . . . . 70
5.4.3 Video: The Infrastructure: LED Lamps . . . . . . . . . . . . . . . 71
5.4.4 Video: The Infrastructure: Switches . . . . . . . . . . . . . . . . . 72
5.4.5 Video: The Infrastructure: Logic Probe . . . . . . . . . . . . . . . 73
5.4.6 Video: The Infrastructure: Binary to Hexadecimal Build & Demo . 74
5.4.7 Video: The Infrastructure: Logic Gates Demo . . . . . . . . . . . . 75
5.5 Technical Skills and Methods . . . . . . . . . . . . . . . . . . . . . . . . . 77
5.5.1 Video: Skills: Electronic Assembly Skills Reinforced . . . . . . . . 77
5.5.2 Video: Skills: Tips, Tools, and Tricks for using Breadboards . . . . 79
5.5.3 Video: Skills: Understanding Schematics . . . . . . . . . . . . . . 80
5.5.4 Video: Skills: Very Brief Introduction to Analog Circuits . . . . . . 81
6 Methods to Ensure Academic Integrity Assurance . . . . . . . . . . . . . . . 82
6.1 Why Academic Integrity Assurance Is Vital . . . . . . . . . . . . . . . . . 82
6.2 Techniques for Lab Academic Integrity Assurance . . . . . . . . . . . . . . 82
6.3 Team Work and Lab Academic Integrity Assurance . . . . . . . . . . . . . 83
6.4 Techniques for On-Line Lab Academic Integrity Assurance . . . . . . . . . 83
6.5 Academic Integrity Assurance User Hardware . . . . . . . . . . . . . . . . 83
7 Using the Web to Make Real Measurements . . . . . . . . . . . . . . . . . . . 85
7.1 Smart Adaptive Remote Laboratory Concepts and Implementations . . . . 86
7.2 Setting Up the Experiment . . . . . . . . . . . . . . . . . . . . . . . . . . 87
7.3 Configuring the Experiment . . . . . . . . . . . . . . . . . . . . . . . . . 89
8 Implementing the Smart Adaptive Remote Laboratory . . . . . . . . . . . . 93
8.1 Hardware: User . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
8.2 Software and Hardware: Local User . . . . . . . . . . . . . . . . . . . . . 95
8.3 Software and Hardware: Remote Web Server . . . . . . . . . . . . . . . . 96
8.4 Hardware: Remote Web Server . . . . . . . . . . . . . . . . . . . . . . . . 98
xii
9 Conclusions, Future Enhancements and Improvements . . . . . . . . . . . . 101
9.1 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
9.2 Contributions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
9.3 Future Work . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
9.3.1 Creating More Remote Experiments . . . . . . . . . . . . . . . . . 106
9.3.2 Implementing the Augmented Reality (AR) interface . . . . . . . . 106
9.3.3 Implementing the D2A section on the IO board for the Analog sys-tems . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
9.3.4 Enhance Security Features . . . . . . . . . . . . . . . . . . . . . . 106
9.3.5 Student Feedback Tools . . . . . . . . . . . . . . . . . . . . . . . 107
Appendices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
A.1 Photo Credits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
A.2 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
B Supporting Quotes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
C Drawings and Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . 118
D Software Listings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127
D.1 Web Server - Main Server . . . . . . . . . . . . . . . . . . . . . . 127
D.2 Scope Server - Instrumentation Server . . . . . . . . . . . . . . . . 131
D.3 Scope Server - Instrumentation Signal Generation . . . . . . . . . . 133
D.4 Scope Server - Instrumentation Commands . . . . . . . . . . . . . 136
D.5 r5 Data Transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . 137
Bibliography . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142
xiii
LIST OF TABLES
4.1 Parts List for Logic Trainer and Portable Kit (PLLK1) [2] . . . . . . . . . . 23
4.2 Parts List for Logic Trainer & Portable Kit (PLLK2) [2] . . . . . . . . . . . 33
4.3 Parts List for Logic Trainer & Portable Kit (PLLK3) [3] . . . . . . . . . . . 41
9.1 Trainer & Portable Kits Comparison [126] . . . . . . . . . . . . . . . . . . 102
xiv
LIST OF FIGURES
3.1 Quartus: A PLD Programming Tool with Simulation . . . . . . . . . . . . 18
4.1 Prototype Portable Logic Lab Kit (PLLK0), by Gee Won Han [27] . . . . . 21
4.2 Original Logic Trainer . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
4.3 Fritzing [37] type Wiring Diagram for the PLLK1 . . . . . . . . . . . . . . 22
4.4 Lab kit components distributed with breadboard and wire . . . . . . . . . . 23
4.5 Schematic Diagram for the PLLK1.v2 . . . . . . . . . . . . . . . . . . . . 24
4.6 Full Adder on the PLLK1 . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
4.7 Student in Lab with a Lab Kit . . . . . . . . . . . . . . . . . . . . . . . . . 27
4.8 Fritzing [37] 2nd Portable Logic Lab Kit (PLLK2) . . . . . . . . . . . . . 28
4.9 Wired 2nd Portable Logic Lab Kit (PLLK2) . . . . . . . . . . . . . . . . . 29
4.10 PLLK2 parts kit distributed with (not shown) 2 breadboards and wire . . . . 30
4.11 Schematic for PLLK2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
4.12 A student built project on the PLLK2 . . . . . . . . . . . . . . . . . . . . . 32
4.13 PLLK3 Portable Logic Lab v3 . . . . . . . . . . . . . . . . . . . . . . . . 36
4.14 PLLK3 Parts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
4.15 Schematic for PLLK3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
4.16 The PLLK3 Parts kit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
4.17 Placement map for PLLK3 ICs . . . . . . . . . . . . . . . . . . . . . . . . 38
4.18 PLLK3 Parts Identification Guide . . . . . . . . . . . . . . . . . . . . . . 39
4.19 The parts list provided to the students. . . . . . . . . . . . . . . . . . . . . 40
4.20 The starting point for Lab Six . . . . . . . . . . . . . . . . . . . . . . . . . 43
4.21 A student built Lab Six project on the PLLK2 platform . . . . . . . . . . . 44
xv
4.22 PLLK2 (Left) and PLLK3 (Right) Logic Probes . . . . . . . . . . . . . . . 46
4.23 7447 Series Display Outputs [120] . . . . . . . . . . . . . . . . . . . . . . 47
4.24 Hexadecimal Display controlled by a PIC16f1503 . . . . . . . . . . . . . . 48
4.25 Hexadecimal Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
4.26 Assembly lines with TAs Building the Lab Kits . . . . . . . . . . . . . . . 50
4.27 PIC microcontroller programmer . . . . . . . . . . . . . . . . . . . . . . . 51
4.28 Hexadecimal PIC and LED Display Tester . . . . . . . . . . . . . . . . . . 52
5.1 The author’s Supplemental Materials on Google Drive page 1 [38] . . . . . 56
5.2 The author’s Supplemental Materials on Google Drive page 2 [38] . . . . . 57
5.3 The author’s Supplemental Materials on Google Drive page 3 [38] . . . . . 58
5.4 The author’s Supplemental Materials on Google Drive page 4 [38] . . . . . 59
5.5 The author’s Supplemental Materials on Google Drive page 5 [38] . . . . . 60
5.6 The author’s Supplemental Videos on YouTube . . . . . . . . . . . . . . . 61
5.7 How to Strip Wire . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
5.8 How Breadboards Work . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
5.9 How to Straighten Integrated Circuit Pins . . . . . . . . . . . . . . . . . . 64
5.10 How to Solder and Use a Solder Sucker . . . . . . . . . . . . . . . . . . . 65
5.11 How to Solder the 9V Connector . . . . . . . . . . . . . . . . . . . . . . . 66
5.12 How LEDs Work . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
5.13 How Switches Work . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
5.14 Infrastructure: Introduction & Marking LEDs . . . . . . . . . . . . . . . . 69
5.15 Building the Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . 70
5.16 Wiring the LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
5.17 Wiring the Switches: DIP and Push Button . . . . . . . . . . . . . . . . . . 72
5.18 Wiring the Logic Probe . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
5.19 Wiring the Hexadecimal Display . . . . . . . . . . . . . . . . . . . . . . . 74
5.20 Wiring the Logic Gates Demo . . . . . . . . . . . . . . . . . . . . . . . . 75
xvi
5.21 Logic Gates Demo Schematic . . . . . . . . . . . . . . . . . . . . . . . . 76
5.22 How a Breadboard works . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
5.23 How a Breadboard works, how long the wires need to be. . . . . . . . . . . 78
5.24 Assembly tips and methods . . . . . . . . . . . . . . . . . . . . . . . . . . 79
5.25 Introduction to reading Schematics, parts, wires, junctions, ... . . . . . . . . 80
5.26 Introduction to reading Schematics, Analog Circuits and Logic Levels . . . 81
6.1 Lab Infrastructure Platform Holding Assembly . . . . . . . . . . . . . . . 84
7.1 Remote Lab Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
7.2 The SARL Windowsill . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
7.3 The SARL Experiment Gallery [1] . . . . . . . . . . . . . . . . . . . . . . 88
7.4 The Tektronix MDO3k Oscilloscope before the AR Overlay . . . . . . . . 89
7.5 The User View of the Web Scope . . . . . . . . . . . . . . . . . . . . . . . 90
7.6 Tektronix MDO3k with Raspberry Pi on top . . . . . . . . . . . . . . . . . 91
7.7 Analog & Digital IO Expander for the Raspberry Pi . . . . . . . . . . . . . 92
8.1 Student Breadboard Holder Assembly Closeup View showing the Nano Pins 94
8.2 Low Cost Micro-controllers with USB for IO . . . . . . . . . . . . . . . . 95
8.3 Oscilloscope Instruction Pathway . . . . . . . . . . . . . . . . . . . . . . . 96
8.4 Experiment Results Pathway . . . . . . . . . . . . . . . . . . . . . . . . . 97
8.5 Raspberry Pi configured for the Arduino interface . . . . . . . . . . . . . . 98
8.6 Analog & Digital IO Expander Schematic for the Raspberry Pi . . . . . . . 99
8.7 Analog & Digital IO Expander for the Raspberry Pi . . . . . . . . . . . . . 100
9.1 Virgina Tech “Lab In a Box” [125] . . . . . . . . . . . . . . . . . . . . . . 104
9.2 Old Dominion University NSF-PIC [126] . . . . . . . . . . . . . . . . . . 105
9.3 Elenco XK-550T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105
A Portable Lab Platform Casework - Lasercut . . . . . . . . . . . . . . . . . 118
xvii
B Portable Lab Platform Casework . . . . . . . . . . . . . . . . . . . . . . . 119
C Analog & Digital IO Expander Schematic for the Raspberry Pi . . . . . . . 120
D Analog & Digital IO Expander PCB Backside for the Raspberry Pi . . . . . 121
E Analog & Digital IO Expander PCB Front side for the Raspberry Pi . . . . 122
F Analog & Digital IO Expander PCB Silkscreen for the Raspberry Pi . . . . 123
G Raspberry Pi Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124
H Nano Board Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125
I BluePill Board Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126
xviii
CHAPTER 1
INTRODUCTION
To be human is to quest for and explore the answers to life, the universe, and everything
unknown. When those answers are found, it falls to engineers to implement those answers
through design and fabrication. Thus, the task of educating the budding engineer is a daunt-
ing responsibility placed upon the shoulders of the schools, colleges and universities. This
Thesis looks at that responsibility and addresses one vital question: How can education
enhance the skills, knowledge and scope of an engineer’s training through innovations in
the laboratory experience? After all, laboratories close the loop on the learning process and
solidifies the material taught in the class.
“Engineers have to go beyond the theoretical knowledge because in appli-
cation based education, it requires not only conceptual understanding, it needs
practical knowledge, thus, there are two distinct learning environments in en-
gineering education (classroom and laboratory). Students can gain theoretical
knowledge in the classroom, it is only possible to grasp necessary practical
knowledge and experiences in the laboratory.” [71]
Through new development of portable laboratories and remote laboratories, students
can access many new laboratory experiences. Logic Design is a required first year engi-
neering course for Computer Science, Computer Engineering and Electrical Engineering
degrees at many universities. This Thesis looks at innovations to enhance the Logic Design
Laboratories.
This effort is important because physical laboratory space is always at a premium at
universities. At Florida Atlantic University (FAU) the Logic Design classes have tripled in
1
size and share lab space with the Microprocessors and Embedded Design classes. The total
lab space is one laboratory with sixty benches and 40 hours of teaching assistants (TAs)
that must be shared by over 600 students. Additionally, virtual students attending ”online”
are required to be physically present to conduct the lab assignments, which for many, is not
feasible if they do not live within the general vicinity of FAU.
1.1 ADDRESSING THE PROBLEMS AND THE MOTIVATIONS
This Thesis seeks to address some specific problems in the Logic Design Labs, by design-
ing a low cost and portable lab platform that supports test instrumentation through remote
labs while preserving academic integrity.
Why Logic Design?
Logic Design is the gateway class for Computer Science, Computer and Electrical En-
gineering, which requires an extensive hands on lab experience to fully grasp the classroom
theory. The growing trend toward on-line classes was a reasonable option so long as the
number of virtual students did not out-number available test equipment. However, with the
growing acceptance of and related expansion of on-line courses allowing students to check
out expensive logic trainers is no longer feasible. Over the last 3 years, the total number
of students registered each semester for Logic Design at FAU is 350 students. Yet the total
number of students that can be in a lab at any one time is 60.
Why the need for low cost lab platforms?
The Logic Design Class has a $25 lab fee. The lab platform needs to cost less than the
lab fee. A low cost platform would make labs accessible to students with limited financial
means.
Why the need to provide portable logic design platforms?
A Portable Lab Platform that does not have to be plugged into the power grid would
2
allow students to work on their circuits and test them anywhere. Students in extreme con-
ditions with no access to power plugs could still do their work, giving access to equipment
and lab experiences.
Why the concern for ensuring academic integrity?
The value of a diploma from any school is based solely upon its reputation.
Cheating is a national concern, particularly in online classes.
Why create and utilize remote labs?
Remote labs provide a unique opportunity for organizations to offer lab experiences to
users regardless of their location, leveraging unfettered 24/7 lab and equipment access to
thousands of users. The remote labs can be physically located in other institutions, reducing
cost of equipment and maintenance, and giving access to industry standard test equipment.
1.2 SCOPE OF THE THESIS
The research at the core of this Thesis sought to design a low cost and portable platform
that permits Logic Design students to accomplish 4 goals: to build and test their labora-
tory circuits anywhere, to control new remote labs, to establish the feasibility of integrating
modern measurement equipment to the portable platforms remotely, and to explores meth-
ods to assure academic integrity.
In order to prepare students for careers in their chosen field, the emphasis is on provid-
ing access to equipment found commonly in industry and research labs.
This Thesis presents the design of a logic design platform that costs below $25 that is
built by students and has been successfully implemented for several years and has a proven
track record.
The implementation of a prototype case and components incorporating internet connec-
tivity, and remote access to an oscilloscope to the student’s portable Logic Design lab kit,
via a computer to control remote experiments and to ensure academic integrity.
3
1.3 STRUCTURE OF THE THESIS
This Thesis is organized as follows: Chapter 2 presents the history, background, avail-
able educational materials and similar online labs. Chapter 3 explores the issues and some
possible solutions for portable labs. Chapter 4 presents an evolution of the design and
implementation of the proposed portable platform. Chapter 5 presents the supplemental
academic materials developed to assist students with building the portable platform. Chap-
ter 6 presents methods to ensure academic integrity. Chapter 7 presents a discussion of the
Smart Adaptive Remote Laboratory (SARL) concept. The Thesis investigates the feasibil-
ity of creating a remote lab for students to remotely control and perform experiments with
Industry Standard Test Equipment. Chapter 8 presents the hardware and software devel-
oped for the instrumentation remote lab. Chapter 9 presents conclusions, contributions and
future work.
The appendices include: Supporting quotes from the background research. Printed
Circuit Board schematics, and drawings for the author’s Analog and Digital Input / Output
Board. Source Code listings from the project developed by the SARL Research Group.
1.4 MOTIVATION FOR DEVELOPING LOW-COST LAB PLATFORMS
The Latin American and Caribbean Consortium of Engineering Institutions (LACCEI, see
www.laccei.org) is a non-profit organization headquartered at Florida Atlantic University
(FAU). The Ministers of Science and Technology of the Organization of American States
named LACCEI the OAS Center for Engineering for the Americas and it hosts the annual
OAS Summit of Engineering for the Americas. In 2012 LACCEI launched an initiative led
by three Haitian Engineering Deans and the Haitian National Public Works Ministry, who
were requesting assistance after the 2010 earthquake that resulted in the physical destruc-
tion of their universities and deaths of many of their faculty and students. The buildings
4
were slowly being rebuilt but they needed assistance to rebuild their engineering programs,
laboratories and faculty.
In late 2013 LACCEI held a retreat at FAU that brought a group of deans, govern-
ment representatives and Haitian National Public Works personnel together with a strategic
planning expert, who spoke English, French and Spanish to facilitate the retreat. One of the
strategies identified was that LACCEI institutions would collaborate to help design labo-
ratories and educational materials that the Haitian Engineering programs could share. [12]
The Guatemalan ministers also asked to join the initiative to benefit the universities and
students affected by landslides.
LACCEI then launched an effort to create a hemispheric infrastructure to provide re-
mote labs and educational materials so students and programs affected by disasters could
continue their education even with limited electricity and limited connectivity to the in-
ternet. The effort started at the beginning of 2014 with the FAU Logic Design course, a
key core course required in Electrical Engineering, Computer Engineering and Computer
Science programs. The Logic Design laboratory at Florida Atlantic University consists of
60 benches with 60 digital trainers, and test and measurement instrumentation, which in-
cludes 60 oscilloscopes, wave form generators and voltmeters. Dr. Marıa Larrondo Petrie,
Executive Director of LACCEI and Computer Engineering Professor at Florida Atlantic
University, started working on developing a low-cost, hardened, portable laboratory plat-
form that would be powered by batteries and could be attached through a laptop when there
was available power and WiFi to connect to control and interact with remote laboratory ex-
periments that would be developed at FAU and other LACCEI member institutions. To this
end, the Smart Adaptive Remote Laboratory Research Group was formed [1].
This Thesis focuses on the development of the platform and testing it with Dr. Petrie’s
Logic Design classes. At the same time this benefited FAU since class sizes were grow-
ing and could no longer fit in the physical Logic Design Lab, and the course was being
5
redesigned for full online offering and there was no cost-effective alternative to completing
the labs in the physical Lab.
6
CHAPTER 2
BACKGROUND AND HISTORY
The history of engineering education is long and proud. Engineers have accomplished
many great things. While this Thesis is not about the ethics and responsibilities of en-
gineers, it is important to remind educators about our responsibilities to ensure that their
students use their engineering abilities to for the good of society. Knowing the history of
engineering helps us make better decisions.
Engineering was historically learned through apprenticeship which has been superseded
by modern engineering educational methods. There are many existing systems that enable
theoretical courses to be delivered online, [71] but engineering requires additional labo-
ratory experiences to grasp necessary real world knowledge and skills. Another modern
method of education is through training and simulations modalities for all aspects of indus-
try and engineering in particular. Revolutionary tools have been developed throughout the
years, including the 1928 flight simulator by Edwin Link “Link Trainer” [72], structural
analysis tools such as Finite Element (FE) [80], the electronic circuit analysis and design
programs of SPICE and its variants [81], and Virtual Reality Surgical Training Suites.
The educational opportunities provided to students by virtual labs (VL) is based on
various factors: the authenticity, quality, depth, limitations, and scope of details of the
simulation [85]. The attraction of providing VL and remote labs is the lower return on
investment (ROI), portability, and the availability to online usage. [84].
7
2.1 WHY THE NEED FOR INSTRUCTIONAL LABORATORIES
2.1.1 The Objectives of Engineering Instructional Laboratories
There are three main types of laboratories [72]: the developmental lab, the research lab,
and the educational lab. The developmental lab is for designing and creating products
or processes. The research lab is for studying and defining theory and phenomenon. The
educational lab is for students to use classroom theory to develop hands on experience [72].
2.1.2 Curriculum Accreditation Requirements by ABET
The ABET organization (Accreditation Board for Engineering and Technology) accredits
engineering programs. The following are the goals and objectives engineering programs are
expected to exceed. The entire description is included in Appendix B, since it is pertinent
to this discussion and to summarize would not be as accurate or as concise.
“The current Accreditation Board for Engineering and Technology (ABET)
[89] engineering criteria states that all engineering programs must demonstrate
that their graduates have an ability to:
• Design and conduct experiments, as well as to analyze and interpret data
• Design a system, component, or process to meet desired needs
• Use the techniques, skills and modern engineering tools necessary for
engineering practice.
• Classroom, laboratories, and associated equipment must be adequate to
accomplish the program objectives and provide an atmosphere conducive
to learning
• The program must include college level mathematics and basic science
(with experimental experience) appropriate to the discipline.” [90]
8
Accreditation by ABET ensures that students have a minimum skill set, which includes:
[90]
• A sound background in STEM (Science, Technology, Engineering and Math) and an
analytical mindset.
• Ability to design a system or product.
• Capable of conducting or designing an experiment, and understanding its results and
purpose.
• Ability to operating pertinent laboratory and test equipment.
• Capable of effectively communicating.
• Ability to work in multidisciplinary teams.
• Capable of responding in a professional and ethical manner
• A sound background capable of understanding the application of engineering on
global, economic, and social issues.
• Ability to practice engineering using the above.
The Laboratory Curriculum provides: [71]
• Experience with instrumentation for measuring physical properties using sensors and
instruments and software.
• Real World Modeling of systems and their properties. Skills to model and evaluate
those systems.
• Creating Experiments
• Data Analysis
9
• Learn thru Failure or Learn by Failure (Trial and Error)
• Creativity: applying independent thought and real world problem solving.
• Psychomotor: Demonstrate the ability to select, modify, and use engineering re-
sources and tools.
• Safety Skills and the ability to safely deal with issues responsibly.
• Effective Communication
• Teamwork
• Ethics
• Sensory Awareness: understanding the real-world.
2.2 SIMULATION AND LAB TOOLS
2.2.1 Industry Provided Coursework
The engineering and manufacturing industries have an embedded interest to provide quality
tools and training using their tool chain. This fosters brand loyalty for better or worse. In
most cases, we tended to utilize the vendor with whom we have had our first experiences,
unless they were abysmal products in which case we avoid that vendor altogether.
Some examples of coursework websites are supplied by industry:
• Analog Devices (wiki.analog.com/university/courses/electronics/text/electronics-toc)
• Texas Instruments (www.ti.com/about-ti/education/home.html)
• ARM (www.arm.com/resources/education/education-kits)
• Microchip (www.microchip.com/development-tools/academic-corner)
• Tektronix (www.tek.com/courseware)
10
• National Instruments (http://ni.com)
Examples of Simulation programs used in engineering Labs, Schools and Industry.
• Digi-SIM (nicadd.niu.edu/digisim)
• MATLAB SIMULINK (www.mathwork.com/index)
• P-Spice (www.pspice.com)
• Spice (ecircuitcenter.com)
• DEEDS (www.digitalelectronicsdeeds.com/deeds.html) [112]
• Opensimulator (opensimulator.org)
• Altera’s Quartus (dl.altera.com) [36]
• Logism (www.cburch.com/logisim/)
• Every Circuit (everycircuit.com/)
• Logic.ly (logic.ly/)
• Quite Universal Circuit Simulator (qucs.sourceforge.net)
• Circuits Cloud - Free Online Circuits Simulator (circuits-cloud.com)
• LTSpice (www.analog.com/en/design-center/design-tools-and-calculators.html)
• Multisim Live Online Circuit Simulator (www.multisim.com/)
• Fritzing (fritzing.com)
11
2.2.2 Digital Prototyping Process
The DEEDS simulation website [113] is one of many simulation tools available. They offer
an in-depth pedagogy for teaching many of the aspects of digital logic design. The website
offers digital logic design labs and simulations, an excellent supplement to coursework.
“Deeds: Digital Electronics Education and Design Suite [113] specifically
for educational applications, with special attention to the needs of the courses
of the first years of the Information Engineering courses. ... DEEDS helps
students in acquiring the theoretical foundations of digital design, together with
analysis and problem-solving capabilities and practical synthesis and design
skills.” [113]
A nice feature of this website is educators can design a customized lab its customiz-
ability, educators can provide a customized lab for distribution to their students.
The following is a list of the demonstration labs:
• Combinational Networks
– Xor function (And-Or)
– Decoder (2-4) and (4-16)
– Multiplexer 8-1
– Demultiplexer 1-8
– Bus connections
– Arithmetic Circuit (Adder/Comparator 4 bit)
• Sequential Networks
– Flip-Flop Set-Reset (NAND version)
– Shift Register (4-bits, E-Pet Flip-Flops)
12
– Parallel Shift Register (8-bits data)
– Synchronous Cyclic Binary Up/Down Counter (16 bits)
– Synchronous One-Shot Timer (8-bits)
– Digital Signal Generator (16 samples, 4 bits)
– The ROM Editor/Programmer Dialog
– Digital Signal Generator (16 samples, 4 bits)
– The ROM Editor/Programmer Dialog
– Ram Memory Test Circuit
• Finite State Machines and Sequential Networks
– Four States Binary Up Counter
– Edge Detector (Moore and Mealy versions)
– Pulse Generator
– Retriggerable Pulse Generator
– Timing Simulation of the Light Dimmer
– 4-bits Asynchronous Serial Transmitter
2.2.3 Augmented Reality
Augmented Reality (AR) is based on a real image enhanced with additional images that
provide the complete information or control.
Which leads to:
“Between totally real and totally virtual situations, there is a continuum,
characterized by various mixtures of virtual and real environments. In this
mixed reality, the concept of a virtuality continuum appears. This concept cov-
ers both augmented reality and augmented virtuality (AV), which is a mixture13
of the real and virtual worlds. These intermediate points are also collectively
known as mixed reality.” [96]
An excellent example of an AR Lab for Logic Design is WebDeusto.
(weblab.deusto.es/website/) [122] A well designed analog and digital emulator that allows
visitors to wire up many laboratory experiments and reports the results. They can only
provide a finite choice of connections and components which limits the experiments. The
website also has, timed quizzes for logic design that requires the user to insert a gate to
finish the circuit correctly.
An example of how to build some sections of the Webduesto system is provided in this
cited paper. [123]
2.2.4 Innovation, Quality and Reality of the Virtual Labs (VL)
Virtual Labs (VL) allow extreme locations and hazardous experiments or processes to be
experienced without the risk of associated problems, e.g. operating power plants, and pro-
cessing dangerous chemicals. Other benefits to using a VL is customization to the individ-
ual, and reduced or no setup time required by the student to operate the experiment. Two
major limitations are the lack of actual hands on experience with the actual equipment and
direct supervised assistance. The supervised assistance issue can be partially addressed by
providing on-line help. [54].
2.2.5 System Considerations for Cyber Laboratory
The total cost of running a VL [92] is the design, programming, and computational costs.
There are no lab supplies expended, allowing the VL to be used repeatedly without ad-
ditional significant costs. In many cases the VL can be run using the students computer
thereby allowing multiple simultaneous users further reducing the costs to the initial costs
of implementation.
14
2.2.6 Remote Labs
Remote Labs allow students to perform experiments from anywhere as their schedule
allows. [103] This trend is growing and sharing opportunities among research labs and
schools. Some examples are:
• MIT iLabs [105]
• Single Board Heater Systems (SBHS) [107]
• VISIR (Virtual Instrument Systems in Reality) [109]
• The W.M. Keck Observatory [110]
• Smart Adaptive Remote Laboratory [1]
• WebLab-Deusto [122]
2.2.7 Simulation versus Remote Labs
The difference of a remote lab versus a simulation is not subtle; the ease of implementa-
tion will often decide the construction method. The remote laboratory is where an actual
experiment takes place on a physical apparatus. The simulated laboratory is a virtual repre-
sentation of all aspects of the laboratory, a total computer simulation. [103] with a realistic
computer interface to give the user the illusion the experiment is running on real equipment;
however, all results are calculated.
2.2.8 Pros and Cons of Remote Laboratories
The Pros and Cons with offering remote labs: [96, 103]
Cons
• Real apparatus is expensive to purchase and maintain
• Access to the experiment needs to be scheduled and scalability is limited.15
• Computer interfaces limits actual hands on sensory experience of students
Pros
• Available 24/7
• Remote labs are closer to reality than a simulation, offering real data on real compo-
nents not idealized components
• Reduced operating costs
• Reduced setup time
STEM (Science, Technology, Engineering and Math) based online laboratory courses
are more difficult to implement than a lecture class, as the material needs to be a replicated
interactive VL environment or a real lab that is automated for remote operation. [100]
16
CHAPTER 3
EXPLORING THE ISSUES AND POSSIBLE SOLUTIONS
3.1 THE ISSUES
The recurring themes (many implied) in all the papers reviewed, including our own expe-
riences, in the writing of this thesis are:
• The institution’s physical labs are often under-utilized, until the due date approaches,
then they are overflowing
• Students need more hands on interaction with the equipment
• The equipment is expensive. The Digital Logic Trainer alone is $400, That requires
an investment of $24,000 for the 60-bench lab at FAU. Additionally, there are various
types of test and measurement equipment on each bench that cost between $500 and
$2,000 per bench.
• It takes too long for students to set up the equipment.
• Students can damage and / or break the equipment, adding a high maintenance and
replacement cost in addition to the initial costs.
• Students lose their lab kits and misuse the components requiring replacement.
• The equipment available is not what the students will find in the job existing job
market.
• Online students needed to come to the lab. Online classes were supposed to be fully
online.
17
• Logic Design class size has grown to over 90 students a 50% increase, putting pres-
sure to explore on-line laboratory methods.
3.2 SIMULATION: THEN TESTING?
Simulation is an important part of the design cycle in engineering, particularly in the early
design steps. For novices, simulation is often the only method of creating a verified design.
In Logic Design at FAU, Altera’s Quartus Circuit Simulator, see Figure: 3.1, is used to
simulate the circuit prior to wiring it on the breadboard. Quartus was selected instead of
Multisim which is supported by the textbook exercises and material, because Multisim is
costly and Quartus provides a free web edition.
Figure 3.1: Quartus: A PLD Programming Tool with Simulation
18
Thorough simulation testing is required to prevent costly and / or disastrous results
when physically building or implementing the design. Building, thereby “doing,” is an
integral part of engineering education. Many students arrive with minimal skills and it is
hazardous to expect students to design and build equipment, structures, and systems in a
safe and reliable manner, if they do not have the proper skills, such as verifying their design
works as intended.
Our job as educators is to guide them in the process.
In the next chapters present the development of our solution to some of the disadvan-
tages of remote labs, providing a low-cost portable lab platform, that interfaces with the
student’s computer to allow physical interaction and control of remote labs for Logic De-
sign.
19
CHAPTER 4
DEVELOPMENT OF A LOW-COST PORTABLE LAB PLATFORM
4.1 THE FIRST PORTABLE LOGIC LAB KIT: (PLLK1)
In 2014 Dr. Marıa Petrie, teaching Introduction to Logic Design, was exploring ways to
improve student satisfaction and reduce crowding of the 60 bench lab. Her students were
provided additional parts in the lab kits, provided through the Lab Fee of $25. In 2014 Dr.
Petrie and teaching assistant Gee Won Han implemented the first version of the low-cost
portable lab kit, Figure: 4.1, that Logic Design students could build themselves and use
to experiment and test their circuits anywhere. Students, regardless of prior electronics
experience, were able to assemble the Portable Logic Lab Kit (PLLK). The PLLK allowed
the student to build and test, and control their logic lab assignments with battery power,
eight switches for inputs, and ten LEDs for outputs. Only going into the lab for help or
grading, no longer needed the Logic trainer unit, Figure: 4.2. As students from other classes
still using the lab trainer, observed Dr. Petrie’s students using the PLLK students with the
portable lab platform, they requested that it be provided to all the sections. Additionally,
the online Logic Design course needed a portable solution. The next semester the teaching
assistant Pablo Pablan added the circuit shown in Figure: 4.3 under the supervision of Dr.
Alhalabi to the Logic Design Lab Manual. [17]
In the PLLK1, the first version distributed to all Logic Design students at FAU and
included in the Lab Manual, Figure: 4.3. A minimal number of components were included
to provide 10 inputs, 10 outputs and 5V power to the original kit, and distributed to all three
sections of the Logic Design course.
Students responded with enthusiastic feedback about the portable lab kit. They were
20
Figure 4.1: Prototype Portable Logic Lab Kit (PLLK0), by Gee Won Han [27]
able to build the mobile lab platform and spend more time debugging their circuits at home
instead of the physical laboratory. This freed the lab stations and the teaching assistants
(TAs) to serve students with problems.
The original portable logic design kit was a significant improvement to the bench logic
trainer, allowing portability of the student projects. There were several key issues to im-
proving the design and reducing student confusion and frustration, the most significant
issue was: lack of space. This and several other concerns, see Figure: 4.6.
21
Figure 4.2: Original Logic Trainer
Figure 4.3: Fritzing [37] type Wiring Diagram for the PLLK1
From the FAU CEECS 2015 Fall Logic Design Manual. [17]
22
Figure 4.4: Lab kit components distributed with breadboard and wire
Table 4.1: Parts List for Logic Trainer and Portable Kit (PLLK1) [2]
pn desc quan each Lab PLLK1
US Prices 2015 Q4 TOTAL $10.92 $22.54
SN74HC00N Quad 2in NAND 4 $0.18 $0.72 $0.72
74HC04N Hex Inverter 2 $0.26 $0.52 $0.52
CD74HC08E Quad 2in AND 2 $0.18 $0.36 $0.36
SN74HC10N Triple 3in NAND 2 $0.18 $0.36 $0.36
SN74HC20N Dual 4in NAND 2 $0.19 $0.38 $0.38
CD74HC32E Quad 2in OR 1 $0.18 $0.18 $0.18
CD74HC73E Dual JK Flip Flop 2 $0.42 $0.84 $0.84
SN74LS74AN Dual D Flip Flop 1 $0.37 $0.37 $0.37
SN74LS138N 3:8 Demultiplexer - Decoder 2 $0.34 $0.68 $0.68
SN74HC157N Quad 2:4 Multiplexer - Encoder 2 $0.76 $1.52 $1.52
SN74LS283N 4 Bit Adder 2 $0.34 $0.68 $0.68
CD4510BE BCD UP-DOWN COUNTER 2 $0.28 $0.56 $0.56
4611X-101-331LF Resistor Network 10x 330Ohm 4 $0.46 $1.84
SW.DIP-10 10x DIP Switch 1 $2.20 $2.20
703-0190 LED Bar Graph Array 10 1 $2.37 $2.37
LM78L05ACZ 5V Voltregulator – 100mA 1 $0.15 $0.15
PB-TACT ”4pin Tactile Push Button” 1 $0.85 $0.85
HH-3449 9V Battery Clip w/ Wire 1 $0.90 $0.90
Breadboard 830points 1 $3.75 $3.75 $3.75
US Prices 2015 Q4 TOTAL $10.92 $22.54
23
4.2 ANALYSIS OF THE PLLK1
The PLLK1 provided the starting point for this research. The author drew the schematic,
Figure: 4.5, to analyze the the circuit in a less ambiguous format.
Figure 4.5: Schematic Diagram for the PLLK1.v2
Schematic by the author to simplify the Fritzing diagram.
• While it was possible to fit all lab circuits on the one breadboard provided, Lab #2,
implementation of the 5-bit Adder required exact placement of parts, utilizing nearly
every breadboard row, as shown in Figure: 4.6. Making it a difficult lab assignment.
• The switches were wired active low, which caused significant confusion for the stu-
dents.
• The LED array was wired always on, this depleted the 9V battery at a much faster
rate.24
• The voltage regulator (LM78L05) was underrated (100mA), and needed to be re-
placed often.
• If the 10 DIP switches were all turned on, the total current drawn exceeded the reg-
ulator’s current limit by 50%, (150mA), not including any of the other parts of the
circuit.
• The push button switch wires were too short and curved, and it would periodically
self-eject and often at significant velocity.
• The ceramic resistor arrays often failed from rough handling, developing stress cracks
without obvious damage, leading to very difficult debugging.
• Students failed to understand the configuration of the LED or resistor array devices.
Solutions to be implemented in the next version of the PLLK.
• Provide a second breadboard
• Provide students with schematics for clearer understanding of the circuits.
• Use active high switches to reduce student confusion.
• Use individual parts for the resistors and LEDs
• Change the 5V Regulator from 100mAmp (LM78L05) to a 500mAmp or 1.0Amp
(LM78M05 or LM7805) part
• Add more switches in separated banks for ease of identifying separate variables.
• Harden the power supply for over-voltage and reverse polarity protection
Adding a second breadboard for a separation between the infrastructure from the work
space significantly reduced student stress.
25
Figure 4.6: Full Adder on the PLLK1
Student Built
4.3 THE SECOND PORTABLE LAB KIT: (PLLK2)
The following author’s figures were included in Dr. Alhalabi’s, et. al., FAU Logic Design
Lab Manuals. 2016 Spring - 2018 Fall
• Fritzing [37] 2nd Portable Logic Lab Kit (PLLK2) Figure: 4.8 [18]
• Schematic for PLLK2 Figure: 4.11 [18–20]
• Wired 2nd Portable Logic Lab Kit (PLLK2) Figure: 4.9 [18–20]
• The starting point for Lab Six Figure: 4.20 [18, 20, 21, 23–26]
• PLLK3 Portable Logic Lab v3 Figure: 4.13 [21–26]
• Schematic for PLLK3 Figure: 4.15 [21–26]
Many of the features of the PLLK were carried over to PLLK2, albeit in component
form to reduce costs with the added advantage of returning the students to component level
instruction. This not only reduces costs, it allows each student to personally understand the
impact of each decision they make in circuit design.
26
Figure 4.7: Student in Lab with a Lab Kit
The PLLK2, Table: 4.2, includes: 50% extra spare parts compared to the total parts
included in PLLK1. Table: 4.1. This includes the most commonly failing parts (see below).
The design enhancements include:
• Noise reducing capacitors
• An on/off power switch to save battery life
• A LED power indicator
• Power supply reverse polarity protection
• More robust power supply
• Additional DIP switches
• Additional push button switches
• Power bus over voltage protection
27
• Power bus reverse voltage protection
• LED Dual 7 segment display
• Two square wave oscillators for clock signal outputs, not shown built during lab six.
Figure: 4.11
• Replaced the 7473 Flip-Flop with power in the middle pins for a 74109 with power
in the typical pin locations.
To keep the portable lab kit cost down, $20.16, see Table: 4.2. The resistor array and
LED arrays were substituted for individual resistors and LEDs. Figures: 4.4 & 4.9.
Figure 4.8: Fritzing [37] 2nd Portable Logic Lab Kit (PLLK2)
As shown in FAU Logic Design Manual Fall 2016 Spring [18]
To avoid having to mail replacement components to on-line students and to avoid com-
ponent failure, the author examined methods to “harden” the kit. For example, to eliminate
issues due to incorrect wiring, a diode was added to protect against incorrect polarity of28
Figure 4.9: Wired 2nd Portable Logic Lab Kit (PLLK2)
With close up views of Logic Probe & Power Supply circuits
As shown FAU Logic Design Manuals [20]
the 5V regulator (LM7805). Moreover, adding a zener diode prevented issues caused by
connecting the 9V battery to the 5V bus, or even worse still, connecting the 9V backwards
29
Figure 4.10: PLLK2 parts kit distributed with (not shown) 2 breadboards and wire
to the 5V bus. Capacitors were added to maintain a steadier 5V signal. To reduce student
anxiety due to the increased analog components the author recorded a set of videos [39–53]
guiding them step-by-step through the building of the infrastructure section of the bread-
board and testing of the NOT, AND, OR, and NAND chips as preparation for their orienta-
tion lab.
Wiring the 2nd Portable Logic Lab Kit (PLLK2) requires working with the analog com-
ponents which were not discussed in detail as part of the lecture class, their functionality
and detailed wiring was explained in the videos [39–53]. The majority of the students were
able to build the lab kit (without the 7-segment display and driver and oscillators) in time
for lab orientation by the 3rd week of class. Typical build time is ∼ 10 hours. Students
30
that had not completed their PLLK2 platform, powered their Lab #1 using the Digital Lab
Trainer, Figure: 4.2 until they could complete the PLLK2 lab platform.
Figure 4.12: A student built project on the PLLK2
32
Table 4.2: Parts List for Logic Trainer & Portable Kit (PLLK2) [2]
quan part number Description each ext
US Prices, 2017 Q1 Total 20.16
Pin out is the same for: LS F HCT HC
6 74xx00 Quad 2in NAND $0.177 $1.06
3 74xx04 Hex Inverter $0.177 $0.53
3 74xx08 Quad 2in AND $0.146 $0.44
3 74xx10 Triple 3in NAND $0.177 $0.53
3 74xx20 Dual 4in NAND $0.063 $0.19
2 74xx32 Quad 2in OR $0.099 $0.20
2 74xx74 Dual D Flip Flop $0.130 $0.26
2 74xx109 Dual J K Flip Flop $0.242 $0.48
3 74xx138 3:8 Demultiplexor / Decoder $0.212 $0.64
2 74xx157 Quad 2:4 Mux / Encoder $0.351 $0.70
1 74xx283 4bit Adder $0.212 $0.21
3 CD4510 Prestable BCD Up-Down Counter $0.280 $0.84
2 CD4543 BCD 7seg. CA or CC $0.260 $0.52
2 LM324 Op-Amp Quad $0.193 $0.39
2 78m05 5v Voltregulator 500mA TO-220 $0.166 $0.33
1 LDDHTA514RI LED DUAL 7seg 2Anodes $0.970 $0.97
2 SW.DIP-08 Dip SW-08 $0.800 $1.60
6 PB.SW-n.o. SW TACT SPST-NO 50mA $0.160 $0.96
1 9V Bat Conn 9v clip w 8 wire tinned $0.170 $0.17
20 LED.Red LED Red 5mm $0.020 $0.40
2 LED.Green LED Green 5mm $0.020 $0.04
2 LED.Yellow LED Yellow 5mm $0.020 $0.04
1 LED.Blue LED Blue 5mm $0.030 $0.03
2 0.1uF Cap 0.1 uf 20% 50v cap $0.017 $0.03
30 330Ω 1/4W Res. @ 5% Orange Orange Brown Gold $0.008 $0.24
2 1.0kΩ 1/4W Res. 5% Brown Black Red Gold $0.013 $0.03
2 1.5kΩ 1/4W Res. 5% Brown Green Red Gold $0.013 $0.03
33
Table 4.2 – Continued from previous page
quan part number Description each ext
2 3.9kΩ 1/4W Res. 5% Orange White Red Gold $0.013 $0.03
30 4.7kΩ 1/4W Res. 5% Yellow Violet Red Gold $0.008 $0.24
5 10kΩ 1/4W Res. 5% Brown Black Orange Gold $0.013 $0.07
2 330kΩ 1/4W Res. 5% Orange Orange Yellow Gold $0.013 $0.03
2 620kΩ or 680kΩ 1/4W 5% Blue (Red or Gray) Yellow Gold $0.013 $0.03
2 1MΩ 1/4W Res. 5% Brown Black Green Gold $0.030 $0.06
6 1n751a 5.1v Zener Diode $0.019 $0.11
2 1n4001 ... 1n4007 1 Amp Diode $0.025 $0.05
1 Switch.SPST.slide Slide Switch SPST $0.020 $0.02
2 Breadboard 830points $3.750 $7.50
1 Anti-Static Mat $0.020 $0.02
1 Anti-Static Bag $0.142 $0.14
Total 20.16
A special thank you to Texas Instruments, MicroChip & Newark for their generous contribu-
tions to these lab kits.
34
4.4 THE THIRD PORTABLE LAB KIT: (PLLK3)
After two semesters of using PLLK2 the lab kit was upgraded to PLLK3 [3]:
• The PLLK2 logic probe detected high and low. By adding another LED to the logic
probe the circuit was now able to indicate the third and most critical state while
troubleshooting: Unconnected - No Signal Found.
• Implemented a hexadecimal display driver for teaching binary and base sixteen which
was later updated to include Gray code
• Replaced the LM324 quad Op-Amp with two LM358 dual Op-Amps: one for the
logic probe and one for the oscillators
• Swapped a flip-flop IC: the 74109 for the CMOS:CD4027
The PLLK3 were packed in a plastic 5 X 7 plastic container with a lid for easier distri-
bution, Figure: 4.14
The LM324 worked properly for approximately 98% of the students; those who fol-
lowed the instructions and the videos. In later labs this part caused confusion since the
power and ground are in the middle of the part (pins 4 & 11). Using a LM358 eliminated
the confusion with power pins on the top right and ground on the bottom left. The 74109
dual JK negative edge flip-flop was a sub-optimal choice, because students were just learn-
ing about flip-flops and the inverted K caused significant issues in creating the state tables.
35
2018f Intro Logic Design CDA 3201C, FAU, CEECSA special thank you to Texas Instruments, MicroChip & Newark for their generous contributions to your lab kits.
quan part number Pin out is the same for: LS,ALS,ACT,F,HCT,HC, ... Power Pins Purpose
4 7400 Quad 2in NAND Pin 14= + 7= -- Most Labs
2 7404 Hex Inverter Pin 14= + 7= -- Most Labs
2 7408 Quad 2in AND Pin 14= + 7= -- Most Labs
2 7410 Triple 3in NAND Pin 14= + 7= -- Most Labs
2 7420 Dual 4in NAND Pin 14= + 7= -- Most Labs
2 7432 Quad 2in OR Pin 14= + 7= -- Most Labs
1 7474 Dual D Flip Flop Pin 14= + 7= -- Lab 4 & 5
2 74138 3:8 Demultiplexer / Decoder Pin 16= + 8= -- Lab 4 & 5
2 74157 Quad 2:4 Multiplexer / Encoder Pin 16= + 8= -- Lab 6
1 74283 4bit Adder Pin 16= + 8= -- Lab 2
1 cd4027 Dual J K Flip Flop Pin 16= + 8= -- Lab 4 & 5
2 cd4510 Presettable BCD Up/Down Counter Pin 16= + 8= -- Lab 6
2 LM358 or MCP6002 Op-Amp, DUAL Pin 8= + 4= -- Probe
1 PIC16f1503 w/ paper label MicroController - Programed Binary to Hexadecimal Pin 1= + 14= -- ALL
1 78m05 5v Voltage Regulator -- 500mA, TO-220 1=In 2=Gnd 3=Out Power Supply
1 3622AH or 3621AH LED Display, DUAL, 7-segment, 2-Cathodes CC.L=10, CC.R=5 Lab ALL
3 SW.DIP-04 Dip SW-04, Raised, Low Profile Body All
4 PB.SW-n.o. SWITCH, TACTILE SPST-NO 50mA Lab 4 & 5
1 Switch.SPST.slide Slide Switch SPST Power Supply
1 9V Battery Connector 9v clip w/ tinned wires Red= + Black= -- Power Supply
9 LED.Red LED, Red, T-1 3/4 Flat Side= "--" Status
1 LED.Green LED, Green, T-1 3/4 Flat Side= "--" Probe
1 LED.Yellow LED, Yellow, T-1 3/4 Flat Side= "--" Probe
1 LED.Blue LED, Blue, T-1 3/4 Flat Side= "--" Probe
1 LED.White LED, White, T-1 3/4 Flat Side= "--" Power Supply
8 0.1uF Cap 0.1 uf 20% 50v capacitor Power & Lab 6
24 330 Ohm 1/4W Resistor 5% Orange Orange Brown Gold PB Switches & LEDs *only*
18 1.0k 1/4W Resistor 5% Brown Black Red Gold Switches & Probe
1 1.5k 1/4W Resistor 5% Brown Green Red Gold Probe
1 3.9k 1/4W Resistor 5% Orange White Red Gold Probe
1 4.7k 1/4W Resistor 5% Yellow Violet Red Gold or Yellow Violet Black Brown Brown Body = Beige or Blue Probe
15 10k 1/4W Resistor 5% Brown Black Orange Gold Probe + Lab 6
1 100k 1/4W Resistor 5% Brown Black Yellow Gold Lab 6
1 330k 1/4W Resistor 5% Orange Orange Yellow Gold Probe
1 620k or 680k 1/4W @ 5% Blue Red Yellow Gold -or- Blue Gray Yellow Gold Probe
2 1M 1/4W Resistor 5% Brown Black Green Gold Lab 6
41n751a or 1n5231a
or 1n4733a 5.1v Zener Diode
Green, Black, Orange or White case with One Band Band=+5V ** Protection
1 1n4001 ... 1n4007 1amp Diode [Green or Black case, with One Band ] Band= "--" Protection
2 2n2222 or 2n3904 or pn2222 NPN Transistor, TO-92 1=Emitter, 2=Base, 3=Collector Lab 6
2 Breadboard 830 points Connections
1 Anti-Static Mat - Pink Foam - "Bug Rug" Protection
1 5"x8" Bag Save and Use this Bag Protection
2 FEET 10 Wires of 22ga, Assorted colors see video & visit EE96.203 Connections
2 FEET Cat5 (4pair) Cable see video & visit EE96.203 Connections
0 Project Container ProtectionWhen in doubt look it up using Google: "part_number" Datasheet ".pdf"
Figure 4.19: The parts list provided to the students.
Notice: This list does not include the spares.
40
Table 4.3: Parts List for Logic Trainer & Portable Kit (PLLK3) [3]
Kit Needed part number Description each ext
US Prices, 2018 Q3 Total 20.85
Pin out is the same for: LS F HCT HC...
6 4 74HCT00 Quad 2in NAND 0.12 0.72
3 2 74HCT04 Hex Inverter 0.20 0.59
3 2 74HCT08 Quad 2in AND 0.15 0.44
3 2 74HC10 Triple 3in NAND 0.20 0.59
3 2 74HCT20 Dual 4in NAND 0.27 0.80
2 1 74HCT32 Quad 2in OR 0.12 0.25
2 1 74ACT74 Dual D Flip Flop 0.28 0.55
3 3 74HC138 3:8 Demultiplexer / Decoder 0.22 0.65
2 1 74LS157 Quad 2:4 Multiplexer / Encoder 0.16 0.33
1 1 74xx283 4bit Adder 0.46 0.46
2 1 CD4027 Dual J K Flip Flop 0.27 0.53
3 2 CD4510BE Presettable BCD Up/Down Counter 0.29 0.86
0 0 CD4543 BCD to 7-seg., Common Anode or Cathode 0.27 0.00
1 1 PIC16F1503 Binary to HexaDecimal PIC16f1503 0.68 0.68
3 2 LM358 Op-Amp, 2, Dual LM358 0.13 0.39
1 1 3621ah or 3622ah LED Display, Dual, 7-seg., 2-Cath., 10 pins 0.32 0.32
2 1 78m05 78m05 5V Volt Reg. – 500mA, TO-220 0.28 0.55
3 3 ADE0404 Dip SW-04, Raised, Low Profile Body 0.45 1.35
5 4 FSM4JRT SWITCH, TACTILE SPST-NO 50mA 0.02 0.10
2 1 Spdt slide switch (0.1” SS12D00G4) 0.02 0.04
8 6 Cap 100000pf 0.1uf, 20%, X7R, 50 V 0.03 0.22
1 1 9V Battery Connectors 0.10 0.10
30 24 1⁄4W Res. 5% 330Ω 5% MCF 0.25W 0.004 0.12
25 18 1⁄4W Res. 5% 1.0kΩ 5% MCF 0.25W 0.004 0.10
2 1 1⁄4W Res. 5% 1.5kΩ 5% MCF 0.25W 0.01 0.01
2 1 1⁄4W Res. 5% 3.9kΩ 5% MCF 0.25W 0.01 0.01
Continued on next page
41
Table 4.3 – Continued from previous page
Kit Needed part number Description each ext
2 1 1⁄4W Res. 5% 4.7kΩ 5% MCF 0.25W 0.01 0.01
20 15 1⁄4W Res. 5% 10kΩ 5% MCF 0.25W 0.01 0.08
2 1 1⁄4W Res. 5% 100kΩ 5% MCF 0.25W 0.01 0.01
2 1 1⁄4W Res. 5% 330kΩ 5% MCF 0.25W 0.01 0.01
2 1 1⁄4W Res. 5% 620kΩ or 680kΩ 5% MCF 0.25W 0.01 0.01
4 2 1⁄4W Res. 5% 1MΩ 5% MCF 0.25W 0.01 0.03
4 2 2n3904 or 2n2222 or PN2222 NPN Transistor, TO-92 0.03 0.12
8 4 1n751a 5.1v Zener Diode, 1⁄2W, DO-204AH, 5 %, 0.02 0.15
2 1 1n4004 or 1n4007 Diode: 1n4001...1n4007, 1amp 0.02 0.03
10 10 (4 * 2.5 sq.in.) Anti-Static Foam Black or Pink 0.03 0.28
1 1 8x5” hd or antistatic bag 0.14 0.14
2 2 3x5 ziplock bag 0.02 0.03
2 2 Breadboard 3.45 6.90
12 9 15108 OP LED, Red, 5mm T-13/4 0.01 0.15
2 1 15309 OP LED, Yellow, 5mm T-13/4 0.02 0.04
2 1 15308 OP LED, Green, 5mm T-13/4 0.02 0.04
2 1 31363 OP LED, Blue, 5mm T-13/4 0.04 0.08
2 1 15307 OP LED, White, 5mm T-13/4 0.03 0.06
2 2 2’ x 10 Wires of 22ga 0.80 1.60
2 2 2’ Cat5 (4pair) 24ga solid 0.16 0.32
A special thank you to Texas Instruments, MicroChip & Newark for their generous contribu-
tions to these lab kits.
42
Figure 4.20: The starting point for Lab Six
The author generated a schematic for the students to build Lab Six. [17]
43
4.4.1 Improving the Logic Probe
The Logic Probe was an important feature missing from the original PLLK1, the author
implemented it in the PLLK2, then revised the circuit in the PLLK3 to help students debug
their wiring errors on their own. [3] When debugging about 10% of the students had trouble
with the concept of no light means you have no connection - No Signal Found. This short-
coming was addressed with the addition of one LED and a resistor to resolve the issue. The
author also changed the LEDs from red low and green high, because some students were
confused since the main red LEDs indicated high not the logic probe’s low. The logic probe
indicates all three states visually: High (blue “like the sky”), Low (green “like the grass on
the Ground”), and Disconnected (yellow, “like the traffic light, means Caution - No Signal
Found!”). Figure: 4.22. The PLLK3 logic probe was implemented using the LM358 to
reduced board real estate allowed for the implementation of the Hexadecimal display, so
that the lab infrastructure platform fits on one breadboard except for the clock oscillator.
The students’ labs can be built on the second breadboard. Additionally, the placement of
the components and coloring for the wires are rearranged to facilitate easy of wiring the
logic probe. The wiring of the yellow LED used yellow wires, the green LED green wires
and the blue LED used blue wires. see the Video: Building the Logic Probe. [51]
45
Figure 4.22: PLLK2 (Left) and PLLK3 (Right) Logic Probes
PLLK2 Bi-State Logic Probe and PLLK3 Tri-State Logic Probe
Notice: The PLLK2: the LM324 is wired with power in the middle.
Notice: The PLLK3: black marker on the cathode of the yellow LED.
PLLK2 Input signal on Row: 51b-e
PLLK3 Input signal on Row: 63a-d
Planned Revision PLLK4: Swap the Blue and Green LEDs, improving the aesthetics.
46
4.4.2 Implementing a 7 Segment Display Driver with Hexadecimal and Gray Code
Students were having conceptualization issues with Hexadecimal numbers, the author im-
plemented a tool set for the students experimentation. [3]
The need to implement a more sophisticated display driver was based on many factors:
The need to display the results from the 5-bit Adder Lab, the Microprocessor Professors
lamented how students failed to understand Base16 - Hexadecimal, the introduction of the
concept of using micro-controllers as turnkey parts for projects.
Figure 4.23: 7447 Series Display Outputs [120]
The two common parts for driving a 7 Segment display are the 7447 series (Common
Cathode: 7446 Open Collector, 7447 Totem Pole Output; Common Anode: 7448 Open
Collector, 7449 Totem Pole Output) and the CD4543 (LCD / Common Anode / Common
Cathode). The 7447 displays gibberish above 9 as shown in Figure: 4.23. The 7447 was
designed very early in the 7400 product series and was optimized to take advantage of don’t
care states for a reduced gate count. The CD4543 blanks out and shows nothing above nine.
Investigating the options of implementing a Hexadecimal to Seven Segment display
driver, the TIL311 [118] is a turn-key device with built in: logic and display for $25. [119]
Unfortunately, that is the total budget for the Logic Lab Kit.
The Hexadecimal Display was implemented using a 14pin PIC Micro-Controller (PIC),
Figure: 4.25. The original code was for the PIC16f1825, using a less sophisticated algo-
rithm it was possible to implement on the PIC16f505 USD$0.68 part replacing the Non-
Hexadecimal the CD4543 ($0.26) BCD to 7 Segment display driver. Due to sourcing issues
with the PIC16f505, the PIC16f1503 was chosen as a suitable replacement ($0.77). The
parts are programmed by the TAs as part of the Kit Assembly process. Figure: 4.2747
Figure 4.24: Hexadecimal Display controlled by a PIC16f1503
Students are able follow along with the video [52] while building the Hexadecimal
display, where they learn to size the length of the parts and wires for efficient layout of
the parts. Success was enhanced by the addition of a paper label showing EXACTLY
where to connect the wire, shown in Figure: 4.24. Upon completion of this circuit students
then demonstrate proper operation by testing all the states “0” through “F”, where they
incidentally learn about Hexadecimal. Hexadecimal is further reinforced as they use the
display to indicate either inputs or outputs for all the labs they build. The cost to implement
this was less than $1.
The Hexadecimal Display Driver can be student “configured” to accommodate either a
48
Common Cathode or Common Anode type display, a programming resistor either: pull-up
or pull-down on the “c” segment output. During the start-up sequence the PIC code reads
the state of the “c” segment: Low is Common Cathode and High is Common Anode. If the
display reads a “-” for zero, then the “c” programming resistor is either not connected or
in the wrong polarity. Gray code was added to the PIC the following semester. Gray Code
Mode is controlled by programming resistor either: pull-up or pull-down resistor on the
“g” segment state for operating in Gray Code Mode (High) or Hexadecimal Mode (Low).
Figure 4.25: Hexadecimal Schematic
49
4.4.3 Building the Lab Kits
The cost of assembling the kits was eliminated by utilizing all teaching assistants, TAs,
assigned to departmental courses to assemble and package the kits the first week of classes.
Assembly lines were formed as shown in Figures: 4.26. Another task the TAs perform
during the kit assemble process is the programming and verification of the Hexadecimal
PIC microcontroller. Figures: 4.27 & 4.28
Figure 4.26: Assembly lines with TAs Building the Lab Kits
Left: Logic Design Final Assembly Right: Assembling Static Sensitive Parts
Moving the kit assembly process in-house saved ∼ $3 per kit and reduced the parts or-
dering lead time by six weeks. Allows the professors to make last minute changes and most
importantly better quality parts. Fall 2018 the TAs built over 850 kits for all the classes with
50
labs: Logic Design, Microprocessors, Electronics Labs 1 & 2, and Senior Design. They
also build kits for the special offering classes with labs: Electromagnetic Compatibility,
Summer Dual Enrollment High School Electronics Lab, Hack-A-Thon, among others.
Figure 4.27: PIC microcontroller programmer
Designed by C.P. Weinthal. Assembled by W. Bacchili
There was an unanticipated bonus by moving kit assembly in-house. Not only were
undergrads more involved, but the TAs started to learn and appreciate core principles of
51
Figure 4.28: Hexadecimal PIC and LED Display Tester
Designed by C.P. Weinthal. Assembled by W. Bacchili
material handling, inventory control, parts ordering and receiving, assembly line manage-
ment, production scheduling and handling of static sensitive parts.
As an unanticipated benefit, furthermore, by knowing exactly what parts were included
in each kit, the professors, TAs and lab managers were able to institute an accountability
52
regimen among students. Practically speaking, when the lab kits were distributed, the stu-
dents were instructed to review the parts in their kit. They were given 2 weeks to report any
missing parts. If any parts were deemed missing they were replaced on the spot. However,
beyond the 2 week grace period, the students were held responsible for any missing parts.
This step dramatically reduced the costs to FAU for replacing parts.
The preparation work of cutting items on parts tape, see Figure: 4.16, capacitors, diodes,
resistors, and transistors was moved to the CEECS administrative office student staff when
they are not occupied with other tasks. By doing the prep work of cutting parts, into groups
of 5 pieces well ahead of time, assembling the 850 kits now takes less than 150 total person-
hours to distribute and separate over 85,000 parts into 850 kits. Designing and creating an
automated parts cutting system was assigned, Fall 2018, to two Senior Design teams.
53
CHAPTER 5
SUPPLEMENTAL ACADEMIC MATERIALS TO IMPLEMENT THE
PORTABLE LAB PLATFORM
5.1 STRENGTHENING THE FOUNDATION OF KNOWLEDGE
It was clear that it would be impossible to assist each student on a personal level given that
so many are either commuter and/or online students. It became apparent to the author that
videos were necessary due to the many issues that were surfacing (ruined ICs, shorted-out
power supplies, etc.).
To reduce the costs of the portable lab platform to less than $25 per kit, each student
would have to build their platform. The kit includes many analog components not covered
in the class lectures. In the building of the students’ portable platforms, documentation [38]
and videos [39–53] were developed to bridge the knowledge and skills gap. The videos
cover every aspect from demonstrating the basic assembly and operation of a breadboard,
wire stripping, integrated circuit (IC) pin straightening, explaining the function of each
component, and a step-by-step guide on how-to assemble the PLLK’s infrastructure in-
cluding exact placement of each part. This was necessary as many students had never seen
a breadboard, stripped a wire, or taken Physics 2 or Circuits 1 and were critically unpre-
pared in electronics and the use of breadboards. This material has been used successfully
for nine semesters by over 1500 students.
The Logic Design Lab Kit ReadMe & Errata [38] documentation provides web links,
hints, and guides to assist students. The Videos were broken down into modules. The au-
thor arranged them into a YouTube Video Channel: www.youtube.com/channel/ UCiFhC-
QDTNlwQtUvtFSeG76g [39]
54
• ReadMe & Errata [38]
• Using the Tools:
– Wire Stripping [40]
– How a Breadboards Works [41]
– Straighten Pins [42]
– How to Solder & Using a Solder Sucker [43]
– Soldering the 9V Battery Wires [44]
• How Things Work:
– About LEDs [45]
– How Switches Work [46]
• Building the Infrastructure:
– Infrastructure Introduction & Marking LEDs [47]
– Power Supply [48]
– LED Lamps [49]
– Switches [50]
– Logic Probe [51]
– Binary to Hexadecimal Build & Demo [52]
– Logic Gates Demo [53]
• Learning Electronic Skills:
– Electronic Assembly Skills Reinforced
– Tips, Tools, and Tricks for using Breadboards
– Understanding Schematics
55
5.1.1 Supplemental Materials and Documentation on Google Drive
The Logic Design ReadMe & Errata web page s.fau.edu/lablogic [38] provides students
needed support to build the PLLK.
Figure 5.1: The author’s Supplemental Materials on Google Drive page 1 [38]
56
5.1.2 YouTube Channel for Supplemental Videos
Figure: 5.6 shows the Gallery of the author’s YouTube Channel. [39] The author has
uploaded fourteen videos (www.youtube.com/ channel/UCiFhCQDTNlwQtUvtFSeG76g).
Many of these videos are edited as needed to ensure usefulness and clarity for the student.
The author estimates that for each minute of video he invests 5 minutes of editing. e.g. the
Power Supply video is the eighth version and will need to be revised again, to simplify the
build.
Figure 5.6: The author’s Supplemental Videos on YouTube
61
5.2 LEARNING SKILLS AND USING THE TOOLS
These videos demonstrate how to use the tools and perform tasks needed in the Labs.
5.2.1 Video: Skills and Tools: Wire Stripping
Figure: 5.7 is a screen capture from the video on some techniques for wire stripping. In
this video (www.youtube.com/ watch?v=0WwsrW5eLLkPNjkq1B7mHE) [40] the author
teaches the proper method to remove the insulation from 22 and 24-gauge wire without
damaging the wire. The issues with damaging the wires are explained and by demonstrating
the proper technique to strip wire
Figure 5.7: How to Strip Wire
62
5.2.2 Video: Skills and Tools: How a Breadboards Works
For example, Figure: 5.8 is a screen capture from the video on how to use breadboards and
how to assemble them. In this video (www.youtube.com/watch?v=3HOcNmfHSZw) [41]
the author shows and explains the configuration of the wiring patterns of typical bread-
boards, and the importance of correctly stripping the wires as well as issues with wires too
long and too short.
Figure 5.8: How Breadboards Work
63
5.2.3 Video: Skills and Tools: Straighten Pins
Figure: 5.9 is a screen capture from the video of a technique to straighten integrated circuit
pins. In this video (www.youtube.com/watch?v=ToF haDg EY) [42] the author demon-
strates the method to prepare integrated circuits for deployment in breadboards. Issues and
concerns discussed including: static discharge, bent under pins.
Figure 5.9: How to Straighten Integrated Circuit Pins
64
5.2.4 Video: Skills and Tools: How to Solder & Using a Solder Sucker
Figure: 5.10 is a screen capture from the video of basic soldering skills and using a solder
removal tool. In this video (www.youtube.com/watch?v=136oAnXQ5TQ) [43] the author
demonstrates how to solder parts to printed circuit boards (PCB). Topics discussed: safety
issues, proper soldering techniques are introduced, the importance of not overheating parts.
Figure 5.10: How to Solder and Use a Solder Sucker
65
5.2.5 Video: The Tools: Soldering the 9V Battery Wires
Figure: 5.11 is a screen capture from the video of how to solder header pins on to a 9V
battery connector. On-line students are provided with 9V battery leads already completed.
In this video (www.youtube.com/watch?v=yrJuqtgBkWM) [44] the author demonstrates
a method to solder the header pins for insertion in to the breadboard. Safety issues are
discussed and proper soldering techniques are introduced.
Figure 5.11: How to Solder the 9V Connector
66
5.3 HOW THINGS WORK
These videos demonstrate how the common parts operate.
5.3.1 Video: How Things Work: About LEDs
Figure: 5.12 is a screen capture from the video of how to use light emitting diodes (LEDs).
In this video (https:/www.youtube.com/watch?v=1ENZGLcFHWo) [45] the author demon-
strates the correct methods of using Light Emitting Diodes (LEDs). Some circuit theory is
introduced.
Figure 5.12: How LEDs Work
67
5.3.2 Video: How Things Work: How Switches Work
Figure: 5.13 is a screen capture from the video demonstration of how switches work.
In this video (www.youtube.com/ watch?v=0WwsrW5eLLk) [46] the author explains and
demonstrates switches including: dual in-line package (DIP), push button and knife switches.
Switch types and naming conventions are introduced and some circuit theory is discussed.
Figure 5.13: How Switches Work
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5.4 HOW TO BUILD THE LAB KIT INFRASTRUCTURE
These videos show how to build and the Portable Logic Design Lab Kit infrastructure.
5.4.1 Video: The Infrastructure: Introduction & Marking LEDs
Figure: 5.14 is a screen capture from the video of the introduction to the portable logic
lab kit. In this video (www.youtube.com/watch?v=eA4lL82j8Uk) [47] the author gives an
overview of the completed Logic Design Portable Infrastructure and how to mark LEDs for
proper insertion, to begin building the platform.
Figure 5.14: Infrastructure: Introduction & Marking LEDs
69
5.4.2 Video: The Infrastructure: Power Supply
Figure: 5.15 is a screen capture from the video describing how to build the portable logic lab
kit power supply. In this video (www.youtube.com/watch?v=n6iYgyCmS7Y&t=2043s)
[48] the author demonstrates how to build the 9 Volt to 5 Volt power supply circuit using a
LM7805 Regulator Integrated Circuit and support parts. How to properly handle and form
parts for assembly, reading a schematic, some circuit theory and other engineering topics
are discussed.
Figure 5.15: Building the Power Supply
70
5.4.3 Video: The Infrastructure: LED Lamps
Figure: 5.16 is a screen capture from the video describing how to build the portable logic lab
kit LED section. In this video (www.youtube.com/watch?v=INH5tFlla7w&t=680s) [49]
the author demonstrates how to wire the LED indicator lamps. How to properly handle,
bend and form parts for assembly, schematic reading, some circuit theory and other engi-
neering topics are discussed.
The students are instructed to mark the LED cathodes with a black marker, so they can
be easily identified after the pins are cut.
Figure 5.16: Wiring the LEDs
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5.4.4 Video: The Infrastructure: Switches
Figure: 5.17 is a screen capture from the video describing how to build the portable logic lab
kit switch section. In this video (www.youtube.com/watch?v=eEIcWa7LmvM&t=1657ssw)
[50] the author demonstrates how to assemble both DIP and push button switches. How to
properly handle and form parts for assembly, schematic reading, some circuit theory and
other engineering topics are discussed.
Notice the use of additional supplemental information.
Debugging lessons tips are included.
Note that push button switches are not debounced until later in the semester as part of a lab
where this issue is “discovered” by the students.
Figure 5.17: Wiring the Switches: DIP and Push Button
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5.4.5 Video: The Infrastructure: Logic Probe
Figure: 5.18 is a screen capture from the video describing how to build the portable logic lab
kit logic probe section. In this video (www.youtube.com/watch?v=C87YG5b48ow&t=843s)
[51] the author demonstrates how to assemble the logic probe. How to properly handle and
form parts for assembly, schematic reading, circuit theory and other engineering topics are
discussed. A detailed explanation of the circuit is demonstrated and a method to calculate
voltage dividers and using an Op-Amp as a comparator is introduced. Logic voltage thresh-
olds are introduced and suggestions for trouble shooting are shown.
Figure 5.18: Wiring the Logic Probe
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5.4.6 Video: The Infrastructure: Binary to Hexadecimal Build & Demo
Figure: 5.19 is a screen capture from the video describing how to build the portable logic lab
kit Hexadecimal display section. In this video (www.youtube.com/watch?v=12yiv1krRKQ)
[52] the author demonstrates how to assemble the Hexadecimal Display. How to properly
handle and form parts for assembly, schematic reading, circuit theory, introduction to base
systems two and sixteen, Hexadecimal, bits, nibble, bytes and words.
The introduction of the concept of using mirco-controllers as custom process parts is
demonstrated.
Figure 5.19: Wiring the Hexadecimal Display
74
5.4.7 Video: The Infrastructure: Logic Gates Demo
Figure: 5.20 is a screen capture from the video describing how to build the portable logic
lab kit IC gates demo. In this video (www.youtube.com/watch?v=vWDwPQYk16w) [53]
the author demonstrates how to connect 4000 and 7400 series integrated circuits. Topics
introduced and discussed: schematic reading, Figure: 5.21, power and ground, wire color
conventions, voltage level naming conventions, the importance of proper wire lengths, con-
necting to switches and lamps, logic gate functions, the importance of assigning unused
inputs an input level, using the breadboard connections efficiently.
Figure 5.20: Wiring the Logic Gates Demo
75
5.5 TECHNICAL SKILLS AND METHODS
These videos show skills and methods for success in the labs.
5.5.1 Video: Skills: Electronic Assembly Skills Reinforced
The video series (www.youtube.com/channel/UCiFhCQDTNlwQtUvtFSeG76g) [39] is not
intended to be the sole source of information for the students, rather a reliable supplement
of additional information. e.g. When the instructor talks about breadboards, many students
are learning about them for the first time. Figures: 5.22 & 5.23
Figure 5.22: How a Breadboard works
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5.5.2 Video: Skills: Tips, Tools, and Tricks for using Breadboards
Tips, tools and tricks for circuit assembly is covered in all the How-To videos. Figure: 5.24
shows the text added to assist the students with parts placements, important concepts, and
how to tips.
Figure 5.24: Assembly tips and methods
79
5.5.3 Video: Skills: Understanding Schematics
How to read a schematic is reinforced for the students’ benefit. This is a critical skill that
many students need practice. An introduction to analog circuits theory is not covered in
class. These videos enhance the students’ knowledge. They learn about logic levels and
how to test them using the logic probe they build in Figure: 5.26.
Figure 5.25: Introduction to reading Schematics, parts, wires, junctions, ...
80
5.5.4 Video: Skills: Very Brief Introduction to Analog Circuits
The students received a short tutorial on analog circuits enhancing lessons from Physics II
and Fundamentals of Engineering. Figure: 5.26
Figure 5.26: Introduction to reading Schematics, Analog Circuits and Logic Levels
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CHAPTER 6
METHODS TO ENSURE ACADEMIC INTEGRITY ASSURANCE
Academic Integrity Assurance, AIA, is always being challenged. Here are some situations
we have experienced and our solutions to these issues. [3]
6.1 WHY ACADEMIC INTEGRITY ASSURANCE IS VITAL
Students who work and study diligently are adversely affected if the classes are curved as
they will receive lower overall grades to those who behaved unethically. They will receive
lower overall grades to those whom behaved unethically. This affects student moral and
the university’s reputation. We are finding test and assignments being posted on websites
within a half hour of the release of an assignment. Students are very creative on sharing
their test problems during the actual test. The University has a very stern view and strict
policy on academic dishonesty. [30]
6.2 TECHNIQUES FOR LAB ACADEMIC INTEGRITY ASSURANCE
In the labs we have tried many solutions, iteratively improving the method to deter issues.
For example: A group of students shared a single finished breadboard and submitted that
one unit repeatedly, that led to the required pulling off all the project wires and the writing
of their name on the front edge of the breadboard. We had one TA that did not pull the
wires if the students asked nicely, this led to several students using this one TA and using
the same project repeatedly. All students are now required to submit a photo of the finished
lab with their ID in the picture. The professor was flummoxed by a cluster of students
performing exceedingly well in the labs and yet performing dismally on the exams. The
82
professor reviewed the lab images and found the same breadboard was submitted for all of
the poorly performing students and two competent students. The professor consulted with
the two competent students and learned they were sharing their work. All of those students
were placed on academic probation.
6.3 TEAM WORK AND LAB ACADEMIC INTEGRITY ASSURANCE
The TAs enter the lab grade in the students’ lab book grading sheet, as a backup to the
online spreadsheet. One student claimed a TA failed to record his grades for two labs in the
grading spreadsheet. The TA became suspicious as he observed the errant TA’s signature
was of questionable pedigree. The TA took a photo of the grade sheet and confirmed it with
the other TA. We followed up the with additional evidence of CCTV camera footage and
the lab web log.
6.4 TECHNIQUES FOR ON-LINE LAB ACADEMIC INTEGRITY ASSURANCE
With the on-line classes we have another issue since the students may be remote and many
are local. We require they place their Student ID or Driver’s License in the view of the
camera while they record a demonstration of their project. Students are also required to
video the pulling of the lab wires at the end of the video.
While these methods help reduce plagiarism, poor grades are the best end result. Espe-
cially in this class, failure to earnestly work in the lab will lead to inadequate performance
on the exams.
6.5 ACADEMIC INTEGRITY ASSURANCE USER HARDWARE
Introducing a hardware solution to ensuring AIA, the Lab Infrastructure Platform Holding
Assembly (LIPHA). Figure: 6.1 [10, 11] The LIPHA is designed so that dual bread boards
slide in easily, but once the student starts wiring the breadboards they cannot slide out.
83
Additionally, by connecting the student’s breadboard to web server via a PC with a
very low cost USB enabled micro-controller, students can upload their lab results to be
graded. The micro-controller has permanent memory that will be used to store a unique
serial number that cannot be changed by the student. The serial number will be included as
part of the experiment’s data upload packet. Thus students cannot share their lab hardware
projects. Their name on the outside of the box and serial number is embedded into the
EEPROM thereby reducing the dishonest submission of projects.
This prevents two students from getting credit for the same wired board. By obliging
the camera to focused on the LIPHA during the testing sequence is demonstrated, this
would eliminate a user connecting some else’s platform to their micro-controller inputs.
Figure 6.1: Lab Infrastructure Platform Holding Assembly
The drawings for the holder is Figure “C.A.”
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CHAPTER 7
USING THE WEB TO MAKE REAL MEASUREMENTS
The Tri-State Logic Probe was useful to debug circuits, but students don’t get experience
using real world test equipment. To resolve problem this problem, the portable lab will be
integrated into the Smart Adaptive Remote Laboratory (SARL) environment and additional
components will be added to the kit to process analog and digital signals and connect to the
internet. This thesis was to test the feasibility of using a web interface for this portable lab
kit.
Considered for this thesis were equipment commonly found in today’s workplace ac-
cording to the author’s 35+ years of experience: Tektronix, Keysight (H-P, Agilent), Rhodes
& Schwartz, LeCroy, and many other vendors are creating their own versatile complete test
suites in one box. The Tektronix Multi-Domain Oscilloscope, MDO (2k-6k) series, was
selected because they contain an oscilloscope, logic analyzer, spectrum analyzer, function
generator, and digital volt meter (DVM) in a small portable package along with an internet
connection.
Teaching labs with non-standard equipment is not in the best interest of the student(s).
Depriving them from exposure to tools they will likely be expected to use throughout their
career works against the student’s interest. Engineering students deserve training and ac-
cess to modern test equipment to obtain the best emplyment opportunities. Providing this
access requires a significant annual budget. Methods to allow higher utilization of this ex-
pensive equipment improves the students’ return on investment (ROI). Allowing students
to access equipment from off-campus locations further improves the utilization ROI.
Figure: 7.1 presents a model, an overview of the components of the infrastructure devel-
oped. The student builds a portable lab platform on breadboards that permit building and
85
testing of a circuit and to use remote measurement equipment. The portable infrastructure
is enhanced with a web connected very low cost USB enabled micro-controller, Arduino
Nano or ARM M3 BluePill.
Figure 7.1: Remote Lab Overview
7.1 SMART ADAPTIVE REMOTE LABORATORY CONCEPTS AND IMPLE-
MENTATIONS
This research is part of a larger investigation at FAU on Smart Adaptive Remote Labora-
tories, (see SARL.fau.edu website [1]) developing proof of concept labs that test the new
IEEE standards under development such as: IEEE-ICICLE xAPI [6] and IEEE P1876 [7] -
Networked Smart Learning Objects for Online Laboratories.
The team has Ph.D., Masters and Undergraduate students under the guidance of Dr.
Marıa Petrie have created the SARL lab for students to experience remote labs. The group
developed a set of six low cost remote laboratories for logic design and integrated them
into the Florida Atlantic University Canvas learning management system proving the fea-
sibility of using the SARL architecture in an academic enviroment. The goal is to expand
86
Figure 7.2: The SARL Windowsill
the system thereby creating a possibility for other institutions to use and share their own
laboratories as well. Figure: 7.2 shows three labs on a windowsill. Figure: 7.3 shows the
SARL website gallery.
The Remote Lab system uses two subsystems: the Local User Side and the Remote
Side. The user remotely connects to a state-of-the-art oscilloscope via the web. The Tek-
tronix Multi-Domain Oscilloscope MDO3k, shown in Figure: 7.4 was chosen because of
its sophisticated features including logic analyzer and a data signal interpretation including
voltmeter, time and frequency measurements. The digital signal types include Timing and
SPI, I2C, Serial and other standard formats. Tektronix has generously agreed to loan FAU’s
SARL Laboratory the MDO3k Oscilloscope for this study.
7.2 SETTING UP THE EXPERIMENT
Users upload their experimental data using the low cost micro-controller integrated in the
Lab Infrastructure Platform Holding Assembly (LIPHA), Figure: 6.1 [10, 11]. Users log
in and schedule time on the oscilloscope; the system will automatically reconfigure the
87
Figure 7.3: The SARL Experiment Gallery [1]
oscilloscope to process each user’s experiment. The system displays the output to them, as
shown in Figure: 7.5.
In the next revision of the website server code the user configures the equipment using
Augmented Reality, AR; where an image has additional computer graphics added. In this
laboratory the equipment will have an overlay of buttons displayed on the user’s computer
that users can use to program the oscilloscope’s features.
Through AR, the user will configure the front panel of the oscilloscope, Figure: 7.5.
88
Figure 7.4: The Tektronix MDO3k Oscilloscope before the AR Overlay
Oscilloscope image provided by Tektronix and reproduced with permission.
Tektronix reserves its copyright in the original image.
The setup configuration and user data is uploaded to the oscilloscope, and the results cap-
tured and displayed on the remote user’s computer, allows many users to utilize the same
equipment remotely almost seamlessly.
7.3 CONFIGURING THE EXPERIMENT
The students first design and simulate a Logic Design Lab, see Figure: 3.1 and then build
the lab using the PLLK3. Testing the lab and seeing the results in real time allows a deeper
understanding of their design.
The local users side uses a very low-cost USB-enabled micro-controller built into the
LIPHA, Figure: 6.1, that remotely connects multiple signal channels to the modern test
equipment using a web-cloud-based interface. This allows students to develop hands on
skills and knowledge of how to use professional measurement equipment. It is unlikely
89
Figure 7.5: The User View of the Web Scope
that many students will be able to gain access to such cutting edge equipment. This method
also affords schools the ability efficiently to leverage access to expensive test equipment
even to online students.
The RPi configures the network enabled oscilloscope, replicates the data, retrieves the
image or video, and delivers the results via the internet to the user.
90
Figure 7.7: Analog & Digital IO Expander for the Raspberry Pi
Designed by C.P. Weinthal. Assembled by W. Bachli
Made using the CEECS LPKF PCB Milling system
92
CHAPTER 8
IMPLEMENTING THE SMART ADAPTIVE REMOTE LABORATORY
The SARL enviroment approach is to offer a laboratory for the students that will access
state-of-the-art test equipment by using augmented reality, AR, and a Tektronix MDO3k
Multi-Domain Oscilloscope. Students setup their lab platform and laptop to connect to
state-of-the-art test equipment that is available through the SARL remote labs to run exper-
iments in near real time using the internet with minimal investment for the students.
The local user side components are low cost (less than $5), easy to replicate, and use
system. Using either an Arduino Nano or ARM Cortex-M3 BluePill.
On the institution’s side the remote web server is low cost relative the space and equip-
ment needed to provide the 350-bench lab to accommodate matriculated students, except
for the already present test equipment.
The main advantages of this system is that it allows many more students to learn to
use real test equipment and reduce the total system implementation costs for the school.
Instead of having 60 logic analyzers and oscilloscopes costing $200 to $9,000 each, in the
logic design in the lab. Using the PLLK approach allows students access and timeshare
one MDO type oscilloscope from anywhere. Other benefits include: the minimal risk of
damage to the remote equipment and reduced setup time for the students. Students will not
damage or lose costly connectors, probes, and cables.
Additional features implied in this system are:
• The ability to track usage and record results of the student’s labs for grading purposes.
Tracking the time students spend on each section allows for various student metrics.
93
• The ability to monitor and track user ID’s for the experiments permitting enforcement
of academic integrity.
• Usable in many classes, not just Logic Design, but also Microprocessors and Embed-
ded Systems.
• This remote lab can evolve as a tool available through the SARL environment. Cre-
ating unique labs for students to interact with.
8.1 HARDWARE: USER
User hardware consists of the Lab Infrastructure Platform Holding Assembly (LIPHA),
Figure: 6.1 [11] and the USB communication device [10].
Figure 8.1: Student Breadboard Holder Assembly Closeup View showing the Nano Pins
Lab Infrastructure Platform Holding Assembly (LIPHA), Figure: 6.1 [10, 11].94
Arduino Nano @ 8MHz BluePill @ 72 MHz
Figure 8.2: Low Cost Micro-controllers with USB for IO
Parameters of the experiments are limited by the voltages, memory, and speed of the
microcontroller used. Arduino Nano or the Maple / BluePill, both units are priced <$3 on
Ebay.com with USB ports interfaces, Figure: 8.2. The Arduino Nano, uses an Atmel AT-
Mega328P running at 8 MHz, 5V with 2k Bytes of RAM. The Maple / BluePill (BluePill),
uses an ARM Cortex-M3 STM32F103C running at 72 MHz, a 3.3V part with many ports
that are 5V tolerant with 20k Bytes of RAM processor. Through the use of voltage dividers
and protective Zener diodes the analog voltages may be extended to reasonably higher val-
ues.
8.2 SOFTWARE AND HARDWARE: LOCAL USER
The local code is written in “C” using the Arduino SDK, with the computer side written
in Python. The main disadvantage of the Arduino Nano is it only allows twelve inputs and
has much less RAM. The ARM M3 BluePill, provides 16 input channels. Encased in the
LIPHA enclosure, for protection and to prevent tampering, Figure: 6.1 [10, 11]
The Arduino communicates with the user’s PC using the P5 Python package. [130, 131]
Please note: all source code was provided by the SARL Research Group. TELNET
commands were provided by the author. Instructions and Source code are provided in the
Appendix which includes:
• Instructions.txt Code D.7
95
• r5-scope.js Code D.8
• nano.c Code D.9
• writeFile.php Code D.5
• RunningCodeLabScope.js Code D.4
8.3 SOFTWARE AND HARDWARE: REMOTE WEB SERVER
The Web server consists of several parts: The main Raspberry Pi (RPi) server, the scope
RPi server, the TEK MDO3k Oscilloscope.
The configured Tek MDO3k is ∼ $9000 for the four channel 100MHz with necessary
options.
• MDO3014 $4,110 MDO3k 4 Channel 100MHz Oscilloscope
• MDO3BND $3,200 MDO3k Digital Data Analysis Bundle
• MDO3MSO $1,590 MDO3k 16 Channel Logic Analyzer
• Total = $8,900
Figure 8.3: Oscilloscope Instruction Pathway
Please note: all source code was provided by the SARL Research Group. TELNET
commands were provided by the author. The main RPi server is using PHP, and Python to
manage serving web pages. See Figures: 8.3 & 8.4 SARL provided source code D.1 The96
Figure 8.4: Experiment Results Pathway
scope RPi server is using bash Code D.6, PHP (Code D.3) and Python (Code D.2 - D.6)
to run the simulation software to serve signals to the Tektronix MDO3k. The Tektronix
MDO3k oscilloscope receives the signals, processes the signals, and the main RPi fetches
the MDO3k’s image(s), which then sends the results to the user’s computer via the cloud.
The scope RPi is configured to communicate with the Tektronix MDO3k using both the
web interface and send commands via the TELNET interface. This allows for a more secure
command parsing. Additionally, the internal Local Area Network (LAN) only allows for
local devices to talk on the network blocking nefarious access of the internal devices.
The web RPi issues a command with or without data to the Scope RPi. The scope
RPi issues the appropriate commands to setup the MDO3k then pushes the data out to the
MDO3k using the hardware out pins (See Figures: 8.5 & Appendix:C.C). Future enhance-
ments will use the author’s custom RPi Analog & Digital IO board, see Figure: 8.7. When
the data record has been completely outputted, the main RPi then captures the MDO3k’s
image(s) and serves it to the user’s computer via the cloud.
The scope RPi uses Python (Code D.3) for the programming. The TELENT Commands
are issued to the Tektronix MDO3K via a BASH script (Code D.6) call from the main
Python program. The user selects a command and then calls are issued to the Tektronix
MDO3K when the user’s session is active.
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Figure 8.5: Raspberry Pi configured for the Arduino interface
8.4 HARDWARE: REMOTE WEB SERVER
The user’s data is transmitted to an RPi web server configured to replicate the input data
stream using either the RPis Input / Output (IO) pins or a custom Analog and Digital Input /
Output Board, Figure: 8.7, utilizing the Serial Peripheral Interface, SPI *, interface to quad
channel digital to analog (two MCP4822, Dual 12 bit SPI D2A) converters, and an octal
analog to digital (MCP3008 SPI Octal a2d) and a Digital IO (MCP23s17 SPI Digital 16 bit
IO). [* SPI= uses 3 shared wires and one device select wire].
98
Figure 8.6: Analog & Digital IO Expander Schematic for the Raspberry Pi
Larger version in the Appendix: Figure: C
99
Figure 8.7: Analog & Digital IO Expander for the Raspberry Pi
Designed by C.P. Weinthal. Assembled by W. Bachli
Made using the CEECS LPKF PCB Milling system
100
CHAPTER 9
CONCLUSIONS, FUTURE ENHANCEMENTS AND IMPROVEMENTS
9.1 CONCLUSIONS
The topic this thesis explored has been determined to be feasible and has been prototyped:
1. A Low Cost Portable Logic Design Laboratory Platform was developed (and imple-
mented) for less than $25 and was determined to enhance the student experience as
shown by 1500 students successfully building the PLLK for nine semesters.
2. A Secure Platform Case was design and implemented, together with a method to
enhance academic integrity assurance. It is feasible and of reasonable cost to imple-
ment. <$2 to 3d print or lasercut.
3. It is feasible to interface the PLLK through a web connected device, to provide stu-
dents access to the industry standard test equipment to enhance their, skills debugging
and instrumentation.
9.2 CONTRIBUTIONS
This thesis has made the following contributions to the laboratory experience for students
in the Logic Design Course.
1. Design of hardened low-cost, Portable Logic Design Lab platform that fits on one
breadboard to be used in parallel with a student work space breadboard.
101
2. Supplemental education materials in the form of videos made available on the au-
thor’s YouTube channel along with schematics, photos and documents on the author’s
Google Drive instructions supplied by the author.
3. Design and implementation of a Lab Infrastructure Platform Holding Assembly
(LIPHA) case to deter cheating and house a USB communication device and battery.
4. Design and demonstration of a user and server side system to permit remote measure-
ments on the PLLK platform attached to a PC via USB utilizing industry standard
equipment.
A comparison with three other Lab kits, two funded by NSF research grants showing
their various features. Note: they are pre-built and complex, to be used by the students for
their entire academic career. Virginia Tech “Lab In a Box” @ $180, Figure: 9.1, [125] and
the Old Dominion University NSF-PIC @ $130, Figure: 9.2, [126] and Elenco’s XK-550T
@ $195 Figure: 9.3.
Table 9.1: Trainer & Portable Kits Comparison [126]
ODU NSF-PIC VT-Lab in a Box Elenco XK-550T FAU-PLLK
USB 2 no no 1
Integrated Circuits yes yes no yes
Resistors & Capacitors yes yes no yes
Logic Probe no no no yes
Hexdecimal Display no no no yes
Clock Oscillators yes yes yes yes
Reverse Polarity Protection no no no yes
555 / 556 Timer no no no yes
Student Built no no no yes
7 Segment Display 4 no no 2
LCD Display 24*2 no no no
Input & Indicator 12 16 8 12
102
Table 9.1 – Continued from previous page
ODU NSF-PIC VT-Lab in a Box Elenco XK-550T FAU-PLLK
Output & Indicator 28 16 8 9
Debugging Yes no no Yes
I/O Buffer Full Buffered ? no no
Board Size 8 * 10 6” * 10” 12” * 16” 4.5” * 8.5”
Breadboard Interface 1 2 2 2
Debounced Switch 8 yes 2 4
SPDT INT Input 2 Switches yes no no
OP-Amp yes yes no 3 * Dual
Curriculum Package Yes Yes no yes
System Manual Yes Yes no yes
Supplemental Videos ? ? no yes
Parallel Port Yes no no 12bit
EEPROM 64K ? no 32k
Analog to Digital ? ? no 8
DAC 12 Bits ? no no
RF Wireless Comm. 2.4 GHz ? no no
SPI Interface Yes ? no Yes
I2C Interface Yes ? no Yes
Optical Isolation 8 Channels ? no no
Power FET Driver 8 ? no no
Terminal Block 8 ? no no
DC Motor Control 2 ? no no
Stepper Motor Con. 2 ? no no
Expansion Port Yes ? no no
Keypad 3*4 or 4*4 no no no
Sensor 2* Potentiometer 2 2 no
IR Transceiver No ? no no
Hand Tools ? yes yes no
ZIF Socket w MCU 40 Pin ZIF no no no
Power Requirement DC or AC AC AC battery
103
Table 9.1 – Continued from previous page
ODU NSF-PIC VT-Lab in a Box Elenco XK-550T FAU-PLLK
Power Supplies 3x 5x 1
Serial Comm. Yes no no yes
Programming Yes no no no
Debugging Yes no no Yes
RS232 Interface Yes no no no
DMM ? yes yes no
Price $130 $180 $195 $30
Figure 9.1: Virgina Tech “Lab In a Box” [125]
104
9.3 FUTURE WORK
9.3.1 Creating More Remote Experiments
Creating interesting and repeatable experiments is a challenge that often requires inspira-
tion. There currently are six prototype SARL lab experiments being implemented that will
interface with the portable lab platform to enhance the Logic Design Labs.
9.3.2 Implementing the Augmented Reality (AR) interface
Further options to the instrumentation SARL Remote Labs will be added as more hardware
is implemented on the analog and digital remote server and local user systems AR interfaces
are redesigned to give students the ability to setup and control the oscilloscope.
Additional educational videos [39–53] enable students to test their circuits with the
industry standard test equipment and interfaces.
Currently, the oscilloscope, and in the future the voltmeter, signal generator and others
features can be integrated as a tool in the SARL environment.
9.3.3 Implementing the D2A section on the IO board for the Analog systems
Some features planned to the Analog system:
• Implement a Digital Multimeter (DMM) AR display
• Implement higher voltage inputs >1V, design a circuit to prevent excessive voltages
to the IO board.
• Basic circuit analysis labs using analog parts on the users’ side.
9.3.4 Enhance Security Features
Implementing Captcha [142], recording IP address, and with partner universities incorpo-
rating multifactor authentication are some of the security features implemented.
106
9.3.5 Student Feedback Tools
Feedback tools to quickly identify issues difficulties with assignments. Allowing educators
to adapt their lessons and labs to improve outcomes.
107
APPENDIX A
A.1 PHOTO CREDITS
• Figure: 4.1 Prototype Portable Logic Lab Kit (PLLK0), by Gee Won Han [27]
• Figure: 4.3 Wiring diagram for the PLLK1: By P. Pastran, from the FAU CEECS
2015 Fall Logic Design Manual.
• Figure: 4.23 Texas Instruments [120]
• Figures: 6.1, 8.1, and Appendix “C.A” By Roberto Sanchez-Giron
• Figure: 7.4 Oscilloscope image provided by Tektronix and reproduced with permis-
sion. Tektronix reserves its copyright in the original image.
• Table: 9.1 Trainer & Portable Kits Comparison [126]
• Figure: 9.1 Virgina Tech “Lab In a Box” [125]
• Figure: 9.3 Elenco XK-550T
• Figure “C.I” BluePill Board & Pinout Permission via Creative Commons Open Source
[133]
• All other Drawings, Pictures & Tables by the Author: C. P. Weinthal ©All Rights
Reserved
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A.2 ABBREVIATIONS
AIA Academic Integrity Assurance
AR Augmented Reality
CEECS Comuter & Electrical Engineering and Computer Science Department
CoE or CoECS College of Engineering and Computer Science
DESSA Division of Engineering Student Services and Advising
DMM Digital Multi-Meter
DVM Digital Volt Meter
EEPROM Electrically Erasable Read Only Memory
FAU Florida Atlantic University
IC Integrated Circuit
I2C Inter-Integrated Circuit
IEEE Institute of Electrical and Electronics Engineers
IO Input Output
LACCEI Latin American and Caribbean Consortium of Engineering Institutions
LD Logic Design
LEDs Light Emitting Diodes
LIPHA Lab Infrastructure Platform Holding Assembly
MDO3k Tektronix’s Multi Domain Oscilloscope 3000 Series
OME Ocean and Mechanical Engineering Department
PCB Print Circuit Board
PLLK Portable Logic Lab Kit
ROI Return On Investment
110
ABBREVIATIONS, continued
RPi Raspberry Pi Micro Computer
SARL Smart Adaptive Remote Laboratory
SPI Serial Peripheral Interface
TA(s) Teaching Assistant(s)
TSG Technical Support Group, part of the CoECS
Tek Tektronix
USB Universal Serial Bus
VL Virtual Labs
111
APPENDIX B
SUPPORTING QUOTES
ABET: Curriculum Accreditation Requirements [90]
“The program must have documented student outcomes that prepare grad-
uates to attain the program educational objectives. Student outcomes are out-
comes below plus any additional outcomes that may be articulated by the pro-
gram.” [90]
a) an ability to apply knowledge of mathematics, science, and engineering
an ability to design and conduct experiments, as well as to analyze and
interpret data
b) an ability to design a system, component, or process to meet desired needs
within realistic constraints such as economic, environmental, social, po-
litical, ethical, health and safety, manufacturability, and sustainability
c) an ability to function on multidisciplinary teams
d) an ability to identify, formulate, and solve engineering problems
e) an understanding of professional and ethical responsibility
f) an ability to communicate effectively
g) the broad education necessary to understand the impact of engineering
solutions in a global, economic, environmental, and societal context
h) a recognition of the need for, and an ability to engage in life-long learning
i) a knowledge of contemporary issues
j) an ability to use the techniques, skills, and modern engineering tools nec-
essary for engineering practice.” [90]
“In the ABET Report 1999 [www.abet.org], it is cited that “... regardless
the method of educational delivery, both programs (traditional and distance112
learning) should be consistent with the stated objective of the programs and it
is essential that graduates of both programs can demonstrate the same capabil-
ities.” Thus it is necessary for an online distance learning institution to provide
the same learning environment as traditional learning process. Problems arise
when there is no clear statement of the objectives of laboratory exercises: [72]
1. Designing a laboratory experience without clear instructional objectives
is like designing a product without a clear set of design specifications.
Something useful might result but, it may not be what was really desired
and, at best, the process will be exceedingly inefficient.
2. Innovation will be difficult because there are no targets to inspire change
and no standards by which the changes may be judged.
This last problem has become clear with the advent of programs offering un-
dergraduate engineering degrees, including laboratories, using the Internet or
other distance learning technologies. To help to resolve this problem, ABET
organized a colloquy on Learning Objective for Engineering Education Labo-
ratory with a support from Alfred P. Sloan Foundation. Fifty one distinguished
engineering educators gathered in San Diego, California in January 2002. They
came with 13 learning objectives: [75]
All objectives start with the following: “By completing the laboratories in
the engineering undergraduate curriculum, you will be able to...” [75]
Objective 1: Instrumentation. Apply appropriate sensors, instrumentation, and/or soft-
ware tools to make measurements of physical quantities.
Objective 2: Models. Identify the strengths and limitations of theoretical models as
predictors of real-world behaviors. This may include evaluating whether
113
a theory adequately describes a physical event and establishing or validat-
ing a relationship between measured data and underlying physical prin-
ciples.
Objective 3: Experiment. Devise an experimental approach, specify appropriate equip-
ment and procedures, implement these procedures, and interpret the re-
sulting data to characterize an engineering material, component, or sys-
tem.
Objective 4: Data Analysis. Demonstrate the ability to collect, analyze, and interpret
data, and to form and support conclusions. Make order of magnitude
judgments and use measurement unit systems and conversions.
Objective 5: Design. Design, build, or assemble a part, product, or system, includ-
ing using specific methodologies, equipment, or materials; meeting client
requirements; developing system specifications from requirements; and
testing and debugging a prototype, system, or process using appropriate
tools to satisfy requirements.
Objective 6: Learn from Failure. Identify unsuccessful outcomes due to faulty equip-
ment, parts, code, construction, process, or design, and then re-engineer
effective solutions.
Objective 7: Creativity. Demonstrate appropriate levels of independent thought, cre-
ativity, and capability in real-world problem solving.
Objective 8: Psychomotor. Demonstrate competence in selection, modification, and
operation of appropriate engineering tools and resources.
Objective 9: Safety. Identify health, safety, and environmental issues related to tech-
nological processes and activities, and deal with them responsibly.
Objective 10: Communication. Communicate effectively about laboratory work with
114
a specific audience, both orally and in writing, at levels ranging from
executive summaries to comprehensive technical reports.
Objective 11: Teamwork. Work effectively in teams, including structure individual
and joint accountability; assign roles, responsibilities, and tasks; moni-
tor progress; meet deadlines; and integrate individual contributions into a
final deliverable.
Objective 12: Ethics in the Laboratory. Behave with highest ethical standards, including
reporting information objectively and interacting with integrity.
Objective 13: Sensory Awareness. Use the human senses to gather information and
to make sound engineering judgments in formulating conclusions about
real-world problems.
The objectives cover the range of knowledge in cognitive domain, psychomo-
tor domain and affective domain. As cited in Ref. [72], Objective 1, 2, 3, 4 and
5 are dealing with cognition. Objective 8 and 13 are included in psychomotor
domain [72]. The remaining objectives are partly in both cognitive and affec-
tive domains. It is necessary for the effective engineer to be exposed with all
these three domains. As cited in Ref. [79], it is generally accepted that some of
these 13 criteria may be met as easily online as in a campus lab environment
but it is difficult to fulfill psychomotor and sensory awareness.” [71]
“The first such remote laboratories are control and robotic labs [87], other
remote labs have become more common in other engineering fields. Most of
these new labs utilize LabView web server that developed by National Instru-
ments [86]. Internet technology allows the institute to provide students with
distance access to the actual laboratory tools and give them the essential prac-
tical skills. As cited in Ref. [88], the application areas of remote laboratories
are:
115
1. Shared Remote Lab: if the equipment is very expensive, the students
could share and access to the equipment through remote lab.
2. Localized Remote Lab: the institute could establish a remote lab that can
be accessed via the Internet to perform experiments at anytime, helping
students re-do experiments carried out earlier, enhancing their practical
skills.
3. Distant Remote Lab: this kind of remote laboratory is useful for distance
learners.
4. Technical Review Lab: this lab will be useful for professionals who
would like to test a particular system or equipment from their desk.
In order to conduct an experiment there are a few components required to
build a complete web based remote lab. [84]
1. Client Stations: basically a Personal Computer with Internet access.
2. Internet: Intermediate System/Network that connects Clients Station and
Remote Lab Server.
3. Remote Lab Server: server(s) used to provide access to the experimenta-
tion units.
4. Experimentation Unit: a set of equipment and devices, which is used to
carry out experiment.
5. Instrumentation Unit: instruments that used to measure the readings from
the experimentation unit/provide real-time measurement of the Experi-
ment.
A complete remote laboratory environment raises some issues:
1. Hands on experience: there should be a clear view on the monitor from
the video camera of all devices and instruments used in the experiment.
116
The settings should be suitable for all students with different level of
skills. There must be an automatic error detection and notification sys-
tem, so students are able to understand mistakes made at each step. The
measurement result should be provided in a same form as the real mea-
surement devices. The display of an oscilloscope, multi-meter, power
generator, etc. on the PC should look like the real device.
2. Flexibility and reliability: the access to the remote lab must be flexible,
there should be no restriction in time and place. The students can per-
form the lab exercise at anytime and anywhere. It means the remote lab
should be open 24 h everyday to be accessed from anywhere. The de-
vices, measurement instruments and server in the remote lab should be
highly reliable there should not be faults or breakdowns in the system.
3. Cost: depends on the price of the devices, instruments, servers and soft-
ware that are used to build a complete set of remote lab, additionally the
number of students using the system. Students should not bear extra cost
such as software or other devices, the institution providing related soft-
ware via the Internet. The systems should be maintained by qualified
technicians to guarantee reliability.
4. Learning experiences: it is essential that students enjoy and gain knowl-
edge from the remote lab exercise. There should be a demonstration
before the student carried out the lab exercise to give them confidence.
Equally important, the students must be able to discuss online the exper-
iments with other students and Instructors.” [71]
117
APPENDIX C
DRAWINGS AND SCHEMATICS
Figure A: Portable Lab Platform Casework - Lasercut
Designed By: C.P. Weinthal, T. Nguyen, L. Koester, A. Saint,
L. F. Z. Rivera, R. Sanchez-Giron, & M. Larrondo-Petrie
Drawn by Roberto Sanchez-Giron
118
Figure B: Portable Lab Platform Casework
Designed By: C.P. Weinthal, T. Nguyen, L. Koester, A. Saint,
L. F. Z. Rivera, R. Sanchez-Giron, & M. Larrondo-Petrie
Drawn by Roberto Sanchez-Giron
119
APPENDIX D
SOFTWARE LISTINGS
The author utilized the talents from SARL Research Group for the assistance with writing
soft- ware to preform the control functions and the author provided the needed instruction
com- mands for the instrumentation.
D.1 WEB SERVER - MAIN SERVER
D.1.1 sarl.html
Listing D.1: code/sarl.html
// Copyright 2018 by L.F. Zapata Rivera
//
//
// USER INTERFACCE SARL WEB SERVER
<?php require(’functions/functions.php ’);
require_once(’functions/connection.php ’);
$ServerName = $_SERVER[’SERVER_NAME ’];
if (isset($_SESSION[’email’]))
$currentUser = $_SESSION[’email’]; // Can later use to do other things
else
header("location: index.php");
?>
<!DOCTYPE html >
<html lang="en">
<head >
<meta charset="utf -8">
<meta http -equiv="X-UA-Compatible" content="IE=edge">
<meta name="viewport" content="width=device -width , initial -scale=1">
<!-- The above 3 meta tags *must* come first in the head; any other head content must come *after* these
tags -->
<title >Smart Adaptive Remote Laboratory </title >
<!-- Bootstrap -->
<link href="css/bootstrap.min.css" rel="stylesheet">
<!-- WebioPI lib
<script type="text/javascript" src="/webiopi.js"></script >-->
127
<!-- Javascript lib -->
<script src="https :// ajax.googleapis.com/ajax/libs/jquery /3.1.1/jquery.min.js"></script >
<!-- WebioPI lib -->
<script type="text/javascript" src="scripts/btnFunctions.js" ></script >
<!-- Font Awesome lib -->
<script src="https :// use.fontawesome.com /29 a8bf1bfb.js"></script >
<script src="tincan.js" ></script >
<!-- P5.js -->
<script src="labScope_Nano/p5.js" type="text/javascript"></script >
<script src="labScope_Nano/p5.dom.js" type="text/javascript" ></script >
<script language="javascript" type="text/javascript" src="labScope_Nano/p5.serialport.js"></script >
<script type="text/javascript" src="labScope_Nano/labScope.js"></script >
</head >
<body >
<nav class="navbar navbar -default">
<div id="page" class="container -fluid">
<div class="navbar -header">
<button type="button" class="navbar -toggle collapsed" data -toggle="collapse" data -target="#bs-
example -navbar -collapse -1">
<span class="sr -only">Toggle navigation </span >
<span class="icon -bar"></span >
<span class="icon -bar"></span >
<span class="icon -bar"></span >
</button >
<a class="navbar -brand" href="#" ><?php echo ’Smart Adaptive Remote Laboratory ’; ?></a>
</div >
<div class="collapse navbar -collapse" id="bs-example -navbar -collapse -1">
<ul class="nav navbar -nav navbar -right">
<li class="dropdown">
<a href="#" class="dropdown -toggle" data -toggle="dropdown" role="button" aria -expanded="
false">Options <span class="caret" ></span ></a>
<ul class="dropdown -menu" role="menu">
<li class="divider" ></li >
<!-- <li><a href="#" data -toggle="modal" data -target="#RebootSystem">Reboot System </a></
li>-->
<li class="divider" ></li >
<!-- <li><a href="logOut.php">Logout </a></li>-->
<li><a href="index.php?logout =’1’">Logout </a></li>
</ul >
</li >
</ul >
</div >
</div >
</nav >
128
<div class="row">
<div class="modal fade" id="RebootSystem">
<div class="modal -dialog">
<div class="modal -content">
<div class="modal -header">
<button type="button" class="close" data -dismiss="modal" aria -hidden="true"
>× </button >
<h4 class="modal -title">Reboot System </h4 >
</div >
<div class="modal -body">
<p>If you reboot the system all services will be stop (including this Remote
Laboratory) temporally until the Operational System from Raspberry Pi
starts again. </p>
<p>If you want to reboot the system , press Reboot System button below and
refresh this web page after 60s. </p>
</div >
<div class="modal -footer">
<form name="RebootSystem" >
<button type="button" class="btn btn -default" data -dismiss="modal">Close </
button >
<button type="submit" name="RebootSystem" value="true" class="btn btn -danger
">Reboot System </button >
</form >
</div >
</div >
</div >
</div >
</div >
</div >
</div >
<div class="col -md -12" id="LaboratoryContent">
<div class="panel panel -warning">
<div class="panel -body">
<div class="panel -heading">
<h3 class="panel -title">Measurements </h3>
</div >
<p class="text -muted">Click the buttons below to turn on/off and reset the
Oscilloscope </p>
<button type="button" name="GoLabScope" value="On" class="
btn btn -danger" id="RunBtn" onClick="
RunningCodeLabScope(’sarl.fau.edu ’,’10.15.11.249 ’)">
Send to Scope </button >
<button type="button" name="GoLabScopeClear" value="On" class="
btn btn -danger" id="RunBtnClear" onClick="
RunningCodeLabScopeClear(’sarl.fau.edu ’,’10.15.11.249 ’)">
Clear </button >
129
<p class="text -muted"> Welcome to SARL Lab @ Florida Atlantic
University (SARL.fau.edu). Tektronix has graciously loaned
this MDO3014 Oscilloscope. </p>
<div id="Scope" style="text -align: center;">
<iframe id="Scopeimg" src="http ://10 .15.11.248 :81/ image.png"
Height="52%" Width="49%" ></iframe >
</div >
</div >
</div >
</div >
<!-- Include all compiled plugins (below), or include individual files as needed -->
<script src="js/bootstrap.min.js" ></script >
</body >
</html >
130
D.2 SCOPE SERVER - INSTRUMENTATION SERVER
D.2.1 scope.php
Listing D.2: code/scope.php
// Copyright 2018 by L.F. Zapata Rivera
//
//
//php in the Raspberry Pi3 SCOPE:
<html lang="en">
<!-- <script src="tincan.js"></script >-->
<?php
error_reporting(E_ALL); ini_set(’ display_errors ’, 1);
session_start ();
$output = "";
/* Get the last code loaded in this file */
function curl_execution($url ,$fields)
$fields_string = "";
foreach($fields as $key=>$value) $fields_string .= $key.’=’.$value. ’&’;
$fields_string = rtrim($fields_string ,’&’);
//open connection
$ch = curl_init ();
//set the url , number of POST vars , POST data
curl_setopt($ch ,CURLOPT_URL ,$url);
curl_setopt($ch ,CURLOPT_POST ,count($fields));
curl_setopt($ch ,CURLOPT_POSTFIELDS ,$fields_string);
curl_setopt($ch ,CURLOPT_RETURNTRANSFER ,false);
// execute post
$result = curl_exec($ch);
//close connection
curl_close($ch);
//echo $result;
if (isset($_POST[’GoLabScope ’])&& $_POST[’GoLabScope ’] == ’On’)
shell_exec(’sudo python /var/www/html/SmartAdaptiveRemoteLaboratory/functions/generateScopeOutput.py
’);
if (isset($_POST[’GoLabScopeClear ’])&& $_POST[’GoLabScopeClear ’] == ’On’)
131
shell_exec(’sudo bash /var/www/html/SmartAdaptiveRemoteLaboratory/functions/clear.sh ’);
if (isset($_POST[’GoLabScopeClear ’])&& $_POST[’GoLabScopeClear ’] == ’On’)
shell_exec(’sudo bash /var/www/html/SmartAdaptiveRemoteLaboratory/functions/clear.sh ’);
if (isset($_POST[’GoLabScopeClear ’])&& $_POST[’GoLabScopeClear ’] == ’On’)
shell_exec(’sudo bash /var/www/html/SmartAdaptiveRemoteLaboratory/functions/clear.sh ’);
if (isset($_POST[’GoLabScopeClear ’])&& $_POST[’GoLabScopeClear ’] == ’On’)
shell_exec(’sudo bash /var/www/html/SmartAdaptiveRemoteLaboratory/functions/clear.sh ’);
if (isset($_POST[’GoLabScopeClear ’])&& $_POST[’GoLabScopeClear ’] == ’On’)
shell_exec(’sudo bash /var/www/html/SmartAdaptiveRemoteLaboratory/functions/clear.sh ’);
echo $output;
?>
</html >
132
D.3 SCOPE SERVER - INSTRUMENTATION SIGNAL GENERATION
D.3.1 generateScopeOutput.py
Listing D.3: code/generateScopeOutput.py
// Copyright 2018 by L.F. Zapata Rivera
//
//
// Python Code generateScopeOutput.py:
from random import randint
import time , os, sys
import RPi.GPIO as GPIO ## Import GPIO library
GPIO.setmode(GPIO.BOARD) ## Use board pin numbering
#setup output pins
GPIO.setup (11, GPIO.OUT) ##
GPIO.setup (12, GPIO.OUT) ##
GPIO.setup (13, GPIO.OUT) ##
GPIO.setup (15, GPIO.OUT) ##
GPIO.setup (16, GPIO.OUT) ##
GPIO.setup (18, GPIO.OUT) ##
GPIO.setup (22, GPIO.OUT) ## trigger
##f = open("pins.txt","r") #opens file with name of "pins.txt"
pin0=0
GPIO.output (22,True)
time.sleep (0 .00001)
GPIO.output (22,False)
for x in range (1 ,100):
if (pin0 == 0):
GPIO.output (11,False)
pin0=1
else:
GPIO.output (11,True)
pin0=0
print(pin0)
time.sleep (0.01)
GPIO.cleanup ()
sys.exit ()
133
D.3.2 RunningCodeLabScope.js
Listing D.4: code/RunningCodeLabScope.js
// Code provided by the SARL Research Group
//
//2. The function to run the scope lab in the JavaScript
// file called btnFunctions which is in the main SARL server has
// been modified to pass a string read by the P5.js to the
// Raspberry Pi as follow:
function RunningCodeLabScope(server ,pi_server ,dataStr)
var url = ’http ://’+server+’/SmartAdaptiveRemoteLaboratory/functions/executingcommandfunction.php ’;
$.ajax (
url: url ,
method: ’POST’,
type: ’text’,
data: GoLabScope: dataStr , Hostname: pi_server,
beforeSend: function(data)
$("#RunBtn").html(’<i class="fa fa-spinner fa-spin fa-fw"></i> Sending Data’);
,
success: function(data)
$("#RunBtn").html(’Send to Scope’);
$(’#Scope’).html("<div id=’Scope’ style=’text -align: center;’><iframe id=’Scopeimg ’ src=’
http ://[ SCOPE_IP :81/ image.png ’ Height =’100%’ Width =’100%’></iframe ></div >")
$(".AlertMessage").html(data);
)
134
D.3.3 writeFile.php
Listing D.5: code/writeFile.php
// Code provided by the SARL Research Group
//
// 1. The php file in the Raspberry Pi that connects to the Scope
// should include a function like below for generating the text file
// of input for the python code to run.
<?php
function writeFile( $string)
$inputs = explode( ’,’, $string);
$fh = fopen( i n p u t s . t x t , ’w’) or die("Could not create the file.");
foreach ($inputs as $value)
fwrite($fh , $value) or die("Could not write to the file.");
fclose($fh);
?>
135
D.4 SCOPE SERVER - INSTRUMENTATION COMMANDS
D.4.1 clear.sh
Listing D.6: code/clear.sh
// Copyright 2018 by L.F. Zapata Rivera and C.P. Weinthal
//
//
// SH TYPE COMMANDS TELNET clear.sh
telnet [SCOPE_IP] [SCOPE_TELENET_PORT] << END
TRIG FORC
exit
END
136
D.5 R5 DATA TRANSFER
D.5.1 Instructions.txt
Listing D.7: code/Instructions.txt
5. How the process work:
a. The user have to run p5serial server on his/her local machine and connect to the Arduino Nano.
b. Go to the website and select the port (that the Arduino Nano is connected to) from a drop down list.
c. Interact with the Breadboard , then push the s e n d button (on breadboard)
d. Arduino Nano read values from breadboard and send to P5.js as Serial Data
e. P5.js catch the data sent from Arduino Nano and forward it to the php in the Raspberry Pi
f. Raspberry Pi generate a text file with the received input and execute the python
g. Python read the text file and send data to Scope accordingly
137
D.5.2 r5-scope.js
Listing D.8: code/r5-scope.js
// Code provided by the SARL Research Group
//
// 3. This is the code for the P5.js to read the serial values
// sent from the Arduino Nano and combine them into a string to
// pass to the Raspberry Pi:
/*
Test this with the Arduino sketch echo.ino , in the p5.serialport
examples/echo directory.
Try at varying baudrates , up to 115200 (make sure to change
Arduino to matching baud rate)
*/
var serial; // variable to hold an instance of the serialport library
var portName; // fill in your serial port name here
var inData; // for incoming serial data
var inByte = "N/A";
var inString = "";
var dec = "";
var output = 0;
var menu;
var options =
baudrate: 9600
;
function draw()
background (255);
fill (0);
text(result , 10, 60);
function openPort ()
portName = menu.elt.value;
serial.open(portName);
function setup ()
serial = new p5.SerialPort (); // make a new instance of the serialport library
serial.list ();
serial.on(’list’, printList);
serial.on(’data’, serialEvent); // callback for when new data arrives
serial.on(’error ’, serialError); // callback for errors
serial.open(portName , options); // open a serial port
serial.clear ();
138
function draw()
if (inString != "")
RunningCodeLabScope(’sarl.fau.edu ’,’[SCOPE_IP]’, inString)
inByte = "";
inString = "";
// Got the list of ports
function printList(serialList)
menu = createSelect ();
var title = createElement(’option ’, ’Choose a port:’);
menu.child(title);
menu.position (260, 195);
menu.changed(openPort);
for (var i = 0; i < serialList.length ; i++)
var thisOption = createElement(’option ’, serialList[i]);
thisOption.value = serialList[i];
menu.child(thisOption);
println(i + " " + serialList[i]);
function serialEvent ()
// read a byte from the serial port:
inByte = serial.readString ();
inString += inByte;
function serialError(err)
println(’Something went wrong with the serial port. ’ + err);
139
D.5.3 nano.c
Listing D.9: code/nano.c
// Code provided by the SARL Research Group
//
/// 4. This is the code for the Arduino Nano
const int COMB = 2; // Combinational Logic Mode set to pin D0 (mode on/off)
const int SIZE = 6; // Size of analyzer ports
int inPin[SIZE]; // Store read input from bread board (digital)
int timeDelay = 0;
void saveData ()
for (int i = 0; i < SIZE; i ++)
inPin[i] = digitalRead(i + 4);
Serial.print (inPin[i]);
Serial.print (",");
Serial.flush ();
void setup()
// By default , the ports are set to input
for (int i = 0; i < SIZE; i++)
// Set default values of input to -1
inPin[i] = -1;
//Open serial communication at speed 9600
Serial.begin (9600);
void loop()
//Set up delay depending on number of shoots
// Return back from P5 sketch
if (Serial.available () > 0)
timeDelay = Serial.read ();
else
timeDelay = 1;
140
// Sending values from breadboard (Combination)
if (digitalRead(COMB))
// Calling function to process and send data (Combination)
saveData ();
delay(timeDelay * 3000);
141
BIBLIOGRAPHY
[1] Florida Atlantic University (n.d.). Smart Adaptive Remote Laboratory. Retrieved fromURL http://sarl.fau.edu/
[2] Weinthal, C.P., Larrondo-Petrie, M.M., Zapata Rivera, L.F., (2017, July).Evolution, Design and Implementation of a Modular Portable Lab Kit forLogic Design. LACCEI 2017 Retrieved from URL http://laccei.org/LACCEI2017-BocaRaton/work in progress/WP555.pdf
[3] Weinthal, C. P., Larrondo-Petrie, M.M., (2018, July). Implementing an Enhanced ToolKit for Modular Portable Lab Kit for Logic Design. LACCEI 2018 Retrieved fromURL http://www.laccei.org/LACCEI2018-Lima/work in progress/WP232.pdf
[4] Shankar, R. T., & Lapaix, J., & Weinthal, C. P., & Ploger, D., & Augustin, M., &Aguerrevere, S. (2015, June). Precision Low-cost Robotics for Math Education (WorkIn Progress) Paper presented at 2015 ASEE Annual Conference & Exposition, Seattle,Washington. 10.18260/p.24579
[5] Coarsey, C. T., Berger, A., Medina, C., Pavlovic, M., & Weinthal, C. P.(2016). OPEN-SOURCE DEVICE FOR VARIABLE ULNAR EMINENCE.Retrieved from URL http://media.mycrowdwisdom.com.s3.amazonaws.com/aaop/Resources/JOP/2016/2016-006.pdf
[6] IEEE, (n.d.). IEEE-ICICLE standards. Retrieved from URLhttps://www.ieeeicicle.org/
[7] IEEE, (n.d.). P1876 Networked Smart Learning Objects for On-line Labs. Retrievedfrom URL http://sites.ieee.org/sagroups-edusc/
[8] Rivera, L. F. Z., & Petrie, M. M. L. (2016). Models of collaborative remote labo-ratories and integration with learning environments. International Journal of OnlineEngineering (iJOE), 12(09), 14-21.
[9] Rivera, L. F. Z., & Larrondo-Petrie, M. M. (2016, February). Models of remote labo-ratories and collaborative roles for learning environments. In Remote Engineering andVirtual Instrumentation (REV), 2016 13th International Conference on (pp. 423-429).IEEE.
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