MULTIPLE-CHOICE QUESTIONS (MCQ) EXAMINATION ...

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University of Duisburg-Essen Prof. Dr.-Ing. Axel Hunger -Institute of Computer Engineering - Demo-Exam SS 17 Special Exercise for Operating Systems and Computer Networks Page: 1 Lastname, Firstname Matriculation No. Type MULTIPLE-CHOICE QUESTIONS (MCQ) EXAMINATION DURATION: 90 MINUTES Annotations to the assignments and the solution sheet This is a multiple choice examination, that means: Solution approaches are not assessed. For each subtask there is only one correct solution. For each subtask you are allowed to mark one box only. If two or more boxes for a subtask are marked, no points will be given for this subtask. Note the following points In addition to the assignment sheets there is a solution sheet. Mark the appropriate box(es) on the solution sheet! Any answer on the ASSIGNMENT SHEETS will NOT be considered. It is not possible to correct markings in the solution sheet. In case of errors request a new solution sheet. Any earlier solution sheet is substituted only as immediate exchange old against new. The previous erroneous or invalid sheet will be destroyed by the invigilating staff. In case of submission of multiple sheets neither will be evaluated. Any substitution of solution sheets is only possible up to 5 minutes before the official end of the examination time. Only use the sheets enclosed in the envelope or otherwise provided by the supervisors. Don't use any other paper. If you need more paper ask the supervisors. Return everything, i.e. assignment sheets, solution sheet and any additional sheets - used and un- used. Only exams that are returned completely will be assessed. FILL-IN YOUR NAME AND MATRICULATION NUMBER ON THE ASSIGNMENT SHEET AND THE SOLUTION SHEET!

Transcript of MULTIPLE-CHOICE QUESTIONS (MCQ) EXAMINATION ...

University of Duisburg-Essen

Prof. Dr.-Ing. Axel Hunger -Institute of Computer Engineering -

Demo-Exam SS 17

Special Exercise for Operating Systems and Computer Networks Page: 1

Lastname, Firstname Matriculation No. Type

MULTIPLE-CHOICE QUESTIONS (MCQ) EXAMINATION

DURATION: 90 MINUTES

Annotations to the assignments and the solution sheet This is a multiple choice examination, that means:

• Solution approaches are not assessed.

• For each subtask there is only one correct solution.

• For each subtask you are allowed to mark one box only. If two or more boxes for a subtask are marked, no points will be given for this subtask.

Note the following points

• In addition to the assignment sheets there is a solution sheet.

• Mark the appropriate box(es) on the solution sheet! Any answer on the ASSIGNMENT SHEETS will NOT be considered.

• It is not possible to correct markings in the solution sheet. In case of errors request a new solution sheet. Any earlier solution sheet is substituted only as immediate exchange old against new. The previous erroneous or invalid sheet will be destroyed by the invigilating staff. In case of submission of multiple sheets neither will be evaluated.

Any substitution of solution sheets is only possible up to 5 minutes before the official end of the examination time.

• Only use the sheets enclosed in the envelope or otherwise provided by the supervisors. Don't use any other paper. If you need more paper ask the supervisors.

• Return everything, i.e. assignment sheets, solution sheet and any additional sheets - used and un-used. Only exams that are returned completely will be assessed.

• FILL-IN YOUR NAME AND MATRICULATION NUMBER ON THE ASSIGNMENT SHEET AND THE SOLUTION SHEET!

University of Duisburg-Essen

Prof. Dr.-Ing. Axel Hunger -Institute of Computer Engineering -

Demo-Exam SS 17

Special Exercise for Operating Systems and Computer Networks Page: 2

Lastname, Firstname Matriculation No. Type

Assignment 1 (6 Points)

1.1 Concerning operating systems, which of the following statements is/are true?

FAT32 has a smaller FAT table entree size than FAT16.

For buddy systems in memory management, a 16KiB free block and a neighbouring 32KiB free block cannot be merged into a 48 KiB buddy block, when necessary.

Time sharing refers to the parallel execution of multiple processes on a CPU for a single user.

A memory block organized with the direct mapped cache method has only one place where it can be placed, determined by the operation: (Address) DIV (number of cache blocks).

None of them.

1.1 Concerning computer networks, which of the following statements is/are true?

When compared to 1-persistent CSMA, non-persistent CSMA brings about a better channel utilization but longer transmission delays.

The Data Link Layer in ISO/OSI Model provides a logical addressing for paths within the network.

In Selective Repeat Sliding Window protocol, the sender re-transmits the unacknowledged frames only, if an erroneous frame arrived at the receiver.

In case the Dijkstra’s algorithm discovers a new route between two points that has the same length as a previous discovered route between those points, the old one will be replaced.

None of them.

University of Duisburg-Essen

Prof. Dr.-Ing. Axel Hunger -Institute of Computer Engineering -

Demo-Exam SS 17

Special Exercise for Operating Systems and Computer Networks Page: 3

Lastname, Firstname Matriculation No. Type

Assignment 2 (14 Points)

Given is a magnetic Hard disk with 4 heads, 2 platters, 120000 cylinders, 200 sectors/track on the innermost 60000 cylinders, 450 on the outermost 60000 cylinders and a sector size of 0.5 KiB.

2.1 Which of the following equals the total hard disk capacity of the before mentioned disk (Rounded to the second decimal place).

72.64 GiB 74.39 GiB 78.00 GiB

79.87 GiB 81.66 GiB None of them.

If you couldn’t calculate the disk capacity in 1.1, use SC = 80 GiB for the following question.

2.2 What is the minimal cluster size that is chosen, if you want to format the hard disk from assignment 1.1 with the standard formatting using FAT32?

1 KiB 2 KiB 4 KiB

8 KiB 16 KiB None of them.

Consider a UNIX File System with a typical UNIX partition:

Fig. 2-1 Typical Unix partition

This I-Node is capable of 12 direct addressable blocks, single, double and triple indirect addressing. Given a block size of 64 KiB and a file length of 1024 Bits.

2.3 What file size is addressable directly from the information in the I-node?

1536 Byte 67072 Byte 768 KiB

8 MiB 768 MiB None of them.

2.4 What file size is addressable by using triple indirect blocks with the given i-node?

32 MiB 16 GiB 512 GiB

8 TiB 32 TiB None of them.

University of Duisburg-Essen

Prof. Dr.-Ing. Axel Hunger -Institute of Computer Engineering -

Demo-Exam SS 17

Special Exercise for Operating Systems and Computer Networks Page: 4

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Assignment 3 (14 Points)

The speedup ratio of a cache memory is given by the formula:

mc

m

thth

tS

)1( −+=

Formula. 3-1 Speedup Ratio in Cache Memory

3.1 What is the Speedup-ratio if the access to the memory takes 50 ns, the access to the cache takes 5 ns and the hit ratio is 90%? (Rounded to the third decimal place).

S = 0.526 S = 1.099 S = 2.632

S = 5.263 S = 10 None of them.

Consider a computer system without a cache, a memory access time of tm = 240ns and an average internal operation time of 40 ns. The system spends 50% of its time computing internal operations and the rest for memory access. This system will be upgraded with a L1 cache with an average access time of tc = 20ns and a hit ratio of 90%. The main memory will also be upgraded at the same time and the resulting system will be 4 times faster compared to the system prior to the upgrade.

3.2 Which of the shown memory access time, of the upgraded computer system, is the highest possible tm,new, that fulfills the speed increment criteria?

tm,new = 40ns tm,new = 60ns tm,new = 80ns

tm,new = 100ns tm,new = 120ns None of these

tcycl,avg = tint,avg * Pint + tm,avg * Pm

University of Duisburg-Essen

Prof. Dr.-Ing. Axel Hunger -Institute of Computer Engineering -

Demo-Exam SS 17

Special Exercise for Operating Systems and Computer Networks Page: 5

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Assignment 4 (16 Points)

Figure 4-1 indicates a part of a CPU-cache available for allocation. The memory is divided into segments of fixed size.

M0 M1 M2 M3 M4 M5 M6 M7

13 KiB 10 KiB 12 KiB 11 KiB 18 KiB 9 KiB 23 KiB 14 KiB

Fig. 4-1 Cache memory

Three processes A, B, C and D want to successively allocate memory in that order, with the respective sizes of:

• A = 16 KiB

• B = 10 KiB

• C = 8 KiB

• D = 10 KiB

Note: The memory block (Figure 3-1) and the processes A, B, C and D are used for assignment 4.1 and 4.2!

4.1 Which of the following statements is true?

Next Fit algorithm allocates the memory in the order M4, M0, M1 and M2 for the successive requests.

Next Fit algorithm allocates the memory in the order M0, M4, M6 and M7 for the successive requests.

Next Fit algorithm allocates the memory in the order M4, M6, M7 and M0 for the successive requests.

Next Fit algorithm allocates the memory in the order M4, M1, M5 and M3 for the successive requests.

None of them.

4.2 Which of the following statements is true?

Best Fit algorithm allocates the memory in the order M1, M2, M4 and M5 for the successive requests.

Best Fit algorithm allocates the memory in the order M4, M1, M5 and M3 for the successive requests.

Best Fit algorithm allocates the memory in the order M4, M0, M1 and M2 for the successive requests.

Best Fit algorithm allocates the memory in the order M6, M4, M7 and M0 for the successive requests.

None of them.

University of Duisburg-Essen

Prof. Dr.-Ing. Axel Hunger -Institute of Computer Engineering -

Demo-Exam SS 17

Special Exercise for Operating Systems and Computer Networks Page: 6

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A Cache memory with an initial total size of 2 MiB. The cache is organized with the buddy system and receives the following 4 successive memory requests:

• Data A: 198 KiB

• Data B: 750 KiB

• Data C: 120 KiB

• Data D: 254 KiB

4.3 Which of the following pictures describes the memory blocks after all memory requests are allocated?

250 KiB 125 KiB 125 KiB 500 KiB 1000 KiB

Data A Data C Data D Data B

256 KiB 768 KiB 128 KiB 128 KiB 256 KiB 512 KiB

Data A Data B Data C Data D

256 KiB 128 KiB 128 KiB 256 KiB 256 KiB 1024 KiB

Data A Data C Data D Data B

250 KiB 750 KiB 125 KiB 375 KiB 500 KiB

Data A Data B Data C Data D Data B

None of them.

A Cache memory with an initial total size of 2 MiB. The cache is organized with the buddy system and receives the following 3 successive memory requests:

• Program A: 750 KiB

• Program B: 198 KiB

• Program C: 254 KiB

4.4 Which of the following statements is true?

The internal fragmentation, after allocating the data from program C, results in 78 KiB

The internal fragmentation, after allocating the data from program C, results in 334 KiB

The internal fragmentation, after allocating the data from program C, results in 512 KiB

The internal fragmentation, after allocating the data from program C, results in 548 KiB

None of them.

University of Duisburg-Essen

Prof. Dr.-Ing. Axel Hunger -Institute of Computer Engineering -

Demo-Exam SS 17

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Assignment 5 (18 Points)

Consider the following set of processes, with the length of the CPU-burst time given in milliseconds:

Processes Burst Time (ms) Priority Priority Description

P1 6 1 High P2 3 1 High

P3 8 3 Low P4 7 2 Medium P5 4 4

Very Low

P6 4 2

Medium Table 5-1 Process Burst times and Priorities

Please Note: Assume that P1 is at the head of the ready queue and P6 is at the tail, and ignore the time for context change.

5.1 Using Round-Robin scheduling algorithm with quantum time of 1 ms, which of the following solutions is the average waiting time of the processes described in Table 5-1 (Rounded to the first decimal place)?

twait = 15.4 ms twait = 17.0 ms twait = 19,5 ms

twait = 21.6 ms twait = 22.8 ms twait = 24.8 ms

None of them

5.2 Using non-preemptive priority scheduling algorithm, which of the following solutions is the average turnaround time of the processes described in Table 5-1. In case of equal priorities, implement Shortest Job First scheduling algorithm (Rounded to the first decimal place)?

tta = 12.2 ms tta = 15.7 ms tta = 16.5 ms

tta = 17.5 ms tta = 18.5 ms tta = 19.6 ms

None of them

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Prof. Dr.-Ing. Axel Hunger -Institute of Computer Engineering -

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Five Processes arrive at a computer system, capable of multi-tasking, with a single CPU-core. Each process arrives at a specific time (‘Arrival’) after the initialization, which is to be assumed at 0ms. All delays concerning process switching can be ignored. The ‘CPU Time’ describes the amount of time of pure processing a task needs until it is finished. The average memory access time of all processes can be assumed with 50% (p=0.5).

Process CPU Time (ms) Arrival (ms)

A 400 0

B 200 200

C 400 550

D 300 800

E 200 1100

Table 5-2 Process Times and Arrival

5.3 How many ms after the initialization is it possible to compute all processes from table 5-2 again in the same order and arrival times, without any overlap between the last finished process of the prior iteration and the first process from the new iteration? (Rounded to the nearest ten)

1670 ms 1750 ms 1880ms

1960 ms 2100 ms None of these

CPU Auslastung = 1 - pn

University of Duisburg-Essen

Prof. Dr.-Ing. Axel Hunger -Institute of Computer Engineering -

Demo-Exam SS 17

Special Exercise for Operating Systems and Computer Networks Page: 9

Lastname, Firstname Matriculation No. Type

Assignment 6 (18 Points)

Two stations: A (sender) and B (receiver) are connected via a point-to-point link to exchange messages. There are 10 frames ready for buffering at Station A and the starting time for every algorithm is at 0 ms.

Fig. 5-1 Network transmission depiction

Consider the following statements for this assignment:

• The transmission and process times between the two stations and two processes are: tsend = tanswer = tprocess = 20ms

• The timeout-time for an unacknowledged frame is: ttimeout = 50ms

• The window sizes for the Selective Repeat and Go-back-n algorithms are defined with n = 4.

• A retransmission of a frame has a higher priority than the transmission of the next frame in the window (for Selective Repeat algorithm).

• Station B knows as soon as a frame arrives if an error occurred or not, without a delay in time.

• An ACK or NAK is processed instantaneously at Station A and B meaning that as soon as the information arrives it can be used.

University of Duisburg-Essen

Prof. Dr.-Ing. Axel Hunger -Institute of Computer Engineering -

Demo-Exam SS 17

Special Exercise for Operating Systems and Computer Networks Page: 10

Lastname, Firstname Matriculation No. Type

6.1 Considering an error free transmission, which of the following statements concerning the transmission algorithms is true?

Stop & Wait is faster than Selective Repeat but Slower than Go-back-n

Go-back-n is faster than Stop & Wait but Slower than Selective Repeat

Go-back-n is faster than Selective Repeat but Slower than Stop & Wait

Selective Repeat is faster than Stop & Wait but Slower than Go-back-n

Stop & Wait is as fast as Go-back-n, but both are slower than Selective Repeat

Selective Repeat is as fast as Go-back-n, but both are slower than Stop & Wait

Stop & Wait is as fast as Selective Repeat and both are faster than Go-back-n

Stop & Wait is as fast as, Go-back-n and both are faster than Selective Repeat

Go-back-n is as fast as Selective Repeat and both are faster than Stop & Wait

None of them.

Now consider the following error scenario for the assignments 6.2 and 6.3: 50ms after the beginning of the transmission an error occurs, that is repeated every 80ms thereafter (At 50ms, 130ms, 210ms, etc.). This error affects the frame and/or response signal that is transmitted at the time of the error, resulting in a total loss of the transmissions.

6.2 How many ms after the start of the algorithm will the ACK for frame 4 arrive at Station A using the Go-back-n algorithm?

120 ms 180 ms 240 ms

280 ms 320 ms None of them.

6.3 How many ms after the start of the algorithm will the ACK for frame 5 arrive at Station A using the Selective Repeat algorithm?

120 ms 160 ms 200 ms

240 ms 280 ms None of them.

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Assignment 7 (16 Points)

For network transmission, the following network frame structure depicted in Fig. 7-1 is used. The payload has a variable length of n bytes. The length (BL) of the whole network frame (block) cannot be larger than BL, max = 8 KiB.

SOH 4 Charachters DLE STX n Byte DLE ETX BCC BCC EOT

Header Payload Trailer

Fig. 7-1 Network Frame Structure

7.1 Now assume that the payload consists of the character “ETX”, which could be mistaken as trailer information. Which of the following methods can prevent a false interpretation of payload data?

Adding DLE prior to ETX Adding SOH and EOT to ETX

Adding an ESC-Sequence prior to ETX None of them.

The transmission rate (bandwith) TR is 608 kbit/s. For this assignment the average number of additional ESC-Bytes appearing in the payload is 0 Byte/s.

7.2 Calculate the code efficiency for the case of an error-free transmission for a fixed size of 64 Byte payload (Rounded to the second decimal place).

ηCode= 80.00 % ηCode= 83.12 % ηCode= 84.21 %

ηCode= 87.67 % ηCode= 90.75 % None of them.

7.3 Calculate the transmission rate of pure payload with an average number of additional ESC sequences within the payload is 103 Byte/s. Each additional ESC sequence in the payload has a total size of 3 Bytes, the payload has a fixed size of 64 Bytes and the transmission rate (bandwith) TR is 608 kbit/s.

TR,eff = 480 𝑘𝑏𝑖𝑡

𝑠 TR,eff = 488

𝑘𝑏𝑖𝑡

𝑠 TR,eff = 504

𝑘𝑏𝑖𝑡

𝑠

TR,eff = 512 𝑘𝑏𝑖𝑡

𝑠 TR,eff = 536

𝑘𝑏𝑖𝑡

𝑠 None of them.

University of Duisburg-Essen

Prof. Dr.-Ing. Axel Hunger -Institute of Computer Engineering -

Demo-Exam SS 17

Special Exercise for Operating Systems and Computer Networks Page: 12

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Now consider an erroneous transmission. The error bit rates are given as follows:

• Single Errors: q1 = 10-4 per Byte.

• Double Errors: q2 = 10-5 per Byte.

• Triple Errors: q3 = 10-6 per Byte.

Higher error rates are not considered.

7.4 Calculate the optimal block length that does not violate the rule for BL,Max , given in this assignment, if the error correction mechanism is able to recognize all errors and correct single errors (Results are to be rounded to the next full Byte [ 0.5 ≥ → 1 | 0.5< → 0]).

𝐵𝐿,𝑂𝑝𝑡 = √12 𝐵𝑦𝑡𝑒2

1.1 ∗ 10−5 𝐵𝐿,𝑂𝑝𝑡 = √

12 ∗ 105 𝐵𝑦𝑡𝑒2

1.1 𝐵𝐿,𝑂𝑝𝑡 = √12 ∗ 10−4 𝐵𝑦𝑡𝑒2

𝐵𝐿,𝑂𝑝𝑡 = √83,6 ∗ 105 𝐵𝑦𝑡𝑒2 𝐵𝐿,𝑂𝑝𝑡 = √12 𝐵𝑦𝑡𝑒2

104 𝐵𝐿,𝑂𝑝𝑡 = √

76 𝐵𝑦𝑡𝑒2

1,1 ∗ 105

𝐵𝐿,𝑂𝑝𝑡 = √76 ∗ 104 𝐵𝑦𝑡𝑒2 𝐵𝐿,𝑂𝑝𝑡 = √13,2 ∗ 104 𝐵𝑦𝑡𝑒2 𝐵𝐿,𝑂𝑝𝑡 = √13.2 𝐵𝑦𝑡𝑒2

104

None of them.

Hint: Optimal Block length is the block length that results in a maximum payload transfer rate (given below) under the errorneous transmission.

payloadpreamble trailer

gross

net

tare

Payload transfer rate

University of Duisburg-Essen

Prof. Dr.-Ing. Axel Hunger -Institute of Computer Engineering -

Demo-Exam SS 17

Special Exercise for Operating Systems and Computer Networks Page: 13

Lastname, Firstname Matriculation No. Type

Assignment 8 18 Points

Given a network with the following topology, which will be analyzed with the Dijkstra-algorithm:

Fig. 8-1 Network topology with weight description

The circles describe a node within the network, the lines are connections between nodes with a weight provided by each line. The starting node for the algorithm is node A. The Dijkstra algorithm starts with the initialization and creates a list S of all nodes; except the source node, and calculates the arrays D[v] and R[v]. D[v] indicates the current distance from source node to the node v whereas R[v] represents the route containing the predecessor nodes passed through from source to node v. Then the algorithm begins with the iterations.

8.1 Which node will be selected as the new node to continue the search at the start of the fourth iteration?

Node B Node C Node D

Node E Node F None of them.

8.2 How many replacements of routes were done by the algorithm after the initialization step?

5 replacements 6 replacements 7 replacements

8 replacements 9 replacements None of them.

8.3 Which is the shortest route from node A to node H?

R[H] = [G, D, A] R[H] = [H, F, D, C, A] R[H] = [F, E, A]

R[H] = [A, C, D, G] R[H] = [H, G, D, A] R[H] = [A, C, D, G, H]

R[H] = [G, F, D, C, B, A] R[H] = [F, D, C, B, A] None of them.