M. Tech Electronics (Digital System) Engineering

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i Department of Electronics and Telecommunication Engineering M. Tech Electronics (Digital System) Engineering K. E. Society’s Rajarambapu Institute of Technology, Rajaramnagar, Islampur (An Autonomous Institute Affiliated to Shivaji University, Kolhapur) 2016-17

Transcript of M. Tech Electronics (Digital System) Engineering

i

Department of Electronics and

Telecommunication Engineering

M. Tech Electronics

(Digital System)

Engineering

K. E. Society’s

Rajarambapu Institute of Technology,

Rajaramnagar, Islampur

(An Autonomous Institute Affiliated to Shivaji University,

Kolhapur)

2016-17

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INDEX

Sr.

No. CONTENT Page no.

1 Institute Profile 1

2 Academic Council 2

3 Academic Rules and Regulations 4

4 Student Counseling Cell 34

5 Anti Ragging Committee 35

6 Vishakha Cell 37

7 Code of Conduct for Students 37

8 Departmental profile 39

9 Department Faculty Profile 41

10 Department Advisory Board (DAB) members 43

11 Board of Studies (BOS) Members 44

12 Vision, Mission, PEOs, POs 45

13 Curriculum Structure and Syllabus

a) First Year M.Tech –Electronics (Semester I and II) Implemented from

2016-17.

b) Second Year M.Tech – Electronics (Semester III and IV) Implemented

from 2016-17.

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1.Institute Profile

Kasegaon Education Society's "Rajarambapu Institute of Technology", Rajaramnagar, Sakharale,

(Tal. - Walwa Dist. – Sangli) was established as a self financed Engineering Institute in 1983. It

is affiliated to the Shivaji University, Kolhapur, recognized by Government of Maharashtra and

approved by All India Council for Technical Education, New Delhi. The objective of the institute

is to provide excellent technical education for producing high quality engineering manpower for

industry and to promote academic excellence through research and development.

The Institute has achieved a long term goal to attain complete Academic Autonomy. This

allows the institute to prescribe its Academic Calendar, design its own structure and syllabi,

conduct examination, carry out Assessment/Evaluation and declare results. Under autonomy

the degree however shall be awarded by Shivaji University on completion of the program.

The institute proposes to implement an experiential learning model (ELM) under Autonomous

structure. It is always perceived in the context of engineering education that institutes

produce engineers with a strong theoretical and conceptual background with a limited focus

on hands on experience. There exists a gap between what students learn and what the industry

demands. RIT in its autonomy model makes a sincere effort to adopt an experiential

learning model (ELM) which focuses on learning by doing.

Experiential learning provides opportunity for the students to experiment and learn better by

doing. The curriculum will be designed keeping in mind the hands on experience through

extensive experimentation through lab work, plant visits, in-plant training, mini projects and

projects in industries. A judicious mix of theory and practices will make RIT students as

preferred prospective employees.

RIT as an autonomous Institute functions with the objectives of promoting academic

freedom and scholarship on the part of teachers and students which are essential for

fostering and development of intellectual ambiance conducive to the pursuit of scholarship and

excellence. The focus of the Institute is always student centric and the endeavor shall be to

ensure that students get the best of what is required to create Outstanding Engineers.

In the First stage, a student is exposed to courses in the chosen specialization of Engineering

branch which dwell on the principles governing design and which develop in them the ability for

physical and analytical modeling, design and development.

During the final stage, a student studies problems of integrated design with an awareness of size,

performance, optimization and cost. The student works for his/her final year project individually

under the supervision of the faculty member/instructor assigned to the individual.

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A student is also introduced to the social and economic objectives of the era and to the

interaction between man, machine and nature. This is achieved through courses like practical

training, fieldwork, industrial visits, seminars, co-curricular and extra-curricular activities etc.

2. Academic Council

Table 1.Academic Council Members:

Sr. No. Name Category Position

1. Dr. (Mrs.) S. S. Kulkarni

Director, RIT, Rajaramnagar Ex – Officio Chairman

2. Dr. M. T. Telsang

Dean Academics, RIT Ex – Officio

Member

Secretary

3. Dr. MilindSohani

Indian Institute of Technology, Mumbai BOG Nominee Member

4.

Dr. Anant R. Koppar

CEO, KTwo Technology Solutions,

Bangalore

BOG Nominee Member

5. Dr. VishwasUdpikar

President, Wavelet Group, Pune BOG Nominee Member

6.

Dr. V. R. Ghorpade.

Principal,

D. Y. Patil College of Engineering,

Kasababavada, Kolhapur.

University Nominee Member

7.

Dr. P. N. Chougale

Principal, D. R. Mane Mahavidyalaya,

Kagal, Dist. Kolhapur

University Nominee Member

8.

Dr. SuhasPatil

K.B.P. College of Engineering,

Satara.

University Nominee Member

9. Dr. S. M. Sawant

Dean Student Development, RIT Ex – Officio Member

10. Dr. A. C. Attar

Dean Quality Assurance, RIT Ex – Officio Member

11. Prof. P. M. Mohite

Dean Infrastructure, RIT Ex – Officio Member

12. Dr. A. B. Kakade

Dean R & D, RIT Ex – Officio Member

13. Dr. H. S. Jadhav

Dean Diploma, RIT Ex – Officio Member

14. Prof. M. V. Pisal

Head CIIED Ex – Officio Member

15. Dr. P. D. Kumbhar

Controller of Examination (COE) Ex – Officio Member

16. Prof. R. D. Padval

Registrar, RIT Ex – Officio Member

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17. Dr. P. S. Patil

Professor Ex – Officio Member

18. Dr. S. R. Desai

Chairman, BOS – Automobile Engg. Ex – Officio Member

19. Prof. D. S. Patil

Chairman, BOS – Civil Engg. Ex – Officio Member

20. Dr. N. V. Dharwadkar

Chairman, BOS- Computer Sci. Engg. Ex – Officio Member

21. Dr. H. T. Jadhav

Chairman, BOS – Electrical Engg. Ex – Officio Member

22. Dr. M. S. Patil

HOD, Electronics & Tele. Engg. Ex – Officio Member

23. Prof. Mrs. S. P. Patil

Chairman, BOS – Information Tech. Ex – Officio Member

24. Dr. S. S.Gavade

Chairman, BOS – Mechanical Engg. Ex – Officio Member

25.

Prof. D. G. Thombare

Chairman, BOS – Sciences &

Humanities

Ex – Officio Member

26. Dr.NishikantBohra

Chairman, BOS – M B A Ex – Officio Member

27. Dr. S. A. Pardeshi

Professor, Chairman BOS, E T C Ex – Officio Member

28. Prof. P. M. Jadhav

Training & Placement Officer, RIT Director‘s Nominee Member

29. Dr. S. D. Yadav

Associate Professor, RIT Director‘s Nominee Member

30. Prof. R. T. Patil

Associate Professor, RIT Director‘s Nominee Member

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3. Academic Rules And Regulations

3.1 DEFINITIONS

Institute Rajarambapu Institute of Technology, Rajaramnagar

BoG Board of Governors of the Institute

University Shivaji University, Kolhapur

Academic Council

(AC)

Apex academic body governing the academic programs and

framing rules and regulations.

Board of Studies (BoS) Departmental academic body to govern the academics of

programs offered by department.

Program Program of study leading towards award of Degree

Semester Period in which academic activities are carried out.

Summer Term A period during summer vacation during which remedial classes

are conducted.

Course Theory/ Practical/ seminar/ Projects/ mini projects/ industrial

Training

Course Credit Weightage assigned to the course.

Grade A double letter assigned to indicate the student‘s performance in a

course.

DPC Departmental Program committee

DPGC Departmental Post Graduate Committee

Course Instructor Member of faculty who shall be assigned to a course

SPI Semester Performance Index

CPI Cumulative Performance Index

ATKT Allowed To Keep Terms

BoE Board of Examinations

HoD Head of the Department

HoP Head of the Program

ADC Academic Development Committee

PG Post Graduate 2 years, 4 semester program leading to M. Tech.

Academic RR Rules and regulations governing academic system of the institute.

AICTE All India Council for Technical Education - An apex body in

Technical Education In India

Government Government of Maharashtra

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3.2 INTRODUCTION

Institute has been offering Post Graduate (PG) program leading to Master‘s degree (M.

Tech.) since last 17 years. The PG programs offered and degrees obtained are listed as

shown in Table 2. The admission to PG program which shall be of four academic

semesters (2 years) is as per the norms set by All India Council for Technical Education

(AICTE), New Delhi, the competent Authority of the Government of Maharashtra/

Directorate of Technical Education, Mumbai / Shivaji University, Kolhapur and which

shall be prevailing at the time of admission.

Table 2. Programs offered and Degrees Awarded

Name of Department Programs (M.Tech.) offered

Automobile Engineering Automobile

Civil Engineering Civil Structural Engineering

Civil Construction Management

Computer Science & Engineering Computer Science & Engineering

Electrical Engineering Electrical (Power System) Engineering

Electronics & Tele Communication

Engineering

Electronics

Electronics (Digital System) Engineering

Mechanical Engineering Mechanical Design

Mechanical Production

Mechanical Heat Power Engineering

CAD/CAM/CAE

a) All the post graduate (PG) degree programs shall be governed by the rules and

regulations provided in the version of the academic RRs. PG program curriculum consists

of courses in Engineering and Technology and other related areas. The stringent

evaluation norms shall be followed to maintain the quality of education. The examination

system is governed by examination rules and regulations and completely transparent and

follows the pre announced schedule as per academic calendar.

b) Semester: The Institute implements a credit based semester system. The academic year is

divided into two regular semesters. The semester that begins in July is named as odd

semester and the semester that begins in January is known as even semester. Total

duration of each semester is generally of 20 weeks including the period of examination,

evaluation and grade declaration.

c) The rules and regulations mentioned in the documents are applicable to all the PG

programs (M.Tech.) offered by the institute.

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d) The rules and regulations stated hereunder are subjected to revisions/

refinements/updates and modifications/amendments by Academic Council (AC) from

time to time and are applicable to all the further batches including those already

undergoing programs at different years and are binding on all stakeholders including

students, parents, faculty, staff and institute authorities.

e) The academic administration of the institute consists of committees and administrators.

The committees are AC, BoS, BoE, ADC and administrators are Director, Deans, Heads

of Departments (HoDs), Heads of Programs (HoPs), Registrar and Controller of

Examinations (CoE).

f) The academic programs of the institute shall be governed by rules and regulations

approved by Academic Council from time to time. AC is the supreme and statutory

academic body that governs all academic matters of the institute and the decisions of the

AC Chairman (Director of the Institute) shall be final in matters relating to academic

matters. All academic activities are scheduled through an approved academic calendar

notified at the beginning of each academic semester/year.

3.3 ADMISSIONS

a) The admissions process and eligibility to various M.Tech. programs for regular entry are

governed by the norms and procedures laid down by the Government of Maharashtra.

b) Each student shall be allotted Permanent Registration Number (PRN) during admission

and that will be permanent identification number. This number shall not change and the

allotted number shall not be offered to any other student even after cancellation of

admission. The number shall be valid till the student completes the program or cancels

admission or is removed from the institute.

c) Admission according to rules should be carried out as per the schedule announced by the

administrative office. Late registration may be permitted only for valid reasons and on

payment of late registration fees. In any case, registration must be completed before the

prescribed last date for registration, failing which his/her studentship shall be liable to be

cancelled. Students having dues outstanding towards the institute or hostel shall be

permitted to register only after clearing such dues.

d) A student registered in odd semester shall be eligible to admission to the courses offered

in the even semester of that year irrespective of his/her SPI or the number of credits

earned by him/her in that odd semester. But can‘t be permitted to register for even

semester if he is detained in odd semester.

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e) A student can register for the second and third semester of a program irrespective of the

number of credits earned by him/her in the first and second semester respectively.

f) A student can register for the fourth semester of a program and undergo dissertation

phase III evaluation only if he/she has earned 75% of the credits of the first year and has

undergone dissertation phase I and Phase II evaluations. However, if 75% calculation

turns out to be a mixed number (integer + fraction) then only the integer part of that

number shall be considered for taking decision related with this clause. Registration for

the fourth semester of a program shall get delayed by minimum one semester if a student

fails to meet these criteria.

g) A student shall undergo dissertation phase IV evaluations (ISE and ESE) only after

he/she earns all credits of the first, second and third semester of the program.

h) A student unable to complete the program in four semesters shall be required to register,

on payment of prescribed fees, for every additional semester for completing all academic

requirements of the program i.e. 100% course work of the first year and evaluations of

four phases of dissertation. However, in any case he/she is required to complete the

program in maximum six consecutive semesters from the date of his/her admission.

i) Temporary Withdrawal

A student shall be permitted to withdraw temporarily from the program of study for the

reasons beyond the control of student. The applicable rules are:

i. The withdrawal shall be considered for complete semester or complete year.

ii. The student shall apply to Dean Academics for such withdrawal stating the reasons

for such withdrawal, along with supporting documents, consent from parents in

writing duly recommended by HOD of the program department and clearance /no

dues certificate from all concerned sections and departments.

iii. Dean academics shall pursue the case and recommend for the approval from AC.

iv. Normally, a student will be entitled to avail temporary withdrawal facility only once

during the program. However, request for any further withdrawal for concerned

student shall have to be approved by AC.

j) Termination from the Program

A student shall be terminated from the program in the following cases:

i. Involved in ragging and not obeying discipline stipulated by the institute.

ii. Not Completing the Program in prescribed period:

Maximum duration for getting M.Tech.degree for students admitted in the first semester

of PG program shall be 6 semesters (Three academic years) from their date of admission.

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The maximum duration of the program includes the period of withdrawal, absence and

different kinds of leaves permissible to a student but excludes the period of rustication of

a student from the institute. However, genuine cases on confirmation of valid reasons

may be referred to Academic Council for extending this limit by additional one year.

Such student will be declared as Failed to complete M.Tech. program.

3.4 ACADEMIC CALENDAR The academic activities of the institute are regulated by Academic Calendar and are made

available to the students/ faculty members and all other concerned in electronic form or

hard copy. It shall be mandatory for students / faculty to strictly adhere to the academic

calendar for completion of academic activities. The copy of the academic calendar is also

uploaded on the institute website.

a) The academic activities of the institute are governed by academic calendar prepared by

coordinator (Academic planning and Monitoring) and approved by Dean Academics in

consultation with Director. It shall be notified at the beginning of the each academic year.

Academic calendar refers to schedule of commencement of instruction for the semester,

course delivery period, examinations/evaluation, other academic activities, holidays and

student major activities schedule.

b) The curriculum shall be typically delivered in two semesters in an academic year. Each

semester shall be of 20 weeks duration including curriculum delivery evaluation, and

grade declaration. The exact days are mentioned in academic calendar.

c) The minimum teaching days in an academic year are 180 (90 each in the two semesters).

The academic calendar is strictly adhered to and all other activities including co-

curricular and extra-curricular activities should be scheduled so as not to interface with

the curricular activities as stipulated in the academic calendar.

d) The non conduct of academic activities on any particular teaching day for whatever

reason shall be compensated by having the academic sessions conducted on suitable

Saturdays by following the particular class time table of the lost teaching day.

3.5 ATTENDANCE

a) Regular 100% attendance is expected of all students for every registered course in

lectures, tutorials, laboratory, seminar and dissertation. Hence attendance is compulsory

and shall be monitored in the semester rigorously. Students shall be informed at the end

of every month if they are falling short of attendance requirement.

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b) A maximum of 25% absence for the attendance may be permitted only on valid grounds

such as illness, death in the blood relation family (father, mother, sister and brother) or

other emergency reason which is beyond control of a student and shall be approved by

the DPGC of respective department. Sanction for such absenteeism shall be taken from

the DPGC Chairman of the respective department within a period of maximum one week

after availing such leave.

c) Maximum number of days of absence for students participating in Co-curricular activities

/Sports/ Cultural events during a semester shall not exceed 10. Any waiver in this context

shall be on the approval of the Academic Development Committee (ADC) only after the

recommendation by Dean Student Development.

d) DPGC Chairman shall report and recommend to ADC the cases of students not having

75% attendance as per the records of course Instructor. After rigorously analyzing these

cases, ADC may take a decision to debar such student from End-Semester Examination

(ESE) for that course and XX grades will be awarded. Such a student shall re-register for

that course as and when it is offered next. ISE, UT1 and UT2 evaluations of such a

student for this course during regular semester shall be treated as null and void.

3.6 CURRICULUM

3.6.1 Curriculum:

Every program has a prescribed course structure which, in general, is known as

Curriculum of program of study. It prescribes courses to be studied in each semester with

credits assigned to courses and teaching hours, evaluation scheme and minimum

requirements for earning credits. The curriculum revisions/revamping shall be a

continuous process governed by OBE framework and guidelines from AICTE, UGC

from time to time. The booklet containing courses structure along with detail syllabus for

each course of each program is updated periodically and made available to the students.

The curriculum design follows the guidelines given by AICTE model curriculum.

3.6.2 Course Credit System/Structure:

In general, a certain quantum of work measured in terms of credits is laid down as the

requirement for a particular program. Calculation of number of credits for a course in

any semester is as per Table 3.

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Table 3. Calculation of number of credits for a course

Sr. No. Course Credits

1 Lecture of 1 hour/week 1

2 Tutorial of 1 hour/week 1

3 Practical / Laboratory / Drawing/ of two hours/ week 1

4 Seminar (2 hours per week) 2

5 Dissertation 34

There are mainly two types of courses viz. Theory courses and Laboratory courses.

Generally, a theory course consists of Lecture hours (L) and Tutorial hours (T).

Tutorial hours may not be assigned to a particular theory course if it has a separate

laboratory course. Laboratory course consists of practical hours (P) which a student

works in a Laboratory/Drawing Hall/Workshop. The other courses required to be

taken by a student include seminar, mini project, and project at various levels of the

program and also industrial training /internship.

3.6.3 Course Description

A typical description of course syllabus shall consist of course code, course title,

teaching hours per week for lecture/practical/tutorials/seminar and project, credits,

course outcomes with proper levels of Bloom‘s Taxonomy and assessment scheme.

3.6.4 Requirements for Earning Course Credit

A student shall earn credits for a particular course by fulfilling the minimum academic

requirements for attendance and evaluation. No credits shall be awarded if a student

satisfies the minimum attendance requirements but fails to meet minimum evaluation

requirements.

3.6.5 Total Credits to Earn the Degree

The total number of credits required for completing an postgraduate program is

approximately 82. The total number of credits in a semester which a student registers

shall generally be 23-25. The maximum number of credits per semester shall not exceed

30, subject to approval by Department Post Graduate Committee (DPGC) and Dean

Academics. The exact number of credits required to complete the program are

mentioned in course structure of the program.

3.6.6 Audit Course:

A student is required to complete an audit course specified in a semester which could be

institute requirement or department requirement. An audit course may include either a) a

regular course required to be done as per structure or required as pre-requisite of any

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higher level course or b) the programs like practical training, industry visits, societal

activities etc, as specified from time to time.

Audit course shall not carry any credits but shall be reflected in Grade Card as

"PP”/"NP" depending upon the satisfactory performance in the in-semester evaluation

and any other evaluation as decided by DPGC of respective department and academic

development Committee.

3.6.7 Seminar/Mini projects

Seminar is a course requirement, wherein under the guidance of an Instructor, a student is

expected to do in-depth study in a specialized area by carrying out a literature survey,

understanding different aspects related to that area, preparing a status report based on the

topic chosen. For a seminar course, a student is expected to learn investigation

methodologies, study relevant research papers, correlate work of various

authors/researchers critically, study the concepts, techniques and prevailing results,

analyze those, prepare a seminar report on all these aspects. It shall be mandatory to give

a seminar presentation before a panel constituted for this purpose. The grading shall be

done on the basis of the depth of the work done, understanding of the problem, technical

quality of the report prepared and presentation given by the student.

Students are encouraged to work on Mini projects to get exposure to real life problem

solving and hands on experience.

3.6.8 Dissertation:

Dissertation is a course requirement, wherein under the guidance of an Instructor, a

second year student is required to do some innovative/contributory/developmental work

with application of knowledge earned while undergoing various theory and laboratory

courses in his/her course of study. A student has to exhibit both analytical and practical

skills through the dissertation work.

A student has to carry out dissertation under the guidance of Instructor from the same

discipline unless specifically permitted by the Department Post Graduate Committees

(DPGCs) of the concerned departments in case of interdisciplinary projects or DPGC

of the parent department in case of industry sponsored dissertations.

The M. Tech. dissertation shall be done in the second year and is divided into four stages.

Normally the first two stages shall be carried out in Semester-III while the remaining two

stages shall be carried out in Semester-IV. The quantum of work expected to be carried

out by a student in each stage shall be in accordance with the division of credits given in

the respective program structure.

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3.7 FACILITATION TO STUDENTS

3.7.1 Faculty Advisor:

On joining the institute, a student or a group of students shall be assigned to a faculty

advisor who shall be mentor for a student. A student shall be expected to consult the

faculty advisor on any matter relating to his/her academic performance and the courses

he/she may take in various semesters / summer term. A faculty advisor shall be the

person to whom the parents/guardians should contact for performance related issues of

their ward. The role of a faculty advisor is as outlined below:

Guidance about the rules and regulations governing the courses of study for a

particular degree.

Paying special attention to weak students.

Guidance and liaison with parents of students for their performances.

3.7.2 Helping Weaker Students:

A student with backlog/s should continuously seek help from his/her faculty advisor,

Head of the Department and the Dean Student Development. Additionally he/she must

also be in constant touch with his/her parents/local guardians for keeping them informed

about academic performance. The institute also shall communicate to the

parents/guardians of such student at-least once during each semester regarding his/her

performance in In-semester evaluation and Mid-semester examination and also about

his/her attendance. It shall be expected that the parents/guardians too keep constant touch

with the concerned faculty advisor or Head of the Department, and if necessary - the

Dean Student Development.

3.8 DISCIPLINE AND CONDUCT

1. Every student shall be required to observe discipline and decorous behavior both inside

and outside the campus and not to indulge in any activity, which shall tend to bring down

the prestige of the institute.

2. Any act of indiscipline of a student reported to the Dean, Student Development, shall be

discussed in a Disciplinary Action Committee of the institute. The committee shall

enquire into the charges and recommend suitable punishment if the charges are

substantiated.

3. If a student while studying in the institute is found indulging in anti-national activities

contrary to the provisions of acts and laws enforced by Government he/she shall be liable

to be expelled from the institute without any notice.

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4. If a student is involved in any kind of ragging, the student shall be liable for strict action

as per Maharashtra anti-ragging act and its amendments from time to time.

5. If any statement/information supplied by the student in connection with his/her admission

is found to be false/ incorrect at any time, his/her admission shall be cancelled and he/she

shall be expelled from the institute and fees paid shall be forfeited.

6. Student once admitted in the institute shall follow instructions issued from time to time.

7. If a student is found guilty of malpractice in examinations then he/she shall be punished

as per the recommendations of the Student Grievances and Redressal Committee

(SGRC). The maximum punishment may be expulsion from the institute.

8. Every admitted student shall be issued photo identification (ID) card which must be

retained by the student while he/she is registered at RIT, Rajaramnagar. The students

have valid ID card with him/her while in the institute. Any student who alters or

intentionally mutilates an ID card or who uses the ID card of another student or allows

his/her ID card to be used by another shall be subjected to disciplinary action.

9. The valid ID card must be presented for identification purpose as and when demanded by

authorities. Any student refusing to provide an ID card shall be subjected to disciplinary

action.

10. Students should switch off the Mobiles during the Instructional hours and in the Institute

building, Library, Reading room etc. Strict action will be taken if students do not adhere

to this.

11. During the conduct of any Tests and Examination students must not bring their mobiles.

A student in possession of the mobile whether in use or switched off condition will face

disciplinary action and will be debarred from appearing for the Test / Examination.

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3.9 COURSE EVALUATION

3.9.1 Assessment of Theory Classes

Evaluation of theory courses shall be on the bases of In Semester Evaluation (ISE), two

unit Tests (UT1 and UT2) and End Semester Examination (ESE).The weightage for

these components are shown in the table below:

Table 4

ISE Unit Test I (UT I) Unit Test II (UT II) ESE

20 % 15% 15% 50%

The student is required to secure minimum 40% marks in ISE, UT1 and UT2 combined

to become eligible for ESE and 40 % separately in ESE. The students are required to

obtain 40% in aggregate to pass the course for M. Tech. program.

3.9.2 In-Semester Evaluation (ISE)

In semester evaluation has two components as mentioned below:

1. Attendance and class participation (10%) The students for this component are

evaluated based on regularity in attending class, participation in class room activities,

discipline and behavior and initiative and punctuality in assigned work. The course

teachers evaluate and submit the marks directly to COE. These marks will not be

displayed to the students.

Table 5

Sr.

No. Attendance Marks

I Students having attendance > 90% and active participation in

classroom activities

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II Students having attendance between 86% to 90% and active

participation in classroom activities.

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III Students having attendance between 80% to 85% and active

participation in classroom activities.

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IV Students having attendance between 75% to 79% and active

participation in classroom activities.

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V Below 75% and no participation in classroom activities. 00

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2. The Second Components of ISE is teacher designed assessment scheme which is pre

announced by the course instructor. Teacher is required to use minimum two

components. The weightage is 10 %.

3.9.3 Unit Tests

A) Unit Test (UT1) 15 percent weightage

UT1 is conducted tentatively in the 6th

week of the semester. The test will be for 25

marks for 1 hour duration. Question paper will be set with one question each on unit 1

and unit 2 of the course syllabus. The marks obtained will be converted to 15 with no

rounding of marks to the next digit.

Unit Test (UT2) 15 percent weightage

UT2 will be conducted tentatively in the 11th

week of the semester. The test will be for 25

marks for 1 hour duration. Question paper will be set with one question each on unit 3

and unit 4 of the course syllabus. The marks obtained will be converted to 15 with no

rounding of marks. The UT1 and UT2 marks combined to be rounded to next integer as

per the rules (> 0.5 to next integer value).

The schedule is mentioned in academic calendar and test time table will be declared by

CoE well in advance.

3.9.4 End Semester Examination (ESE)

End Semester Examination (ESE) has 50% weightage. End Semester Examination is

conducted after the end of instructions for the semester as specified in academic calendar.

ESE shall be for maximum 50 marks and 2 hours durations. The student is required to

secure 40% marks separately to pass the examination. The question paper shall be set by

framing 2 questions, one each from unit 5 and unit 6 and one comprehensive question

from unit 2 to unit 4.

3.9.5 Assessment of Laboratory Courses :

The assessment of laboratory course for First year shall be continuous and based on turn-

by-turn supervision of the student's work and the quality of his/her work as prescribed

through laboratory journals and his/her performance in viva-voce or any other mode of

evaluation examinations uniformly distributed throughout the semester. The assessment

of ISE component of laboratory course should be shown to the students.

Student has to get minimum 50% marks individually in ISE and ESE to pass and

earn credits for laboratory course.

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For M.Tech first year laboratory courses, it is mandatory to appoint an external

competent examiner from industries/ research organizations / academic institutions of

repute.

The assessment of laboratory course from the 1st semester onwards shall be carried out in

two parts.

a) ISE shall be based on turn-by-turn supervision of the student's work and the quality

of his/her work as prescribed through laboratory journals and his/her performance in

Practical-oral examinations uniformly distributed throughout the semester.

b) ESE shall be based on performing an experiment followed by an oral examination.

3.9.6 Assessment of Seminar and Dissertation Works :

Every student has to undertake seminar, dissertation work of professional nature and

interest at various levels of study. The topic of seminar or work related with dissertation

work may be related to theoretical analysis, an experimental investigation, a prototype

design, new concept, analysis of data, fabrication and setup of new equipment etc. The

student shall be evaluated for his/her seminar through the quality of work carried out, the

novelty in the concept, the report submitted and presentation(s) etc.

a) The Seminar report must be submitted by the prescribed date usually two weeks before

the end of academic session of the semester. It is desirable that the topics for seminar be

assigned by the end of previous semester.

b) The seminar report and the presentation of seminar shall be evaluated by three

departmental faculty members (decided by DPGC).

c) The evaluation of the dissertation work of a student shall be carried out in four phases:

First and third phase being evaluated for ISE by Department Post Graduate Committee

(DPGC) while second and fourth phase by DPGC for ISE and by a panel of examiners for

ESE. Except for phase I evaluation i.e. evaluation based on synopsis submission seminar,

a student shall be evaluated for all other phases for his/her understanding, the work done

and his/her presentation followed by demonstration.

Phase I and Synopsis Submission Seminar (ISE): A student shall be expected to carry

out intensive literature survey for a period of two months in the field of interest

and to select a topic for his/her dissertation in consultation with the Guide

assigned. The student shall then submit a report and deliver a seminar on the problem

17

chosen by him/her to the members of DPGC. It shall be expected that a student

justifies the gravity and also the relevance of the problem through his/her seminar.

This shall be for the approval of synopsis and the assignment of Guide.

Phase II Evaluation: Term Work (ISE) and Progress Seminar Presentation (ESE):

Phase II evaluation consists of term work evaluation (ISE) based on the efforts put in

by the student to carry out his/her work & the results obtained thereof (evaluation by

DPGC), and the End Semester Evaluation (consisting of presentation followed by

demonstration) by a panel of examiners. In term work evaluation if the progress is

not found satisfactory by DPGC members, he/she shall be given a grace period of

4 weeks to work on the dissertation and present it to the committee again. In such case,

the student has to suffer a grade penalty in ISE as per Table III of Sec. 8.3. Phase II

ESE for such a student shall also be delayed by maximum period of one

month. In any case all Phase II evaluations shall get over before the beginning of the

subsequent semester of the PG program.

Phase III Evaluation: Term Work and Progress Seminar Presentation (ISE): The

student who has cleared his/her Phase II evaluation shall present the status of the work

carried out on the dissertation after 8-10 weeks of Phase II ESE to the same three

members of DPGC as above. If the performance of the student for this progress seminar

is not found satisfactory then he/she shall be given a grace period of four weeks to

repeat the seminar with grade penalty for ISE.

Final Evaluation (Phase IV): Similar to Phase II evaluation, Phase IV evaluation shall

also be based on term workevaluation by DPGC (ISE) and Final Evaluation by a panel

of examiners (ESE).

After completing the dissertation work to the satisfaction of the DPGC members, the

student shall submit the dissertation report in the prescribed format to the concerned

department on or before the last date of such submission as per the academic calendar

of that semester. The open defense of the student on his/her dissertation shall be

arranged by Exam Cell within 15 days after the final date of report submission. This

defense shall be in front of the panel of examiners as given above.

In term work evaluation if the progress is not found satisfactory by DPGC committee

members, he/she shall be given a grace period of four weeks to work on the

dissertation and present it to the committee again. In such case, the student has to

suffer a grade penalty in ISE. Phase IV ESE for such a student shall also be delayed by

maximum period of one month. In any case all evaluations shall get over before the

beginning of the next academic years PG program.

18

If due to valid reasons (the proof for which has been submitted by the student) the

dissertation work is delayed, then the student may be given permission to register for

maximum two semesters by paying the fees as decided by Academic Council. Such

students, when assessed for any of the evaluation phases will have to suffer a grade

penalty.

The student, who has been given the extension of six month, shall be treated as a regular

student and no grade penalty will be imposed.

The Chairman for the ESE Dissertation Phase IV shall be appointed strictly as per RRs

and no change in panel of examiners is accepted without the approval from Dean

Academics. Also the Chairman should be from the same department.

The student shall have to submit the reports of Dissertation stage-IV on or before the

cutoff date (as per academic calendar) failing to which attracts the prescribed late fee for

maximum duration of 15 days. Failure to submit the report by the grace period (15 days)

will lead to extension of six months.

d) DPGC shall consist of three faculty members from the department, Guide assigned to a

student being one of the members. A panel of examiners for ESE shall consist of

Chairman (who shall be one of the DPGC members and shall monitor the process as per

norms), an Internal Examiner (who shall be the Guide) and an External Examiner (who

shall be a subject expert from outside the institute).

3.9.7 Students failed in ISE of Seminar / Laboratory course :

a) The student who has failed in ISE of PG–Seminar phase shall be given an extension of

a maximum period of one month for his/her improvement and then he/she shall be

evaluated and the marks should be submitted to CoE.

b) After satisfactory performance in ISE of Project phase, the student shall be allowed to

appear for the project ESE at the time of Re-Exam and the ESE marks should be

submitted to COE.

c) The same provision (1 & 2 above) shall also be made applicable for UG- Seminar

courses.

d) For PG-Laboratory course (excluding project and seminar), if a student fails or falls in

XX category for ISE then he/she should Re-register for the course in the immediate

semester, complete the ISE work and the ISE marks should be submitted to CoE.

19

3.10 GRADING SYSTEM

3.10.1 Award of Grade (Regular Semester Exmination) :

a) For every course registered by a student in a semester, he/she shall be assigned a grade

based on his/her combined performance in all components of evaluation scheme of a

course as per the structure. The grade indicates an assessment of the student's

performance and shall be associated with equivalent number called a grade point.

Absolute grading system is followed.

b) The academic performance of a student shall be graded on a ten point scale. The letter

grades, the guidelines for conversion of marks to letter grades and their equivalent grade

points are as given in Table 6.

Table 6: Grade Table for Regular Semester

Theory Laboratory Courses

Letter

Grade

Marks

Obtained %

Grade

Point

Marks

Obtained

%

Grade

Point Description of Performance

AA >=90 10 >=90 10 Outstanding AB 80-89 9 80-89 9 Excellent

BB 70-79 8 70-79 8 Very Good

BC 60-69 7 60-69 7 Good

CC 50-59 6 50-59 6 Above Average

CD 45-49 5 <50 0 Average

DD 40-44 4 — 0 Below Average

FF <40 0 — 0 Fail

XX — 0 — 0 Detained, Re-register for

Course

II — — — —

Incomplete, eligible for

makeup examination

PP — — — — Passed (Audit Course)

NP — — — — Not Passed (Audit Course)

c) The combined performance generally refers to performance in (as per the structures of

the respective course) ISE, UT1, UT2 and ESE in theory courses and ISE and ESE for

laboratory courses.

d) A student shall pass the course if he/she gets any grade in the range between ―AA" to

"DD".

20

e) ―FF" grade shall be awarded to a student in a course if he/she gets less than 40% marks in

ESE separately and 40% marks jointly in the ISE, UT1, and UT2 & ESE for a theory

course and 50% marks in ISE & ESE separately for a laboratory course. Student failed in

theory course shall then be eligible to apply for supplementary examination conducted

along with re-examination conducted after regular examination of even semester. The

students have an option to register for summer term for the courses if offered. A student

failed in laboratory course shall be eligible to apply only for 100% examination

conducted with the laboratory examinations of the subsequent semester. In both cases, a

student has to suffer one grade penalty. The laboratory examination will be conducted

after semester II regular examination along with supplementary/re-examination for both

laboratory courses for semester I and semester II.

f) Grade "XX" in a regular course shall be given to a student if he/she falls in any of the

following categories.

i. A student does not maintain the minimum attendance requirement for any of the

theory/laboratory/seminar/dissertation work.

ii. A student has not completed most of (majority of) the evaluations namely ISE,

UT1 and UT2 due to non-medical reasons (e.g. when a student has missed all or

most of the components of internal evaluation and unit tests conducted by the

instructor in that semester).

iii. A student fails to obtain 40% marks in ISE, UT1 and UT2 combined together.

iv. A student is guilty of any academic malpractice during semester (Such cases shall

be dealt by Student Grievances and Redressal Committee).

v. A student is guilty of any academic malpractice during examination.

g) Following rules apply to the student who has obtained grade "XX" in a regular

semester:

i. If a student has XX grades in more than three courses, his term will be detained and

he is not allowed to appear for ESE in any of the subjects. The student is required to

take the fresh admission to the same class by paying all fees in the next academic

year.

ii. Students having XX grades in 3 or less number of courses during odd semester can

appear for 100% examination conducted at the end of the academic year along with

supplementary examination of semester I or register for the courses during

summer term, if offered.

iii. Students having XX grades in 3 or less number of courses during even semester

can appear for 100% examination conducted at the end of the semester II of next

21

academic year along with re-examination of semester II (Even Semester) or register

for the courses during summer term, if offered in the next academic year.

iv. ISE, UT1 and UT2 marks of such students will become null and void and they have

to appear for 100% examination.

v. The re-examination shall be of 100 marks and shall be based on entire syllabus with

equal weightage to all the units as mentioned in syllabus of the course. The grading

used for 100 % examinationshown in Table 7.

Table 7 Award Grades for 100% examination

Marks Grades

00 to 39 FF

40 to 54 DD

55 to 69 CD

70 to 85 CC

> 86 BC

vi. In above two cases when a student gets "XX" grade in a course, then this shall be

treated as "FF" for the purpose of calculation of Semester Performance Index (SPI)

and First Year Performance Index (FYPI) or Cumulative Performance Index (CPI).

Refer Sec. 11 for calculation of Performance Indices.

h) Grade "II" shall be declared in a theory/laboratory course if a student has satisfactory in-

semester performance and UT1 and UT2 and has fulfilled the 75% attendance

requirement, but has not appeared for ESE due to genuine reasons. Such students shall

be eligible for the make-up examination of ESE only on medical grounds/valid

reasons and on production of authentic medical certificate or other supporting

document/s (as required by the institute) to the Exam Cell within 10 days after the

respective examination is over. The application form with requisite amount of fees must

be submitted to the Exam Cell before the last date of filling such application forms for

make-up examinations.

A student with "II" grade when appears for the make-up examination shall be eligible to

obtain a regular performance grade ("AA" to "FF") as per Table 6,depending on his/her

overall performance in ISE, UT1 and UT2. If a student fails to appear for make-up

examination too, a grade "XX" shall be awarded to him/her. Thus "II" is only a temporary

grade and shall be replaced by a valid grade only after make-up examination.

22

i) There shall be a few audit courses as per the policies of the institute or as decided by

DPGC of respective program. The grade "PP" (Passed)/ "NP" (Not Passed) shall be

awarded for such courses depending upon the performance of a student evaluated by the

course instructor. No grade points shall be associated with these grades and performance

in these courses shall be not taken into account in the calculation of the performance

indices (SPI, CPI). However, the award of the degree shall be subject to obtaining a "PP"

grade in all such courses.

3.10.2 Award of Grades for Supplementary/Re-examinations:

a) A student who has obtained grade "FF" in regular semesters odd or even (semester I or

Semester II) shall be eligible to appear for supplementary / re-examination conducted

after regular examination of semester II, before the commencement of the next academic

year.

b) In such cases In-semester and UT1 and UT2 performance of a student shall not be wiped

out.

c) A student shall apply for supplementary/re-examination before the last date of such

application and shall appear for supplementary/re-examination.

d) The Re-Examination pattern will be same as the pattern of regular ESE.

e) A student who is eligible for supplementary/re-examination, but remains absent due to

genuine reasons and taken prior permission shall be given grade "FF".

f) A student shall be awarded a grade between "AB" to "DD", or "FF" or "XX" as given in

Table 8 depending upon the cumulative marks obtained by him/her in ISE, UT1 and UT2

and supplementary/Re-examination of ESE. Here a student has to suffer one grade

penalty by accepting one grade lower as compared with the regular grades.

Table 8: Grade Table for Supplementary/Re-examination

Letter Grade Marks Obtained % Grade Point

AB >=90 9

BB 80-89 8

BC 70-79 7

CC 60-69 6

CD 50-59 5

DD 40-49 4

FF <40 0

XX — 0

23

g) Award of Grade for 100% Examination:

A student who has obtained "FF" grade in ESE of a regular semester and has not availed

supplementary/re-examination option or a student who has obtained "FF" grade in both

ESE and supplementary/re-examination shall be eligible to choose one of the two options

below to clear his/her backlog:

Registration for summer term (If offered)

Re-registration for the next regular semester course whenever that course is offered.

A student detained in a regular semester due to either a) by obtaining "XX" grade or b) by

involvement in academic malpractice or c) by breaking the institute code of conduct and

discipline cannot apply for summer term for that academic year, but can appear for 100%

examination to clear the backlog.

3.10.3 Award of Grade (Re-Registration):

Following rules apply for the course re-registered in any semester.

a) ISE and UT1 and UT2 performance of a student of a regular or summer term for a re-

registered course in which he/she had obtained "FF" or "XX" grade during regular

semester or summer term shall be treated as null and void.

b) A student shall undergo all evaluations consisting of ISE, UT1, UT2 and ESE applicable

as per the structure of the respective course.

c) A student with "FF" grade when re-registers for that course in a regular semester or

summer term has to suffer a grade penalty and shall be eligible to acquire grade as per

Table 8.

d) A re-registered student eligible for ESE remains absent for ESE due to valid genuine

reason as mentioned then he/she shall be treated in a similar way as "Grade II" cases in

regular semester by giving a chance to appear for make-up examination held before the

commencement of the next academic year with grade Table 8 being applicable to

him/her.

e) SUPPLIMENTARY AND RE- EXAMINATION

Supplementary and Re-Examination will be conducted only in the second semester.

There will not be any re-examination / make up examination at the end of first semester.

The students will get two opportunities for semester I and Semester II in the academic

year to pass the examination.

24

Table 9

Semester I Regular examination of odd semester only

Semester II

(Summer

Examinations)

1 Regular examinations of even semester

2 Supplementary examination of odd semester

3 Re- examination of even semester

There will be only one grade penalty for the first three attempts and ESE and ISE, UT 1

and UT 2 marks are to be carried forward for three attempts in case of FF grade (Fail

Grade). If the student fails to pass the courses in first three attempts, from 4th

and

subsequent chances, the grade penalty will be as per the table of 100% examination

(Table 7). In case of XX grade, the students will not be allowed to appear for the re-

examination conducted in the immediate semester. It is 100% comprehensive

examination and the question paper shall be of 100 marks covering all units for 3 hours

duration.

f) Mechanism of Re-Registration

The mechanism to be followed for the process of Re-registration of Theory and

Laboratory courses is as given below:

I) Theory Courses:

Following process shall apply for re-registration of theory course/s:

a) A student, who has obtained ‗FF‘ Grade in more than three courses (odd or even semester) in

an academic year, can re-register for the course/s immediately in the next academic year,

whenever such course/s is offered.

b) Such student/s shall submit the application form in the prescribed format (available in the

office) along with the copy of mark sheet and requisite re-registration fee to the office

through Head of concerned Department within 15 days after declaration of examination

results.

c) The student failing to re-register for the course/s within the specified duration shall have to

apply for re-registration with late fee for the maximum period of 10 days. Thereafter, the

student will have to re-register by paying prescribed super late fee (in addition to late fee) till

the date of commencement of new semester. A student failing to re-register until the date of

commencement of new semester (as per the Academic Calendar) will not be eligible for re-

registration.

d) After receiving the re-registration application and necessary fees from the student, the office

shall communicate the information of such re-registered student/s to the Examination Center

25

as well as the Head of concerned Department and ERP coordinator for further process. The

concerned Head of Department will then display the list of such re-registered students on the

department notice board and ensure that all the evaluations (ISE, UT1 & UT2) will be

conducted along with regular student. After completion of the ISE, UT1 & UT2 by the

student/s, the course instructor will submit the mark sheets to the Examination Center.

II) Laboratory Courses:

Following process shall apply for re-registration of laboratory course/s:

a) A student who has obtained ―XX‖ grade in the Laboratory course/s of a semester (odd or

even) shall have to re-register for that course/s immediately in the next semester. Such

student shall submit the application form in the prescribed format (available in the office)

along with the copy of mark sheet and prescribed re-registration fee per course to the office

through Head of concerned Department within 15 days after declaration of examination

results.

b) The student failing to re-register for the course/s within the specified duration shall have to

apply for re-registration with late fee for the maximum period of 10 days. Thereafter, the

student will have to re-register by paying prescribed super late fee till the date of

commencement of new semester. A student failing to re-register until the date of

commencement of new semester will not be eligible for re-registration.

c) After receiving the re-registration application and necessary fees from the student, the office

shall communicate the information of such re-registered student/s to the Examination Center

as well as the Head of concerned Department and ERP coordinator for further process.

d) The concerned Head of Department will then display the list of such re-registered students on

the department notice board and will prepare the schedule for ISE of Laboratory course as

per the convenience of the faculty and student/s.

e) Thus, ISE of Laboratory course of such re-registered student/s will be conducted as per the

schedule and after satisfactory completion of the ISE component by the student/s, the course

in charge will have to submit the marks obtained by students to the Examination Center.

26

3.11 CALCULATION OF PERFORMANCE INDICES

The performance indices viz. Semester Performance Index (SPI), Cumulative

Performance Index (CPI) represent the performance of a student in a semester (SPI) and

cumulated over all semesters till current semester (CPI) on a scale of 10.

a) Semester Performance Index (SPI):

i. The performance of a student in a semester shall be indicated by a number called SPI.

ii. SPI shall be the weighted average of the grade points obtained in all the courses

registered by the student during a semester.

iii. If ‗gi‘ shall be a grade with numerical equivalent as gi obtained by a student for the

course with credits ‗Ci‘ then, SPI for that semester is calculated using formula.

Where summation is for all the courses registered by a student in that semester, SPI

shall be calculated and is rounded off to two decimal places.

iv. SPI shall get affected because of the grades "XX" and "FF" obtained by the student in

any of the courses.

v. For the students acquiring "II" grade (which is only a temporary grade) in any of the

courses, SPI, CPI shall be calculated only after make-up examination.

vi. SPI once calculated shall never be modified.

b) Cumulative Performance Index (CPI):

i. An up-to-date assessment of the overall performance of a student for the courses from

the first semester onwards till completion of the program shall be obtained by

calculating an index called Cumulative Performance Index (CPI).

ii. CPI is the weighted average of the grade points obtained in all the courses registered

by a student since the beginning of the first semester of the program.

Where, summation is for all the courses registered by a student for all semester. CPI

27

shall also be calculated at the end of every semester and shall be rounded off to two

decimal places.

iii. CPI shall reflect all courses undergone by a student including courses in which he/she

has failed. Thus, similar to SPI, "FF" and "XX" grade shall affect the CPI of a

student.

iv. If a student is awarded with a pass-grade for a course in which he/she was awarded

previously "FF" or "XX" grade then, CPI shall be calculated by replacing

corresponding Ci and gi in both numerator and denominator of the above formula.

Thus, a course shall be included only once in CPI calculation. The latest performance

of a student in a course shall be considered for CPI.

3.12 PROCEDURE TO SHOW THEORY ESE ANSWER BOOKS

In order to introduce 100% transparency in evaluation system, UT1, UT2 and also ESE

answer books are shown to students.

i. The Answer book (AB) showing activity for ESE is carried out after the approval for

declaration of results in BoE meeting.

ii. After the ESE theory assessment and marks entry in prescribed format, the course instructor

shall submit the ESE mark list and he/she shall collect the answer books from Exam Center

for showing it to students.

iii. The DEC in consultation with DPC Chairperson shall prepare a time table for showing the

ABs to concerned students. The time table shall be displayed on the department notice board

and the same shall be submitted to Exam Center.

iv. The course instructor shall show the ABs to the students as per the schedule declared by the

DEC/DPC Chairperson.

v. The course instructor shall review the ABs based on the queries from students. He/she shall

keep record of attendance of students in this process.

vi. The course instructor shall submit the list of ―change in ESE marks‖, student attendance

sheet along with the ABs to Exam Center within stipulated time as decided by CoE.

28

3.13 ACADEMIC PROGRESS RULES (ATKT RULES)

a) A student shall register for the second and third semester of a program irrespective

of the number of credits earned by him/her in the first semester and second semester

respectively.

b) A student can register for the fourth semester of a program and undergo dissertation

phase III evaluation only if he/she has earned 75% of the credits of the first year and

has undergone dissertation phase I and Phase II evaluations. However, if 75%

calculation turns out to be a mixed number (integer + fraction) then only the

integer part of that number shall be considered for taking decision related with this

clause. Registration for the fourth semester of a program shall get delayed by

minimum one semester if a student fails to meet these criteria.

c) A student shall undergo Dissertation Phase IV evaluations (ISE and ESE) only after

he/she earns all credits of the first, second and third semester of the program.

d) The opportunities for clearing backlogs may become available through regular

courses offered in respective semesters. The departmental program committee may

advice such students to register for the courses in which they have failed.

e) The maximum duration for getting M. Tech. degree shall be six semesters (three

academic years) from the date of admission. The maximum duration of the program

includes the period of withdrawal, absence and different kinds of leaves

permissible to a student but excludes the period of rustication of a student from

the institute. However, genuine cases on confirmation of valid reasons may be

referred to Academic Council for extending this limit by additional two semesters.

f) Depending upon the academic progress of a student, Academic Council may take

a decision regarding the continuation or discontinuation of his/her registration with the

institute.

3.14 SEMESTER GRADE REPORT

a) Semester grade report reflects the performance of a student in that semester (SPI) and

also his/her cumulative performance cumulated from the first semester till that semester

through CPI.

b) The semester grade card issued at the end of each semester to each student shall contain

the following.

The credits for each course registered for that semester.

Any audit course/s undertaken by a student in a Semester.

29

The letter grade obtained in each course.

The total number of credits earned by a student.

SPI, CPI.

A list of backlog courses, if any.

Remarks regarding eligibility of registration for the next semester.

c) Semester grade card shall not indicate class or division or rank however a conversion

from grade point index to percentage based on CPI shall be indicated on the final grade

card of the program.

3.15 AWARD OF DEGREE

Following rules prevail for the award of degree.

a) A student has registered and passed all the prescribed courses under the general

institutional and departmental requirements.

b) A student has obtained CPI ≥ 4.75.

c) A student has paid all the institute dues and satisfied all the requirements prescribed.

d) A student has no case of indiscipline pending against him/her.

e) Institute authorities shall recommend the award of M.Tech. degree to a student who is

declared to be eligible and qualified for above norms. However, the final degree shall be

conferred by Shivaji University, Kolhapur.

f) Grace Marks: A student will be given maximum of two grace marks per course to

obtain the passing grades in maximum of two theory courses provided he/she has passed

in all the other courses for the semester. If a student has failed in more than two courses

no grace marks will be applicable in any course.

g) A grace of 1% of maximum CPI of 10 (maximum 0.1 CPI) is given to the student only

at 4th

semester CPI if such a provision will help to secure the higher class i.e. to secure

minimum pass class (CPI 4.75, Second class, First class /First class with Distinction). It is

not given for any other reasons.

30

Table 10: Grade Point vs. Equivalent Percentages (as per AICTE)

(Applicable for M. Tech. students admitted from 2014-15 onwards)

Grade Point Equivalent Percentage

6.25 55

6.75 60

7.25 65

7.75 70

8.25 75

Table 11: Proposed CPI vs. Class for M. Tech Program

The formula for converting CPI into Percentage marks for CPI ≥ 4.75 can be obtained

using equation: Percentage marks = (CPI - 0.75) * 10

3.16 GRADE / CPI IMPROVEMENT POLICY FOR AWARD OF

DEGREE

Students who have secured DD grade in a course in an odd semester or even semester in

an academic year can appear for supplementary/re-examination for the same academic

year for improvement of grade.

If a student applies for appearing for such supplementary/re-examination for a course,

ISE and UT1 and UT2 marks of the course shall be null and void. Also grades obtained in

the course during regular semester odd or even shall be null and void.

An opportunity shall be given to a student who has earned all the credits required by the

respective program with CPI greater than or equal to 4.00 but less than 4.75, to improve

his/her grade by allowing him/her to appear for 100% examinations of maximum two

theory courses of first and second semester. Such examinations shall be scheduled along

with End Semester Examinations of the subsequent semester. However, CPI shall be

limited to 4.75 even though the performance of a student as calculated through modified

CPI becomes greater than 4.75.

Correspondin

g Class Pass Class

Second

Class First Class

First Class with

Distinction

CPI CPI ≥ 4.75 &< 5.75 CPI ≥ 5.75

&< 6.75

CPI ≥ 6.75

&

< 7.75

CPI ≥ 7.75

31

3.17 GRADE IMPROVEMENT POLICY

Students who have secured DD grade in course in an odd semester or even semester in

an academic year (i.e. applicable to students of all M.Tech. class) can appear for such

Grade Improvement examination for the same academic year for improvement of grade.

If a student applies for appearing for such make-up examination for a course, ISE and

UT1 and UT2 marks of the course shall be null and void. Also grades obtained in the

course during regular semester odd or even shall be null and void. The result of such

Grade Improvement examination will be treated as final provided there is an

improvement in grade or else his/her grade before improvement will be considered for

CPI/SPI calculation.

The student shall have to apply for such re-examination / supplementary (grade

improvement) examination within 10 days after the declaration of regular ESE result and

have to pay prescribed fees as examination fee along with undertaking in prescribed

format.

3.18 CPI IMPROVEMENT AFTER COMPLETION OF

PREREQUISITE CREDITS FOR THE AWARD OF DEGREE

Students who secure CPI between 4.75 and 6.75 after completing the pre-requisite

credits for the award of degree, and wish to improve their CPI are permitted for CPI

improvement. Such students be permitted to withdraw their grade in a given course with

poor grade and permitted to reappear for the examinations for improving the grade and in

turn CPI.

a) Student can appear for grade improvement examination within one year from the date of

passing his/her PG examination. He should not have taken (i) Leaving Certificate from

the Institute and ii) Degree from Shivaji University through convocation. He/she will

submit a written application to Dean Academics seeking his/her permission to register

for class improvement within one month from the date of declaration of result or one

week before the date of convocation of Shivaji University, Kolhapur whichever is

earlier. This application will be forwarded to Dean Academics through the Head of the

Department from where he/she has graduated. No student will be admitted once the

course registration process of that semester ends.

b) For grade improvement student will have to take maximum 3 courses in which he/she

has secured DD or CD grades from the same semester in one stretch.

c) Student can choose maximum three theory courses from a particular semester offered for

F.Y M. Tech (either odd or even) in which he/she has secured DD or CD grade. Student

32

will have to register for these courses in a particular semester in which those courses are

offered.

d) At the time of registration student will surrender all the original mark sheets given to him

by the institute. He will have to give an affidavit on Rs.100/- judicial stamp paper that

he/she will not do any use of surrendered mark sheets till he/she gets official result of the

subjects for which he/she wishes to appear for grade improvement. No change of courses

or drop of courses will be allowed after registration.

e) Student wishing to improve his/her grade will have to pay appropriate fees as laid down

by the institute time to time.

f) Student wishing to appear for grade improvement is exempted from attending regular

classes as he/she has already undergone the course/s instructions but he/she will have to

appear for all the evaluation tests conducted for the particular course/s. No re-

examination or retest will be allowed for the class improvement, in case such students

miss any of the tests or examinations. Absentee for End Semester Examination will

automatically lead to award of FF grade in that course/s.

g) The grading process as used for the regular students appearing for that course will be

applicable and no concession of any sort will be granted on account of absentee for any

of the examinations.

h) Student wishing to use the facility of grade improvement will have to pass in all the three

courses at a time for which he/she has registered for. He/she will not be entitled for the

summer term or re-examination in such cases.

i) Only one attempt will be permissible for any candidate wishing to use the facility of

grade improvement. If the student fails to secure higher grades resulting in reduction in

overall CPI then the original result of the student before registering for grade

improvement will be retained.

j) Student who improves his/her CPI will be issued fresh mark sheets by the institute.

These mark sheets will have symbol against the course for which he/she has appeared for

grade improvement and will state ―Grade Improvement‖. The date on the new mark

sheets will be that as issued for other students appearing in those courses. The name of

the student will be communicated to Shivaji University and he/she will have to apply for

degree certificate from Shivaji University thereafter.

33

CONCLUSIONS:

The academic policies regarding conduct of PG programs in autonomous Rajarambapu Institute

of Technology, Rajaramnagar are published in this document. The Academic Council shall

reserve all the right to modify these policies as and when required from the point of view of

achieving academic excellence. In special and abnormal cases (i.e. the cases not covered through

above rules) the decision of Director (Chairman, Academic Council) shall be final and shall be

binding on all concerned. For the latest updated version, stakeholders are requested to visit

www.ritindia.edu and to refer the academic section therein.

(As per the resolutions of 7th

Academic Council meeting held on 18th

June, 2016 and

implemented from semester I of academic year 2016-17)

DEAN ACADEMICS DIRECTOR

RIT, Rajaramnagar

34

4. Student Counseling Cell

Student Counseling Cell Structure

◦ Dr. Mrs. S. S. Kulkarni - Director –Chairperson

◦ Dr. S. M. Sawant - Dean Student Development

◦ Mr. Kalidas Patil - Psychologist

◦ Dr. Mrs. Jigna Shah - Psychologist

◦ Mr. M. M. Mirza - Head

All class monitors are working as counselors.

It focuses on increasing the number of students completing the course in four years with good

academic record. Cell is providing following facilities.

· Personal Counseling: facility to motivate the student towards good academic

performance. It also helps those students who have examination stress or fear, depression due to

familial, academic or any other problem. RIT conducts counseling sessions and workshops to

address these problems and to motivate and help such students in their academic and personality

development. The institute has hired Dr. Mrs. Jigna Shah & Mr. KalidasPatil as Personal

counselors.

· Awareness Programmes

· Merit Scholarship

· Parent Meet

· Seminars and workshops

· Group counseling

35

5. Anti Ragging Committee

It is prestigious that RIT campus is free from ragging, but I want to remind you about the anti-

ragging affidavit signed by you and your parent and hoping you will act accordingly. It has been

rightly said that the end may not always justify the means. Behind the façade of ‗welcoming‘

new students to college, ragging, in actuality, is a notorious practice wherein the senior students

get an excuse to harass their junior counterparts, and more often than not, make them easy targets

to satiate their own perverse sadistic pleasures. Apart from sustaining grievous physical injuries,

those unfortunate students who succumb to ragging either develop a fear psychosis that haunts

them throughout their lives, or worse, quit their college education even before it begins. For any

student who slogs day and night to secure admission into a prestigious college, ragging can be

his or her worst nightmare come true. It would not be an exaggeration to say that, today, ragging

has taken the shape of a serious human rights violation with even the most respected and

disciplined educational institutes falling prey to it.

How Ragging Affects the Victim

1. An unpleasant incident of ragging may leave a permanent scar in the victim‘s mind that may

haunt him for years to come.

2. The victim declines into a shell, forcing himself into humiliation and alienation from the rest

of the world

3. It demoralizes the victim who joins college life with many hopes and expectations.

4. Though incidents of physical assault and grievous injuries are not new, ragging also

simultaneously causes grave psychological stress and trauma to the victim.

5. Those students who choose to protest against ragging are very likely to face isolation from

their seniors in the future.

6. Those who succumb to ragging may drop out; thereby obstructing their career prospects.

7. In extreme cases, incidents of suicides and homicide have also been reported.

How Ragging Affects the Victim’s Family

One can imagine the plight of a ragging victim‘s family, especially his or her parents who see

their child suffering in pain and stress. Besides incurring medical and other incidental expenses

to rehabilitate their child, they also have to bear the trauma of seeing his or her prospective

career coming to an end.

36

How Ragging Affects the Educational Institution

1. Severe media barrage in extreme cases of ragging lowers the character of the educational

institution and destroy the respect and faith it commands from society.

2. Those who indulge in ragging bring a bad name to their college thereby hinder its reputation

and goodwill in society.

How Ragging Affects the Raggers

1. Ragging does not spare even its perpetrators. Those found guilty of ragging may be

suspended, blacklisted and even permanently expelled from college.

2. Raggers could be given rigorous imprisonment up to three years or a fine up to Rs.25000/-,

or both. The educational institutions may prescribe other punishments such as suspension

from classes, from the hostel, etc.

Anti-ragging Committee:

Anti-ragging committee headed by Honorable Director is taking care for making RIT campus

ragging free. Anti-ragging committee does following things for students:

Arrange lectures to create awareness about anti-ragging rules and regulations.

Addresses complaints received through complaint register or any other way.

At the institution level anti-ragging squad has been formed. The squad frequently visits

places like hostels, canteen, library, play-ground, etc.

Table 8.1 Anti- ragging Committee

Sr.

No

Name of Member Designation Contact

Number

01 Dr. Mrs. S. S.

Kulkarni

Chairman Director 9970700701

02 Prof. M.T. Telsang Member Dean, Academic 9970700705

03 Dr. S. M. Sawant Member Dean, Students

Development

9970700951

04 Dr. S.S. Gawade Member Rector 9970700945

05 Shri. S.G. Bhosale Member Dy. Warden 9890080723

06 Dr.Mrs. Jigna Shah Member Psychologist 02342224754

07 Prof. M.M. Mirza Member Secretary Head, Students Counseling 9970700795

37

Table 8.2 Anti Ragging Squad

Sr.No Name of Member Designation Contact Number

01 Prof. M.M. Mirza Chairman 9970700795

02 Dr. S.S. Gawade Member 9970700945

03 Prof. R. T. Patil Member 8275029101

04 Prof. Mrs. S. S. Patil Member 9970700918

05 Prof. Mrs. S. P. Patil Member 9970700899

06 Prof. Mrs. S. N. Patil Member 9890459955

07 Prof. Y. R. Patil Member 8149240891

08 Prof. Subodh Ingaleshwar Member 8600600278

6. Vishakha Cell

(Sexual Harassment Prohibitory Cell) Vishakha Cell has been established in 2002. It aims at:

Building self - esteem & dignity among girl students &ladies faculty.

Offering services such as counseling, legal aid in case of atrocities against women.

Creating awareness regarding women rights.

Arrange programs regarding health, personality development etc.

Avoiding & prohibiting sexual harassment at workplace.

Vishakha Cell Organizes Expert lectures on Health Awareness

Seminars on Gender Sensitization

Workshops on Legal Aspects concerned with Women

―Shardanyas‖ cultural event exclusively for girl Students

Table 9.1 Vishakha Cell Members:

Sr. No. Name Designation Contact No.

1. Dr. (Mrs.) S. S. Kulkarni

Director-Chairperson 9970700701

2. Adv. Mulla Husnama Harun Member, Legal Advisor 9730137518

3. Dr. Deepa Deshpande

Member ,Voluntary

Organization Representative 9860600781

4. Dr. A.C.Attar Member 9970700901

38

5. Prof.R.D.Padval Member 9822674221

6. Dr(Mrs).J.S.Awati

Member 8600009767

7. Mrs .Supriya Sawant Member 9503386670

8. Mrs. Kalyani Kulkarni Member 9209215672

9. Mrs. M.M.Patil Member 9850007061

10. Dr.S.M.Sawant Member 9970700951

11. Dr.(Mrs)M.V.Jagtap Member 9923339909

12. Ms.Kasturi Patil Student co-coordinator 9665391948

13. Mr.Rushikesh Phatak Student co-coordinator 9767695006

7. Code of Conduct for Students

Maintain strict discipline in the college campus.

Students must be in college uniform on Monday and Thursday and follow dress code

(Formal dress), on other days with I-card around neck in the college campus.

Students should be punctual while attending lectures and practicals and other programs.

Cell Phone is to be used for academic purpose only and long calls/chats must be avoided.

Students must follow etiquettes and manners while dealing with faculty, staff and

students.

Students should not loiter around in the corridors during the college working hours.

No student can leave the College early without prior permission of the higher authorities

(Gate pass issued needs to be produced).

Smoking and consumption of tobacco / Gutakha / Pan masala is strictly prohibited in the

College Campus.

Students should maintain utmost silence in the library, digital library and reading rooms.

Students should maintain professionalism while in college campus (Shouting, talking

loudly, thrashing is strictly prohibited).

Students should maintain proper discipline in the classrooms, laboratories, student

waiting rooms / places.

39

8. Department Profile and Credentials

8.1 Department Profile

Department: Electronics & Telecommunication Engineering

Electronics and Telecommunication Engineering (E&TC) department of Rajarambapu

Institute of Technology was established in the year 1991 with an undergraduate program in

Electronics. The UG program was accredited in 2003, reaccredited in 2007 and 2013 by

NBA Delhi. Currently, it offers two post graduate programmes in ‗Electronics‘ and ‗Digital

Systems‘ which were introduced in the year 2002 and 2011 respectively. The Electronics PG

program was accredited in 2009 and attained reaccreditation very recently in 2014. The

department is recognized as Ph.D research center by Shivaji University, Kolhapur.

The department is unceasingly committed to the students to groom them as professionals.

The teaching methodology offers the students a very systematically designed curriculum,

imparting theoretical aspect by vibrant and dedicated faculty and testing the learned concepts

in well equipped laboratories with state of the art equipments. Testing facility with a

Network Analyzer has been set up and the professors and students from the surrounding

areas are availing this. We provide quality education with emphasis on strong foundation,

fostering creativity and use of modern ICT tools, adopting Student focused Outcome Based

Teaching Learning Process. The department has a close interaction with the industry and

alumni and their feedback and suggestions are incorporated for the improvement of the

curriculum and research facilities. The emphasis is on research publications, attending

national and international conferences, patenting etc., and it has increased over the years.

8.2 Strengths of department

Dedicated, highly qualified, competent & hardworking faculty and technical staff.

Well equipped laboratories with number of PCs & workstations hosting several software

packages & state of the art equipments.

Student focused Outcome Based Teaching Learning with the help of modern ICT tools.

Testing and consultancy services by the department faculty and students.

40

Active involvement of faculty in Research & Development activities with externally

funded projects like MODROB, RPS etc. and through industry sponsored projects.

MOU with reputed companies as a way to establish Industry Institute Interaction.

Revamping the curriculum after every two years with the guidance from industry experts

& technically proficient association academicians from renowned Institutions.

Student centered Electronic and Telecommunication Engineering Students Association

(EESA) to enhance students‘ creativity and skills development.

Hosting workshops, seminars and conferences for students & teachers to enhance

knowledge related to the advancement in technology & infrastructure.

PG programs in Electronics & Digital system and Doctoral Research pave a way for

conducting research of immense magnitude.

Department has completed 01 RPS project of amount Rs. 08.55 Lac and 02 MODROB

project of amount Rs. 18 Lac.

Laboratories in department

Advanced communication Laboratory VLSI & Embedded System Laboratory

Communication, TV & Video Laboratory Project Laboratory

Research Laboratory Basic Electronics Laboratory

Microprocessor & Micro controller Laboratory Design Laboratory

Linear Integrated & Circuit Laboratory Digital Signal Processing Laboratory

Industrial & Power Electronics Laboratory PCB Laboratory

Transducer Measurement &

Control Laboratory Intel Intelligent System Laboratory

Computer Laboratory

41

9. Department Faculty Profile (Teaching and Non Teaching)

9.1 Department Faculty Profile

Sr.

No Name Designation Specialization

Experie

nce in

years

Email-Id

1.

Dr. M. S. Patil Professor and

Head of the

Department

Power

Electronics,

20 [email protected]

2.

Dr.S. A. Pardeshi Professor and

PG, PhD

Convener

Image processing,

Signals &

System, DSP

22 [email protected]

3.

Dr. A. B. Kakade Associate

Professor and

Dean R&D

RF

Communication

Teachi

ng -7

Industr

ial – 2

[email protected]

, [email protected]

4.

Prof.M.S.

Kumbhar

Associate

Professor and

Deputy COE

Computer

Networks,

Wireless Sensor

Networks

18 [email protected]

5.

Prof. S. R. Jagtap

Associate

Professor

Power

Electronics,

Control system

18 [email protected]

6.

Prof.R.T. Patil Associate

Professor and

Head of

Program

M.Tech.Electr

onics (Digital

System) Engg

VLSI Signal

Process,

Embedded

Systems,

Microprocessor,

Microcontroller

18 [email protected] ,

rtpatil1@ gmail.com

42

7.

Prof. S.S. Patil Assistant

Professor and

Head of

Program (M.

Tech.

Electronics)

Linear Integrated

Circuits,

Communication,

Biomedical

Engineering

Teachi

ng - 14

Profess

ional -

10

[email protected]

8.

Dr. J. S. Awati Assistant

Professor

Wireless

communication,

Fuzzy Logic,

Mechatronics,

Wireless Sensor

Networks

12 [email protected] ,

[email protected]

10.

Prof. M. R.

Jadhav

Assistant

Professor

Communication,

Industrial

Electronics,

7 [email protected]

11. Prof. S. S.

Ingaleshwar

Assistant

Professor

VLSI Design,

Embedded system

4 [email protected]

du

9.2 Non Teaching Staff

Sr.

No Name Designation

Experience

in years Email-Id

1. Mr. V. A. Patil Laboratory

assistant

Technical 13,

industry 1

[email protected]

2. Mr. J. S. Jadhav Laboratory

assistant

Technical 10 [email protected]

3. Mr. R. J. Jadhav Laboratory

assistant

Technical 06 [email protected]

4. Mr. D. A.

Khokade

Laboratory

assistant

Technical 06 [email protected]

43

10. Department Advisory Board

The Industrial Advisory Board

IAB is an association of Industry Experts & Academicians to enhance the Industry-

Institute interaction.

S.R.

No.

Name Designation Associated with

1 Mr. Abhinay Jadhav Member Wire & Wireless Communication,

B 8, Bahe Road, Islampur Sangli, Behind Krishna

Dhudhsangh, Sangli – 415409 Cell No. 8888334388,

8888334377

2 Mr.Suryakant Dodmise Member Core Technologies, B/T-3,3rd Floor, Prabhakar

Plaza, Station Road, Dabholkar Corner, Kolhapur-

416001(India). Ph.(0231)2653059

Email: [email protected] OR

[email protected]

3 Mr. Arvind M. Patil Member Bharat Sanchar Nigam Limited (BSNL)

Islampur cell No. 9422409900

4 Dr. M. S. Patil Chairman Professor, Head,ETC Dept., Rajarambapu Institute of

Technology, Sakharale

5 Dr. S.A.Pardeshi Member Professor, ETC Dept., PG Convener

Rajarambapu Institute of Technology, Sakharale

6 Prof. R. T. Patil Member Associate Professor, ETC Dept., HOP-M.Tech

Digital System

Rajarambapu Institute of Technology, Sakharale

7 Prof. S. S. Patil Member Assistant Professor, Head,ETC Dept., HOP-M.Tech

Electronics, Rajarambapu Institute of Technology,

Sakharale

44

11. Board of Studies (BOS) Members The Board of Studies is the basic constituent of the academic system of an autonomous institute.

Framing the curriculum of various courses keeping in view the objectives of the institute, interest

of the stakeholders and national requirement for consideration and approval of the Academic

Council; evaluating and updating curriculum from time to time; introducing new courses of

study; suggesting methodologies for innovative teaching and evaluation techniques; suggesting

panel names to the Academic Council for appointment of examiners; and coordinating research,

teaching, extension and other academic activities in the department/institute are functions of

BOS.

Recommended Composition of the Board of Studies

S.R.

No. Name Designation

1 Dr. S. N. Talbar (SGGS, Nanded) External member from Academics

2 Prof. A. B. Patil (WCE, Sangli) External member from Academics

3 Dr. D. S. More (WCE, Sangli) University nominee

4 Mr. Rohan Gavali (Asst. Manager,

Mitsubishi Electric India Pvt Ltd) Industry representative

5 Mr. Pushkar Tawade (Project Engineer,

CDAC Pune ) Postgraduate alumnus

6 Dr. S. A. Pardeshi BOS chairman

7 Dr. M. S. Patil Member

8 Prof. M. S. Kumbhar Member

9 Prof. R.T. Patil Member

10 Prof. S. R. Jagtap Member

11 Dr. A. B. Kakade Member

12 Prof. S. S. Patil Member

13 Dr. J.S.Awati Member

14 Prof. V. S. Patil Member

15 Prof. M. R. Jadhav Member

45

16 Prof. S. S. Ingaleshwar Member

17 Prof. B. N. Holkar Member

18 Prof. S.S. Sawant Member

19 Prof. B. S. Shete Member

20 Prof. S. M. Magadum Member

21 Prof. S. S. Mane Member

22 Prof. U. A. Kamerikar Member

23 Prof. S. S. Joshi Member

24 Prof. J. R. Dhage Member

25 Mr. Shubham Tarade UG Student Representative

26 Mr. Vaibhav Gursale PG Student Representative

27 Ms. Kasturi Patil PG Student Representative

12. Vision, Mission, PEOs, POs

12.1 Vision

To develop competent professionals in Electronics and Telecommunication Engineering to face

the current and future challenges of technological development

12.2 Mission

To impart quality education to face national and global challenges

To blend theoretical knowledge with practical skills and innovative mindset

To inculcate right ethical values among students

To seek continuous improvement of knowledge and skills

12.3 Programme Educational Objectives:

Graduates should be able to:

1. Establish successfully as an engineers in electronics, communication and allied industries

2. Become responsive to community needs

3. Conduct with high ethical standards in profession

46

4. Pursue higher studies to foster learning and understanding in an ever widening sphere of

technology and management

5. Expand knowledge and capabilities through lifelong learning experiences

12.4 Programme Outcomes:

After completion of graduation in Electronics & Telecommunication Engineering, the graduates

should be able to:

1. Solve complex engineering problems by applying knowledge of mathematics, science

and engineering principles

2. Identify, formulate and analyze engineering problem methodically to reach proper

conclusions

3. Design a system, component, or process to meet desired technical, safety, health and

environmental specifications

4. Design and conduct experiment, analyze and interpret results to get appropriate

conclusions

5. Design, simulate, analyze and implement electronics systems of varying complexity by

using appropriate techniques and tools

6. Infer impact of health, safety, legal and societal issues on engineering profession

7. Assess the impact of technical decisions on sustainable development of society

and environment

8. Adapt professional, ethical and moral responsibilities

9. Work as a leader or productive member of multi-disciplinary and multi-cultural teams

10. Communicate effectively through reports, presentations and discussions within both the

technical domain and the community at large

11. Apply the principles of project management both as a member and a team leader for

project development.

12. Learn independently and be ready for a lifelong learning to face increasing challenges

and responsibilities

47

13. Curriculum Structure and Syllabus

a) First Year M.Tech. (Semester I and II) Implemented from 2016-17.

b) Second Year M.Tech. (Semester III and IV) Implemented from 2016-17.

Total Credits

Sr.

No. Batch

Sem. I Sem. II Year wise

Hr/week. Credits Hr/week Credits Hr. Credits

1 F Y M Tech 29 24 27 24 56 48

2 S. Y. M Tech 5 16 5 18 10 34

Total Credits 65 82

First Year M. Tech. Electronics (Digital System) Engineering

Syllabus Structure

Semester I

Course

Code

Course

Teaching Scheme Evaluation Scheme

L T P Credits Scheme

Theory

(Marks) %

Practical

(Marks) %

Max Min %

for

Passing

Max Min %

for

Passing

EDS5011

Digital VLSI Design

3 1 -- 4

ISE 20

40

40

-- --

UT1 15 -- --

UT2 15

ESE 50 40 -- --

EDS5031

Advanced Digital Signal

Processing

3 -- -- 3

ISE 20

40

40

-- --

UT1 15 -- --

UT2 15

ESE 50 40 -- --

48

EDS5051

Embedded System Design 3 1 -- 4

ISE 20

40

40

-- --

UT1 15 -- --

UT2 15

ESE 50 40 -- --

EDS5071

Research Methodology

2 -- -- 2

ISE 20

40

40

-- --

UT1 15 -- --

UT2 15

ESE 50 40 -- --

PE-I

Program Elective-I 3 1 -- 4

ISE 20

40

-- --

UT1 15 40 -- --

UT2 15

ESE 50 40 -- --

EDS5171

Digital VLSI Design Lab

-- -- 2 1

ISE -- -- 50 50

ESE -- -- 50 50

EDS5191

Advanced Digital Signal

Processing Lab -- -- 2 1

ISE -- -- 50 50

ESE -- -- 50 50

EDS5211 Embedded System Lab -- -- 2 1

ISE -- -- 50 50

ESE -- -- 50 50

EDS5231

Seminar

-- -- 2 1 ISE -- -- 100 50

EDS5251

Research Methodology Lab -- -- 2 2 ISE

--

--

100 50

EDS5271

Proficiency in Technical

Communication -- -- 2 1 ISE

--

--

100 50

Total Credits: 24, Total Contact Hours/Week: 29

49

First Year M. Tech. Electronics (Digital System) Engineering

Syllabus Structure

Semester II

Course

Code Course

Teaching Scheme Evaluation Scheme

L T P Credits Scheme

Theory

(Marks) %

Practical

(Marks) %

Max Min %

for

Passing

Max Min %

for

Passing

SHP504 Advanced Engineering

Mathematics 4 -- -- 4

ISE 20

40 40

-- --

UT1 15 -- --

UT2 15

ESE 50 40 -- --

EDS5021

Digital System Design

using HDL

3 1 -- 4

ISE 20

40 40

-- --

UT1 15 -- --

UT2 15

ESE 50 40 -- --

EDS5041 VLSI Signal Processing

3 1 -- 4

ISE 20

40 40

-- --

UT1 15 -- --

UT2 15

ESE 50 40 -- --

PE-II Program Elective-II 3 1 -- 4

ISE 20

40 40

-- --

UT1 15 -- --

UT2 15

ESE 50 40 -- --

50

IE Institute Elective 3 -- -- 3

ISE 20

40 40

-- --

UT1 15 -- --

UT2 15

ESE 50 40 -- --

EDS5181 Digital System Design

using HDL Lab -- -- 4 2

ISE -- -- 50 50

ESE -- -- 50 50

EDS5201 VLSI Signal Processing

Lab -- -- 2 1

ISE -- -- 50 50

ESE -- -- 50 50

EDS5221 Mini Project -- -- 2 1 ISE -- -- 100 50

EDS5241 Comprehensive Viva Voce -- -- -- 1 ESE -- -- 100 50

Total Credits: 24, Total Contact Hours/Week: 27

First Year M. Tech. Electronics ( Digital System) Engineering

Syllabus Structure 2015-16

Semester I

Program Elective-I

Course Code Name of Course

PEE5091 Electromagnetic Compatibility and Interference

PED5111 Synthesis and Optimization of Digital Circuits

51

First Year M. Tech. Electronics(Digital System)Engineering

Syllabus Structure 2015-16

Semester II

Program Elective-II

Course Code Name of Course

PEE5061 VLSI Testing and Verification

PEE5081 Biomedical Signal Processing

PEE5101 Soft Computing Techniques

First Year M. Tech. Electronics (Digital System) Engineering

Syllabus Structure Semester II

Institute Elective

Course

Code Course Title Name of the Department

Applicable to Students of

following Departments

IET5021 Electric and Hybrid

vehicles Automobile Engineering

Automobile/Mechanical/

Electrical/ Electronics

IET 5281

Renewable and Non-

conventional Energy

sources.

Automobile Engineering All Departments

IET5041

Advance Networks

Computer Sc.& Engineering Electrical/ Electronics/ CSE

IET5061 Value Engineering Civil Engineering Automobile/Mechanical/

Electrical/ Civil

52

IET5081 Industrial Safety and Risk

Assessment Civil Engineering

Automobile/Mechanical/

Electrical/ Civil

IET5101 Industrial Automation and

Control Electrical Engineering

Electrical/ Electronics/

Automobile/Mechanical

IET5121 Sensor Technology Electronics & Telecommunication

Engg.

Automobile/Mechanical/

Electrical/ Electronics

IET5141 Mechatronics Electronics & Telecommunication

Engg

Automobile/Mechanical/

Electrical/ Electronics

IET5161 Computational Fluid

Dynamics Mechanical Engineering

Automobile/Mechanical

and Civil

IET5181 Quality and Reliability

Engineering Mechanical Engineering

Automobile/Mechanical/

Electrical

IET5201 Computational

Techniques in Engineering Mechanical Engineering

Automobile/Mechanical/

Electrical

IET5221 Management for

Engineers

Master of Business Administration

(MBA)

All Departments

IET5241 Data Analytics Master of Business Administration

(MBA)

All Departments

IET5261 Innovation Management Mechanical Engineering

E&TC, Electrical Engg,

Civil Engg & CSE

programs.

53

First Year M. Tech. Electronics (Digital System) Engineering

SEM-I

EDS5011 - DIGITAL VLSI DESIGN

COURSE DESCRIPTION:

CMOS has become increasingly attractive as a basic integrated circuit technology due to its low

power (at moderate frequencies), good scalability, and rail-to-rail operation. There are now a

variety of CMOS circuit styles, some based on static complementary conductance properties, but

others borrowing from earlier NMOS techniques and the advantages of using clocking disciplines

for pre charge-evaluate sequencing. MOSFET, basic circuit building blocks are described, leading

to a broad view of both combinatorial and sequential circuits. Including characteristics of

interconnect, gate delay, device sizing, I/O buffering and circuit-level and layout design

optimization.

In digital IC design a large digital IC is formed by interconnecting basic building blocks (Small

number of basic digital circuits are used as basic building blocks), The inverter is one of the most

fundamental basic building blocks The design & analysis of MOS inverter can be directly

applied to the more complex circuits.

COURSE OUTCOMES:

After successful completion of this course students should be able to;

1. Complete a significant VLSI design flow having a set of objective criteria and design

constraints & describe the general steps required for processing of CMOS integrated

circuits.

2. Create models of moderately sized CMOS circuits that realize specified digital functions

& have an understanding of the characteristics of CMOS circuit construction.

3. Estimate and optimize interconnect delay and noise.

L T P Credits

3 1 0 4

54

4. Design chip including characteristics of interconnect, gate delay, device sizing, I/O

buffering and circuit-level and layout design optimization

5. Introduce the concepts and techniques of modern integrated circuit design and testing

(CMOS VLSI). using Computer Aided Design (CAD) Tool i.e. Tanner

PREREQUISITE:

Student should have knowledge of electronics & digital design.

UNIT I 06

INTRODUCTION TO CMOS: Why Study CMOS? , Basic Concepts, Switch Logic, Logic

Transmission, Data Storage, Dynamic CMOS , CMOS System Design, MOSFET

Characteristics, Threshold Voltage, Current-Voltage Characteristics, p-Channel MOSFETs,

MOSFET Capacitances, Junction Leakage Currents, Parasitic Resistances,

UNIT II 06

INVERTER: CMOS Inverter Operation, Design techniques, Inverter Switching Characteristics,

Output Capacitance, Secondary Parasitic Effects, Cascaded inverter & super buffer, Power

dissipation, The Power-Delay Product, Temperature Dependence

UNIT III 06

STATIC COMBINATIONAL LOGIC DESIGN: Static CMOS logic gate design, Pseudo

nMOS gates, Pass transistor logic, CMOS Transmission Gates, Transmission Gate Model,

Tristate buffers

UNIT IV 06

SEQUENTIAL LOGIC CIRCUITS: Types of regenerative circuits, Basic s-R Flip flop/latch,

clocked JK Latch, D latch, Timining parameters for sequential circuits, Clock skew, Static Vs

Dynamic latch, CMOS Latch a clock skew free latch

55

UNIT V 06

ANALOG VLSI- MOS diode, MOS resistor, Introduction to switches, Register emulation using

switched capacitor circuits, Current sink & Sources, Current Mirrors, Differential amplifiers

Offset voltage in MOS differential amplifiers

UNIT VI 06

ANALOG CIRCUITS: Operational amplifier, Low Voltage Filters, Comparators, Introduction

to switched capacitors, Data conversion circuits, Phase locked loop circuits.

TEXT BOOK:

1. Principles of CMOS VLSI Design, Version 1.0, by N. Weste

2. VLSI Design & EDA Tools by Angsuman Sarkar Scitech publications (India) Pvt. ltd

REFERENCE BOOK:

1. CIRCUIT DESIGN for CMOS VLSI by John P. Uyemura Georgia Institute of

Technology Springer Science + Business Media, LLC

2. CMOS- Mixed Signal Circuit Design, R. Jacob Baker, (Vol ll of CMOS: Circuit Design,

Layout and Stimulation), IEEE Press and Wiley Nescience, 2002.

First Year M. Tech. Electronics (Digital System) Engineering

SEM-I

EDS5031 - ADVANCED DIGITAL SIGNAL PROCESSING

L T P Credits

3 0 0 3

56

COURSE DESCRIPTION:

Advances in integrated circuit technology have had a major impact on the technical areas to

which digital signal processing techniques and hardware are being applied. The efficient use of

such hardware devices requires thorough understanding of various digital signal processing

techniques. These techniques encompass filter design methods, power spectrum estimation and

sampling rate conversion. The subject is essential for anyone whose work is concerned with

signal processing applications.

COURSE OUTCOMES:

After successful completion of this course students should be able to;

1. Explain techniques available for implementation of digital signal processing system

2. Design and simulate the working of given digital signal processing system

3. Evaluate performance of digital signal processing system

4. Interpret the performance of digital signal processing system

5. Write limitations of digital signal processing system designed with specific technique.

PREREQUISITE:

Students should have knowledge of signals & systems & digital signal processing.

UNIT I 06

LINEAR PHASE FIR FILTER: Properties of FIR filter, window design technique, FIR filter

design by frequency sampling method, Optimum equiripple linear phase FIR filters, FIR

differentiator, Hilbert transformers, Comparison of design methods for linear phase FIR filters

UNIT II 06

POWER SPECTRUM ESTIMATION: Estimation of spectra from finite duration observation of

signals; Computation of energy density function, Estimation of auto-correlation and power spectrum

of random signals; the period gram. The use of the DFT in power spectrum estimation, Parametric

methods for power spectrum estimation: ARMA, AR, MA

57

UNIT III 06

OPTIMAL FILTERS-I: Autocorrelation, cross correlation, applications of optimal filters,

problem statement of optimal filter, signal models, Signal modelling: Pade approximation, Prony‘s

method, Shank‘s method, Inverse filter

UNIT IV 06

LINEAR PREDICTION: Forward and backward linear prediction, The Levinson Durbin

algorithm, The Schur algorithm

UNIT V 06

ADAPTIVE FILTERS: Necessity, Adaptive filters as noise cancellers; Configuration of

adaptive filters; main components of adaptive filters; Adaptive algorithms: LMS, RLS;

UNIT VI 06

MULTIRATE DSP: Decimation by a factor of D, Interpolation by factor of I, sampling rate

conversion by a rational factor I/D, filter design & Implementation of sampling rate

conversion

REFERENCE BOOKS:

1. Digital signal processing: - Principles, algorithms and application, John. G Proakis, D.G.

Manolakis, 4th

edition, Pearson Education

2. Statistical digital signal processing and modeling Monson. H. Hayes: Wiley Publication, 1st

edition

3. Digital signal processing, S.D.Apte, WILEY, 2nd

edition

4. Digital Signal Porcessing- A Matlab based approach,Vinay Ingle, J.G.Proakis-CENGAGE

Learning-2nd

edition.

5. Introduction to digital signal processing, Johnny R Johnson, PRENTICE HALL OF INDIA,

1st edition

6. Digital signal processing, A computer based approach, Sanjit K. Mitra (McGraw Hill- 3rd

Edition)

58

First Year M. Tech. Electronics (Digital System) Engineering

SEM-I

EDS5051 - EMBEDDED SYSTEM DESIGN

COURSE DESCRIPTION:

This course will familiarize students with the fundamentals of embedded system hardware and

firmware design. The IA32 microprocessor will be also studied. The architecture and instruction

set of the microcontroller will be discussed & programming will be learned by students to

develop systems. Students will familiarize with fundamentals of linux ,Installation &

configuration .Also the concepts of embedded security will be explored.

COURSE OUTCOMES:

After successful completion of this course students should be able to;

1. Understanding of Embedded System design

2. Exhibit the knowledge of design metrics of Embedded systems

3. Understand Linux operating system and device drivers installations

4. Design and simulate the Embedded System

5. Demonstrate the knowledge of commercially available operating system

PREREQUISITE:

Students should have knowledge of digital electronics, knowledge of microprocessor,

microcontrollers and C programming.

L T P Credits

3 1 0 4

59

UNIT I 06

INTRODUCTION TO EMBEDDED SYSTEMS:

Introduction to Embedded Systems, Architecture of Embedded System, Design Methodology,

Design Metrics, General Purpose Processor, System On chip. Embedded system design and

development: Embedded system design, Life-Cycle Models, Problem solving, The design

process, Requirement identification, Formulation of requirements specification. Development

tools. System design specifications: System specifications versus system requirements,

Partitioning and decomposing a system, Functional design, Architectural design, Functional

model versus architectural model, Prototyping, Other considerations, Archiving the project

UNIT II 06

EMBEDDED PROCESSOR ARCHITECTURE,

IA32 architecture, Micro-architecture, IA32 Instruction set, Assemblers, directives, Macros,

simulation and debugging tools. Function Calls, Pointer manipulation, exchange of arguments

and results, frame pointers, Interrupts and exceptions. Floating point format, FPU instructions,

MMX instructions, SIMD and SSE family Assembly for system initialization, Assembly in

operating systems. C code optimization using assembly, assembly in Linux kernel, Code

generation through compilers.

UNIT III 06

HARDWARE INTERFACING GPIO,

Serial, Interfacing to sensors and actuators, USB extender, Operating System Overview, Multi

Threading, Pipes, Semaphore, Mutex, message passing, Linux Kernel overview, kernel module

programming

UNIT IV 06

EMBEDDED LINUX AND DEVICE DRIVER

Introduction to Embedded Linux, Linux kernel: construction, Kernel Build system, kernel

configuration, obtaining custom Linux kernel, Kernel initialization, Porting Linux on ARM9,

60

Device driver: Concepts, Module utilities, Driver methods, Device driver for LED, Keyboard,

LCD

UNIT V 06

LINUX INSTALLATION AND CONFIGURATION AND SECURITY,

Linux Boot process, RAM disk, Boot loaders, UEFI BusyBox, Programming on Linux platform,

Audio signal Processing, Video signal Processing Network connectivity, Socket programming

Command Line tools, Shell commands

UNIT VI 06

INTRODUCTION TO SHELL SCRIPTING,

Tools for programming make, gdb, gcc, serial port programming, Hardware Interfacing GPIO,

Serial, Interfacing to sensors and actuators, USB extender, Introduction to HTML, JavaScript,

Python

REFERENCES:

1. Embedded Real Time Systems: Concepts, Design & Programming, Dr. K.V.K.K. Prasad,

Dreamtech Publication.

2. Embedded System Design: A unified Hardware/Software Introduction, Frank Vahid, and

Tony Givargis, Wiley Publication.

3. Embedded Systems: Architecture, Programming and Design, second edition, Raj Kamal,

Mc Graw Hill

4. An Embedded Software Primer, David E. Simon, Pearson Education Publication

5. The Linux Programming Interface: A Linux and UNIX System Programming Handbook

By Michael Kerrisk

6. Linux Device Drivers By Jonathan Corbet, Alessandro Rubini, and Greg Kroah-Hartman

7. Linux Kernel Development By Robert Love

8. Embedded Linux primer, second edition, Christopher Hallinan, Pearson publication

61

First Year M. Tech. Electronics (Digital System) Engineering

SEM-I

EDS5071 - RESEARCH METHODOLOGY

COURSE DESCRIPTION:

This course is designed for students pursuing the M. Tech Electronics PG programme. It is

designed on the principles and concept of experimental design, data collected from such

experiments and data analyses. The course will also introduce students to the use of statistical

methods too.

PREREQUISITES: Nil

COURSE OUTCOMES:

After completion of the course, the students should be able to;

1. demonstrate the knowledge of research process

2. apply statistical methods for analyzing the data and interpret results

3. use research related softwares for analyzing the data

4. illustrate the Intellectual Property rights

UNIT I 04

INTRODUCTION TO RESEARCH: Definitions and characteristics of research; Types of

research; Main components of any research work, Topic Selection: Learning Objectives;

Problem identification; Criteria for prioritizing problems for research.

UNIT II 04

L T P Credits

2 0 - 2

62

FORMULATING THE PROBLEM STATEMENT, LITERATURE REVIEW: Uses of

literature review; Source of information; Organization of information; Formulation of the

research objectives.

UNIT III 04

RESEARCH METHODOLOGIES: Study population; Variables; Sampling; Sample size

determination; Plan for data collection; Methods of data collection; Plan for data processing and

analysis; Ethical considerations.

UNIT IV 08

WORK PLAN; Major components and outline of the different phases in a research process;

Summary of the major components of a research proposal; Fieldwork; Writing a research report,

Thesis writing, presentation and editing tools. Data analysis software-SPSS, Core calculation

software, Introduction to C and MATLAB, open source softwares.

REFERENCES:

1. Kothari C.K. (2004) 2/e, Research Methodoloy – Methods and Techniques (New Age

International, New Delhi)

2. Krishnswamy, K.N., Shivkumar, Appa Iyer and Mathiranjan M. (2006) Management

Research Methodology; Integration of Principles, Methods and Techniques (Pearson

Education, New Delhi)

3. Gautam, N. C. (2004) Development of Research tools, New Delhi, Shree Publishers.

4. Gupta, Santosh (2005) Research Methodology and Statistical Techniques, Deep and Deep

Publications.

5. Brymann, Alan and Carmer, D. (1995) Qualitative data analysis for social scientist,

Newyork, Routledge Publication.

6. Taylor & Francis Ltd, ―Resisting Intellectual Property by Halbert‖, 2007

7. Robert P. Merges, Peter S. Menell, Mark A. Lemley, ―Intellectual Property in New

Technological Age‖

8. T. Ramappa, ―Intellectual Property Rights Under WTO‖, S. Chand

63

First Year M. Tech. Electronics (Digital System) Engineering

SEM-I

EDS5071 - RESEARCH METHODOLOGY

COURSE DESCRIPTION:

This course is designed for students pursuing the M. Tech Electronics PG programme. It is

designed on the principles and concept of experimental design, data collected from such

experiments and data analyses. The course will also introduce students to the use of statistical

methods too.

PREREQUISITES: Nil

COURSE OUTCOMES:

After completion of the course, the students should be able to;

5. demonstrate the knowledge of research process

6. apply statistical methods for analyzing the data and interpret results

7. use research related softwares for analyzing the data

8. illustrate the Intellectual Property rights

UNIT I 04

INTRODUCTION TO RESEARCH: Definitions and characteristics of research; Types of

research; Main components of any research work, Topic Selection: Learning Objectives;

Problem identification; Criteria for prioritizing problems for research.

L T P Credits

2 0 - 2

64

UNIT II 04

FORMULATING THE PROBLEM STATEMENT, LITERATURE REVIEW: Uses of

literature review; Source of information; Organization of information; Formulation of the

research objectives.

UNIT III 04

RESEARCH METHODOLOGIES: Study population; Variables; Sampling; Sample size

determination; Plan for data collection; Methods of data collection; Plan for data processing and

analysis; Ethical considerations.

UNIT IV 08

WORK PLAN; Major components and outline of the different phases in a research process;

Summary of the major components of a research proposal; Fieldwork; Writing a research report,

Thesis writing, presentation and editing tools. Data analysis software-SPSS, Core calculation

software, Introduction to C and MATLAB, open source softwares.

REFERENCES:

9. Kothari C.K. (2004) 2/e, Research Methodoloy – Methods and Techniques (New Age

International, New Delhi)

10. Krishnswamy, K.N., Shivkumar, Appa Iyer and Mathiranjan M. (2006) Management

Research Methodology; Integration of Principles, Methods and Techniques (Pearson

Education, New Delhi)

11. Gautam, N. C. (2004) Development of Research tools, New Delhi, Shree Publishers.

12. Gupta, Santosh (2005) Research Methodology and Statistical Techniques, Deep and Deep

Publications.

13. Brymann, Alan and Carmer, D. (1995) Qualitative data analysis for social scientist,

Newyork, Routledge Publication.

14. Taylor & Francis Ltd, ―Resisting Intellectual Property by Halbert‖, 2007

15. Robert P. Merges, Peter S. Menell, Mark A. Lemley, ―Intellectual Property in New

Technological Age‖

16. T. Ramappa, ―Intellectual Property Rights Under WTO‖, S. Chand

65

First Year M. Tech. Electronics (Digital System) Engineering

SEM-I

PEE5091 - ELECTROMAGNETIC COMPATIBILITY & INTERFERENCE

(PROGRAM ELECTIVE-I)

COURSE DESCRIPTION:

Electromagnetic Compatibility & Interference is offered as the open elective course at the

second semester of Electronics Engineering post-graduate programme; consist of two modules.

The first module constitutes the study of sources of electromagnetic interference, requirement of

electromagnetic compatibility, spectra of digital waveform, radiated emission and susceptibility

models. The second modules constitutes the study of nonideal behavior of passive components,

electromagnetic shielding, coupling modeling, conducted emission measurement and special

considerations in electronic system design to satisfy Electromagnetic Compatibility

requirements.

The prerequisite for this course is good background of Electromagnetic Engineering and

signals and systems courses offered at the undergraduate programme. Students should have clear

understanding of the boundary conditions, Maxwell‘s equations, and transmission line analysis

and Fourier transform analysis.

This course intends to build the competency in the students to understand basics of

electromagnetic interference and compatibility requirements of electronic products.

COURSE OUTCOMES:

After successful completion of this course students should be able to;

1. Understand sources of electromagnetic interference and requirement of electromagnetic

compatibility.

L T P Credits

3 1 0 4

66

2. Analyze spectra of digital waveform and discuss signal integrity

3. Understand models and effects of radiated, conducted emissions and radiated conducted

susceptibility on electronic system.

4. Describe non-ideal behavior of passive components at high frequencies.

5. Apply methods to minimize intersystem and intra-system interference to satisfy

electromagnetic compatibility requirements.

PREREQUISITE:

Students should have good knowledge of electromagnetic engineering course offered at UG

level.

UNIT I 06

ELECTROMAGNETIC COMPATIBILITY AND REQUIREMENTS FOR

ELECTRONIC SYSTEMS: Introduction to Electromagnetic compatibility: Aspects of EMC,

Radiated Susceptibility, Conducted Susceptibility, Decibels and Common EMC Units: Power

Loss in Cables, Signal Source Specification, EMC Requirements for Electronic Systems, EMC

standards, Measurement of radiated Emissions for Verification of Compliance, Electrostatic

Discharge.

UNIT II 07

SIGNAL SPECTRAL AND SIGNAL INTEGRITY : Spectra of periodic trapezoidal

waveform, Spectra of digital waveform, Spectral Bounds for Trapezoidal Waveforms,

Bandwidth of digital waveforms, representation of non periodic and random data signal,

Transients on transmission lines (time domain solutions), High speed digital interconnects and

signal integrity.

UNIT III 06

RADIATED EMISSIONS AND SUSCEPTIBILITY : Wires: Introduction, Emissions From

Linear Elements, Two Parallel Currents, Common mode chokes, Transmission Line Models For

Susceptibility, Voltage Induced On The Two-Wire Transmission Line.

67

UNIT IV 05

NONIDEAL BEHAVIOR OF COMPONENTS :Wires: Resistance and Internal Inductance of

Wires, External Inductance and Capacitance of Parallel Wires, Lumped Equivalent Circuits of

Parallel Wires, Printed Circuit Board (PCB) Lands, Effect of Component Leads, Resistors,

Capacitors, Inductors.

UNIT V 06

ELECTROMAGNETIC SHIELDING AND COUPLING BETWEEN DEVICES :

Introduction, Shielding Effectiveness, Near Field Illumination, Electric And Magnetic Sources,

Se Expressions: Near Zone Considerations, Coupling Between Devices: Capacitive (Electric)

Coupling, Magnetic (Inductive) Coupling.

UNIT VI 06

CONDUCTED EMISSION AND SYSTEM DESIGN FOR EMC : Conducted Emissions and

Susceptibility, Measurement of Conducted Emissions, The Line Impedance Stabilization

Network (LISN). Power supply filters, power supply and filter placement, ground concept, and

printed circuit board design.

REFERENCE BOOKS:

1. Introduction to Electromagnetic Compatibility, Clayton R. Paul, Second Edition,

Publisher- Wiely Interscience.

2. Applied Electromagnetics and Electromagnetic Compatibility. Dipak L. Sengupta, Valdis

V. Liepa. Publisher-Wiely Interscience

First Year M. Tech. Electronics (Digital System) Engineering

SEM-I

PED5111 - SYNTHESIS AND OPTIMIZATION OF DIGITAL CIRCUITS

(PROGRAM ELECTIVE-I)

68

COURSE DESCRIPTION:

To learn about state-of-the-art techniques and algorithms for synthesis and optimization of digital

systems. Topics in synthesis cover high-level and architectural synthesis, decision and word-

level diagrams, combinational logic optimization, and sequential optimization and testing.

COURSE OUTCOME:

After successful completion of this course students should be able to;

1. Describe fundamentals of synthesis and optimization techniques.

2. Illustrate various algorithms and optimization techniques to optimize digital circuits/modules.

3. Model digital systems by using various hardware modeling languages

4. Test variety of digital circuits by using different testing simulators/techniques.

5. Synthesize various digital circuits using different synthesis and optimization techniques.

PREREQUISITE: Basic logic design hardware design and organization and introduction to

HDL language.

UNIT I 06

INTRODUCTION: Microelectronics, semiconductor technologies and circuit taxonomy,

Microelectronic design styles, computer aided synthesis and optimization.

L T P Credits

3 1 0 4

69

GRAPHS: Notation, undirected graphs, directed graphs, combinatorial optimization,

Algorithms, tractable and intractable problems, algorithms for linear and integer programs, graph

optimization problems and algorithms, Boolean algebra and Applications.

UNIT II 06

HARDWARE MODELING

Hardware Modeling Languages, distinctive features, structural hardware language, Behavioral

hardware language, HDLs used in synthesis, abstract models, structures logic networks, state

diagrams, dataflow and sequencing graphs, compilation and optimization techniques.

UNIT III 06

TWO LEVEL COMBINATIONAL LOGIC OPTIMIZATION

Logic optimization, principles, operation on two level logic covers, algorithms for logic

minimization, symbolic minimization and encoding property, minimization of Boolean relations.

SEQUENTIAL CIRCUIT OPTIMIZATION

Sequential circuit optimization using state based models, sequential circuit optimization using

network models.

UNIT IV 06

SCHEDULE ALGORITHMS:

A model for scheduling problems, Scheduling with resource and without resource constraints,

Scheduling algorithms for extended sequencing models, Scheduling Pipe lined circuits.

UNIT V 06

CELL LIBRARY BINDING

Problem formulation and analysis, algorithms for library binding, specific problems and

algorithms for library binding (lookup table F.P.G.As and Anti fuse based F.P.G.As), rule based

library binding.

70

UNIT VI 06

TESTING

Simulation, Types of simulators, basic components of a simulator, fault simulation Techniques,

stuck-at- zero, stuck-at-one, Automatic test pattern generation methods(ATPG), design for

Testability (DFT) Techniques.

REFERENCE BOOKS:

1.Giovanni De Micheli, ―Synthesis and Optimization of Digital Circuits‖, Tata McGraw-Hill,

2003.

2.Srinivas Devadas, AbhijitGhosh, and Kurt Keutzer, ―Logic Synthesis‖, McGraw-Hill, USA,

1994.

3.NeilWeste and K. Eshragian, ―Principles of CMOS VLSI Design: A System Perspective‖,2nd

edition, Pearson Education (Asia) Pte. Ltd., 2000.

4.KevinSkahill, ―VHDL for Programmable Logic‖,Pearson Education(Asia) Pvt. Ltd., 2000

First Year M. Tech. Electronics (Digital System) Engineering

SEM-I

EDS5171 - DIGITAL VLSI DESIGN LAB

COURSE DESCRIPTION:

This course focuses on design of VLSI using Tanner Tool. Digital VLSI design lab deals with

designing of inverters, current sources, differential amplifier & registers. Tanner tool covers use

of simulation software‘s for digital VLSI design.

L T P Credits

0 0 2 1

71

PREREQUISITE:

Student should have knowledge of VLSI.

COURSE OUTCOMES:

After completion of this course students will be able to:

1. Design & implement digital VLSI circuits using Tanner tools.

2. Interpret the art of digital VLSI design by Tanner tools.

3. Program, test and simulate digital VLSI in Tanner tool.

4. Design the real time digital system applications by coding, simulating and synthesis.

NMOS INVERTER

Depletion and Enhancement Mode Circuit Simulation and Adjustment of Vh VLSI Vm

parameters for NMOS inverter.

CMOS INVERTER

Circuit Simulation, adjustment of W / L ratio of P & N channel MOS transistor for symmetrical

drive output and loading consideration. Scaling of CMOS Inverter for different technologies,

study of secondary effects ( temperature, power supply and process corners). Layout of CMOS

Inverter, Extraction of parasitics and back annotation and related modifications in circuit

parameters and layout.

CURRENT SOURCE / MIRROR

Circuit simulation of current Mirror using BJT and MOS ( Simple, Wilson and Widler

configurations ) study and modifications to improve power and load regulation. Layout of

CMOS Current Mirror.

72

8 BIT SHIFT REGISTER CELL

Building of cell Library of logic gates and flip flops and building of 8 bit shift register from the

same. Optimization of the same from layout and power considerations.

DIFFERENTIAL AMPLIFIER

Study of specifications of Differential amplifier and Design considerations. Study of input

loading and biasing techniques

First Year M. Tech. Electronics (Digital System) Engineering

SEM-I

EDS5191 - ADVANCED DIGITAL SIGNAL PROCESSING LAB

COURSE DESCRIPTION:

Advances in integrated circuit technology have had a major impact on the technical areas to

which digital signal processing techniques and hardware are being applied. The efficient use of

such hardware devices requires thorough understanding of various digital signal processing

techniques. These techniques encompass filter design methods, sampling rate conversion and

power spectrum estimation. The subject is essential for anyone whose work is concerned with

signal processing applications

COURSE OUTCOMES:

After completion of this course students will be able to:

1. Present and Write laboratory reports in desired format in grammatically correct language

L T P Credits

0 0 2 1

73

2. Write limitations of digital signal processing system designed with specific technique

3. Design and simulate the working of given digital signal processing system

4. Evaluate performance of digital signal processing system

5. Interpret the performance of digital signal processing system

PREREQUISITE:

Students should have knowledge of MATLAB programming.

PRACTICAL LIST:

Student should perform minimum 10 experiments

1 Design and implementation of window based filters

2 Design and implementation of filters using frequency sampling

3 Design and implementation of equiripple filters

4 Signal modeling using Pade approximation

5 Signal modeling using Prony‘s method

6 Signal modeling using Shank‘s method

7 Design and implementation of forward predictor

8 Design and implementation of backward predictor

9 Design and implementation of Interpolator

10 Design and implementation of Decimator

11 Design and implementation of sampling rate converter by arbitrary factor

12 Signal decomposition and reconstruction with HARR wavelet using standard equation

74

13 Signal decomposition and reconstruction with HARR wavelet using MATRIX method

14 Signal decomposition and reconstruction with Daubechies wavelet using standard equation

15 Signal decomposition and reconstruction with Daubechies wavelet using MATRIX method

16 Estimate spectrum of energy signal

17 Estimate spectrum of power signal

18 Implementation of adaptive filters

First Year M. Tech. Electronics (Digital System) Engineering

SEM-I

EDS5211 - EMBEDDED SYSTEM DESIGN LAB

COURSE DESCRIPTION:

This course will familiarize students with the fundamentals of embedded system hardware and

firmware design. The IA32 microprocessor will be also studied. The architecture and instruction

set of the microcontroller will be discussed & programming will be learned by students to

develop systems. Students will familiarize with fundamentals of linux, Installation &

configuration .Also the concepts of embedded security will be explored.

COURSE OUTCOMES:

After completion of this course students will be able to:

1. Understand of Embedded System

2. Exhibit the knowledge of design metrics of Embedded systems

3. Understand Linux operating system and device driver

4. Demonstrate the knowledge of android operating system

L T P Credits

0 0 2 1

75

PREREQUISITE:

Student should have basic knowledge operating systems.

Laboratory Assignments/Experiments: (based on Linux Operating system):

1. Write a program for 4*4 Matrix Keypad Interface.

2. Study of Linux Kernel.

3. Write a device driver for LCD.

4. Study of Android operating system.

5. Write a program for I2C based ADC.

6. C for GPIO and serial interfacing

7. Python accumulation processing and plotting of data

8. Introduction to HTML, JavaScript

9. Hardware interface to various peripherals.

10. Compilation of BusyBox for small memory requirements (newlib, uclibc)

11. Application development on Linux platform

12. Code optimization for Audio Video signal processing

13. Socket programming client server interface.

14. Bootloader configuration, creation of RAM disk.

15. Handling multi-threading use of Pipes, semaphoresinux kernel structure

16. Linux kernel module programming.

76

First Year M. Tech. Electronics (Digital System) Engineering

SEM-I

EDS5231 - SEMINAR

The credits will be based on the delivery of the seminars on the advanced and emerging fields of

Electronics.

First Year M. Tech. Electronics (Digital System) Engineering

SEM-I

EDS5251 - RESEARCH METHODOLOGY LAB.

COURSE DESCRIPTION:

This course is designed for students pursuing the M. Tech Electronics PG programme. It is

designed on the principles and concept of experimental design, data collected from such

experiments and data analyses. The course will also introduce students to the use of statistical

methods too.

PREREQUISITES: Nil

COURSE OUTCOMES:

After completion of the course, the students should be able to;

1. demonstrate the knowledge of research process

2. apply statistical methods for analyzing the data and interpret results

L T P Credits

0 0 2 2

L T P Credits

0 0 2 1

77

3. use research related software‘s for analyzing the data

4. Explain ethical issues pertaining to academic research.

5. Write research proposals, articles to publish his/her work.

EXPERIMENT LIST:

1. Problem identification

2. Literature Review

3. Research Design

4. Data Collection

5. Data Analysis

6. Interpretation of Data

7. Research Report writing

8. Thesis Writing and presentation

9. Study of research related software (e.g. SPSS)

10. Study of IPR

11. Plagiarism Testing

12. Proposal writing

First Year M. Tech. Electronics (Digital System) Engineering

SEM-I

EDS5271 - PROFICIENCY IN TECHNICAL COMMUNICATION

COURSE DESCRIPTION:

To demonstrate knowledge and skills to formulate various types of business and technical

communication. To analyze rhetorical aspects of audience, purpose, and context of technical

information to effectively communicate through written, oral, and visual media.

L T P Credits

0 0 2 1

78

COURSE OUTCOMES:

After successful completion of this course students should be able to:

1. Prepare documents that are structurally and technically appropriate.

2. Enhance writing skills with clarity, conciseness, coherence, cohesion, and emphasis.

3. Develop strategies for any Communication to address diverse forums.

4. Learn to Listen actively and Efficiently

5. Enhance Inter-personnel interaction & interviewing techniques

PREREQUISITE:

UNIT I 2

LANGUAGE FOR TECHNICAL PURPOSE AND PRESENTATION TOOLS:- Technical

vocabulary, Sentence structures, Microsoft office, Graphical presentations

UNIT II 2

FORMAL WRITTEN COMMUNICATION:-

Drafting Letters, e-Mails, Memos, Notices, Circulars, Schedules

UNIT III 2

PROJECT AND RESEARCH PROPOSALS: -

What‘s a research proposal? Essentials, Abstract, Aims, Background & significance, Design &

methods, Writing a sample proposal.

UNIT IV 2

PROJECT REPORTS:-

Types of reports, Planning a report, Collection & organization of information, Structure & style,

Proofreading etc. Writing a sample report

UNIT V 2

TEAM BUILDING AND WORKING IN GROUPS:-

79

Need of team, Effective teams, Group development, Roles in group, Case studies.

UNIT VI 2

LEADERSHIP SKILLS:-

Leadership quality and styles, Emotional intelligence, Diplomacy and Tact and effective

communication, Case studies.

UNIT VII 2

BUSINESS MEETINGS:-

Understanding role of meetings, planning meetings, developing meeting agendas, scheduling

meetings, conducting meetings effectively, Taking notes and publishing minutes and concluding

meetings, action plans, Demo meetings.

UNIT VIII 2

PRESENTATION SKILLS:-

Preparation, Understanding audience, Use of presentation tools, Presentation, nonverbal

techniques, handling questions, Demo presentations.

REFERENCES BOOKS:

1. S. Hariharan, et.al. Soft Skills; MJP Publishers, 2010.

2. John Seely, Oxford Guide to Effective Writing and Speaking; Oxford University Press,

2009.

3. Thomas N. Huckin and Leslie A. Olsen, Technical Writing and Professional

Communication

for Nonnative Speakers of English; Tata McGraw Hills, International Edition, 1991.

4. Jeff Butterfield,Soft Skills for Everyone,cengage Learning India Private Limited,2010.

5. L. Ann Masters & Harold R. Wallace, Personal Development for Life & Work,10e,

Cengage Learning India Private Limited,2011.

80

First Year M. Tech. Electronics (Digital System) Engineering

Syllabus Structure

Semester II

Course

Code Course

Teaching Scheme Evaluation Scheme

L T P Credits Scheme

Theory

(Marks) %

Practical

(Marks) %

Max Min %

for

Passing

Max Min %

for

Passing

SHP504 Advanced Engineering

Mathematics 4 -- -- 4

ISE 20

40 40

-- --

UT1 15 -- --

UT2 15

ESE 50 40 -- --

EDS5021

Digital System Design

using HDL

3 1 -- 4

ISE 20

40 40

-- --

UT1 15 -- --

UT2 15

ESE 50 40 -- --

EDS5041 VLSI Signal Processing

3 1 -- 4

ISE 20

40 40

-- --

UT1 15 -- --

UT2 15

ESE 50 40 -- --

PE-II Program Elective-II 3 1 -- 4

ISE 20

40 40

-- --

UT1 15 -- --

UT2 15

ESE 50 40 -- --

81

IE Institute Elective 3 -- -- 3

ISE 20

40 40

-- --

UT1 15 -- --

UT2 15

ESE 50 40 -- --

EDS5181 Digital System Design

using HDL Lab -- -- 4 2

ISE -- -- 50 50

ESE -- -- 50 50

EDS5201 VLSI Signal Processing

Lab -- -- 2 1

ISE -- -- 50 50

ESE -- -- 50 50

EDS5221 Mini Project -- -- 2 1 ISE -- -- 100 50

EDS5241 Comprehensive Viva Voce -- -- -- 1 ESE -- -- 100 50

Total Credits: 24, Total Contact Hours/Week: 27

First Year M. Tech. Electronics (Digital System) Engineering

Syllabus Structure

Semester II

Program Elective-II

Course Code Name of Course

PEE5061 VLSI Testing and Verification

PEE5081 Biomedical Signal Processing

PEE5101 Soft Computing Techniques

82

First Year M. Tech. Electronics (Digital System) Engineering

Syllabus Structure Semester II

Institute Elective

Course

Code Course Title Name of the Department

Applicable to Students of

following Departments

IET5021 Electric and Hybrid

vehicles Automobile Engineering

Automobile/Mechanical/

Electrical/ Electronics

IET 5281

Renewable and Non-

conventional Energy

sources.

Automobile Engineering All Departments

IET5041

Advance Networks

Computer Sc.& Engineering Electrical/ Electronics/ CSE

IET5061 Value Engineering Civil Engineering Automobile/Mechanical/

Electrical/ Civil

IET5081 Industrial Safety and Risk

Assessment Civil Engineering

Automobile/Mechanical/

Electrical/ Civil

IET5101 Industrial Automation and

Control Electrical Engineering

Electrical/ Electronics/

Automobile/Mechanical

IET5121 Sensor Technology Electronics & Telecommunication

Engg.

Automobile/Mechanical/

Electrical/ Electronics

IET5141 Mechatronics Electronics & Telecommunication

Engg

Automobile/Mechanical/

Electrical/ Electronics

IET5161 Computational Fluid

Dynamics Mechanical Engineering

Automobile/Mechanical

and Civil

83

First Year M. Tech. Electronics (Digital System) Engineering

SEM-II

SHP504 - ADVANCED ENGINEERING MATHEMATICS

COURSE DESCRIPTION:

The objective of the course is to develop level of mathematical sophistication that is appropriate

and expected in the Engineering Profession, to understand the impacts of engineering solutions

as well as to motivate them to apply their applications to engineering problems and to understand

IET5181 Quality and Reliability

Engineering Mechanical Engineering

Automobile/Mechanical/

Electrical

IET5201 Computational

Techniques in Engineering Mechanical Engineering

Automobile/Mechanical/

Electrical

IET5221 Management for

Engineers

Master of Business Administration

(MBA)

All Departments

IET5241 Data Analytics Master of Business Administration

(MBA)

All Departments

IET5261 Innovation Management Mechanical Engineering

E&TC, Electrical Engg,

Civil Engg & CSE

programs.

L T P Credits

4 0 0 4

84

the impacts of engineering solutions as well as to motivate them to apply their applications to

engineering problems

COURSE OUTCOMES:

On completion of this course student will be able to:

1. Identify, formulate and analyze the engineering problem.

2. Apply Mathematical concepts effectively to engineering fields.

3. Find Laplace & Fourier Transforms and inverse Laplace & Fourier transforms of various

functions and apply it to solve differential equations

4. Explain and apply the concepts of Probability, Distributions and Joint Probability

Distributions.

5. Apply the knowledge of theory of Partial Differential Equations, Matrices, to solve

problems in mathematics as well as allied engineering areas.

6. Understand the concept of Complex Analysis and its applications.

UNIT I 06

LAPLACE & Z TRANSFORMS: Concept of Transforms, Laplace Transform (LT) and its

existence, Properties of Laplace & Z-Transform, Evaluation of inverse Laplace & Z-Transform

& applications

UNIT II 06

FOURIER TRANSFORMS: Introduction, Fourier Integral Theorem, Fourier Sine and Cosine

Integral, Complex form of Fourier Integrals, Fourier Transforms, Inverse Fourier Transform,

Properties, Modulation Theorem, Convolution Theorem for Fourier Transforms, Parseval‘s

Identity, Fourier Transforms of derivative of functions, Relation between Fourier and Laplace

transform.

UNIT III 06

85

LINEAR ALGEBRA&REGRESSION ANALYSIS: Matrices, eigen values and eigen vectors

Correlation, Karl Pearson‘s coefficient of correlation, Correlation coefficient for a bivariate

distribution, Regression coefficient, regression lines, Reliability of regression estimates.

Interpolation techniques (Curve fitting)

UNIT IV 06

THEORY OF COMPLEX VARIABLES: A review of concept of limit, continuity,

differentiability & analytic functions. Cauchy Riemann Equations, Line Integral in the complex

plane, Cauchy Integral Theorem & Cauchy Integral Formula & its consequences, Power series

& Taylor Series(in brief ),Zeros & Singularity, Laurent‘ Series, Residues, Evaluation of Real

Integrals

UNIT V 06

PROBABILITY AND DISTRIBUTIONS: Random Variables: Discrete and continuous

random variables, probability mass, probability density and cumulative distribution functions,

mathematical expectation, moments, moment generating function. Standard

Distributions: Uniform, Binomial, Geometric, Negative Binomial, Poisson, Exponential,

Gamma, Normal

UNIT VI 06

OPTIMIZATION TECHNIQUES: Basic concept of optimization, classification of

optimization, optimization techniques, and engineering applications of optimization, Classical

optimization techniques: unconstrained optimization single-variable optimization, multivariable

optimization, multivariable optimization with equality constraints: solution by direct search

method, solution by Lagrange-multipliers method, multivariable optimization with inequality

constraints, Kuhn-Tucker conditions. Introduction to Computational Game theory

TEXT BOOKS:

1) Higher Engineering Mathematics, B. S. Grewal, Khanna Publishers39thedition: 2005

2) A Text Book of Engineering Mathematics, N.P.Bali, Ashok Saxena and N.Ch. S. N.

Iyengar, Laxmi Publications, New Delhi, sixth edition, 2004

86

REFERENCE BOOK:

1) A Text Book of Applied Mathematics, Vol. I, Vol. II, P. N. Wartikar and J. N. Wartikar,

Vidhyarthi Griha Prakashan, Pune, 9th

Revised Edition, September 2005

2) Applied Mathematics, Ch. V. Raman Murty, N. C. Srinivas, S. Chand and Company Ltd.

Ramnagar, New Delhi, 1st edition, 2001

3) Advanced Engineering Mathematics, Kreyszig E., Wiley Eastern, 8th

edition, 2007

4) Engineering Mathematics, Sastry, S. S., Vol. I and II, Prentice hall, 4th

edition, 2009

5) Advanced Engineering Mathematics, Peter V. O‘neil, Cole Publishing House, 4th

Edition, 2002.

6) An Introduction to Game Theory, J. Osborne, Oxford University Press, 2004

First Year M. Tech. Electronics (Digital System) Engineering

SEM-II

EDS5021 - DIGITAL SYSTEM DESIGN USING HDL

COURSE DESCRIPTION:

This course provides the advanced knowledge of digital design using Hardware Description

Language. The course deals with fundamentals of HDL, Programmable logic devices and their

design and testing of logic circuits.

COURSE OUTCOMES:

After completion of this course, students will be able to:

L T P Credits

3 1 0 4

87

1. Describe the components of HDL and Programmable Logic Devices.

2. Explain testing of logic circuits.

3. Derive SM charts.

4. Design combinational and sequential circuits for the given specifications.

PREREQUISITE:

The students should have knowledge of Digital Design using logic gates.

UNIT I 06

INTRODUCTION TO HDL AND DATAFLOW DESCRIPTION:

VLSI Design Flow, History of HDL, Structure of the HDL, Operators, Data types, Types of description,

Simulation and synthesis, Comparison of VHDL and Verilog, Structures of Data flow Description, Data

type – vectors, Common programming error.

UNIT II 06

BEHAVIORAL AND STRUCTURAL DESCRIPTIONS:

Structure of HDL Behavioral description, Sequential Statements, Organization of the structural

description, Binding State Machines, Generate and Parameter, Procedures and Tasks with examples,

Verilog Functions with examples.

UNIT III 06

INTRODUCTION TO PROGRAMMABLE LOGIC DEVICES and SM CHARTS

Overview of Programmable Logic Devices, Simple Programmable Logic Devices, Complex

Programmable Logic Devices, Field Programmable Gate, Machine Charts, Derivation of SM Charts,

Realization of SM Charts

UNIT IV 06

DESIGNING WITH FIELD PROGRAMMABLE GATE ARRAY:

88

Function Implementation in FPGAs and Shannon Decomposition, Carry and Cascade Chains in FPGAs,

Dedicated memories and Multipliers in FPGA, Cost of Programmability, FPGA Capacity: Maximum

Gates vs. Usable Gates, Design translation, Mapping , Placement and Routing).

UNIT V 06

SYNCHRONOUS SEQUENTIAL CIRCUITS:

Basic Design Steps, State Assignment Problem, Mealy State Model, Serial Adder example, State

Minimization, Design of counter using the sequential circuit approach.

UNIT VI 06

DIGITAL SYSTEM DESIGN AND TESTING OF LOGIC CIRCUITS:

Building Block Circuits, Design Examples(BCD to Seven Segment Display Decoder, A BCD Adder, 32-

Bit Adder, Add and Shift Multiplier and Array multipliers, Traffic light controller),Clock

Synchronization. Testing: Fault models, path sensitizing, random test, design for testability, Built in Self

Test, Printed Circuit Boards.

TEXT BOOKS:

1. HDL Programming VHDL and Verilog by Nazieh M. Botros, 2009 edition , Dreamtech

press.

2. Fundamentals of Digital Logic Design with VHDL by Stephen Brown and Zvonko

Vranesic, second edition, The Mcgraw Hill.

3. Principles of Digital System Design with VHDL Charles Roth and Lizy Kurian John

1998.

89

First Year M. Tech. Electronics

SEM-II

PEE5061 VLSI TESTING AND VERIFICATION

(PROGRAM ELECTIVE-II)

COURSE DESCRIPTION:

For VLSI the foundation was provided by semiconductor device technology, circuit design, and

electronic testing. The objective behind this course is to discuss the third component of VLSI

that is Electronic testing. In a computer engineering curriculum, therefore, it is necessary that

foundations should be taught before applications. The field of VLSI has expanded to systems-on-

a-chip, which include digital, memory, and mixed-signal subsystems. The syllabus has been

designed to cover all three types of electronic circuits.

COURSE OUTCOMES:

After successful completion of this course students should be able to;

1. Identify the significance, parameters affecting and basics of VLSI Testing.

2. Describe the different types of fault models, ATPG algorithms and their applications.

3. Illustrate the methodology for combinational and sequential circuit test generation.

4. Formulate the procedure to perform DELAY TEST, IDDQ TEST.

5. Classify the different types of System on Chip Verification methodologies.

PREREQUISITE:

A strong mathematical foundation, the algorithmic design, Verilog/VHDL Programming and

VLSI Technology will be helpful.

L T P Credits

3 1 0 4

90

UNIT I 06

INTRODUCTION TO TESTING: Introduction: Testing Philosophy, Role of Testing, Digital

and Analog VLSI Testing, VLSI Technology Trends Affecting Testing, VLSI Testing Process

and Test Equipment: How to Test Chips? Automatic Test Equipment, Electrical Parametric

Testing

UNIT II 06

TEST ECONOMICS AND PRODUCT QUALITY: Test Economics, Yield, Defect Level as

a Quality Measure, Fault modeling: Defects, Errors, and Faults, Functional Versus Structural

Testing, Levels of Fault Models, A Glossary of Fault Models, Single Stuck-at Fault

UNIT III 06

TEST METHODS: Logic and fault simulation; Simulation for Design Verification, Simulation

for Test Evaluation, Modeling Circuits for Simulation and Algorithms for True-Value

Simulation, Algorithms for Fault Simulation, Statistical Methods for Fault Simulation.

Testability measures: SCOAP Controllability and Observability, High-Level Testability

Measures

UNIT IV 06

COMBINATIONAL CIRCUIT TEST GENERATION: Algorithms and Representations,

Redundancy Identification (RID), Testing as a Global Problem, Definitions, Significant

Combinational ATPG Algorithms, Test Generation Systems, Test Compaction

UNIT V 06

SEQUENTIAL CIRCUIT TEST GENERATION: ATPG for Single-Clock Synchronous

Circuits, Time-Frame Expansion Method, Simulation-Based Sequential Circuit ATPG, DELAY

TEST, IDDQ TEST.

UNIT VI 06

SOC VERIFICATION: Verification Technology Options, Formal Technologies, Physical

Verification and Analysis, Comparing Verification Options, Verification Methodology,

91

Verification Approaches, Verification and Device Test, Verification Plans, System-Level

Verification, Block-Level Verification

REFERENCE BOOKS:

1) Essentials of Electronic Testing for Digital, Memory and Mixed-signal VLSI circuits,

Michael L. Bushnell and Vishwani D. Agrawal, 1st

Edition, Kluwer Academic Publishers,

2002.

2) System-On-a-Chip Verification, Methodology and Techniques. Prakash Rashinkar, Peter

Paterson, Leena Singh, First Edition, Kluwer Academic Publishers, 2002

First Year M. Tech. Electronics

SEM-II

PEE5081 BIOMEDICAL SIGNAL PROCESSING

(PROGRAM ELECTIVE-II)

COURSE DESCRIPTION:

Introduction to the electrocardiogram, electroencephalogram, electromyogram, and other

diagnostic signals. Computer techniques for processing and analysis of biomedical signals.

Pattern classification and decision techniques for computer-aided diagnosis. Case studies from

current applications and research.

COURSE OUTCOMES:

After completion of this course students will be able to:

L T P Credits

3 1 0 4

92

1. Explain the genesis of biomedical signals such as the action potential, EMG, ECG, EEG,

and heart sound signals. Review basic concepts of signals, systems, and digital filters.

2. Study the characteristics of biomedical signals: stationarity, periodicity, rhythm, wavelet,

epoch, episode, transient.

3. Describe signal processing techniques for filtering, noise removal, cancellation of

interference, and characterization of signals.

4. Design and implement techniques for the detection of events such as the QRS complex,

heart sounds and murmurs, and the dichotic notch.

5. Explore techniques for the analysis of wave shape and waveform complexity and Learn

about spectral analysis of biomedical signals.

PREREQUISITE:

Digital Signal Processing and MATLAB Programming

UNIT I 06

INTRODUCTION TO BIOMEDICAL SIGNALS - Examples of Biomedical signals - ECG,

EEG, EMG etc - Tasks in Biomedical Signal Processing - Computer Aided Diagnosis. Origin of

bio potentials - Review of linear systems - Fourier Transform and Time Frequency Analysis

(Wavelet) of biomedical signals- Processing of Random & Stochastic signals – spectral

estimation – Properties and effects of noise in biomedical instruments - Filtering in biomedical

instruments.

UNIT II 07

CONCURRENT, COUPLED AND CORRELATED PROCESSES - illustration with case

studies – Adaptive and optimal filtering - Modeling of Biomedical signals - Detection of

biomedical signals in noise -removal of artifacts of one signal embedded in another -Maternal-

Fetal ECG - Muscle-contraction interference. Event detection - case studies with ECG & EEG -

Independent component Analysis - Cocktail party problem applied to EEG signals -

Classification of biomedical signals.

93

UNIT III 06

CARDIO VASCULAR APPLICATIONS : Basic ECG - Electrical Activity of the heart- ECG

data acquisition – ECG parameters & their estimation - Use of multiscale analysis for ECG

parameters estimation - Noise & Artifacts- ECG Signal Processing: Baseline Wandering, Power

line interference, Muscle noise filtering – QRS detection - Arrhythmia analysis

UNIT IV 05

ECG DATA REDUCTION TECHNIQUES:- Direct data compression techniques, Direct ECG

data compression techniques, Transformation compression technique, other data compression

techniques, The PRD index.

UNIT V 06

DATA COMPRESSION: Lossless & Lossy- Heart Rate Variability – Time Domain measures -

Heart Rhythm representation - Spectral analysis of heart rate variability - interaction with other

physiological signals.

UNIT VI 06

NEUROLOGICAL APPLICATIONS: The electroencephalogram - EEG rhythms & waveform

- categorization of EEG activity - recording techniques - EEG applications- Epilepsy, sleep

disorders, brain computer interface. Modeling EEG- linear, stochastic models – Non linear

modeling of EEG - artifacts in EEG & their characteristics and processing – Model based

spectral analysis - EEG segmentation - Joint Time-Frequency analysis – correlation analysis of

EEG channels - coherence analysis of EEG channels.

REFERENCES BOOKS :

1) Biomedical Signal Processing: Principles and Techniques, D. C. Reddy, Tata McGraw

Hill, New Delhi, 2005

2) Biomedical Signal Processing, Willis J Tompkins, Prentice – Hall, 1993

3) Biomedical Signal Processing Time and Frequency Domains Analysis (Volume I), Arnon

Cohen, CRC press.

94

4) Biomedical Signal Analysis, R. Rangayan, Wiley India, 2002

5) Biomedical Signal Processing & Signal Modeling, Biomedical Signal Processing and

Signal Modeling, Eugene N. Bruce, John Wiley & Sons, Inc., 2001

6) Bioelectrical Signal Processing in Cardiac and Neurological Applications, Leif Sornmo,

Pablo Laguna, 1st Edition, Elsevier, 2005

First Year M. Tech. Electronics

SEM-II

PEE5101 SOFT COMPUTING TECHNIQUES

(PROGRAM ELECTIVE-II)

COURSE DESCRIPTION:

Soft Computing Techniques is offered as the open elective course at the second semester of

Electronics Engineering post-graduate programme Soft computing is the name that is being put

forth as an alternative to artificial intelligence for the plethora of the advanced information

processing technologies that have emerged in past the decade. This course consists of two

important techniques which are Fuzzy Logic and Neural network. The first section describes the

foundation of fuzzy logic, fuzzy relations and operations and Linguistic descriptions and fuzzy

controller. The second section describes fundamentals of neural network ,back propagation

training algorithm and dynamic system.

COURSE OUTCOMES:

After successful completion of this course students should be able to;

1. Explain basic terminologies of fuzzy logic, fuzzy relations and operations.

L T P Credits

3 1 0 4

95

2. Develop fuzzy algorithms for Linguistic controllers and defuzzification methods.

3. Understand the basic structure of neural network and comparative analysis of biological

neural network and artificial neural network.

4. Describe the back propagation algorithm for multilayer neural network and factors affecting

the back propagation training.

5. Describe the concept of dynamic systems and adaptive signal processing.

PREREQUISITE:

Basic knowledge of Probability theory and Engineering mathematics courses offered at UG

program.

UNIT I 06

FOUNDATION OF FUZZY LOGIC: Fuzzy Sets, Basic Terms And Operation, Properties Of

Fuzzy Sets, The Extension Principle, Alpha-Cuts, The Resolution Principle, Possibility Theory

And Fuzzy Probabilities.

UNIT II 06

FUZZY RELATIONS AND OPERATION: Introduction , Fuzzy Relations, Properties Of

Relations, Basic Operations With Fuzzy Relations, Composition Of Fuzzy Relations, Fuzzy

Numbers and operations.

UNIT III 06

LINGUISTIC DESCRIPTIONS AND FUZZY CONTROLLER: Fuzzy Linguistic

Descriptions, Linguistic Variable And Values, Implication Relations, Fuzzy Inference And

Composition, Fuzzy Algorithms, Fuzzy Linguistic Controllers, Defuzzification Methods.

UNIT IV 06

FUNDAMENTALS OF NEURAL NETWORKS: Basis Of Neural Networks, Artificial

Neurons, Artificial Neural Networks, Learning And Recall.

UNIT V 06

96

BACK-PROPAGATION AND RELATED TRAINING ALGORITHMS: Back-Propagation

Training, Widrow-Hoff Delta Learning Rule, Back-Propagation Training For A Multilayer

Neural Network‘ Factors That Influence Back-Propagation Training, Sensitivity Analysis In A

Back-Propagation Neural Network, Autoassociative Neural Networks, Recirculation Neural

Networks.

UNIT VI 06

DYNAMIC SYSTEMS AND NEURAL CONTROL: Introduction, Linear Systems Theory,

Adaptive Signal Processing, Adaptive Processors And Neural Networks, Neural Network

Control, System Identification and pattern classification, Implementation Of Neural Control

Systems, Applications Of Neural Networks In Noise Analysis, Practical Aspects Of Using

Neural Networks

REFERENCE BOOKS:

1) Fuzzy and Neural approaches in Engineering, Lefteri H. Tsoulalas, Wiley Interscience

publication, 1997

2) Artificial Neural Network, B. Yegnanarayana, PHI publication, 2013

3) Neural networks, Fuzzy logic and Genetic Algorithms, S. Rajsekaran Vijayalakshmi

Pari, PHI Publication, 2011

4) Neural Networks, Satish Kumar, McGraw Hill publication, 2007

5) Fuzzy Logic with Engineering Applications, Timothy J. Ross, Wiley Interscience

publication, 2010

97

First Year M. Tech. Electronics (Digital System) Engineering

SEM-II

EDS5181 - DIGITAL SYSTEM DESIGN USING HDL LAB

COURSE DESCRITION:

This laboratory course focuses on synthesis and simulation of important digital circuits.

Emphasis is on designing and writing different HDL models (Structural, Dataflow Behavioral

modelling) for different Digital circuits. The experiments included in the curriculum cover

majority of the HDL models of the digital circuits studied in theory. Some additional value added

experiments are also included in the end.

PRE-REQUISITES: Digital Design Course

COURSE OUTCOMES:

After completion of this course, students will be able to:

1. Write HDL code as per the problem statement.

2. Simulate the HDL code of the digital circuits.

3. Implement the HDL code of the digital circuits in the FPGA.

4. Interpret the results and conclude.

5. Prepare the report of the experiment.

L T P Credits

0 0 4 1

98

LIST OF EXPERIMENTS

1. Introduction to HDL Software and Hardware

2. Writing and Simulation of HDL programs for Half adder and Full adder

3. Writing, Simulation and Implementation of HDL programs for Multiplexer and De-

multiplexer

4 Writing and Simulation HDL program for SM chart.

5. Writing, Simulation and Implementation of HDL program for given sequential circuit.

6. Writing, Simulation and Implementation of HDL program for Binary Multiplier.

7. BCD to Seven Segment Display Decoder

8. Traffic light controller using HDL.

First Year M. Tech. Electronics (Digital System) Engineering

SEM-II

EDS5201 - VLSI SIGNAL PROCESSING LAB

COURSE DESCRIPTION:

The objective of this course is to provide to the students an introduction to the fundamentals and

practical considerations pertaining to introduce techniques for altering the existing DSP

structures to suit VLSI Implementations. & efficient design of DSP architectures suitable for

VLSI. The VLSI architecture theory and algorithms, various architectures at the implementation

level, and several approaches to analysis, estimation, and reduction of power consumption.

L T P Credits

0 0 2 1

99

Topics include:

Transformations for high speed using pipelining, retiming, and parallel processing

techniques.

Power reduction transformations for supply voltage reduction as well as for strength or

capacitance reduction.

Area reduction using folding techniques

Strategies for arithmetic implementation

COURSE OUTCOMES:

After completion of this course, students will be able to:

1. Improve a DSP architecture (represented in SDFG) with two possible methods

2. Analyze pipelining and parallel processing techniques for low power

3. Understanding different architectural improvements in VLSI signal processors and

analyze its importance in

4. Analyze different retiming techniques to reduce critical paths

5. Implementation of algorithms for unfolding, folding & Systolic Array Design

6. Demonstrate an ability to use MATLAB/ SCILAB to implement VLSI Signal

Processing algorithms.

PREREQUISITE: NIL

LIST OF EXPERIMENTS

Expt.

No.

Title of the Experiment Perform Using

01 Longest Path Matrix Algorithm (LPM), Algorithm to

compute iteration bound

SCILAB

02 Minimum Cycle Mean Algorithm (MCM), Algorithm to

compute iteration bound

SCILAB

03 Design of Parallel Processing architecture for low power SCILAB

100

04 Design of Pipeline architecture for low power MATLAB

05 Retiming for critical path reduction MATLAB

06 Folding & Unfolding SCILAB

07 Bits Serial Adder Design using FPGA Altera Kit &

Quartus software

08 SYSTOLIC ARCHITECTURE DESIGN MATLAB

09 Full adder design using Quartus software &

implementation on Altera kit

Altera Kit &

Quartus software

10 3-tap FIR filter implementation using FPGA Altera Kit &

Quartus software

First Year M. Tech. Electronics (Digital System) Engineering

SEM-II

EDS5221 - MINI-PROJECT

There will be one mini project implemented during the course of the semester. Mini project is composed

of the following four parts:

1. Problem Analysis

2. Solution Design

3. Build and Test (software /hardware)

4. Demonstrate and Report

You will be expected to demonstrate a working design to meet the specifications of the assigned project

L T P Credits

0 0 2 1

101

First Year M. Tech. Electronics (Digital System) Engineering

SEM-II

EDS5241 - COMPREHENSIVE VIVA VOCE

COURSE OUTCOMES:

At the end of the course the students will be able to

1. Comprehend the knowledge gained in the course work

2. Infer principles of working of electronics systems

3. Demonstrate the ability in problem solving and Critical thinking

COURSE DESCRIPTION:

Comprehensive Viva-Voce is conducted at the end of the Semester II. The students have to prepare three

courses, one from Semester I and two courses from Semester II. The list of courses will be provided by

Head of the programme. This will test the student‘s learning and understanding during the course of their

post graduate programme. The main objective of this course is to prepare the students to face technical

interview both at the academic and the industrial sector.

The Comprehensive Viva-Voce will be conducted by the external and internal examiner jointly and their

appointments will be made by COE along with two Faculty members of the concerned programme. The

in-depth knowledge, preparation and subjects understanding will be assessed by the Examiners. The

Comprehensive Viva Voce is evaluated for 100 marks by the Committee. After successful passing in the

exam, students will earn 1(One) credit. There are no internal marks.

L T P Credits

0 0 0 1

102

First Year M. Tech. Electronics (Digital System) Engineering

SEM-II

List of Institute Elective Courses

Course

Code Course Title Name of the Department

Applicable to Students of

following Departments

IET5021 Electric and Hybrid vehicles Automobile Engineering Automobile/Mechanical/

Electrical/ Electronics

IET 5281

Renewable and Non-

conventional Energy

sources.

Automobile Engineering All Departments

IET5041

Advance Networks

Computer Sc.& Engineering Electrical/ Electronics/ CSE

IET5061 Value Engineering Civil Engineering Automobile/Mechanical/

Electrical/ Civil

IET5081 Industrial Safety and Risk

Assessment Civil Engineering

Automobile/Mechanical/

Electrical/ Civil

IET5101 Industrial Automation and

Control Electrical Engineering

Electrical/ Electronics/

Automobile/Mechanical

IET5121 Sensor Technology Electronics & Telecommunication

Engg.

Automobile/Mechanical/

Electrical/ Electronics

IET5141 Mechatronics Electronics & Telecommunication

Engg

Automobile/Mechanical/

Electrical/ Electronics

IET5161 Computational Fluid

Dynamics Mechanical Engineering

Automobile/Mechanical and

Civil

103

First Year M. Tech. Electronics (Digital System) Engineering

SEM-II

Department of Automobile Engineering

Institute Elective

IET5021: Electric and Hybrid Vehicles.

Teaching Scheme Evaluation Scheme

L T P Credits Scheme

Theory (Marks %) Practical (Marks %)

Max. Min. for Passing Max. Min. for Passing

3 0 -- 3

ISE 20

40

-- --

MSE 30 -- --

ESE 50 40 -- --

IET5181 Quality and Reliability

Engineering Mechanical Engineering

Automobile/Mechanical/

Electrical

IET5201 Computational Techniques

in Engineering Mechanical Engineering

Automobile/Mechanical/

Electrical

IET5221 Management for Engineers Master of Business Administration

(MBA)

All Departments

IET5241 Data Analytics Master of Business Administration

(MBA)

All Departments

IET5261 Innovation Management Mechanical Engineering E&TC, Electrical Engg, Civil

Engg & CSE programs.

104

COURSE DESCRIPTION:

With depleting conventional fuel sources, modern transportation can not rely on only IC Engine

powered vehicles. In the pursuit of alternative technologies, Electric and Hybrid electric vehicle

technology is coming up in a big way. There are already many EVs and HEVs on roads of

developed nations and are being offered as viable means of transportation in developing

countries as well. The course offers opportunity for students to learn a modern and relevant

technology as a part of the program. Also, with unveiling of National Electric Mobility Mission

Plan (NEMMP 2013) recently, many employment opportunities are expected in the area of

design and research on EV technology.

COURSE OUTCOMES:

At the end of this course student will be able to:

1. Design and EV for given requirements and estimate its performance.

2. Compare Electric and Hybrid electric technology and its various subsets.

3. Select appropriate configuration/s and control strategy for HEVs.

4. Choose appropriate power source of correct rating for the EVs and HEVs.

5. Describe the fuel cell technology and model the FCEV for the road application.

PRE-REQUISITES:

A basic course on Automobile Engineering and Electrical Machines is recommended as pre-

requisites for this course.

UNIT 1: Introduction and conventional drive train

Environment impact, history of EVs, conventional drive train elements, formats and design principles

UNIT 2: Electric vehicles technology and design

Configurations of EVs, performance, energy consumption, design issues

105

UNIT 3: Hybrid electric vehicle technology

Concept, architecture of hybrid drive trains, series hybrid drive train and parallel hybrid drive train

UNIT 4: Design of series and parallel hybrid drive trains

Operation patterns, design objectives, control strategies, sizing of components

UNIT 5: Peaking power sources and Drives for EVs

Electrochemical batteries, ultra capacitors, ultra high speed flywheels, motors used for EVs and HEVs

UNIT 6: Fuel Cell Electric Vehicle Drive Train Design

Fuel cell technology, configuration, control strategy, parametric design

REFERENCE BOOKS:-

1. Mehrdad Ehsani, Yimin Gao, Ali Emadi, ‗Modern Electric, Hybrid Electric and Fuel Cell

Vehicles – Fundamentals, Theory and Design‘, CRC Press, New York, 2010.

2. Robin Hardy, Iqbal Husain, ‗Electric and Hybrid Vehicles‘, CRC Press, ISBN 0-8493-1466

3. James Larminie, John Lowry, ‗Electric Vehicle Technology Explained‘, John Wiley &

Sons Ltd., England, 2003.

4. Iqbal Hussain, ‗Electric & Hybrid Vehicles – Design Fundamentals‘, CRC Press, New

York, 2003.

5. Sandeep Dhameja, ‗Electric Vehicle Battery Systems‘, Newnes, Massachusetts, 2002.

6. Dr Mike Westbrook, M H Westbrook, ‗The Electric Car: Development & Future of

Battery, Hybrid Cars‘, British library Cataloguing in Publication Data, UK, ISBN0 85296

0131.

106

First Year M. Tech. Electronics (Digital System) Engineering

SEM-II

Department of Computer Science & Engineering

Institute Elective

IET5041: Advance Networks

Teaching Scheme Evaluation Scheme

L T P Credits Scheme

Theory (Marks %) Practical (Marks %)

Max. Min. for Passing Max. Min. for Passing

3 0 -- 3

ISE 20

40

-- --

MSE 30 -- --

ESE 50 40 -- --

COURSE DESCRIPTION:

Communication is one of the fundamental applications of computer systems. Wireless

technologies are becoming popular in these days. This course will cover the fundamental aspects

of wireless networks, with emphasis on current and next-generation wireless networks providing

insight and knowledge about architectures and protocols for Mobile and wireless

communication. The course discusses about Wireless LAN, Emerging Wireless Technology, and

Technologies for Mobile communication. It also focuses on fundamental of Wireless ad-hoc

network, its routing protocols and Wireless Sensor Network.

COURSE LEARNING OUTCOMES:

At the end of course student should be able to,

Comprehend the concepts of Wireless LAN.

107

Differentiate between the technologies and protocols used in wireless and mobile

communication.

Discuss the concepts of Wireless Ad-hoc Network.

Simulate and analyze the routing protocols used in Wireless Ad-hoc Network.

Formulate and solve problems in Wireless Sensor Network.

PREREQUISITES: Basics of Computer Network.

UNIT 1: WIRELESS LAN 06

Introduction, advantages, IEEE 802.11 standard, Wireless LAN Architecture, Mobility in

Wireless LAN, Deploying Wireless LAN, Mobile Ad-hoc Network and Sensor Network,

Wireless LAN security, Wireless Access in Vehicular Environment, Wireless Local Loop,

HiperLAN, WiFi versus 3G.

UNIT 2: EMERGING WIRELESS TECHNOLOGY 06

Introduction, Bluetooth, Radio Frequency Identification (RFID), Wireless

Broadband (WIMAX), Mobile IP, Internet Protocol Version 6 (IPV6).

UNIT 3: TECHNOLOGIES FOR MOBILE COMMUNICATION 06

Global System for mobile communication (GSM), Short Message Service (SMS), General

Package Radio Service (GPRS), Wireless Application Protocol (WAP), CDMA and 3G.

UNIT 4: AD-HOC WIRELESS NETWORK 06

Introduction to Ad-hoc Wireless Networks, Overview, Characteristics, Applications, Issues

In Ad Hoc wireless networks, MAC Protocols for ad hoc wireless networks: Introduction,

Issues in designing MAC protocol, Design goals of MAC protocol, Classification of MAC

108

protocols, Contention based protocols.

UNIT 5: ROUTING PROTOCOL IN AD-HOC WIRELESS NETWORK 06

Issues in Designing a Routing Protocol for Ad Hoc Wireless Networks, Classifications of

Routing Protocols: Table driven, on-demand Hybrid routing protocols, Issues in designing a

multicast routing protocol, Operation of multicast routing protocols, An architecture reference

model for multicast routing protocols, Classification of multicast routing protocols, Tree-

based, Mesh-based multicast routing protocols.

UNIT 6: WIRELESS SENSOR NETWORK 06

Introduction, Sensor Network Architecture, Data Dissemination, Data Gathering , MAC

Protocols for Sensor Networks, Location Discovery, Quality of Sensor Network ,Other Issues:

Energy Efficient Design, Synchronization, Transport Layer Issues, Security , Real Time

Communication.

TEXT BOOKS:-

1) Asoke K Talukder,Hasan Ahmed , Roopa R. Yavagal , ―Mobile Computing : Technology,

Applications and service creation‖ ,2nd edition,Mc Graw Hill publication

2) Yi-Bing and Imrich Chlamtac, ―Wireless and Mobile Networks Architectures‖, John

Wiley & Sons, 2001

3) Ad Hoc wireless Networks – Architecture and Protocols by C.S.R.Murthy & B.S. Manoj,

Pearson Education

REFERENCE BOOKS:-

1. Wireless communication and Networks by William Stallings , 2nd edition , Pearson

Education

2. Imielinski T. and Korth H.F., ―Mobile Computing‖, Kluwer Academic Publishers, 1996.

109

3. Carlos de Morais Cordeiro and Dharma Prakash Agrawal, ―Ad Hoc & Sensor

Networks:Theory and Applications‖, World Scientific, 2007.

4. Toh C. K., ―Ad Hoc Mobile Wireless Networks Protocols and Systems‖, Prentice Hall,

PTR, 2001.

First Year M. Tech. Electronics (Digital System) Engineering

SEM-II

Department of Civil Engineering

Institute Elective

IET5061: Value Engineering

Teaching Scheme Evaluation Scheme

L T P Credits Scheme

Theory (Marks %) Practical (Marks %)

Max. Min. for Passing Max. Min. for Passing

3 0 -- 3

ISE 20

40

-- --

MSE 30 -- --

ESE 50 40 -- --

COURSE DESCRIPTION:

Value engineering is a structured & systematic problem solving technique or methodology. It is a

process that generates alternative solutions using a combination of creative & analytical

techniques. It is a multidisciplinary technique & can be successfully applied to any economic

activity in trade, industry, commerce, education, transport, civic, administration, healthcare,

hospitals, police work, government etc.

110

PREREQUISITES:

Basic knowledge of all courses in the discipline.

COURSE OBJECTIVES:

To introduce the fundamentals of value engineering.

To know about value engineering job plan.

To know about managing the value engineering study.

To understand life cycle cost theory.

To demonstrate value engineering applications on projects.

COURSE OUTCOMES:

On completion of this course the student will be able to:

Explain about concept and fundamentals of value engineering.

Compose value engineering job plan.

Construct FAST diagram.

Decide cost model of a project.

Analyse life cycle cost.

Carry out value engineering study of engineering projects.

UNIT 1: INTRODUCTION 4 hrs

Concept, theory, fundamentals of VE and types of values.

UNIT 2: VALUE ENGINEERING JOB PLAN 10hrs

Information phase, Functional analysis phase, Creative phase, Evaluation phase, Development

phase and Presentation/recommendation phase.

UNIT 3: COST MODELING 4 hrs

Cost validation, Cost estimating and Cost models.

111

UNIT 4: LIFE-CYCLE COST 4 hrs

Definition, purpose, types and Life-cycle cost analysis.

UNIT 5: MANAGING VALUE ENGINEERING STUDY 8 hrs

Project selection, Team selection, VE job plan, VE change proposal and audit

.UNIT 6 : VALUE ENGINEERING CASES 6 hrs

Discussion of various applications of neural systems and algorithms.

REFERENCES

1. Iyer S.S. ―Value Engineering‖ New age international (p.) LTD. Publishers New Delhi

1996.

2. Lawrence D Miles ―The techniques of value analysis & engineering‖3rd edition

published by Eleanor Miles Walker.

3. Mukhopadhyaya A.K. ―Value Engineering Concepts. Techniques & applications‖

Response books, a division of sage publications New Delhi 2004.

4. Zimmerman L.W. & Hart G.D, ―Value Engineering a practical approach for owners,

designers & contractors‖ C.B.S. Publishers & distributors, Delhi 1988.

First Year M. Tech. Electronics (Digital System) Engineering

SEM-II

Department of Civil Engineering

Institute Elective

IET5081 - Industrial Safety and Risk Assessment

112

Teaching Scheme Evaluation Scheme

L T P Credits Scheme

Theory (Marks %) Practical (Marks %)

Max. Min. for Passing Max. Min. for Passing

3 0 -- 3

ISE 20

40

-- --

MSE 30 -- --

ESE 50 40 -- --

COURSE DESCRIPTION:-

The course ‗Industrial Safety and Risk Assessment (ISRA)‘ is offered as an open Elective for Post-

graduate programme (M. Tech) at semester II and is useful in all the streams of engineering. It deals with

rational development of safety in engineering industries, hazard analysis and risk assessment. The course

includes the application of mathematical tool namely Artificial Neural Network (ANN) for predicting the

risks and its assessment. It also focuses on design of safety management systems and legal aspects of

safety and hazard control rules in engineering industries.

PRE-REQUISITE

The students should have basic knowledge of various safety aspects involved in their area of field.

After successful completion of this course student will be able to:-

1. Analyze the root causes and effects of accidents in engineering industries.

2. Explain various methods of analyzing the risks involved in engineering industries

3. Assess the effects of industrial hygiene and occupational health

4. Predict the risks involved in engineering industries by applying mathematical tool such

as ANN

5. Design Safety management system for engineering industries

6. Create awareness about legal aspects of safety in engineering industries by

113

UNIT 1: SAFETY IN ENGINEERING INDUSTRIES

Hazards in Industries, hazardous materials, hazard analysis, Fire hazards, hazards

and risks, hazard assessment, methods of hazard analysis

06

UNIT 2: ACCIDENTS IN ENGINEERING INDUSTRIES

Sources and types of accidents, Root causes and effects of accidents, Technical analysis

of accidents, guidelines for good safety practices, accident preventive techniques.

06

UNIT 3: RISK ASSESSMENT

Scope of risk assessment, probabilistic risk analysis (PRA), risk perception and

acceptability, risk matrix, methods of risk assessment- Fault tree Analysis, event tree

analysis etc, Diograph and other approaches

06

UNIT 4: OCCUPATIONAL HEALTH AND INDUSTRIAL HYGIENE

Objectives, Chronic and Acute Effects, Various Limits of Exposure- Lethal Dose 50,

Lethal concentration 50, Threshold Limit Value etc. Effects of Various Physical,

Chemical and Biological Hazards Present in Industries on Human Health.

Safety management plan.

06

UNIT 5 : APPLICATION OF MATHEMATICAL TOOLS FOR RISK

ASSESSMENT

Introduction to Artificial Neural network (ANN) and its application for risk

assessment. Remote sensing and its application for risk assessment

06

UNIT 6 : LEGAL ASPECTS OF SAFETY IN ENGINEERING INDUSTRIES

Industrial safety acts, Major accident hazard control rules, On site and Off site

Emergency Management Plan, Design of Safety Management system.

06

TUTORIALS:

One hour per week per batch tutorial is to be utilized for problem solving /

assignment /industrial visits to ensure that students have properly learnt the topics

Covered in the lectures. The teacher may add any other academic activities to

114

Evaluate in semester performance of students

REFERENCES:

1. David L. Goetsch Occupational Safety and health, Prentice Hall, 2002 –184

2. EDEL Engineering consultancy Pvt. Ltd. Safety manual

3. Lee Harrison, Environmental Health and Safety Auditing Handbook , McGraw-Hill, 1999.

4. K Park Banarsidas, Textbook of Preventive and Social medicine, Bhanot Publishers

5. Dr A H Hommadi, Industrial and Occupation safety

6. K T Kulkarni, Introduction to industrial safety

7. Timothy Ross, Neural network and fuzzy logic in engineering Neural network and fuzzy

logic in engineering George J Klir, Fussy sets and systems

First Year M. Tech. Electronics (Digital System) Engineering

SEM-II

Department of Electrical Engineering

Institute Elective

IET5101: Industrial Automation and Control

Teaching Scheme Evaluation Scheme

L T P Credits Scheme

Theory (Marks %) Practical (Marks %)

Max. Min. for Passing Max. Min. for Passing

3 0 -- 3

ISE 20

40

-- --

MSE 30 -- --

ESE 50 40 -- --

115

COURSE DESCRIPTION:

The main objective of this course is to make the learners familiarized with the conceptual as well

as practical knowledge of the Industrial Automation & latest technologies being used to achieve

real time industrial automation. The idea of designing this course is to inculcate the basic

fundamentals of automation in the mechanical, automobile, electronics and electrical students

and provide them with a platform to work on dissertation work.

The most used guiding force behind an automated industrial plant is a ―Programmable Logic

Controller‖ generally known as a PLC. A plc based automated system is an example of a real

time system. PLCs along with certain other necessary components like sensors, motors,

actuators, valves, conveyors, boilers, SCADA systems, computers & many more, makes a real

automated manufacturing plant. Unlike Micro controller based system PLC is designed for

multiple inputs and output applications.

The course provides comprehensive coverage of Programmable Logic Controller (PLC)

components, industrial detection sensors and their interfacing, fundamental programming

language and advanced programming techniques used in industrial automated systems, SCADA

system and HMI.

PREREQUISITE: Number system, basic gates, transistor working, electrical wiring (dc supply,

ac supply), basic computer knowledge.

COURSE LEARNING OUTCOMES:

After completion of this course students will be able to:

1. List major components for PLC based automation system of given applications.

2. Identify & Use suitable sensors and actuators for the given application.

3. Apply standard programming languages and perform trouble shooting of system.

4. Develop relay logic ladder diagram for the given application.

5. Develop monitoring system for the given real time applications using SCADA/HMI.

116

UNIT 1: AUTOMATION OVERVIEW 6hrs

Brief description of a control system, need of Industrial automation, architecture of Industrial

automation, application of industrial automation, Introduction to Programmable Controllers.

Case study: relay logic based control system design

UNIT 2: COMPONENTS AND SYSTEMS 6Hrs

Basic components of automation, Processors, the Power Supply, and Programming Devices;

The Memory System and I/O Interaction, The Discrete Input/ Output System, The Analog

Input/ Output System, Special Function I/O and Serial Communication Interfacing.

UNIT 3: PLC PROGRAMMING 6hrs

Programming Languages, the IEC 1131 Standard and Programming Language, System

Programming and Implementation, PLC System Documentation.

UNIT 4: LADDER LOGIC PROGRAMMING AND

APPLICATIONS

6hrs

Mathematical, logical, special function and branch instructions, Timer, Counter, Process

Controllers and Loop Tuning. Case studies.

UNIT 5: INSTALLATION & ADVANCED PLC TOPICS 6hrs

PLC Start-Up and Maintenance, System Selection Guidelines, PLC Systems, Fuzzy Logic.

Case study on PLC system

UNIT 6: SCADA AND HMI 6hrs

SCADA System Introduction, creating new project, GUI design, Tag substitutions, Alarms &

event, application of scripts, communication with PLC, HMI Introduction, HMI Design,

Design cases, practice problems. Case study on SCADA/HMI based PLC system

117

REFERENCES:

1. Frank D. Petruzella, ―Programmable Logic Controllers‖, Fourth edition, Mc Graw Hill

2. W. Bolton, ―Programmable Logic Controllers‖, Fifth edition, Newnes publications

3. John R. Hackworth and Frederick D. Hackworth Jr, ―Programmable Logic Controllers

Programming, Methods and Applications‖, PEARSON Publication, 2011.

4. J. W. Webb & R. A. Reis, ―Programmable Logic Controllers, PHI company- Fifth

Edition, 2005.

First Year M. Tech. Electronics (Digital System) Engineering

SEM-II

Department of Electronics & Telecommunication Engineering

Institute Elective

IET5121: Sensor Technology

Teaching Scheme Evaluation Scheme

L T P Credits Scheme

Theory

(Marks %)

Practical

(Marks %)

Max Min for Passing Max Min for

Passing

3 0 -- 3

ISE 20

40

-- --

MSE 30 -- --

ESE 50 40 -- --

118

COURSE DESCRIPTION:

The convergence of the Internet, Communications and Information technologies, coupled with

recent engineering advances, is paving the way for a new generation of inexpensive sensors and

transducers. This course includes applications of sensors in different multi-disciplinary areas. It

also includes Internet of Things which is a way to connect loosely defined smart objects and

enable them to interact with other objects, environment.

COURSE OUTCOMES:

After successful completion of course students will be able to

1. Identify the use of sensors in different multi-disciplinary areas.

2. Design an application using suitable sensor.

3. Describe Internet of Things for smart applications.

PREREQUISITES:

Basic knowledge of physics, instrumentation and communication.

UNIT I 06

SENSOR ELECTRONICS: sensor data sheets, sensor types, sensor limitations, industrial

process control loop, building blocks of a smart sensor, application considerations, sensor

characteristics, instrument selection, readout, installation, measurement issues and criteria,

sensor signal conditioning

UNIT II 06

SENSORS APPLICATIONS IN MECHANICAL INDUSTRY: displacement, location and

position sensors, strain sensors, motion sensors, pressure sensors, flow sensors-solid flow

measurement, liquid flow measurement, vibration monitoring sensors

UNIT III 06

SENSORS APPLICATIONS IN AUTOMOBILE INDUSTRY: air–fuel ratio meter,

crankshaft position sensor, engine coolant temperature sensor, hall effect sensor, map sensor,

119

mass flow sensor, oxygen sensor, parking sensors, speedometer, vehicle speed sensor, throttle

position sensor, tire-pressure monitoring sensor, smarter sensors for smart vehicles

UNIT IV 06

DATA ACQUISITION SYSTEMS: objective of DAS, signal conditioning of the inputs, single

channel and multi channel data acquisition systems, data loggers, data transmission,

microcontroller based system design & peripheral interfaces

UNIT V 06

INTERNET OF THINGS: introduction, basics of IoT, IoT building blocks, web architecture

for an IoT, three categories of IoT users, IoT levels, applications of IoT – smart city, smart

vehicle, automotive industry, telecommunication industry, medical health care, process industry,

retail logistics and supply chain management, environment monitoring, smart tourism.

UNIT VI 06

RECENT TRENDS IN SENSOR TECHNOLOGY: research papers and articles in sensor and

transducer technology from IEEE, IET, Elsevier etc.

REFERENCES

1. Sensor Technology Handbook, Jon S. Wilson, 1st Edition, Elsevier, 2004

2. Process Control Instrumentation Technology, Curtis D. Johnson, 8th

Edition, PHI Learning

Pvt. Ltd., 2006

3. Electronics Instruments, Kalsi, 3rd

Edition, Tata McGraw-Hill Education, 2010

4. Internet of Things-converging technologies for smart environments and integrated

ecosystems, Ovidiu Vermesan, Peter Friess, River Publishers series in Communications,

2013

5. Research papers from IEEE, IET, Science Direct

6. http://en.wikipedia.org/wiki/List_of_sensors

7. Sensors Handbook, Sabric Soloman, Mc Graw Hill, 2nd

Ed., 2010

120

First Year M. Tech. Electronics (Digital System) Engineering

SEM-II

Department of Electronics & Telecommunication Engineering

Institute Elective

IET5141: Mechatronics

COURSE DESCRIPTION:

This course is designed to provide a comprehensive coverage of many areas of engineering

disciplines that come together to form the field of Mechatronics. The experience is created by

using sensors, actuators, electronic circuits, data acquisition system and real time interfacing

with design, simulation and modeling. The course ends with case studies.

COURSE OUTCOMES:

After successful completion of this course students should be able to;

1. Study of sensors, actuators, system modeling and design with real-time controller

interfacing.

2. Design step-by-step mechatronics system design.

Teaching Scheme Evaluation Scheme

L T P Credits Scheme

Theory

(Marks %)

Practical

(Marks %)

Max Min for Passing Max Min for

Passing

3 0 -- 3

ISE 20

40

-- --

MSE 30 -- --

ESE 50 40 -- --

121

3. Analyze the system for different input and different output.

PREREQUISITE:

Basic knowledge of Engineering.

UNIT I 06

DATA ACQUISITION SYSTEM: Significance of Data Acquisition System, Generalized Data

Acquisition System, Signal conditioning elements used in Data Acquisition Systems, Single

channel Data Acquisition System, Multichannel Data Acquisition System, Data Logger, µp/µC

based Data Acquisition System, Elements of Data Acquisition and control System.

UNIT II 06

MECHATRONICS SYSTEM DESIGN, MODELING AND SIMULATION OF

PHYSICAL SYSTEMS: What Is Mechatronics, Integrated Design Issues in Mechatronics,

the Mechatronics Design Process, Mechatronics Key Elements, Simulation and Block

Diagrams, Analogies and Impedance Diagrams, Electrical Systems, Fluid Systems,

Electromechanical Coupling.

UNIT III 06

SENSORS AND TRANSDUCERS: Introduction to Sensors and Transducer, Sensor

Classification, Parameter Measurement in Sensors and Transducers, Smart sensors,

Performance Terminology, Sensors for Motion and Position Measurement, Force, Torque

a nd Tactile Sensors, Flow sensors, Temperature sensors, Ultrasonic sensors, Range sensors,

Fiber optic Liquid level sensor, Active Vibration Control using Magnetostrictive Transducers,

Signal conditioning.

UNIT IV 06

ROBOTICS: Introduction, Types of Robotics, Types of Robot Controls, Robot Drive Systems,

Robot End Effectors, Selection Parameter of a Robot, and Selection Parameter for Application

Area where a Robot can be Used, Applications of Robots.

UNIT V 06

122

ACTUATING DEVICES AND ADVANCED APPLICATIONS IN MECHATRONICS:

DC motor, PM Stepper Motor, Fluid Power Actuation, Fluid Power Design Elements,

Piezoelectric Actuators, Sensors for Condition Monitoring, Mechatronics Control in Automated

Manufacturing, Artificial Intelligence in Mechatronics, Fuzzy Logic Applications in

Mechatronics, Micro sensors in Mechatronics.

UNIT VI 06

CASE STUDIES: Interfacing with microcontroller, Rotary Optical encoder, PH control system

and De-lcing temperature control system, Computer based mechatronics case study, etc.

REFERENCE BOOKS:

1. ―Mechatronics System Design‖, Devdas Shetty and Richard A. Kolk, Cengage

Learning Publication, second edition, 2011.

2. ―Introduction to mechatronics & measurement systems‖, by Alciatore & Histand,

McGraw Hill Publications, second edition, 2002.

3. ―Mechatronics – Electronic control system in mechanical engineering‖ by Bolton,

Addison, Pearson Education Asia, 1999.

4. ―Mechatronics‖, by M.D. Singh and J.G. Joshi, PHI publication, 2006.

First Year M. Tech. Electronics (Digital System) Engineering

SEM-II

Department of Mechanical Engineering

Institute Elective

IET5161: Computational Fluid Dynamics

123

Teaching Scheme Evaluation Scheme

L T P Credits Scheme

Theory (Marks %) Practical (Marks %)

Max Min for Passing Max Min for

Passing

3 0 -- 3

ISE 20

40

-- --

MSE 30 -- --

ESE 50 40 -- --

COURSE DESCRIPTION:-

Computational Fluid Dynamics (CFD) gain knowledge of use of modern CFD software to build,

solves, and visualizes fluid-flow models. The course is aimed to give a basic understanding to

the discretisation of equations of mass, momentum and energy. The course covers numerical

methods for physical simulations of gas and liquid flows. The course is based on the finite

volume method and the finite element method with emphasis on fluid dynamics and includes

various computational problems in fluid dynamics such as boundary conditions and meshing.

PRE- REQUISITES: -

Thermodynamics, heat transfer and Fluid Mechanics

COURSE OUTCOMES:

At the end of the course the students will be able to: -

1. Solve the basic governing equations and significance of these equations in the field of

fluid flow and heat transfer

2. Implement different techniques and solution procedure using different discretization

schemes for real field complex problem

3. Modify the available schemes and methods for multi-physics problem

4. Develop suitable simple numerical model.

124

UNIT 1: BASICS OF CFD

Computational approach to Fluid Dynamics and its comparison with experimental and

analytical methods, Basics of PDE: Elliptic, Parabolic and Hyperbolic Equations.

6

UNIT 2: GOVERNING EQUATIONS

Review of Navier-Stokes Equation and simplified forms, Solution Methodology: FDM

and FVM with special emphasis on FVM, Stability, Convergence and Accuracy.

6

UNIT 3: FINITE VOLUME METHOD:

Domain discretization, types of mesh and quality of mesh, SIMPLE, pressure velocity

coupling, Checkerboard pressure field and staggered grid approach, Problems on

discretization

6

UNIT 4: GEOMETRY MODELING AND GRID GENERATION:

Practical aspects of computational modeling of flow domains, Grid Generation, Types

of mesh and selection criteria, Mesh quality, Key parameters and their importance.

Problems on discretization and modeling of simple equations

6

UNIT 5: METHODOLOGY OF CFDHT:

Objectives and importance of CFDHT, CFDHT for Diffusion Equation, Convection

Equation and Convection-Diffusion Equation. Simple numerical code using MATLAB

or C++ or Fluent.

6

UNIT 6: SOLUTION OF N-S EQUATIONS FOR INCOMPRESSIBLE FLOWS:

Semi-Explicit and Semi-Implicit Algorithms for Staggered Grid System and Non

Staggered Grid System of N-S Equations for Incompressible Flows

6

REFERENCE BOOKS: -

1. Anderson, J.D.(Jr), Computational Fluid Dynamics, McGraw-Hill Book Company,

1995.

2. Hoffman, K.A., and Chiang, S.T., Computational Fluid Dynamics, Vol. I, II and III,

Engineering Education System, Kansas, USA, 2000.

3. Chung, T.J., Computational Fluid Dynamics, Cambridge University Press, 2003.

125

4. Anderson, D.A., Tannehill, J.C., and Pletcher, R.H., Computational Fluid Mechanics

and Heat Transfer, McGraw Hill Book Company, 2002.

5. Versteeg, H.K. and Malalasekara, W., an Introduction to Computational Fluid

Dynamics, Pearson Education, 2010.

6. Numerical Methods in Fluid Flow & Heat Transfer by Dr. SuhasPatankar.

7. Computational Methods for Fluid Dynamics by Ferziger and Peric, Springer

Publication.

8. An Introduction to Computational Fluid Mechanics by Chuen-Yen Chow, Wiley

Publication.

9. Computational Fluid Flow & Heat Transfer by Murlidhar and Sundarrajan, Narosa

Publication.

First Year M. Tech. Electronics

SEM-II

Department of Mechanical Engineering

Institute Elective

IET5181: Quality and Reliability Engineering

eaching Scheme Evaluation Scheme

L T P Credits Scheme

Theory

(Marks %)

Practical

(Marks %)

Max Min for Passing Max Min for Passing

3 0 -- 3

ISE 20

40

-- --

MSE 30 -- --

ESE 50 40 -- --

126

COURSE DESCRIPTION:-

Quality and reliability engineering provides the theoretical and practical methodologies to improve

the capability of systems to perform their designated functionalities, to predict the probability of

their functioning without failures in certain environments for desired periods, to assess their

maintainability, availability and safety based on sampled data, and to make decisions on corrective

and mitigation actions.

PREREQUISITES: -

Knowledge of basic statistical process and terms and their calculations.

COURSE OUTCOMES:-

After completion of this course, students will be able to,

1. Calculate failure rates, MTTF etc. including confidence limits.

2. Design a reliability experiment and fit data to a model.

3. Design a statistical manufacturing monitor or control chart with specified producer and

customer risk levels.

4. Compute test statistics such coverage, yield, test time, customer defect level from test data

Unit

No.

Detail Content Hrs.

1. QUALITY & STATISTICAL PROCESS CONTROL:

Quality – Definition – Quality Assurance – Variation in process – Factors – process

capability – control charts – variables X, R and X, - Attributes P, C and U-Chart

tolerance design. Establishing and interpreting control charts – charts for variables

– Quality rating– Short run SPC.

6

2. ACCEPTANCE SAMPLING:

Lot by lot sampling – types – probability of acceptance in single, double, multiple

sampling plans – OC curves – Producer‘s risk and consumer‘s risk. AQL, LTPD,

6

127

AOQL, Concepts – standard sampling plans for AQL and LTPD – use of standard

sampling plans.

3. EXPERIMENTAL DESIGN AND TAGUCHI METHOD:

Fundamentals – factorial experiments – random design, Latin square design –

Taguchi method – Loss function – experiments – S/N ratio and performance

measure – Orthogonal array.

6

4. CONCEPT OF RELIABILITY:

Definition – reliability vs quality, reliability function – MTBF, MTTR, availability,

bathtub curve – time dependent failure models – distributions – normal, weibull,

lognormal – Reliability of system and models – serial, parallel and combined

configuration – Markoveanalysis, load sharing systems, standby systems, covariant

models, static models, dynamic models.

6

5. DESIGN FOR RELIABILITY AND MAINTAINABILITY:

Reliability design process, system effectiveness, economic analysis and life cycle

cost, reliability allocation, design methods, parts and material selection, derating,

stress strength and analysis, failure analysis, identification determination of causes,

assessments of effects, computation of criticality index, corrective action, system

safety – analysis of down-time – the repair time distribution, stochastic point

processes system repair time,

6

6. DESIGN FOR MAINTAINABILITY

Reliability under preventive maintenance state dependent system with repair,

MTTR – mean system down time, repair vs replacement, replacement models,

proactive, preventive, predictive maintenance maintainability and availability,

optimization techniques for system reliability with redundancy heuristic methods

applied to optimal system reliability.

6

128

REFERENCES: -

1 Amata Mitra ―Fundamentals of Quality Control and improvement‖ Pearson

Education, 2002. Bester field D.H., ―Quality Control‖ Prentice Hall, 1993.

2 Patrick D.T.O‘Connor,Practical Reliability Engineering, John-Wiley and Sons Inc, 2002

4.Charles E Ebling, An Introduction to Reliability and Maintainability Engineering, Tata-

McGraw Hill, 2000.

3 David J Smith, Reliability, Maintainability and Risk: Practical Methods for Engineers,

Butterworth 2002.

4 Dillon, Engineering Maintainability – How to design for reliability and easy maintenance,

PHI, 2008

First Year M. Tech. Electronics

SEM-II

Department of Mechanical Engineering

Institute Elective

IET5201: Computational Techniques in Engineering

Teaching Scheme Evaluation Scheme

L T P Credits Scheme

Theory

(Marks %)

Practical

(Marks %)

Max Min for Passing Max Min for Passing

3 0 -- 3

ISE 20

40

-- --

MSE 30 -- --

ESE 50 40 -- --

129

UNIT 1: MATHEMATICAL MODELLING

Mathematical Modelling and Engineering Problem Solving, Conservation

laws and engineering, MATLAB Programming software, Errors

6 hrs

UNIT 2: NON-LINEAR EQUATIONS

Newton-Raphson Method, Bracketing Methods, Systems of Nonlinear

Equations, Roots of Polynomial Engineering Applications, Ideal and

nonideal gas laws, Open channel flow, Design of electric circuit, Vibration

Analysis

6 hrs

UNIT 3: LINEAR SIMULTANEOUS EQUATIONS AND MATRICES

Various methods for solving Linear Simultaneous Equations,Numerical

Methods for various matrix operations. Special matrices, Gauss Seidel,

Linear algebraic equations with libraries and packages.

6 hrs

UNIT 4: NUMERICAL INTEGRATION AND DIFFERENTIATION

Numerical Differentiation and Integration, Newton-cotes integration

formulas, Integration of Equations, Numerical differentiation, Applications-

Case studies

6 hrs

UNIT 5: APPROXIMATION AND CURVE FITTING

Fourier Approximation, Fast Fourier Transform (FFT)- Time domain,

Frequency domain,Continuous Fourier series

6 hrs

UNIT 6: INITIAL VALUE & BOUNDARY VALUE PROBLEMS IN

ENGINEERING

Solution of ordinary differential equations,Partial differential equations,

Eigen value Problems, Applications and Case Studies.

6 hrs

REFERENCES

1. Numerical Methods for Engineers, Chapra Steven and Canale Raymond, Prentice Hall

130

2. Numerical Methodsin Engineering with Matlab, KiusalaasJaan, Cambridge University Press,

2005

3. Numerical Methods in Engineering with Python, KiusalaasJaan, Cambridge University Press,

2005

4. Numerical Methods for Scientists and Engineers, Richard Wesley Hamming, Dover

PubnIncorporated

5. Numerical Methods for Engineers, Gupta Santosh K, New Age International, 1995

First Year M. Tech. Electronics

SEM-II

Department of Master of Business Administration (MBA)

Institute Elective

IET5221: Management for Engineers

Teaching Scheme Evaluation Scheme

L T P Credits Scheme

Theory

(Marks %)

Practical

(Marks %)

Max Min for Passing Max Min for Passing

3 0 -- 3

ISE 20

40

-- --

MSE 30 -- --

ESE 50 40 -- --

CORSE DESCRIPTION:-

Successful researchers in engineering and the life and physical sciences face daily challenges

managing and leading teams, communicating with business-oriented colleagues, and surmounting

131

the hurdles associated with the commercialization of research. But engineers in these fields are

seldom exposed to these situations before entering academia or industry. To address this gap, The

course is designed to provide them with the necessary business and leadership skills.

PREREQUISITES: - None

COURSE OUTCOMES:-

After completion of this course, students will be able to,

1. Lead complex engineering and capital intensive organization with globally dispersed

organization structures

2. Solve industry related problems by applying their knowledge of business, science and

engineering.

3. Develop and lead effective team and projects

4. Develop and commercialize innovative products.

Unit

No.

Detail Content Hrs

1 STRATEGIC MANAGEMENT :

Meaning and importance of Strategic Management , Understanding new

perspectives on strategic management Value chain analysis

6

2 CHANGE MANAGEMENT :

Introduction and importance, Role of team, force field analysis, Adjustment to

change and organizing for growth. Prerequisites and consequence of change. The

change Dynamics , leading change: why transformational efforts fail

6

3 ADVANCED MARKETING MANAGEMENT

New product development , trademark and patent , technology transfer ,

commercialization of research

6

4 FINANCIAL MANAGEMENT :

Break even analysis, leverages, boot strapping, funding (angel and VC) and

132

understanding profit. 6

5 CUSTOMER RELATIONSHIP MANAGEMENT: CRM is about Value,

Customer Lifetime Value, cross selling, buying behavior , up and down scaling

and CRM

6

6 BUSINESS PLAN :

Introduction, important components of business plan, market and competition

analysis, Designing the plan, Case studies.

6

REFERENCES:

1. John P. Kotter, W. Chan Kim, Renee A. Mauborgne Patrick , Change Management ,Harvard

Business Review ,2011

2. Rao A. S. Management of Technology Change– Global Business Press

Narayanan V.K., ―Managing Technology and Innovation for competitive Advantage. Pearson: 2001

3. Govindarajan and Chris Trimble, 10 Rules for Strategic Innovations, HBS, 2007.

4. Strategic Management and Business Policy , Thomas Wheelon and David Hunger Prentice

Hall; 14 edition ,2014

5. Lawrence G. Hrebiniak , Making strategy work , Wharton, 2005 ( Indian Reprint)

6. Value Engineering: A Systematic Approach Arthur E. Mudge - - Mc GrawHill

7. Accelerate: Building Strategic Agility for a Faster-Moving World John P. Kotter,Harvard

Business Publishing 2014.

First Year M. Tech. Electronics

SEM-II

Department of Master of Business Administration (MBA)

Institute Elective

IET5241: Data Analytics

133

Teaching Scheme Evaluation Scheme

L T P Credits Scheme

Theory

(Marks %)

Practical

(Marks %)

Max Min for Passing Max Min for Passing

3 0 -- 3

ISE 20

40

-- --

MSE 30 -- --

ESE 50 40 -- --

COURSE DESCRIPTION:-

Data analytics is the science of analyzing the data, generating insights, and making predictions of

future events. Data analytics easily finds applications in experimental data analysis, financial

modeling, banking industry, market research, operations management, climate modeling, health

care management, traffic monitoring, and so on. This course aims to provide an overview of data

mining and statistical techniques that arise in real data analytic applications.

PREREQUISITES: -

Knowledge of basic statistical terms

COURSE OUTCOMES:-

After completion of this course, students will be able to,

Unit

No.

Detail Content Hrs.

1 INTRODUCTION TO DATA ANALYTICS :

Meaning and importance of Data Analytics for engineers , Introduction to data mining

modeling ,Exploring the data sets, preparation of own datasets , Various types of data

analytics models.

6

134

2 INTRODUCTION TO DATA ANALYTICS SOFTWARES :

Basic introduction to R - an open source software , SAP , Oracle, SPSS

6

3 SPSS- HANDLING AND APPLICATIONS

Handling SPSS, Importing and exporting files, Handling datasets on SPSS, Applications

of SPSS in engineering fields.

6

4 PREDICTIVE MODELING

Logistic regression model, applications of logistic regression models; Decision trees

models: process of building decision tree, models, model selection.

6

5 NEURAL NETWORK MODELS

The pros and cons of neural networks, model construction – architecture selection;

network training;

6

6 HYPOTHESIS TESTING :

Hypothesis - formulation and types of error, Parametric and non - parametric tests for

testing of hypothesis specifically chi-square , ANOVA , Mann- whitney , t-test

REFERENCES: -

1. Andy Field, Research Methodology , Harvard Business r\Press , 2014

6

First Year M. Tech. Electronics

SEM-II

Department of Mechanical Engineering

Institute Elective

IET5261: Innovation Management

135

Teaching Scheme Evaluation Scheme

L T P Credits Scheme

Theory

(Marks %)

Practical

(Marks %)

Max Min for Passing Max Min for Passing

3 0 -- 3

ISE 20

40

-- --

MSE 30 -- --

ESE 50 40 -- --

COURSE DESCRIPTION:

Economies can only survive in the long term if they have innovative manufacturing and service

industries. Increasing the innovative strength of businesses is therefore vitally important for

society. Innovation is also essential for companies and their competitive position. Innovation

strengthens the loyalty of existing customers and helps to win new customers. The Innovation

Management discipline studies the management of innovation processes and develops theories,

tools and techniques to make businesses more innovative. Key aspects of this discipline are

knowledge management, strategic alliances, new product development, close supplier

partnerships, marketing management, quality and reliability engineering, and technology

management. The object of the studies is the new product development process and the processes

to cooperate with other organizations and share knowledge with them. The aim is to analyze,

understand and improve these processes.

COURSE LEARNING OUTCOMES:

1. Recognise the importance of Innovation and the need to view innovation as a

management process and appreciate the complex nature of the management of innovation

within organisations.

136

2. Identify the factors organisations have to manage to achieve success in innovation and

recognise the relationship between the activities performed and the organisational

environment in promoting innovation.

3. Understand organisational knowledge management and the importance of patents/IPR in

innovation management. Identify the opportunities for potential Patents, Copyright,

trademark.

4. Understand the process of R&D management in modern industries. Recognise the factors

influencing open technology & technology transfer, strategic alliances and networks.

PREREQUISITES:

UG degree with knowledge of Industrial Organisational Management, Engineering Management,

Operations management, Product development process, Quality and Reliability Engineering etc.

Unit 1:Innovation and the Market 6 hrs

Importance of Innovation, Models of innovation, Innovation as a management

process, Innovation and the market, diffusion theories.

Unit 2 Management: Innovation and operations 6 hrs

Operations management, process design and innovation, triggers for innovation,

operations and technology concepts

Unit 3: Managing Intellectual property 6 hrs

Introduction to IPR, Patents – laws, rules and regulations ,filing procedure,

infringement, trademark, copyright, use of patents in innovation management

Unit 4: Managing organizational knowledge 6 hrs

Technology trajectories, knowledge base of an organisation, learning organisation,

degree of innovativeness, strategic alliances, forms of strategic alliances, motives risk

and limitations, use of alliances in implementing technology transfer.

Unit 5: R&D Management 6 hrs

137

R&D management and industrial context, Classifying R&D, Integration of R&D, link

with business strategy, strategic pressures, R&D fund management, managing R&D

projects, acquisition of external technology, effective R&D management, link with

product innovation process, evaluating R&D projects.

Unit 6: Open Innovation and technologyTransfer 6 hrs

Open innovation – technology, information and knowledge transfer, models of

technology transfer, limitations and barriers, inward technology transfer, managing

inward transfer of technology, Technology transfer and organizational learning.

REFERENCES

1. Paul Trott – Innovation management and new product development, Pearson.

2. Tidd, Joe and Bessant, John - Managing Innovation: Integrating Technological, Market

and Organizational Change, Wiley publication, 2009.

3. Clark, Charles H. - Idea Management: How to Motivate Creativity and Innovation. New

York: AMACOM.

138

Department of Electronics and

Telecommunication Engineering

Second Year M. Tech Electronics

(Digital System)

Engineering

Syllabus

2016-17

139

K. E. Society’s

Rajarambapu Institute of Technology,

Rajaramnagar, Islampur

(An Autonomous Institute Affiliated to Shivaji University, Kolhapur)

M. Tech. Electronics (Digital System) Engineering

Syllabus Structure

Semester III

Course

Code Course

Teaching Scheme Evaluation Scheme

L T P Credits Scheme

Credits

Practical

(Marks)

Max Min %

for

Passing

ECS6011 Field Training -- -- -- 2 ISE 2 100 50

ECS6031 Dissertation Phase-I -- -- -- 4 ISE 4 100 50

ECS6051

Dissertation Phase-II -- -- 5 10

ISE 4 100 50

ECS6071 ESE 6 100 50

Total Credits: 16, Total Contact Hours/Week: 05

140

M. Tech. Electronics

Syllabus Structure

Semester IV

Course

Code Course

Teaching Scheme Evaluation Scheme

L T P Credits Scheme

Credits

Practical

(Marks)

Max Min %

for

Passing

ECS6021 Dissertation Phase-III -- -- -- 08 ISE 8 100 50

ECS6041

Dissertation Phase-IV -- -- 5 10

ISE 4 100 50

ECS6061 ESE 6 100 50

Total Credits: 18, Total Contact Hours/Week: 05

ISE : In Semester Evaluation.

ESE : End Semester Examination

141

Post Graduate Dissertation Guidelines

Preamble These Guidelines are intended to give both students and supervisor a set of procedures and

expectations that will make the Dissertation evaluation easier, more predictable, and more

successful. These Guidelines should be interpreted as the minimum requirements for the award

of a degree. The DPGC Committee assigned for various programmers may add requirements or

guidelines as deemed fit.

Dissertation Work The Dissertation Work for M.Tech is divided into four phases i.e. Dissertation Phase-I,

Dissertation Phase-II, Dissertation Phase-III and Dissertation Phase-IV. Dissertation Phase-I and

Dissertation Phase-II are to be undertaken during a semester-III and Dissertation Phase-III and

Dissertation Phase-IV, which is generally a continuation of Dissertation Phase-I and II ,are to be

undertaken during a semester- IV.

General Suggestions and Expectations

A dissertation is a scientific study or investigation meant to address a specific problem and

aimed at generating an applicable solution. It provides the opportunity for students to

demonstrate independence and originality of the work, to plan and implement dissertation work

methodically and to put into practice some of the techniques‘ student have been learned

throughout the course.

It is expected that student should develop a solution for a problem, which does not already exist,

or enhance some existing application or method to improve its functionality, performance, etc.

Interdisciplinary Dissertation proposals and innovative dissertations are encouraged and more

appreciable. A straightforward implementation of dissertation work is acceptable, but it is good

to consider dissertation deliverable as a fully-functioning 'product' or publication in a reputed

journal.

142

M. Tech. Electronics (Digital System) Engineering

SEM-III

Course

Code Course

Teaching Scheme Evaluation Scheme

L T P Credits Scheme

Credits

Practical

(Marks)

Max Min %

for

Passing

EDS6011 Field Training -- -- -- 2 ISE 2 100 50

Field Training

In the field training work, student is expected to get training in the industry, related to subject

specialization for duration of 15 days (minimum) for at least 6 hours per day. Student should

write a report on the field training and submit to department for ISE evaluation at the beginning

of third semester. Student should include the certificate from the company regarding satisfactory

completion of the field training.

M. Tech. Electronics (Digital System) Engineering

SEM-III

Course

Code Course

Teaching Scheme Evaluation Scheme

L T P Credits Scheme

Credits

Practical

(Marks)

Max Min %

for

Passing

EDS6031 Dissertation Phase-I -- -- -- 4 ISE 4 100 50

143

Dissertation Phase-I

It consists of Synopsis Preparation and Synopsis approval by DPGC committee

Synopsis Preparation

Postgraduate student should decide on the dissertation topic in consultation with its

supervisor and come out with a synopsis of dissertation work, in July/August of an academic

year. The Synopsis shall consist of three chapters - Introduction, Literature Review and

Methodology with expected deliverables.

It is expected that student should have in-depth understanding of the selected problem,

knowledge of probable solutions to the same problem and expected outcomes from the

dissertation work.

The synopsis shall consist of following points

Title

Introduction

Literature Survey

Objectives

Methodology

Activity chart

References

The title should be brief, accurate, descriptive, and comprehensive and clearly indicate the

subject for the investigation.

The introduction part should include

1. Area of the work

2. Importance of the work

Literature review should

1. Examine the most current studies on the topic and presenting the significant aspects of

these studies.

2. Compare different authors‘ views about the issue

144

3. Summarize the literature in terms of a knowledge gap identification e.g. performance

improvement of the existing system, functionality improvement of the existing, proposing

an entirely new approach, etc.

It should be followed by the Problem statement formulated based on identified gap and

objectives of the study

Methodology shall include information such as techniques, sample size, target populations,

equipments, data analysis, etc. and explain why proposed methodology is most suitable to solve

the undertaken problem.

It should be followed by activity chart mentioning probable duration for completion of various

activities to be undertaken during dissertation work and appropriate list of references. The

references should be from reputed journals such IEEE, Science direct, Elsevier etc.

Synopsis approval and evaluation by DPGC Committee

The student should submit the synopsis duly signed by supervisor in the prescribed format to the

department office. The DPGC committee is advised to conduct the Synopsis Presentation for the

students of the program within the stipulated period and give approval to the synopsis with the

evaluation score. The committee is advised to find the enough complexity in the dissertation

work, and all committee members should remain present at the time of the presentation.

The objective of the presentation is to find quality of work undertaken by the student, student‘s

understanding about basic concepts required to carry out the work, scope of the work ,

correctness of the methodology, consistency of proposed work with dissertations works of other

students and student‘s ability to communicate his or her ideas and work. The committee can

suggest modifications in the synopsis if it does not fulfill above-mentioned requirements. The

student should prepare a modified synopsis by incorporating suggestions given by members and

give presentation again.

The supervisor must ensure that student have incorporated all suggestions.

145

M. Tech. Electronics (Digital System) Engineering

SEM-III

Course

Code Course

Teaching Scheme Evaluation Scheme

L T P Credits Scheme

Credits

Practical

(Marks)

Max Min %

for

Passing

EDS6051 Dissertation Phase-II -- -- 5 10 ISE 4 100 50

EDS6071 Dissertation Phase-II -- -- 5 10 ESE 6 100 50

Dissertation Phase-II

After synopsis approval, it is expected that student should start working on the selected problem

as per activity chart given in the synopsis. It is expected that at least 40% dissertation work

should be completed by a student in this phase.

Evaluation of Dissertation Phase-II

Evaluation (ISE) of Dissertation Phase-II shall be carried before the end of the semester-III and

shall be jointly evaluated by Supervisor and Internal-examiner appointed by DPGC committee.

The student should give presentation / demonstration of the work done. The examiners shall

look at student‘s progress and quality of the work done. The suggestions shall be given to the

student, if required. The student should keep a record of these suggestions and incorporate them

in his or her work. The supervisor should ensure that suggestions given are incorporated by the

student.

The End –semester examination (ESE) of Dissertation Phase-II shall be carried out by

Controller-of-Examinations after the end of Semester-III. The student should give presentation

and/or demonstration of completed work in front of supervisor and external examiner appointed

by COE.

146

M. Tech. Electronics (Digital System) Engineering

SEM-IV

Course

Code Course

Teaching Scheme Evaluation Scheme

L T P Credits Scheme

Credits

Practical

(Marks)

Max Min %

for

Passing

EDS6021 Dissertation Phase-III -- -- -- 08 ISE 8 100 50

Dissertation Phase-III

In Dissertation Phase-III, it is expected that student should complete at least 70% of the

dissertation work and prepare a draft of the paper for publication.

Evaluation of Dissertation Phase-III

The evaluation (ISE) of Dissertation Phase-III shall be carried out in March of the academic year

by Supervisor and Internal examiner appointed by DPGC. The appointed members shall look at

student‘s progress and quality of the work done. The suggestions shall be given to the student, if

required. The student should keep a record of these suggestions and incorporate them. The

supervisor should ensure that suggestions given are incorporated by the student.

If student‘s progress is not as per expectation, the committee member shall issue a written notice

to the student about probable extension.

147

M. Tech. Electronics (Digital System) Engineering

SEM-IV

Course

Code Course

Teaching Scheme Evaluation Scheme

L T P Credits Scheme

Credits

Practical

(Marks)

Max Min %

for

Passing

EDS6041 Dissertation Phase-IV -- -- 5 10 ISE 4 100 50

EDS6061 Dissertation Phase-IV -- -- 5 10 ESE 6 100 50

Dissertation Phase-IV

In Dissertation Phase-IV, it is expected that student should complete

100% implementation of the proposed system

Simulation/ experimentation work on the proposed system

Performance evaluation of the proposed system

Comparison of the proposed system with existing systems

Writing of the conclusion

Preparation of a draft-copy of the dissertation report with Plagiarism report

Evaluation of Dissertation Phase-IV

The DPGC committee is advised to evaluate the dissertation pre-submission presentation and/or

system demonstration given by the students at the end of semester –IV within the stipulated

period and give approval/modifications to the work done by the student along with the evaluation

score.

The committee is advised to verify work completion as per the synopsis, and all committee

members should remain present for the presentation. The objective of the presentation/

demonstration is to understand techniques implemented by the student, student‘s own

148

contribution in the development process, obtained results, comparison of results with existing

systems, and deliverables of the dissertation work.

The committee can suggest modifications if it does not fulfill above-mentioned requirements in

the system/ draft copy of the report. In this case, the student should modify the system in a given

time span based on suggestions given by the members and give presentation again in front of

committee members.

The members should ensure that student has incorporated all suggestions and gives him/her

approval to submit the dissertation work for final evaluation.

Final evaluation of Dissertation work:

The final evaluation of the dissertation work shall be carried out by a three member committee,

comprising of Chairman, External Examiner and concerned supervisor. This committee should

be appointed by Controller of Examinations.

The student should give presentation and demonstration of work carried out in front of

committee members. The external examiner and supervisor should evaluate student‘s

performance based on following points

1. Justification and clarity of the problem statement and project objectives

2. Use of appropriate, applicable and justifiable methodology to solve problem undertaken

3. Reliability and validity of data collection instruments /resources used, critical data

analysis and interpretation

4. Overall system design

5. Experimental Results and their comparison with existing systems

6. Critical analysis of obtained results and their interpretation and correlation with project

deliverables

7. Scientific justification of conclusions

8. self contribution of the candidate in project development irrespective of use of

readymade hardware/software

9. Presentation skills

The chairman shall ensure smooth conduct of the examination.

149