2014ii-c08t-Sbc Pic Para Ecg

8/10/2019 2014ii-c08t-Sbc Pic Para Ecg

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Page 1

Universidad de Hunuco

Facultad de Ingeniera de Sistemas e Informtica


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Page 2

Agenda

Base del Conocimiento

Diagramas de Bode

Diseo de Filtros Analgicos

Diseo de un Electrocardiograma

Microcontrolador PIC con Labview

Motor de Inferencia

Tcnicas de Diagnstico de un ECG

Medios de Comunicacin

Prototipo de un ECG


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Page 3

Acerca del ECG-UDH


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Page 4

Modelando un PIC

PIC

Procesador

Memoria

Temporizador

ADCUSB

GLCD

Oscilador


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Page 5

Modelando un PIC

Input

VariablesOutput

(User Interface)

Variables

(Link to other Systems)

Embedded Computer

Software

Hardware

Signal

Conditioning

Data

Conversion

Output

Drive

(display, keypad etc.)


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Microcontrolador PIC

Como sabemos los microcontroladores de 8 bits de

Microchip se dividen en 3

gamas: PIC10 y PIC12: Gama baja

PIC16: Gama media

PIC18: Gama alta


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Estructura Interna de un PIC


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Estructura Externa de un PIC


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Organizacin de las Memorias de un PIC

a) Enfoque de Von Neumann b) Enfoque de Harvard

DataMemory

ProgramMemory

Address

Data

CentralProcessingUnit (CPU)

Input/Output

Central

Processing

Unit (CPU)

DataMemory

Input/

Output

Program

Memory

Address

Data

Address

Data

Address

Data


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Page 10

Arquitectura RISC-PICA CISC machine is generally

recognised by:

Many instructions (say over onehundred), some with considerable

sophistication;

Instruction words are of different

length;

Instructions take different

lengths of time to execute.

A RISC machine is generally

recognised by:

Few instructions (say well below

one hundred),

Each performs a very simple

action;

All instructions are single word;

All, or almost all instructions

take the same length of time to

execute.

Digital

Program

I/0Microprocessor

DataMemory

Memory

CoreAnalog

I/0

& TimersCounters

Reset

Power

Clock

Address BusesInternal Data &

FurtherPeripheral

FurtherPeripheral

nterrupt(s)

A microcontroller = microprocessor core + memory + peripherals


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Page 11

Diagrama de Bloques del PIC

The CPU

Address for Program Memory

Data from

Program

Memory,

carrying

instruction

word

Address for

Data Memory

Data bus forData Memory

and

peripherals

Program Memory

Data

Memory

Extra non-

volatile Data

Memory

Counter/Timer

Peripheral

Digital Input/

Output Ports

It is easy to see the

Program memory, which

uses Flash memory

technology. Alongside this

comes the Stack, which

we meet later. Microchip

call the main data

memory File Registers.

There is another section

of data memory which

uses EEPROMtechnology.


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Registro de Estado de un PIC

Condition

Code Flags


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Memoria de Programa y StackProgram

Counter

16 Series

instructions which

invoke the Stack

Unimplemented memory

space, still addressableby the 13-bit 16F84A

program address bus.

Program Counter

points to locationsin program memory

The program

muststart here

The Interrupt

Service Routine

muststart here


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Mapa de Memoria de Datos y (SFR)Registro de Funciones Especiales

msb is bank select bit

(Status register).

These are the Special Function

Registers, which allow the CPU to

interact with the peripherals

General purpose memory


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Page 15

Interface con Perifricos va elRegistro de Funciones Especiales

Control SFR(s)

Peripheral

Data Transfer SFR(s)

Microcontroller

Core

"Outside

World"

Interrupt(s)

Microcontroller Interaction with its Peripherals, via Special Function Register (SFR) and Interrupt

microcontroller peripherals can be configured in software to operate in a number of different modes,

to do this certain control data must be sent to them to set them up in the desired wayonce in use, there will be data flow between core and peripheral,

there may still be need for further control data,

these needs are commonly met by means of dedicated, memory - mapped registers, sometimes

called Special Function Registers,

this approach gives the microcontroller manufacturer great flexibility to extend a microcontroller

family SFRs for new peripherals can easily be located in gaps in the memory map.


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Configuraciones Globales del PIC

The configuration word determines certain operating features

of the microcontroller. It is in program memory, but cannot be

accessed in normal operation. It is written to during the

programming process. You set its value either by response to

a dialogue box in MPLAB, or by use of Assembler

Directives, at the head of your programme.

The 16F84AConfiguration

Word


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Page 17

Tipos de Memorias de un PIC


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Page 18

Caractersticas de los Osciladores

Oscilador Primario

Oscilador Secundario

Oscilador Interno

Frecuencias de Oscilacin Altas (XT, HS)

Frecuencias de Oscilacin Medias (LP)

Frecuencias de Oscilacin Bajas (RC)

Con PLL

Sin PLL

Con Pre Escala

Sin Pre Escala

Con Pre Escala

Sin Pre Escala

Multiplica Frecuencia

de Oscilacin

Divide Frecuencia de Oscilacin

Divide Frecuencia de Oscilacin


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Modos del Oscilador

The 16F84A can be configured to operate in four different oscillator modes, using R-C,

crystal or ceramic oscillators. It can also accept an external clock source. The user selects

which mode is to be used by setting bits in the Configuration Word.

XTCrystal

The standard crystal configuration, intended for crystals or ceramics in the range 1MHz to

4MHz.

HSHigh Speed

A higher drive version of the XT configuration, for higher frequency crystals and ceramic

resonators. Intended for frequencies in the region of 4MHz or greater. It leads to the highest

current consumption of all the oscillator modes.

LPLow Power

Intended for low frequency crystal applications, and gives the lowest power consumption

possible. Will however operate at any frequency below around 200kHz.

RC - Resistor-Capacitor

Requires connection of an external resistor and capacitor. The lowest cost way of getting an

oscillator, but should not be used when any timing accuracy is required.


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Modos del Oscilador

b) Resistor-Capacitorc) Externally Supplied Clock

a) Crystal or Ceramic, HS, XT, or LP

RA2

RA3

RA4/T0CKI

MCLR

V

RB0/INT

RB1

RB2

RB3 RB4

RB5

RB6

RB7

RA1

RA0

OS C1/CLKIN

OS C2/CLKOUT

VDDSS

Supply voltage

Oscillator connections

Port A, Bit 0

Port A, Bit 1Port A, Bit 2

Port A, Bit 3

*Port A, Bit 4

Ground

**Port B, Bit 0

Port B, Bit 1

Port B, Bit 2

Port B, Bit 3

Port B, Bit 7

Port B, Bit 6

Port B, Bit 5

Port B, Bit 4

*also Counter/Timer clock input

**also external Interrupt input

Reset

1

9 10

18

The Oscillator Pins


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Diagramas de un Oscilador Primario


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Acerca del Conversor Analgico a DigitalADC del PIC


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Acerca del ADC del PIC


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Agenda


Diagramas de Bode




Motor de Inferencia



Prototipo de un ECG

ADC


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Acerca del ECG-UDH


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Caractersticas ADC del DSPIC

Conversin va aproximacin sucesiva SAR.

Velocidad de conversin de hasta 500 ksps.

Hasta 16 pines de entrada analgica.

Pines de referencia de Voltaje Externo.

Modo Automtico de Escaneo de Canal .

Fuente seleccionable de activacin de conversin.

Buffer de resultado de conversin de 16 word

Modos seleccionables de llenado de Buffers.

Cuatro opciones de alineamiento de resultado. Modos de operacin durante el estado Sleep e Idle.


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Acerca del ADC del PIC


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Flujo grama de operacin del ADC


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Estructura Mdulo A/D del PIC24F

VREF+

VREF-

A/Dconverter

ConversionControl

Bus

Interfa

ce

DataFormat

Sample

SequenceControl

AN0

AN1

S/H

AN15

CH0 8/16 LevelResultsBuffer

VR+

VR-VR

Select

AVDD

AVSS


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Registro de Control ADC


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Eje x: Tiempo de Muestreo

AD1CON3

TCYto 256*TCY

RCAD

FCY= FOSC/2

TAD

AD1CON3

1

0

AD Clock

Postscaler by1 to 256


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Proceso de Operacin del ADC

C fi i d l Cl k d l ADC


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Configuracin del Clock del ADC


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Aspectos de Precisin Digital


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Diagrama de Bloques del ADC 10bits

AVDD

AVSS

VREF+

VREF-

VR+

VR-

VR

Se

lect

AD1CON2

AVSSAVDD1xx

VREF-VREF+011

VREF-AVDD010

AVSSVREF+001

AVSSAVDD000

VR-VR+VCFG2:VCFG0

AD1CON2 Register

bit15

CSSL13=0CSSL14=0CSSL15=0

BUFMbit0

ALTS

CSNAVCFG2 VCFG1 VCFG0

bit8

SMPI1 SMPI0SMPI3 SMPI2BUFSbit7

--- --- --- ---

---


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Diagrama de Bloques del ADC 10bits

AN0

AN1

AN15

MuxA

VR-

AN1

AD1CHS

AD1CHS

VINH

VINL(0)

(1)

AD1PCFG Registerbit15

CSSL10=0CSSL13=0CSSL14=0 CSSL8=0PCFG1bit0

PCFG0PCFG2PCFG15 PCFG14 PCFG13

bit8

AD1CON2 Registerbit15

CSSL13=0CSSL14=0

BUFMbit0

ALTS


SMPI1 SMPI0SMPI3 SMPI2BUFS

bit7

--- --- --- ---

---

bit8

AD1CHS Registerbit15

CH0SA1bit0

CH0SA0CH0SA2CH0NAbit7

CH0SA3

CH0SB1 CH0SB0CH0SB2CH0NB CH0SB3--- --- ---

--- --- ---

AD1CSSL Registerbit15

CSSL13=0CSSL14=0 CSSL1bit0

CSSL0CSSL2CSSL15 CSSL14 CSSL13


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Escaneo de Canales del ADC

ADCBUF Buffer

+

-

CH 0

AN15

AN14

.

AN5

AN4

AN3

AN2

AN1

AN0

+B

- B

+A

- A

VREF-

AN1

AN0

AN2

AN13

AN14

INT

ADCBUF0

AD1CSSL Registerbit15

CSSL13=0CSSL14=0 CSSL1bit0

CSSL0CSSL2CSSL15 CSSL14 CSSL13

AN13

bit8


CSSL13=0CSSL14=0

BUFMbit0

ALTS


SMPI1 SMPI0SMPI3 SMPI2BUFSbit7

--- --- --- ---

---


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Diagrama de Bloques del ADC 10 bits

VINH

VINL

S/HMuxA

MuxB

AD1CON1

AD1CON1Seal de

Conversion

completa

01

bit8


CSSL13=0

BUFM

bit0

ALTS


SMPI1 SMPI0SMPI3 SMPI2BUFS

bit7--- --- --- ---

---


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VINH

VINL

S/

H

AD1CON1

AD1CON1

Conversion

complete Signal

ADC1BUF0

:ADC1BUF15

RESULT

VR+VR-

AD1CON1

AD1CON3 (7) 0 TADto 31 TAD

AD1CON1

Clearing AD1CON1 (0)

Active Transition on INT0 pin (1)

Timer4 Compare ends (2)

Evitar 0 TAD

A/Dconverter

VR- VR+


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0000 00dd dddd dddd

ssss sssd dddd dddd

dddd dddd dd00 0000

sddd dddd dd00 0000

RESULT

FORMAT

AD1CON1

AD1CON2 = 0

AD1CON2

AD1CON2

ADC1BUF0

:

::

:

:

:

ADC1BUF15

AD1CON2 = 1

ADC1BUF0

:

:

ADC1BUF7

ADC1BUF8

:

:

ADC1BUF15

0

1


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Ejercicio N1:Digitalizar la Seal Analgica ECG

Tareas a realizar:

Programar el PIC con MPLAB en C18.

Realizar la conversin digital de una seal

analgica en Proteus con PIC usandoPotencimetro.

Resultado esperado:

Digitalizacin de una seal analgica y suvisualizacin usando LCD.


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Objetivos del Laboratorio

Configurar el ADC

Configurar los puertos de E/S

Leer el ADC y mostrarlos en LEDsVDD

Vss

PIC24

AN5

POT R6

RA7-RA0

LEDs D10-D3


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Pasos a Realizar

Open the project C:\RTC\203_PRC\Lab5\Lab5.mcp

Open the file

C:\RTC\203_PRC\Lab5\Lab5.c

Look for ADCInit() function and configure ADC by initializing the registersAD1CON1, AD1CON2, and AD1CON3 looking into the Register details on thenext few pages.

STEP 1: AD1CON1 Select Integer Format Result

Auto Conversion Start

Sample after conversion

STEP 2: AD1CON2 Select AVDD and AVSS as references

Disable Scan mode

Interrupt at 16th sample/Convert sequence 16*1 level buffer

Always use Mux A

STEP 3: AD1CON3 Select Sample Time = 13TAD

Conversion Time is always 12TAD

Select AD Clock Source such that you get 16 samples in around 1 mSec (16ksps)

Assume 1TCY =.25 uS (FCY = 4 MHz)


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Pasos a Realizar

Continue to configure ADC by initializing the registers AD1CHS,AD1PCFG, and AD1CSSL looking into the Register details on thenext few pages.

STEP 4: AD1CHSSet the positive sample input channel for MUX A to use AN5

Set the negative input channel for MUX A to use VR-

STEP 5: AD1PCFGSet AD1PCFG so that the only pin using analog functionality is AN5

STEP 6: AD1CSSLChannel scanning is not enabled, so no input channels should beselected for scanning

Build the project and program the device Procedure to Test

Vary the POT and observe LEDs


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Configurando el Registro ADC

AD1CON1: A/D CONTROL REGISTER 1

ADON -- ADSIL -- -- -- FORM1 FORM0

Bit:8Bit:15

ADC Module

enable bit

ADC Module

enable/disable

in IDLE mode

Result Format00: Intiger (000000dddddddddd)01: Signed Intiger (sssssssddddddddd)

10: Fractional (dddddddddd000000)11: Signed Fractional (sddddddddd000000)

SSRC2 SSRC1 SSRC0 -- -- ASAM SAMP DONE

Start Sampling,

If ASAM is 0

Conversion

Status bit

Bit:0Bit:7

Conversion Trigger Source Selection Bits000: Manual Conversion Trigger001: Active transition on INT0 pin triggers conversion010: Timer3 compare triggers conversion111: Auto conversion

Auto Sample Selection bit

1: Sample immediately after completion of last conversion.0: Sample on setting of SAMP


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Configurando el Registro AD1CON2

VCFG2:VCFG0 VR+ VR-

000 AVDD AVSS

001 VREF+ AVSS

010 AVDD VREF-

011 VREF+ VREF-

1xx AVDD AVSS

VCFG2 VCFG2 VCFG0 -- -- CSCNA -- --

BUFS -- SMPI3 SMPI2 SMPI1 SMPI0 BUFM ALTS

VR

Select

AVDD

AVSS

VREF+

VREF-

VR+

VR-

VCFG2:VCFG0

Bit:8Bit:15

Scan CH0 Mux A Input

Bit:0Bit:7

SMPI3:SMPI0Interrupt Event

(Sample/convert sequence)

0000 each

0001 alternate

.... .

1110 Every 15th

1111 Every 16th

Buffer Status bit, is valid onlywhen BUFM = 11: Buffer 8-F is being filled,

can access Buffer 0-7

0: Buffer 0-7 is being filled,can access Buffer 8-F

Buffer Mode Select bit1: Buffer configured as two 8-words buffers0: Buffer configured as one 16-words

buffers

Sample alternatively

MUX-A & MUX-B

Configurando el Registro AD1CON3


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g g

SAMC4:SAMC0 Sampling Time

00000 0 TAD

00001 1 TAD

.... .

11110 30 TAD

11111 31 TAD

ADRC -- -- SAMC4 SAMC3 SAMC2 SAMC1 SAMC0

ADCS7 ADCS6 ADCS5 ADCS4 ADCS3 ADCS2 ADCS1 ADCS0

ADCS7:ADCS0 Conversion Clock

00000000 TCY ( FCY )

00000001 2*TCY ( FCY / 2 )

.... .

11111110 255*TCY ( FCY / 255 )

11111111 256*TCY ( FCY / 256 )

Bit:8Bit:15

A/D conversion ClockSource

1: ADRC is used

0: System clock is used

Bit:0Bit:7

A/D Sample Time Selection bits

A/D Conversion Clock Selection bits

ADCS = (TAD/TCY) - 1

Configurando el Registro AD1CHS


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Configurando el Registro AD1CHS

CH0SB3:CH0SB0 CH0 Positive Input for MUX B

0000 AN0

0001 AN1

.... .

1110 AN14

1111 AN15

CH0NB -- -- -- CH0SB3 CH0SB2 CH0SB1 CH0SB0

Bit:8Bit:15

CH0 Negative input for

MUX A1: AN10: VR-

CH0NA -- -- -- CH0SA3 CH0SA2 CH0SA1 CH0SA0

Bit:0Bit:7

CH0SA3:CH0SA0 CH0 Positive Input for MUX A

0000 AN0

0001 AN1

.... .

1110 AN14

1111 AN15

CH0 Negative input forMUX B1: AN10: VR-

VREF-

AN15

AN0

ANxx

+B

- B

+A- A

AN15

AN0

ANxx

VREF-

AN1

+

-

CH 0

AN1

CH0SB3:CH0SB0

CH0SA3:CH0SA0

CH0NB

CH0NA

C fi d l AD1PCFG R i d


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Configurando el AD1PCFG: Registro deConfiguracin de Puertos

PCFG15 PCFG14 PCFG13 PCFG12 PCFG11 PCFG10 PCFG9 PCFG8

Bit:8Bit:15

Bit:0Bit:7

PCFG7 PCFG6 PCFG5 PCFG4 PCFG3 PCFG2 PCFG1 PCFG0

Analog Input Pin Configuration Control bits 0 to 15

1: Pin for corresponding analog channel (ANxx) is in digital mode0: Pin for corresponding analog channel (ANxx) is in analog mode

AD1CSSL : A/D Input Scan Select Regsiter

CSSL15 CSSL14 CSSL13 CSSL12 CSSL11 CSSL10 CSSL9 CSSL8

Bit:8Bit:15

Bit:0Bit:7

CSSL7 CSSL6 CSSL5 CSSL4 CSSL3 CSSL2 CSSL1 CSSL0

A/D Input Channel Scan Selection bits 0 to 15

1: Corresponding analog channel (ANxx) is selected for sequential

scanning

0: Corresponding analog channel (ANxx) is ignored for sequentialscanning

R lt d E d


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Resultado Esperado

El valor del POT es promediado cada 16

muestras en 1 ms.

El valor del POT es mostrado en los LEDs

como un valor binario desde 0 hasta 255

El Pin RB2 cambia de valor cada 16

muestras (con una frecuencia de 500 Hz)

A d


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Agenda


Diagramas de Bode




Motor de Inferencia



Prototipo de un ECG

USB


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Acerca del ECG-UDH

I t f USB


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Interfaces USB

USB

Creado por Intel en el ao 1994, versin 1.0.

En el ao 1998 se lanza la versin 1.1 con una velocidad de

transferencia baja de 1.5 Mbps y a full capacidad de 12 Mbps.

En el ao 2000, se lanza la versin 2.0 de alta capacidad con 480 Mbps.

USB B Se ial U i e al


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USB: Bus Serial Universal

Auto dteccin & configuraion (Plug&Play)

Energa en el Bus

3 velocidades: Low- 1.5 Mbps, Full- 12 Mbps,

High- 480 Megabits/second

RS232

Paralelo

PS/2

Tipos de

Aplicacin

Extend the functionality of

your computer!

Data Analysis,

Data Logging,

Firmware Updates,Diagnostics,

Embedded Applications!

Caractersticas del USB


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NRZI Data Encoding

Half duplexdata transmission can go in only one direction at a time

Bus Power to each device:

4.40 - 5.25 V

Guaranteed 100 mA

500 mA maximum through negotiation

~ 5.0 V

~ 3.3 V

VBUS

D+

D-

GND

VBUS

D+

D-

GND

4-wireconnection

DifferentialSignaling



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mini-B Plug

FS, HS PeripheralB Plug

FS, HS Peripheral

A Plug

USB Host



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Guaranteed Latency Guaranteed Data

Integrity

Interrupt

Bulk

Isochronous

PIC18F4550 family supports all these transfer types.

USB Pipes


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USB Pipes

HOST PC

Big USB Pipe12Mb/s

Small Pipe to each USBdevice (up to 127)

Tiny Pipes (endpoints)

Client Software < > Function


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Client Software Function

Client

Software

Interface

USB Device

Host

Endpoints

Data Flows

Buffers

Pipes

El Dispositivo Lgico


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El Dispositivo Lgico

DeviceManufacturer: Microchip Technology)

Product: Mouse in a Circle Demo)

Configuration

Interface

IN (Endpoint 0)USB System Software

(default control pipes)

USB Device-Specific Pipe(s)

(Human Interface Device)

HID TX/RX Functions

(MCHPFSUSB FW)

Analog/Digital I/O

OUT (Endpoint 0)

IN (Endpoint x)

OUT (Endpoint x)

These settings arerepresented by aDevice DescriptorTable, stored in

firmware.


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Perifricos USB


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Perifricos USB

63

Joystick

MouseSD Card

Reader

MCHP

RS-232

Data

LoggerUPS

Keyboard

Generic

Human Interface Device

Class (HID)

Mass Storage

Device Class (MSD)

Communication

Device Class (CDC)

Digitizer

WinUSBLibUSB

Custom Class

(Vendor Class)

Audio

Class

MIDI

Speaker

El Proceso de Enumeracin


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El Proceso de Enumeracin

DETACHED

POWEREDPower

(self/bus)

DEFAULT

Bus

reset

ADDRESS

Get Device

Descriptor

CONFIGURED

Get

Descriptors

ATTACHED

Cable

ConnectedSUSPENDED

Auto Deteccin: Full Velocidad


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Auto Deteccin: Full Velocidad

+5V

D+

D-

GND

Transceiver

USB

Connector

Peripheral evice

V

USB

3.3 V

Full Speed Identification

D+ line pull-up

1.5k5%

USB PICMCU

Auto Deteccin: Baja Velocidad


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Auto Deteccin: Baja Velocidad

+5V

D+

D-

GND

Transceiver

USB

Connector

Peripheral evice

V

USB

3.3 VLow Speed Identification

D- line pull-up

1.5k5%

USB PICMCU

On-chip Pull-up Resistors


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On chip Pull up Resistors

+5V

D+

D-

GND

Transceiver

USB

Connector

Peripheral Device

VUSB3.3 V

On-chip pull-up resistors

available!

USB PICMCU

Address and Configuration: EP0


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Address and Configuration: EP0

See Chapter 9 in USB 2.0 Spec for more info.

Other Endpoints

Endpoint 0 IN(Control Data)

Endpoint 0 OUT(Control Data)

Dual Port/Access RAM

Descriptors

Control Transfers

USB PICMCU

Descriptores


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Descriptores

Device

Configuration 1

Interface 0

Endpoint

Interface 1

Endpoint Endpoint Endpoint

To other Configurations if any

To other Interfaces

if any

String 0

String 1

String N

Descriptors are typically stored in non-volatile/Flash memory

Ejemplo de Descriptores


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Ejemplo de Descriptores

PICDEM USB

Microchip

Device

Configuration 1

Interface 0

Endpoint

Manu. String

Prod. String

USB 2.0, VID = 0x04D8,

PID = 0x0007, Num. Configurations,

Strings?

Configuration #1: Bus-Powered,

Remote Wakeup, 500mA, Num.Interfaces

Interface #0: HID Class, Num. Endpoints

Endpoint 1 IN, Interrupt Transfer Type,

64-byte buffer, Poll every 3 msUnicode

Characters

Go USB!

Other String

MCHPFSUSB Software Framework


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MCHPFSUSB Software Framework- Device Descriptor Table -

usb_descriptors.cDescriptors

VID & PID

Class Specific/* Device Descriptor */ROM USB_DEVICE_DESCRIPTOR device_dsc={ 0x12, // Size of this descriptor in bytes

USB_DESCRIPTOR_DEVICE, // DEVICE descriptor type0x0200, // USB Spec Release Number

CDC_DEVICE, // Class Code0x00, // Subclass code0x00, // Protocol codeEP0_BUFF_SIZE, // Max packet size for EP0,0x04D8, // Microchip Vendor ID0x000C, // Product IDID

CDC RS-232 Emulation


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CDC RS 232 Emulation

PC ComputerPICMicrocontroller

USB Cable

Hyper TerminalCDC

INF File Required(Supplied in MCHPSUSB)

Standard Windows Drivers

Design Considerations: ~80 KB/s max

Bulk Transfers

PC applications can access the device as though it

is connected to a serial COM port

MCHPFSUSB Framework


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MCHPFSUSB Framework- Polled Program Flow -

Reset main() InitializeSystem()

while(1)

Your application

code

USBDeviceTasks()

ProcessIO()

USB Stack

CooperativeMultitasking!!

No blocking

functions.

Use statemachine.

You edit UserInit()

Function

Services

CDCTxService()

MSDTasks()

Re-arm OUT Endpoint

(HID & Generic)

MCHPFSUSB Framework


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MCHPFSUSB Framework- Interrupt Program Flow -

Reset main() InitializeSystem()

while(1)

Your application

codeProcessIO()

You edit

UserInit()

USB Interrupt

Context

USBDeviceTasks()

USBDeviceAttach

()

Function

Services

Notifies the stackwhen the device is

attached

CDCTxService()

MSDTasks()

Re-arm OUT Endpoint

(HID & Generic)


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Acerca del ECG UDH


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Page 77

Acerca del ECG-UDH

Pantallas Grficas LCD (GLCD)


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Page 78

Pantallas Grficas LCD (GLCD)

RA0/AN02

RA1/AN13

RA2/AN2/VREF-/CVREF4

RA3/AN3/VREF+5

RA4/T0CKI/C1OUT/RCV6

RA5/AN4/SS/LVDIN/C2OUT7

RA6/OSC2/CLKO14

OSC1/CLKI13

RB0/AN12/INT0/FLT0/SDI/SDA33

RB1/AN10/INT1/SCK/SCL34

RB2/AN8/INT2/VMO35

RB3/AN9/CCP2/VPO36

RB4/AN11/KBI0/CSSPP37

RB5/KBI1/PGM38

RB6/KBI2/PGC39

RB7/KBI3/PGD40

RC0/T1OSO/T1CKI 15

RC1/T1OSI/CCP2/UOE 16

RC2/CCP1/P1A 17

VUSB18

RC4/D-/VM 23

RC5/D+/VP 24

RC6/TX/CK 25

RC7/RX/DT/SDO 26

RD0/SPP0 19

RD1/SPP1 20

RD2/SPP2 21

RD3/SPP3 22

RD4/SPP4 27

RD5/SPP5/P1B 28

RD6/SPP6/P1C 29

RD7/SPP7/P1D 30

RE0/AN5/CK1SPP 8

RE1/AN6/CK2SPP 9

RE2/AN7/OESPP 10

RE3/MCLR/VPP 1

U2

PIC18F4550

X1CRYSTAL

C1

22pF

C2

22pF

1

2

3

4

5

ICSP 1-5

CONN-SIL5

MCLR

PGD

PGC

MCLR

PGC

PGD

1

2

3

4AN 4-3-ECG

CONN-H4

CS1

1

CS2

2

GND

3

VCC

4

V0

5

RS

6

R/W

7

E

8

DB0

9

DB1

10

DB2

11

DB3

12

DB4

13

DB5

14

DB6

15

DB7

16

RST

17

-Vou

t

18

LCD2AMPIRE128X64

CS1

CS2

CS1

CS2

DI

DI

RW

E

RST

RWE

RST

1 2

3

RV410k

1 2 3 4 5

J2CONN-SIL5

U2(RC0/T1OSO/T1CKI)

R410k

C31uF

R1

10k

D1

1N5817

VCC1

D+3

D-2

GND4

J3

USBCONN

V+

3

2

6

7

4 8

1

U8

OP07

V-

14

Caractersticas de los GLCD


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Caractersticas de los GLCD


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Diagrama de Bloque del


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g qControlador GLCD

Cdigo del Proyecto ECG


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g y

Agenda:


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g UDH Rumbo a la Acreditacin Internacional

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